STM32G0 review and test

pull/13006/head
jeromecoutant 2020-08-10 16:52:28 +02:00 committed by George Beckstein
parent ab6fd6e1eb
commit 8165bca233
8 changed files with 131 additions and 220 deletions

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@ -3074,7 +3074,7 @@ __STATIC_INLINE void LL_RTC_BKP_SetRegister(TAMP_TypeDef *TAMPx, uint32_t Backup
*/ */
__STATIC_INLINE uint32_t LL_RTC_BKP_GetRegister(TAMP_TypeDef *TAMPx, uint32_t BackupRegister) __STATIC_INLINE uint32_t LL_RTC_BKP_GetRegister(TAMP_TypeDef *TAMPx, uint32_t BackupRegister)
{ {
register __IO uint32_t *tmp; const register __IO uint32_t *tmp;
tmp = &(TAMPx->BKP0R) + BackupRegister; tmp = &(TAMPx->BKP0R) + BackupRegister;

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@ -2,7 +2,7 @@
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
****************************************************************************** ******************************************************************************
* *
* Copyright (c) 2018 STMicroelectronics. * Copyright (c) 2016-2020 STMicroelectronics.
* All rights reserved. * All rights reserved.
* *
* This software component is licensed by ST under BSD 3-Clause license, * This software component is licensed by ST under BSD 3-Clause license,
@ -11,6 +11,8 @@
* opensource.org/licenses/BSD-3-Clause * opensource.org/licenses/BSD-3-Clause
* *
****************************************************************************** ******************************************************************************
*
* Automatically generated from STM32CubeMX/db/mcu/STM32G031K(4-6-8)Tx.xml
*/ */
#include "PeripheralPins.h" #include "PeripheralPins.h"
@ -86,15 +88,14 @@ MBED_WEAK const PinMap PinMap_I2C_SCL[] = {
//*** PWM *** //*** PWM ***
// TIM2 cannot be used because already used by the us_ticker // TIM2 cannot be used because already used by the us_ticker
// You have to comment all PWM using TIM_MST defined in hal_tick.h file // (update us_ticker_data.h file if another timer is chosen)
// or update python script (check TIM_MST_LIST) and re-run it
MBED_WEAK const PinMap PinMap_PWM[] = { MBED_WEAK const PinMap PinMap_PWM[] = {
// {PA_0, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 1, 0)}, // TIM2_CH1 // {PA_0, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 1, 0)}, // TIM2_CH1
// {PA_1, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 2, 0)}, // TIM2_CH2 // {PA_1, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 2, 0)}, // TIM2_CH2
// {PA_2, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 3, 0)}, // TIM2_CH3 // Connected to STDIO_UART_TX // {PA_2, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 3, 0)}, // TIM2_CH3 // Connected to STDIO_UART_TX
// {PA_3, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 4, 0)}, // TIM2_CH4 // Connected to STDIO_UART_RX // {PA_3, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 4, 0)}, // TIM2_CH4 // Connected to STDIO_UART_RX
{PA_4, PWM_14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM14, 1, 0)}, // TIM14_CH1 {PA_4, PWM_14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM14, 1, 0)}, // TIM14_CH1
// {PA_5, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 1, 0)}, // TIM2_CH1 // {PA_5, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 1, 0)}, // TIM2_CH1
{PA_6, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM3, 1, 0)}, // TIM3_CH1 {PA_6, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM3, 1, 0)}, // TIM3_CH1
{PA_6_ALT0, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_TIM16, 1, 0)}, // TIM16_CH1 {PA_6_ALT0, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_TIM16, 1, 0)}, // TIM16_CH1
{PA_7, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 1, 1)}, // TIM1_CH1N {PA_7, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 1, 1)}, // TIM1_CH1N
@ -107,14 +108,14 @@ MBED_WEAK const PinMap PinMap_PWM[] = {
{PA_10, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 3, 0)}, // TIM1_CH3 {PA_10, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 3, 0)}, // TIM1_CH3
{PA_10_ALT0, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 3, 0)}, // TIM1_CH3 {PA_10_ALT0, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 3, 0)}, // TIM1_CH3
{PA_11, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 4, 0)}, // TIM1_CH4 {PA_11, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 4, 0)}, // TIM1_CH4
// {PA_15, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 1, 0)}, // TIM2_CH1 // {PA_15, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 1, 0)}, // TIM2_CH1
{PB_0, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 2, 1)}, // TIM1_CH2N {PB_0, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 2, 1)}, // TIM1_CH2N
{PB_0_ALT0, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM3, 3, 0)}, // TIM3_CH3 {PB_0_ALT0, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM3, 3, 0)}, // TIM3_CH3
{PB_1, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 3, 1)}, // TIM1_CH3N {PB_1, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 3, 1)}, // TIM1_CH3N
{PB_1_ALT0, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM3, 4, 0)}, // TIM3_CH4 {PB_1_ALT0, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM3, 4, 0)}, // TIM3_CH4
{PB_1_ALT1, PWM_14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_TIM14, 1, 0)}, // TIM14_CH1 {PB_1_ALT1, PWM_14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_TIM14, 1, 0)}, // TIM14_CH1
{PB_3, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 {PB_3, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
// {PB_3_ALT0, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 2, 0)}, // TIM2_CH2 // {PB_3, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 2, 0)}, // TIM2_CH2
{PB_4, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM3, 1, 0)}, // TIM3_CH1 {PB_4, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM3, 1, 0)}, // TIM3_CH1
{PB_5, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM3, 2, 0)}, // TIM3_CH2 {PB_5, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM3, 2, 0)}, // TIM3_CH2
{PB_6, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 {PB_6, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
@ -122,46 +123,46 @@ MBED_WEAK const PinMap PinMap_PWM[] = {
{PB_7, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM17, 1, 1)}, // TIM17_CH1N {PB_7, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM17, 1, 1)}, // TIM17_CH1N
{PB_8, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM16, 1, 0)}, // TIM16_CH1 {PB_8, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM16, 1, 0)}, // TIM16_CH1
{PB_9, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM17, 1, 0)}, // TIM17_CH1 {PB_9, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM17, 1, 0)}, // TIM17_CH1
{PC_6, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 3, 0)}, // TIM2_CH3 // Connected to LD3 [Green] // {PC_6, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM2, 3, 0)}, // TIM2_CH3 // Connected to LD3 [Green]
{PC_6_ALT0, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM3, 1, 0)}, // TIM3_CH1 // Connected to LD3 [Green] {PC_6, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM3, 1, 0)}, // TIM3_CH1 // Connected to LD3 [Green]
{NC, NC, 0} {NC, NC, 0}
}; };
//*** SERIAL *** //*** SERIAL ***
MBED_WEAK const PinMap PinMap_UART_TX[] = { MBED_WEAK const PinMap PinMap_UART_TX[] = {
{PA_2, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART2)}, // Connected to STDIO_UART_TX {PA_2, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART2)}, // Connected to STDIO_UART_TX
{PA_2_ALT0, LPUART_1,STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_LPUART1)}, // Connected to STDIO_UART_TX // {PA_2_ALT0, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_LPUART1)}, // Connected to STDIO_UART_TX
{PA_9, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)}, {PA_9, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)},
{PA_9_ALT0, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)}, {PA_9_ALT0, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)},
{PA_14, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART2)}, // Connected to T_JTCK // {PA_14, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART2)}, // Connected to T_JTCK
{PB_6, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART1)}, {PB_6, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART1)},
{NC, NC, 0} {NC, NC, 0}
}; };
MBED_WEAK const PinMap PinMap_UART_RX[] = { MBED_WEAK const PinMap PinMap_UART_RX[] = {
{PA_3, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART2)}, // Connected to STDIO_UART_RX {PA_3, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART2)}, // Connected to STDIO_UART_RX
{PA_3_ALT0, LPUART_1,STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_LPUART1)}, // Connected to STDIO_UART_RX // {PA_3_ALT0, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_LPUART1)}, // Connected to STDIO_UART_RX
{PA_10, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)}, {PA_10, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)},
{PA_10_ALT0, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)}, {PA_10_ALT0, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)},
{PA_15, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART2)}, // {PA_15, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART2)},
{PB_7, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART1)}, {PB_7, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF0_USART1)},
{NC, NC, 0} {NC, NC, 0}
}; };
MBED_WEAK const PinMap PinMap_UART_RTS[] = { MBED_WEAK const PinMap PinMap_UART_RTS[] = {
{PA_1, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART2)}, {PA_1, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART2)},
{PA_12, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)}, {PA_12, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)},
{PB_1, LPUART_1,STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_LPUART1)}, {PB_1, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_LPUART1)},
{PB_3, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART1)}, {PB_3, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART1)},
{NC, NC, 0} {NC, NC, 0}
}; };
MBED_WEAK const PinMap PinMap_UART_CTS[] = { MBED_WEAK const PinMap PinMap_UART_CTS[] = {
{PA_0, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART2)}, {PA_0, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART2)},
{PA_6, LPUART_1,STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_LPUART1)}, {PA_6, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_LPUART1)},
{PA_11, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)}, {PA_11, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_USART1)},
{PB_4, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART1)}, {PB_4, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART1)},
{NC, NC, 0} {NC, NC, 0}
}; };

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@ -2,7 +2,7 @@
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
****************************************************************************** ******************************************************************************
* *
* Copyright (c) 2018 STMicroelectronics. * Copyright (c) 2016-2020 STMicroelectronics.
* All rights reserved. * All rights reserved.
* *
* This software component is licensed by ST under BSD 3-Clause license, * This software component is licensed by ST under BSD 3-Clause license,
@ -11,6 +11,8 @@
* opensource.org/licenses/BSD-3-Clause * opensource.org/licenses/BSD-3-Clause
* *
****************************************************************************** ******************************************************************************
*
* Automatically generated from STM32CubeMX/db/mcu/STM32G031K(4-6-8)Tx.xml
*/ */
#ifndef MBED_PINNAMES_H #ifndef MBED_PINNAMES_H
@ -31,109 +33,56 @@ typedef enum {
} ALTx; } ALTx;
typedef enum { typedef enum {
PA_0 = 0x00,
PA_1 = 0x01,
PA_1_ALT0 = PA_1 | ALT0,
PA_2 = 0x02,
PA_2_ALT0 = PA_2 | ALT0,
PA_2_ALT1 = PA_2 | ALT1,
PA_3 = 0x03,
PA_3_ALT0 = PA_3 | ALT0,
PA_3_ALT1 = PA_3 | ALT1,
PA_4 = 0x04,
PA_5 = 0x05,
PA_6 = 0x06,
PA_6_ALT0 = PA_6 | ALT0,
PA_7 = 0x07,
PA_7_ALT0 = PA_7 | ALT0,
PA_7_ALT1 = PA_7 | ALT1,
PA_7_ALT2 = PA_7 | ALT2,
PA_8 = 0x08,
PA_9 = 0x09,
PA_9_ALT0 = PA_9 | ALT0,
PA_10 = 0x0A,
PA_10_ALT0 = PA_10 | ALT0,
PA_11 = 0x0B,
PA_12 = 0x0C,
PA_13 = 0x0D,
PA_14 = 0x0E,
PA_14_ALT0 = PA_14 | ALT0,
PA_15 = 0x0F,
PA_15_ALT0 = PA_15 | ALT0,
PB_0 = 0x10, PA_0 = 0x00,
PB_0_ALT0 = PB_0 | ALT0, PA_1 = 0x01,
PB_1 = 0x11, PA_2 = 0x02,
PB_1_ALT0 = PB_1 | ALT0, PA_2_ALT0 = PA_2 | ALT0, // same pin used for alternate HW
PB_1_ALT1 = PB_1 | ALT1, PA_3 = 0x03,
PB_2 = 0x12, PA_3_ALT0 = PA_3 | ALT0, // same pin used for alternate HW
PB_3 = 0x13, PA_4 = 0x04,
PB_4 = 0x14, PA_5 = 0x05,
PB_4_ALT0 = PB_4 | ALT0, PA_6 = 0x06,
PB_4_ALT1 = PB_4 | ALT1, PA_6_ALT0 = PA_6 | ALT0, // same pin used for alternate HW
PB_5 = 0x15, PA_7 = 0x07,
PB_5_ALT0 = PB_5 | ALT0, PA_7_ALT0 = PA_7 | ALT0, // same pin used for alternate HW
PB_5_ALT1 = PB_5 | ALT1, PA_7_ALT1 = PA_7 | ALT1, // same pin used for alternate HW
PB_6 = 0x16, PA_7_ALT2 = PA_7 | ALT2, // same pin used for alternate HW
PB_6_ALT0 = PB_6 | ALT0, PA_8 = 0x08,
PB_7 = 0x17, PA_9 = 0x09,
PB_8 = 0x18, PA_9_ALT0 = PA_9 | ALT0, // same pin used for alternate HW
PB_9 = 0x19, PA_10 = 0x0A,
PB_10 = 0x1A, PA_10_ALT0 = PA_10 | ALT0, // same pin used for alternate HW
PB_11 = 0x1B, PA_11 = 0x0B,
PB_12 = 0x1C, PA_12 = 0x0C,
PB_13 = 0x1D, PA_13 = 0x0D,
PB_13_ALT0 = PB_13 | ALT0, PA_14 = 0x0E,
PB_14 = 0x1E, PA_15 = 0x0F,
PB_14_ALT0 = PB_14 | ALT0, PB_0 = 0x10,
PB_15 = 0x1F, PB_0_ALT0 = PB_0 | ALT0, // same pin used for alternate HW
PB_15_ALT0 = PB_15 | ALT0, PB_1 = 0x11,
PB_15_ALT1 = PB_15 | ALT1, PB_1_ALT0 = PB_1 | ALT0, // same pin used for alternate HW
PB_1_ALT1 = PB_1 | ALT1, // same pin used for alternate HW
PB_2 = 0x12,
PB_3 = 0x13,
PB_4 = 0x14,
PB_5 = 0x15,
PB_6 = 0x16,
PB_6_ALT0 = PB_6 | ALT0, // same pin used for alternate HW
PB_7 = 0x17,
PB_8 = 0x18,
PB_9 = 0x19,
PC_6 = 0x26,
PC_14 = 0x2E,
PC_15 = 0x2F,
PC_0 = 0x20, /**** ADC internal channels ****/
PC_1 = 0x21,
PC_2 = 0x22,
PC_3 = 0x23,
PC_4 = 0x24,
PC_4_ALT0 = PC_4 | ALT0,
PC_5 = 0x25,
PC_5_ALT0 = PC_5 | ALT0,
PC_6 = 0x26,
PC_6_ALT0 = PC_6 | ALT0,
PC_7 = 0x27,
PC_7_ALT0 = PC_7 | ALT0,
PC_8 = 0x28,
PC_8_ALT0 = PC_8 | ALT0,
PC_9 = 0x29,
PC_9_ALT0 = PC_9 | ALT0,
PC_10 = 0x2A,
PC_10_ALT0 = PC_10 | ALT0,
PC_11 = 0x2B,
PC_11_ALT0 = PC_11 | ALT0,
PC_12 = 0x2C,
PC_13 = 0x2D,
PC_14 = 0x2E,
PC_15 = 0x2F,
PD_0 = 0x30, ADC_TEMP = 0xF0, // Internal pin virtual value
PD_1 = 0x31, ADC_VREF = 0xF1, // Internal pin virtual value
PD_2 = 0x32, ADC_VBAT = 0xF2, // Internal pin virtual value
PD_3 = 0x33,
PD_4 = 0x34,
PD_5 = 0x35,
PD_6 = 0x36,
PD_8 = 0x38,
PD_9 = 0x39,
PF_0 = 0x50, // Arduino Nano Header pin connection naming
PF_1 = 0x51,
// ADC internal channels
ADC_TEMP = 0xF0,
ADC_VREF = 0xF1,
ADC_VBAT = 0xF2,
// Arduino connector namings
A0 = PA_0, A0 = PA_0,
A1 = PA_1, A1 = PA_1,
A2 = PA_4, A2 = PA_4,
@ -170,7 +119,8 @@ typedef enum {
#endif #endif
// Generic signals namings // Generic signals namings
LED1 = PC_6, LED1 = PC_6, // LD3 [Green]
SERIAL_TX = STDIO_UART_TX, SERIAL_TX = STDIO_UART_TX,
SERIAL_RX = STDIO_UART_RX, SERIAL_RX = STDIO_UART_RX,
USBTX = STDIO_UART_TX, USBTX = STDIO_UART_TX,

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@ -2,7 +2,7 @@
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
****************************************************************************** ******************************************************************************
* *
* Copyright (c) 2019 STMicroelectronics. * Copyright (c) 2020 STMicroelectronics.
* All rights reserved. * All rights reserved.
* *
* This software component is licensed by ST under BSD 3-Clause license, * This software component is licensed by ST under BSD 3-Clause license,
@ -16,9 +16,7 @@
/** /**
* This file configures the system clock as follows: * This file configures the system clock as follows:
*----------------------------------------------------------------- *-----------------------------------------------------------------
* System clock source | 1- USE_PLL_HSE_EXTC (external 8 MHz clock) * System clock source | USE_PLL_HSI (internal 16 MHz)
* | 2- USE_PLL_HSE_XTAL (external 8 MHz xtal)
* | 3- USE_PLL_HSI (internal 16 MHz)
*----------------------------------------------------------------- *-----------------------------------------------------------------
* SYSCLK(MHz) | 64 * SYSCLK(MHz) | 64
* AHBCLK (MHz) | 64 * AHBCLK (MHz) | 64
@ -30,12 +28,6 @@
#include "stm32g0xx.h" #include "stm32g0xx.h"
#include "mbed_error.h" #include "mbed_error.h"
/*!< Uncomment the following line if you need to relocate your vector Table in
Internal SRAM. */
/* #define VECT_TAB_SRAM */
#define VECT_TAB_OFFSET 0x00U /*!< Vector Table base offset field.
This value must be a multiple of 0x100. */
#define USE_PLL_HSE_EXTC 0x8 // Use external clock (ST Link MCO) #define USE_PLL_HSE_EXTC 0x8 // Use external clock (ST Link MCO)
#define USE_PLL_HSE_XTAL 0x4 // Use external xtal (X3 on board - not provided by default) #define USE_PLL_HSE_XTAL 0x4 // Use external xtal (X3 on board - not provided by default)
#define USE_PLL_HSI 0x2 // Use HSI internal clock #define USE_PLL_HSI 0x2 // Use HSI internal clock
@ -92,39 +84,7 @@ void SetSysClock(void)
/******************************************************************************/ /******************************************************************************/
uint8_t SetSysClock_PLL_HSE(uint8_t bypass) uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
{ {
RCC_OscInitTypeDef RCC_OscInitStruct = {0}; return 0;
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
/** Configure the main internal regulator output voltage
*/
HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
/** Initializes the CPU, AHB and APB busses clocks
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1;
RCC_OscInitStruct.PLL.PLLN = 16;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
return 0; // FAIL
}
/** Initializes the CPU, AHB and APB busses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
| RCC_CLOCKTYPE_PCLK1;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
return 0; // FAIL
}
return 1; // OK
} }
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */ #endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */

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@ -22,10 +22,11 @@
#endif #endif
#if !defined(MBED_ROM_SIZE) #if !defined(MBED_ROM_SIZE)
#define MBED_ROM_SIZE 0x4000 #if defined (TARGET_NUCLEO_G031K8)
// 0x4000 STM32G031F4Px STM32G031J4Mx STM32G031C4Ux STM32G031K4Tx STM32G031G4Ux STM32G031C4Tx STM32G031K4Ux #define MBED_ROM_SIZE 0x10000 // 64 KB
// 0x8000 STM32G031F6Px STM32G031C6Tx STM32G031G6Ux STM32G031K6Tx STM32G031C6Ux STM32G031J6Mx STM32G031K6Ux #else
// 0x10000 STM32G031K8Tx STM32G031G8Ux STM32G031C8Tx STM32G031K8Ux STM32G031C8Ux STM32G031Y8Yx STM32G031F8Px #error "MBED_ROM_SIZE not defined"
#endif
#endif #endif
#if !defined(MBED_RAM_START) #if !defined(MBED_RAM_START)
@ -33,10 +34,10 @@
#endif #endif
#if !defined(MBED_RAM_SIZE) #if !defined(MBED_RAM_SIZE)
#define MBED_RAM_SIZE 0x2000 #define MBED_RAM_SIZE 0x2000 // 8 KB
#endif #endif
#define NVIC_NUM_VECTORS 46 #define NVIC_NUM_VECTORS 48
#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START #define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
#endif #endif

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@ -40,7 +40,7 @@
#define MBED_RAM_SIZE 0x9000 #define MBED_RAM_SIZE 0x9000
#endif #endif
#define NVIC_NUM_VECTORS 47 #define NVIC_NUM_VECTORS 48
#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START #define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
#endif #endif

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@ -17,11 +17,11 @@
#include "serial_api_hal.h" #include "serial_api_hal.h"
#define UART_NUM (5)
// Retarget this IRQn symbol for chips without USART3/4 #if defined (STM32G031xx)
#if defined(STM32G031xx) #define UART_NUM (3)
#define USART3_4_LPUART1_IRQn LPUART1_IRQn #else
#define UART_NUM (5)
#endif #endif
uint32_t serial_irq_ids[UART_NUM] = {0}; uint32_t serial_irq_ids[UART_NUM] = {0};
@ -143,7 +143,11 @@ void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
#if defined(LPUART1_BASE) #if defined(LPUART1_BASE)
if (obj_s->uart == LPUART_1) { if (obj_s->uart == LPUART_1) {
#if defined(STM32G031xx)
irq_n = LPUART1_IRQn;
#else
irq_n = USART3_4_LPUART1_IRQn; irq_n = USART3_4_LPUART1_IRQn;
#endif
vector = (uint32_t)&lpuart1_irq; vector = (uint32_t)&lpuart1_irq;
} }
#endif #endif
@ -162,19 +166,13 @@ void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
if (irq == RxIrq) { if (irq == RxIrq) {
__HAL_UART_DISABLE_IT(huart, UART_IT_RXNE); __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
// Check if TxIrq is disabled too // Check if TxIrq is disabled too
#if defined(STM32G0) if ((huart->Instance->CR1 & USART_CR1_TXEIE_TXFNFIE) == 0) {
#define USART_CR1_TXEIE USART_CR1_TXEIE_TXFNFIE
#endif
if ((huart->Instance->CR1 & USART_CR1_TXEIE) == 0) {
all_disabled = 1; all_disabled = 1;
} }
} else { // TxIrq } else { // TxIrq
__HAL_UART_DISABLE_IT(huart, UART_IT_TXE); __HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
// Check if RxIrq is disabled too // Check if RxIrq is disabled too
#if defined(STM32G0) if ((huart->Instance->CR1 & USART_CR1_RXNEIE_RXFNEIE) == 0) {
#define USART_CR1_RXNEIE USART_CR1_RXNEIE_RXFNEIE
#endif
if ((huart->Instance->CR1 & USART_CR1_RXNEIE) == 0) {
all_disabled = 1; all_disabled = 1;
} }
} }
@ -339,7 +337,11 @@ static IRQn_Type serial_get_irq_n(UARTName uart_name)
#if defined(LPUART1_BASE) #if defined(LPUART1_BASE)
case LPUART_1: case LPUART_1:
#if defined(STM32G031xx)
irq_n = LPUART1_IRQn;
#else
irq_n = USART3_4_LPUART1_IRQn; irq_n = USART3_4_LPUART1_IRQn;
#endif
break; break;
#endif #endif
default: default:

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@ -2368,6 +2368,27 @@
"MPU" "MPU"
] ]
}, },
"MCU_STM32G031xx": {
"inherits": [
"MCU_STM32G0"
],
"public": false,
"extra_labels_add": [
"STM32G031xx"
],
"macros_add": [
"STM32G031xx"
]
},
"NUCLEO_G031K8": {
"inherits": [
"MCU_STM32G031xx"
],
"detect_code": [
"0852"
],
"device_name": "STM32G031K8Tx"
},
"MCU_STM32G071xx": { "MCU_STM32G071xx": {
"inherits": [ "inherits": [
"MCU_STM32G0" "MCU_STM32G0"
@ -2403,30 +2424,6 @@
], ],
"device_name": "STM32G071RBTx" "device_name": "STM32G071RBTx"
}, },
"MCU_STM32G031xx": {
"inherits": [
"MCU_STM32G0"
],
"public": false,
"extra_labels_add": [
"STM32G031xx"
],
"macros_add": [
"STM32G031xx"
],
"device_has_remove": [
"ANALOGOUT"
]
},
"NUCLEO_G031K8": {
"inherits": [
"MCU_STM32G031xx"
],
"detect_code": [
"0852"
],
"device_name": "STM32G031K8Tx"
},
"MCU_STM32G4": { "MCU_STM32G4": {
"inherits": [ "inherits": [
"MCU_STM32" "MCU_STM32"