From 7fcec27a4aa1c141b4bd6a8ef766e4396a79fc30 Mon Sep 17 00:00:00 2001 From: Leonard Date: Thu, 2 Mar 2023 12:40:16 +1100 Subject: [PATCH] Added HSE range validation for STM32g431xB --- .../TARGET_STM32G4/TARGET_STM32G431xB/system_clock.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xB/system_clock.c b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xB/system_clock.c index 5e76a51759..c03f959704 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xB/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xB/system_clock.c @@ -88,9 +88,9 @@ MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass) RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef RCC_PeriphCLKInitStruct = { 0 }; -//#if HSE_VALUE != 24000000 -//#error Unsupported externall clock value, check HSE_VALUE define -//#endif +#if HSE_VALUE > 48000000 || HSE_VALUE < 4000000 +#error Unsupported externall clock value, check HSE_VALUE define +#endif /* Configure the main internal regulator output voltage */ __HAL_RCC_PWR_CLK_ENABLE();