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STM32F2 remove non-UTF characters

pull/15138/head
Jerome Coutant 2021-10-12 17:46:00 +02:00
parent 66fa2dd0c2
commit 7f15a2802e
7 changed files with 9 additions and 9 deletions
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2
targets/TARGET_STM/TARGET_STM32F2/STM32Cube_FW/CMSIS/stm32f205xx.h
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@ -7,7 +7,7 @@
* This file contains :
* - Data structures and the address mapping for all peripherals
* - Peripherals registers declarations and bits definition
* - Macros to access peripheral’s registers hardware
* - Macros to access peripheral's registers hardware
*
******************************************************************************
* @attention

2
targets/TARGET_STM/TARGET_STM32F2/STM32Cube_FW/CMSIS/stm32f207xx.h
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@ -7,7 +7,7 @@
* This file contains :
* - Data structures and the address mapping for all peripherals
* - Peripherals registers declarations and bits definition
* - Macros to access peripheral’s registers hardware
* - Macros to access peripheral's registers hardware
*
******************************************************************************
* @attention

2
targets/TARGET_STM/TARGET_STM32F2/STM32Cube_FW/CMSIS/stm32f215xx.h
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@ -7,7 +7,7 @@
* This file contains :
* - Data structures and the address mapping for all peripherals
* - Peripherals registers declarations and bits definition
* - Macros to access peripheral’s registers hardware
* - Macros to access peripheral's registers hardware
*
******************************************************************************
* @attention

2
targets/TARGET_STM/TARGET_STM32F2/STM32Cube_FW/CMSIS/stm32f217xx.h
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@ -7,7 +7,7 @@
* This file contains :
* - Data structures and the address mapping for all peripherals
* - Peripherals registers declarations and bits definition
* - Macros to access peripheral’s registers hardware
* - Macros to access peripheral's registers hardware
*
******************************************************************************
* @attention

4
targets/TARGET_STM/TARGET_STM32F2/STM32Cube_FW/CMSIS/stm32f2xx.h
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@ -8,8 +8,8 @@
* is using in the C source code, usually in main.c. This file contains:
* - Configuration section that allows to select:
* - The STM32F2xx device used in the target application
* - To use or not the peripheral’s drivers in application code(i.e.
* code will be based on direct access to peripheral’s registers
* - To use or not the peripheral's drivers in application code(i.e.
* code will be based on direct access to peripheral's registers
* rather than drivers API), this option is controlled by
* "#define USE_HAL_DRIVER"
*

4
targets/TARGET_STM/TARGET_STM32F2/STM32Cube_FW/STM32F2xx_HAL_Driver/stm32f2xx_hal_cryp.c
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@ -299,7 +299,7 @@ HAL_StatusTypeDef HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp)
}
#endif /* (USE_HAL_CRYP_REGISTER_CALLBACKS) */
/* Set the key size(This bit field is ‘don’t care’ in the DES or TDES modes) data type and Algorithm */
/* Set the key size(This bit field is "don't care" in the DES or TDES modes) data type and Algorithm */
MODIFY_REG(hcryp->Instance->CR, CRYP_CR_DATATYPE|CRYP_CR_KEYSIZE|CRYP_CR_ALGOMODE, hcryp->Init.DataType | hcryp->Init.KeySize | hcryp->Init.Algorithm);
/* Reset Error Code field */
@ -398,7 +398,7 @@ HAL_StatusTypeDef HAL_CRYP_SetConfig(CRYP_HandleTypeDef *hcryp, CRYP_ConfigTypeD
hcryp->Init.KeySize = pConf->KeySize;
hcryp->Init.pInitVect = pConf->pInitVect;
/* Set the key size(This bit field is ‘don’t care’ in the DES or TDES modes) data type, AlgoMode and operating mode*/
/* Set the key size(This bit field is "don't care" in the DES or TDES modes) data type, AlgoMode and operating mode*/
MODIFY_REG(hcryp->Instance->CR, CRYP_CR_DATATYPE|CRYP_CR_KEYSIZE|CRYP_CR_ALGOMODE, hcryp->Init.DataType | hcryp->Init.KeySize | hcryp->Init.Algorithm);
/* Process Unlocked */

2
targets/TARGET_STM/TARGET_STM32F2/STM32Cube_FW/STM32F2xx_HAL_Driver/stm32f2xx_hal_wwdg.c
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@ -40,7 +40,7 @@
(++) max time (mS) = 1000 * (Counter - 0x40) / WWDG clock
(+) Typical values:
(++) Counter min (T[5;0] = 0x00) at 30MHz (PCLK1) with zero prescaler:
max timeout before reset: approximately 136.53µs
max timeout before reset: approximately 136.53us
(++) Counter max (T[5;0] = 0x3F) at 30MHz (PCLK1) with prescaler
dividing by 8:
max timeout before reset: approximately 69.91ms