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Fix a bug that I2C freq become fixed 100kHz 

When I2C read/write, I2C freq ignores the setting of user and it become fixed 100kHz.
Implement change the freq according to the setting of user.
pull/759/head
Masao Hamanaka 2014-12-04 15:40:38 +09:00
parent a6279aa351
commit 7ea2016953
2 changed files with 17 additions and 14 deletions
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23
libraries/mbed/targets/hal/TARGET_RENESAS/TARGET_RZ_A1H/i2c_api.c
View File

@ -72,8 +72,10 @@ static void i2c_reg_reset(i2c_t *obj) {
REG(MR1.UINT8[0]) = 0x08; // P_phi /8 9bit (including Ack)
REG(SER.UINT8[0]) = 0x00; // no slave addr enabled
// set default frequency at 100k
i2c_frequency(obj, 100000);
// set frequency
REG(MR1.UINT8[0]) |= obj->pclk_bit;
REG(BRL.UINT32) = obj->width;
REG(BRH.UINT32) = obj->width;
REG(MR2.UINT8[0]) = 0x07;
REG(MR3.UINT8[0]) = 0x00;
@ -130,6 +132,9 @@ void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
// enable power
i2c_power_enable(obj);
// set default frequency at 100k
i2c_frequency(obj, 100000);
// full reset
i2c_reg_reset(obj);
@ -211,8 +216,7 @@ void i2c_frequency(i2c_t *obj, int hz) {
uint8_t pclk_bit = 0;
/* set PCLK */
if (false == RZ_A1_IsClockMode0())
{
if (false == RZ_A1_IsClockMode0()) {
pclk_base = (uint32_t)CM1_RENESAS_RZ_A1_P0_CLK;
} else {
pclk_base = (uint32_t)CM0_RENESAS_RZ_A1_P0_CLK;
@ -250,15 +254,12 @@ void i2c_frequency(i2c_t *obj, int hz) {
if (width != 0) {
// I2C Rate
REG(MR1.UINT8[0]) |= pclk_bit; // P_phi / xx
width |= 0x000000E0;
REG(BRL.UINT32) = width;
REG(BRH.UINT32) = width;
obj->pclk_bit = pclk_bit; // P_phi / xx
obj->width = (width | 0x000000E0);
} else {
// Default
REG(MR1.UINT8[0]) |= 0x00; // P_phi / 1
REG(BRL.UINT32) = 0x000000FF;
REG(BRH.UINT32) = 0x000000FF;
obj->pclk_bit = 0x00; // P_phi / 1
obj->width = 0x000000FF;
}
}

2
libraries/mbed/targets/hal/TARGET_RENESAS/TARGET_RZ_A1H/objects.h
View File

@ -30,6 +30,8 @@ extern "C" {
struct i2c_s {
uint32_t i2c;
uint32_t dummy;
uint8_t pclk_bit;
uint32_t width;
};
struct spi_s {