mirror of https://github.com/ARMmbed/mbed-os.git
Merge pull request #412 from sg-/master
[MTS_GAMBIT] Add new target supportpull/414/head mbed_lib_rev87
commit
7a5896cba2
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/* mbed Microcontroller Library
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* Copyright (c) 2006-2013 ARM Limited
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef MBED_PORTNAMES_H
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#define MBED_PORTNAMES_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef enum {
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PortA = 0,
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PortB = 1,
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PortC = 2,
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PortD = 3,
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PortE = 4
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} PortName;
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#ifdef __cplusplus
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}
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#endif
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#endif
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/* mbed Microcontroller Library
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* Copyright (c) 2006-2013 ARM Limited
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef MBED_PERIPHERALPINS_H
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#define MBED_PERIPHERALPINS_H
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#include "pinmap.h"
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#include "PeripheralNames.h"
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/************RTC***************/
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extern const PinMap PinMap_RTC[];
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/************ADC***************/
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extern const PinMap PinMap_ADC[];
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/************DAC***************/
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extern const PinMap PinMap_DAC[];
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/************I2C***************/
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extern const PinMap PinMap_I2C_SDA[];
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extern const PinMap PinMap_I2C_SCL[];
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/************UART***************/
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extern const PinMap PinMap_UART_TX[];
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extern const PinMap PinMap_UART_RX[];
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/************SPI***************/
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extern const PinMap PinMap_SPI_SCLK[];
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extern const PinMap PinMap_SPI_MOSI[];
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extern const PinMap PinMap_SPI_MISO[];
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extern const PinMap PinMap_SPI_SSEL[];
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/************PWM***************/
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extern const PinMap PinMap_PWM[];
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#endif
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@ -0,0 +1,131 @@
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/* mbed Microcontroller Library
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* Copyright (c) 2006-2013 ARM Limited
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
|
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* distributed under the License is distributed on an "AS IS" BASIS,
|
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef MBED_PERIPHERALNAMES_H
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#define MBED_PERIPHERALNAMES_H
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#include "cmsis.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef enum {
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OSC32KCLK = 0,
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} RTCName;
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typedef enum {
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UART_0 = 0,
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UART_1 = 1,
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UART_2 = 2,
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UART_3 = 3,
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UART_4 = 4,
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} UARTName;
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#define STDIO_UART_TX USBTX
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#define STDIO_UART_RX USBRX
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#define STDIO_UART UART_0
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typedef enum {
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I2C_0 = 0,
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I2C_1 = 1,
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I2C_2 = 2,
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} I2CName;
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#define TPM_SHIFT 8
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typedef enum {
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PWM_1 = (0 << TPM_SHIFT) | (0), // FTM0 CH0
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PWM_2 = (0 << TPM_SHIFT) | (1), // FTM0 CH1
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PWM_3 = (0 << TPM_SHIFT) | (2), // FTM0 CH2
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PWM_4 = (0 << TPM_SHIFT) | (3), // FTM0 CH3
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PWM_5 = (0 << TPM_SHIFT) | (4), // FTM0 CH4
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PWM_6 = (0 << TPM_SHIFT) | (5), // FTM0 CH5
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PWM_7 = (0 << TPM_SHIFT) | (6), // FTM0 CH6
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PWM_8 = (0 << TPM_SHIFT) | (7), // FTM0 CH7
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PWM_9 = (1 << TPM_SHIFT) | (0), // FTM1 CH0
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PWM_10 = (1 << TPM_SHIFT) | (1), // FTM1 CH1
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PWM_11 = (1 << TPM_SHIFT) | (2), // FTM1 CH2
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PWM_12 = (1 << TPM_SHIFT) | (3), // FTM1 CH3
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PWM_13 = (1 << TPM_SHIFT) | (4), // FTM1 CH4
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PWM_14 = (1 << TPM_SHIFT) | (5), // FTM1 CH5
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PWM_15 = (1 << TPM_SHIFT) | (6), // FTM1 CH6
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PWM_16 = (1 << TPM_SHIFT) | (7), // FTM1 CH7
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PWM_17 = (2 << TPM_SHIFT) | (0), // FTM2 CH0
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PWM_18 = (2 << TPM_SHIFT) | (1), // FTM2 CH1
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PWM_19 = (2 << TPM_SHIFT) | (2), // FTM2 CH2
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PWM_20 = (2 << TPM_SHIFT) | (3), // FTM2 CH3
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PWM_21 = (2 << TPM_SHIFT) | (4), // FTM2 CH4
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PWM_22 = (2 << TPM_SHIFT) | (5), // FTM2 CH5
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PWM_23 = (2 << TPM_SHIFT) | (6), // FTM2 CH6
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PWM_24 = (2 << TPM_SHIFT) | (7), // FTM2 CH7
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// could be 4 or could be 3... not sure what register
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// this is for... too much abstraction
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PWM_25 = (3 << TPM_SHIFT) | (0), // FTM3 CH0
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PWM_26 = (3 << TPM_SHIFT) | (1), // FTM3 CH1
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PWM_27 = (3 << TPM_SHIFT) | (2), // FTM3 CH2
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PWM_28 = (3 << TPM_SHIFT) | (3), // FTM3 CH3
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PWM_29 = (3 << TPM_SHIFT) | (4), // FTM3 CH4
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PWM_30 = (3 << TPM_SHIFT) | (5), // FTM3 CH5
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PWM_31 = (3 << TPM_SHIFT) | (6), // FTM3 CH6
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PWM_32 = (3 << TPM_SHIFT) | (7), // FTM3 CH7
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} PWMName;
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#define ADC_INSTANCE_SHIFT 8
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#define ADC_B_CHANNEL_SHIFT 5
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typedef enum {
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ADC0_SE4b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 4,
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ADC0_SE5b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 5,
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ADC0_SE6b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 6,
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ADC0_SE7b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 7,
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ADC0_SE8 = (0 << ADC_INSTANCE_SHIFT) | 8,
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ADC0_SE9 = (0 << ADC_INSTANCE_SHIFT) | 9,
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ADC0_SE12 = (0 << ADC_INSTANCE_SHIFT) | 12,
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ADC0_SE13 = (0 << ADC_INSTANCE_SHIFT) | 13,
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ADC0_SE14 = (0 << ADC_INSTANCE_SHIFT) | 14,
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ADC0_SE15 = (0 << ADC_INSTANCE_SHIFT) | 15,
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ADC0_SE16 = (0 << ADC_INSTANCE_SHIFT) | 16,
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ADC0_SE17 = (0 << ADC_INSTANCE_SHIFT) | 17,
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ADC0_SE18 = (0 << ADC_INSTANCE_SHIFT) | 18,
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ADC1_SE4b = (1 << ADC_INSTANCE_SHIFT) | 4,
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ADC1_SE5b = (1 << ADC_INSTANCE_SHIFT) | 5,
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ADC1_SE6b = (1 << ADC_INSTANCE_SHIFT) | 6,
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ADC1_SE7b = (1 << ADC_INSTANCE_SHIFT) | 7,
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ADC1_SE8 = (1 << ADC_INSTANCE_SHIFT) | 8,
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ADC1_SE9 = (1 << ADC_INSTANCE_SHIFT) | 9,
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ADC1_SE12 = (1 << ADC_INSTANCE_SHIFT) | 12,
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ADC1_SE13 = (1 << ADC_INSTANCE_SHIFT) | 13,
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ADC1_SE14 = (1 << ADC_INSTANCE_SHIFT) | 14,
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ADC1_SE15 = (1 << ADC_INSTANCE_SHIFT) | 15,
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ADC1_SE16 = (1 << ADC_INSTANCE_SHIFT) | 16,
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ADC1_SE17 = (1 << ADC_INSTANCE_SHIFT) | 17,
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ADC1_SE18 = (1 << ADC_INSTANCE_SHIFT) | 18,
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} ADCName;
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typedef enum {
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DAC_0 = 0
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} DACName;
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typedef enum {
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SPI_0 = 0,
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SPI_1 = 1,
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SPI_2 = 2,
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} SPIName;
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#ifdef __cplusplus
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}
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#endif
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#endif
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@ -0,0 +1,202 @@
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/* mbed Microcontroller Library
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* Copyright (c) 2006-2013 ARM Limited
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
|
||||
*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
|
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* distributed under the License is distributed on an "AS IS" BASIS,
|
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "PeripheralPins.h"
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/************RTC***************/
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const PinMap PinMap_RTC[] = {
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{NC, OSC32KCLK, 0},
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};
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/************ADC***************/
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const PinMap PinMap_ADC[] = {
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{PTC2, ADC0_SE4b, 0},
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{PTC8, ADC1_SE4b, 0},
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{PTC9, ADC1_SE5b, 0},
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{PTD1, ADC0_SE5b, 0},
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{PTC10, ADC1_SE6b, 0},
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{PTD5, ADC0_SE6b, 0},
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{PTC11, ADC1_SE7b, 0},
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{PTD6, ADC0_SE7b, 0},
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{PTB0 , ADC0_SE8 , 0},
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{PTB1 , ADC0_SE9 , 0},
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{PTB2 , ADC0_SE12, 0},
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{PTB3 , ADC0_SE13, 0},
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{PTC0 , ADC0_SE14, 0},
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{PTB10, ADC1_SE14, 0},
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{PTB11, ADC1_SE15, 0},
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{PTC1 , ADC0_SE15, 0},
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{PTA17, ADC1_SE17, 0},
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//{PTE24, ADC0_SE17, 0}, //I2C pull up
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//{PTE25, ADC0_SE18, 0}, //I2C pull up
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{NC , NC , 0}
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};
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/************DAC***************/
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const PinMap PinMap_DAC[] = {
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{DAC0_OUT, DAC_0, 0},
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{NC , NC , 0}
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};
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/************I2C***************/
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const PinMap PinMap_I2C_SDA[] = {
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{PTE25, I2C_0, 5},
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{PTB1 , I2C_0, 2},
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{PTB3 , I2C_0, 2},
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{PTC11, I2C_1, 2},
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{PTA13, I2C_2, 5},
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{PTD3 , I2C_0, 7},
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{PTE0 , I2C_1, 6},
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{NC , NC , 0}
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};
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const PinMap PinMap_I2C_SCL[] = {
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{PTE24, I2C_0, 5},
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{PTB0 , I2C_0, 2},
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{PTB2 , I2C_0, 2},
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{PTC10, I2C_1, 2},
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{PTA12, I2C_2, 5},
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{PTA14, I2C_2, 5},
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{PTD2 , I2C_0, 7},
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{PTE1 , I2C_1, 6},
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{NC , NC , 0}
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};
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/************UART***************/
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const PinMap PinMap_UART_TX[] = {
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{PTB17, UART_0, 3},
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{PTC17, UART_3, 3},
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{PTD7 , UART_0, 3},
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{PTD3 , UART_2, 3},
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{PTC4 , UART_1, 3},
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{PTC15, UART_4, 3},
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{PTB11, UART_3, 3},
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{PTA14, UART_0, 3},
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{PTE24, UART_4, 3},
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{PTE4 , UART_3, 3},
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{PTE0, UART_1, 3},
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{NC , NC , 0}
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};
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const PinMap PinMap_UART_RX[] = {
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{PTB16, UART_0, 3},
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{PTE1 , UART_1, 3},
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{PTE5 , UART_3, 3},
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{PTE25, UART_4, 3},
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{PTA15, UART_0, 3},
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{PTC16, UART_3, 3},
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{PTB10, UART_3, 3},
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{PTC3 , UART_1, 3},
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{PTC14, UART_4, 3},
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{PTD2 , UART_2, 3},
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{PTC6 , UART_0, 3},
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{NC , NC , 0}
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};
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/************SPI***************/
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const PinMap PinMap_SPI_SCLK[] = {
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{PTD1 , SPI_0, 2},
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{PTE2 , SPI_1, 2},
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{PTA15, SPI_0, 2},
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{PTB11, SPI_1, 2},
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{PTB21, SPI_2, 2},
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{PTC5 , SPI_0, 2},
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{PTD5 , SPI_1, 7},
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{NC , NC , 0}
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};
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const PinMap PinMap_SPI_MOSI[] = {
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{PTD2 , SPI_0, 2},
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{PTE1 , SPI_1, 2},
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{PTE3 , SPI_1, 7},
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{PTA16, SPI_0, 2},
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{PTB16, SPI_1, 2},
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{PTB22, SPI_2, 2},
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{PTC6 , SPI_0, 2},
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{PTD6 , SPI_1, 7},
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{NC , NC , 0}
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};
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const PinMap PinMap_SPI_MISO[] = {
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{PTD3 , SPI_0, 2},
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{PTE1 , SPI_1, 7},
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{PTE3 , SPI_1, 2},
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{PTA17, SPI_0, 2},
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{PTB17, SPI_1, 2},
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{PTB23, SPI_2, 2},
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{PTC7 , SPI_0, 2},
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{PTD7 , SPI_1, 7},
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{NC , NC , 0}
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};
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const PinMap PinMap_SPI_SSEL[] = {
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{PTD0 , SPI_0, 2},
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{PTE4 , SPI_1, 2},
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{PTA14, SPI_0, 2},
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{PTB10, SPI_1, 2},
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{PTB20, SPI_2, 2},
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{PTC4 , SPI_0, 2},
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{PTD4 , SPI_1, 7},
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{NC , NC , 0}
|
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};
|
||||
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/************PWM***************/
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const PinMap PinMap_PWM[] = {
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{PTA0 , PWM_6 , 3},
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{PTA1 , PWM_7 , 3},
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{PTA2 , PWM_8 , 3},
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{PTA3 , PWM_1 , 3},
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{PTA4 , PWM_2 , 3},
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{PTA5 , PWM_3 , 3},
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{PTA6 , PWM_4 , 3},
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||||
{PTA7 , PWM_5 , 3},
|
||||
{PTA8 , PWM_9 , 3},
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||||
{PTA9 , PWM_10, 3},
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||||
{PTA10, PWM_17, 3},
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||||
{PTA11, PWM_18, 3},
|
||||
{PTA12, PWM_9 , 3},
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||||
{PTA13, PWM_10, 3},
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{PTB0 , PWM_9 , 3},
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{PTB1 , PWM_10, 3},
|
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{PTB18, PWM_17, 3},
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{PTB19, PWM_18, 3},
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{PTC1 , PWM_1 , 4},
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{PTC2 , PWM_2 , 4},
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{PTC3 , PWM_3 , 4},
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{PTC4 , PWM_4 , 4},
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{PTC5 , PWM_3 , 7},
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{PTC8 , PWM_29, 3},
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{PTC9 , PWM_30, 3},
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{PTC10, PWM_31, 3},
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{PTC11, PWM_32, 3},
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{PTD0 , PWM_25, 4},
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{PTD1 , PWM_26, 4},
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{PTD2 , PWM_27, 4},
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{PTD3 , PWM_28, 4},
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{PTD4 , PWM_5 , 4},
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{PTD5 , PWM_6 , 4},
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{PTD6 , PWM_7 , 4},
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{PTD4 , PWM_5 , 4},
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{PTD7 , PWM_8 , 4},
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{PTE5 , PWM_25, 6},
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||||
{PTE6 , PWM_26, 6},
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{NC , NC , 0}
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||||
};
|
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@ -0,0 +1,131 @@
|
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/* mbed Microcontroller Library
|
||||
* Copyright (c) 2006-2013 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#ifndef MBED_PERIPHERALNAMES_H
|
||||
#define MBED_PERIPHERALNAMES_H
|
||||
|
||||
#include "cmsis.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
typedef enum {
|
||||
OSC32KCLK = 0,
|
||||
} RTCName;
|
||||
|
||||
typedef enum {
|
||||
UART_0 = 0,
|
||||
UART_1 = 1,
|
||||
UART_2 = 2,
|
||||
UART_3 = 3,
|
||||
UART_4 = 4,
|
||||
} UARTName;
|
||||
|
||||
#define STDIO_UART_TX USBTX
|
||||
#define STDIO_UART_RX USBRX
|
||||
#define STDIO_UART UART_0
|
||||
|
||||
typedef enum {
|
||||
I2C_0 = 0,
|
||||
I2C_1 = 1,
|
||||
I2C_2 = 2,
|
||||
} I2CName;
|
||||
|
||||
#define TPM_SHIFT 8
|
||||
typedef enum {
|
||||
PWM_1 = (0 << TPM_SHIFT) | (0), // FTM0 CH0
|
||||
PWM_2 = (0 << TPM_SHIFT) | (1), // FTM0 CH1
|
||||
PWM_3 = (0 << TPM_SHIFT) | (2), // FTM0 CH2
|
||||
PWM_4 = (0 << TPM_SHIFT) | (3), // FTM0 CH3
|
||||
PWM_5 = (0 << TPM_SHIFT) | (4), // FTM0 CH4
|
||||
PWM_6 = (0 << TPM_SHIFT) | (5), // FTM0 CH5
|
||||
PWM_7 = (0 << TPM_SHIFT) | (6), // FTM0 CH6
|
||||
PWM_8 = (0 << TPM_SHIFT) | (7), // FTM0 CH7
|
||||
PWM_9 = (1 << TPM_SHIFT) | (0), // FTM1 CH0
|
||||
PWM_10 = (1 << TPM_SHIFT) | (1), // FTM1 CH1
|
||||
PWM_11 = (1 << TPM_SHIFT) | (2), // FTM1 CH2
|
||||
PWM_12 = (1 << TPM_SHIFT) | (3), // FTM1 CH3
|
||||
PWM_13 = (1 << TPM_SHIFT) | (4), // FTM1 CH4
|
||||
PWM_14 = (1 << TPM_SHIFT) | (5), // FTM1 CH5
|
||||
PWM_15 = (1 << TPM_SHIFT) | (6), // FTM1 CH6
|
||||
PWM_16 = (1 << TPM_SHIFT) | (7), // FTM1 CH7
|
||||
PWM_17 = (2 << TPM_SHIFT) | (0), // FTM2 CH0
|
||||
PWM_18 = (2 << TPM_SHIFT) | (1), // FTM2 CH1
|
||||
PWM_19 = (2 << TPM_SHIFT) | (2), // FTM2 CH2
|
||||
PWM_20 = (2 << TPM_SHIFT) | (3), // FTM2 CH3
|
||||
PWM_21 = (2 << TPM_SHIFT) | (4), // FTM2 CH4
|
||||
PWM_22 = (2 << TPM_SHIFT) | (5), // FTM2 CH5
|
||||
PWM_23 = (2 << TPM_SHIFT) | (6), // FTM2 CH6
|
||||
PWM_24 = (2 << TPM_SHIFT) | (7), // FTM2 CH7
|
||||
// could be 4 or could be 3... not sure what register
|
||||
// this is for... too much abstraction
|
||||
PWM_25 = (3 << TPM_SHIFT) | (0), // FTM3 CH0
|
||||
PWM_26 = (3 << TPM_SHIFT) | (1), // FTM3 CH1
|
||||
PWM_27 = (3 << TPM_SHIFT) | (2), // FTM3 CH2
|
||||
PWM_28 = (3 << TPM_SHIFT) | (3), // FTM3 CH3
|
||||
PWM_29 = (3 << TPM_SHIFT) | (4), // FTM3 CH4
|
||||
PWM_30 = (3 << TPM_SHIFT) | (5), // FTM3 CH5
|
||||
PWM_31 = (3 << TPM_SHIFT) | (6), // FTM3 CH6
|
||||
PWM_32 = (3 << TPM_SHIFT) | (7), // FTM3 CH7
|
||||
} PWMName;
|
||||
|
||||
#define ADC_INSTANCE_SHIFT 8
|
||||
#define ADC_B_CHANNEL_SHIFT 5
|
||||
typedef enum {
|
||||
ADC0_SE4b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 4,
|
||||
ADC0_SE5b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 5,
|
||||
ADC0_SE6b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 6,
|
||||
ADC0_SE7b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 7,
|
||||
ADC0_SE8 = (0 << ADC_INSTANCE_SHIFT) | 8,
|
||||
ADC0_SE9 = (0 << ADC_INSTANCE_SHIFT) | 9,
|
||||
ADC0_SE12 = (0 << ADC_INSTANCE_SHIFT) | 12,
|
||||
ADC0_SE13 = (0 << ADC_INSTANCE_SHIFT) | 13,
|
||||
ADC0_SE14 = (0 << ADC_INSTANCE_SHIFT) | 14,
|
||||
ADC0_SE15 = (0 << ADC_INSTANCE_SHIFT) | 15,
|
||||
ADC0_SE16 = (0 << ADC_INSTANCE_SHIFT) | 16,
|
||||
ADC0_SE17 = (0 << ADC_INSTANCE_SHIFT) | 17,
|
||||
ADC0_SE18 = (0 << ADC_INSTANCE_SHIFT) | 18,
|
||||
ADC1_SE4b = (1 << ADC_INSTANCE_SHIFT) | 4,
|
||||
ADC1_SE5b = (1 << ADC_INSTANCE_SHIFT) | 5,
|
||||
ADC1_SE6b = (1 << ADC_INSTANCE_SHIFT) | 6,
|
||||
ADC1_SE7b = (1 << ADC_INSTANCE_SHIFT) | 7,
|
||||
ADC1_SE8 = (1 << ADC_INSTANCE_SHIFT) | 8,
|
||||
ADC1_SE9 = (1 << ADC_INSTANCE_SHIFT) | 9,
|
||||
ADC1_SE12 = (1 << ADC_INSTANCE_SHIFT) | 12,
|
||||
ADC1_SE13 = (1 << ADC_INSTANCE_SHIFT) | 13,
|
||||
ADC1_SE14 = (1 << ADC_INSTANCE_SHIFT) | 14,
|
||||
ADC1_SE15 = (1 << ADC_INSTANCE_SHIFT) | 15,
|
||||
ADC1_SE16 = (1 << ADC_INSTANCE_SHIFT) | 16,
|
||||
ADC1_SE17 = (1 << ADC_INSTANCE_SHIFT) | 17,
|
||||
ADC1_SE18 = (1 << ADC_INSTANCE_SHIFT) | 18,
|
||||
} ADCName;
|
||||
|
||||
typedef enum {
|
||||
DAC_0 = 0
|
||||
} DACName;
|
||||
|
||||
|
||||
typedef enum {
|
||||
SPI_0 = 0,
|
||||
SPI_1 = 1,
|
||||
SPI_2 = 2,
|
||||
} SPIName;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
|
@ -0,0 +1,202 @@
|
|||
/* mbed Microcontroller Library
|
||||
* Copyright (c) 2006-2013 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "PeripheralPins.h"
|
||||
|
||||
/************RTC***************/
|
||||
const PinMap PinMap_RTC[] = {
|
||||
{NC, OSC32KCLK, 0},
|
||||
};
|
||||
|
||||
/************ADC***************/
|
||||
const PinMap PinMap_ADC[] = {
|
||||
{PTC2, ADC0_SE4b, 0},
|
||||
{PTC8, ADC1_SE4b, 0},
|
||||
{PTC9, ADC1_SE5b, 0},
|
||||
{PTD1, ADC0_SE5b, 0},
|
||||
{PTC10, ADC1_SE6b, 0},
|
||||
{PTD5, ADC0_SE6b, 0},
|
||||
{PTC11, ADC1_SE7b, 0},
|
||||
{PTD6, ADC0_SE7b, 0},
|
||||
{PTB0 , ADC0_SE8 , 0},
|
||||
{PTB1 , ADC0_SE9 , 0},
|
||||
{PTB2 , ADC0_SE12, 0},
|
||||
{PTB3 , ADC0_SE13, 0},
|
||||
{PTC0 , ADC0_SE14, 0},
|
||||
{PTB10, ADC1_SE14, 0},
|
||||
{PTB11, ADC1_SE15, 0},
|
||||
{PTC1 , ADC0_SE15, 0},
|
||||
{PTA17, ADC1_SE17, 0},
|
||||
//{PTE24, ADC0_SE17, 0}, //I2C pull up
|
||||
//{PTE25, ADC0_SE18, 0}, //I2C pull up
|
||||
{NC , NC , 0}
|
||||
};
|
||||
|
||||
/************DAC***************/
|
||||
const PinMap PinMap_DAC[] = {
|
||||
{DAC0_OUT, DAC_0, 0},
|
||||
{NC , NC , 0}
|
||||
};
|
||||
|
||||
/************I2C***************/
|
||||
const PinMap PinMap_I2C_SDA[] = {
|
||||
{PTE25, I2C_0, 5},
|
||||
{PTB1 , I2C_0, 2},
|
||||
{PTB3 , I2C_0, 2},
|
||||
{PTC11, I2C_1, 2},
|
||||
{PTA13, I2C_2, 5},
|
||||
{PTD3 , I2C_0, 7},
|
||||
{PTE0 , I2C_1, 6},
|
||||
{NC , NC , 0}
|
||||
};
|
||||
|
||||
const PinMap PinMap_I2C_SCL[] = {
|
||||
{PTE24, I2C_0, 5},
|
||||
{PTB0 , I2C_0, 2},
|
||||
{PTB2 , I2C_0, 2},
|
||||
{PTC10, I2C_1, 2},
|
||||
{PTA12, I2C_2, 5},
|
||||
{PTA14, I2C_2, 5},
|
||||
{PTD2 , I2C_0, 7},
|
||||
{PTE1 , I2C_1, 6},
|
||||
{NC , NC , 0}
|
||||
};
|
||||
|
||||
/************UART***************/
|
||||
const PinMap PinMap_UART_TX[] = {
|
||||
{PTB17, UART_0, 3},
|
||||
{PTC17, UART_3, 3},
|
||||
{PTD7 , UART_0, 3},
|
||||
{PTD3 , UART_2, 3},
|
||||
{PTC4 , UART_1, 3},
|
||||
{PTC15, UART_4, 3},
|
||||
{PTB11, UART_3, 3},
|
||||
{PTA14, UART_0, 3},
|
||||
{PTE24, UART_4, 3},
|
||||
{PTE4 , UART_3, 3},
|
||||
{PTE0, UART_1, 3},
|
||||
{NC , NC , 0}
|
||||
};
|
||||
|
||||
const PinMap PinMap_UART_RX[] = {
|
||||
{PTB16, UART_0, 3},
|
||||
{PTE1 , UART_1, 3},
|
||||
{PTE5 , UART_3, 3},
|
||||
{PTE25, UART_4, 3},
|
||||
{PTA15, UART_0, 3},
|
||||
{PTC16, UART_3, 3},
|
||||
{PTB10, UART_3, 3},
|
||||
{PTC3 , UART_1, 3},
|
||||
{PTC14, UART_4, 3},
|
||||
{PTD2 , UART_2, 3},
|
||||
{PTC6 , UART_0, 3},
|
||||
{NC , NC , 0}
|
||||
};
|
||||
|
||||
/************SPI***************/
|
||||
const PinMap PinMap_SPI_SCLK[] = {
|
||||
{PTD1 , SPI_0, 2},
|
||||
{PTE2 , SPI_1, 2},
|
||||
{PTA15, SPI_0, 2},
|
||||
{PTB11, SPI_1, 2},
|
||||
{PTB21, SPI_2, 2},
|
||||
{PTC5 , SPI_0, 2},
|
||||
{PTD5 , SPI_1, 7},
|
||||
{NC , NC , 0}
|
||||
};
|
||||
|
||||
const PinMap PinMap_SPI_MOSI[] = {
|
||||
{PTD2 , SPI_0, 2},
|
||||
{PTE1 , SPI_1, 2},
|
||||
{PTE3 , SPI_1, 7},
|
||||
{PTA16, SPI_0, 2},
|
||||
{PTB16, SPI_1, 2},
|
||||
{PTB22, SPI_2, 2},
|
||||
{PTC6 , SPI_0, 2},
|
||||
{PTD6 , SPI_1, 7},
|
||||
{NC , NC , 0}
|
||||
};
|
||||
|
||||
const PinMap PinMap_SPI_MISO[] = {
|
||||
{PTD3 , SPI_0, 2},
|
||||
{PTE1 , SPI_1, 7},
|
||||
{PTE3 , SPI_1, 2},
|
||||
{PTA17, SPI_0, 2},
|
||||
{PTB17, SPI_1, 2},
|
||||
{PTB23, SPI_2, 2},
|
||||
{PTC7 , SPI_0, 2},
|
||||
{PTD7 , SPI_1, 7},
|
||||
{NC , NC , 0}
|
||||
};
|
||||
|
||||
const PinMap PinMap_SPI_SSEL[] = {
|
||||
{PTD0 , SPI_0, 2},
|
||||
{PTE4 , SPI_1, 2},
|
||||
{PTA14, SPI_0, 2},
|
||||
{PTB10, SPI_1, 2},
|
||||
{PTB20, SPI_2, 2},
|
||||
{PTC4 , SPI_0, 2},
|
||||
{PTD4 , SPI_1, 7},
|
||||
{NC , NC , 0}
|
||||
};
|
||||
|
||||
/************PWM***************/
|
||||
const PinMap PinMap_PWM[] = {
|
||||
{PTA0 , PWM_6 , 3},
|
||||
{PTA1 , PWM_7 , 3},
|
||||
{PTA2 , PWM_8 , 3},
|
||||
{PTA3 , PWM_1 , 3},
|
||||
{PTA4 , PWM_2 , 3},
|
||||
{PTA5 , PWM_3 , 3},
|
||||
{PTA6 , PWM_4 , 3},
|
||||
{PTA7 , PWM_5 , 3},
|
||||
{PTA8 , PWM_9 , 3},
|
||||
{PTA9 , PWM_10, 3},
|
||||
{PTA10, PWM_17, 3},
|
||||
{PTA11, PWM_18, 3},
|
||||
{PTA12, PWM_9 , 3},
|
||||
{PTA13, PWM_10, 3},
|
||||
|
||||
{PTB0 , PWM_9 , 3},
|
||||
{PTB1 , PWM_10, 3},
|
||||
{PTB18, PWM_17, 3},
|
||||
{PTB19, PWM_18, 3},
|
||||
|
||||
{PTC1 , PWM_1 , 4},
|
||||
{PTC2 , PWM_2 , 4},
|
||||
{PTC3 , PWM_3 , 4},
|
||||
{PTC4 , PWM_4 , 4},
|
||||
{PTC5 , PWM_3 , 7},
|
||||
{PTC8 , PWM_29, 3},
|
||||
{PTC9 , PWM_30, 3},
|
||||
{PTC10, PWM_31, 3},
|
||||
{PTC11, PWM_32, 3},
|
||||
|
||||
{PTD0 , PWM_25, 4},
|
||||
{PTD1 , PWM_26, 4},
|
||||
{PTD2 , PWM_27, 4},
|
||||
{PTD3 , PWM_28, 4},
|
||||
{PTD4 , PWM_5 , 4},
|
||||
{PTD5 , PWM_6 , 4},
|
||||
{PTD6 , PWM_7 , 4},
|
||||
{PTD4 , PWM_5 , 4},
|
||||
{PTD7 , PWM_8 , 4},
|
||||
|
||||
{PTE5 , PWM_25, 6},
|
||||
{PTE6 , PWM_26, 6},
|
||||
|
||||
{NC , NC , 0}
|
||||
};
|
|
@ -0,0 +1,226 @@
|
|||
/* mbed Microcontroller Library
|
||||
* Copyright (c) 2006-2013 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#ifndef MBED_PINNAMES_H
|
||||
#define MBED_PINNAMES_H
|
||||
|
||||
#include "cmsis.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
typedef enum {
|
||||
PIN_INPUT,
|
||||
PIN_OUTPUT
|
||||
} PinDirection;
|
||||
|
||||
#define GPIO_PORT_SHIFT 12
|
||||
|
||||
typedef enum {
|
||||
PTA0 = (0 << GPIO_PORT_SHIFT | 0 ),
|
||||
PTA1 = (0 << GPIO_PORT_SHIFT | 1 ),
|
||||
PTA2 = (0 << GPIO_PORT_SHIFT | 2 ),
|
||||
PTA3 = (0 << GPIO_PORT_SHIFT | 3 ),
|
||||
PTA4 = (0 << GPIO_PORT_SHIFT | 4 ),
|
||||
PTA5 = (0 << GPIO_PORT_SHIFT | 5 ),
|
||||
PTA6 = (0 << GPIO_PORT_SHIFT | 6 ),
|
||||
PTA7 = (0 << GPIO_PORT_SHIFT | 7 ),
|
||||
PTA8 = (0 << GPIO_PORT_SHIFT | 8 ),
|
||||
PTA9 = (0 << GPIO_PORT_SHIFT | 9 ),
|
||||
PTA10 = (0 << GPIO_PORT_SHIFT | 10),
|
||||
PTA11 = (0 << GPIO_PORT_SHIFT | 11),
|
||||
PTA12 = (0 << GPIO_PORT_SHIFT | 12),
|
||||
PTA13 = (0 << GPIO_PORT_SHIFT | 13),
|
||||
PTA14 = (0 << GPIO_PORT_SHIFT | 14),
|
||||
PTA15 = (0 << GPIO_PORT_SHIFT | 15),
|
||||
PTA16 = (0 << GPIO_PORT_SHIFT | 16),
|
||||
PTA17 = (0 << GPIO_PORT_SHIFT | 17),
|
||||
PTA18 = (0 << GPIO_PORT_SHIFT | 18),
|
||||
PTA19 = (0 << GPIO_PORT_SHIFT | 19),
|
||||
PTA20 = (0 << GPIO_PORT_SHIFT | 20),
|
||||
PTA21 = (0 << GPIO_PORT_SHIFT | 21),
|
||||
PTA22 = (0 << GPIO_PORT_SHIFT | 22),
|
||||
PTA23 = (0 << GPIO_PORT_SHIFT | 23),
|
||||
PTA24 = (0 << GPIO_PORT_SHIFT | 24),
|
||||
PTA25 = (0 << GPIO_PORT_SHIFT | 25),
|
||||
PTA26 = (0 << GPIO_PORT_SHIFT | 26),
|
||||
PTA27 = (0 << GPIO_PORT_SHIFT | 27),
|
||||
PTA28 = (0 << GPIO_PORT_SHIFT | 28),
|
||||
PTA29 = (0 << GPIO_PORT_SHIFT | 29),
|
||||
PTA30 = (0 << GPIO_PORT_SHIFT | 30),
|
||||
PTA31 = (0 << GPIO_PORT_SHIFT | 31),
|
||||
PTB0 = (1 << GPIO_PORT_SHIFT | 0 ),
|
||||
PTB1 = (1 << GPIO_PORT_SHIFT | 1 ),
|
||||
PTB2 = (1 << GPIO_PORT_SHIFT | 2 ),
|
||||
PTB3 = (1 << GPIO_PORT_SHIFT | 3 ),
|
||||
PTB4 = (1 << GPIO_PORT_SHIFT | 4 ),
|
||||
PTB5 = (1 << GPIO_PORT_SHIFT | 5 ),
|
||||
PTB6 = (1 << GPIO_PORT_SHIFT | 6 ),
|
||||
PTB7 = (1 << GPIO_PORT_SHIFT | 7 ),
|
||||
PTB8 = (1 << GPIO_PORT_SHIFT | 8 ),
|
||||
PTB9 = (1 << GPIO_PORT_SHIFT | 9 ),
|
||||
PTB10 = (1 << GPIO_PORT_SHIFT | 10),
|
||||
PTB11 = (1 << GPIO_PORT_SHIFT | 11),
|
||||
PTB12 = (1 << GPIO_PORT_SHIFT | 12),
|
||||
PTB13 = (1 << GPIO_PORT_SHIFT | 13),
|
||||
PTB14 = (1 << GPIO_PORT_SHIFT | 14),
|
||||
PTB15 = (1 << GPIO_PORT_SHIFT | 15),
|
||||
PTB16 = (1 << GPIO_PORT_SHIFT | 16),
|
||||
PTB17 = (1 << GPIO_PORT_SHIFT | 17),
|
||||
PTB18 = (1 << GPIO_PORT_SHIFT | 18),
|
||||
PTB19 = (1 << GPIO_PORT_SHIFT | 19),
|
||||
PTB20 = (1 << GPIO_PORT_SHIFT | 20),
|
||||
PTB21 = (1 << GPIO_PORT_SHIFT | 21),
|
||||
PTB22 = (1 << GPIO_PORT_SHIFT | 22),
|
||||
PTB23 = (1 << GPIO_PORT_SHIFT | 23),
|
||||
PTB24 = (1 << GPIO_PORT_SHIFT | 24),
|
||||
PTB25 = (1 << GPIO_PORT_SHIFT | 25),
|
||||
PTB26 = (1 << GPIO_PORT_SHIFT | 26),
|
||||
PTB27 = (1 << GPIO_PORT_SHIFT | 27),
|
||||
PTB28 = (1 << GPIO_PORT_SHIFT | 28),
|
||||
PTB29 = (1 << GPIO_PORT_SHIFT | 29),
|
||||
PTB30 = (1 << GPIO_PORT_SHIFT | 30),
|
||||
PTB31 = (1 << GPIO_PORT_SHIFT | 31),
|
||||
PTC0 = (2 << GPIO_PORT_SHIFT | 0 ),
|
||||
PTC1 = (2 << GPIO_PORT_SHIFT | 1 ),
|
||||
PTC2 = (2 << GPIO_PORT_SHIFT | 2 ),
|
||||
PTC3 = (2 << GPIO_PORT_SHIFT | 3 ),
|
||||
PTC4 = (2 << GPIO_PORT_SHIFT | 4 ),
|
||||
PTC5 = (2 << GPIO_PORT_SHIFT | 5 ),
|
||||
PTC6 = (2 << GPIO_PORT_SHIFT | 6 ),
|
||||
PTC7 = (2 << GPIO_PORT_SHIFT | 7 ),
|
||||
PTC8 = (2 << GPIO_PORT_SHIFT | 8 ),
|
||||
PTC9 = (2 << GPIO_PORT_SHIFT | 9 ),
|
||||
PTC10 = (2 << GPIO_PORT_SHIFT | 10),
|
||||
PTC11 = (2 << GPIO_PORT_SHIFT | 11),
|
||||
PTC12 = (2 << GPIO_PORT_SHIFT | 12),
|
||||
PTC13 = (2 << GPIO_PORT_SHIFT | 13),
|
||||
PTC14 = (2 << GPIO_PORT_SHIFT | 14),
|
||||
PTC15 = (2 << GPIO_PORT_SHIFT | 15),
|
||||
PTC16 = (2 << GPIO_PORT_SHIFT | 16),
|
||||
PTC17 = (2 << GPIO_PORT_SHIFT | 17),
|
||||
PTC18 = (2 << GPIO_PORT_SHIFT | 18),
|
||||
PTC19 = (2 << GPIO_PORT_SHIFT | 19),
|
||||
PTC20 = (2 << GPIO_PORT_SHIFT | 20),
|
||||
PTC21 = (2 << GPIO_PORT_SHIFT | 21),
|
||||
PTC22 = (2 << GPIO_PORT_SHIFT | 22),
|
||||
PTC23 = (2 << GPIO_PORT_SHIFT | 23),
|
||||
PTC24 = (2 << GPIO_PORT_SHIFT | 24),
|
||||
PTC25 = (2 << GPIO_PORT_SHIFT | 25),
|
||||
PTC26 = (2 << GPIO_PORT_SHIFT | 26),
|
||||
PTC27 = (2 << GPIO_PORT_SHIFT | 27),
|
||||
PTC28 = (2 << GPIO_PORT_SHIFT | 28),
|
||||
PTC29 = (2 << GPIO_PORT_SHIFT | 29),
|
||||
PTC30 = (2 << GPIO_PORT_SHIFT | 30),
|
||||
PTC31 = (2 << GPIO_PORT_SHIFT | 31),
|
||||
PTD0 = (3 << GPIO_PORT_SHIFT | 0 ),
|
||||
PTD1 = (3 << GPIO_PORT_SHIFT | 1 ),
|
||||
PTD2 = (3 << GPIO_PORT_SHIFT | 2 ),
|
||||
PTD3 = (3 << GPIO_PORT_SHIFT | 3 ),
|
||||
PTD4 = (3 << GPIO_PORT_SHIFT | 4 ),
|
||||
PTD5 = (3 << GPIO_PORT_SHIFT | 5 ),
|
||||
PTD6 = (3 << GPIO_PORT_SHIFT | 6 ),
|
||||
PTD7 = (3 << GPIO_PORT_SHIFT | 7 ),
|
||||
PTD8 = (3 << GPIO_PORT_SHIFT | 8 ),
|
||||
PTD9 = (3 << GPIO_PORT_SHIFT | 9 ),
|
||||
PTD10 = (3 << GPIO_PORT_SHIFT | 10),
|
||||
PTD11 = (3 << GPIO_PORT_SHIFT | 11),
|
||||
PTD12 = (3 << GPIO_PORT_SHIFT | 12),
|
||||
PTD13 = (3 << GPIO_PORT_SHIFT | 13),
|
||||
PTD14 = (3 << GPIO_PORT_SHIFT | 14),
|
||||
PTD15 = (3 << GPIO_PORT_SHIFT | 15),
|
||||
PTD16 = (3 << GPIO_PORT_SHIFT | 16),
|
||||
PTD17 = (3 << GPIO_PORT_SHIFT | 17),
|
||||
PTD18 = (3 << GPIO_PORT_SHIFT | 18),
|
||||
PTD19 = (3 << GPIO_PORT_SHIFT | 19),
|
||||
PTD20 = (3 << GPIO_PORT_SHIFT | 20),
|
||||
PTD21 = (3 << GPIO_PORT_SHIFT | 21),
|
||||
PTD22 = (3 << GPIO_PORT_SHIFT | 22),
|
||||
PTD23 = (3 << GPIO_PORT_SHIFT | 23),
|
||||
PTD24 = (3 << GPIO_PORT_SHIFT | 24),
|
||||
PTD25 = (3 << GPIO_PORT_SHIFT | 25),
|
||||
PTD26 = (3 << GPIO_PORT_SHIFT | 26),
|
||||
PTD27 = (3 << GPIO_PORT_SHIFT | 27),
|
||||
PTD28 = (3 << GPIO_PORT_SHIFT | 28),
|
||||
PTD29 = (3 << GPIO_PORT_SHIFT | 29),
|
||||
PTD30 = (3 << GPIO_PORT_SHIFT | 30),
|
||||
PTD31 = (3 << GPIO_PORT_SHIFT | 31),
|
||||
PTE0 = (4 << GPIO_PORT_SHIFT | 0 ),
|
||||
PTE1 = (4 << GPIO_PORT_SHIFT | 1 ),
|
||||
PTE2 = (4 << GPIO_PORT_SHIFT | 2 ),
|
||||
PTE3 = (4 << GPIO_PORT_SHIFT | 3 ),
|
||||
PTE4 = (4 << GPIO_PORT_SHIFT | 4 ),
|
||||
PTE5 = (4 << GPIO_PORT_SHIFT | 5 ),
|
||||
PTE6 = (4 << GPIO_PORT_SHIFT | 6 ),
|
||||
PTE7 = (4 << GPIO_PORT_SHIFT | 7 ),
|
||||
PTE8 = (4 << GPIO_PORT_SHIFT | 8 ),
|
||||
PTE9 = (4 << GPIO_PORT_SHIFT | 9 ),
|
||||
PTE10 = (4 << GPIO_PORT_SHIFT | 10),
|
||||
PTE11 = (4 << GPIO_PORT_SHIFT | 11),
|
||||
PTE12 = (4 << GPIO_PORT_SHIFT | 12),
|
||||
PTE13 = (4 << GPIO_PORT_SHIFT | 13),
|
||||
PTE14 = (4 << GPIO_PORT_SHIFT | 14),
|
||||
PTE15 = (4 << GPIO_PORT_SHIFT | 15),
|
||||
PTE16 = (4 << GPIO_PORT_SHIFT | 16),
|
||||
PTE17 = (4 << GPIO_PORT_SHIFT | 17),
|
||||
PTE18 = (4 << GPIO_PORT_SHIFT | 18),
|
||||
PTE19 = (4 << GPIO_PORT_SHIFT | 19),
|
||||
PTE20 = (4 << GPIO_PORT_SHIFT | 20),
|
||||
PTE21 = (4 << GPIO_PORT_SHIFT | 21),
|
||||
PTE22 = (4 << GPIO_PORT_SHIFT | 22),
|
||||
PTE23 = (4 << GPIO_PORT_SHIFT | 23),
|
||||
PTE24 = (4 << GPIO_PORT_SHIFT | 24),
|
||||
PTE25 = (4 << GPIO_PORT_SHIFT | 25),
|
||||
PTE26 = (4 << GPIO_PORT_SHIFT | 26),
|
||||
PTE27 = (4 << GPIO_PORT_SHIFT | 27),
|
||||
PTE28 = (4 << GPIO_PORT_SHIFT | 28),
|
||||
PTE29 = (4 << GPIO_PORT_SHIFT | 29),
|
||||
PTE30 = (4 << GPIO_PORT_SHIFT | 30),
|
||||
PTE31 = (4 << GPIO_PORT_SHIFT | 31),
|
||||
|
||||
// mbed original LED naming
|
||||
//LED1 = LED_RED,
|
||||
//LED2 = LED_GREEN,
|
||||
//LED3 = LED_BLUE,
|
||||
//LED4 = LED_RED,
|
||||
|
||||
//Push buttons
|
||||
//SW2 = PTC6,
|
||||
//SW3 = PTA4,
|
||||
|
||||
// USB Pins
|
||||
USBTX = PTB17,
|
||||
USBRX = PTB16,
|
||||
|
||||
DAC0_OUT = 0xFEFE, /* DAC does not have Pin Name in RM */
|
||||
|
||||
// Not connected
|
||||
NC = (int)0xFFFFFFFF
|
||||
} PinName;
|
||||
|
||||
|
||||
typedef enum {
|
||||
PullNone = 0,
|
||||
PullDown = 1,
|
||||
PullUp = 2,
|
||||
PullDefault = PullUp
|
||||
} PinMode;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
|
@ -0,0 +1,58 @@
|
|||
/* mbed Microcontroller Library
|
||||
* Copyright (c) 2006-2013 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#ifndef MBED_DEVICE_H
|
||||
#define MBED_DEVICE_H
|
||||
|
||||
#define DEVICE_PORTIN 0
|
||||
#define DEVICE_PORTOUT 0
|
||||
#define DEVICE_PORTINOUT 0
|
||||
|
||||
#define DEVICE_INTERRUPTIN 0
|
||||
|
||||
#define DEVICE_ANALOGIN 0
|
||||
#define DEVICE_ANALOGOUT 0
|
||||
|
||||
#define DEVICE_SERIAL 0
|
||||
|
||||
#define DEVICE_I2C 0
|
||||
#define DEVICE_I2CSLAVE 0
|
||||
|
||||
#define DEVICE_SPI 0
|
||||
#define DEVICE_SPISLAVE 0
|
||||
|
||||
#define DEVICE_CAN 0
|
||||
|
||||
#define DEVICE_RTC 0
|
||||
|
||||
#define DEVICE_ETHERNET 0
|
||||
|
||||
#define DEVICE_PWMOUT 0
|
||||
|
||||
#define DEVICE_SEMIHOST 0
|
||||
#define DEVICE_LOCALFILESYSTEM 0
|
||||
#define DEVICE_ID_LENGTH 24
|
||||
|
||||
#define DEVICE_SLEEP 0
|
||||
|
||||
#define DEVICE_DEBUG_AWARENESS 0
|
||||
|
||||
#define DEVICE_STDIO_MESSAGES 0
|
||||
|
||||
#define DEVICE_ERROR_RED 0
|
||||
|
||||
#include "objects.h"
|
||||
|
||||
#endif
|
|
@ -0,0 +1,23 @@
|
|||
/* mbed Microcontroller Library
|
||||
* Copyright (c) 2006-2013 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#include "gpio_api.h"
|
||||
|
||||
// called before main - implement here if board needs it ortherwise, let
|
||||
// the application override this if necessary
|
||||
//void mbed_sdk_init()
|
||||
//{
|
||||
//
|
||||
//}
|
|
@ -21,32 +21,10 @@
|
|||
#include "PeripheralNames.h"
|
||||
#include "fsl_adc_hal.h"
|
||||
#include "fsl_clock_manager.h"
|
||||
#include "PeripheralPins.h"
|
||||
|
||||
#define MAX_FADC 6000000
|
||||
|
||||
static const PinMap PinMap_ADC[] = {
|
||||
{PTC2, ADC0_SE4b, 0},
|
||||
{PTC8, ADC1_SE4b, 0},
|
||||
{PTC9, ADC1_SE5b, 0},
|
||||
{PTD1, ADC0_SE5b, 0},
|
||||
{PTC10, ADC1_SE6b, 0},
|
||||
{PTD5, ADC0_SE6b, 0},
|
||||
{PTC11, ADC1_SE7b, 0},
|
||||
{PTD6, ADC0_SE7b, 0},
|
||||
{PTB0 , ADC0_SE8 , 0},
|
||||
{PTB1 , ADC0_SE9 , 0},
|
||||
{PTB2 , ADC0_SE12, 0},
|
||||
{PTB3 , ADC0_SE13, 0},
|
||||
{PTC0 , ADC0_SE14, 0},
|
||||
{PTB10, ADC1_SE14, 0},
|
||||
{PTB11, ADC1_SE15, 0},
|
||||
{PTC1 , ADC0_SE15, 0},
|
||||
{PTA17, ADC1_SE17, 0},
|
||||
//{PTE24, ADC0_SE17, 0}, //I2C pull up
|
||||
//{PTE25, ADC0_SE18, 0}, //I2C pull up
|
||||
{NC , NC , 0}
|
||||
};
|
||||
|
||||
void analogin_init(analogin_t *obj, PinName pin) {
|
||||
obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
|
||||
MBED_ASSERT(obj->adc != (ADCName)NC);
|
||||
|
|
|
@ -18,14 +18,10 @@
|
|||
#include "cmsis.h"
|
||||
#include "pinmap.h"
|
||||
#include "error.h"
|
||||
#include "PeripheralPins.h"
|
||||
|
||||
#define RANGE_12BIT 0xFFF
|
||||
|
||||
const PinMap PinMap_DAC[] = {
|
||||
{DAC0_OUT, DAC_0, 0},
|
||||
{NC , NC , 0}
|
||||
};
|
||||
|
||||
void analogout_init(dac_t *obj, PinName pin) {
|
||||
obj->dac = (DACName)pinmap_peripheral(pin, PinMap_DAC);
|
||||
if (obj->dac == (DACName)NC) {
|
||||
|
|
|
@ -22,29 +22,7 @@
|
|||
#include "fsl_i2c_hal.h"
|
||||
#include "fsl_port_hal.h"
|
||||
#include "fsl_sim_hal.h"
|
||||
|
||||
static const PinMap PinMap_I2C_SDA[] = {
|
||||
{PTE25, I2C_0, 5},
|
||||
{PTB1 , I2C_0, 2},
|
||||
{PTB3 , I2C_0, 2},
|
||||
{PTC11, I2C_1, 2},
|
||||
{PTA13, I2C_2, 5},
|
||||
{PTD3 , I2C_0, 7},
|
||||
{PTE0 , I2C_1, 6},
|
||||
{NC , NC , 0}
|
||||
};
|
||||
|
||||
static const PinMap PinMap_I2C_SCL[] = {
|
||||
{PTE24, I2C_0, 5},
|
||||
{PTB0 , I2C_0, 2},
|
||||
{PTB2 , I2C_0, 2},
|
||||
{PTC10, I2C_1, 2},
|
||||
{PTA12, I2C_2, 5},
|
||||
{PTA14, I2C_2, 5},
|
||||
{PTD2 , I2C_0, 7},
|
||||
{PTE1 , I2C_1, 6},
|
||||
{NC , NC , 0}
|
||||
};
|
||||
#include "PeripheralPins.h"
|
||||
|
||||
void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
|
||||
uint32_t i2c_sda = pinmap_peripheral(sda, PinMap_I2C_SDA);
|
||||
|
|
|
@ -21,53 +21,7 @@
|
|||
#include "fsl_ftm_hal.h"
|
||||
#include "fsl_mcg_hal.h"
|
||||
#include "fsl_clock_manager.h"
|
||||
|
||||
static const PinMap PinMap_PWM[] = {
|
||||
{PTA0 , PWM_6 , 3},
|
||||
{PTA1 , PWM_7 , 3},
|
||||
{PTA2 , PWM_8 , 3},
|
||||
{PTA3 , PWM_1 , 3},
|
||||
{PTA4 , PWM_2 , 3},
|
||||
{PTA5 , PWM_3 , 3},
|
||||
{PTA6 , PWM_4 , 3},
|
||||
{PTA7 , PWM_5 , 3},
|
||||
{PTA8 , PWM_9 , 3},
|
||||
{PTA9 , PWM_10, 3},
|
||||
{PTA10, PWM_17, 3},
|
||||
{PTA11, PWM_18, 3},
|
||||
{PTA12, PWM_9 , 3},
|
||||
{PTA13, PWM_10, 3},
|
||||
|
||||
{PTB0 , PWM_9 , 3},
|
||||
{PTB1 , PWM_10, 3},
|
||||
{PTB18, PWM_17, 3},
|
||||
{PTB19, PWM_18, 3},
|
||||
|
||||
{PTC1 , PWM_1 , 4},
|
||||
{PTC2 , PWM_2 , 4},
|
||||
{PTC3 , PWM_3 , 4},
|
||||
{PTC4 , PWM_4 , 4},
|
||||
{PTC5 , PWM_3 , 7},
|
||||
{PTC8 , PWM_29, 3},
|
||||
{PTC9 , PWM_30, 3},
|
||||
{PTC10, PWM_31, 3},
|
||||
{PTC11, PWM_32, 3},
|
||||
|
||||
{PTD0 , PWM_25, 4},
|
||||
{PTD1 , PWM_26, 4},
|
||||
{PTD2 , PWM_27, 4},
|
||||
{PTD3 , PWM_28, 4},
|
||||
{PTD4 , PWM_5 , 4},
|
||||
{PTD5 , PWM_6 , 4},
|
||||
{PTD6 , PWM_7 , 4},
|
||||
{PTD4 , PWM_5 , 4},
|
||||
{PTD7 , PWM_8 , 4},
|
||||
|
||||
{PTE5 , PWM_25, 6},
|
||||
{PTE6 , PWM_26, 6},
|
||||
|
||||
{NC , NC , 0}
|
||||
};
|
||||
#include "PeripheralPins.h"
|
||||
|
||||
static float pwm_clock_mhz;
|
||||
|
||||
|
|
|
@ -17,10 +17,7 @@
|
|||
#include "pinmap.h"
|
||||
#include "fsl_rtc_hal.h"
|
||||
#include "fsl_clock_manager.h"
|
||||
|
||||
const PinMap PinMap_RTC[] = {
|
||||
{NC, OSC32KCLK, 0},
|
||||
};
|
||||
#include "PeripheralPins.h"
|
||||
|
||||
void rtc_init(void) {
|
||||
rtc_hal_init_config_t hal_config = {0};
|
||||
|
|
|
@ -26,41 +26,12 @@
|
|||
#include "fsl_uart_hal.h"
|
||||
#include "fsl_clock_manager.h"
|
||||
#include "fsl_uart_features.h"
|
||||
#include "PeripheralPins.h"
|
||||
|
||||
/* TODO:
|
||||
putchar/getchar 9 and 10 bits support
|
||||
*/
|
||||
|
||||
static const PinMap PinMap_UART_TX[] = {
|
||||
{PTB17, UART_0, 3},
|
||||
{PTC17, UART_3, 3},
|
||||
{PTD7 , UART_0, 3},
|
||||
{PTD3 , UART_2, 3},
|
||||
{PTC4 , UART_1, 3},
|
||||
{PTC15, UART_4, 3},
|
||||
{PTB11, UART_3, 3},
|
||||
{PTA14, UART_0, 3},
|
||||
{PTE24, UART_4, 3},
|
||||
{PTE4 , UART_3, 3},
|
||||
{PTE0, UART_1, 3},
|
||||
{NC , NC , 0}
|
||||
};
|
||||
|
||||
static const PinMap PinMap_UART_RX[] = {
|
||||
{PTB16, UART_0, 3},
|
||||
{PTE1 , UART_1, 3},
|
||||
{PTE5 , UART_3, 3},
|
||||
{PTE25, UART_4, 3},
|
||||
{PTA15, UART_0, 3},
|
||||
{PTC16, UART_3, 3},
|
||||
{PTB10, UART_3, 3},
|
||||
{PTC3 , UART_1, 3},
|
||||
{PTC14, UART_4, 3},
|
||||
{PTD2 , UART_2, 3},
|
||||
{PTC6 , UART_0, 3},
|
||||
{NC , NC , 0}
|
||||
};
|
||||
|
||||
#define UART_NUM 4
|
||||
|
||||
static uint32_t serial_irq_ids[UART_NUM] = {0};
|
||||
|
|
|
@ -22,52 +22,7 @@
|
|||
#include "error.h"
|
||||
#include "fsl_clock_manager.h"
|
||||
#include "fsl_dspi_hal.h"
|
||||
|
||||
static const PinMap PinMap_SPI_SCLK[] = {
|
||||
{PTD1 , SPI_0, 2},
|
||||
{PTE2 , SPI_1, 2},
|
||||
{PTA15, SPI_0, 2},
|
||||
{PTB11, SPI_1, 2},
|
||||
{PTB21, SPI_2, 2},
|
||||
{PTC5 , SPI_0, 2},
|
||||
{PTD5 , SPI_1, 7},
|
||||
{NC , NC , 0}
|
||||
};
|
||||
|
||||
static const PinMap PinMap_SPI_MOSI[] = {
|
||||
{PTD2 , SPI_0, 2},
|
||||
{PTE1 , SPI_1, 2},
|
||||
{PTE3 , SPI_1, 7},
|
||||
{PTA16, SPI_0, 2},
|
||||
{PTB16, SPI_1, 2},
|
||||
{PTB22, SPI_2, 2},
|
||||
{PTC6 , SPI_0, 2},
|
||||
{PTD6 , SPI_1, 7},
|
||||
{NC , NC , 0}
|
||||
};
|
||||
|
||||
static const PinMap PinMap_SPI_MISO[] = {
|
||||
{PTD3 , SPI_0, 2},
|
||||
{PTE1 , SPI_1, 7},
|
||||
{PTE3 , SPI_1, 2},
|
||||
{PTA17, SPI_0, 2},
|
||||
{PTB17, SPI_1, 2},
|
||||
{PTB23, SPI_2, 2},
|
||||
{PTC7 , SPI_0, 2},
|
||||
{PTD7 , SPI_1, 7},
|
||||
{NC , NC , 0}
|
||||
};
|
||||
|
||||
static const PinMap PinMap_SPI_SSEL[] = {
|
||||
{PTD0 , SPI_0, 2},
|
||||
{PTE4 , SPI_1, 2},
|
||||
{PTA14, SPI_0, 2},
|
||||
{PTB10, SPI_1, 2},
|
||||
{PTB20, SPI_2, 2},
|
||||
{PTC4 , SPI_0, 2},
|
||||
{PTD4 , SPI_1, 7},
|
||||
{NC , NC , 0}
|
||||
};
|
||||
#include "PeripheralPins.h"
|
||||
|
||||
static void spi_set_delays(uint32_t instance) {
|
||||
dspi_delay_settings_config_t delay_config;
|
||||
|
|
|
@ -0,0 +1,94 @@
|
|||
/* mbed Microcontroller Library
|
||||
* Copyright (c) 2006-2013 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#include "mbed_assert.h"
|
||||
#include "analogin_api.h"
|
||||
|
||||
#include "cmsis.h"
|
||||
#include "pinmap.h"
|
||||
#include "PeripheralNames.h"
|
||||
#include "fsl_adc_hal.h"
|
||||
#include "fsl_clock_manager.h"
|
||||
|
||||
#define MAX_FADC 6000000
|
||||
|
||||
static const PinMap PinMap_ADC[] = {
|
||||
{PTC2, ADC0_SE4b, 0},
|
||||
{PTC8, ADC1_SE4b, 0},
|
||||
{PTC9, ADC1_SE5b, 0},
|
||||
{PTD1, ADC0_SE5b, 0},
|
||||
{PTC10, ADC1_SE6b, 0},
|
||||
{PTD5, ADC0_SE6b, 0},
|
||||
{PTC11, ADC1_SE7b, 0},
|
||||
{PTD6, ADC0_SE7b, 0},
|
||||
{PTB0 , ADC0_SE8 , 0},
|
||||
{PTB1 , ADC0_SE9 , 0},
|
||||
{PTB2 , ADC0_SE12, 0},
|
||||
{PTB3 , ADC0_SE13, 0},
|
||||
{PTC0 , ADC0_SE14, 0},
|
||||
{PTB10, ADC1_SE14, 0},
|
||||
{PTB11, ADC1_SE15, 0},
|
||||
{PTC1 , ADC0_SE15, 0},
|
||||
{PTA17, ADC1_SE17, 0},
|
||||
//{PTE24, ADC0_SE17, 0}, //I2C pull up
|
||||
//{PTE25, ADC0_SE18, 0}, //I2C pull up
|
||||
{NC , NC , 0}
|
||||
};
|
||||
|
||||
void analogin_init(analogin_t *obj, PinName pin) {
|
||||
obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
|
||||
MBED_ASSERT(obj->adc != (ADCName)NC);
|
||||
|
||||
uint32_t instance = obj->adc >> ADC_INSTANCE_SHIFT;
|
||||
|
||||
clock_manager_set_gate(kClockModuleADC, instance, true);
|
||||
|
||||
uint32_t bus_clock;
|
||||
clock_manager_get_frequency(kBusClock, &bus_clock);
|
||||
uint32_t clkdiv;
|
||||
for (clkdiv = 0; clkdiv < 4; clkdiv++) {
|
||||
if ((bus_clock >> clkdiv) <= MAX_FADC)
|
||||
break;
|
||||
}
|
||||
if (clkdiv == 4) {
|
||||
clkdiv = 0x7; //Set max div
|
||||
}
|
||||
/* adc is enabled/triggered when reading. */
|
||||
adc_hal_set_clock_source_mode(instance, (adc_clock_source_mode_t)(clkdiv >> 2));
|
||||
adc_hal_set_clock_divider_mode(instance, (adc_clock_divider_mode_t)(clkdiv & 0x3));
|
||||
adc_hal_set_reference_voltage_mode(instance, kAdcVoltageVref);
|
||||
adc_hal_set_resolution_mode(instance, kAdcSingleDiff16);
|
||||
adc_hal_configure_continuous_conversion(instance, false);
|
||||
adc_hal_configure_hw_trigger(instance, false); /* sw trigger */
|
||||
adc_hal_configure_hw_average(instance, true);
|
||||
adc_hal_set_hw_average_mode(instance, kAdcHwAverageCount4);
|
||||
adc_hal_set_group_mux(instance, kAdcChannelMuxB); /* only B channels are avail */
|
||||
|
||||
pinmap_pinout(pin, PinMap_ADC);
|
||||
}
|
||||
|
||||
uint16_t analogin_read_u16(analogin_t *obj) {
|
||||
uint32_t instance = obj->adc >> ADC_INSTANCE_SHIFT;
|
||||
/* sw trigger (SC1A) */
|
||||
adc_hal_enable(instance, 0, (adc_channel_mode_t)(obj->adc & 0xF), false);
|
||||
while (!adc_hal_is_conversion_completed(instance, 0));
|
||||
return adc_hal_get_conversion_value(instance, 0);
|
||||
}
|
||||
|
||||
float analogin_read(analogin_t *obj) {
|
||||
uint16_t value = analogin_read_u16(obj);
|
||||
return (float)value * (1.0f / (float)0xFFFF);
|
||||
}
|
||||
|
|
@ -0,0 +1,82 @@
|
|||
/* mbed Microcontroller Library
|
||||
* Copyright (c) 2006-2013 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#include "analogout_api.h"
|
||||
|
||||
#include "cmsis.h"
|
||||
#include "pinmap.h"
|
||||
#include "error.h"
|
||||
|
||||
#define RANGE_12BIT 0xFFF
|
||||
|
||||
const PinMap PinMap_DAC[] = {
|
||||
{DAC0_OUT, DAC_0, 0},
|
||||
{NC , NC , 0}
|
||||
};
|
||||
|
||||
void analogout_init(dac_t *obj, PinName pin) {
|
||||
obj->dac = (DACName)pinmap_peripheral(pin, PinMap_DAC);
|
||||
if (obj->dac == (DACName)NC) {
|
||||
error("DAC pin mapping failed");
|
||||
}
|
||||
|
||||
SIM->SCGC2 |= SIM_SCGC2_DAC0_MASK;
|
||||
|
||||
DAC0->DAT[obj->dac].DATH = 0;
|
||||
DAC0->DAT[obj->dac].DATL = 0;
|
||||
|
||||
DAC0->C1 = DAC_C1_DACBFMD(2); // One-Time Scan Mode
|
||||
|
||||
DAC0->C0 = DAC_C0_DACEN_MASK // Enable
|
||||
| DAC_C0_DACSWTRG_MASK // Software Trigger
|
||||
| DAC_C0_DACRFS_MASK; // VDDA selected
|
||||
|
||||
analogout_write_u16(obj, 0);
|
||||
}
|
||||
|
||||
void analogout_free(dac_t *obj) {}
|
||||
|
||||
static inline void dac_write(dac_t *obj, int value) {
|
||||
DAC0->DAT[obj->dac].DATL = (uint8_t)( value & 0xFF);
|
||||
DAC0->DAT[obj->dac].DATH = (uint8_t)((value >> 8) & 0xFF);
|
||||
}
|
||||
|
||||
static inline int dac_read(dac_t *obj) {
|
||||
return ((DAC0->DAT[obj->dac].DATH << 8) | DAC0->DAT[obj->dac].DATL);
|
||||
}
|
||||
|
||||
void analogout_write(dac_t *obj, float value) {
|
||||
if (value < 0.0f) {
|
||||
dac_write(obj, 0);
|
||||
} else if (value > 1.0f) {
|
||||
dac_write(obj, RANGE_12BIT);
|
||||
} else {
|
||||
dac_write(obj, value * (float)RANGE_12BIT);
|
||||
}
|
||||
}
|
||||
|
||||
void analogout_write_u16(dac_t *obj, uint16_t value) {
|
||||
dac_write(obj, value >> 4); // 12-bit
|
||||
}
|
||||
|
||||
float analogout_read(dac_t *obj) {
|
||||
uint32_t value = dac_read(obj);
|
||||
return (float)value * (1.0f / (float)RANGE_12BIT);
|
||||
}
|
||||
|
||||
uint16_t analogout_read_u16(dac_t *obj) {
|
||||
uint32_t value = dac_read(obj); // 12-bit
|
||||
return (value << 4) | ((value >> 8) & 0x003F);
|
||||
}
|
|
@ -0,0 +1,58 @@
|
|||
/* mbed Microcontroller Library
|
||||
* Copyright (c) 2006-2013 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#ifndef MBED_DEVICE_H
|
||||
#define MBED_DEVICE_H
|
||||
|
||||
#define DEVICE_PORTIN 1
|
||||
#define DEVICE_PORTOUT 1
|
||||
#define DEVICE_PORTINOUT 1
|
||||
|
||||
#define DEVICE_INTERRUPTIN 1
|
||||
|
||||
#define DEVICE_ANALOGIN 1
|
||||
#define DEVICE_ANALOGOUT 1
|
||||
|
||||
#define DEVICE_SERIAL 1
|
||||
|
||||
#define DEVICE_I2C 1
|
||||
#define DEVICE_I2CSLAVE 1
|
||||
|
||||
#define DEVICE_SPI 1
|
||||
#define DEVICE_SPISLAVE 1
|
||||
|
||||
#define DEVICE_CAN 0
|
||||
|
||||
#define DEVICE_RTC 1
|
||||
|
||||
#define DEVICE_ETHERNET 0
|
||||
|
||||
#define DEVICE_PWMOUT 1
|
||||
|
||||
#define DEVICE_SEMIHOST 0
|
||||
#define DEVICE_LOCALFILESYSTEM 0
|
||||
#define DEVICE_ID_LENGTH 24
|
||||
|
||||
#define DEVICE_SLEEP 1
|
||||
|
||||
#define DEVICE_DEBUG_AWARENESS 0
|
||||
|
||||
#define DEVICE_STDIO_MESSAGES 1
|
||||
|
||||
#define DEVICE_ERROR_RED 1
|
||||
|
||||
#include "objects.h"
|
||||
|
||||
#endif
|
|
@ -0,0 +1,59 @@
|
|||
/* mbed Microcontroller Library
|
||||
* Copyright (c) 2006-2013 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#include "mbed_assert.h"
|
||||
#include "gpio_api.h"
|
||||
#include "pinmap.h"
|
||||
#include "fsl_port_hal.h"
|
||||
#include "fsl_gpio_hal.h"
|
||||
#include "fsl_sim_hal.h"
|
||||
|
||||
uint32_t gpio_set(PinName pin) {
|
||||
MBED_ASSERT(pin != (PinName)NC);
|
||||
uint32_t pin_num = pin & 0xFF;
|
||||
|
||||
pin_function(pin, (int)kPortMuxAsGpio);
|
||||
return 1 << pin_num;
|
||||
}
|
||||
|
||||
void gpio_init(gpio_t *obj, PinName pin) {
|
||||
obj->pinName = pin;
|
||||
if (pin == (PinName)NC)
|
||||
return;
|
||||
|
||||
uint32_t port = pin >> GPIO_PORT_SHIFT;
|
||||
uint32_t pin_num = pin & 0xFF;
|
||||
clock_hal_set_gate(kSimClockModulePORT, port, true);
|
||||
port_hal_mux_control(port, pin_num, kPortMuxAsGpio);
|
||||
}
|
||||
|
||||
void gpio_mode(gpio_t *obj, PinMode mode) {
|
||||
pin_mode(obj->pinName, mode);
|
||||
}
|
||||
|
||||
void gpio_dir(gpio_t *obj, PinDirection direction) {
|
||||
MBED_ASSERT(obj->pinName != (PinName)NC);
|
||||
uint32_t port = obj->pinName >> GPIO_PORT_SHIFT;
|
||||
uint32_t pin_num = obj->pinName & 0xFF;
|
||||
|
||||
switch (direction) {
|
||||
case PIN_INPUT:
|
||||
gpio_hal_set_pin_direction(port, pin_num, kGpioDigitalInput);
|
||||
break;
|
||||
case PIN_OUTPUT:
|
||||
gpio_hal_set_pin_direction(port, pin_num, kGpioDigitalOutput);
|
||||
break;
|
||||
}
|
||||
}
|
|
@ -0,0 +1,207 @@
|
|||
/* mbed Microcontroller Library
|
||||
* Copyright (c) 2006-2013 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#include <stddef.h>
|
||||
#include "cmsis.h"
|
||||
|
||||
#include "gpio_irq_api.h"
|
||||
#include "gpio_api.h"
|
||||
#include "fsl_gpio_hal.h"
|
||||
#include "fsl_port_hal.h"
|
||||
#include "error.h"
|
||||
|
||||
#define CHANNEL_NUM 160
|
||||
|
||||
static uint32_t channel_ids[CHANNEL_NUM] = {0};
|
||||
static gpio_irq_handler irq_handler;
|
||||
|
||||
#define IRQ_DISABLED (0)
|
||||
#define IRQ_RAISING_EDGE (9)
|
||||
#define IRQ_FALLING_EDGE (10)
|
||||
#define IRQ_EITHER_EDGE (11)
|
||||
|
||||
static void handle_interrupt_in(PortName port, int ch_base) {
|
||||
uint32_t i;
|
||||
|
||||
for (i = 0; i < 32; i++) {
|
||||
if (port_hal_read_pin_interrupt_flag(port, i)) {
|
||||
uint32_t id = channel_ids[ch_base + i];
|
||||
if (id == 0) {
|
||||
continue;
|
||||
}
|
||||
|
||||
gpio_irq_event event = IRQ_NONE;
|
||||
switch (BR_PORT_PCRn_IRQC(port, i)) {
|
||||
case IRQ_RAISING_EDGE:
|
||||
event = IRQ_RISE;
|
||||
break;
|
||||
|
||||
case IRQ_FALLING_EDGE:
|
||||
event = IRQ_FALL;
|
||||
break;
|
||||
|
||||
case IRQ_EITHER_EDGE:
|
||||
event = (gpio_hal_read_pin_input(port, i)) ? (IRQ_RISE) : (IRQ_FALL);
|
||||
break;
|
||||
}
|
||||
if (event != IRQ_NONE) {
|
||||
irq_handler(id, event);
|
||||
}
|
||||
}
|
||||
}
|
||||
port_hal_clear_port_interrupt_flag(port);
|
||||
}
|
||||
|
||||
void gpio_irqA(void) {handle_interrupt_in(PortA, 0);}
|
||||
void gpio_irqB(void) {handle_interrupt_in(PortB, 32);}
|
||||
void gpio_irqC(void) {handle_interrupt_in(PortC, 64);}
|
||||
void gpio_irqD(void) {handle_interrupt_in(PortD, 96);}
|
||||
void gpio_irqE(void) {handle_interrupt_in(PortE, 128);}
|
||||
|
||||
int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) {
|
||||
if (pin == NC) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
irq_handler = handler;
|
||||
obj->port = pin >> GPIO_PORT_SHIFT;
|
||||
obj->pin = pin & 0x7F;
|
||||
|
||||
uint32_t ch_base, vector;
|
||||
IRQn_Type irq_n;
|
||||
switch (obj->port) {
|
||||
case PortA:
|
||||
ch_base = 0;
|
||||
irq_n = PORTA_IRQn;
|
||||
vector = (uint32_t)gpio_irqA;
|
||||
break;
|
||||
case PortB:
|
||||
ch_base = 32;
|
||||
irq_n = PORTB_IRQn;
|
||||
vector = (uint32_t)gpio_irqB;
|
||||
break;
|
||||
case PortC:
|
||||
ch_base = 64;
|
||||
irq_n = PORTC_IRQn;
|
||||
vector = (uint32_t)gpio_irqC;
|
||||
break;
|
||||
case PortD:
|
||||
ch_base = 96;
|
||||
irq_n = PORTD_IRQn;
|
||||
vector = (uint32_t)gpio_irqD;
|
||||
break;
|
||||
case PortE:
|
||||
ch_base = 128;
|
||||
irq_n = PORTE_IRQn;
|
||||
vector = (uint32_t)gpio_irqE;
|
||||
break;
|
||||
|
||||
default:
|
||||
error("gpio_irq only supported on port A-E.");
|
||||
break;
|
||||
}
|
||||
NVIC_SetVector(irq_n, vector);
|
||||
NVIC_EnableIRQ(irq_n);
|
||||
|
||||
obj->ch = ch_base + obj->pin;
|
||||
channel_ids[obj->ch] = id;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void gpio_irq_free(gpio_irq_t *obj) {
|
||||
channel_ids[obj->ch] = 0;
|
||||
}
|
||||
|
||||
void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) {
|
||||
port_interrupt_config_t irq_settings = kPortIntDisabled;
|
||||
|
||||
switch (BR_PORT_PCRn_IRQC(obj->port, obj->pin)) {
|
||||
case IRQ_DISABLED:
|
||||
if (enable)
|
||||
irq_settings = (event == IRQ_RISE) ? (kPortIntRisingEdge) : (kPortIntFallingEdge);
|
||||
break;
|
||||
|
||||
case IRQ_RAISING_EDGE:
|
||||
if (enable) {
|
||||
irq_settings = (event == IRQ_RISE) ? (kPortIntRisingEdge) : (kPortIntEitherEdge);
|
||||
} else {
|
||||
if (event == IRQ_FALL)
|
||||
irq_settings = kPortIntRisingEdge;
|
||||
}
|
||||
break;
|
||||
|
||||
case IRQ_FALLING_EDGE:
|
||||
if (enable) {
|
||||
irq_settings = (event == IRQ_FALL) ? (kPortIntFallingEdge) : (kPortIntEitherEdge);
|
||||
} else {
|
||||
if (event == IRQ_RISE)
|
||||
irq_settings = kPortIntFallingEdge;
|
||||
}
|
||||
break;
|
||||
|
||||
case IRQ_EITHER_EDGE:
|
||||
if (enable) {
|
||||
irq_settings = kPortIntEitherEdge;
|
||||
} else {
|
||||
irq_settings = (event == IRQ_RISE) ? (kPortIntFallingEdge) : (kPortIntRisingEdge);
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
port_hal_configure_pin_interrupt(obj->port, obj->pin, irq_settings);
|
||||
port_hal_clear_pin_interrupt_flag(obj->port, obj->pin);
|
||||
}
|
||||
|
||||
void gpio_irq_enable(gpio_irq_t *obj) {
|
||||
switch (obj->port) {
|
||||
case PortA:
|
||||
NVIC_EnableIRQ(PORTA_IRQn);
|
||||
break;
|
||||
case PortB:
|
||||
NVIC_EnableIRQ(PORTB_IRQn);
|
||||
break;
|
||||
case PortC:
|
||||
NVIC_EnableIRQ(PORTC_IRQn);
|
||||
break;
|
||||
case PortD:
|
||||
NVIC_EnableIRQ(PORTD_IRQn);
|
||||
break;
|
||||
case PortE:
|
||||
NVIC_EnableIRQ(PORTE_IRQn);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
void gpio_irq_disable(gpio_irq_t *obj) {
|
||||
switch (obj->port) {
|
||||
case PortA:
|
||||
NVIC_DisableIRQ(PORTA_IRQn);
|
||||
break;
|
||||
case PortB:
|
||||
NVIC_DisableIRQ(PORTB_IRQn);
|
||||
break;
|
||||
case PortC:
|
||||
NVIC_DisableIRQ(PORTC_IRQn);
|
||||
break;
|
||||
case PortD:
|
||||
NVIC_DisableIRQ(PORTD_IRQn);
|
||||
break;
|
||||
case PortE:
|
||||
NVIC_DisableIRQ(PORTE_IRQn);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,50 @@
|
|||
/* mbed Microcontroller Library
|
||||
* Copyright (c) 2006-2013 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#ifndef MBED_GPIO_OBJECT_H
|
||||
#define MBED_GPIO_OBJECT_H
|
||||
|
||||
#include "mbed_assert.h"
|
||||
#include "fsl_gpio_hal.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
typedef struct {
|
||||
PinName pinName;
|
||||
} gpio_t;
|
||||
|
||||
static inline void gpio_write(gpio_t *obj, int value) {
|
||||
MBED_ASSERT(obj->pinName != (PinName)NC);
|
||||
uint32_t port = obj->pinName >> GPIO_PORT_SHIFT;
|
||||
uint32_t pin = obj->pinName & 0xFF;
|
||||
|
||||
gpio_hal_write_pin_output(port, pin, value);
|
||||
}
|
||||
|
||||
static inline int gpio_read(gpio_t *obj) {
|
||||
MBED_ASSERT(obj->pinName != (PinName)NC);
|
||||
uint32_t port = obj->pinName >> GPIO_PORT_SHIFT;
|
||||
uint32_t pin = obj->pinName & 0xFF;
|
||||
|
||||
return (int)gpio_hal_read_pin_input(port, pin);
|
||||
}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
|
@ -0,0 +1,331 @@
|
|||
/* mbed Microcontroller Library
|
||||
* Copyright (c) 2006-2013 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#include "mbed_assert.h"
|
||||
#include "i2c_api.h"
|
||||
|
||||
#include "cmsis.h"
|
||||
#include "pinmap.h"
|
||||
#include "fsl_clock_manager.h"
|
||||
#include "fsl_i2c_hal.h"
|
||||
#include "fsl_port_hal.h"
|
||||
#include "fsl_sim_hal.h"
|
||||
|
||||
static const PinMap PinMap_I2C_SDA[] = {
|
||||
{PTE25, I2C_0, 5},
|
||||
{PTB1 , I2C_0, 2},
|
||||
{PTB3 , I2C_0, 2},
|
||||
{PTC11, I2C_1, 2},
|
||||
{PTA13, I2C_2, 5},
|
||||
{PTD3 , I2C_0, 7},
|
||||
{PTE0 , I2C_1, 6},
|
||||
{NC , NC , 0}
|
||||
};
|
||||
|
||||
static const PinMap PinMap_I2C_SCL[] = {
|
||||
{PTE24, I2C_0, 5},
|
||||
{PTB0 , I2C_0, 2},
|
||||
{PTB2 , I2C_0, 2},
|
||||
{PTC10, I2C_1, 2},
|
||||
{PTA12, I2C_2, 5},
|
||||
{PTA14, I2C_2, 5},
|
||||
{PTD2 , I2C_0, 7},
|
||||
{PTE1 , I2C_1, 6},
|
||||
{NC , NC , 0}
|
||||
};
|
||||
|
||||
void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
|
||||
uint32_t i2c_sda = pinmap_peripheral(sda, PinMap_I2C_SDA);
|
||||
uint32_t i2c_scl = pinmap_peripheral(scl, PinMap_I2C_SCL);
|
||||
obj->instance = pinmap_merge(i2c_sda, i2c_scl);
|
||||
MBED_ASSERT((int)obj->instance != NC);
|
||||
|
||||
clock_manager_set_gate(kClockModuleI2C, obj->instance, true);
|
||||
clock_manager_set_gate(kClockModulePORT, sda >> GPIO_PORT_SHIFT, true);
|
||||
clock_manager_set_gate(kClockModulePORT, scl >> GPIO_PORT_SHIFT, true);
|
||||
i2c_hal_enable(obj->instance);
|
||||
i2c_frequency(obj, 100000);
|
||||
|
||||
pinmap_pinout(sda, PinMap_I2C_SDA);
|
||||
pinmap_pinout(scl, PinMap_I2C_SCL);
|
||||
port_hal_configure_open_drain(sda >> GPIO_PORT_SHIFT, sda & 0xFF, true);
|
||||
port_hal_configure_open_drain(scl >> GPIO_PORT_SHIFT, scl & 0xFF, true);
|
||||
}
|
||||
|
||||
int i2c_start(i2c_t *obj) {
|
||||
i2c_hal_send_start(obj->instance);
|
||||
return 0;
|
||||
}
|
||||
|
||||
int i2c_stop(i2c_t *obj) {
|
||||
volatile uint32_t n = 0;
|
||||
i2c_hal_send_stop(obj->instance);
|
||||
|
||||
// It seems that there are timing problems
|
||||
// when there is no waiting time after a STOP.
|
||||
// This wait is also included on the samples
|
||||
// code provided with the freedom board
|
||||
for (n = 0; n < 200; n++) __NOP();
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int timeout_status_poll(i2c_t *obj, uint32_t mask) {
|
||||
uint32_t i, timeout = 100000;
|
||||
|
||||
for (i = 0; i < timeout; i++) {
|
||||
if (HW_I2C_S_RD(obj->instance) & mask)
|
||||
return 0;
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
|
||||
// this function waits the end of a tx transfer and return the status of the transaction:
|
||||
// 0: OK ack received
|
||||
// 1: OK ack not received
|
||||
// 2: failure
|
||||
static int i2c_wait_end_tx_transfer(i2c_t *obj) {
|
||||
// wait for the interrupt flag
|
||||
if (timeout_status_poll(obj, I2C_S_IICIF_MASK)) {
|
||||
return 2;
|
||||
}
|
||||
|
||||
i2c_hal_clear_interrupt(obj->instance);
|
||||
|
||||
// wait transfer complete
|
||||
if (timeout_status_poll(obj, I2C_S_TCF_MASK)) {
|
||||
return 2;
|
||||
}
|
||||
|
||||
// check if we received the ACK or not
|
||||
return i2c_hal_get_receive_ack(obj->instance) ? 0 : 1;
|
||||
}
|
||||
|
||||
// this function waits the end of a rx transfer and return the status of the transaction:
|
||||
// 0: OK
|
||||
// 1: failure
|
||||
static int i2c_wait_end_rx_transfer(i2c_t *obj) {
|
||||
// wait for the end of the rx transfer
|
||||
if (timeout_status_poll(obj, I2C_S_IICIF_MASK)) {
|
||||
return 1;
|
||||
}
|
||||
|
||||
i2c_hal_clear_interrupt(obj->instance);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int i2c_do_write(i2c_t *obj, int value) {
|
||||
i2c_hal_write(obj->instance, value);
|
||||
|
||||
// init and wait the end of the transfer
|
||||
return i2c_wait_end_tx_transfer(obj);
|
||||
}
|
||||
|
||||
static int i2c_do_read(i2c_t *obj, char * data, int last) {
|
||||
if (last) {
|
||||
i2c_hal_send_nak(obj->instance);
|
||||
} else {
|
||||
i2c_hal_send_ack(obj->instance);
|
||||
}
|
||||
|
||||
*data = (i2c_hal_read(obj->instance) & 0xFF);
|
||||
|
||||
// start rx transfer and wait the end of the transfer
|
||||
return i2c_wait_end_rx_transfer(obj);
|
||||
}
|
||||
|
||||
void i2c_frequency(i2c_t *obj, int hz) {
|
||||
uint32_t busClock;
|
||||
|
||||
clock_manager_error_code_t error = clock_manager_get_frequency(kBusClock, &busClock);
|
||||
if (error == kClockManagerSuccess) {
|
||||
i2c_hal_set_baud(obj->instance, busClock, hz / 1000, NULL);
|
||||
}
|
||||
}
|
||||
|
||||
int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
|
||||
int count;
|
||||
char dummy_read, *ptr;
|
||||
|
||||
if (i2c_start(obj)) {
|
||||
i2c_stop(obj);
|
||||
return I2C_ERROR_BUS_BUSY;
|
||||
}
|
||||
|
||||
if (i2c_do_write(obj, (address | 0x01))) {
|
||||
i2c_stop(obj);
|
||||
return I2C_ERROR_NO_SLAVE;
|
||||
}
|
||||
|
||||
// set rx mode
|
||||
i2c_hal_set_direction(obj->instance, kI2CReceive);
|
||||
|
||||
// Read in bytes
|
||||
for (count = 0; count < (length); count++) {
|
||||
ptr = (count == 0) ? &dummy_read : &data[count - 1];
|
||||
uint8_t stop_ = (count == (length - 1)) ? 1 : 0;
|
||||
if (i2c_do_read(obj, ptr, stop_)) {
|
||||
i2c_stop(obj);
|
||||
return count;
|
||||
}
|
||||
}
|
||||
|
||||
// If not repeated start, send stop.
|
||||
if (stop)
|
||||
i2c_stop(obj);
|
||||
|
||||
// last read
|
||||
data[count-1] = i2c_hal_read(obj->instance);
|
||||
|
||||
return length;
|
||||
}
|
||||
|
||||
int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
|
||||
int i;
|
||||
|
||||
if (i2c_start(obj)) {
|
||||
i2c_stop(obj);
|
||||
return I2C_ERROR_BUS_BUSY;
|
||||
}
|
||||
|
||||
if (i2c_do_write(obj, (address & 0xFE))) {
|
||||
i2c_stop(obj);
|
||||
return I2C_ERROR_NO_SLAVE;
|
||||
}
|
||||
|
||||
for (i = 0; i < length; i++) {
|
||||
if(i2c_do_write(obj, data[i])) {
|
||||
i2c_stop(obj);
|
||||
return i;
|
||||
}
|
||||
}
|
||||
|
||||
if (stop)
|
||||
i2c_stop(obj);
|
||||
|
||||
return length;
|
||||
}
|
||||
|
||||
void i2c_reset(i2c_t *obj) {
|
||||
i2c_stop(obj);
|
||||
}
|
||||
|
||||
int i2c_byte_read(i2c_t *obj, int last) {
|
||||
char data;
|
||||
|
||||
// set rx mode
|
||||
i2c_hal_set_direction(obj->instance, kI2CReceive);
|
||||
|
||||
// Setup read
|
||||
i2c_do_read(obj, &data, last);
|
||||
|
||||
// set tx mode
|
||||
i2c_hal_set_direction(obj->instance, kI2CTransmit);
|
||||
return i2c_hal_read(obj->instance);
|
||||
}
|
||||
|
||||
int i2c_byte_write(i2c_t *obj, int data) {
|
||||
// set tx mode
|
||||
i2c_hal_set_direction(obj->instance, kI2CTransmit);
|
||||
|
||||
return !i2c_do_write(obj, (data & 0xFF));
|
||||
}
|
||||
|
||||
|
||||
#if DEVICE_I2CSLAVE
|
||||
void i2c_slave_mode(i2c_t *obj, int enable_slave) {
|
||||
if (enable_slave) {
|
||||
// set slave mode
|
||||
BW_I2C_C1_MST(obj->instance, 0);
|
||||
i2c_hal_enable_interrupt(obj->instance);
|
||||
} else {
|
||||
// set master mode
|
||||
BW_I2C_C1_MST(obj->instance, 1);
|
||||
}
|
||||
}
|
||||
|
||||
int i2c_slave_receive(i2c_t *obj) {
|
||||
switch(HW_I2C_S_RD(obj->instance)) {
|
||||
// read addressed
|
||||
case 0xE6:
|
||||
return 1;
|
||||
// write addressed
|
||||
case 0xE2:
|
||||
return 3;
|
||||
default:
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
int i2c_slave_read(i2c_t *obj, char *data, int length) {
|
||||
uint8_t dummy_read;
|
||||
uint8_t *ptr;
|
||||
int count;
|
||||
|
||||
// set rx mode
|
||||
i2c_hal_set_direction(obj->instance, kI2CTransmit);
|
||||
|
||||
// first dummy read
|
||||
dummy_read = i2c_hal_read(obj->instance);
|
||||
if (i2c_wait_end_rx_transfer(obj))
|
||||
return 0;
|
||||
|
||||
// read address
|
||||
dummy_read = i2c_hal_read(obj->instance);
|
||||
if (i2c_wait_end_rx_transfer(obj))
|
||||
return 0;
|
||||
|
||||
// read (length - 1) bytes
|
||||
for (count = 0; count < (length - 1); count++) {
|
||||
data[count] = i2c_hal_read(obj->instance);
|
||||
if (i2c_wait_end_rx_transfer(obj))
|
||||
return count;
|
||||
}
|
||||
|
||||
// read last byte
|
||||
ptr = (length == 0) ? &dummy_read : (uint8_t *)&data[count];
|
||||
*ptr = i2c_hal_read(obj->instance);
|
||||
|
||||
return (length) ? (count + 1) : 0;
|
||||
}
|
||||
|
||||
int i2c_slave_write(i2c_t *obj, const char *data, int length) {
|
||||
int i, count = 0;
|
||||
|
||||
// set tx mode
|
||||
i2c_hal_set_direction(obj->instance, kI2CTransmit);
|
||||
|
||||
for (i = 0; i < length; i++) {
|
||||
if (i2c_do_write(obj, data[count++]) == 2)
|
||||
return i;
|
||||
}
|
||||
|
||||
// set rx mode
|
||||
i2c_hal_set_direction(obj->instance, kI2CReceive);
|
||||
|
||||
// dummy rx transfer needed
|
||||
// otherwise the master cannot generate a stop bit
|
||||
i2c_hal_read(obj->instance);
|
||||
if (i2c_wait_end_rx_transfer(obj) == 2)
|
||||
return count;
|
||||
|
||||
return count;
|
||||
}
|
||||
|
||||
void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) {
|
||||
i2c_hal_set_upper_slave_address_7bit(obj->instance, address & 0xfe);
|
||||
}
|
||||
#endif
|
||||
|
|
@ -0,0 +1,69 @@
|
|||
/* mbed Microcontroller Library
|
||||
* Copyright (c) 2006-2013 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#ifndef MBED_OBJECTS_H
|
||||
#define MBED_OBJECTS_H
|
||||
|
||||
#include "cmsis.h"
|
||||
#include "PortNames.h"
|
||||
#include "PeripheralNames.h"
|
||||
#include "PinNames.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
struct gpio_irq_s {
|
||||
uint32_t port;
|
||||
uint32_t pin;
|
||||
uint32_t ch;
|
||||
};
|
||||
|
||||
struct port_s {
|
||||
PortName port;
|
||||
uint32_t mask;
|
||||
};
|
||||
|
||||
struct pwmout_s {
|
||||
PWMName pwm_name;
|
||||
};
|
||||
|
||||
struct serial_s {
|
||||
int index;
|
||||
};
|
||||
|
||||
struct analogin_s {
|
||||
ADCName adc;
|
||||
};
|
||||
|
||||
struct i2c_s {
|
||||
uint32_t instance;
|
||||
};
|
||||
|
||||
struct spi_s {
|
||||
uint32_t instance;
|
||||
};
|
||||
|
||||
struct dac_s {
|
||||
DACName dac;
|
||||
};
|
||||
|
||||
#include "gpio_object.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
|
@ -0,0 +1,49 @@
|
|||
/* mbed Microcontroller Library
|
||||
* Copyright (c) 2006-2013 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#include "mbed_assert.h"
|
||||
#include "pinmap.h"
|
||||
#include "error.h"
|
||||
#include "fsl_clock_manager.h"
|
||||
#include "fsl_port_hal.h"
|
||||
|
||||
void pin_function(PinName pin, int function) {
|
||||
MBED_ASSERT(pin != (PinName)NC);
|
||||
clock_manager_set_gate(kClockModulePORT, pin >> GPIO_PORT_SHIFT, true);
|
||||
port_hal_mux_control(pin >> GPIO_PORT_SHIFT, pin & 0xFF, (port_mux_t)function);
|
||||
}
|
||||
|
||||
void pin_mode(PinName pin, PinMode mode) {
|
||||
MBED_ASSERT(pin != (PinName)NC);
|
||||
uint32_t instance = pin >> GPIO_PORT_SHIFT;
|
||||
uint32_t pinName = pin & 0xFF;
|
||||
|
||||
switch (mode) {
|
||||
case PullNone:
|
||||
port_hal_configure_pull(instance, pinName, false);
|
||||
port_hal_pull_select(instance, pinName, kPortPullDown);
|
||||
break;
|
||||
case PullDown:
|
||||
port_hal_configure_pull(instance, pinName, true);
|
||||
port_hal_pull_select(instance, pinName, kPortPullDown);
|
||||
break;
|
||||
case PullUp:
|
||||
port_hal_configure_pull(instance, pinName, true);
|
||||
port_hal_pull_select(instance, pinName, kPortPullUp);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
|
@ -0,0 +1,69 @@
|
|||
/* mbed Microcontroller Library
|
||||
* Copyright (c) 2006-2013 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#include "port_api.h"
|
||||
#include "pinmap.h"
|
||||
#include "gpio_api.h"
|
||||
|
||||
PinName port_pin(PortName port, int pin_n) {
|
||||
return (PinName)((port << GPIO_PORT_SHIFT) | pin_n);
|
||||
}
|
||||
|
||||
void port_init(port_t *obj, PortName port, int mask, PinDirection dir) {
|
||||
obj->port = port;
|
||||
obj->mask = mask;
|
||||
|
||||
// The function is set per pin: reuse gpio logic
|
||||
for (uint32_t i = 0; i < 32; i++) {
|
||||
if (obj->mask & (1 << i)) {
|
||||
gpio_set(port_pin(obj->port, i));
|
||||
}
|
||||
}
|
||||
|
||||
port_dir(obj, dir);
|
||||
}
|
||||
|
||||
void port_mode(port_t *obj, PinMode mode) {
|
||||
|
||||
// The mode is set per pin: reuse pinmap logic
|
||||
for (uint32_t i = 0; i < 32; i++) {
|
||||
if (obj->mask & (1 << i)) {
|
||||
pin_mode(port_pin(obj->port, i), mode);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void port_dir(port_t *obj, PinDirection dir) {
|
||||
uint32_t direction = gpio_hal_get_port_direction((uint32_t)obj->port);
|
||||
switch (dir) {
|
||||
case PIN_INPUT :
|
||||
direction &= ~obj->mask;
|
||||
gpio_hal_set_port_direction((uint32_t)obj->port, direction);
|
||||
break;
|
||||
case PIN_OUTPUT:
|
||||
direction |= obj->mask;
|
||||
gpio_hal_set_port_direction((uint32_t)obj->port, direction);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
void port_write(port_t *obj, int value) {
|
||||
uint32_t input = gpio_hal_read_port_input((uint32_t)obj->port) & ~obj->mask;
|
||||
gpio_hal_write_port_output((uint32_t)obj->port, input | (uint32_t)(value & obj->mask));
|
||||
}
|
||||
|
||||
int port_read(port_t *obj) {
|
||||
return (int)(gpio_hal_read_port_input((uint32_t)obj->port) & obj->mask);
|
||||
}
|
|
@ -0,0 +1,172 @@
|
|||
/* mbed Microcontroller Library
|
||||
* Copyright (c) 2006-2013 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#include "mbed_assert.h"
|
||||
#include "pwmout_api.h"
|
||||
|
||||
#include "cmsis.h"
|
||||
#include "pinmap.h"
|
||||
#include "fsl_ftm_hal.h"
|
||||
#include "fsl_mcg_hal.h"
|
||||
#include "fsl_clock_manager.h"
|
||||
|
||||
static const PinMap PinMap_PWM[] = {
|
||||
{PTA0 , PWM_6 , 3},
|
||||
{PTA1 , PWM_7 , 3},
|
||||
{PTA2 , PWM_8 , 3},
|
||||
{PTA3 , PWM_1 , 3},
|
||||
{PTA4 , PWM_2 , 3},
|
||||
{PTA5 , PWM_3 , 3},
|
||||
{PTA6 , PWM_4 , 3},
|
||||
{PTA7 , PWM_5 , 3},
|
||||
{PTA8 , PWM_9 , 3},
|
||||
{PTA9 , PWM_10, 3},
|
||||
{PTA10, PWM_17, 3},
|
||||
{PTA11, PWM_18, 3},
|
||||
{PTA12, PWM_9 , 3},
|
||||
{PTA13, PWM_10, 3},
|
||||
|
||||
{PTB0 , PWM_9 , 3},
|
||||
{PTB1 , PWM_10, 3},
|
||||
{PTB18, PWM_17, 3},
|
||||
{PTB19, PWM_18, 3},
|
||||
|
||||
{PTC1 , PWM_1 , 4},
|
||||
{PTC2 , PWM_2 , 4},
|
||||
{PTC3 , PWM_3 , 4},
|
||||
{PTC4 , PWM_4 , 4},
|
||||
{PTC5 , PWM_3 , 7},
|
||||
{PTC8 , PWM_29, 3},
|
||||
{PTC9 , PWM_30, 3},
|
||||
{PTC10, PWM_31, 3},
|
||||
{PTC11, PWM_32, 3},
|
||||
|
||||
{PTD0 , PWM_25, 4},
|
||||
{PTD1 , PWM_26, 4},
|
||||
{PTD2 , PWM_27, 4},
|
||||
{PTD3 , PWM_28, 4},
|
||||
{PTD4 , PWM_5 , 4},
|
||||
{PTD5 , PWM_6 , 4},
|
||||
{PTD6 , PWM_7 , 4},
|
||||
{PTD4 , PWM_5 , 4},
|
||||
{PTD7 , PWM_8 , 4},
|
||||
|
||||
{PTE5 , PWM_25, 6},
|
||||
{PTE6 , PWM_26, 6},
|
||||
|
||||
{NC , NC , 0}
|
||||
};
|
||||
|
||||
static float pwm_clock_mhz;
|
||||
|
||||
void pwmout_init(pwmout_t* obj, PinName pin) {
|
||||
PWMName pwm = (PWMName)pinmap_peripheral(pin, PinMap_PWM);
|
||||
MBED_ASSERT(pwm != (PWMName)NC);
|
||||
|
||||
obj->pwm_name = pwm;
|
||||
|
||||
uint32_t pwm_base_clock;
|
||||
clock_manager_get_frequency(kBusClock, &pwm_base_clock);
|
||||
float clkval = (float)pwm_base_clock / 1000000.0f;
|
||||
uint32_t clkdiv = 0;
|
||||
while (clkval > 1) {
|
||||
clkdiv++;
|
||||
clkval /= 2.0f;
|
||||
if (clkdiv == 7) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
pwm_clock_mhz = clkval;
|
||||
uint32_t channel = pwm & 0xF;
|
||||
uint32_t instance = pwm >> TPM_SHIFT;
|
||||
clock_manager_set_gate(kClockModuleFTM, instance, true);
|
||||
ftm_hal_set_tof_frequency(instance, 3);
|
||||
ftm_hal_set_clock_source(instance, kClock_source_FTM_SystemClk);
|
||||
ftm_hal_set_clock_ps(instance, (ftm_clock_ps_t)clkdiv);
|
||||
ftm_hal_set_counter_init_val(instance, 0);
|
||||
// default to 20ms: standard for servos, and fine for e.g. brightness control
|
||||
pwmout_period_ms(obj, 20);
|
||||
pwmout_write (obj, 0);
|
||||
ftm_config_t config = {
|
||||
.mode = kFtmEdgeAlignedPWM,
|
||||
.channel = channel,
|
||||
.edge_mode = {.ftm_pwm_edge_mode = kFtmHighTrue}
|
||||
};
|
||||
ftm_hal_enable_pwm_mode(instance, &config);
|
||||
|
||||
// Wire pinout
|
||||
pinmap_pinout(pin, PinMap_PWM);
|
||||
}
|
||||
|
||||
void pwmout_free(pwmout_t* obj) {
|
||||
}
|
||||
|
||||
void pwmout_write(pwmout_t* obj, float value) {
|
||||
uint32_t instance = obj->pwm_name >> TPM_SHIFT;
|
||||
if (value < 0.0f) {
|
||||
value = 0.0f;
|
||||
} else if (value > 1.0f) {
|
||||
value = 1.0f;
|
||||
}
|
||||
uint16_t mod = ftm_hal_get_mod(instance);
|
||||
uint32_t new_count = (uint32_t)((float)(mod) * value);
|
||||
// Stop FTM clock to ensure instant update of MOD register
|
||||
ftm_hal_set_clock_source(instance, kClock_source_FTM_None);
|
||||
ftm_hal_set_channel_count_value(instance, obj->pwm_name & 0xF, new_count);
|
||||
ftm_hal_set_counter(instance, 0);
|
||||
ftm_hal_set_clock_source(instance, kClock_source_FTM_SystemClk);
|
||||
}
|
||||
|
||||
float pwmout_read(pwmout_t* obj) {
|
||||
uint16_t count = ftm_hal_get_channel_count_value(obj->pwm_name >> TPM_SHIFT, obj->pwm_name & 0xF, 0);
|
||||
uint16_t mod = ftm_hal_get_mod(obj->pwm_name >> TPM_SHIFT);
|
||||
if (mod == 0)
|
||||
return 0.0;
|
||||
float v = (float)(count) / (float)(mod);
|
||||
return (v > 1.0f) ? (1.0f) : (v);
|
||||
}
|
||||
|
||||
void pwmout_period(pwmout_t* obj, float seconds) {
|
||||
pwmout_period_us(obj, seconds * 1000000.0f);
|
||||
}
|
||||
|
||||
void pwmout_period_ms(pwmout_t* obj, int ms) {
|
||||
pwmout_period_us(obj, ms * 1000);
|
||||
}
|
||||
|
||||
// Set the PWM period, keeping the duty cycle the same.
|
||||
void pwmout_period_us(pwmout_t* obj, int us) {
|
||||
uint32_t instance = obj->pwm_name >> TPM_SHIFT;
|
||||
float dc = pwmout_read(obj);
|
||||
// Stop FTM clock to ensure instant update of MOD register
|
||||
ftm_hal_set_clock_source(instance, kClock_source_FTM_None);
|
||||
ftm_hal_set_mod(instance, (uint32_t)(pwm_clock_mhz * (float)us) - 1);
|
||||
pwmout_write(obj, dc);
|
||||
ftm_hal_set_clock_source(instance, kClock_source_FTM_SystemClk);
|
||||
}
|
||||
|
||||
void pwmout_pulsewidth(pwmout_t* obj, float seconds) {
|
||||
pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
|
||||
}
|
||||
|
||||
void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) {
|
||||
pwmout_pulsewidth_us(obj, ms * 1000);
|
||||
}
|
||||
|
||||
void pwmout_pulsewidth_us(pwmout_t* obj, int us) {
|
||||
uint32_t value = (uint32_t)(pwm_clock_mhz * (float)us);
|
||||
ftm_hal_set_channel_count_value(obj->pwm_name >> TPM_SHIFT, obj->pwm_name & 0xF, value);
|
||||
}
|
|
@ -0,0 +1,68 @@
|
|||
/* mbed Microcontroller Library
|
||||
* Copyright (c) 2006-2013 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#include "rtc_api.h"
|
||||
#include "pinmap.h"
|
||||
#include "fsl_rtc_hal.h"
|
||||
#include "fsl_clock_manager.h"
|
||||
|
||||
const PinMap PinMap_RTC[] = {
|
||||
{NC, OSC32KCLK, 0},
|
||||
};
|
||||
|
||||
void rtc_init(void) {
|
||||
rtc_hal_init_config_t hal_config = {0};
|
||||
|
||||
hal_config.disableClockOutToPeripheral = true;
|
||||
if (PinMap_RTC[0].pin == NC) {
|
||||
hal_config.enable32kOscillator = true;
|
||||
}
|
||||
clock_manager_set_gate(kClockModuleRTC, 0U, true);
|
||||
hal_config.startSecondsCounterAt = 1; /* TSR = 1 */
|
||||
rtc_hal_init(&hal_config);
|
||||
|
||||
// select RTC clock source
|
||||
SIM->SOPT1 &= ~SIM_SOPT1_OSC32KSEL_MASK;
|
||||
SIM->SOPT1 |= SIM_SOPT1_OSC32KSEL(PinMap_RTC[0].peripheral);
|
||||
|
||||
rtc_hal_config_oscillator(true);
|
||||
rtc_hal_counter_enable(true);
|
||||
}
|
||||
|
||||
void rtc_free(void) {
|
||||
// [TODO]
|
||||
}
|
||||
|
||||
/*
|
||||
* Little check routine to see if the RTC has been enabled
|
||||
* 0 = Disabled, 1 = Enabled
|
||||
*/
|
||||
int rtc_isenabled(void) {
|
||||
clock_manager_set_gate(kClockModuleRTC, 0U, true);
|
||||
return (int)rtc_hal_is_counter_enabled();
|
||||
}
|
||||
|
||||
time_t rtc_read(void) {
|
||||
return BR_RTC_TSR_TSR;
|
||||
}
|
||||
|
||||
void rtc_write(time_t t) {
|
||||
if (t == 0) {
|
||||
t = 1;
|
||||
}
|
||||
rtc_hal_counter_enable(false);
|
||||
BW_RTC_TSR_TSR(t);
|
||||
rtc_hal_counter_enable(true);
|
||||
}
|
|
@ -0,0 +1,244 @@
|
|||
/* mbed Microcontroller Library
|
||||
* Copyright (c) 2006-2013 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#include "serial_api.h"
|
||||
|
||||
// math.h required for floating point operations for baud rate calculation
|
||||
#include <math.h>
|
||||
#include "mbed_assert.h"
|
||||
|
||||
#include <string.h>
|
||||
|
||||
#include "cmsis.h"
|
||||
#include "pinmap.h"
|
||||
#include "fsl_uart_hal.h"
|
||||
#include "fsl_clock_manager.h"
|
||||
#include "fsl_uart_features.h"
|
||||
|
||||
/* TODO:
|
||||
putchar/getchar 9 and 10 bits support
|
||||
*/
|
||||
|
||||
static const PinMap PinMap_UART_TX[] = {
|
||||
{PTB17, UART_0, 3},
|
||||
{PTC17, UART_3, 3},
|
||||
{PTD7 , UART_0, 3},
|
||||
{PTD3 , UART_2, 3},
|
||||
{PTC4 , UART_1, 3},
|
||||
{PTC15, UART_4, 3},
|
||||
{PTB11, UART_3, 3},
|
||||
{PTA14, UART_0, 3},
|
||||
{PTE24, UART_4, 3},
|
||||
{PTE4 , UART_3, 3},
|
||||
{PTE0, UART_1, 3},
|
||||
{NC , NC , 0}
|
||||
};
|
||||
|
||||
static const PinMap PinMap_UART_RX[] = {
|
||||
{PTB16, UART_0, 3},
|
||||
{PTE1 , UART_1, 3},
|
||||
{PTE5 , UART_3, 3},
|
||||
{PTE25, UART_4, 3},
|
||||
{PTA15, UART_0, 3},
|
||||
{PTC16, UART_3, 3},
|
||||
{PTB10, UART_3, 3},
|
||||
{PTC3 , UART_1, 3},
|
||||
{PTC14, UART_4, 3},
|
||||
{PTD2 , UART_2, 3},
|
||||
{PTC6 , UART_0, 3},
|
||||
{NC , NC , 0}
|
||||
};
|
||||
|
||||
#define UART_NUM 4
|
||||
|
||||
static uint32_t serial_irq_ids[UART_NUM] = {0};
|
||||
static uart_irq_handler irq_handler;
|
||||
|
||||
int stdio_uart_inited = 0;
|
||||
serial_t stdio_uart;
|
||||
|
||||
static uint32_t serial_get_clock(uint32_t uart_instance)
|
||||
{
|
||||
uint32_t uartSourceClock;
|
||||
|
||||
if ((uart_instance == 0) || (uart_instance == 1)) {
|
||||
clock_manager_get_frequency(kSystemClock, &uartSourceClock);
|
||||
} else {
|
||||
clock_manager_get_frequency(kBusClock, &uartSourceClock);
|
||||
}
|
||||
return uartSourceClock;
|
||||
}
|
||||
|
||||
void serial_init(serial_t *obj, PinName tx, PinName rx) {
|
||||
uint32_t uart_tx = pinmap_peripheral(tx, PinMap_UART_TX);
|
||||
uint32_t uart_rx = pinmap_peripheral(rx, PinMap_UART_RX);
|
||||
obj->index = (UARTName)pinmap_merge(uart_tx, uart_rx);
|
||||
MBED_ASSERT((int)obj->index != NC);
|
||||
|
||||
uart_config_t uart_config;
|
||||
uart_config.baudRate = 9600;
|
||||
uart_config.bitCountPerChar = kUart8BitsPerChar;
|
||||
uart_config.parityMode = kUartParityDisabled;
|
||||
uart_config.rxDataInvert = 0;
|
||||
uart_config.stopBitCount = kUartOneStopBit;
|
||||
uart_config.txDataInvert = 0;
|
||||
|
||||
uart_config.uartSourceClockInHz = serial_get_clock(obj->index);
|
||||
|
||||
clock_manager_set_gate(kClockModuleUART, obj->index, true);
|
||||
uart_hal_init(obj->index, &uart_config);
|
||||
|
||||
pinmap_pinout(tx, PinMap_UART_TX);
|
||||
pinmap_pinout(rx, PinMap_UART_RX);
|
||||
|
||||
pin_mode(tx, PullUp);
|
||||
pin_mode(rx, PullUp);
|
||||
|
||||
if (obj->index == STDIO_UART) {
|
||||
stdio_uart_inited = 1;
|
||||
memcpy(&stdio_uart, obj, sizeof(serial_t));
|
||||
}
|
||||
}
|
||||
|
||||
void serial_free(serial_t *obj) {
|
||||
serial_irq_ids[obj->index] = 0;
|
||||
}
|
||||
|
||||
void serial_baud(serial_t *obj, int baudrate) {
|
||||
uart_hal_set_baud_rate(obj->index, serial_get_clock(obj->index), (uint32_t)baudrate);
|
||||
}
|
||||
|
||||
void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
|
||||
uart_hal_configure_bit_count_per_char(obj->index, (uart_bit_count_per_char_t)data_bits);
|
||||
uart_hal_configure_parity_mode(obj->index, (uart_parity_mode_t)parity);
|
||||
uart_hal_configure_stop_bit_count(obj->index, (uart_stop_bit_count_t)stop_bits);
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
* INTERRUPTS HANDLING
|
||||
******************************************************************************/
|
||||
static inline void uart_irq(uint32_t transmit_empty, uint32_t receive_full, uint32_t index) {
|
||||
if (serial_irq_ids[index] != 0) {
|
||||
if (transmit_empty)
|
||||
irq_handler(serial_irq_ids[index], TxIrq);
|
||||
|
||||
if (receive_full)
|
||||
irq_handler(serial_irq_ids[index], RxIrq);
|
||||
}
|
||||
}
|
||||
|
||||
void uart0_irq() {
|
||||
uart_irq(uart_hal_is_transmit_data_register_empty(0), uart_hal_is_receive_data_register_full(0), 0);
|
||||
if (uart_hal_is_receive_overrun_detected(0))
|
||||
uart_hal_clear_status_flag(0, kUartReceiveOverrun);
|
||||
}
|
||||
void uart1_irq() {
|
||||
uart_irq(uart_hal_is_transmit_data_register_empty(1), uart_hal_is_receive_data_register_full(1), 1);
|
||||
}
|
||||
|
||||
void uart2_irq() {
|
||||
uart_irq(uart_hal_is_transmit_data_register_empty(2), uart_hal_is_receive_data_register_full(2), 2);
|
||||
}
|
||||
|
||||
void uart3_irq() {
|
||||
uart_irq(uart_hal_is_transmit_data_register_empty(3), uart_hal_is_receive_data_register_full(3), 3);
|
||||
}
|
||||
|
||||
void uart4_irq() {
|
||||
uart_irq(uart_hal_is_transmit_data_register_empty(4), uart_hal_is_receive_data_register_full(4), 4);
|
||||
}
|
||||
|
||||
void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
|
||||
irq_handler = handler;
|
||||
serial_irq_ids[obj->index] = id;
|
||||
}
|
||||
|
||||
void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
|
||||
IRQn_Type irq_n = (IRQn_Type)0;
|
||||
uint32_t vector = 0;
|
||||
|
||||
switch (obj->index) {
|
||||
case 0: irq_n=UART0_RX_TX_IRQn; vector = (uint32_t)&uart0_irq; break;
|
||||
case 1: irq_n=UART1_RX_TX_IRQn; vector = (uint32_t)&uart1_irq; break;
|
||||
case 2: irq_n=UART2_RX_TX_IRQn; vector = (uint32_t)&uart2_irq; break;
|
||||
case 3: irq_n=UART3_RX_TX_IRQn; vector = (uint32_t)&uart3_irq; break;
|
||||
case 4: irq_n=UART4_RX_TX_IRQn; vector = (uint32_t)&uart4_irq; break;
|
||||
}
|
||||
|
||||
if (enable) {
|
||||
switch (irq) {
|
||||
case RxIrq: uart_hal_enable_rx_data_register_full_interrupt(obj->index); break;
|
||||
case TxIrq: uart_hal_enable_tx_data_register_empty_interrupt(obj->index); break;
|
||||
}
|
||||
NVIC_SetVector(irq_n, vector);
|
||||
NVIC_EnableIRQ(irq_n);
|
||||
|
||||
} else { // disable
|
||||
int all_disabled = 0;
|
||||
SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
|
||||
switch (irq) {
|
||||
case RxIrq: uart_hal_disable_rx_data_register_full_interrupt(obj->index); break;
|
||||
case TxIrq: uart_hal_disable_tx_data_register_empty_interrupt(obj->index); break;
|
||||
}
|
||||
switch (other_irq) {
|
||||
case RxIrq: all_disabled = uart_hal_is_receive_data_full_interrupt_enabled(obj->index) == 0; break;
|
||||
case TxIrq: all_disabled = uart_hal_is_tx_data_register_empty_interrupt_enabled(obj->index) == 0; break;
|
||||
}
|
||||
if (all_disabled)
|
||||
NVIC_DisableIRQ(irq_n);
|
||||
}
|
||||
}
|
||||
|
||||
int serial_getc(serial_t *obj) {
|
||||
while (!serial_readable(obj));
|
||||
uint8_t data;
|
||||
uart_hal_getchar(obj->index, &data);
|
||||
|
||||
return data;
|
||||
}
|
||||
|
||||
void serial_putc(serial_t *obj, int c) {
|
||||
while (!serial_writable(obj));
|
||||
uart_hal_putchar(obj->index, (uint8_t)c);
|
||||
}
|
||||
|
||||
int serial_readable(serial_t *obj) {
|
||||
if (uart_hal_is_receive_overrun_detected(obj->index))
|
||||
uart_hal_clear_status_flag(obj->index, kUartReceiveOverrun);
|
||||
return uart_hal_is_receive_data_register_full(obj->index);
|
||||
}
|
||||
|
||||
int serial_writable(serial_t *obj) {
|
||||
if (uart_hal_is_receive_overrun_detected(obj->index))
|
||||
uart_hal_clear_status_flag(obj->index, kUartReceiveOverrun);
|
||||
|
||||
return uart_hal_is_transmit_data_register_empty(obj->index);
|
||||
}
|
||||
|
||||
void serial_clear(serial_t *obj) {
|
||||
}
|
||||
|
||||
void serial_pinout_tx(PinName tx) {
|
||||
pinmap_pinout(tx, PinMap_UART_TX);
|
||||
}
|
||||
|
||||
void serial_break_set(serial_t *obj) {
|
||||
uart_hal_queue_break_char_to_send(obj->index, true);
|
||||
}
|
||||
|
||||
void serial_break_clear(serial_t *obj) {
|
||||
uart_hal_queue_break_char_to_send(obj->index, false);
|
||||
}
|
||||
|
|
@ -0,0 +1,49 @@
|
|||
/* mbed Microcontroller Library
|
||||
* Copyright (c) 2006-2013 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#include "sleep_api.h"
|
||||
#include "cmsis.h"
|
||||
#include "fsl_mcg_hal.h"
|
||||
#include "fsl_smc_hal.h"
|
||||
|
||||
void sleep(void) {
|
||||
smc_power_mode_protection_config_t sleep_config = {true};
|
||||
smc_hal_config_power_mode_protection(&sleep_config);
|
||||
|
||||
SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
|
||||
__WFI();
|
||||
}
|
||||
|
||||
void deepsleep(void) {
|
||||
mcg_clock_select_t mcg_clock = clock_get_clks();
|
||||
|
||||
smc_power_mode_protection_config_t sleep_config = {true};
|
||||
smc_hal_config_power_mode_protection(&sleep_config);
|
||||
SMC->PMCTRL = SMC_PMCTRL_STOPM(2);
|
||||
|
||||
//Deep sleep for ARM core:
|
||||
SCB->SCR = 1 << SCB_SCR_SLEEPDEEP_Pos;
|
||||
|
||||
__WFI();
|
||||
|
||||
//Switch back to PLL as clock source if needed
|
||||
//The interrupt that woke up the device will run at reduced speed
|
||||
if (mcg_clock == kMcgClockSelectOut) {
|
||||
if (clock_get_plls() == kMcgPllSelectPllcs) {
|
||||
while (clock_get_lock0() == kMcgLockUnlocked);
|
||||
}
|
||||
clock_set_clks(kMcgClockSelectOut);
|
||||
}
|
||||
}
|
|
@ -0,0 +1,184 @@
|
|||
/* mbed Microcontroller Library
|
||||
* Copyright (c) 2013 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#include <math.h>
|
||||
#include "mbed_assert.h"
|
||||
|
||||
#include "spi_api.h"
|
||||
#include "cmsis.h"
|
||||
#include "pinmap.h"
|
||||
#include "error.h"
|
||||
#include "fsl_clock_manager.h"
|
||||
#include "fsl_dspi_hal.h"
|
||||
|
||||
static const PinMap PinMap_SPI_SCLK[] = {
|
||||
{PTD1 , SPI_0, 2},
|
||||
{PTE2 , SPI_1, 2},
|
||||
{PTA15, SPI_0, 2},
|
||||
{PTB11, SPI_1, 2},
|
||||
{PTB21, SPI_2, 2},
|
||||
{PTC5 , SPI_0, 2},
|
||||
{PTD5 , SPI_1, 7},
|
||||
{NC , NC , 0}
|
||||
};
|
||||
|
||||
static const PinMap PinMap_SPI_MOSI[] = {
|
||||
{PTD2 , SPI_0, 2},
|
||||
{PTE1 , SPI_1, 2},
|
||||
{PTE3 , SPI_1, 7},
|
||||
{PTA16, SPI_0, 2},
|
||||
{PTB16, SPI_1, 2},
|
||||
{PTB22, SPI_2, 2},
|
||||
{PTC6 , SPI_0, 2},
|
||||
{PTD6 , SPI_1, 7},
|
||||
{NC , NC , 0}
|
||||
};
|
||||
|
||||
static const PinMap PinMap_SPI_MISO[] = {
|
||||
{PTD3 , SPI_0, 2},
|
||||
{PTE1 , SPI_1, 7},
|
||||
{PTE3 , SPI_1, 2},
|
||||
{PTA17, SPI_0, 2},
|
||||
{PTB17, SPI_1, 2},
|
||||
{PTB23, SPI_2, 2},
|
||||
{PTC7 , SPI_0, 2},
|
||||
{PTD7 , SPI_1, 7},
|
||||
{NC , NC , 0}
|
||||
};
|
||||
|
||||
static const PinMap PinMap_SPI_SSEL[] = {
|
||||
{PTD0 , SPI_0, 2},
|
||||
{PTE4 , SPI_1, 2},
|
||||
{PTA14, SPI_0, 2},
|
||||
{PTB10, SPI_1, 2},
|
||||
{PTB20, SPI_2, 2},
|
||||
{PTC4 , SPI_0, 2},
|
||||
{PTD4 , SPI_1, 7},
|
||||
{NC , NC , 0}
|
||||
};
|
||||
|
||||
static void spi_set_delays(uint32_t instance) {
|
||||
dspi_delay_settings_config_t delay_config;
|
||||
delay_config.pcsToSck = 1; /*!< PCS to SCK delay (CSSCK): initialize the scalar
|
||||
* value to '1' to provide the master with a little
|
||||
* more data-in read setup time.
|
||||
*/
|
||||
delay_config.pcsToSckPre = 0; /*!< PCS to SCK delay prescalar (PCSSCK) */
|
||||
delay_config.afterSckPre = 0; /*!< After SCK delay prescalar (PASC)*/
|
||||
delay_config.afterSck = 0; /*!< After SCK delay scalar (ASC)*/
|
||||
delay_config.afterTransferPre = 0; /*!< Delay after transfer prescalar (PDT)*/
|
||||
delay_config.afterTransfer = 0;
|
||||
dspi_hal_configure_delays(instance, kDspiCtar0, &delay_config);
|
||||
}
|
||||
|
||||
void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
|
||||
// determine the SPI to use
|
||||
uint32_t spi_mosi = pinmap_peripheral(mosi, PinMap_SPI_MOSI);
|
||||
uint32_t spi_miso = pinmap_peripheral(miso, PinMap_SPI_MISO);
|
||||
uint32_t spi_sclk = pinmap_peripheral(sclk, PinMap_SPI_SCLK);
|
||||
uint32_t spi_ssel = pinmap_peripheral(ssel, PinMap_SPI_SSEL);
|
||||
uint32_t spi_data = pinmap_merge(spi_mosi, spi_miso);
|
||||
uint32_t spi_cntl = pinmap_merge(spi_sclk, spi_ssel);
|
||||
|
||||
obj->instance = pinmap_merge(spi_data, spi_cntl);
|
||||
MBED_ASSERT((int)obj->instance != NC);
|
||||
|
||||
// enable power and clocking
|
||||
clock_manager_set_gate(kClockModuleSPI, obj->instance, true);
|
||||
|
||||
dspi_hal_disable(obj->instance);
|
||||
// set default format and frequency
|
||||
if (ssel == NC) {
|
||||
spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master
|
||||
} else {
|
||||
spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave
|
||||
}
|
||||
spi_set_delays(obj->instance);
|
||||
spi_frequency(obj, 1000000);
|
||||
|
||||
dspi_hal_enable(obj->instance);
|
||||
dspi_hal_start_transfer(obj->instance);
|
||||
|
||||
// pin out the spi pins
|
||||
pinmap_pinout(mosi, PinMap_SPI_MOSI);
|
||||
pinmap_pinout(miso, PinMap_SPI_MISO);
|
||||
pinmap_pinout(sclk, PinMap_SPI_SCLK);
|
||||
if (ssel != NC) {
|
||||
pinmap_pinout(ssel, PinMap_SPI_SSEL);
|
||||
}
|
||||
}
|
||||
|
||||
void spi_free(spi_t *obj) {
|
||||
// [TODO]
|
||||
}
|
||||
void spi_format(spi_t *obj, int bits, int mode, int slave) {
|
||||
dspi_data_format_config_t config = {0};
|
||||
config.bitsPerFrame = (uint32_t)bits;
|
||||
config.clkPolarity = (mode & 0x2) ? kDspiClockPolarity_ActiveLow : kDspiClockPolarity_ActiveHigh;
|
||||
config.clkPhase = (mode & 0x1) ? kDspiClockPhase_SecondEdge : kDspiClockPhase_FirstEdge;
|
||||
config.direction = kDspiMsbFirst;
|
||||
dspi_status_t result = dspi_hal_configure_data_format(obj->instance, kDspiCtar0, &config);
|
||||
if (result != kStatus_DSPI_Success) {
|
||||
error("Failed to configure SPI data format");
|
||||
}
|
||||
|
||||
if (slave) {
|
||||
dspi_hal_set_master_slave(obj->instance, kDspiSlave);
|
||||
} else {
|
||||
dspi_hal_set_master_slave(obj->instance, kDspiMaster);
|
||||
}
|
||||
}
|
||||
|
||||
void spi_frequency(spi_t *obj, int hz) {
|
||||
uint32_t busClock;
|
||||
clock_manager_get_frequency(kBusClock, &busClock);
|
||||
dspi_hal_set_baud(obj->instance, kDspiCtar0, (uint32_t)hz, busClock);
|
||||
}
|
||||
|
||||
static inline int spi_writeable(spi_t * obj) {
|
||||
return dspi_hal_get_status_flag(obj->instance, kDspiTxFifoFillRequest);
|
||||
}
|
||||
|
||||
static inline int spi_readable(spi_t * obj) {
|
||||
return dspi_hal_get_status_flag(obj->instance, kDspiRxFifoDrainRequest);
|
||||
}
|
||||
|
||||
int spi_master_write(spi_t *obj, int value) {
|
||||
// wait tx buffer empty
|
||||
while(!spi_writeable(obj));
|
||||
dspi_command_config_t command = {0};
|
||||
command.isEndOfQueue = true;
|
||||
command.isChipSelectContinuous = 0;
|
||||
dspi_hal_write_data_master_mode(obj->instance, &command, (uint16_t)value);
|
||||
dspi_hal_clear_status_flag(obj->instance, kDspiTxFifoFillRequest);
|
||||
|
||||
// wait rx buffer full
|
||||
while (!spi_readable(obj));
|
||||
dspi_hal_clear_status_flag(obj->instance, kDspiRxFifoDrainRequest);
|
||||
return dspi_hal_read_data(obj->instance) & 0xff;
|
||||
}
|
||||
|
||||
int spi_slave_receive(spi_t *obj) {
|
||||
return spi_readable(obj);
|
||||
}
|
||||
|
||||
int spi_slave_read(spi_t *obj) {
|
||||
return dspi_hal_read_data(obj->instance);
|
||||
}
|
||||
|
||||
void spi_slave_write(spi_t *obj, int value) {
|
||||
while (!spi_writeable(obj));
|
||||
dspi_hal_write_data_slave_mode(obj->instance, (uint32_t)value);
|
||||
}
|
|
@ -0,0 +1,153 @@
|
|||
/* mbed Microcontroller Library
|
||||
* Copyright (c) 2006-2013 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#include <stddef.h>
|
||||
#include "us_ticker_api.h"
|
||||
#include "PeripheralNames.h"
|
||||
#include "fsl_pit_hal.h"
|
||||
#include "fsl_sim_hal.h"
|
||||
#include "fsl_clock_manager.h"
|
||||
#include "fsl_clock_configs.h"
|
||||
|
||||
static void pit_init(void);
|
||||
static void lptmr_init(void);
|
||||
|
||||
static int us_ticker_inited = 0;
|
||||
|
||||
void us_ticker_init(void) {
|
||||
if (us_ticker_inited) {
|
||||
return;
|
||||
}
|
||||
us_ticker_inited = 1;
|
||||
|
||||
pit_init();
|
||||
lptmr_init();
|
||||
}
|
||||
|
||||
|
||||
uint32_t us_ticker_read() {
|
||||
if (!us_ticker_inited) {
|
||||
us_ticker_init();
|
||||
}
|
||||
|
||||
return ~(pit_hal_read_timer_count(1));
|
||||
}
|
||||
/******************************************************************************
|
||||
* Timer for us timing.
|
||||
******************************************************************************/
|
||||
static void pit_init(void) {
|
||||
uint32_t busClock;
|
||||
|
||||
clock_hal_set_gate(kSimClockModulePIT, 0, true);
|
||||
pit_hal_enable();
|
||||
clock_manager_get_frequency(kBusClock, &busClock);
|
||||
pit_hal_set_timer_period_count(0, busClock / 1000000 - 1);
|
||||
pit_hal_set_timer_period_count(1, 0xFFFFFFFF);
|
||||
pit_hal_configure_timer_chain(1, true);
|
||||
|
||||
pit_hal_timer_start(0);
|
||||
pit_hal_timer_start(1);
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
* Timer Event
|
||||
*
|
||||
* It schedules interrupts at given (32bit)us interval of time.
|
||||
* It is implemented used the 16bit Low Power Timer that remains powered in all
|
||||
* power modes.
|
||||
******************************************************************************/
|
||||
static void lptmr_isr(void);
|
||||
|
||||
static void lptmr_init(void) {
|
||||
clock_hal_set_gate(kSimClockModuleLPTIMER, 0, true);
|
||||
|
||||
/* Set interrupt handler */
|
||||
NVIC_SetVector(LPTimer_IRQn, (uint32_t)lptmr_isr);
|
||||
NVIC_EnableIRQ(LPTimer_IRQn);
|
||||
|
||||
/* TODO: check clock manager, due to nonstandard 50 MHz */
|
||||
//No suitable external oscillator clock -> Use fast internal oscillator (4MHz / divider)
|
||||
MCG->C1 |= MCG_C1_IRCLKEN_MASK;
|
||||
MCG->C2 |= MCG_C2_IRCS_MASK;
|
||||
LPTMR0->PSR = LPTMR_PSR_PCS(0);
|
||||
switch (MCG->SC & MCG_SC_FCRDIV_MASK) {
|
||||
case MCG_SC_FCRDIV(0): //4MHz
|
||||
LPTMR0->PSR |= LPTMR_PSR_PRESCALE(1);
|
||||
break;
|
||||
case MCG_SC_FCRDIV(1): //2MHz
|
||||
LPTMR0->PSR |= LPTMR_PSR_PRESCALE(0);
|
||||
break;
|
||||
default: //1MHz or anything else, in which case we put it on 1MHz
|
||||
MCG->SC &= ~MCG_SC_FCRDIV_MASK;
|
||||
MCG->SC |= MCG_SC_FCRDIV(2);
|
||||
LPTMR0->PSR |= LPTMR_PSR_PBYP_MASK;
|
||||
}
|
||||
}
|
||||
|
||||
void us_ticker_disable_interrupt(void) {
|
||||
BW_LPTMR_CSR_TIE(0);
|
||||
}
|
||||
|
||||
void us_ticker_clear_interrupt(void) {
|
||||
// we already clear interrupt in lptmr_isr
|
||||
}
|
||||
|
||||
static uint32_t us_ticker_int_counter = 0;
|
||||
static uint16_t us_ticker_int_remainder = 0;
|
||||
|
||||
static void lptmr_set(unsigned short count) {
|
||||
HW_LPTMR_CSR_WR(0);
|
||||
BW_LPTMR_CMR_COMPARE(count);
|
||||
BW_LPTMR_CSR_TIE(1);
|
||||
BW_LPTMR_CSR_TEN(1);
|
||||
}
|
||||
|
||||
static void lptmr_isr(void) {
|
||||
// write 1 to TCF to clear the LPT timer compare flag
|
||||
BW_LPTMR_CSR_TCF(1);
|
||||
|
||||
if (us_ticker_int_counter > 0) {
|
||||
lptmr_set(0xFFFF);
|
||||
us_ticker_int_counter--;
|
||||
} else {
|
||||
if (us_ticker_int_remainder > 0) {
|
||||
lptmr_set(us_ticker_int_remainder);
|
||||
us_ticker_int_remainder = 0;
|
||||
} else {
|
||||
// This function is going to disable the interrupts if there are
|
||||
// no other events in the queue
|
||||
us_ticker_irq_handler();
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void us_ticker_set_interrupt(unsigned int timestamp) {
|
||||
int delta = (int)(timestamp - us_ticker_read());
|
||||
if (delta <= 0) {
|
||||
// This event was in the past:
|
||||
us_ticker_irq_handler();
|
||||
return;
|
||||
}
|
||||
|
||||
us_ticker_int_counter = (uint32_t)(delta >> 16);
|
||||
us_ticker_int_remainder = (uint16_t)(0xFFFF & delta);
|
||||
if (us_ticker_int_counter > 0) {
|
||||
lptmr_set(0xFFFF);
|
||||
us_ticker_int_counter--;
|
||||
} else {
|
||||
lptmr_set(us_ticker_int_remainder);
|
||||
us_ticker_int_remainder = 0;
|
||||
}
|
||||
}
|
|
@ -137,11 +137,12 @@ class K64F(Target):
|
|||
def __init__(self):
|
||||
Target.__init__(self)
|
||||
self.core = "Cortex-M4F"
|
||||
self.extra_labels = ['Freescale', 'KPSDK_MCUS', 'KPSDK_CODE']
|
||||
self.extra_labels = ['Freescale', 'KPSDK_MCUS', 'KPSDK_CODE', 'FRDM']
|
||||
self.macros = ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED"]
|
||||
self.supported_toolchains = ["ARM", "GCC_ARM"]
|
||||
self.supported_form_factors = ["ARDUINO"]
|
||||
self.is_disk_virtual = True
|
||||
self.default_toolchain = "ARM"
|
||||
|
||||
|
||||
class LPC812(Target):
|
||||
|
@ -576,7 +577,16 @@ class GHI_MBUINO(LPC11U24):
|
|||
self.macros = ['TARGET_LPC11U24']
|
||||
self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"]
|
||||
self.default_toolchain = "uARM"
|
||||
|
||||
|
||||
class MTS_GAMBIT(Target):
|
||||
def __init__(self):
|
||||
Target.__init__(self)
|
||||
self.core = "Cortex-M4F"
|
||||
self.extra_labels = ['Freescale', 'KPSDK_MCUS', 'KPSDK_CODE', 'K64F']
|
||||
self.supported_toolchains = ["ARM", "GCC_ARM"]
|
||||
self.macros = ['TARGET_K64F', "CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED"]
|
||||
self.is_disk_virtual = True
|
||||
self.default_toolchain = "ARM"
|
||||
|
||||
# Get a single instance for each target
|
||||
TARGETS = [
|
||||
|
@ -626,6 +636,7 @@ TARGETS = [
|
|||
ARM_MPS2(),
|
||||
RBLAB_NRF51822(),
|
||||
GHI_MBUINO(),
|
||||
MTS_GAMBIT(),
|
||||
]
|
||||
|
||||
# Map each target name to its unique instance
|
||||
|
|
Loading…
Reference in New Issue