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[K20D50M] PinNames correction, UART pins definitions, GPIO IRQ speed up (as KLxx)

pull/397/head
0xc0170 2014-07-10 13:23:48 +01:00
parent 079df1a484
commit 79ee368366
4 changed files with 118 additions and 51 deletions
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12
libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/PinNames.h
View File

@ -197,10 +197,10 @@ typedef enum {
LED_BLUE = PTA2,
// mbed original LED naming
LED1 = LED_BLUE,
LED1 = LED_RED,
LED2 = LED_GREEN,
LED3 = LED_RED,
LED4 = LED_RED,
LED3 = LED_BLUE,
LED4 = LED_BLUE,
// USB Pins
USBTX = PTB17,
@ -231,6 +231,12 @@ typedef enum {
A4 = PTB1,
A5 = PTB0,
I2C_SCL = D15,
I2C_SDA = D14,
TSI_ELEC0 = PTB16,
TSI_ELEC1 = PTB17,
// Not connected
NC = (int)0xFFFFFFFF
} PinName;

4
libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/analogin_api.c
View File

@ -20,6 +20,8 @@
#include "pinmap.h"
#include "clk_freqs.h"
#define MAX_FADC 6000000
static const PinMap PinMap_ADC[] = {
{PTC2, ADC0_SE4b, 0},
{PTD1, ADC0_SE5b, 0},
@ -34,8 +36,6 @@ static const PinMap PinMap_ADC[] = {
{NC, NC, 0}
};
#define MAX_FADC 6000000
void analogin_init(analogin_t *obj, PinName pin) {
obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
MBED_ASSERT(obj->adc != (ADCName)NC);

95
libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/gpio_irq_api.c
View File

@ -29,46 +29,73 @@ static gpio_irq_handler irq_handler;
#define IRQ_FALLING_EDGE PORT_PCR_IRQC(10)
#define IRQ_EITHER_EDGE PORT_PCR_IRQC(11)
static const uint32_t search_bits[] = {0x0000FFFF, 0x000000FF, 0x0000000F, 0x00000003, 0x00000001};
static void handle_interrupt_in(PORT_Type *port, int ch_base) {
uint32_t mask = 0, i;
uint32_t isfr;
uint32_t location;
for (i = 0; i < 32; i++) {
uint32_t pmask = (1 << i);
if (port->ISFR & pmask) {
mask |= pmask;
uint32_t id = channel_ids[ch_base + i];
if (id == 0)
continue;
GPIO_Type *gpio = PTA;
gpio_irq_event event = IRQ_NONE;
uint32_t port_num = (port - PORTA) >> 12;
switch (port->PCR[i] & PORT_PCR_IRQC_MASK) {
case IRQ_RAISING_EDGE:
event = IRQ_RISE;
break;
case IRQ_FALLING_EDGE:
event = IRQ_FALL;
break;
case IRQ_EITHER_EDGE:
gpio += (port_num * 0x40);
event = (gpio->PDIR & pmask) ? (IRQ_RISE) : (IRQ_FALL);
break;
}
if (event != IRQ_NONE)
irq_handler(id, event);
while((isfr = port->ISFR) != 0) {
location = 0;
for (int i = 0; i < 5; i++) {
if (!(isfr & (search_bits[i] << location)))
location += 1 << (4 - i);
}
uint32_t id = channel_ids[ch_base + location];
if (id == 0) {
continue;
}
GPIO_Type *gpio = PTA;
gpio_irq_event event = IRQ_NONE;
uint32_t port_num = (port - PORTA) >> 12;
switch (port->PCR[location] & PORT_PCR_IRQC_MASK) {
case IRQ_RAISING_EDGE:
event = IRQ_RISE;
break;
case IRQ_FALLING_EDGE:
event = IRQ_FALL;
break;
case IRQ_EITHER_EDGE:
gpio += (port_num * 0x40);
event = (gpio->PDIR & (1 << location)) ? (IRQ_RISE) : (IRQ_FALL);
break;
}
if (event != IRQ_NONE) {
irq_handler(id, event);
}
port->ISFR = 1 << location;
}
port->ISFR = mask;
}
void gpio_irqA(void) {handle_interrupt_in(PORTA, 0);}
void gpio_irqB(void) {handle_interrupt_in(PORTB, 32);}
void gpio_irqC(void) {handle_interrupt_in(PORTC, 64);}
void gpio_irqD(void) {handle_interrupt_in(PORTD, 96);}
void gpio_irqE(void) {handle_interrupt_in(PORTE, 128);}
void gpio_irqA(void) {
handle_interrupt_in(PORTA, 0);
}
void gpio_irqB(void)
{
handle_interrupt_in(PORTB, 32);
}
void gpio_irqC(void)
{
handle_interrupt_in(PORTC, 64);
}
void gpio_irqD(void)
{
handle_interrupt_in(PORTD, 96);
}
void gpio_irqE(void)
{
handle_interrupt_in(PORTE, 128);
}
int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) {
if (pin == NC)

58
libraries/mbed/targets/hal/TARGET_Freescale/TARGET_K20D5M/serial_api.c
View File

@ -26,12 +26,20 @@
static const PinMap PinMap_UART_TX[] = {
{PTB17, UART_0, 3},
{NC , NC , 0}
{PTC4 , UART_1, 3},
{PTD3 , UART_2, 3},
{PTD7 , UART_0, 3},
{PTE0 , UART_1, 3},
{NC , NC , 0}
};
static const PinMap PinMap_UART_RX[] = {
{PTB16, UART_0, 3},
{NC , NC , 0}
{PTC3 , UART_1, 3},
{PTD2 , UART_2, 3},
{PTD6 , UART_0, 3},
{PTE1 , UART_1, 3},
{NC , NC , 0}
};
#define UART_NUM 3
@ -52,18 +60,33 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) {
obj->uart = (UART_Type *)uart;
// enable clk
switch (uart) {
case UART_0: SIM->SOPT2 |= SIM_SOPT2_PLLFLLSEL_MASK;
SIM->SCGC5 |= SIM_SCGC5_PORTA_MASK; SIM->SCGC4 |= SIM_SCGC4_UART0_MASK; break;
case UART_1: SIM->SCGC5 |= SIM_SCGC5_PORTC_MASK; SIM->SCGC4 |= SIM_SCGC4_UART1_MASK; break;
case UART_2: SIM->SCGC5 |= SIM_SCGC5_PORTD_MASK; SIM->SCGC4 |= SIM_SCGC4_UART2_MASK; break;
case UART_0:
SIM->SOPT2 |= SIM_SOPT2_PLLFLLSEL_MASK;
SIM->SCGC5 |= SIM_SCGC5_PORTA_MASK;
SIM->SCGC4 |= SIM_SCGC4_UART0_MASK;
break;
case UART_1:
SIM->SCGC5 |= SIM_SCGC5_PORTC_MASK;
SIM->SCGC4 |= SIM_SCGC4_UART1_MASK;
break;
case UART_2:
SIM->SCGC5 |= SIM_SCGC5_PORTD_MASK;
SIM->SCGC4 |= SIM_SCGC4_UART2_MASK;
break;
}
// Disable UART before changing registers
obj->uart->C2 &= ~(UART_C2_RE_MASK | UART_C2_TE_MASK);
switch (uart) {
case UART_0: obj->index = 0; break;
case UART_1: obj->index = 1; break;
case UART_2: obj->index = 2; break;
case UART_0:
obj->index = 0;
break;
case UART_1:
obj->index = 1;
break;
case UART_2:
obj->index = 2;
break;
}
// set default baud rate and format
@ -131,9 +154,20 @@ void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_b
uint32_t parity_enable, parity_select;
switch (parity) {
case ParityNone: parity_enable = 0; parity_select = 0; break;
case ParityOdd : parity_enable = 1; parity_select = 1; data_bits++; break;
case ParityEven: parity_enable = 1; parity_select = 0; data_bits++; break;
case ParityNone:
parity_enable = 0;
parity_select = 0;
break;
case ParityOdd :
parity_enable = 1;
parity_select = 1;
data_bits++;
break;
case ParityEven:
parity_enable = 1;
parity_select = 0;
data_bits++;
break;
default:
break;
}