mirror of https://github.com/ARMmbed/mbed-os.git
Fixed #9 and test ticker test code
Clean-up GPIO stuff, but it shoud be same behavior as before.pull/17/head
parent
796bbbeb0d
commit
794ab9cbd3
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@ -27,55 +27,57 @@ typedef enum {
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PIN_OUTPUT
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PIN_OUTPUT
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} PinDirection;
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} PinDirection;
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#define PORT_SHIFT 5
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#define PORT_SHIFT 12
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#define PIN_SHIFT 8
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typedef enum {
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typedef enum {
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// LPC1114 Pin Names (PORT[15:12] + PIN[11:8] + IOCON offset[7:0])
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// LPC1114 Pin Names (PORT[15:12] + PIN[11:8] + IOCON offset[7:0])
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P0_0 = 0x000c,
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P0_1 = 0x0110,
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P0_2 = 0x021c,
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P0_3 = 0x032c,
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P0_4 = 0x0430,
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P0_5 = 0x0534,
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P0_6 = 0x064c,
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P0_7 = 0x0750,
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P0_8 = 0x0860,
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P0_9 = 0x0964,
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P0_10 = 0x0a68,
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P0_11 = 0x0b74,
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P1_0 = 0x1078,
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P0_0 = (0 << PORT_SHIFT) | (0 << PIN_SHIFT) | 0x0c,
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P1_1 = 0x117c,
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P0_1 = (0 << PORT_SHIFT) | (1 << PIN_SHIFT) | 0x10,
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P1_2 = 0x1280,
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P0_2 = (0 << PORT_SHIFT) | (2 << PIN_SHIFT) | 0x1c,
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P1_3 = 0x1390,
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P0_3 = (0 << PORT_SHIFT) | (3 << PIN_SHIFT) | 0x2c,
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P1_4 = 0x1494,
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P0_4 = (0 << PORT_SHIFT) | (4 << PIN_SHIFT) | 0x30,
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P1_5 = 0x15a0,
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P0_5 = (0 << PORT_SHIFT) | (5 << PIN_SHIFT) | 0x34,
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P1_6 = 0x16a4,
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P0_6 = (0 << PORT_SHIFT) | (6 << PIN_SHIFT) | 0x4c,
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P1_7 = 0x17a8,
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P0_7 = (0 << PORT_SHIFT) | (7 << PIN_SHIFT) | 0x50,
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P1_8 = 0x1814,
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P0_8 = (0 << PORT_SHIFT) | (8 << PIN_SHIFT) | 0x60,
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P1_9 = 0x1938,
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P0_9 = (0 << PORT_SHIFT) | (9 << PIN_SHIFT) | 0x64,
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P1_10 = 0x1a6c,
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P0_10 = (0 << PORT_SHIFT) | (10 << PIN_SHIFT) | 0x68,
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P1_11 = 0x1b98,
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P0_11 = (0 << PORT_SHIFT) | (11 << PIN_SHIFT) | 0x74,
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P2_0 = 0x2008,
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P1_0 = (1 << PORT_SHIFT) | (0 << PIN_SHIFT) | 0x78,
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P2_1 = 0x2128,
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P1_1 = (1 << PORT_SHIFT) | (1 << PIN_SHIFT) | 0x7c,
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P2_2 = 0x225c,
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P1_2 = (1 << PORT_SHIFT) | (2 << PIN_SHIFT) | 0x80,
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P2_3 = 0x238c,
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P1_3 = (1 << PORT_SHIFT) | (3 << PIN_SHIFT) | 0x90,
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P2_4 = 0x2440,
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P1_4 = (1 << PORT_SHIFT) | (4 << PIN_SHIFT) | 0x94,
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P2_5 = 0x2544,
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P1_5 = (1 << PORT_SHIFT) | (5 << PIN_SHIFT) | 0xa0,
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P2_6 = 0x2600,
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P1_6 = (1 << PORT_SHIFT) | (6 << PIN_SHIFT) | 0xa4,
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P2_7 = 0x2720,
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P1_7 = (1 << PORT_SHIFT) | (7 << PIN_SHIFT) | 0xa8,
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P2_8 = 0x2824,
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P1_8 = (1 << PORT_SHIFT) | (8 << PIN_SHIFT) | 0x14,
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P2_9 = 0x2954,
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P1_9 = (1 << PORT_SHIFT) | (9 << PIN_SHIFT) | 0x38,
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P2_10 = 0x2a58,
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P1_10 = (1 << PORT_SHIFT) | (10 << PIN_SHIFT) | 0x6c,
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P2_11 = 0x2b70,
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P1_11 = (1 << PORT_SHIFT) | (11 << PIN_SHIFT) | 0x98,
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P3_0 = 0x3084,
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P2_0 = (2 << PORT_SHIFT) | (0 << PIN_SHIFT) | 0x08,
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P3_1 = 0x3188,
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P2_1 = (2 << PORT_SHIFT) | (1 << PIN_SHIFT) | 0x28,
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P3_2 = 0x329c,
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P2_2 = (2 << PORT_SHIFT) | (2 << PIN_SHIFT) | 0x5c,
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P3_3 = 0x33ac,
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P2_3 = (2 << PORT_SHIFT) | (3 << PIN_SHIFT) | 0x8c,
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P3_4 = 0x343c,
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P2_4 = (2 << PORT_SHIFT) | (4 << PIN_SHIFT) | 0x40,
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P3_5 = 0x3548,
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P2_5 = (2 << PORT_SHIFT) | (5 << PIN_SHIFT) | 0x44,
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P2_6 = (2 << PORT_SHIFT) | (6 << PIN_SHIFT) | 0x00,
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P2_7 = (2 << PORT_SHIFT) | (7 << PIN_SHIFT) | 0x20,
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P2_8 = (2 << PORT_SHIFT) | (8 << PIN_SHIFT) | 0x24,
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P2_9 = (2 << PORT_SHIFT) | (9 << PIN_SHIFT) | 0x54,
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P2_10 = (2 << PORT_SHIFT) | (10 << PIN_SHIFT) | 0x58,
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P2_11 = (2 << PORT_SHIFT) | (11 << PIN_SHIFT) | 0x70,
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P3_0 = (3 << PORT_SHIFT) | (0 << PIN_SHIFT) | 0x84,
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P3_1 = (3 << PORT_SHIFT) | (1 << PIN_SHIFT) | 0x88,
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P3_2 = (3 << PORT_SHIFT) | (2 << PIN_SHIFT) | 0x9c,
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P3_3 = (3 << PORT_SHIFT) | (3 << PIN_SHIFT) | 0xac,
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P3_4 = (3 << PORT_SHIFT) | (4 << PIN_SHIFT) | 0x3c,
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P3_5 = (3 << PORT_SHIFT) | (5 << PIN_SHIFT) | 0x48,
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// mbed DIP Pin Names (CQ board)
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// mbed DIP Pin Names (CQ board)
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p4 = P0_0,
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p4 = P0_0,
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@ -28,41 +28,18 @@ uint32_t gpio_set(PinName pin) {
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(1) : (0);
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(1) : (0);
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pin_function(pin, f);
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pin_function(pin, f);
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return ((pin & 0x0F00) >> 8);
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int pin_number = ((pin & 0x0F00) >> 8);
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return (pin_number + 1); // port n data address offset
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}
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}
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void gpio_init(gpio_t *obj, PinName pin, PinDirection direction) {
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void gpio_init(gpio_t *obj, PinName pin, PinDirection direction) {
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if(pin == NC) return;
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if(pin == NC) return;
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obj->pin = pin;
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obj->pin = pin;
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LPC_GPIO_TypeDef *port_reg = ((LPC_GPIO_TypeDef *) LPC_GPIO0_BASE + (((pin & 0xF000) >> PORT_SHIFT) * 0x10000));
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LPC_GPIO_TypeDef *port_reg;
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obj->reg_mask_read = &port_reg->MASKED_ACCESS[gpio_set(pin) + 1];
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switch (pin & 0xF000) {
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case 0x0000:
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port_reg = LPC_GPIO0;
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break;
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case 0x1000:
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port_reg = LPC_GPIO1;
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break;
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case 0x2000:
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port_reg = LPC_GPIO2;
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break;
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case 0x3000:
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port_reg = LPC_GPIO3;
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break;
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default:
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return;
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}
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#warning TODO (@toyowata): Need to check array offset
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obj->mask = &port_reg->MASKED_ACCESS[gpio_set(pin)];
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obj->reg_dir = &port_reg->DIR;
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obj->reg_dir = &port_reg->DIR;
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obj->reg_in = &port_reg->DATA;
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obj->reg_write = &port_reg->DATA;
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obj->reg_data= &port_reg->DATA;
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gpio_dir(obj, direction);
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gpio_dir(obj, direction);
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@ -22,22 +22,21 @@ extern "C" {
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typedef struct {
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typedef struct {
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PinName pin;
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PinName pin;
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__IO uint32_t *mask;
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__I uint32_t *reg_mask_read;
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__IO uint32_t *reg_dir;
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__IO uint32_t *reg_dir;
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__IO uint32_t *reg_data;
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__IO uint32_t *reg_write;
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__I uint32_t *reg_in;
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} gpio_t;
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} gpio_t;
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static inline void gpio_write(gpio_t *obj, int value) {
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static inline void gpio_write(gpio_t *obj, int value) {
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uint32_t pin_number = ((obj->pin & 0x0F00) >> 8);
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uint32_t pin_number = ((obj->pin & 0x0F00) >> 8);
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if (value)
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if (value)
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*obj->reg_data |= (1 << pin_number);
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*obj->reg_write |= (1 << pin_number);
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else
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else
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*obj->reg_data &= ~(1 << pin_number);
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*obj->reg_write &= ~(1 << pin_number);
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}
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}
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static inline int gpio_read(gpio_t *obj) {
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static inline int gpio_read(gpio_t *obj) {
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return ((*obj->mask) ? 1 : 0);
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return ((*obj->reg_mask_read) ? 1 : 0);
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}
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}
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#ifdef __cplusplus
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#ifdef __cplusplus
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