mirror of https://github.com/ARMmbed/mbed-os.git
Arto Kinnunen
parent
6275f710bf
commit
78abc43c32
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@ -49,16 +49,16 @@ using namespace rtos;
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#endif
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#ifdef TEST_GPIOS_ENABLED
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#define TEST_TX_STARTED rf->TEST1 = 1;
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#define TEST_TX_DONE rf->TEST1 = 0;
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#define TEST_RX_STARTED rf->TEST2 = 1;
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#define TEST_RX_DONE rf->TEST2 = 0;
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#define TEST_ACK_TX_STARTED rf->TEST3 = 1;
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#define TEST_ACK_TX_DONE rf->TEST3 = 0;
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#define TEST1_ON rf->TEST4 = 1;
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#define TEST1_OFF rf->TEST4 = 0;
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#define TEST2_ON rf->TEST5 = 1;
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#define TEST2_OFF rf->TEST5 = 0;
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#define TEST_TX_STARTED test_pins->TEST1 = 1;
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#define TEST_TX_DONE test_pins->TEST1 = 0;
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#define TEST_RX_STARTED test_pins->TEST2 = 1;
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#define TEST_RX_DONE test_pins->TEST2 = 0;
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#define TEST_CSMA_STARTED test_pins->TEST3 = 1;
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#define TEST_CSMA_DONE test_pins->TEST3 = 0;
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#define TEST_SPARE_1_ON test_pins->TEST4 = 1;
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#define TEST_SPARE_1_OFF test_pins->TEST4 = 0;
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#define TEST_SPARE_2_ON test_pins->TEST5 = 1;
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#define TEST_SPARE_2_OFF test_pins->TEST5 = 0;
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extern void (*fhss_uc_switch)(void);
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extern void (*fhss_bc_switch)(void);
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#else //TEST_GPIOS_ENABLED
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@ -66,12 +66,12 @@ extern void (*fhss_bc_switch)(void);
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#define TEST_TX_DONE
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#define TEST_RX_STARTED
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#define TEST_RX_DONE
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#define TEST_ACK_TX_STARTED
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#define TEST_ACK_TX_DONE
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#define TEST1_ON
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#define TEST1_OFF
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#define TEST2_ON
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#define TEST2_OFF
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#define TEST_CSMA_STARTED
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#define TEST_CSMA_DONE
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#define TEST_SPARE_1_ON
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#define TEST_SPARE_1_OFF
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#define TEST_SPARE_2_ON
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#define TEST_SPARE_2_OFF
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#endif //TEST_GPIOS_ENABLED
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#define MAC_FRAME_TYPE_MASK 0x07
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@ -116,21 +116,11 @@ class RFPins {
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public:
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RFPins(PinName spi_sdi, PinName spi_sdo,
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PinName spi_sclk, PinName spi_cs, PinName spi_sdn,
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#ifdef TEST_GPIOS_ENABLED
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PinName spi_test1, PinName spi_test2, PinName spi_test3, PinName spi_test4, PinName spi_test5,
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#endif //TEST_GPIOS_ENABLED
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PinName spi_gpio0, PinName spi_gpio1, PinName spi_gpio2,
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PinName spi_gpio3);
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UnlockedSPI spi;
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DigitalOut CS;
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DigitalOut SDN;
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#ifdef TEST_GPIOS_ENABLED
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DigitalOut TEST1;
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DigitalOut TEST2;
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DigitalOut TEST3;
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DigitalOut TEST4;
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DigitalOut TEST5;
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#endif //TEST_GPIOS_ENABLED
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InterruptIn RF_S2LP_GPIO0;
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InterruptIn RF_S2LP_GPIO1;
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InterruptIn RF_S2LP_GPIO2;
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@ -145,21 +135,11 @@ public:
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RFPins::RFPins(PinName spi_sdi, PinName spi_sdo,
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PinName spi_sclk, PinName spi_cs, PinName spi_sdn,
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#ifdef TEST_GPIOS_ENABLED
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PinName spi_test1, PinName spi_test2, PinName spi_test3, PinName spi_test4, PinName spi_test5,
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#endif //TEST_GPIOS_ENABLED
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PinName spi_gpio0, PinName spi_gpio1, PinName spi_gpio2,
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PinName spi_gpio3)
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: spi(spi_sdi, spi_sdo, spi_sclk),
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CS(spi_cs),
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SDN(spi_sdn),
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#ifdef TEST_GPIOS_ENABLED
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TEST1(spi_test1),
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TEST2(spi_test2),
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TEST3(spi_test3),
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TEST4(spi_test4),
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TEST5(spi_test5),
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#endif //TEST_GPIOS_ENABLED
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RF_S2LP_GPIO0(spi_gpio0),
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RF_S2LP_GPIO1(spi_gpio1),
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RF_S2LP_GPIO2(spi_gpio2),
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@ -169,6 +149,25 @@ RFPins::RFPins(PinName spi_sdi, PinName spi_sdo,
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irq_thread.start(mbed::callback(this, &RFPins::rf_irq_task));
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}
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class TestPins_S2LP {
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public:
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TestPins_S2LP(PinName test_pin_1, PinName test_pin_2, PinName test_pin_3, PinName test_pin_4, PinName test_pin_5);
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DigitalOut TEST1;
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DigitalOut TEST2;
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DigitalOut TEST3;
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DigitalOut TEST4;
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DigitalOut TEST5;
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};
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TestPins_S2LP::TestPins_S2LP(PinName test_pin_1, PinName test_pin_2, PinName test_pin_3, PinName test_pin_4, PinName test_pin_5)
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: TEST1(test_pin_1),
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TEST2(test_pin_2),
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TEST3(test_pin_3),
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TEST4(test_pin_4),
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TEST5(test_pin_5)
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{
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}
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static uint8_t rf_read_register(uint8_t addr);
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static s2lp_states_e rf_read_state(void);
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static void rf_write_register(uint8_t addr, uint8_t data);
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@ -183,6 +182,7 @@ static bool rf_rx_filter(uint8_t *mac_header, uint8_t *mac_64bit_addr, uint8_t *
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static void rf_cca_timer_start(uint32_t slots);
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static RFPins *rf;
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static TestPins_S2LP *test_pins;
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static phy_device_driver_s device_driver;
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static int8_t rf_radio_driver_id = -1;
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static uint8_t *tx_data_ptr;
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@ -246,20 +246,20 @@ static void rf_irq_task_process_irq();
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#define ACK_SENDING_TIME (uint32_t)(8000000/phy_subghz.datarate)*ACK_FRAME_LENGTH + PACKET_SENDING_EXTRA_TIME
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#ifdef TEST_GPIOS_ENABLED
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void test1_toggle(void)
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static void test1_toggle(void)
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{
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if (rf->TEST4) {
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rf->TEST4 = 0;
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if (test_pins->TEST4) {
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test_pins->TEST4 = 0;
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} else {
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rf->TEST4 = 1;
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test_pins->TEST4 = 1;
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}
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}
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void test2_toggle(void)
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static void test2_toggle(void)
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{
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if (rf->TEST5) {
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rf->TEST5 = 0;
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if (test_pins->TEST5) {
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test_pins->TEST5 = 0;
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} else {
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rf->TEST5 = 1;
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test_pins->TEST5 = 1;
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}
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}
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#endif //TEST_GPIOS_ENABLED
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@ -749,19 +749,18 @@ static int8_t rf_interface_state_control(phy_interface_state_e new_state, uint8_
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static void rf_tx_sent_handler(void)
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{
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TEST_TX_DONE
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rf_backup_timer_stop();
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rf_disable_interrupt(TX_DATA_SENT);
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if (rf_state != RF_TX_ACK) {
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tx_finnish_time = rf_get_timestamp();
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rf_update_tx_active_time();
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TEST_TX_DONE
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rf_state = RF_IDLE;
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rf_receive(rf_rx_channel);
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if (device_driver.phy_tx_done_cb) {
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device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_TX_SUCCESS, 0, 0);
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}
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} else {
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TEST_ACK_TX_DONE
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rf_receive(rf_rx_channel);
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}
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}
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@ -807,6 +806,7 @@ static int rf_cca_check(void)
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static void rf_cca_timer_interrupt(void)
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{
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TEST_CSMA_DONE
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int8_t status = device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_CCA_PREPARE, 0, 0);
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if (status == PHY_TX_NOT_ALLOWED) {
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rf_flush_tx_fifo();
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@ -851,12 +851,14 @@ static void rf_cca_timer_interrupt(void)
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static void rf_cca_timer_stop(void)
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{
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TEST_CSMA_DONE
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rf->cca_timer.detach();
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}
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static void rf_cca_timer_start(uint32_t slots)
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{
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rf->cca_timer.attach_us(rf_cca_timer_signal, slots);
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TEST_CSMA_STARTED
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}
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static void rf_backup_timer_interrupt(void)
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@ -941,7 +943,7 @@ static void rf_send_ack(uint8_t seq)
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rf_write_packet_length(sizeof(ack_frame) + 4);
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tx_data_ptr = NULL;
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rf_start_tx();
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TEST_ACK_TX_STARTED
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TEST_TX_STARTED
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rf_backup_timer_start(ACK_SENDING_TIME);
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if (device_driver.phy_rf_statistics) {
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device_driver.phy_rf_statistics->tx_bytes += sizeof(ack_frame);
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@ -1278,6 +1280,7 @@ int8_t NanostackRfPhys2lp::rf_register()
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}
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rf = _rf;
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test_pins = _test_pins;
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int8_t radio_id = rf_device_register(_mac_addr);
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if (radio_id < 0) {
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@ -1300,9 +1303,6 @@ void NanostackRfPhys2lp::rf_unregister()
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}
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NanostackRfPhys2lp::NanostackRfPhys2lp(PinName spi_sdi, PinName spi_sdo, PinName spi_sclk, PinName spi_cs, PinName spi_sdn
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#ifdef TEST_GPIOS_ENABLED
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,PinName spi_test1, PinName spi_test2, PinName spi_test3, PinName spi_test4, PinName spi_test5
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#endif //TEST_GPIOS_ENABLED
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,PinName spi_gpio0, PinName spi_gpio1, PinName spi_gpio2, PinName spi_gpio3
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#ifdef AT24MAC
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,PinName i2c_sda, PinName i2c_scl
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@ -1314,16 +1314,12 @@ NanostackRfPhys2lp::NanostackRfPhys2lp(PinName spi_sdi, PinName spi_sdo, PinName
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#endif //AT24MAC
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_mac_addr(), _rf(NULL), _mac_set(false),
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_spi_sdi(spi_sdi), _spi_sdo(spi_sdo), _spi_sclk(spi_sclk), _spi_cs(spi_cs), _spi_sdn(spi_sdn),
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#ifdef TEST_GPIOS_ENABLED
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_spi_test1(spi_test1), _spi_test2(spi_test2), _spi_test3(spi_test3), _spi_test4(spi_test4), _spi_test5(spi_test5),
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#endif //TEST_GPIOS_ENABLED
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_spi_gpio0(spi_gpio0), _spi_gpio1(spi_gpio1), _spi_gpio2(spi_gpio2), _spi_gpio3(spi_gpio3)
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{
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_rf = new RFPins(_spi_sdi, _spi_sdo, _spi_sclk, _spi_cs, _spi_sdn,
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_rf = new RFPins(_spi_sdi, _spi_sdo, _spi_sclk, _spi_cs, _spi_sdn, _spi_gpio0, _spi_gpio1, _spi_gpio2, _spi_gpio3);
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#ifdef TEST_GPIOS_ENABLED
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_spi_test1, _spi_test2, _spi_test3, _spi_test4, _spi_test5,
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_test_pins = new TestPins_S2LP(TEST_PIN_TX, TEST_PIN_RX, TEST_PIN_CSMA, TEST_PIN_SPARE_1, TEST_PIN_SPARE_2);
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#endif //TEST_GPIOS_ENABLED
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_spi_gpio0, _spi_gpio1, _spi_gpio2, _spi_gpio3);
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}
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NanostackRfPhys2lp::~NanostackRfPhys2lp()
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@ -1428,9 +1424,6 @@ static bool rf_rx_filter(uint8_t *mac_header, uint8_t *mac_64bit_addr, uint8_t *
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NanostackRfPhy &NanostackRfPhy::get_default_instance()
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{
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static NanostackRfPhys2lp rf_phy(S2LP_SPI_SDI, S2LP_SPI_SDO, S2LP_SPI_SCLK, S2LP_SPI_CS, S2LP_SPI_SDN
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#ifdef TEST_GPIOS_ENABLED
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,S2LP_SPI_TEST1, S2LP_SPI_TEST2, S2LP_SPI_TEST3, S2LP_SPI_TEST4, S2LP_SPI_TEST5
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#endif //TEST_GPIOS_ENABLED
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,S2LP_SPI_GPIO0, S2LP_SPI_GPIO1, S2LP_SPI_GPIO2, S2LP_SPI_GPIO3
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#ifdef AT24MAC
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,S2LP_I2C_SDA, S2LP_I2C_SCL
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@ -26,98 +26,96 @@
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#include "SPI.h"
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// Uncomment to use testing gpios attached to TX/RX processes
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//#define TEST_GPIOS_ENABLED
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// #define TEST_GPIOS_ENABLED
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#if defined(TARGET_MTB_STM_S2LP)
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#if !defined(S2LP_SPI_SDI)
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#define S2LP_SPI_SDI PA_7
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#define S2LP_SPI_SDI PA_7
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#endif
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#if !defined(S2LP_SPI_SDO)
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#define S2LP_SPI_SDO PA_6
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#define S2LP_SPI_SDO PA_6
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#endif
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#if !defined(S2LP_SPI_SCLK)
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#define S2LP_SPI_SCLK PA_5
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#define S2LP_SPI_SCLK PA_5
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#endif
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#if !defined(S2LP_SPI_CS)
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#define S2LP_SPI_CS PC_0
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#define S2LP_SPI_CS PC_0
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#endif
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#if !defined(S2LP_SPI_SDN)
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#define S2LP_SPI_SDN PF_13
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#define S2LP_SPI_SDN PF_13
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#endif
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#if !defined(S2LP_SPI_GPIO0)
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#define S2LP_SPI_GPIO0 PA_3
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#define S2LP_SPI_GPIO0 PA_3
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#endif
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#if !defined(S2LP_SPI_GPIO1)
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#define S2LP_SPI_GPIO1 PC_3
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#define S2LP_SPI_GPIO1 PC_3
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#endif
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#if !defined(S2LP_SPI_GPIO2)
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#define S2LP_SPI_GPIO2 PF_3
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#define S2LP_SPI_GPIO2 PF_3
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#endif
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#if !defined(S2LP_SPI_GPIO3)
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#define S2LP_SPI_GPIO3 PF_10
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#define S2LP_SPI_GPIO3 PF_10
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#endif
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#if !defined(S2LP_I2C_SDA)
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#define S2LP_I2C_SDA PB_7
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#define S2LP_I2C_SDA PB_7
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#endif
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#if !defined(S2LP_I2C_SCL)
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#define S2LP_I2C_SCL PB_6
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#define S2LP_I2C_SCL PB_6
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#endif
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#define AT24MAC
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#else
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#if !defined(S2LP_SPI_SDI)
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#define S2LP_SPI_SDI D11
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#define S2LP_SPI_SDI D11
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#endif
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#if !defined(S2LP_SPI_SDO)
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#define S2LP_SPI_SDO D12
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#define S2LP_SPI_SDO D12
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#endif
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#if !defined(S2LP_SPI_SCLK)
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#define S2LP_SPI_SCLK D13
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#define S2LP_SPI_SCLK D13
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#endif
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#if !defined(S2LP_SPI_CS)
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#define S2LP_SPI_CS A1
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#define S2LP_SPI_CS A1
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#endif
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#if !defined(S2LP_SPI_SDN)
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#define S2LP_SPI_SDN D7
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#define S2LP_SPI_SDN D7
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#endif
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#if !defined(S2LP_SPI_TEST1)
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#define S2LP_SPI_TEST1 D6
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#if !defined(TEST_PIN_TX)
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#define TEST_PIN_TX D6
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#endif
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#if !defined(S2LP_SPI_TEST2)
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#define S2LP_SPI_TEST2 D5
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#if !defined(TEST_PIN_RX)
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#define TEST_PIN_RX D5
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#endif
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#if !defined(S2LP_SPI_TEST3)
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#define S2LP_SPI_TEST3 D4
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#if !defined(TEST_PIN_CSMA)
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#define TEST_PIN_CSMA D4
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#endif
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#if !defined(S2LP_SPI_TEST4)
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#define S2LP_SPI_TEST4 D2
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#if !defined(TEST_PIN_SPARE_1)
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#define TEST_PIN_SPARE_1 D2
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#endif
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#if !defined(S2LP_SPI_TEST5)
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#define S2LP_SPI_TEST5 D8
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#if !defined(TEST_PIN_SPARE_2)
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#define TEST_PIN_SPARE_2 D8
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#endif
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#if !defined(S2LP_SPI_GPIO0)
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#define S2LP_SPI_GPIO0 A0
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#define S2LP_SPI_GPIO0 A0
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#endif
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#if !defined(S2LP_SPI_GPIO1)
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#define S2LP_SPI_GPIO1 A2
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#define S2LP_SPI_GPIO1 A2
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#endif
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#if !defined(S2LP_SPI_GPIO2)
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#define S2LP_SPI_GPIO2 A3
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#define S2LP_SPI_GPIO2 A3
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#endif
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#if !defined(S2LP_SPI_GPIO3)
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#define S2LP_SPI_GPIO3 A5
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#define S2LP_SPI_GPIO3 A5
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#endif
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#endif
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#include "at24mac_s2lp.h"
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class RFPins;
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class TestPins_S2LP;
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class NanostackRfPhys2lp : public NanostackRfPhy {
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public:
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NanostackRfPhys2lp(PinName spi_sdi, PinName spi_sdo, PinName spi_sclk, PinName spi_cs, PinName spi_sdn
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#ifdef TEST_GPIOS_ENABLED
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,PinName spi_test1, PinName spi_test2, PinName spi_test3, PinName spi_test4, PinName spi_test5
|
||||
#endif //TEST_GPIOS_ENABLED
|
||||
,PinName spi_gpio0, PinName spi_gpio1, PinName spi_gpio2, PinName spi_gpio3
|
||||
#ifdef AT24MAC
|
||||
,PinName i2c_sda, PinName i2c_scl
|
||||
|
|
@ -135,6 +133,7 @@ private:
|
|||
#endif //AT24MAC
|
||||
uint8_t _mac_addr[8];
|
||||
RFPins *_rf;
|
||||
TestPins_S2LP *_test_pins;
|
||||
bool _mac_set;
|
||||
|
||||
const PinName _spi_sdi;
|
||||
|
|
@ -142,13 +141,6 @@ private:
|
|||
const PinName _spi_sclk;
|
||||
const PinName _spi_cs;
|
||||
const PinName _spi_sdn;
|
||||
#ifdef TEST_GPIOS_ENABLED
|
||||
const PinName _spi_test1;
|
||||
const PinName _spi_test2;
|
||||
const PinName _spi_test3;
|
||||
const PinName _spi_test4;
|
||||
const PinName _spi_test5;
|
||||
#endif //TEST_GPIOS_ENABLED
|
||||
const PinName _spi_gpio0;
|
||||
const PinName _spi_gpio1;
|
||||
const PinName _spi_gpio2;
|
||||
|
|
|
|||
Loading…
Reference in New Issue