mirror of https://github.com/ARMmbed/mbed-os.git
[STM32] HAL L0: I2C / DMA updates
This is prelim update before official V1.8.0 HAL to the needed HAL API available as in F0 HAL which is using the same IP.pull/3324/head
Laurent MEUNIER
parent
c57427f77f
commit
77364f9fe2
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@ -2,8 +2,8 @@
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******************************************************************************
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******************************************************************************
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* @file stm32l0xx_hal_dma.c
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* @file stm32l0xx_hal_dma.c
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* @author MCD Application Team
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* @author MCD Application Team
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* @version V1.7.0
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* @version $VERSION$
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* @date 31-May-2016
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* @date $DATE$
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* @brief DMA HAL module driver.
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* @brief DMA HAL module driver.
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*
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*
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* This file provides firmware functions to manage the following
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* This file provides firmware functions to manage the following
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@ -480,6 +480,49 @@ HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
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return HAL_OK;
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return HAL_OK;
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}
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}
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/**
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* @brief Aborts the DMA Transfer in Interrupt mode.
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* @param hdma : pointer to a DMA_HandleTypeDef structure that contains
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* the configuration information for the specified DMA Stream.
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
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{
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HAL_StatusTypeDef status = HAL_OK;
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if(HAL_DMA_STATE_BUSY != hdma->State)
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{
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/* no transfer ongoing */
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hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
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status = HAL_ERROR;
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}
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else
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{
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/* Disable DMA IT */
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__HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
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/* Disable the channel */
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__HAL_DMA_DISABLE(hdma);
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/* Clear all flags */
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__HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_GI_FLAG_INDEX(hdma));
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/* Change the DMA state */
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hdma->State = HAL_DMA_STATE_READY;
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/* Process Unlocked */
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__HAL_UNLOCK(hdma);
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/* Call User Abort callback */
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if(hdma->XferAbortCallback != NULL)
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{
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hdma->XferAbortCallback(hdma);
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}
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}
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return status;
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}
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/**
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/**
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* @brief Polling for transfer complete.
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* @brief Polling for transfer complete.
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* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
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* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
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@ -2,8 +2,8 @@
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******************************************************************************
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******************************************************************************
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* @file stm32l0xx_hal_dma.h
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* @file stm32l0xx_hal_dma.h
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* @author MCD Application Team
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* @author MCD Application Team
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* @version V1.7.0
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* @version $VERSION$
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* @date 31-May-2016
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* @date $DATE$
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* @brief Header file of DMA HAL module.
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* @brief Header file of DMA HAL module.
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******************************************************************************
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******************************************************************************
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* @attention
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* @attention
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@ -139,19 +139,21 @@ typedef struct __DMA_HandleTypeDef
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DMA_InitTypeDef Init; /*!< DMA communication parameters */
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DMA_InitTypeDef Init; /*!< DMA communication parameters */
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HAL_LockTypeDef Lock; /*!< DMA locking object */
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HAL_LockTypeDef Lock; /*!< DMA locking object */
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__IO HAL_DMA_StateTypeDef State; /*!< DMA transfer state */
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__IO HAL_DMA_StateTypeDef State; /*!< DMA transfer state */
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void *Parent; /*!< Parent object state */
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void *Parent; /*!< Parent object state */
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void (* XferCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer complete callback */
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void (* XferCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer complete callback */
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void (* XferHalfCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA Half transfer complete callback */
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void (* XferHalfCpltCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA Half transfer complete callback */
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void (* XferErrorCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer error callback */
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void (* XferErrorCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer error callback */
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__IO uint32_t ErrorCode; /*!< DMA Error code */
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void (* XferAbortCallback)( struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer abort callback */
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__IO uint32_t ErrorCode; /*!< DMA Error code */
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} DMA_HandleTypeDef;
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} DMA_HandleTypeDef;
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@ -170,6 +172,7 @@ typedef struct __DMA_HandleTypeDef
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*/
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*/
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#define HAL_DMA_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */
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#define HAL_DMA_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */
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#define HAL_DMA_ERROR_TE ((uint32_t)0x00000001U) /*!< Transfer error */
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#define HAL_DMA_ERROR_TE ((uint32_t)0x00000001U) /*!< Transfer error */
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#define HAL_DMA_ERROR_NO_XFER ((uint32_t)0x00000004U) /*!< no ongoing transfer */
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#define HAL_DMA_ERROR_TIMEOUT ((uint32_t)0x00000020U) /*!< Timeout error */
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#define HAL_DMA_ERROR_TIMEOUT ((uint32_t)0x00000020U) /*!< Timeout error */
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#if defined (STM32L011xx) || defined (STM32L021xx)
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#if defined (STM32L011xx) || defined (STM32L021xx)
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@ -643,6 +646,7 @@ HAL_StatusTypeDef HAL_DMA_DeInit (DMA_HandleTypeDef *hdma);
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HAL_StatusTypeDef HAL_DMA_Start (DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
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HAL_StatusTypeDef HAL_DMA_Start (DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
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HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
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HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
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HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma);
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HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma);
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HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma);
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HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout);
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HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout);
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void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma);
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void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma);
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/**
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/**
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File diff suppressed because it is too large
Load Diff
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@ -2,8 +2,8 @@
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******************************************************************************
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******************************************************************************
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* @file stm32l0xx_hal_i2c.h
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* @file stm32l0xx_hal_i2c.h
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* @author MCD Application Team
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* @author MCD Application Team
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* @version V1.7.0
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* @version $VERSION$
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* @date 31-May-2016
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* @date $DATE$
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* @brief Header file of I2C HAL module.
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* @brief Header file of I2C HAL module.
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******************************************************************************
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******************************************************************************
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* @attention
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* @attention
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@ -33,7 +33,7 @@
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*
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******************************************************************************
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******************************************************************************
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*/
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32L0xx_HAL_I2C_H
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#ifndef __STM32L0xx_HAL_I2C_H
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* @{
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* @{
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*/
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*/
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/** @defgroup I2C I2C
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/** @addtogroup I2C
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* @{
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* @{
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*/
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*/
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/* Exported types ------------------------------------------------------------*/
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/* Exported types ------------------------------------------------------------*/
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/** @defgroup I2C_Exported_Types I2C Exported Types
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/** @defgroup I2C_Exported_Types I2C Exported Types
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* @{
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* @{
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*/
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*/
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This parameter can be a 7-bit or 10-bit address. */
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This parameter can be a 7-bit or 10-bit address. */
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uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected.
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uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected.
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This parameter can be a value of @ref I2C_addressing_mode */
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This parameter can be a value of @ref I2C_ADDRESSING_MODE */
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uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected.
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uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected.
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This parameter can be a value of @ref I2C_dual_addressing_mode */
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This parameter can be a value of @ref I2C_DUAL_ADDRESSING_MODE */
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uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected
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uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected
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This parameter can be a 7-bit address. */
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This parameter can be a 7-bit address. */
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uint32_t OwnAddress2Masks; /*!< Specifies the acknoledge mask address second device own address if dual addressing mode is selected
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uint32_t OwnAddress2Masks; /*!< Specifies the acknowledge mask address second device own address if dual addressing mode is selected
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This parameter can be a value of @ref I2C_own_address2_masks */
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This parameter can be a value of @ref I2C_OWN_ADDRESS2_MASKS */
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uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected.
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uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected.
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This parameter can be a value of @ref I2C_general_call_addressing_mode */
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This parameter can be a value of @ref I2C_GENERAL_CALL_ADDRESSING_MODE */
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uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected.
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uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected.
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This parameter can be a value of @ref I2C_nostretch_mode */
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This parameter can be a value of @ref I2C_NOSTRETCH_MODE */
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}I2C_InitTypeDef;
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}I2C_InitTypeDef;
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*/
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*/
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/** @defgroup HAL_state_structure_definition HAL state structure definition
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/** @defgroup HAL_state_structure_definition HAL state structure definition
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* @brief HAL State structure definition
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* @brief HAL State structure definition
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* @note HAL I2C State value coding follow below described bitmap :\n
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* b7-b6 Error information\n
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* 00 : No Error\n
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* 01 : Abort (Abort user request on going)\n
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* 10 : Timeout\n
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* 11 : Error\n
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* b5 IP initilisation status\n
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* 0 : Reset (IP not initialized)\n
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* 1 : Init done (IP initialized and ready to use. HAL I2C Init function called)\n
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* b4 (not used)\n
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* x : Should be set to 0\n
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* b3\n
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* 0 : Ready or Busy (No Listen mode ongoing)\n
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* 1 : Listen (IP in Address Listen Mode)\n
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* b2 Intrinsic process state\n
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* 0 : Ready\n
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* 1 : Busy (IP busy with some configuration or internal operations)\n
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* b1 Rx state\n
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* 0 : Ready (no Rx operation ongoing)\n
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* 1 : Busy (Rx operation ongoing)\n
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* b0 Tx state\n
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* 0 : Ready (no Tx operation ongoing)\n
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* 1 : Busy (Tx operation ongoing)
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* @{
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* @{
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*/
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*/
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typedef enum
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typedef enum
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{
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{
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HAL_I2C_STATE_RESET = 0x00U, /*!< I2C not yet initialized or disabled */
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HAL_I2C_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */
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HAL_I2C_STATE_READY = 0x01U, /*!< I2C initialized and ready for use */
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HAL_I2C_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use */
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HAL_I2C_STATE_BUSY = 0x02U, /*!< I2C internal process is ongoing */
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HAL_I2C_STATE_BUSY = 0x24U, /*!< An internal process is ongoing */
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HAL_I2C_STATE_MASTER_BUSY_TX = 0x12U, /*!< Master Data Transmission process is ongoing */
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HAL_I2C_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing */
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HAL_I2C_STATE_MASTER_BUSY_RX = 0x22U, /*!< Master Data Reception process is ongoing */
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HAL_I2C_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */
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HAL_I2C_STATE_SLAVE_BUSY_TX = 0x32U, /*!< Slave Data Transmission process is ongoing */
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HAL_I2C_STATE_LISTEN = 0x28U, /*!< Address Listen Mode is ongoing */
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HAL_I2C_STATE_SLAVE_BUSY_RX = 0x42U, /*!< Slave Data Reception process is ongoing */
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HAL_I2C_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission
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HAL_I2C_STATE_MEM_BUSY_TX = 0x52U, /*!< Memory Data Transmission process is ongoing */
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process is ongoing */
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HAL_I2C_STATE_MEM_BUSY_RX = 0x62U, /*!< Memory Data Reception process is ongoing */
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HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception
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HAL_I2C_STATE_TIMEOUT = 0x03U, /*!< Timeout state */
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process is ongoing */
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HAL_I2C_STATE_ERROR = 0x04U /*!< Reception process is ongoing */
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HAL_I2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */
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HAL_I2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */
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HAL_I2C_STATE_ERROR = 0xE0U /*!< Error */
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}HAL_I2C_StateTypeDef;
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}HAL_I2C_StateTypeDef;
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/**
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/**
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* @}
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* @}
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*/
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*/
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/** @defgroup I2C_Error_Code I2C Error Code
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/** @defgroup HAL_mode_structure_definition HAL mode structure definition
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* @brief I2C Error Code
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* @brief HAL Mode structure definition
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* @{
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* @note HAL I2C Mode value coding follow below described bitmap :\n
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*/
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* b7 (not used)\n
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#define HAL_I2C_ERROR_NONE 0x00U /*!< No error */
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* x : Should be set to 0\n
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#define HAL_I2C_ERROR_BERR 0x01U /*!< BERR error */
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* b6\n
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#define HAL_I2C_ERROR_ARLO 0x02U /*!< ARLO error */
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* 0 : None\n
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#define HAL_I2C_ERROR_AF 0x04U /*!< ACKF error */
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* 1 : Memory (HAL I2C communication is in Memory Mode)\n
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#define HAL_I2C_ERROR_OVR 0x08U /*!< OVR error */
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* b5\n
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#define HAL_I2C_ERROR_DMA 0x10U /*!< DMA transfer error */
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* 0 : None\n
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#define HAL_I2C_ERROR_TIMEOUT 0x20U /*!< Timeout error */
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* 1 : Slave (HAL I2C communication is in Slave Mode)\n
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#define HAL_I2C_ERROR_SIZE 0x40U /*!< Size Management error */
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* b4\n
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/**
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* 0 : None\n
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* @}
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* 1 : Master (HAL I2C communication is in Master Mode)\n
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*/
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* b3-b2-b1-b0 (not used)\n
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* xxxx : Should be set to 0000
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/** @defgroup I2C_handle_Structure_definition I2C handle Structure definition
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* @brief I2C handle Structure definition
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* @{
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* @{
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*/
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*/
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typedef struct
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typedef enum
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{
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{
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I2C_TypeDef *Instance; /*!< I2C registers base address */
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HAL_I2C_MODE_NONE = 0x00U, /*!< No I2C communication on going */
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HAL_I2C_MODE_MASTER = 0x10U, /*!< I2C communication is in Master Mode */
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I2C_InitTypeDef Init; /*!< I2C communication parameters */
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HAL_I2C_MODE_SLAVE = 0x20U, /*!< I2C communication is in Slave Mode */
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HAL_I2C_MODE_MEM = 0x40U /*!< I2C communication is in Memory Mode */
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uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */
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uint16_t XferSize; /*!< I2C transfer size */
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__IO uint16_t XferCount; /*!< I2C transfer counter */
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DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */
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DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */
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HAL_LockTypeDef Lock; /*!< I2C locking object */
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__IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */
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__IO uint32_t ErrorCode; /*!< I2C Error code, see I2C_Error_Code */
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}HAL_I2C_ModeTypeDef;
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/**
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* @}
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*/
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/** @defgroup I2C_Error_Code_definition I2C Error Code definition
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* @brief I2C Error Code definition
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* @{
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*/
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#define HAL_I2C_ERROR_NONE (0x00000000U) /*!< No error */
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#define HAL_I2C_ERROR_BERR (0x00000001U) /*!< BERR error */
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#define HAL_I2C_ERROR_ARLO (0x00000002U) /*!< ARLO error */
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#define HAL_I2C_ERROR_AF (0x00000004U) /*!< ACKF error */
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#define HAL_I2C_ERROR_OVR (0x00000008U) /*!< OVR error */
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#define HAL_I2C_ERROR_DMA (0x00000010U) /*!< DMA transfer error */
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#define HAL_I2C_ERROR_TIMEOUT (0x00000020U) /*!< Timeout error */
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#define HAL_I2C_ERROR_SIZE (0x00000040U) /*!< Size Management error */
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/**
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* @}
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*/
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/** @defgroup I2C_handle_Structure_definition I2C handle Structure definition
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* @brief I2C handle Structure definition
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* @{
|
||||||
|
*/
|
||||||
|
typedef struct __I2C_HandleTypeDef
|
||||||
|
{
|
||||||
|
I2C_TypeDef *Instance; /*!< I2C registers base address */
|
||||||
|
|
||||||
|
I2C_InitTypeDef Init; /*!< I2C communication parameters */
|
||||||
|
|
||||||
|
uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */
|
||||||
|
|
||||||
|
uint16_t XferSize; /*!< I2C transfer size */
|
||||||
|
|
||||||
|
__IO uint16_t XferCount; /*!< I2C transfer counter */
|
||||||
|
|
||||||
|
__IO uint32_t XferOptions; /*!< I2C sequantial transfer options, this parameter can
|
||||||
|
be a value of @ref I2C_XFEROPTIONS */
|
||||||
|
|
||||||
|
__IO uint32_t PreviousState; /*!< I2C communication Previous state */
|
||||||
|
|
||||||
|
HAL_StatusTypeDef (*XferISR)(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources); /*!< I2C transfer IRQ handler function pointer */
|
||||||
|
|
||||||
|
DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */
|
||||||
|
|
||||||
|
DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */
|
||||||
|
|
||||||
|
HAL_LockTypeDef Lock; /*!< I2C locking object */
|
||||||
|
|
||||||
|
__IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */
|
||||||
|
|
||||||
|
__IO HAL_I2C_ModeTypeDef Mode; /*!< I2C communication mode */
|
||||||
|
|
||||||
|
__IO uint32_t ErrorCode; /*!< I2C Error code */
|
||||||
|
|
||||||
|
__IO uint32_t AddrEventCount; /*!< I2C Address Event counter */
|
||||||
}I2C_HandleTypeDef;
|
}I2C_HandleTypeDef;
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
|
|
@ -169,32 +235,44 @@ typedef struct
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
/* Exported constants --------------------------------------------------------*/
|
/* Exported constants --------------------------------------------------------*/
|
||||||
|
|
||||||
/** @defgroup I2C_Exported_Constants I2C Exported Constants
|
/** @defgroup I2C_Exported_Constants I2C Exported Constants
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/** @defgroup I2C_addressing_mode I2C addressing mode
|
/** @defgroup I2C_XFEROPTIONS I2C Sequential Transfer Options
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
#define I2C_ADDRESSINGMODE_7BIT ((uint32_t)0x00000001U)
|
#define I2C_FIRST_FRAME ((uint32_t)I2C_SOFTEND_MODE)
|
||||||
#define I2C_ADDRESSINGMODE_10BIT ((uint32_t)0x00000002U)
|
#define I2C_FIRST_AND_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE))
|
||||||
|
#define I2C_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE))
|
||||||
|
#define I2C_FIRST_AND_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)
|
||||||
|
#define I2C_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE)
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/** @defgroup I2C_dual_addressing_mode I2C dual addressing mode
|
/** @defgroup I2C_ADDRESSING_MODE I2C Addressing Mode
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
#define I2C_DUALADDRESS_DISABLE ((uint32_t)0x00000000U)
|
#define I2C_ADDRESSINGMODE_7BIT (0x00000001U)
|
||||||
#define I2C_DUALADDRESS_ENABLE I2C_OAR2_OA2EN
|
#define I2C_ADDRESSINGMODE_10BIT (0x00000002U)
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/** @defgroup I2C_own_address2_masks I2C own address2 masks
|
/** @defgroup I2C_DUAL_ADDRESSING_MODE I2C Dual Addressing Mode
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define I2C_DUALADDRESS_DISABLE (0x00000000U)
|
||||||
|
#define I2C_DUALADDRESS_ENABLE I2C_OAR2_OA2EN
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2C_OWN_ADDRESS2_MASKS I2C Own Address2 Masks
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
#define I2C_OA2_NOMASK ((uint8_t)0x00U)
|
#define I2C_OA2_NOMASK ((uint8_t)0x00U)
|
||||||
|
|
@ -209,50 +287,59 @@ typedef struct
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/** @defgroup I2C_general_call_addressing_mode I2C general call addressing mode
|
/** @defgroup I2C_GENERAL_CALL_ADDRESSING_MODE I2C General Call Addressing Mode
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
#define I2C_GENERALCALL_DISABLE ((uint32_t)0x00000000U)
|
#define I2C_GENERALCALL_DISABLE (0x00000000U)
|
||||||
#define I2C_GENERALCALL_ENABLE I2C_CR1_GCEN
|
#define I2C_GENERALCALL_ENABLE I2C_CR1_GCEN
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/** @defgroup I2C_nostretch_mode I2C nostretch mode
|
/** @defgroup I2C_NOSTRETCH_MODE I2C No-Stretch Mode
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
#define I2C_NOSTRETCH_DISABLE ((uint32_t)0x00000000U)
|
#define I2C_NOSTRETCH_DISABLE (0x00000000U)
|
||||||
#define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH
|
#define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/** @defgroup I2C_Memory_Address_Size I2C Memory Address Size
|
/** @defgroup I2C_MEMORY_ADDRESS_SIZE I2C Memory Address Size
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
#define I2C_MEMADD_SIZE_8BIT ((uint32_t)0x00000001U)
|
#define I2C_MEMADD_SIZE_8BIT (0x00000001U)
|
||||||
#define I2C_MEMADD_SIZE_16BIT ((uint32_t)0x00000002U)
|
#define I2C_MEMADD_SIZE_16BIT (0x00000002U)
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/** @defgroup I2C_ReloadEndMode_definition I2C ReloadEndMode definition
|
/** @defgroup I2C_XFERDIRECTION I2C Transfer Direction Master Point of View
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define I2C_DIRECTION_TRANSMIT (0x00000000U)
|
||||||
|
#define I2C_DIRECTION_RECEIVE (0x00000001U)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup I2C_RELOAD_END_MODE I2C Reload End Mode
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
#define I2C_RELOAD_MODE I2C_CR2_RELOAD
|
#define I2C_RELOAD_MODE I2C_CR2_RELOAD
|
||||||
#define I2C_AUTOEND_MODE I2C_CR2_AUTOEND
|
#define I2C_AUTOEND_MODE I2C_CR2_AUTOEND
|
||||||
#define I2C_SOFTEND_MODE ((uint32_t)0x00000000U)
|
#define I2C_SOFTEND_MODE (0x00000000U)
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/** @defgroup I2C_StartStopMode_definition I2C StartStopMode definition
|
/** @defgroup I2C_START_STOP_MODE I2C Start or Stop Mode
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
#define I2C_NO_STARTSTOP ((uint32_t)0x00000000U)
|
#define I2C_NO_STARTSTOP (0x00000000U)
|
||||||
#define I2C_GENERATE_STOP I2C_CR2_STOP
|
#define I2C_GENERATE_STOP I2C_CR2_STOP
|
||||||
#define I2C_GENERATE_START_READ (uint32_t)(I2C_CR2_START | I2C_CR2_RD_WRN)
|
#define I2C_GENERATE_START_READ (uint32_t)(I2C_CR2_START | I2C_CR2_RD_WRN)
|
||||||
#define I2C_GENERATE_START_WRITE I2C_CR2_START
|
#define I2C_GENERATE_START_WRITE I2C_CR2_START
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
@ -263,38 +350,40 @@ typedef struct
|
||||||
* - XXXXXXXX : Interrupt control mask
|
* - XXXXXXXX : Interrupt control mask
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
#define I2C_IT_ERRI I2C_CR1_ERRIE
|
#define I2C_IT_ERRI I2C_CR1_ERRIE
|
||||||
#define I2C_IT_TCI I2C_CR1_TCIE
|
#define I2C_IT_TCI I2C_CR1_TCIE
|
||||||
#define I2C_IT_STOPI I2C_CR1_STOPIE
|
#define I2C_IT_STOPI I2C_CR1_STOPIE
|
||||||
#define I2C_IT_NACKI I2C_CR1_NACKIE
|
#define I2C_IT_NACKI I2C_CR1_NACKIE
|
||||||
#define I2C_IT_ADDRI I2C_CR1_ADDRIE
|
#define I2C_IT_ADDRI I2C_CR1_ADDRIE
|
||||||
#define I2C_IT_RXI I2C_CR1_RXIE
|
#define I2C_IT_RXI I2C_CR1_RXIE
|
||||||
#define I2C_IT_TXI I2C_CR1_TXIE
|
#define I2C_IT_TXI I2C_CR1_TXIE
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
|
||||||
/** @defgroup I2C_Flag_definition I2C Flag definition
|
/** @defgroup I2C_Flag_definition I2C Flag definition
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
#define I2C_FLAG_TXE I2C_ISR_TXE
|
#define I2C_FLAG_TXE I2C_ISR_TXE
|
||||||
#define I2C_FLAG_TXIS I2C_ISR_TXIS
|
#define I2C_FLAG_TXIS I2C_ISR_TXIS
|
||||||
#define I2C_FLAG_RXNE I2C_ISR_RXNE
|
#define I2C_FLAG_RXNE I2C_ISR_RXNE
|
||||||
#define I2C_FLAG_ADDR I2C_ISR_ADDR
|
#define I2C_FLAG_ADDR I2C_ISR_ADDR
|
||||||
#define I2C_FLAG_AF I2C_ISR_NACKF
|
#define I2C_FLAG_AF I2C_ISR_NACKF
|
||||||
#define I2C_FLAG_STOPF I2C_ISR_STOPF
|
#define I2C_FLAG_STOPF I2C_ISR_STOPF
|
||||||
#define I2C_FLAG_TC I2C_ISR_TC
|
#define I2C_FLAG_TC I2C_ISR_TC
|
||||||
#define I2C_FLAG_TCR I2C_ISR_TCR
|
#define I2C_FLAG_TCR I2C_ISR_TCR
|
||||||
#define I2C_FLAG_BERR I2C_ISR_BERR
|
#define I2C_FLAG_BERR I2C_ISR_BERR
|
||||||
#define I2C_FLAG_ARLO I2C_ISR_ARLO
|
#define I2C_FLAG_ARLO I2C_ISR_ARLO
|
||||||
#define I2C_FLAG_OVR I2C_ISR_OVR
|
#define I2C_FLAG_OVR I2C_ISR_OVR
|
||||||
#define I2C_FLAG_PECERR I2C_ISR_PECERR
|
#define I2C_FLAG_PECERR I2C_ISR_PECERR
|
||||||
#define I2C_FLAG_TIMEOUT I2C_ISR_TIMEOUT
|
#define I2C_FLAG_TIMEOUT I2C_ISR_TIMEOUT
|
||||||
#define I2C_FLAG_ALERT I2C_ISR_ALERT
|
#define I2C_FLAG_ALERT I2C_ISR_ALERT
|
||||||
#define I2C_FLAG_BUSY I2C_ISR_BUSY
|
#define I2C_FLAG_BUSY I2C_ISR_BUSY
|
||||||
#define I2C_FLAG_DIR I2C_ISR_DIR
|
#define I2C_FLAG_DIR I2C_ISR_DIR
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
@ -305,190 +394,135 @@ typedef struct
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/** @brief Reset I2C handle state
|
/** @brief Reset I2C handle state.
|
||||||
* @param __HANDLE__: specifies the I2C Handle.
|
* @param __HANDLE__ specifies the I2C Handle.
|
||||||
* @retval None
|
* @retval None
|
||||||
*/
|
*/
|
||||||
#define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET)
|
#define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET)
|
||||||
|
|
||||||
/** @brief Enable the specified I2C interrupts.
|
/** @brief Enable the specified I2C interrupt.
|
||||||
* @param __HANDLE__: specifies the I2C Handle.
|
* @param __HANDLE__ specifies the I2C Handle.
|
||||||
* @param __INTERRUPT__: specifies the interrupt source to enable.
|
* @param __INTERRUPT__ specifies the interrupt source to enable.
|
||||||
* This parameter can be one of the following values:
|
* This parameter can be one of the following values:
|
||||||
* @arg I2C_IT_ERRI: Errors interrupt enable
|
* @arg @ref I2C_IT_ERRI Errors interrupt enable
|
||||||
* @arg I2C_IT_TCI: Transfer complete interrupt enable
|
* @arg @ref I2C_IT_TCI Transfer complete interrupt enable
|
||||||
* @arg I2C_IT_STOPI: STOP detection interrupt enable
|
* @arg @ref I2C_IT_STOPI STOP detection interrupt enable
|
||||||
* @arg I2C_IT_NACKI: NACK received interrupt enable
|
* @arg @ref I2C_IT_NACKI NACK received interrupt enable
|
||||||
* @arg I2C_IT_ADDRI: Address match interrupt enable
|
* @arg @ref I2C_IT_ADDRI Address match interrupt enable
|
||||||
* @arg I2C_IT_RXI: RX interrupt enable
|
* @arg @ref I2C_IT_RXI RX interrupt enable
|
||||||
* @arg I2C_IT_TXI: TX interrupt enable
|
* @arg @ref I2C_IT_TXI TX interrupt enable
|
||||||
*
|
|
||||||
* @retval None
|
|
||||||
*/
|
|
||||||
|
|
||||||
#define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__))
|
|
||||||
|
|
||||||
/** @brief Disable the specified I2C interrupts.
|
|
||||||
* @param __HANDLE__: specifies the I2C Handle.
|
|
||||||
* @param __INTERRUPT__: specifies the interrupt source to disable.
|
|
||||||
* This parameter can be one of the following values:
|
|
||||||
* @arg I2C_IT_ERRI: Errors interrupt enable
|
|
||||||
* @arg I2C_IT_TCI: Transfer complete interrupt enable
|
|
||||||
* @arg I2C_IT_STOPI: STOP detection interrupt enable
|
|
||||||
* @arg I2C_IT_NACKI: NACK received interrupt enable
|
|
||||||
* @arg I2C_IT_ADDRI: Address match interrupt enable
|
|
||||||
* @arg I2C_IT_RXI: RX interrupt enable
|
|
||||||
* @arg I2C_IT_TXI: TX interrupt enable
|
|
||||||
*
|
|
||||||
* @retval None
|
|
||||||
*/
|
|
||||||
#define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__)))
|
|
||||||
|
|
||||||
/** @brief Checks if the specified I2C interrupt source is enabled or disabled.
|
|
||||||
* @param __HANDLE__: specifies the I2C Handle.
|
|
||||||
* @param __INTERRUPT__: specifies the I2C interrupt source to check.
|
|
||||||
* This parameter can be one of the following values:
|
|
||||||
* @arg I2C_IT_ERRI: Errors interrupt enable
|
|
||||||
* @arg I2C_IT_TCI: Transfer complete interrupt enable
|
|
||||||
* @arg I2C_IT_STOPI: STOP detection interrupt enable
|
|
||||||
* @arg I2C_IT_NACKI: NACK received interrupt enable
|
|
||||||
* @arg I2C_IT_ADDRI: Address match interrupt enable
|
|
||||||
* @arg I2C_IT_RXI: RX interrupt enable
|
|
||||||
* @arg I2C_IT_TXI: TX interrupt enable
|
|
||||||
*
|
|
||||||
* @retval The new state of __INTERRUPT__ (TRUE or FALSE).
|
|
||||||
*/
|
|
||||||
#define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
|
|
||||||
|
|
||||||
/** @brief Checks whether the specified I2C flag is set or not.
|
|
||||||
* @param __HANDLE__: specifies the I2C Handle.
|
|
||||||
* @param __FLAG__: specifies the flag to check.
|
|
||||||
* This parameter can be one of the following values:
|
|
||||||
* @arg I2C_FLAG_TXE: Transmit data register empty
|
|
||||||
* @arg I2C_FLAG_TXIS: Transmit interrupt status
|
|
||||||
* @arg I2C_FLAG_RXNE: Receive data register not empty
|
|
||||||
* @arg I2C_FLAG_ADDR: Address matched (slave mode)
|
|
||||||
* @arg I2C_FLAG_AF: Acknowledge failure received flag
|
|
||||||
* @arg I2C_FLAG_STOPF: STOP detection flag
|
|
||||||
* @arg I2C_FLAG_TC: Transfer complete (master mode)
|
|
||||||
* @arg I2C_FLAG_TCR: Transfer complete reload
|
|
||||||
* @arg I2C_FLAG_BERR: Bus error
|
|
||||||
* @arg I2C_FLAG_ARLO: Arbitration lost
|
|
||||||
* @arg I2C_FLAG_OVR: Overrun/Underrun
|
|
||||||
* @arg I2C_FLAG_PECERR: PEC error in reception
|
|
||||||
* @arg I2C_FLAG_TIMEOUT: Timeout or Tlow detection flag
|
|
||||||
* @arg I2C_FLAG_ALERT: SMBus alert
|
|
||||||
* @arg I2C_FLAG_BUSY: Bus busy
|
|
||||||
* @arg I2C_FLAG_DIR: Transfer direction (slave mode)
|
|
||||||
*
|
*
|
||||||
* @retval The new state of __FLAG__ (TRUE or FALSE).
|
|
||||||
*/
|
|
||||||
#define I2C_FLAG_MASK ((uint32_t)0x0001FFFF)
|
|
||||||
#define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)))
|
|
||||||
|
|
||||||
/** @brief Clears the I2C pending flags which are cleared by writing 1 in a specific bit.
|
|
||||||
* @param __HANDLE__: specifies the I2C Handle.
|
|
||||||
* @param __FLAG__: specifies the flag to clear.
|
|
||||||
* This parameter can be any combination of the following values:
|
|
||||||
* @arg I2C_FLAG_ADDR: Address matched (slave mode)
|
|
||||||
* @arg I2C_FLAG_AF: Acknowledge failure received flag
|
|
||||||
* @arg I2C_FLAG_STOPF: STOP detection flag
|
|
||||||
* @arg I2C_FLAG_BERR: Bus error
|
|
||||||
* @arg I2C_FLAG_ARLO: Arbitration lost
|
|
||||||
* @arg I2C_FLAG_OVR: Overrun/Underrun
|
|
||||||
* @arg I2C_FLAG_PECERR: PEC error in reception
|
|
||||||
* @arg I2C_FLAG_TIMEOUT: Timeout or Tlow detection flag
|
|
||||||
* @arg I2C_FLAG_ALERT: SMBus alert
|
|
||||||
*
|
|
||||||
* @retval None
|
* @retval None
|
||||||
*/
|
*/
|
||||||
#define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = ((__FLAG__) & I2C_FLAG_MASK))
|
#define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__))
|
||||||
|
|
||||||
|
/** @brief Disable the specified I2C interrupt.
|
||||||
|
* @param __HANDLE__ specifies the I2C Handle.
|
||||||
|
* @param __INTERRUPT__ specifies the interrupt source to disable.
|
||||||
|
* This parameter can be one of the following values:
|
||||||
|
* @arg @ref I2C_IT_ERRI Errors interrupt enable
|
||||||
|
* @arg @ref I2C_IT_TCI Transfer complete interrupt enable
|
||||||
|
* @arg @ref I2C_IT_STOPI STOP detection interrupt enable
|
||||||
|
* @arg @ref I2C_IT_NACKI NACK received interrupt enable
|
||||||
|
* @arg @ref I2C_IT_ADDRI Address match interrupt enable
|
||||||
|
* @arg @ref I2C_IT_RXI RX interrupt enable
|
||||||
|
* @arg @ref I2C_IT_TXI TX interrupt enable
|
||||||
|
*
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
#define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__)))
|
||||||
|
|
||||||
|
/** @brief Check whether the specified I2C interrupt source is enabled or not.
|
||||||
|
* @param __HANDLE__ specifies the I2C Handle.
|
||||||
|
* @param __INTERRUPT__ specifies the I2C interrupt source to check.
|
||||||
|
* This parameter can be one of the following values:
|
||||||
|
* @arg @ref I2C_IT_ERRI Errors interrupt enable
|
||||||
|
* @arg @ref I2C_IT_TCI Transfer complete interrupt enable
|
||||||
|
* @arg @ref I2C_IT_STOPI STOP detection interrupt enable
|
||||||
|
* @arg @ref I2C_IT_NACKI NACK received interrupt enable
|
||||||
|
* @arg @ref I2C_IT_ADDRI Address match interrupt enable
|
||||||
|
* @arg @ref I2C_IT_RXI RX interrupt enable
|
||||||
|
* @arg @ref I2C_IT_TXI TX interrupt enable
|
||||||
|
*
|
||||||
|
* @retval The new state of __INTERRUPT__ (SET or RESET).
|
||||||
|
*/
|
||||||
|
#define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
|
||||||
|
|
||||||
|
/** @brief Check whether the specified I2C flag is set or not.
|
||||||
|
* @param __HANDLE__ specifies the I2C Handle.
|
||||||
|
* @param __FLAG__ specifies the flag to check.
|
||||||
|
* This parameter can be one of the following values:
|
||||||
|
* @arg @ref I2C_FLAG_TXE Transmit data register empty
|
||||||
|
* @arg @ref I2C_FLAG_TXIS Transmit interrupt status
|
||||||
|
* @arg @ref I2C_FLAG_RXNE Receive data register not empty
|
||||||
|
* @arg @ref I2C_FLAG_ADDR Address matched (slave mode)
|
||||||
|
* @arg @ref I2C_FLAG_AF Acknowledge failure received flag
|
||||||
|
* @arg @ref I2C_FLAG_STOPF STOP detection flag
|
||||||
|
* @arg @ref I2C_FLAG_TC Transfer complete (master mode)
|
||||||
|
* @arg @ref I2C_FLAG_TCR Transfer complete reload
|
||||||
|
* @arg @ref I2C_FLAG_BERR Bus error
|
||||||
|
* @arg @ref I2C_FLAG_ARLO Arbitration lost
|
||||||
|
* @arg @ref I2C_FLAG_OVR Overrun/Underrun
|
||||||
|
* @arg @ref I2C_FLAG_PECERR PEC error in reception
|
||||||
|
* @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag
|
||||||
|
* @arg @ref I2C_FLAG_ALERT SMBus alert
|
||||||
|
* @arg @ref I2C_FLAG_BUSY Bus busy
|
||||||
|
* @arg @ref I2C_FLAG_DIR Transfer direction (slave mode)
|
||||||
|
*
|
||||||
|
* @retval The new state of __FLAG__ (SET or RESET).
|
||||||
|
*/
|
||||||
|
#define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__)) ? SET : RESET)
|
||||||
|
|
||||||
|
/** @brief Clear the I2C pending flags which are cleared by writing 1 in a specific bit.
|
||||||
|
* @param __HANDLE__ specifies the I2C Handle.
|
||||||
|
* @param __FLAG__ specifies the flag to clear.
|
||||||
|
* This parameter can be any combination of the following values:
|
||||||
|
* @arg @ref I2C_FLAG_TXE Transmit data register empty
|
||||||
|
* @arg @ref I2C_FLAG_ADDR Address matched (slave mode)
|
||||||
|
* @arg @ref I2C_FLAG_AF Acknowledge failure received flag
|
||||||
|
* @arg @ref I2C_FLAG_STOPF STOP detection flag
|
||||||
|
* @arg @ref I2C_FLAG_BERR Bus error
|
||||||
|
* @arg @ref I2C_FLAG_ARLO Arbitration lost
|
||||||
|
* @arg @ref I2C_FLAG_OVR Overrun/Underrun
|
||||||
|
* @arg @ref I2C_FLAG_PECERR PEC error in reception
|
||||||
|
* @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag
|
||||||
|
* @arg @ref I2C_FLAG_ALERT SMBus alert
|
||||||
|
*
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
#define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == I2C_FLAG_TXE) ? ((__HANDLE__)->Instance->ISR |= (__FLAG__)) \
|
||||||
|
: ((__HANDLE__)->Instance->ICR = (__FLAG__)))
|
||||||
|
|
||||||
/** @brief Enable the specified I2C peripheral.
|
/** @brief Enable the specified I2C peripheral.
|
||||||
* @param __HANDLE__: specifies the I2C Handle.
|
* @param __HANDLE__ specifies the I2C Handle.
|
||||||
* @retval None
|
* @retval None
|
||||||
*/
|
*/
|
||||||
#define __HAL_I2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
|
#define __HAL_I2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
|
||||||
|
|
||||||
/** @brief Disable the specified I2C peripheral.
|
/** @brief Disable the specified I2C peripheral.
|
||||||
* @param __HANDLE__: specifies the I2C Handle.
|
* @param __HANDLE__ specifies the I2C Handle.
|
||||||
* @retval None
|
* @retval None
|
||||||
*/
|
*/
|
||||||
#define __HAL_I2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
|
#define __HAL_I2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
|
||||||
|
|
||||||
/**
|
/** @brief Generate a Non-Acknowledge I2C peripheral in Slave mode.
|
||||||
* @}
|
* @param __HANDLE__: specifies the I2C Handle.
|
||||||
*/
|
* @retval None
|
||||||
|
*/
|
||||||
|
#define __HAL_I2C_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK))
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* Include I2C HAL Extension module */
|
/* Include I2C HAL Extended module */
|
||||||
#include "stm32l0xx_hal_i2c_ex.h"
|
#include "stm32l0xx_hal_i2c_ex.h"
|
||||||
|
|
||||||
/* Private macros ------------------------------------------------------------*/
|
|
||||||
/** @addtogroup I2C_Private
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
#define IS_I2C_ADDRESSING_MODE(MODE) (((MODE) == I2C_ADDRESSINGMODE_7BIT) || \
|
|
||||||
((MODE) == I2C_ADDRESSINGMODE_10BIT))
|
|
||||||
|
|
||||||
#define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \
|
|
||||||
((ADDRESS) == I2C_DUALADDRESS_ENABLE))
|
|
||||||
|
|
||||||
#define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NOMASK) || \
|
|
||||||
((MASK) == I2C_OA2_MASK01) || \
|
|
||||||
((MASK) == I2C_OA2_MASK02) || \
|
|
||||||
((MASK) == I2C_OA2_MASK03) || \
|
|
||||||
((MASK) == I2C_OA2_MASK04) || \
|
|
||||||
((MASK) == I2C_OA2_MASK05) || \
|
|
||||||
((MASK) == I2C_OA2_MASK06) || \
|
|
||||||
((MASK) == I2C_OA2_MASK07))
|
|
||||||
|
|
||||||
#define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \
|
|
||||||
((CALL) == I2C_GENERALCALL_ENABLE))
|
|
||||||
|
|
||||||
#define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \
|
|
||||||
((STRETCH) == I2C_NOSTRETCH_ENABLE))
|
|
||||||
|
|
||||||
#define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \
|
|
||||||
((SIZE) == I2C_MEMADD_SIZE_16BIT))
|
|
||||||
|
|
||||||
|
|
||||||
#define IS_TRANSFER_MODE(MODE) (((MODE) == I2C_RELOAD_MODE) || \
|
|
||||||
((MODE) == I2C_AUTOEND_MODE) || \
|
|
||||||
((MODE) == I2C_SOFTEND_MODE))
|
|
||||||
|
|
||||||
#define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == I2C_GENERATE_STOP) || \
|
|
||||||
((REQUEST) == I2C_GENERATE_START_READ) || \
|
|
||||||
((REQUEST) == I2C_GENERATE_START_WRITE) || \
|
|
||||||
((REQUEST) == I2C_NO_STARTSTOP))
|
|
||||||
|
|
||||||
|
|
||||||
#define __I2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN)))
|
|
||||||
|
|
||||||
#define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= (uint32_t)0x000003FFU)
|
|
||||||
#define IS_I2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU)
|
|
||||||
|
|
||||||
#define __I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00U))) >> 8)))
|
|
||||||
#define __I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU))))
|
|
||||||
|
|
||||||
#define __I2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == I2C_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \
|
|
||||||
(uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | (I2C_CR2_START)) & (~I2C_CR2_RD_WRN)))
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/* Exported functions --------------------------------------------------------*/
|
/* Exported functions --------------------------------------------------------*/
|
||||||
/** @defgroup I2C_Exported_Functions I2C Exported Functions
|
/** @addtogroup I2C_Exported_Functions
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
|
/** @addtogroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
/* Initialization and de-initialization functions******************************/
|
/* Initialization and de-initialization functions******************************/
|
||||||
|
|
@ -498,9 +532,9 @@ void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c);
|
||||||
void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c);
|
void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c);
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/** @defgroup I2C_Exported_Functions_Group2 Input and Output operation functions
|
/** @addtogroup I2C_Exported_Functions_Group2 Input and Output operation functions
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
/* IO operation functions ****************************************************/
|
/* IO operation functions ****************************************************/
|
||||||
|
|
@ -521,6 +555,14 @@ HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pDa
|
||||||
HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
|
HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
|
||||||
HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
|
HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
|
||||||
|
|
||||||
|
HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
||||||
|
HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
||||||
|
HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
||||||
|
HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
||||||
|
HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c);
|
||||||
|
HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c);
|
||||||
|
HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress);
|
||||||
|
|
||||||
/******* Non-Blocking mode: DMA */
|
/******* Non-Blocking mode: DMA */
|
||||||
HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
|
HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
|
||||||
HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
|
HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
|
||||||
|
|
@ -530,30 +572,34 @@ HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAdd
|
||||||
HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
|
HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/** @defgroup IRQ_Handler_and_Callbacks RQ Handler and Callbacks
|
/** @addtogroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
/******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
|
/******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
|
||||||
void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c);
|
void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c);
|
||||||
void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c);
|
void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c);
|
||||||
void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c);
|
void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c);
|
||||||
void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c);
|
void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c);
|
||||||
void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c);
|
void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c);
|
||||||
void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c);
|
void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c);
|
||||||
|
void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
|
||||||
|
void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c);
|
||||||
void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c);
|
void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c);
|
||||||
void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c);
|
void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c);
|
||||||
void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c);
|
void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c);
|
||||||
|
void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c);
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/** @defgroup I2C_Exported_Functions_Group3 Peripheral State and Errors functions
|
/** @addtogroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
/* Peripheral State and Errors functions *************************************/
|
/* Peripheral State, Mode and Error functions *********************************/
|
||||||
HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c);
|
HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c);
|
||||||
|
HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c);
|
||||||
uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
|
uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
@ -563,18 +609,85 @@ uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
|
||||||
/* Define the private group ***********************************/
|
/* Private constants ---------------------------------------------------------*/
|
||||||
/**************************************************************/
|
/** @defgroup I2C_Private_Constants I2C Private Constants
|
||||||
/** @defgroup I2C_Private I2C Private
|
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Private macros ------------------------------------------------------------*/
|
||||||
|
/** @defgroup I2C_Private_Macro I2C Private Macros
|
||||||
|
* @{
|
||||||
*/
|
*/
|
||||||
/**************************************************************/
|
|
||||||
|
|
||||||
|
#define IS_I2C_ADDRESSING_MODE(MODE) (((MODE) == I2C_ADDRESSINGMODE_7BIT) || \
|
||||||
|
((MODE) == I2C_ADDRESSINGMODE_10BIT))
|
||||||
|
|
||||||
|
#define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \
|
||||||
|
((ADDRESS) == I2C_DUALADDRESS_ENABLE))
|
||||||
|
|
||||||
|
#define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NOMASK) || \
|
||||||
|
((MASK) == I2C_OA2_MASK01) || \
|
||||||
|
((MASK) == I2C_OA2_MASK02) || \
|
||||||
|
((MASK) == I2C_OA2_MASK03) || \
|
||||||
|
((MASK) == I2C_OA2_MASK04) || \
|
||||||
|
((MASK) == I2C_OA2_MASK05) || \
|
||||||
|
((MASK) == I2C_OA2_MASK06) || \
|
||||||
|
((MASK) == I2C_OA2_MASK07))
|
||||||
|
|
||||||
|
#define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \
|
||||||
|
((CALL) == I2C_GENERALCALL_ENABLE))
|
||||||
|
|
||||||
|
#define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \
|
||||||
|
((STRETCH) == I2C_NOSTRETCH_ENABLE))
|
||||||
|
|
||||||
|
#define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \
|
||||||
|
((SIZE) == I2C_MEMADD_SIZE_16BIT))
|
||||||
|
|
||||||
|
#define IS_TRANSFER_MODE(MODE) (((MODE) == I2C_RELOAD_MODE) || \
|
||||||
|
((MODE) == I2C_AUTOEND_MODE) || \
|
||||||
|
((MODE) == I2C_SOFTEND_MODE))
|
||||||
|
|
||||||
|
#define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == I2C_GENERATE_STOP) || \
|
||||||
|
((REQUEST) == I2C_GENERATE_START_READ) || \
|
||||||
|
((REQUEST) == I2C_GENERATE_START_WRITE) || \
|
||||||
|
((REQUEST) == I2C_NO_STARTSTOP))
|
||||||
|
|
||||||
|
#define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \
|
||||||
|
((REQUEST) == I2C_FIRST_AND_NEXT_FRAME) || \
|
||||||
|
((REQUEST) == I2C_NEXT_FRAME) || \
|
||||||
|
((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \
|
||||||
|
((REQUEST) == I2C_LAST_FRAME))
|
||||||
|
|
||||||
|
#define I2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN)))
|
||||||
|
|
||||||
|
#define I2C_GET_ADDR_MATCH(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 16U)
|
||||||
|
#define I2C_GET_DIR(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16U)
|
||||||
|
#define I2C_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND)
|
||||||
|
#define I2C_GET_OWN_ADDRESS1(__HANDLE__) ((__HANDLE__)->Instance->OAR1 & I2C_OAR1_OA1)
|
||||||
|
#define I2C_GET_OWN_ADDRESS2(__HANDLE__) ((__HANDLE__)->Instance->OAR2 & I2C_OAR2_OA2)
|
||||||
|
|
||||||
|
#define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x000003FFU)
|
||||||
|
#define IS_I2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU)
|
||||||
|
|
||||||
|
#define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00U))) >> 8U)))
|
||||||
|
#define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU))))
|
||||||
|
|
||||||
|
#define I2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == I2C_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \
|
||||||
|
(uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | (I2C_CR2_START)) & (~I2C_CR2_RD_WRN)))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Private Functions ---------------------------------------------------------*/
|
||||||
|
/** @defgroup I2C_Private_Functions I2C Private Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/* Private functions are defined in stm32l0xx_hal_i2c.c file */
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
@ -582,7 +695,11 @@ uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
@ -591,4 +708,3 @@ uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
|
||||||
#endif /* __STM32L0xx_HAL_I2C_H */
|
#endif /* __STM32L0xx_HAL_I2C_H */
|
||||||
|
|
||||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -2,36 +2,36 @@
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @file stm32l0xx_hal_i2c_ex.c
|
* @file stm32l0xx_hal_i2c_ex.c
|
||||||
* @author MCD Application Team
|
* @author MCD Application Team
|
||||||
* @version V1.7.0
|
* @version $VERSION$
|
||||||
* @date 31-May-2016
|
* @date $DATE$
|
||||||
* @brief I2C Extended HAL module driver.
|
* @brief I2C Extended HAL module driver.
|
||||||
* This file provides firmware functions to manage the following
|
* This file provides firmware functions to manage the following
|
||||||
* functionalities of I2C Extended peripheral:
|
* functionalities of I2C Extended peripheral:
|
||||||
* + Extended features functions
|
* + Extended features functions
|
||||||
*
|
*
|
||||||
@verbatim
|
@verbatim
|
||||||
==============================================================================
|
==============================================================================
|
||||||
##### I2C peripheral Extended features #####
|
##### I2C peripheral Extended features #####
|
||||||
==============================================================================
|
==============================================================================
|
||||||
|
|
||||||
[..] Comparing to other previous devices, the I2C interface for STM32L0XX
|
[..] Comparing to other previous devices, the I2C interface for STM32L0xx
|
||||||
devices contains the following additional features
|
devices contains the following additional features
|
||||||
|
|
||||||
(+) Possibility to disable or enable Analog Noise Filter
|
(+) Possibility to disable or enable Analog Noise Filter
|
||||||
(+) Use of a configured Digital Noise Filter
|
(+) Use of a configured Digital Noise Filter
|
||||||
(+) Disable or enable wakeup from Stop mode
|
(+) Disable or enable wakeup from Stop mode
|
||||||
|
|
||||||
##### How to use this driver #####
|
##### How to use this driver #####
|
||||||
==============================================================================
|
==============================================================================
|
||||||
[..] This driver provides functions to configure Noise Filter
|
[..] This driver provides functions to configure Noise Filter and Wake Up Feature
|
||||||
(#) Configure I2C Analog noise filter using the function HAL_I2CEx_ConfigAnalogFilter()
|
(#) Configure I2C Analog noise filter using the function HAL_I2CEx_ConfigAnalogFilter()
|
||||||
(#) Configure I2C Digital noise filter using the function HAL_I2CEx_ConfigDigitalFilter()
|
(#) Configure I2C Digital noise filter using the function HAL_I2CEx_ConfigDigitalFilter()
|
||||||
(#) Configure the enable or disable of I2C Wake Up Mode using the functions :
|
(#) Configure the enable or disable of I2C Wake Up Mode using the functions :
|
||||||
+ HAL_I2CEx_EnableWakeUp()
|
(++) HAL_I2CEx_EnableWakeUp()
|
||||||
+ HAL_I2CEx_DisableWakeUp()
|
(++) HAL_I2CEx_DisableWakeUp()
|
||||||
(#) Configure the enable or disable of fast mode plus driving capability using the functions :
|
(#) Configure the enable or disable of fast mode plus driving capability using the functions :
|
||||||
+ HAL_I2CEx_EnableFastModePlus()
|
(++) HAL_I2CEx_EnableFastModePlus()
|
||||||
+ HAL_I2CEx_DisbleFastModePlus()
|
(++) HAL_I2CEx_DisableFastModePlus()
|
||||||
@endverbatim
|
@endverbatim
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @attention
|
* @attention
|
||||||
|
|
@ -60,8 +60,8 @@
|
||||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
*
|
*
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* Includes ------------------------------------------------------------------*/
|
/* Includes ------------------------------------------------------------------*/
|
||||||
#include "stm32l0xx_hal.h"
|
#include "stm32l0xx_hal.h"
|
||||||
|
|
@ -69,13 +69,14 @@
|
||||||
/** @addtogroup STM32L0xx_HAL_Driver
|
/** @addtogroup STM32L0xx_HAL_Driver
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
#ifdef HAL_I2C_MODULE_ENABLED
|
|
||||||
|
|
||||||
/** @addtogroup I2CEx
|
/** @defgroup I2CEx I2CEx
|
||||||
* @brief I2C Extended HAL module driver
|
* @brief I2C Extended HAL module driver
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
#ifdef HAL_I2C_MODULE_ENABLED
|
||||||
|
|
||||||
/* Private typedef -----------------------------------------------------------*/
|
/* Private typedef -----------------------------------------------------------*/
|
||||||
/* Private define ------------------------------------------------------------*/
|
/* Private define ------------------------------------------------------------*/
|
||||||
/* Private macro -------------------------------------------------------------*/
|
/* Private macro -------------------------------------------------------------*/
|
||||||
|
|
@ -83,29 +84,30 @@
|
||||||
/* Private function prototypes -----------------------------------------------*/
|
/* Private function prototypes -----------------------------------------------*/
|
||||||
/* Private functions ---------------------------------------------------------*/
|
/* Private functions ---------------------------------------------------------*/
|
||||||
|
|
||||||
/** @addtogroup I2CEx_Exported_Functions
|
/** @defgroup I2CEx_Exported_Functions I2C Extended Exported Functions
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/** @addtogroup I2CEx_Exported_Functions_Group1
|
/** @defgroup I2CEx_Exported_Functions_Group1 Extended features functions
|
||||||
* @brief Extended features functions
|
* @brief Extended features functions
|
||||||
*
|
*
|
||||||
@verbatim
|
@verbatim
|
||||||
===============================================================================
|
===============================================================================
|
||||||
##### Extended features functions #####
|
##### Extended features functions #####
|
||||||
===============================================================================
|
===============================================================================
|
||||||
[..] This section provides functions allowing to:
|
[..] This section provides functions allowing to:
|
||||||
(+) Configure Noise Filters
|
(+) Configure Noise Filters
|
||||||
|
(+) Configure Wake Up Feature
|
||||||
|
|
||||||
@endverbatim
|
@endverbatim
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Configures I2C Analog noise filter.
|
* @brief Configure I2C Analog noise filter.
|
||||||
* @param hi2c : pointer to a I2C_HandleTypeDef structure that contains
|
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
|
||||||
* the configuration information for the specified I2Cx peripheral.
|
* the configuration information for the specified I2Cx peripheral.
|
||||||
* @param AnalogFilter : new state of the Analog filter.
|
* @param AnalogFilter New state of the Analog filter.
|
||||||
* @retval HAL status
|
* @retval HAL status
|
||||||
*/
|
*/
|
||||||
HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter)
|
HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter)
|
||||||
|
|
@ -113,91 +115,93 @@ HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t
|
||||||
/* Check the parameters */
|
/* Check the parameters */
|
||||||
assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
|
assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
|
||||||
assert_param(IS_I2C_ANALOG_FILTER(AnalogFilter));
|
assert_param(IS_I2C_ANALOG_FILTER(AnalogFilter));
|
||||||
|
|
||||||
if((hi2c->State == HAL_I2C_STATE_BUSY) || (hi2c->State == HAL_I2C_STATE_MASTER_BUSY_TX) || (hi2c->State == HAL_I2C_STATE_MASTER_BUSY_RX)
|
if(hi2c->State == HAL_I2C_STATE_READY)
|
||||||
|| (hi2c->State == HAL_I2C_STATE_SLAVE_BUSY_TX) || (hi2c->State == HAL_I2C_STATE_SLAVE_BUSY_RX))
|
{
|
||||||
|
/* Process Locked */
|
||||||
|
__HAL_LOCK(hi2c);
|
||||||
|
|
||||||
|
hi2c->State = HAL_I2C_STATE_BUSY;
|
||||||
|
|
||||||
|
/* Disable the selected I2C peripheral */
|
||||||
|
__HAL_I2C_DISABLE(hi2c);
|
||||||
|
|
||||||
|
/* Reset I2Cx ANOFF bit */
|
||||||
|
hi2c->Instance->CR1 &= ~(I2C_CR1_ANFOFF);
|
||||||
|
|
||||||
|
/* Set analog filter bit*/
|
||||||
|
hi2c->Instance->CR1 |= AnalogFilter;
|
||||||
|
|
||||||
|
__HAL_I2C_ENABLE(hi2c);
|
||||||
|
|
||||||
|
hi2c->State = HAL_I2C_STATE_READY;
|
||||||
|
|
||||||
|
/* Process Unlocked */
|
||||||
|
__HAL_UNLOCK(hi2c);
|
||||||
|
|
||||||
|
return HAL_OK;
|
||||||
|
}
|
||||||
|
else
|
||||||
{
|
{
|
||||||
return HAL_BUSY;
|
return HAL_BUSY;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Process Locked */
|
|
||||||
__HAL_LOCK(hi2c);
|
|
||||||
|
|
||||||
hi2c->State = HAL_I2C_STATE_BUSY;
|
|
||||||
|
|
||||||
/* Disable the selected I2C peripheral */
|
|
||||||
__HAL_I2C_DISABLE(hi2c);
|
|
||||||
|
|
||||||
/* Reset I2Cx ANOFF bit */
|
|
||||||
hi2c->Instance->CR1 &= ~(I2C_CR1_ANFOFF);
|
|
||||||
|
|
||||||
/* Set analog filter bit*/
|
|
||||||
hi2c->Instance->CR1 |= AnalogFilter;
|
|
||||||
|
|
||||||
__HAL_I2C_ENABLE(hi2c);
|
|
||||||
|
|
||||||
hi2c->State = HAL_I2C_STATE_READY;
|
|
||||||
|
|
||||||
/* Process Unlocked */
|
|
||||||
__HAL_UNLOCK(hi2c);
|
|
||||||
|
|
||||||
return HAL_OK;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Configures I2C Digital noise filter.
|
* @brief Configure I2C Digital noise filter.
|
||||||
* @param hi2c : pointer to a I2C_HandleTypeDef structure that contains
|
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
|
||||||
* the configuration information for the specified I2Cx peripheral.
|
* the configuration information for the specified I2Cx peripheral.
|
||||||
* @param DigitalFilter : Coefficient of digital noise filter between 0x00 and 0x0F.
|
* @param DigitalFilter Coefficient of digital noise filter between Min_Data=0x00 and Max_Data=0x0F.
|
||||||
* @retval HAL status
|
* @retval HAL status
|
||||||
*/
|
*/
|
||||||
HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter)
|
HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter)
|
||||||
{
|
{
|
||||||
uint32_t tmpreg = 0U;
|
uint32_t tmpreg = 0U;
|
||||||
|
|
||||||
/* Check the parameters */
|
/* Check the parameters */
|
||||||
assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
|
assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
|
||||||
assert_param(IS_I2C_DIGITAL_FILTER(DigitalFilter));
|
assert_param(IS_I2C_DIGITAL_FILTER(DigitalFilter));
|
||||||
|
|
||||||
if((hi2c->State == HAL_I2C_STATE_BUSY) || (hi2c->State == HAL_I2C_STATE_MASTER_BUSY_TX) || (hi2c->State == HAL_I2C_STATE_MASTER_BUSY_RX)
|
if(hi2c->State == HAL_I2C_STATE_READY)
|
||||||
|| (hi2c->State == HAL_I2C_STATE_SLAVE_BUSY_TX) || (hi2c->State == HAL_I2C_STATE_SLAVE_BUSY_RX))
|
{
|
||||||
|
/* Process Locked */
|
||||||
|
__HAL_LOCK(hi2c);
|
||||||
|
|
||||||
|
hi2c->State = HAL_I2C_STATE_BUSY;
|
||||||
|
|
||||||
|
/* Disable the selected I2C peripheral */
|
||||||
|
__HAL_I2C_DISABLE(hi2c);
|
||||||
|
|
||||||
|
/* Get the old register value */
|
||||||
|
tmpreg = hi2c->Instance->CR1;
|
||||||
|
|
||||||
|
/* Reset I2Cx DNF bits [11:8] */
|
||||||
|
tmpreg &= ~(I2C_CR1_DNF);
|
||||||
|
|
||||||
|
/* Set I2Cx DNF coefficient */
|
||||||
|
tmpreg |= DigitalFilter << 8U;
|
||||||
|
|
||||||
|
/* Store the new register value */
|
||||||
|
hi2c->Instance->CR1 = tmpreg;
|
||||||
|
|
||||||
|
__HAL_I2C_ENABLE(hi2c);
|
||||||
|
|
||||||
|
hi2c->State = HAL_I2C_STATE_READY;
|
||||||
|
|
||||||
|
/* Process Unlocked */
|
||||||
|
__HAL_UNLOCK(hi2c);
|
||||||
|
|
||||||
|
return HAL_OK;
|
||||||
|
}
|
||||||
|
else
|
||||||
{
|
{
|
||||||
return HAL_BUSY;
|
return HAL_BUSY;
|
||||||
}
|
}
|
||||||
|
}
|
||||||
/* Process Locked */
|
|
||||||
__HAL_LOCK(hi2c);
|
|
||||||
|
|
||||||
hi2c->State = HAL_I2C_STATE_BUSY;
|
|
||||||
|
|
||||||
/* Disable the selected I2C peripheral */
|
|
||||||
__HAL_I2C_DISABLE(hi2c);
|
|
||||||
|
|
||||||
/* Get the old register value */
|
|
||||||
tmpreg = hi2c->Instance->CR1;
|
|
||||||
|
|
||||||
/* Reset I2Cx DNF bits [11:8] */
|
|
||||||
tmpreg &= ~(I2C_CR1_DNF);
|
|
||||||
|
|
||||||
/* Set I2Cx DNF coefficient */
|
|
||||||
tmpreg |= DigitalFilter << 8U;
|
|
||||||
|
|
||||||
/* Store the new register value */
|
|
||||||
hi2c->Instance->CR1 = tmpreg;
|
|
||||||
|
|
||||||
__HAL_I2C_ENABLE(hi2c);
|
|
||||||
|
|
||||||
hi2c->State = HAL_I2C_STATE_READY;
|
|
||||||
|
|
||||||
/* Process Unlocked */
|
|
||||||
__HAL_UNLOCK(hi2c);
|
|
||||||
|
|
||||||
return HAL_OK;
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Enables I2C wakeup from stop mode.
|
* @brief Enable I2C wakeup from stop mode.
|
||||||
* @param hi2c : pointer to a I2C_HandleTypeDef structure that contains
|
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
|
||||||
* the configuration information for the specified I2Cx peripheral.
|
* the configuration information for the specified I2Cx peripheral.
|
||||||
* @retval HAL status
|
* @retval HAL status
|
||||||
*/
|
*/
|
||||||
|
|
@ -205,38 +209,38 @@ HAL_StatusTypeDef HAL_I2CEx_EnableWakeUp (I2C_HandleTypeDef *hi2c)
|
||||||
{
|
{
|
||||||
/* Check the parameters */
|
/* Check the parameters */
|
||||||
assert_param(IS_I2C_WAKEUP_FROMSTOP_INSTANCE(hi2c->Instance));
|
assert_param(IS_I2C_WAKEUP_FROMSTOP_INSTANCE(hi2c->Instance));
|
||||||
|
|
||||||
if((hi2c->State == HAL_I2C_STATE_BUSY) || (hi2c->State == HAL_I2C_STATE_MASTER_BUSY_TX) || (hi2c->State == HAL_I2C_STATE_MASTER_BUSY_RX)
|
if(hi2c->State == HAL_I2C_STATE_READY)
|
||||||
|| (hi2c->State == HAL_I2C_STATE_SLAVE_BUSY_TX) || (hi2c->State == HAL_I2C_STATE_SLAVE_BUSY_RX))
|
{
|
||||||
|
/* Process Locked */
|
||||||
|
__HAL_LOCK(hi2c);
|
||||||
|
|
||||||
|
hi2c->State = HAL_I2C_STATE_BUSY;
|
||||||
|
|
||||||
|
/* Disable the selected I2C peripheral */
|
||||||
|
__HAL_I2C_DISABLE(hi2c);
|
||||||
|
|
||||||
|
/* Enable wakeup from stop mode */
|
||||||
|
hi2c->Instance->CR1 |= I2C_CR1_WUPEN;
|
||||||
|
|
||||||
|
__HAL_I2C_ENABLE(hi2c);
|
||||||
|
|
||||||
|
hi2c->State = HAL_I2C_STATE_READY;
|
||||||
|
|
||||||
|
/* Process Unlocked */
|
||||||
|
__HAL_UNLOCK(hi2c);
|
||||||
|
|
||||||
|
return HAL_OK;
|
||||||
|
}
|
||||||
|
else
|
||||||
{
|
{
|
||||||
return HAL_BUSY;
|
return HAL_BUSY;
|
||||||
}
|
}
|
||||||
|
}
|
||||||
/* Process Locked */
|
|
||||||
__HAL_LOCK(hi2c);
|
|
||||||
|
|
||||||
hi2c->State = HAL_I2C_STATE_BUSY;
|
|
||||||
|
|
||||||
/* Disable the selected I2C peripheral */
|
|
||||||
__HAL_I2C_DISABLE(hi2c);
|
|
||||||
|
|
||||||
/* Enable wakeup from stop mode */
|
|
||||||
hi2c->Instance->CR1 |= I2C_CR1_WUPEN;
|
|
||||||
|
|
||||||
__HAL_I2C_ENABLE(hi2c);
|
|
||||||
|
|
||||||
hi2c->State = HAL_I2C_STATE_READY;
|
|
||||||
|
|
||||||
/* Process Unlocked */
|
|
||||||
__HAL_UNLOCK(hi2c);
|
|
||||||
|
|
||||||
return HAL_OK;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Disables I2C wakeup from stop mode.
|
* @brief Disable I2C wakeup from stop mode.
|
||||||
* @param hi2c : pointer to a I2C_HandleTypeDef structure that contains
|
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
|
||||||
* the configuration information for the specified I2Cx peripheral.
|
* the configuration information for the specified I2Cx peripheral.
|
||||||
* @retval HAL status
|
* @retval HAL status
|
||||||
*/
|
*/
|
||||||
|
|
@ -244,37 +248,38 @@ HAL_StatusTypeDef HAL_I2CEx_DisableWakeUp (I2C_HandleTypeDef *hi2c)
|
||||||
{
|
{
|
||||||
/* Check the parameters */
|
/* Check the parameters */
|
||||||
assert_param(IS_I2C_WAKEUP_FROMSTOP_INSTANCE(hi2c->Instance));
|
assert_param(IS_I2C_WAKEUP_FROMSTOP_INSTANCE(hi2c->Instance));
|
||||||
|
|
||||||
if((hi2c->State == HAL_I2C_STATE_BUSY) || (hi2c->State == HAL_I2C_STATE_MASTER_BUSY_TX) || (hi2c->State == HAL_I2C_STATE_MASTER_BUSY_RX)
|
if(hi2c->State == HAL_I2C_STATE_READY)
|
||||||
|| (hi2c->State == HAL_I2C_STATE_SLAVE_BUSY_TX) || (hi2c->State == HAL_I2C_STATE_SLAVE_BUSY_RX))
|
{
|
||||||
|
/* Process Locked */
|
||||||
|
__HAL_LOCK(hi2c);
|
||||||
|
|
||||||
|
hi2c->State = HAL_I2C_STATE_BUSY;
|
||||||
|
|
||||||
|
/* Disable the selected I2C peripheral */
|
||||||
|
__HAL_I2C_DISABLE(hi2c);
|
||||||
|
|
||||||
|
/* Enable wakeup from stop mode */
|
||||||
|
hi2c->Instance->CR1 &= ~(I2C_CR1_WUPEN);
|
||||||
|
|
||||||
|
__HAL_I2C_ENABLE(hi2c);
|
||||||
|
|
||||||
|
hi2c->State = HAL_I2C_STATE_READY;
|
||||||
|
|
||||||
|
/* Process Unlocked */
|
||||||
|
__HAL_UNLOCK(hi2c);
|
||||||
|
|
||||||
|
return HAL_OK;
|
||||||
|
}
|
||||||
|
else
|
||||||
{
|
{
|
||||||
return HAL_BUSY;
|
return HAL_BUSY;
|
||||||
}
|
}
|
||||||
|
}
|
||||||
/* Process Locked */
|
|
||||||
__HAL_LOCK(hi2c);
|
|
||||||
|
|
||||||
hi2c->State = HAL_I2C_STATE_BUSY;
|
|
||||||
|
|
||||||
/* Disable the selected I2C peripheral */
|
|
||||||
__HAL_I2C_DISABLE(hi2c);
|
|
||||||
|
|
||||||
/* Enable wakeup from stop mode */
|
|
||||||
hi2c->Instance->CR1 &= ~(I2C_CR1_WUPEN);
|
|
||||||
|
|
||||||
__HAL_I2C_ENABLE(hi2c);
|
|
||||||
|
|
||||||
hi2c->State = HAL_I2C_STATE_READY;
|
|
||||||
|
|
||||||
/* Process Unlocked */
|
|
||||||
__HAL_UNLOCK(hi2c);
|
|
||||||
|
|
||||||
return HAL_OK;
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Enable the I2C fast mode plus driving capability.
|
* @brief Enable the I2C fast mode plus driving capability.
|
||||||
* @param ConfigFastModePlus: selects the pin.
|
* @param ConfigFastModePlus Selects the pin.
|
||||||
* This parameter can be one of the @ref I2CEx_FastModePlus values
|
* This parameter can be one of the @ref I2CEx_FastModePlus values
|
||||||
* @note For I2C1, fast mode plus driving capability can be enabled on all selected
|
* @note For I2C1, fast mode plus driving capability can be enabled on all selected
|
||||||
* I2C1 pins using I2C_FASTMODEPLUS_I2C1 parameter or independently
|
* I2C1 pins using I2C_FASTMODEPLUS_I2C1 parameter or independently
|
||||||
|
|
@ -291,17 +296,17 @@ void HAL_I2CEx_EnableFastModePlus(uint32_t ConfigFastModePlus)
|
||||||
{
|
{
|
||||||
/* Check the parameter */
|
/* Check the parameter */
|
||||||
assert_param(IS_I2C_FASTMODEPLUS(ConfigFastModePlus));
|
assert_param(IS_I2C_FASTMODEPLUS(ConfigFastModePlus));
|
||||||
|
|
||||||
/* Enable SYSCFG clock */
|
/* Enable SYSCFG clock */
|
||||||
__HAL_RCC_SYSCFG_CLK_ENABLE();
|
__HAL_RCC_SYSCFG_CLK_ENABLE();
|
||||||
|
|
||||||
/* Enable fast mode plus driving capability for selected pin */
|
/* Enable fast mode plus driving capability for selected pin */
|
||||||
SET_BIT(SYSCFG->CFGR1, (uint32_t)ConfigFastModePlus);
|
SET_BIT(SYSCFG->CFGR2, (uint32_t)ConfigFastModePlus);
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Disable the I2C fast mode plus driving capability.
|
* @brief Disable the I2C fast mode plus driving capability.
|
||||||
* @param ConfigFastModePlus: selects the pin.
|
* @param ConfigFastModePlus Selects the pin.
|
||||||
* This parameter can be one of the @ref I2CEx_FastModePlus values
|
* This parameter can be one of the @ref I2CEx_FastModePlus values
|
||||||
* @note For I2C1, fast mode plus driving capability can be disabled on all selected
|
* @note For I2C1, fast mode plus driving capability can be disabled on all selected
|
||||||
* I2C1 pins using I2C_FASTMODEPLUS_I2C1 parameter or independently
|
* I2C1 pins using I2C_FASTMODEPLUS_I2C1 parameter or independently
|
||||||
|
|
@ -318,31 +323,29 @@ void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus)
|
||||||
{
|
{
|
||||||
/* Check the parameter */
|
/* Check the parameter */
|
||||||
assert_param(IS_I2C_FASTMODEPLUS(ConfigFastModePlus));
|
assert_param(IS_I2C_FASTMODEPLUS(ConfigFastModePlus));
|
||||||
|
|
||||||
/* Enable SYSCFG clock */
|
/* Enable SYSCFG clock */
|
||||||
__HAL_RCC_SYSCFG_CLK_ENABLE();
|
__HAL_RCC_SYSCFG_CLK_ENABLE();
|
||||||
|
|
||||||
/* Disable fast mode plus driving capability for selected pin */
|
/* Disable fast mode plus driving capability for selected pin */
|
||||||
CLEAR_BIT(SYSCFG->CFGR1, (uint32_t)ConfigFastModePlus);
|
CLEAR_BIT(SYSCFG->CFGR2, (uint32_t)ConfigFastModePlus);
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#endif /* HAL_I2C_MODULE_ENABLED */
|
#endif /* HAL_I2C_MODULE_ENABLED */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -2,9 +2,9 @@
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @file stm32l0xx_hal_i2c_ex.h
|
* @file stm32l0xx_hal_i2c_ex.h
|
||||||
* @author MCD Application Team
|
* @author MCD Application Team
|
||||||
* @version V1.7.0
|
* @version $VERSION$
|
||||||
* @date 31-May-2016
|
* @date $DATE$
|
||||||
* @brief Header file of I2C HAL Extension module.
|
* @brief Header file of I2C HAL Extended module.
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @attention
|
* @attention
|
||||||
*
|
*
|
||||||
|
|
@ -33,7 +33,7 @@
|
||||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
*
|
*
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
#ifndef __STM32L0xx_HAL_I2C_EX_H
|
#ifndef __STM32L0xx_HAL_I2C_EX_H
|
||||||
|
|
@ -44,124 +44,114 @@
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* Includes ------------------------------------------------------------------*/
|
/* Includes ------------------------------------------------------------------*/
|
||||||
#include "stm32l0xx_hal_def.h"
|
#include "stm32l0xx_hal_def.h"
|
||||||
|
|
||||||
/** @addtogroup STM32L0xx_HAL_Driver
|
/** @addtogroup STM32L0xx_HAL_Driver
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/** @defgroup I2CEx I2CEx
|
/** @addtogroup I2CEx
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* Exported types ------------------------------------------------------------*/
|
/* Exported types ------------------------------------------------------------*/
|
||||||
/* Exported constants --------------------------------------------------------*/
|
/* Exported constants --------------------------------------------------------*/
|
||||||
|
|
||||||
/** @defgroup I2CEx_Exported_Constants I2CEx Exported Constants
|
/** @defgroup I2CEx_Exported_Constants I2C Extended Exported Constants
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/** @defgroup I2CEx_Analog_Filter I2C Analog Filter Enabling
|
/** @defgroup I2CEx_Analog_Filter I2C Extended Analog Filter
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
#define I2C_ANALOGFILTER_ENABLE ((uint32_t)0x00000000U)
|
#define I2C_ANALOGFILTER_ENABLE 0x00000000U
|
||||||
#define I2C_ANALOGFILTER_DISABLE I2C_CR1_ANFOFF
|
#define I2C_ANALOGFILTER_DISABLE I2C_CR1_ANFOFF
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/** @defgroup I2CEx_FastModePlus I2C Fast Mode Plus
|
/** @defgroup I2CEx_FastModePlus I2C Extended Fast Mode Plus
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
#define I2C_FASTMODEPLUS_PB6 SYSCFG_CFGR2_I2C_PB6_FMP /*!< Enable Fast Mode Plus on PB6 */
|
#define I2C_FMP_NOT_SUPPORTED 0xAAAA0000U /*!< Fast Mode Plus not supported */
|
||||||
#define I2C_FASTMODEPLUS_PB7 SYSCFG_CFGR2_I2C_PB7_FMP /*!< Enable Fast Mode Plus on PB7 */
|
#define I2C_FASTMODEPLUS_PB6 SYSCFG_CFGR2_I2C_PB6_FMP /*!< Enable Fast Mode Plus on PB6 */
|
||||||
#define I2C_FASTMODEPLUS_PB8 SYSCFG_CFGR2_I2C_PB8_FMP /*!< Enable Fast Mode Plus on PB8 */
|
#define I2C_FASTMODEPLUS_PB7 SYSCFG_CFGR2_I2C_PB7_FMP /*!< Enable Fast Mode Plus on PB7 */
|
||||||
#define I2C_FASTMODEPLUS_PB9 SYSCFG_CFGR2_I2C_PB9_FMP /*!< Enable Fast Mode Plus on PB9 */
|
#define I2C_FASTMODEPLUS_PB8 SYSCFG_CFGR2_I2C_PB8_FMP /*!< Enable Fast Mode Plus on PB8 */
|
||||||
#define I2C_FASTMODEPLUS_I2C1 SYSCFG_CFGR2_I2C1_FMP /*!< Enable Fast Mode Plus on I2C1 pins */
|
#define I2C_FASTMODEPLUS_PB9 SYSCFG_CFGR2_I2C_PB9_FMP /*!< Enable Fast Mode Plus on PB9 */
|
||||||
#if !defined(STM32L011xx) && !defined(STM32L021xx) && !defined(STM32L031xx) && !defined(STM32L041xx)
|
#define I2C_FASTMODEPLUS_I2C1 SYSCFG_CFGR2_I2C1_FMP /*!< Enable Fast Mode Plus on I2C1 pins */
|
||||||
#define I2C_FASTMODEPLUS_I2C2 SYSCFG_CFGR2_I2C2_FMP /*!< Enable Fast Mode Plus on I2C2 pins */
|
#if defined(SYSCFG_CFGR2_I2C2_FMP)
|
||||||
|
#define I2C_FASTMODEPLUS_I2C2 SYSCFG_CFGR2_I2C2_FMP /*!< Enable Fast Mode Plus on I2C2 pins */
|
||||||
|
#else
|
||||||
|
#define I2C_FASTMODEPLUS_I2C2 (uint32_t)(0x00000200U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus I2C2 not supported */
|
||||||
#endif
|
#endif
|
||||||
#if defined(STM32L071xx) || defined(STM32L072xx) || defined(STM32L073xx) || defined(STM32L081xx) || defined(STM32L082xx) || defined(STM32L083xx)
|
#if defined(SYSCFG_CFGR2_I2C3_FMP)
|
||||||
#define I2C_FASTMODEPLUS_I2C3 SYSCFG_CFGR2_I2C3_FMP /*!< Enable Fast Mode Plus on I2C3 pins */
|
#define I2C_FASTMODEPLUS_I2C3 SYSCFG_CFGR2_I2C3_FMP /*!< Enable Fast Mode Plus on I2C3 pins */
|
||||||
|
#else
|
||||||
|
#define I2C_FASTMODEPLUS_I2C3 (uint32_t)(0x00000400U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus I2C3 not supported */
|
||||||
#endif
|
#endif
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* Exported macro ------------------------------------------------------------*/
|
/* Exported macro ------------------------------------------------------------*/
|
||||||
/* Exported functions --------------------------------------------------------*/
|
/* Exported functions --------------------------------------------------------*/
|
||||||
/** @defgroup I2CEx_Exported_Functions I2CEx Exported Functions
|
|
||||||
|
/** @addtogroup I2CEx_Exported_Functions I2C Extended Exported Functions
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* Peripheral Control methods ************************************************/
|
/** @addtogroup I2CEx_Exported_Functions_Group1 Extended features functions
|
||||||
|
* @brief Extended features functions
|
||||||
/** @addtogroup I2CEx_Exported_Functions_Group1 Extended Features Functions
|
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
/* Peripheral Control functions ************************************************/
|
||||||
HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter);
|
HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter);
|
||||||
HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter);
|
HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter);
|
||||||
HAL_StatusTypeDef HAL_I2CEx_EnableWakeUp(I2C_HandleTypeDef *hi2c);
|
HAL_StatusTypeDef HAL_I2CEx_EnableWakeUp(I2C_HandleTypeDef *hi2c);
|
||||||
HAL_StatusTypeDef HAL_I2CEx_DisableWakeUp(I2C_HandleTypeDef *hi2c);
|
HAL_StatusTypeDef HAL_I2CEx_DisableWakeUp(I2C_HandleTypeDef *hi2c);
|
||||||
void HAL_I2CEx_EnableFastModePlus(uint32_t ConfigFastModePlus);
|
void HAL_I2CEx_EnableFastModePlus(uint32_t ConfigFastModePlus);
|
||||||
void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus);
|
void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus);
|
||||||
/**
|
|
||||||
* @}
|
/* Private constants ---------------------------------------------------------*/
|
||||||
*/
|
/** @defgroup I2CEx_Private_Constants I2C Extended Private Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* Private macros ------------------------------------------------------------*/
|
/* Private macros ------------------------------------------------------------*/
|
||||||
/** @defgroup I2CEx_Private I2CEx Private
|
/** @defgroup I2CEx_Private_Macro I2C Extended Private Macros
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
#define IS_I2C_ANALOG_FILTER(FILTER) (((FILTER) == I2C_ANALOGFILTER_ENABLE) || \
|
#define IS_I2C_ANALOG_FILTER(FILTER) (((FILTER) == I2C_ANALOGFILTER_ENABLE) || \
|
||||||
((FILTER) == I2C_ANALOGFILTER_DISABLE))
|
((FILTER) == I2C_ANALOGFILTER_DISABLE))
|
||||||
|
|
||||||
#define IS_I2C_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000FU)
|
#define IS_I2C_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000FU)
|
||||||
|
|
||||||
#if defined(STM32L031xx) || defined(STM32L041xx) || defined(STM32L011xx) || defined(STM32L021xx)
|
#define IS_I2C_FASTMODEPLUS(__CONFIG__) ((((__CONFIG__) & I2C_FMP_NOT_SUPPORTED) != I2C_FMP_NOT_SUPPORTED) && \
|
||||||
#define IS_I2C_FASTMODEPLUS(__CONFIG__) ((((__CONFIG__) & (I2C_FASTMODEPLUS_PB6)) == I2C_FASTMODEPLUS_PB6) || \
|
((((__CONFIG__) & (I2C_FASTMODEPLUS_PB6)) == I2C_FASTMODEPLUS_PB6) || \
|
||||||
(((__CONFIG__) & (I2C_FASTMODEPLUS_PB7)) == I2C_FASTMODEPLUS_PB7) || \
|
(((__CONFIG__) & (I2C_FASTMODEPLUS_PB7)) == I2C_FASTMODEPLUS_PB7) || \
|
||||||
(((__CONFIG__) & (I2C_FASTMODEPLUS_PB8)) == I2C_FASTMODEPLUS_PB8) || \
|
(((__CONFIG__) & (I2C_FASTMODEPLUS_PB8)) == I2C_FASTMODEPLUS_PB8) || \
|
||||||
(((__CONFIG__) & (I2C_FASTMODEPLUS_PB9)) == I2C_FASTMODEPLUS_PB9) || \
|
(((__CONFIG__) & (I2C_FASTMODEPLUS_PB9)) == I2C_FASTMODEPLUS_PB9) || \
|
||||||
(((__CONFIG__) & (I2C_FASTMODEPLUS_I2C1)) == I2C_FASTMODEPLUS_I2C1))
|
(((__CONFIG__) & (I2C_FASTMODEPLUS_I2C1)) == I2C_FASTMODEPLUS_I2C1) || \
|
||||||
#elif defined(STM32L071xx) || defined(STM32L072xx) || defined(STM32L073xx) || defined(STM32L081xx) || defined(STM32L082xx) || defined(STM32L083xx)
|
(((__CONFIG__) & (I2C_FASTMODEPLUS_I2C2)) == I2C_FASTMODEPLUS_I2C2) || \
|
||||||
#define IS_I2C_FASTMODEPLUS(__CONFIG__) ((((__CONFIG__) & (I2C_FASTMODEPLUS_PB6)) == I2C_FASTMODEPLUS_PB6) || \
|
(((__CONFIG__) & (I2C_FASTMODEPLUS_I2C3)) == I2C_FASTMODEPLUS_I2C3)))
|
||||||
(((__CONFIG__) & (I2C_FASTMODEPLUS_PB7)) == I2C_FASTMODEPLUS_PB7) || \
|
|
||||||
(((__CONFIG__) & (I2C_FASTMODEPLUS_PB8)) == I2C_FASTMODEPLUS_PB8) || \
|
|
||||||
(((__CONFIG__) & (I2C_FASTMODEPLUS_PB9)) == I2C_FASTMODEPLUS_PB9) || \
|
|
||||||
(((__CONFIG__) & (I2C_FASTMODEPLUS_I2C1)) == I2C_FASTMODEPLUS_I2C1) || \
|
|
||||||
(((__CONFIG__) & (I2C_FASTMODEPLUS_I2C2)) == I2C_FASTMODEPLUS_I2C2) || \
|
|
||||||
(((__CONFIG__) & (I2C_FASTMODEPLUS_I2C3)) == I2C_FASTMODEPLUS_I2C3))
|
|
||||||
#else
|
|
||||||
#define IS_I2C_FASTMODEPLUS(__CONFIG__) ((((__CONFIG__) & (I2C_FASTMODEPLUS_PB6)) == I2C_FASTMODEPLUS_PB6) || \
|
|
||||||
(((__CONFIG__) & (I2C_FASTMODEPLUS_PB7)) == I2C_FASTMODEPLUS_PB7) || \
|
|
||||||
(((__CONFIG__) & (I2C_FASTMODEPLUS_PB8)) == I2C_FASTMODEPLUS_PB8) || \
|
|
||||||
(((__CONFIG__) & (I2C_FASTMODEPLUS_PB9)) == I2C_FASTMODEPLUS_PB9) || \
|
|
||||||
(((__CONFIG__) & (I2C_FASTMODEPLUS_I2C1)) == I2C_FASTMODEPLUS_I2C1) || \
|
|
||||||
(((__CONFIG__) & (I2C_FASTMODEPLUS_I2C2)) == I2C_FASTMODEPLUS_I2C2))
|
|
||||||
#endif
|
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
/* Define the private group ***********************************/
|
/* Private Functions ---------------------------------------------------------*/
|
||||||
/**************************************************************/
|
/** @defgroup I2CEx_Private_Functions I2C Extended Private Functions
|
||||||
/** @defgroup I2CEx_Private I2CEx Private
|
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
/**
|
/* Private functions are defined in stm32l0xx_hal_i2c_ex.c file */
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
/**************************************************************/
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
@ -169,13 +159,23 @@ void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus);
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#endif /* __STM32L0xx_HAL_I2C_EX_H */
|
#endif /* __STM32L0xx_HAL_I2C_EX_H */
|
||||||
|
|
||||||
|
|
||||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
|
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue