Merge pull request #12853 from hugueskamba/hk_remove_uarm_nxp_board

ARCH_PRO: Remove uARM tooolchain support

targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_ARM_MICRO/LPC1768.sct

@@ -1,69 +0,0 @@
-#! armcc -E
-
-#if !defined(MBED_APP_START)
-  #define MBED_APP_START            0x00000000
-#endif
-
-; 32K flash
-#if !defined(MBED_APP_SIZE)
-  #define MBED_APP_SIZE             0x80000
-#endif
-
-; 4KB
-#if !defined(MBED_RAM_START)
-  #define MBED_RAM_START            0x10000000
-#endif
-
-#if !defined(MBED_RAM_SIZE)
-  #define MBED_RAM_SIZE             0x00008000
-#endif
-
-
-#if !defined(MBED_BOOT_STACK_SIZE)
-  #define MBED_BOOT_STACK_SIZE      0x400
-#endif
-
-; 8_byte_aligned(49 vect * 4 bytes) =  8_byte_aligned(0xC4) = 0xC8
-#define VECTOR_SIZE                 0xC8
-
-#define RAM_FIXED_SIZE              (MBED_BOOT_STACK_SIZE+VECTOR_SIZE+0x20)
-
-LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {    ; load region size_region
-
-  ER_IROM0  MBED_APP_START  0x2FC  {  ; load address = execution address
-    *.o (RESET, +First)
-    .ANY (+RO)
-  }
-
-    ER_CRP (MBED_APP_START + 0x2FC) FIXED 4  {
-    *.o (.CRPSection)
-  }
-  
-  ER_IROM1 (MBED_APP_START + (0x2FC + 4)) FIXED (MBED_APP_SIZE - (0x2FC + 4))  {
-   *(InRoot$$Sections)
-   .ANY (+RO)
-  }
-
-  ; 32KB (RAM size) - 0xC8 (NIVT) - 32 (topmost 32 bytes used by IAP functions) = 0x7F18
-  RW_IRAM1  (MBED_RAM_START+VECTOR_SIZE)  (MBED_RAM_SIZE-VECTOR_SIZE-0x20)  {  ; RW data
-   .ANY (+RW +ZI)
-  }
-
-  ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
-  }
-
-  RW_IRAM2 0x2007C000 0x4000  {  ; RW data, USB RAM
-   .ANY (AHBSRAM0)
-  }
-
-  RW_IRAM3 0x20080000 0x4000  {  ; RW data, ETH RAM
-   .ANY (AHBSRAM1)
-  }
-
-  RW_IRAM4 0x40038000 0x0800  {  ; RW data, CAN RAM
-   .ANY (CANRAM)
-  }
-
-  ARM_LIB_STACK  (MBED_RAM_START+MBED_RAM_SIZE)  EMPTY  -MBED_BOOT_STACK_SIZE { ; stack
-  }
-}

targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_ARM_MICRO/startup_LPC17xx.S

@@ -1,220 +0,0 @@
-;/*****************************************************************************
-; * @file:    startup_LPC17xx.s
-; * @purpose: CMSIS Cortex-M3 Core Device Startup File 
-; *           for the NXP LPC17xx Device Series 
-; * @version: V1.02, modified for mbed
-; * @date:    27. July 2009, modified 3rd Aug 2009
-; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
-; *
-; * Copyright (C) 2009 ARM Limited. All rights reserved.
-; * ARM Limited (ARM) is supplying this software for use with Cortex-M3 
-; * processor based microcontrollers.  This file can be freely distributed 
-; * within development tools that are supporting such ARM based processors. 
-; *
-; * THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
-; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
-; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
-; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
-; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
-; *
-; *****************************************************************************/
-
-
-                PRESERVE8
-                THUMB
-
-; Vector Table Mapped to Address 0 at Reset
-
-                AREA    RESET, DATA, READONLY
-                EXPORT  __Vectors
-                IMPORT  |Image$$ARM_LIB_STACK$$ZI$$Limit|
-
-__Vectors       DCD     |Image$$ARM_LIB_STACK$$ZI$$Limit| ; Top of Stack
-                DCD     Reset_Handler             ; Reset Handler
-                DCD     NMI_Handler               ; NMI Handler
-                DCD     HardFault_Handler         ; Hard Fault Handler
-                DCD     MemManage_Handler         ; MPU Fault Handler
-                DCD     BusFault_Handler          ; Bus Fault Handler
-                DCD     UsageFault_Handler        ; Usage Fault Handler
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     0                         ; Reserved
-                DCD     SVC_Handler               ; SVCall Handler
-                DCD     DebugMon_Handler          ; Debug Monitor Handler
-                DCD     0                         ; Reserved
-                DCD     PendSV_Handler            ; PendSV Handler
-                DCD     SysTick_Handler           ; SysTick Handler
-
-                ; External Interrupts
-                DCD     WDT_IRQHandler            ; 16: Watchdog Timer
-                DCD     TIMER0_IRQHandler         ; 17: Timer0
-                DCD     TIMER1_IRQHandler         ; 18: Timer1
-                DCD     TIMER2_IRQHandler         ; 19: Timer2
-                DCD     TIMER3_IRQHandler         ; 20: Timer3
-                DCD     UART0_IRQHandler          ; 21: UART0
-                DCD     UART1_IRQHandler          ; 22: UART1
-                DCD     UART2_IRQHandler          ; 23: UART2
-                DCD     UART3_IRQHandler          ; 24: UART3
-                DCD     PWM1_IRQHandler           ; 25: PWM1
-                DCD     I2C0_IRQHandler           ; 26: I2C0
-                DCD     I2C1_IRQHandler           ; 27: I2C1
-                DCD     I2C2_IRQHandler           ; 28: I2C2
-                DCD     SPI_IRQHandler            ; 29: SPI
-                DCD     SSP0_IRQHandler           ; 30: SSP0
-                DCD     SSP1_IRQHandler           ; 31: SSP1
-                DCD     PLL0_IRQHandler           ; 32: PLL0 Lock (Main PLL)
-                DCD     RTC_IRQHandler            ; 33: Real Time Clock
-                DCD     EINT0_IRQHandler          ; 34: External Interrupt 0
-                DCD     EINT1_IRQHandler          ; 35: External Interrupt 1
-                DCD     EINT2_IRQHandler          ; 36: External Interrupt 2
-                DCD     EINT3_IRQHandler          ; 37: External Interrupt 3
-                DCD     ADC_IRQHandler            ; 38: A/D Converter
-                DCD     BOD_IRQHandler            ; 39: Brown-Out Detect
-                DCD     USB_IRQHandler            ; 40: USB
-                DCD     CAN_IRQHandler            ; 41: CAN
-                DCD     DMA_IRQHandler            ; 42: General Purpose DMA
-                DCD     I2S_IRQHandler            ; 43: I2S
-                DCD     ENET_IRQHandler           ; 44: Ethernet
-                DCD     RIT_IRQHandler            ; 45: Repetitive Interrupt Timer
-                DCD     MCPWM_IRQHandler          ; 46: Motor Control PWM
-                DCD     QEI_IRQHandler            ; 47: Quadrature Encoder Interface
-                DCD     PLL1_IRQHandler           ; 48: PLL1 Lock (USB PLL)
-
-
-                AREA    |.text|, CODE, READONLY
-
-
-; Reset Handler
-
-Reset_Handler   PROC
-                EXPORT  Reset_Handler             [WEAK]
-                IMPORT  SystemInit
-                IMPORT  __main
-                LDR     R0, =SystemInit
-                BLX     R0
-                LDR     R0, =__main
-                BX      R0
-                ENDP
-
-
-; Dummy Exception Handlers (infinite loops which can be modified)                
-
-NMI_Handler     PROC
-                EXPORT  NMI_Handler               [WEAK]
-                B       .
-                ENDP
-HardFault_Handler\
-                PROC
-                EXPORT  HardFault_Handler         [WEAK]
-                B       .
-                ENDP
-MemManage_Handler\
-                PROC
-                EXPORT  MemManage_Handler         [WEAK]
-                B       .
-                ENDP
-BusFault_Handler\
-                PROC
-                EXPORT  BusFault_Handler          [WEAK]
-                B       .
-                ENDP
-UsageFault_Handler\
-                PROC
-                EXPORT  UsageFault_Handler        [WEAK]
-                B       .
-                ENDP
-SVC_Handler     PROC
-                EXPORT  SVC_Handler               [WEAK]
-                B       .
-                ENDP
-DebugMon_Handler\
-                PROC
-                EXPORT  DebugMon_Handler          [WEAK]
-                B       .
-                ENDP
-PendSV_Handler  PROC
-                EXPORT  PendSV_Handler            [WEAK]
-                B       .
-                ENDP
-SysTick_Handler PROC
-                EXPORT  SysTick_Handler           [WEAK]
-                B       .
-                ENDP
-
-Default_Handler PROC
-
-                EXPORT  WDT_IRQHandler            [WEAK]
-                EXPORT  TIMER0_IRQHandler         [WEAK]
-                EXPORT  TIMER1_IRQHandler         [WEAK]
-                EXPORT  TIMER2_IRQHandler         [WEAK]
-                EXPORT  TIMER3_IRQHandler         [WEAK]
-                EXPORT  UART0_IRQHandler          [WEAK]
-                EXPORT  UART1_IRQHandler          [WEAK]
-                EXPORT  UART2_IRQHandler          [WEAK]
-                EXPORT  UART3_IRQHandler          [WEAK]
-                EXPORT  PWM1_IRQHandler           [WEAK]
-                EXPORT  I2C0_IRQHandler           [WEAK]
-                EXPORT  I2C1_IRQHandler           [WEAK]
-                EXPORT  I2C2_IRQHandler           [WEAK]
-                EXPORT  SPI_IRQHandler            [WEAK]
-                EXPORT  SSP0_IRQHandler           [WEAK]
-                EXPORT  SSP1_IRQHandler           [WEAK]
-                EXPORT  PLL0_IRQHandler           [WEAK]
-                EXPORT  RTC_IRQHandler            [WEAK]
-                EXPORT  EINT0_IRQHandler          [WEAK]
-                EXPORT  EINT1_IRQHandler          [WEAK]
-                EXPORT  EINT2_IRQHandler          [WEAK]
-                EXPORT  EINT3_IRQHandler          [WEAK]
-                EXPORT  ADC_IRQHandler            [WEAK]
-                EXPORT  BOD_IRQHandler            [WEAK]
-                EXPORT  USB_IRQHandler            [WEAK]
-                EXPORT  CAN_IRQHandler            [WEAK]
-                EXPORT  DMA_IRQHandler            [WEAK]
-                EXPORT  I2S_IRQHandler            [WEAK]
-                EXPORT  ENET_IRQHandler           [WEAK]
-                EXPORT  RIT_IRQHandler            [WEAK]
-                EXPORT  MCPWM_IRQHandler          [WEAK]
-                EXPORT  QEI_IRQHandler            [WEAK]
-                EXPORT  PLL1_IRQHandler           [WEAK]
-
-WDT_IRQHandler           
-TIMER0_IRQHandler         
-TIMER1_IRQHandler         
-TIMER2_IRQHandler         
-TIMER3_IRQHandler         
-UART0_IRQHandler          
-UART1_IRQHandler          
-UART2_IRQHandler          
-UART3_IRQHandler          
-PWM1_IRQHandler           
-I2C0_IRQHandler           
-I2C1_IRQHandler           
-I2C2_IRQHandler           
-SPI_IRQHandler            
-SSP0_IRQHandler           
-SSP1_IRQHandler           
-PLL0_IRQHandler           
-RTC_IRQHandler            
-EINT0_IRQHandler          
-EINT1_IRQHandler          
-EINT2_IRQHandler          
-EINT3_IRQHandler          
-ADC_IRQHandler            
-BOD_IRQHandler            
-USB_IRQHandler            
-CAN_IRQHandler            
-DMA_IRQHandler          
-I2S_IRQHandler            
-ENET_IRQHandler       
-RIT_IRQHandler          
-MCPWM_IRQHandler             
-QEI_IRQHandler            
-PLL1_IRQHandler           
-
-                B       .
-
-                ENDP
-                
-                ALIGN
-                END

targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_ARM_STD/LPC1768.sct

@@ -4,10 +4,12 @@
   #define MBED_APP_START            0x00000000
 #endif
 
+; 32K flash
 #if !defined(MBED_APP_SIZE)
   #define MBED_APP_SIZE             0x80000
 #endif
 
+; 4KB
 #if !defined(MBED_RAM_START)
   #define MBED_RAM_START            0x10000000
 #endif
@@ -16,6 +18,7 @@
   #define MBED_RAM_SIZE             0x00008000
 #endif
 
+
 #if !defined(MBED_BOOT_STACK_SIZE)
   #define MBED_BOOT_STACK_SIZE      0x400
 #endif
@@ -26,30 +29,37 @@
 #define RAM_FIXED_SIZE              (MBED_BOOT_STACK_SIZE+VECTOR_SIZE+0x20)
 
 LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {    ; load region size_region
+
   ER_IROM0  MBED_APP_START  0x2FC  {  ; load address = execution address
     *.o (RESET, +First)
     .ANY (+RO)
   }
+
     ER_CRP (MBED_APP_START + 0x2FC) FIXED 4  {
     *.o (.CRPSection)
   }
+  
   ER_IROM1 (MBED_APP_START + (0x2FC + 4)) FIXED (MBED_APP_SIZE - (0x2FC + 4))  {
    *(InRoot$$Sections)
    .ANY (+RO)
   }
-  ; 8_byte_aligned(49 vect * 4 bytes) =  8_byte_aligned(0xC4) = 0xC8
+
   ; 32KB (RAM size) - 0xC8 (NIVT) - 32 (topmost 32 bytes used by IAP functions) = 0x7F18
   RW_IRAM1  (MBED_RAM_START+VECTOR_SIZE)  (MBED_RAM_SIZE-VECTOR_SIZE-0x20)  {  ; RW data
    .ANY (+RW +ZI)
   }
+
   ARM_LIB_HEAP  AlignExpr(+0, 16)  EMPTY  (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16))  {
   }
+
   RW_IRAM2 0x2007C000 0x4000  {  ; RW data, USB RAM
    .ANY (AHBSRAM0)
   }
+
   RW_IRAM3 0x20080000 0x4000  {  ; RW data, ETH RAM
    .ANY (AHBSRAM1)
   }
+
   RW_IRAM4 0x40038000 0x0800  {  ; RW data, CAN RAM
    .ANY (CANRAM)
   }

targets/targets.json

@@ -541,10 +541,14 @@
         "core": "Cortex-M3",
         "supported_toolchains": [
             "ARM",
-            "uARM",
             "GCC_ARM",
             "IAR"
         ],
+        "supported_c_libs": {
+            "arm": ["std", "small"],
+            "gcc_arm": ["std", "small"],
+            "iar": ["std"]
+        },
         "extra_labels": [
             "NXP",
             "LPC176X",
@@ -583,10 +587,6 @@
             "WATCHDOG",
             "RESET_REASON"
         ],
-        "release_versions": [
-            "2",
-            "5"
-        ],
         "device_name": "LPC1768",
         "bootloader_supported": true,
         "overrides": {