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Merge pull request #8602 from artokin/sync_rf_drivers 

Sync 802.15.4 RF drivers
pull/8681/head
Cruz Monrreal 2018-11-08 10:06:27 -06:00 committed by GitHub
parent 937d68f0fd d5df64299a
commit 760b0740a9
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
10 changed files with 902 additions and 1046 deletions
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4
components/802.15.4_RF/atmel-rf-driver/mbed_lib.json
View File

@ -24,6 +24,10 @@
"provide-default": {
"help": "Provide default NanostackRfpy. [true/false]",
"value": false
},
"irq-thread-stack-size": {
"help": "The stack size of the Thread serving the Atmel RF interrupts",
"value": 1024
}
},
"target_overrides": {

338
components/802.15.4_RF/atmel-rf-driver/source/NanostackRfPhyAtmel.cpp
View File

@ -50,16 +50,14 @@
#define RFF_TX 0x04
#define RFF_CCA 0x08
typedef enum
{
typedef enum {
RF_MODE_NORMAL = 0,
RF_MODE_SNIFFER = 1,
RF_MODE_ED = 2
} rf_mode_t;
/*Atmel RF Part Type*/
typedef enum
{
typedef enum {
ATMEL_UNKNOW_DEV = 0,
ATMEL_AT86RF212,
ATMEL_AT86RF231, // No longer supported (doesn't give ED+status on frame read)
@ -67,8 +65,7 @@ typedef enum
} rf_trx_part_e;
/*Atmel RF states*/
typedef enum
{
typedef enum {
NOP = 0x00,
BUSY_RX = 0x01,
BUSY_TX = 0x02,
@ -273,7 +270,7 @@ RFBits::RFBits(PinName spi_mosi, PinName spi_miso,
SLP_TR(spi_slp),
IRQ(spi_irq)
#ifdef MBED_CONF_RTOS_PRESENT
,irq_thread(osPriorityRealtime, 1024)
, irq_thread(osPriorityRealtime, MBED_CONF_ATMEL_RF_IRQ_THREAD_STACK_SIZE, NULL, "atmel_irq_thread")
#endif
{
#ifdef MBED_CONF_RTOS_PRESENT
@ -313,7 +310,7 @@ static void rf_if_ack_timer_signal(void)
}
#endif
// *INDENT-OFF*
/* Delay functions for RF Chip SPI access */
#ifdef __CC_ARM
__asm static void delay_loop(uint32_t count)
@ -359,6 +356,7 @@ static void delay_loop(uint32_t count)
);
}
#endif
// *INDENT-ON*
static void delay_ns(uint32_t ns)
{
@ -393,8 +391,7 @@ static rf_trx_part_e rf_radio_type_read(void)
{
rf_trx_part_e ret_val = ATMEL_UNKNOW_DEV;
switch (rf_part_num)
{
switch (rf_part_num) {
case PART_AT86RF212:
ret_val = ATMEL_AT86RF212;
break;
@ -738,18 +735,14 @@ static void rf_if_write_rf_settings(void)
rf_part_num = rf_if_read_register(PART_NUM);
/*Sub-GHz RF settings*/
if(rf_part_num == PART_AT86RF212)
{
if (rf_part_num == PART_AT86RF212) {
/*GC_TX_OFFS mode-dependent setting - OQPSK*/
rf_if_write_register(RF_CTRL_0, 0x32);
if(rf_if_read_register(VERSION_NUM) == VERSION_AT86RF212B)
{
if (rf_if_read_register(VERSION_NUM) == VERSION_AT86RF212B) {
/*TX Output Power setting - 0 dBm North American Band*/
rf_if_write_register(PHY_TX_PWR, 0x03);
}
else
{
} else {
/*TX Output Power setting - 0 dBm North American Band*/
rf_if_write_register(PHY_TX_PWR, 0x24);
}
@ -760,8 +753,7 @@ static void rf_if_write_rf_settings(void)
rf_rssi_base_val = -98;
}
/*2.4GHz RF settings*/
else
{
else {
#if 0
/* Disable power saving functions for now - can only impact reliability,
* and don't have any users demanding it. */
@ -836,12 +828,9 @@ static void rf_if_write_short_addr_registers(uint8_t *short_address)
static void rf_if_ack_pending_ctrl(uint8_t state)
{
rf_if_lock();
if(state)
{
if (state) {
rf_if_set_bit(CSMA_SEED_1, (1 << AACK_SET_PD), (1 << AACK_SET_PD));
}
else
{
} else {
rf_if_clear_bit(CSMA_SEED_1, (1 << AACK_SET_PD));
}
rf_if_unlock();
@ -859,10 +848,11 @@ static uint8_t rf_if_last_acked_pending(void)
uint8_t last_acked_data_pending;
rf_if_lock();
if(rf_if_read_register(CSMA_SEED_1) & (1 << AACK_SET_PD))
if (rf_if_read_register(CSMA_SEED_1) & (1 << AACK_SET_PD)) {
last_acked_data_pending = 1;
else
} else {
last_acked_data_pending = 0;
}
rf_if_unlock();
return last_acked_data_pending;
@ -907,9 +897,10 @@ static void rf_if_write_ieee_addr_registers(uint8_t *address)
uint8_t i;
uint8_t temp = IEEE_ADDR_0;
for(i=0; i<8; i++)
for (i = 0; i < 8; i++) {
rf_if_write_register(temp++, address[7 - i]);
}
}
/*
* \brief Function writes data in RF frame buffer.
@ -941,8 +932,7 @@ static uint8_t rf_if_read_rnd(void)
uint8_t temp;
uint8_t tmp_rpc_val = 0;
/*RPC must be disabled while reading the random number*/
if(rf_part_num == PART_AT86RF233)
{
if (rf_part_num == PART_AT86RF233) {
tmp_rpc_val = rf_if_read_register(TRX_RPC);
rf_if_write_register(TRX_RPC, RX_RPC_CTRL | TRX_RPC_RSVD_1);
}
@ -956,8 +946,9 @@ static uint8_t rf_if_read_rnd(void)
wait_ms(1);
temp |= ((rf_if_read_register(PHY_RSSI) >> 5));
wait_ms(1);
if(rf_part_num == PART_AT86RF233)
if (rf_part_num == PART_AT86RF233) {
rf_if_write_register(TRX_RPC, tmp_rpc_val);
}
return temp;
}
@ -1080,39 +1071,30 @@ static void rf_if_irq_task_process_irq(void)
static void rf_if_interrupt_handler(void)
#endif
{
static uint8_t last_is, last_ts;
uint8_t irq_status, full_trx_status;
uint8_t orig_xah_ctrl_1 = xah_ctrl_1;
/*Read and clear interrupt flag, and pick up trx_status*/
irq_status = rf_if_read_register_with_status(IRQ_STATUS, &full_trx_status);
uint8_t orig_flags = rf_flags;
/*Frame end interrupt (RX and TX)*/
if(irq_status & TRX_END)
{
if (irq_status & TRX_END) {
/*TX done interrupt*/
rf_trx_states_t trx_status = rf_if_trx_status_from_full(full_trx_status);
if(trx_status == PLL_ON || trx_status == TX_ARET_ON)
{
if (trx_status == PLL_ON || trx_status == TX_ARET_ON) {
rf_handle_tx_end(trx_status);
}
/*Frame received interrupt*/
else
{
else {
rf_handle_rx_end(trx_status);
}
}
if(irq_status & CCA_ED_DONE)
{
if (irq_status & CCA_ED_DONE) {
rf_handle_cca_ed_done(full_trx_status);
}
if (irq_status & TRX_UR)
{
tr_error("Radio underrun is %x->%x ts %x->%x fl %x->%x x1 %x", last_is, irq_status, last_ts, full_trx_status, orig_flags, rf_flags, orig_xah_ctrl_1);
if (irq_status & TRX_UR) {
// Here some counter could be used to monitor the underrun occurancy count.
// Do not print anything here!
}
last_is = irq_status;
last_ts = full_trx_status;
}
/*
@ -1205,18 +1187,14 @@ static int8_t rf_device_register(const uint8_t *mac_addr)
rf_init();
radio_type = rf_radio_type_read();
if(radio_type != ATMEL_UNKNOW_DEV)
{
if (radio_type != ATMEL_UNKNOW_DEV) {
/*Set pointer to MAC address*/
device_driver.PHY_MAC = (uint8_t *)mac_addr;
device_driver.driver_description = (char *)"ATMEL_MAC";
//Create setup Used Radio chips
if(radio_type == ATMEL_AT86RF212)
{
if (radio_type == ATMEL_AT86RF212) {
device_driver.link_type = PHY_LINK_15_4_SUBGHZ_TYPE;
}
else
{
} else {
device_driver.link_type = PHY_LINK_15_4_2_4GHZ_TYPE;
}
device_driver.phy_channel_pages = phy_channel_pages;
@ -1364,8 +1342,9 @@ static void rf_write_settings(void)
/*Set output power*/
rf_if_write_set_tx_power_register(radio_tx_power);
/*Initialise Antenna Diversity*/
if(rf_use_antenna_diversity)
if (rf_use_antenna_diversity) {
rf_if_write_antenna_diversity_settings();
}
rf_if_unlock();
}
@ -1380,16 +1359,14 @@ static void rf_set_short_adr(uint8_t * short_address)
{
rf_if_lock();
/*Wake up RF if sleeping*/
if(rf_flags_check(RFF_ON) == 0)
{
if (rf_flags_check(RFF_ON) == 0) {
rf_if_disable_slptr();
rf_poll_trx_state_change(TRX_OFF);
}
/*Write address filter registers*/
rf_if_write_short_addr_registers(short_address);
/*RF back to sleep*/
if(rf_flags_check(RFF_ON) == 0)
{
if (rf_flags_check(RFF_ON) == 0) {
rf_if_enable_slptr();
}
rf_if_unlock();
@ -1406,16 +1383,14 @@ static void rf_set_pan_id(uint8_t *pan_id)
{
rf_if_lock();
/*Wake up RF if sleeping*/
if(rf_flags_check(RFF_ON) == 0)
{
if (rf_flags_check(RFF_ON) == 0) {
rf_if_disable_slptr();
rf_poll_trx_state_change(TRX_OFF);
}
/*Write address filter registers*/
rf_if_write_pan_id_registers(pan_id);
/*RF back to sleep*/
if(rf_flags_check(RFF_ON) == 0)
{
if (rf_flags_check(RFF_ON) == 0) {
rf_if_enable_slptr();
}
rf_if_unlock();
@ -1432,16 +1407,14 @@ static void rf_set_address(uint8_t *address)
{
rf_if_lock();
/*Wake up RF if sleeping*/
if(rf_flags_check(RFF_ON) == 0)
{
if (rf_flags_check(RFF_ON) == 0) {
rf_if_disable_slptr();
rf_poll_trx_state_change(TRX_OFF);
}
/*Write address filter registers*/
rf_if_write_ieee_addr_registers(address);
/*RF back to sleep*/
if(rf_flags_check(RFF_ON) == 0)
{
if (rf_flags_check(RFF_ON) == 0) {
rf_if_enable_slptr();
}
rf_if_unlock();
@ -1458,8 +1431,9 @@ static void rf_channel_set(uint8_t ch)
{
rf_if_lock();
rf_phy_channel = ch;
if(ch < 0x1f)
if (ch < 0x1f) {
rf_if_set_channel_register(ch);
}
rf_if_unlock();
}
@ -1504,29 +1478,28 @@ static void rf_init(void)
*/
static void rf_off(void)
{
if(rf_flags_check(RFF_ON))
{
if (rf_flags_check(RFF_ON)) {
rf_if_lock();
rf_cca_abort();
uint16_t while_counter = 0;
/*Wait while receiving*/
while(rf_if_read_trx_state() == BUSY_RX_AACK)
{
while (rf_if_read_trx_state() == BUSY_RX_AACK) {
while_counter++;
if(while_counter == 0xffff)
if (while_counter == 0xffff) {
break;
}
}
/*RF state change: RX_AACK_ON->PLL_ON->TRX_OFF->SLEEP*/
if(rf_if_read_trx_state() == RX_AACK_ON)
{
if (rf_if_read_trx_state() == RX_AACK_ON) {
rf_if_change_trx_state(PLL_ON);
}
rf_if_change_trx_state(TRX_OFF);
rf_if_enable_slptr();
/*Disable Antenna Diversity*/
if(rf_use_antenna_diversity)
if (rf_use_antenna_diversity) {
rf_if_disable_ant_div();
}
rf_if_unlock();
}
@ -1545,18 +1518,19 @@ static rf_trx_states_t rf_poll_trx_state_change(rf_trx_states_t trx_state)
{
uint16_t while_counter = 0;
if(trx_state == FORCE_PLL_ON)
if (trx_state == FORCE_PLL_ON) {
trx_state = PLL_ON;
else if(trx_state == FORCE_TRX_OFF)
} else if (trx_state == FORCE_TRX_OFF) {
trx_state = TRX_OFF;
}
rf_trx_states_t state_out;
while((state_out = rf_if_read_trx_state()) != trx_state)
{
while ((state_out = rf_if_read_trx_state()) != trx_state) {
while_counter++;
if(while_counter == 0x1ff)
if (while_counter == 0x1ff) {
break;
}
}
return state_out;
}
@ -1571,8 +1545,7 @@ static rf_trx_states_t rf_poll_trx_state_change(rf_trx_states_t trx_state)
static rf_trx_states_t rf_poll_for_state(void)
{
rf_trx_states_t state_out;
while((state_out = rf_if_read_trx_state()) == STATE_TRANSITION_IN_PROGRESS)
{
while ((state_out = rf_if_read_trx_state()) == STATE_TRANSITION_IN_PROGRESS) {
}
return state_out;
@ -1593,14 +1566,11 @@ static int8_t rf_start_cca(uint8_t *data_ptr, uint16_t data_length, uint8_t tx_h
rf_if_lock();
/*Check if transmitter is busy*/
rf_trx_states_t trx_state = rf_if_read_trx_state();
if(trx_state == BUSY_RX || trx_state == BUSY_RX_AACK || data_length > RF_MTU - 2)
{
if (trx_state == BUSY_RX || trx_state == BUSY_RX_AACK || data_length > RF_MTU - 2) {
rf_if_unlock();
/*Return busy*/
return -1;
}
else
{
} else {
rf_give_up_on_ack();
/*Nanostack has a static TX buffer, which will remain valid until we*/
@ -1660,7 +1630,6 @@ static bool rf_start_tx()
rf_flags_clear(RFF_RX);
// Check whether we saw any delay in the PLL_ON transition.
if (poll_count > 0) {
tr_warning("PLL_ON delayed, retry count: %d", poll_count);
// let's get back to the receiving state.
rf_receive(state);
return false;
@ -1686,42 +1655,32 @@ static bool rf_start_tx()
static void rf_receive(rf_trx_states_t trx_status)
{
uint16_t while_counter = 0;
if(rf_flags_check(RFF_ON) == 0)
{
if (rf_flags_check(RFF_ON) == 0) {
rf_on();
rf_channel_set(rf_phy_channel);
trx_status = TRX_OFF;
}
/*If not yet in RX state set it*/
if(rf_flags_check(RFF_RX) == 0)
{
if (rf_flags_check(RFF_RX) == 0) {
/*Wait while receiving data. Just making sure, usually this shouldn't happen. */
while(trx_status == BUSY_RX || trx_status == BUSY_RX_AACK || trx_status == STATE_TRANSITION_IN_PROGRESS)
{
while (trx_status == BUSY_RX || trx_status == BUSY_RX_AACK || trx_status == STATE_TRANSITION_IN_PROGRESS) {
while_counter++;
if(while_counter == 0xffff)
{
if (while_counter == 0xffff) {
break;
}
trx_status = rf_if_read_trx_state();
}
if((rf_mode == RF_MODE_SNIFFER) || (rf_mode == RF_MODE_ED))
{
if ((rf_mode == RF_MODE_SNIFFER) || (rf_mode == RF_MODE_ED)) {
if (trx_status != RX_ON) {
trx_status = rf_if_change_trx_state(RX_ON);
}
}
else
{
} else {
/*ACK is always received in promiscuous mode to bypass address filters*/
if(rf_rx_mode)
{
if (rf_rx_mode) {
rf_rx_mode = 0;
rf_if_enable_promiscuous_mode();
}
else
{
} else {
rf_if_disable_promiscuous_mode();
}
if (trx_status != RX_AACK_ON) {
@ -1729,8 +1688,7 @@ static void rf_receive(rf_trx_states_t trx_status)
}
}
/*If calibration timer was unable to calibrate the RF, run calibration now*/
if(!rf_tuned)
{
if (!rf_tuned) {
/*Start calibration. This can be done in states TRX_OFF, PLL_ON or in any receive state*/
rf_if_calibration();
/*RF is tuned now*/
@ -1753,8 +1711,7 @@ static void rf_calibration_cb(void)
/*clear tuned flag to start tuning in rf_receive*/
rf_tuned = 0;
/*If RF is in default receive state, start calibration*/
if(rf_if_read_trx_state() == RX_AACK_ON)
{
if (rf_if_read_trx_state() == RX_AACK_ON) {
rf_if_lock();
/*Set RF in PLL_ON state*/
rf_if_change_trx_state(PLL_ON);
@ -1783,14 +1740,15 @@ static void rf_calibration_cb(void)
static void rf_on(void)
{
/*Set RFF_ON flag*/
if(rf_flags_check(RFF_ON) == 0)
{
if (rf_flags_check(RFF_ON) == 0) {
rf_if_lock();
rf_flags_set(RFF_ON);
/*Enable Antenna diversity*/
if (rf_use_antenna_diversity)
/*Set ANT_EXT_SW_EN to enable controlling of antenna diversity*/
{
rf_if_enable_ant_div();
}
/*Wake up from sleep state*/
rf_if_disable_slptr();
@ -1831,17 +1789,17 @@ static void rf_handle_ack(uint8_t seq_number, uint8_t data_pending)
{
phy_link_tx_status_e phy_status;
/*Received ACK sequence must be equal with transmitted packet sequence*/
if(expected_ack_sequence == seq_number)
{
if (expected_ack_sequence == seq_number) {
rf_if_disable_promiscuous_mode();
rf_if_ack_wait_timer_stop();
expected_ack_sequence = -1;
/*When data pending bit in ACK frame is set, inform NET library*/
if(data_pending)
if (data_pending) {
phy_status = PHY_LINK_TX_DONE_PENDING;
else
} else {
phy_status = PHY_LINK_TX_DONE;
}
/*Call PHY TX Done API*/
if (device_driver.phy_tx_done_cb) {
device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, phy_status, 0, 0);
@ -1886,8 +1844,7 @@ static void rf_handle_rx_end(rf_trx_states_t trx_status)
rf_lqi = rf_scale_lqi(rf_rssi);
/*Handle received ACK*/
if((rf_buffer[0] & 0x07) == 0x02 && rf_mode != RF_MODE_SNIFFER)
{
if ((rf_buffer[0] & 0x07) == 0x02 && rf_mode != RF_MODE_SNIFFER) {
/*Check if data is pending*/
bool pending = (rf_buffer[0] & 0x10);
@ -1925,8 +1882,7 @@ static void rf_handle_tx_end(rf_trx_states_t trx_status)
{
rf_rx_mode = 0;
/*If ACK is needed for this transmission*/
if((rf_tx_data[0] & 0x20) && rf_flags_check(RFF_TX))
{
if ((rf_tx_data[0] & 0x20) && rf_flags_check(RFF_TX)) {
expected_ack_sequence = rf_tx_data[2];
rf_ack_wait_timer_start(rf_ack_wait_duration);
rf_rx_mode = 1;
@ -1958,13 +1914,11 @@ static void rf_handle_cca_ed_done(uint8_t full_trx_status)
bool success = false;
/*Check the result of CCA process*/
if((full_trx_status & CCA_STATUS) && rf_if_trx_status_from_full(full_trx_status) == RX_AACK_ON)
{
if ((full_trx_status & CCA_STATUS) && rf_if_trx_status_from_full(full_trx_status) == RX_AACK_ON) {
success = rf_start_tx();
}
if (!success)
{
if (!success) {
/*Send CCA fail notification*/
if (device_driver.phy_tx_done_cb) {
device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_CCA_FAIL, 0, 0);
@ -1983,8 +1937,7 @@ static void rf_handle_cca_ed_done(uint8_t full_trx_status)
static int8_t rf_interface_state_control(phy_interface_state_e new_state, uint8_t rf_channel)
{
int8_t ret_val = 0;
switch (new_state)
{
switch (new_state) {
/*Reset PHY driver and set to idle*/
case PHY_INTERFACE_RESET:
break;
@ -2033,16 +1986,12 @@ static int8_t rf_interface_state_control(phy_interface_state_e new_state, uint8_
*/
static int8_t rf_extension(phy_extension_type_e extension_type, uint8_t *data_ptr)
{
switch (extension_type)
{
switch (extension_type) {
/*Control MAC pending bit for Indirect data transmission*/
case PHY_EXTENSION_CTRL_PENDING_BIT:
if(*data_ptr)
{
if (*data_ptr) {
rf_if_ack_pending_ctrl(1);
}
else
{
} else {
rf_if_ack_pending_ctrl(0);
}
break;
@ -2084,8 +2033,7 @@ static int8_t rf_extension(phy_extension_type_e extension_type, uint8_t *data_pt
static int8_t rf_address_write(phy_address_type_e address_type, uint8_t *address_ptr)
{
int8_t ret_val = 0;
switch (address_type)
{
switch (address_type) {
/*Set 48-bit address*/
case PHY_MAC_48BIT:
break;
@ -2119,137 +2067,93 @@ static void rf_init_phy_mode(void)
/*Read used PHY Mode*/
tmp = rf_if_read_register(TRX_CTRL_2);
/*Set ACK wait time for used data rate*/
if(part == PART_AT86RF212)
{
if((tmp & 0x1f) == 0x00)
{
if (part == PART_AT86RF212) {
if ((tmp & 0x1f) == 0x00) {
rf_sensitivity = -110;
rf_ack_wait_duration = 938;
tmp = BPSK_20;
}
else if((tmp & 0x1f) == 0x04)
{
} else if ((tmp & 0x1f) == 0x04) {
rf_sensitivity = -108;
rf_ack_wait_duration = 469;
tmp = BPSK_40;
}
else if((tmp & 0x1f) == 0x14)
{
} else if ((tmp & 0x1f) == 0x14) {
rf_sensitivity = -108;
rf_ack_wait_duration = 469;
tmp = BPSK_40_ALT;
}
else if((tmp & 0x1f) == 0x08)
{
} else if ((tmp & 0x1f) == 0x08) {
rf_sensitivity = -101;
rf_ack_wait_duration = 50;
tmp = OQPSK_SIN_RC_100;
}
else if((tmp & 0x1f) == 0x09)
{
} else if ((tmp & 0x1f) == 0x09) {
rf_sensitivity = -99;
rf_ack_wait_duration = 30;
tmp = OQPSK_SIN_RC_200;
}
else if((tmp & 0x1f) == 0x18)
{
} else if ((tmp & 0x1f) == 0x18) {
rf_sensitivity = -102;
rf_ack_wait_duration = 50;
tmp = OQPSK_RC_100;
}
else if((tmp & 0x1f) == 0x19)
{
} else if ((tmp & 0x1f) == 0x19) {
rf_sensitivity = -100;
rf_ack_wait_duration = 30;
tmp = OQPSK_RC_200;
}
else if((tmp & 0x1f) == 0x0c)
{
} else if ((tmp & 0x1f) == 0x0c) {
rf_sensitivity = -100;
rf_ack_wait_duration = 20;
tmp = OQPSK_SIN_250;
}
else if((tmp & 0x1f) == 0x0d)
{
} else if ((tmp & 0x1f) == 0x0d) {
rf_sensitivity = -98;
rf_ack_wait_duration = 25;
tmp = OQPSK_SIN_500;
}
else if((tmp & 0x1f) == 0x0f)
{
} else if ((tmp & 0x1f) == 0x0f) {
rf_sensitivity = -98;
rf_ack_wait_duration = 25;
tmp = OQPSK_SIN_500_ALT;
}
else if((tmp & 0x1f) == 0x1c)
{
} else if ((tmp & 0x1f) == 0x1c) {
rf_sensitivity = -101;
rf_ack_wait_duration = 20;
tmp = OQPSK_RC_250;
}
else if((tmp & 0x1f) == 0x1d)
{
} else if ((tmp & 0x1f) == 0x1d) {
rf_sensitivity = -99;
rf_ack_wait_duration = 25;
tmp = OQPSK_RC_500;
}
else if((tmp & 0x1f) == 0x1f)
{
} else if ((tmp & 0x1f) == 0x1f) {
rf_sensitivity = -99;
rf_ack_wait_duration = 25;
tmp = OQPSK_RC_500_ALT;
}
else if((tmp & 0x3f) == 0x2A)
{
} else if ((tmp & 0x3f) == 0x2A) {
rf_sensitivity = -91;
rf_ack_wait_duration = 25;
tmp = OQPSK_SIN_RC_400_SCR_ON;
}
else if((tmp & 0x3f) == 0x0A)
{
} else if ((tmp & 0x3f) == 0x0A) {
rf_sensitivity = -91;
rf_ack_wait_duration = 25;
tmp = OQPSK_SIN_RC_400_SCR_OFF;
}
else if((tmp & 0x3f) == 0x3A)
{
} else if ((tmp & 0x3f) == 0x3A) {
rf_sensitivity = -97;
rf_ack_wait_duration = 25;
tmp = OQPSK_RC_400_SCR_ON;
}
else if((tmp & 0x3f) == 0x1A)
{
} else if ((tmp & 0x3f) == 0x1A) {
rf_sensitivity = -97;
rf_ack_wait_duration = 25;
tmp = OQPSK_RC_400_SCR_OFF;
}
else if((tmp & 0x3f) == 0x2E)
{
} else if ((tmp & 0x3f) == 0x2E) {
rf_sensitivity = -93;
rf_ack_wait_duration = 13;
tmp = OQPSK_SIN_1000_SCR_ON;
}
else if((tmp & 0x3f) == 0x0E)
{
} else if ((tmp & 0x3f) == 0x0E) {
rf_sensitivity = -93;
rf_ack_wait_duration = 13;
tmp = OQPSK_SIN_1000_SCR_OFF;
}
else if((tmp & 0x3f) == 0x3E)
{
} else if ((tmp & 0x3f) == 0x3E) {
rf_sensitivity = -95;
rf_ack_wait_duration = 13;
tmp = OQPSK_RC_1000_SCR_ON;
}
else if((tmp & 0x3f) == 0x1E)
{
} else if ((tmp & 0x3f) == 0x1E) {
rf_sensitivity = -95;
rf_ack_wait_duration = 13;
tmp = OQPSK_RC_1000_SCR_OFF;
}
}
else
{
} else {
rf_sensitivity = -101;
rf_ack_wait_duration = 20;
}
@ -2263,43 +2167,53 @@ static uint8_t rf_scale_lqi(int8_t rssi)
uint8_t scaled_lqi;
/*rssi < RF sensitivity*/
if(rssi < rf_sensitivity)
if (rssi < rf_sensitivity) {
scaled_lqi = 0;
}
/*-91 dBm < rssi < -81 dBm (AT86RF233 XPro)*/
/*-90 dBm < rssi < -80 dBm (AT86RF212B XPro)*/
else if(rssi < (rf_sensitivity + 10))
else if (rssi < (rf_sensitivity + 10)) {
scaled_lqi = 31;
}
/*-81 dBm < rssi < -71 dBm (AT86RF233 XPro)*/
/*-80 dBm < rssi < -70 dBm (AT86RF212B XPro)*/
else if(rssi < (rf_sensitivity + 20))
else if (rssi < (rf_sensitivity + 20)) {
scaled_lqi = 207;
}
/*-71 dBm < rssi < -61 dBm (AT86RF233 XPro)*/
/*-70 dBm < rssi < -60 dBm (AT86RF212B XPro)*/
else if(rssi < (rf_sensitivity + 30))
else if (rssi < (rf_sensitivity + 30)) {
scaled_lqi = 255;
}
/*-61 dBm < rssi < -51 dBm (AT86RF233 XPro)*/
/*-60 dBm < rssi < -50 dBm (AT86RF212B XPro)*/
else if(rssi < (rf_sensitivity + 40))
else if (rssi < (rf_sensitivity + 40)) {
scaled_lqi = 255;
}
/*-51 dBm < rssi < -41 dBm (AT86RF233 XPro)*/
/*-50 dBm < rssi < -40 dBm (AT86RF212B XPro)*/
else if(rssi < (rf_sensitivity + 50))
else if (rssi < (rf_sensitivity + 50)) {
scaled_lqi = 255;
}
/*-41 dBm < rssi < -31 dBm (AT86RF233 XPro)*/
/*-40 dBm < rssi < -30 dBm (AT86RF212B XPro)*/
else if(rssi < (rf_sensitivity + 60))
else if (rssi < (rf_sensitivity + 60)) {
scaled_lqi = 255;
}
/*-31 dBm < rssi < -21 dBm (AT86RF233 XPro)*/
/*-30 dBm < rssi < -20 dBm (AT86RF212B XPro)*/
else if(rssi < (rf_sensitivity + 70))
else if (rssi < (rf_sensitivity + 70)) {
scaled_lqi = 255;
}
/*rssi > RF saturation*/
else if(rssi > (rf_sensitivity + 80))
else if (rssi > (rf_sensitivity + 80)) {
scaled_lqi = 111;
}
/*-21 dBm < rssi < -11 dBm (AT86RF233 XPro)*/
/*-20 dBm < rssi < -10 dBm (AT86RF212B XPro)*/
else
else {
scaled_lqi = 255;
}
return scaled_lqi;
}

9
components/802.15.4_RF/atmel-rf-driver/source/at24mac.cpp
View File

@ -41,24 +41,27 @@ AT24Mac::AT24Mac(PinName sda, PinName scl) : _i2c(sda , scl)
int AT24Mac::read_serial(void *buf)
{
char offset = AT24MAC_SERIAL_OFFSET;
if (_i2c.write(AT24MAC_SERIAL_ADDRESS, &offset, 1, true))
if (_i2c.write(AT24MAC_SERIAL_ADDRESS, &offset, 1, true)) {
return -1; //No ACK
}
return _i2c.read(AT24MAC_SERIAL_ADDRESS, (char *)buf, SERIAL_LEN);
}
int AT24Mac::read_eui64(void *buf)
{
char offset = AT24MAC_EUI64_OFFSET;
if (_i2c.write(AT24MAC_SERIAL_ADDRESS, &offset, 1, true))
if (_i2c.write(AT24MAC_SERIAL_ADDRESS, &offset, 1, true)) {
return -1; //No ACK
}
return _i2c.read(AT24MAC_SERIAL_ADDRESS, (char *)buf, EUI64_LEN);
}
int AT24Mac::read_eui48(void *buf)
{
char offset = AT24MAC_EUI48_OFFSET;
if (_i2c.write(AT24MAC_SERIAL_ADDRESS, &offset, 1, true))
if (_i2c.write(AT24MAC_SERIAL_ADDRESS, &offset, 1, true)) {
return -1; //No ACK
}
return _i2c.read(AT24MAC_SERIAL_ADDRESS, (char *)buf, EUI48_LEN);
}

30
components/802.15.4_RF/mcr20a-rf-driver/source/MCR20Drv.c
View File

@ -165,8 +165,7 @@ uint8_t numOfBytes
{
uint8_t txData;
if( (numOfBytes == 0) || (byteArray == 0) )
{
if ((numOfBytes == 0) || (byteArray == 0)) {
return;
}
@ -231,8 +230,7 @@ uint8_t numOfBytes
{
uint8_t txData;
if( (numOfBytes == 0) || (byteArray == 0) )
{
if ((numOfBytes == 0) || (byteArray == 0)) {
return;
}
@ -303,8 +301,7 @@ uint8_t numOfBytes
uint8_t txData;
uint8_t phyIRQSTS1;
if( (numOfBytes == 0) || (byteArray == 0) )
{
if ((numOfBytes == 0) || (byteArray == 0)) {
return 0;
}
@ -341,8 +338,7 @@ uint8_t numOfBytes
uint8_t txData;
uint8_t phyIRQSTS1;
if( (numOfBytes == 0) || (byteArray == 0) )
{
if ((numOfBytes == 0) || (byteArray == 0)) {
return 0;
}
@ -410,8 +406,7 @@ uint8_t numOfBytes
{
uint16_t txData;
if( (numOfBytes == 0) || (byteArray == 0) )
{
if ((numOfBytes == 0) || (byteArray == 0)) {
return;
}
@ -478,8 +473,7 @@ uint8_t numOfBytes
{
uint16_t txData;
if( (numOfBytes == 0) || (byteArray == 0) )
{
if ((numOfBytes == 0) || (byteArray == 0)) {
return;
}
@ -526,8 +520,7 @@ void
{
core_util_critical_section_enter();
if( mPhyIrqDisableCnt == 0 )
{
if (mPhyIrqDisableCnt == 0) {
RF_IRQ_Disable();
}
@ -549,12 +542,10 @@ void
{
core_util_critical_section_enter();
if( mPhyIrqDisableCnt )
{
if (mPhyIrqDisableCnt) {
mPhyIrqDisableCnt--;
if( mPhyIrqDisableCnt == 0 )
{
if (mPhyIrqDisableCnt == 0) {
RF_IRQ_Enable();
}
}
@ -672,8 +663,7 @@ uint8_t freqDiv
{
uint8_t clkOutCtrlReg = (freqDiv & cCLK_OUT_DIV_Mask) | cCLK_OUT_EN | cCLK_OUT_EXTEND;
if(freqDiv == gCLK_OUT_FREQ_DISABLE)
{
if (freqDiv == gCLK_OUT_FREQ_DISABLE) {
clkOutCtrlReg = (cCLK_OUT_EXTEND | gCLK_OUT_FREQ_4_MHz); //reset value with clock out disabled
}

243
components/802.15.4_RF/mcr20a-rf-driver/source/NanostackRfPhyMcr20a.cpp
View File

@ -85,15 +85,13 @@ typedef enum xcvrPwrMode_tag{
/*RF Part Type*/
typedef enum
{
typedef enum {
FREESCALE_UNKNOW_DEV = 0,
FREESCALE_MCR20A
} rf_trx_part_e;
/*Atmel RF states*/
typedef enum
{
typedef enum {
NOP = 0x00,
BUSY_RX = 0x01,
RF_TX_START = 0x02,
@ -237,8 +235,7 @@ static int8_t rf_device_register(void)
radio_type = rf_radio_type_read();
if(radio_type == FREESCALE_MCR20A)
{
if (radio_type == FREESCALE_MCR20A) {
/*Set pointer to MAC address*/
device_driver.PHY_MAC = MAC_address;
device_driver.driver_description = (char *)"FREESCALE_MAC";
@ -549,11 +546,13 @@ static void rf_init(void)
cRX_FRAME_FLT_DATA_FT | \
cRX_FRAME_FLT_CMD_FT));
/* Direct register overwrites */
for (index = 0; index < sizeof(overwrites_direct)/sizeof(overwrites_t); index++)
for (index = 0; index < sizeof(overwrites_direct) / sizeof(overwrites_t); index++) {
MCR20Drv_DirectAccessSPIWrite(overwrites_direct[index].address, overwrites_direct[index].data);
}
/* Indirect register overwrites */
for (index = 0; index < sizeof(overwrites_indirect)/sizeof(overwrites_t); index++)
for (index = 0; index < sizeof(overwrites_indirect) / sizeof(overwrites_t); index++) {
MCR20Drv_IndirectAccessSPIWrite(overwrites_indirect[index].address, overwrites_indirect[index].data);
}
/* Set the CCA energy threshold value */
MCR20Drv_IndirectAccessSPIWrite(CCA1_THRESH, RF_CCA_THRESHOLD);
@ -613,17 +612,14 @@ static int8_t rf_start_cca(uint8_t *data_ptr, uint16_t data_length, uint8_t tx_h
uint8_t ccaMode;
/* Parameter validation */
if( !data_ptr || (data_length > 125) || (PHY_LAYER_PAYLOAD != data_protocol) )
{
if (!data_ptr || (data_length > 125) || (PHY_LAYER_PAYLOAD != data_protocol)) {
return -1;
}
if( mPhySeqState == gRX_c )
{
if (mPhySeqState == gRX_c) {
uint8_t phyReg = MCR20Drv_DirectAccessSPIRead(SEQ_STATE) & 0x1F;
/* Check for an Rx in progress. */
if((phyReg <= 0x06) || (phyReg == 0x15) || (phyReg == 0x16))
{
if ((phyReg <= 0x06) || (phyReg == 0x15) || (phyReg == 0x16)) {
if (device_driver.phy_tx_done_cb) {
device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_CCA_FAIL, 1, 1);
}
@ -633,8 +629,7 @@ static int8_t rf_start_cca(uint8_t *data_ptr, uint16_t data_length, uint8_t tx_h
}
/*Check if transmitter is busy*/
if( mPhySeqState != gIdle_c )
{
if (mPhySeqState != gIdle_c) {
/*Return busy*/
return -1;
}
@ -653,8 +648,7 @@ static int8_t rf_start_cca(uint8_t *data_ptr, uint16_t data_length, uint8_t tx_h
/* Set CCA mode 1 */
ccaMode = (mStatusAndControlRegs[PHY_CTRL4] >> cPHY_CTRL4_CCATYPE_Shift_c) & cPHY_CTRL4_CCATYPE;
if( ccaMode != gCcaCCA_MODE1_c )
{
if (ccaMode != gCcaCCA_MODE1_c) {
mStatusAndControlRegs[PHY_CTRL4] &= ~(cPHY_CTRL4_CCATYPE << cPHY_CTRL4_CCATYPE_Shift_c);
mStatusAndControlRegs[PHY_CTRL4] |= gCcaCCA_MODE1_c << cPHY_CTRL4_CCATYPE_Shift_c;
MCR20Drv_DirectAccessSPIWrite(PHY_CTRL4, mStatusAndControlRegs[PHY_CTRL4]);
@ -704,13 +698,10 @@ static void rf_cca_abort(void)
static void rf_start_tx(void)
{
/* Perform TxRxAck sequence if required by phyTxMode */
if( need_ack )
{
if (need_ack) {
mStatusAndControlRegs[PHY_CTRL1] |= cPHY_CTRL1_RXACKRQD;
mPhySeqState = gTR_c;
}
else
{
} else {
mStatusAndControlRegs[PHY_CTRL1] &= ~(cPHY_CTRL1_RXACKRQD);
mPhySeqState = gTX_c;
}
@ -724,8 +715,7 @@ static void rf_start_tx(void)
/* Start the sequence immediately */
MCR20Drv_DirectAccessSPIMultiByteWrite(PHY_CTRL1, &mStatusAndControlRegs[PHY_CTRL1], 2);
if( need_ack )
{
if (need_ack) {
rf_ack_wait_timer_start(gPhyWarmUpTime_c + gPhySHRDuration_c + tx_len * gPhySymbolsPerOctet_c + gPhyAckWaitDuration_c);
}
}
@ -742,8 +732,7 @@ static void rf_receive(void)
uint8_t phyRegs[5];
/* RX can start only from Idle state */
if( mPhySeqState != gIdle_c )
{
if (mPhySeqState != gIdle_c) {
return;
}
@ -804,8 +793,7 @@ static void rf_handle_rx_end(void)
rf_receive();
/*Check the length is valid*/
if(len > 1 && len < RF_BUFFER_SIZE)
{
if (len > 1 && len < RF_BUFFER_SIZE) {
rf_lqi = rf_convert_LQI(rf_lqi);
rf_rssi = rf_convert_LQI_to_RSSI(rf_lqi);
/*gcararu: Scale LQI using received RSSI, to match the LQI reported by the ATMEL radio */
@ -851,20 +839,14 @@ static void rf_handle_tx_end(void)
}
/*Call PHY TX Done API*/
if( need_ack )
{
if( rx_frame_pending )
{
if (need_ack) {
if (rx_frame_pending) {
device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_TX_DONE_PENDING, 1, 1);
}
else
{
} else {
// arm_net_phy_tx_done(rf_radio_driver_id, mac_tx_handle, PHY_LINK_TX_SUCCESS, 1, 1);
device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_TX_DONE, 1, 1);
}
}
else
{
} else {
device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_TX_SUCCESS, 1, 1);
}
}
@ -879,12 +861,9 @@ static void rf_handle_tx_end(void)
static void rf_handle_cca_ed_done(void)
{
/*Check the result of CCA process*/
if( !(mStatusAndControlRegs[IRQSTS2] & cIRQSTS2_CCA) )
{
if (!(mStatusAndControlRegs[IRQSTS2] & cIRQSTS2_CCA)) {
rf_start_tx();
}
else if (device_driver.phy_tx_done_cb)
{
} else if (device_driver.phy_tx_done_cb) {
/*Send CCA fail notification*/
device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_CCA_FAIL, 1, 1);
}
@ -903,8 +882,7 @@ static int8_t rf_tx_power_set(uint8_t power)
/* gcapraru: Map MCR20A Tx power levels over ATMEL values */
static uint8_t pwrLevelMapping[16] = {25, 25, 25, 24, 24, 24, 23, 23, 22, 22, 21, 20, 19, 18, 17, 14};
if( power > 15 )
{
if (power > 15) {
return -1;
}
@ -958,8 +936,7 @@ static int8_t rf_enable_antenna_diversity(void)
static int8_t rf_interface_state_control(phy_interface_state_e new_state, uint8_t rf_channel)
{
int8_t ret_val = 0;
switch (new_state)
{
switch (new_state) {
/*Reset PHY driver and set to idle*/
case PHY_INTERFACE_RESET:
break;
@ -996,19 +973,14 @@ static int8_t rf_interface_state_control(phy_interface_state_e new_state, uint8_
*/
static int8_t rf_extension(phy_extension_type_e extension_type, uint8_t *data_ptr)
{
switch (extension_type)
{
switch (extension_type) {
/*Control MAC pending bit for Indirect data transmission*/
case PHY_EXTENSION_CTRL_PENDING_BIT:
{
case PHY_EXTENSION_CTRL_PENDING_BIT: {
uint8_t reg = MCR20Drv_DirectAccessSPIRead(SRC_CTRL);
if(*data_ptr)
{
if (*data_ptr) {
reg |= cSRC_CTRL_ACK_FRM_PND;
}
else
{
} else {
reg &= ~cSRC_CTRL_ACK_FRM_PND;
}
@ -1026,19 +998,11 @@ static int8_t rf_extension(phy_extension_type_e extension_type, uint8_t *data_pt
}
break;
}
/*Set channel*/
case PHY_EXTENSION_SET_CHANNEL:
break;
/*Read energy on the channel*/
case PHY_EXTENSION_READ_CHANNEL_ENERGY:
*data_ptr = rf_get_channel_energy();
break;
/*Read status of the link*/
case PHY_EXTENSION_READ_LINK_STATUS:
break;
case PHY_EXTENSION_CONVERT_SIGNAL_INFO:
break;
case PHY_EXTENSION_ACCEPT_ANY_BEACON:
default:
break;
}
return 0;
@ -1055,8 +1019,7 @@ static int8_t rf_extension(phy_extension_type_e extension_type, uint8_t *data_pt
static int8_t rf_address_write(phy_address_type_e address_type, uint8_t *address_ptr)
{
int8_t ret_val = 0;
switch (address_type)
{
switch (address_type) {
/*Set 48-bit address*/
case PHY_MAC_48BIT:
break;
@ -1121,10 +1084,8 @@ static void handle_interrupt(void)
/* Flter Fail IRQ */
if ((mStatusAndControlRegs[IRQSTS1] & cIRQSTS1_FILTERFAIL_IRQ) &&
!(mStatusAndControlRegs[PHY_CTRL2] & cPHY_CTRL2_FILTERFAIL_MSK) )
{
if( xcvseqCopy == gRX_c )
{
!(mStatusAndControlRegs[PHY_CTRL2] & cPHY_CTRL2_FILTERFAIL_MSK)) {
if (xcvseqCopy == gRX_c) {
/* Abort current SEQ */
mStatusAndControlRegs[PHY_CTRL1] &= ~(cPHY_CTRL1_XCVSEQ);
MCR20Drv_DirectAccessSPIWrite(PHY_CTRL1, mStatusAndControlRegs[PHY_CTRL1]);
@ -1140,13 +1101,11 @@ static void handle_interrupt(void)
/* TMR3 IRQ: ACK wait time-out */
if ((mStatusAndControlRegs[IRQSTS3] & cIRQSTS3_TMR3IRQ) &&
!(mStatusAndControlRegs[IRQSTS3] & cIRQSTS3_TMR3MSK) )
{
!(mStatusAndControlRegs[IRQSTS3] & cIRQSTS3_TMR3MSK)) {
/* Disable TMR3 IRQ */
mStatusAndControlRegs[IRQSTS3] |= cIRQSTS3_TMR3MSK;
if( xcvseqCopy == gTR_c )
{
if (xcvseqCopy == gTR_c) {
/* Set XCVR to Idle */
mPhySeqState = gIdle_c;
mStatusAndControlRegs[PHY_CTRL1] &= ~(cPHY_CTRL1_XCVSEQ);
@ -1162,8 +1121,7 @@ static void handle_interrupt(void)
/* Sequencer interrupt, the autosequence has completed */
if ((mStatusAndControlRegs[IRQSTS1] & cIRQSTS1_SEQIRQ) &&
!(mStatusAndControlRegs[PHY_CTRL2] & cPHY_CTRL2_SEQMSK) )
{
!(mStatusAndControlRegs[PHY_CTRL2] & cPHY_CTRL2_SEQMSK)) {
/* Set XCVR to Idle */
mPhySeqState = gIdle_c;
mStatusAndControlRegs[PHY_CTRL1] &= ~(cPHY_CTRL1_XCVSEQ);
@ -1173,17 +1131,14 @@ static void handle_interrupt(void)
MCR20Drv_DirectAccessSPIMultiByteWrite(IRQSTS1, mStatusAndControlRegs, 5);
/* PLL unlock, the autosequence has been aborted due to PLL unlock */
if( mStatusAndControlRegs[IRQSTS1] & cIRQSTS1_PLL_UNLOCK_IRQ )
{
if(xcvseqCopy == gRX_c)
{
if (mStatusAndControlRegs[IRQSTS1] & cIRQSTS1_PLL_UNLOCK_IRQ) {
if (xcvseqCopy == gRX_c) {
rf_receive();
}
return;
}
switch(xcvseqCopy)
{
switch (xcvseqCopy) {
case gTX_c:
case gTR_c:
rf_handle_tx_end();
@ -1227,8 +1182,7 @@ static void rf_abort(void)
mStatusAndControlRegs[PHY_CTRL2] |= cPHY_CTRL2_SEQMSK;
MCR20Drv_DirectAccessSPIWrite(PHY_CTRL2, mStatusAndControlRegs[PHY_CTRL2]);
if( (mStatusAndControlRegs[PHY_CTRL1] & cPHY_CTRL1_XCVSEQ) != gIdle_c )
{
if ((mStatusAndControlRegs[PHY_CTRL1] & cPHY_CTRL1_XCVSEQ) != gIdle_c) {
/* Abort current SEQ */
mStatusAndControlRegs[PHY_CTRL1] &= ~(cPHY_CTRL1_XCVSEQ);
MCR20Drv_DirectAccessSPIWrite(PHY_CTRL1, mStatusAndControlRegs[PHY_CTRL1]);
@ -1258,8 +1212,7 @@ static void rf_abort(void)
*/
static void rf_get_timestamp(uint32_t *pRetClk)
{
if(NULL == pRetClk)
{
if (NULL == pRetClk) {
return;
}
@ -1282,8 +1235,7 @@ static void rf_set_timeout(uint32_t *pEndTime)
{
uint8_t phyReg;
if(NULL == pEndTime)
{
if (NULL == pEndTime) {
return;
}
@ -1318,8 +1270,7 @@ static uint8_t rf_if_read_rnd(void)
/* Check if XCVR is idle */
phyReg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL1);
if( (phyReg & cPHY_CTRL1_XCVSEQ) == gIdle_c )
{
if ((phyReg & cPHY_CTRL1_XCVSEQ) == gIdle_c) {
/* Program a new sequence */
MCR20Drv_DirectAccessSPIWrite(PHY_CTRL1, phyReg | gCCA_c);
/* Wait for sequence to finish */
@ -1358,16 +1309,11 @@ static uint8_t rf_convert_LQI(uint8_t hwLqi)
uint32_t tmpLQI;
/* LQI Saturation Level */
if (hwLqi >= 230)
{
if (hwLqi >= 230) {
return 0xFF;
}
else if (hwLqi <= 9)
{
} else if (hwLqi <= 9) {
return 0;
}
else
{
} else {
/* Rescale the LQI values from min to saturation to the 0x00 - 0xFF range */
/* The LQI value mst be multiplied by ~1.1087 */
/* tmpLQI = hwLqi * 7123 ~= hwLqi * 65536 * 0.1087 = hwLqi * 2^16 * 0.1087*/
@ -1393,16 +1339,13 @@ static void rf_promiscuous(uint8_t state)
rxFrameFltReg = MCR20Drv_IndirectAccessSPIRead(RX_FRAME_FILTER);
phyCtrl4Reg = MCR20Drv_DirectAccessSPIRead(PHY_CTRL4);
if( state )
{
if (state) {
/* FRM_VER[1:0] = b00. 00: Any FrameVersion accepted (0,1,2 & 3) */
/* All frame types accepted*/
phyCtrl4Reg |= cPHY_CTRL4_PROMISCUOUS;
rxFrameFltReg &= ~(cRX_FRAME_FLT_FRM_VER);
rxFrameFltReg |= (cRX_FRAME_FLT_ACK_FT | cRX_FRAME_FLT_NS_FT);
}
else
{
} else {
phyCtrl4Reg &= ~cPHY_CTRL4_PROMISCUOUS;
/* FRM_VER[1:0] = b11. Accept FrameVersion 0 and 1 packets, reject all others */
/* Beacon, Data and MAC command frame types accepted */
@ -1427,8 +1370,7 @@ static void rf_set_power_state(xcvrPwrMode_t newState)
uint8_t pwrMode;
uint8_t xtalState;
if( mPwrState == newState )
{
if (mPwrState == newState) {
return;
}
@ -1436,8 +1378,7 @@ static void rf_set_power_state(xcvrPwrMode_t newState)
pwrMode = MCR20Drv_DirectAccessSPIRead(PWR_MODES);
xtalState = pwrMode & cPWR_MODES_XTALEN;
switch( newState )
{
switch (newState) {
case gXcvrPwrIdle_c:
pwrMode &= ~(cPWR_MODES_AUTODOZE);
pwrMode |= (cPWR_MODES_XTALEN | cPWR_MODES_PMC_MODE);
@ -1459,8 +1400,7 @@ static void rf_set_power_state(xcvrPwrMode_t newState)
mPwrState = newState;
MCR20Drv_DirectAccessSPIWrite(PWR_MODES, pwrMode);
if( !xtalState && (pwrMode & cPWR_MODES_XTALEN))
{
if (!xtalState && (pwrMode & cPWR_MODES_XTALEN)) {
/* wait for crystal oscillator to complet its warmup */
while ((MCR20Drv_DirectAccessSPIRead(PWR_MODES) & cPWR_MODES_XTAL_READY) != cPWR_MODES_XTAL_READY);
/* wait for radio wakeup from hibernate interrupt */
@ -1481,8 +1421,7 @@ static uint8_t rf_get_channel_energy(void)
MCR20Drv_IRQ_Disable();
/* RX can start only from Idle state */
if( mPhySeqState != gIdle_c )
{
if (mPhySeqState != gIdle_c) {
MCR20Drv_IRQ_Enable();
return 0;
}
@ -1492,8 +1431,7 @@ static uint8_t rf_get_channel_energy(void)
/* Switch to ED mode */
ccaMode = (mStatusAndControlRegs[PHY_CTRL4] >> cPHY_CTRL4_CCATYPE_Shift_c) & cPHY_CTRL4_CCATYPE;
if( ccaMode != gCcaED_c )
{
if (ccaMode != gCcaED_c) {
mStatusAndControlRegs[PHY_CTRL4] &= ~(cPHY_CTRL4_CCATYPE << cPHY_CTRL4_CCATYPE_Shift_c);
mStatusAndControlRegs[PHY_CTRL4] |= gCcaED_c << cPHY_CTRL4_CCATYPE_Shift_c;
MCR20Drv_DirectAccessSPIWrite(PHY_CTRL4, mStatusAndControlRegs[PHY_CTRL4]);
@ -1524,18 +1462,13 @@ static uint8_t rf_get_channel_energy(void)
*/
static uint8_t rf_convert_energy_level(uint8_t energyLevel)
{
if(energyLevel >= 90)
{
if (energyLevel >= 90) {
/* ED value is below minimum. Return 0x00. */
energyLevel = 0x00;
}
else if(energyLevel <= 26)
{
} else if (energyLevel <= 26) {
/* ED value is above maximum. Return 0xFF. */
energyLevel = 0xFF;
}
else
{
} else {
/* Energy level (-90 dBm to -26 dBm ) --> varies form 0 to 64 */
energyLevel = (90 - energyLevel);
/* Rescale the energy level values to the 0x00-0xff range (0 to 64 translates in 0 to 255) */
@ -1555,43 +1488,53 @@ static uint8_t rf_scale_lqi(int8_t rssi)
const int8_t rf_sensitivity = -98;
/*rssi < RF sensitivity*/
if(rssi < rf_sensitivity)
if (rssi < rf_sensitivity) {
scaled_lqi = 0;
}
/*-91 dBm < rssi < -81 dBm (AT86RF233 XPro)*/
/*-90 dBm < rssi < -80 dBm (AT86RF212B XPro)*/
else if(rssi < (rf_sensitivity + 10))
else if (rssi < (rf_sensitivity + 10)) {
scaled_lqi = 31;
}
/*-81 dBm < rssi < -71 dBm (AT86RF233 XPro)*/
/*-80 dBm < rssi < -70 dBm (AT86RF212B XPro)*/
else if(rssi < (rf_sensitivity + 20))
else if (rssi < (rf_sensitivity + 20)) {
scaled_lqi = 207;
}
/*-71 dBm < rssi < -61 dBm (AT86RF233 XPro)*/
/*-70 dBm < rssi < -60 dBm (AT86RF212B XPro)*/
else if(rssi < (rf_sensitivity + 30))
else if (rssi < (rf_sensitivity + 30)) {
scaled_lqi = 255;
}
/*-61 dBm < rssi < -51 dBm (AT86RF233 XPro)*/
/*-60 dBm < rssi < -50 dBm (AT86RF212B XPro)*/
else if(rssi < (rf_sensitivity + 40))
else if (rssi < (rf_sensitivity + 40)) {
scaled_lqi = 255;
}
/*-51 dBm < rssi < -41 dBm (AT86RF233 XPro)*/
/*-50 dBm < rssi < -40 dBm (AT86RF212B XPro)*/
else if(rssi < (rf_sensitivity + 50))
else if (rssi < (rf_sensitivity + 50)) {
scaled_lqi = 255;
}
/*-41 dBm < rssi < -31 dBm (AT86RF233 XPro)*/
/*-40 dBm < rssi < -30 dBm (AT86RF212B XPro)*/
else if(rssi < (rf_sensitivity + 60))
else if (rssi < (rf_sensitivity + 60)) {
scaled_lqi = 255;
}
/*-31 dBm < rssi < -21 dBm (AT86RF233 XPro)*/
/*-30 dBm < rssi < -20 dBm (AT86RF212B XPro)*/
else if(rssi < (rf_sensitivity + 70))
else if (rssi < (rf_sensitivity + 70)) {
scaled_lqi = 255;
}
/*rssi > RF saturation*/
else if(rssi > (rf_sensitivity + 80))
else if (rssi > (rf_sensitivity + 80)) {
scaled_lqi = 111;
}
/*-21 dBm < rssi < -11 dBm (AT86RF233 XPro)*/
/*-20 dBm < rssi < -10 dBm (AT86RF212B XPro)*/
else
else {
scaled_lqi = 255;
}
return scaled_lqi;
}
@ -1605,28 +1548,33 @@ extern "C" void xcvr_spi_init(uint32_t instance)
(void)instance;
}
extern "C" void RF_IRQ_Init(void) {
extern "C" void RF_IRQ_Init(void)
{
MBED_ASSERT(irq != NULL);
irq->mode(PullUp);
irq->fall(&PHY_InterruptHandler);
}
extern "C" void RF_IRQ_Enable(void) {
extern "C" void RF_IRQ_Enable(void)
{
MBED_ASSERT(irq != NULL);
irq->enable_irq();
}
extern "C" void RF_IRQ_Disable(void) {
extern "C" void RF_IRQ_Disable(void)
{
MBED_ASSERT(irq != NULL);
irq->disable_irq();
}
extern "C" uint8_t RF_isIRQ_Pending(void) {
extern "C" uint8_t RF_isIRQ_Pending(void)
{
MBED_ASSERT(rf != NULL);
return !irq_pin->read();
}
extern "C" void RF_RST_Set(int state) {
extern "C" void RF_RST_Set(int state)
{
MBED_ASSERT(rst != NULL);
*rst = state;
}
@ -1659,28 +1607,25 @@ extern "C" void xcvr_spi_transfer(uint32_t instance,
(void)instance;
volatile uint8_t dummy;
if( !transferByteCount )
if (!transferByteCount) {
return;
}
if( !sendBuffer && !receiveBuffer )
if (!sendBuffer && !receiveBuffer) {
return;
}
while( transferByteCount-- )
{
if( sendBuffer )
{
while (transferByteCount--) {
if (sendBuffer) {
dummy = *sendBuffer;
sendBuffer++;
}
else
{
} else {
dummy = 0xFF;
}
dummy = spi->write(dummy);
if( receiveBuffer )
{
if (receiveBuffer) {
*receiveBuffer = dummy;
receiveBuffer++;
}