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Spurious letter. 

Conflicts:
	libraries/tests/radio/SX127xPingPong/main.cpp
pull/1339/head
Wojciech Gorniak 2015-09-03 13:06:11 +02:00
parent 4c95e443c8
commit 755181bd28
10 changed files with 3999 additions and 18 deletions
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1134
libraries/radio/SX1276Lib/registers/sx1272Regs-Fsk.h Normal file
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libraries/radio/SX1276Lib/registers/sx1272Regs-LoRa.h Normal file
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/*
/ _____) _ | |
( (____ _____ ____ _| |_ _____ ____| |__
\____ \| ___ | (_ _) ___ |/ ___) _ \
_____) ) ____| | | || |_| ____( (___| | | |
(______/|_____)_|_|_| \__)_____)\____)_| |_|
(C)2013 Semtech
Description: SX1272 LoRa modem registers and bits definitions
License: Revised BSD License, see LICENSE.TXT file include in the project
Maintainer: Miguel Luis and Gregory Cristian
*/
#ifndef __SX1272_REGS_LORA_H__
#define __SX1272_REGS_LORA_H__
/*!
* ============================================================================
* SX1272 Internal registers Address
* ============================================================================
*/
#define REG_LR_FIFO 0x00
// Common settings
#define REG_LR_OPMODE 0x01
#define REG_LR_FRFMSB 0x06
#define REG_LR_FRFMID 0x07
#define REG_LR_FRFLSB 0x08
// Tx settings
#define REG_LR_PACONFIG 0x09
#define REG_LR_PARAMP 0x0A
#define REG_LR_OCP 0x0B
// Rx settings
#define REG_LR_LNA 0x0C
// LoRa registers
#define REG_LR_FIFOADDRPTR 0x0D
#define REG_LR_FIFOTXBASEADDR 0x0E
#define REG_LR_FIFORXBASEADDR 0x0F
#define REG_LR_FIFORXCURRENTADDR 0x10
#define REG_LR_IRQFLAGSMASK 0x11
#define REG_LR_IRQFLAGS 0x12
#define REG_LR_RXNBBYTES 0x13
#define REG_LR_RXHEADERCNTVALUEMSB 0x14
#define REG_LR_RXHEADERCNTVALUELSB 0x15
#define REG_LR_RXPACKETCNTVALUEMSB 0x16
#define REG_LR_RXPACKETCNTVALUELSB 0x17
#define REG_LR_MODEMSTAT 0x18
#define REG_LR_PKTSNRVALUE 0x19
#define REG_LR_PKTRSSIVALUE 0x1A
#define REG_LR_RSSIVALUE 0x1B
#define REG_LR_HOPCHANNEL 0x1C
#define REG_LR_MODEMCONFIG1 0x1D
#define REG_LR_MODEMCONFIG2 0x1E
#define REG_LR_SYMBTIMEOUTLSB 0x1F
#define REG_LR_PREAMBLEMSB 0x20
#define REG_LR_PREAMBLELSB 0x21
#define REG_LR_PAYLOADLENGTH 0x22
#define REG_LR_PAYLOADMAXLENGTH 0x23
#define REG_LR_HOPPERIOD 0x24
#define REG_LR_FIFORXBYTEADDR 0x25
#define REG_LR_FEIMSB 0x28
#define REG_LR_FEIMID 0x29
#define REG_LR_FEILSB 0x2A
#define REG_LR_RSSIWIDEBAND 0x2C
#define REG_LR_DETECTOPTIMIZE 0x31
#define REG_LR_INVERTIQ 0x33
#define REG_LR_DETECTIONTHRESHOLD 0x37
#define REG_LR_SYNCWORD 0x39
#define REG_LR_INVERTIQ2 0x3B
// end of documented register in datasheet
// I/O settings
#define REG_LR_DIOMAPPING1 0x40
#define REG_LR_DIOMAPPING2 0x41
// Version
#define REG_LR_VERSION 0x42
// Additional settings
#define REG_LR_AGCREF 0x43
#define REG_LR_AGCTHRESH1 0x44
#define REG_LR_AGCTHRESH2 0x45
#define REG_LR_AGCTHRESH3 0x46
#define REG_LR_PLLHOP 0x4B
#define REG_LR_TCXO 0x58
#define REG_LR_PADAC 0x5A
#define REG_LR_PLL 0x5C
#define REG_LR_PLLLOWPN 0x5E
#define REG_LR_FORMERTEMP 0x6C
/*!
* ============================================================================
* SX1272 LoRa bits control definition
* ============================================================================
*/
/*!
* RegFifo
*/
/*!
* RegOpMode
*/
#define RFLR_OPMODE_LONGRANGEMODE_MASK 0x7F
#define RFLR_OPMODE_LONGRANGEMODE_OFF 0x00 // Default
#define RFLR_OPMODE_LONGRANGEMODE_ON 0x80
#define RFLR_OPMODE_ACCESSSHAREDREG_MASK 0xBF
#define RFLR_OPMODE_ACCESSSHAREDREG_ENABLE 0x40
#define RFLR_OPMODE_ACCESSSHAREDREG_DISABLE 0x00 // Default
#define RFLR_OPMODE_MASK 0xF8
#define RFLR_OPMODE_SLEEP 0x00
#define RFLR_OPMODE_STANDBY 0x01 // Default
#define RFLR_OPMODE_SYNTHESIZER_TX 0x02
#define RFLR_OPMODE_TRANSMITTER 0x03
#define RFLR_OPMODE_SYNTHESIZER_RX 0x04
#define RFLR_OPMODE_RECEIVER 0x05
// LoRa specific modes
#define RFLR_OPMODE_RECEIVER_SINGLE 0x06
#define RFLR_OPMODE_CAD 0x07
/*!
* RegFrf (MHz)
*/
#define RFLR_FRFMSB_915_MHZ 0xE4 // Default
#define RFLR_FRFMID_915_MHZ 0xC0 // Default
#define RFLR_FRFLSB_915_MHZ 0x00 // Default
/*!
* RegPaConfig
*/
#define RFLR_PACONFIG_PASELECT_MASK 0x7F
#define RFLR_PACONFIG_PASELECT_PABOOST 0x80
#define RFLR_PACONFIG_PASELECT_RFO 0x00 // Default
#define RFLR_PACONFIG_OUTPUTPOWER_MASK 0xF0
/*!
* RegPaRamp
*/
#define RFLR_PARAMP_LOWPNTXPLL_MASK 0xE0
#define RFLR_PARAMP_LOWPNTXPLL_OFF 0x10 // Default
#define RFLR_PARAMP_LOWPNTXPLL_ON 0x00
#define RFLR_PARAMP_MASK 0xF0
#define RFLR_PARAMP_3400_US 0x00
#define RFLR_PARAMP_2000_US 0x01
#define RFLR_PARAMP_1000_US 0x02
#define RFLR_PARAMP_0500_US 0x03
#define RFLR_PARAMP_0250_US 0x04
#define RFLR_PARAMP_0125_US 0x05
#define RFLR_PARAMP_0100_US 0x06
#define RFLR_PARAMP_0062_US 0x07
#define RFLR_PARAMP_0050_US 0x08
#define RFLR_PARAMP_0040_US 0x09 // Default
#define RFLR_PARAMP_0031_US 0x0A
#define RFLR_PARAMP_0025_US 0x0B
#define RFLR_PARAMP_0020_US 0x0C
#define RFLR_PARAMP_0015_US 0x0D
#define RFLR_PARAMP_0012_US 0x0E
#define RFLR_PARAMP_0010_US 0x0F
/*!
* RegOcp
*/
#define RFLR_OCP_MASK 0xDF
#define RFLR_OCP_ON 0x20 // Default
#define RFLR_OCP_OFF 0x00
#define RFLR_OCP_TRIM_MASK 0xE0
#define RFLR_OCP_TRIM_045_MA 0x00
#define RFLR_OCP_TRIM_050_MA 0x01
#define RFLR_OCP_TRIM_055_MA 0x02
#define RFLR_OCP_TRIM_060_MA 0x03
#define RFLR_OCP_TRIM_065_MA 0x04
#define RFLR_OCP_TRIM_070_MA 0x05
#define RFLR_OCP_TRIM_075_MA 0x06
#define RFLR_OCP_TRIM_080_MA 0x07
#define RFLR_OCP_TRIM_085_MA 0x08
#define RFLR_OCP_TRIM_090_MA 0x09
#define RFLR_OCP_TRIM_095_MA 0x0A
#define RFLR_OCP_TRIM_100_MA 0x0B // Default
#define RFLR_OCP_TRIM_105_MA 0x0C
#define RFLR_OCP_TRIM_110_MA 0x0D
#define RFLR_OCP_TRIM_115_MA 0x0E
#define RFLR_OCP_TRIM_120_MA 0x0F
#define RFLR_OCP_TRIM_130_MA 0x10
#define RFLR_OCP_TRIM_140_MA 0x11
#define RFLR_OCP_TRIM_150_MA 0x12
#define RFLR_OCP_TRIM_160_MA 0x13
#define RFLR_OCP_TRIM_170_MA 0x14
#define RFLR_OCP_TRIM_180_MA 0x15
#define RFLR_OCP_TRIM_190_MA 0x16
#define RFLR_OCP_TRIM_200_MA 0x17
#define RFLR_OCP_TRIM_210_MA 0x18
#define RFLR_OCP_TRIM_220_MA 0x19
#define RFLR_OCP_TRIM_230_MA 0x1A
#define RFLR_OCP_TRIM_240_MA 0x1B
/*!
* RegLna
*/
#define RFLR_LNA_GAIN_MASK 0x1F
#define RFLR_LNA_GAIN_G1 0x20 // Default
#define RFLR_LNA_GAIN_G2 0x40
#define RFLR_LNA_GAIN_G3 0x60
#define RFLR_LNA_GAIN_G4 0x80
#define RFLR_LNA_GAIN_G5 0xA0
#define RFLR_LNA_GAIN_G6 0xC0
#define RFLR_LNA_BOOST_MASK 0xFC
#define RFLR_LNA_BOOST_OFF 0x00 // Default
#define RFLR_LNA_BOOST_ON 0x03
/*!
* RegFifoAddrPtr
*/
#define RFLR_FIFOADDRPTR 0x00 // Default
/*!
* RegFifoTxBaseAddr
*/
#define RFLR_FIFOTXBASEADDR 0x80 // Default
/*!
* RegFifoTxBaseAddr
*/
#define RFLR_FIFORXBASEADDR 0x00 // Default
/*!
* RegFifoRxCurrentAddr (Read Only)
*/
/*!
* RegIrqFlagsMask
*/
#define RFLR_IRQFLAGS_RXTIMEOUT_MASK 0x80
#define RFLR_IRQFLAGS_RXDONE_MASK 0x40
#define RFLR_IRQFLAGS_PAYLOADCRCERROR_MASK 0x20
#define RFLR_IRQFLAGS_VALIDHEADER_MASK 0x10
#define RFLR_IRQFLAGS_TXDONE_MASK 0x08
#define RFLR_IRQFLAGS_CADDONE_MASK 0x04
#define RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL_MASK 0x02
#define RFLR_IRQFLAGS_CADDETECTED_MASK 0x01
/*!
* RegIrqFlags
*/
#define RFLR_IRQFLAGS_RXTIMEOUT 0x80
#define RFLR_IRQFLAGS_RXDONE 0x40
#define RFLR_IRQFLAGS_PAYLOADCRCERROR 0x20
#define RFLR_IRQFLAGS_VALIDHEADER 0x10
#define RFLR_IRQFLAGS_TXDONE 0x08
#define RFLR_IRQFLAGS_CADDONE 0x04
#define RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL 0x02
#define RFLR_IRQFLAGS_CADDETECTED 0x01
/*!
* RegFifoRxNbBytes (Read Only)
*/
/*!
* RegRxHeaderCntValueMsb (Read Only)
*/
/*!
* RegRxHeaderCntValueLsb (Read Only)
*/
/*!
* RegRxPacketCntValueMsb (Read Only)
*/
/*!
* RegRxPacketCntValueLsb (Read Only)
*/
/*!
* RegModemStat (Read Only)
*/
#define RFLR_MODEMSTAT_RX_CR_MASK 0x1F
#define RFLR_MODEMSTAT_MODEM_STATUS_MASK 0xE0
/*!
* RegPktSnrValue (Read Only)
*/
/*!
* RegPktRssiValue (Read Only)
*/
/*!
* RegRssiValue (Read Only)
*/
/*!
* RegHopChannel (Read Only)
*/
#define RFLR_HOPCHANNEL_PLL_LOCK_TIMEOUT_MASK 0x7F
#define RFLR_HOPCHANNEL_PLL_LOCK_FAIL 0x80
#define RFLR_HOPCHANNEL_PLL_LOCK_SUCCEED 0x00 // Default
#define RFLR_HOPCHANNEL_CRCONPAYLOAD_MASK 0xBF
#define RFLR_HOPCHANNEL_CRCONPAYLOAD_ON 0x40
#define RFLR_HOPCHANNEL_CRCONPAYLOAD_OFF 0x00 // Default
#define RFLR_HOPCHANNEL_CHANNEL_MASK 0x3F
/*!
* RegModemConfig1
*/
#define RFLR_MODEMCONFIG1_BW_MASK 0x3F
#define RFLR_MODEMCONFIG1_BW_125_KHZ 0x00 // Default
#define RFLR_MODEMCONFIG1_BW_250_KHZ 0x40
#define RFLR_MODEMCONFIG1_BW_500_KHZ 0x80
#define RFLR_MODEMCONFIG1_CODINGRATE_MASK 0xC7
#define RFLR_MODEMCONFIG1_CODINGRATE_4_5 0x08
#define RFLR_MODEMCONFIG1_CODINGRATE_4_6 0x10 // Default
#define RFLR_MODEMCONFIG1_CODINGRATE_4_7 0x18
#define RFLR_MODEMCONFIG1_CODINGRATE_4_8 0x20
#define RFLR_MODEMCONFIG1_IMPLICITHEADER_MASK 0xFB
#define RFLR_MODEMCONFIG1_IMPLICITHEADER_ON 0x04
#define RFLR_MODEMCONFIG1_IMPLICITHEADER_OFF 0x00 // Default
#define RFLR_MODEMCONFIG1_RXPAYLOADCRC_MASK 0xFD
#define RFLR_MODEMCONFIG1_RXPAYLOADCRC_ON 0x02
#define RFLR_MODEMCONFIG1_RXPAYLOADCRC_OFF 0x00 // Default
#define RFLR_MODEMCONFIG1_LOWDATARATEOPTIMIZE_MASK 0xFE
#define RFLR_MODEMCONFIG1_LOWDATARATEOPTIMIZE_ON 0x01
#define RFLR_MODEMCONFIG1_LOWDATARATEOPTIMIZE_OFF 0x00 // Default
/*!
* RegModemConfig2
*/
#define RFLR_MODEMCONFIG2_SF_MASK 0x0F
#define RFLR_MODEMCONFIG2_SF_6 0x60
#define RFLR_MODEMCONFIG2_SF_7 0x70 // Default
#define RFLR_MODEMCONFIG2_SF_8 0x80
#define RFLR_MODEMCONFIG2_SF_9 0x90
#define RFLR_MODEMCONFIG2_SF_10 0xA0
#define RFLR_MODEMCONFIG2_SF_11 0xB0
#define RFLR_MODEMCONFIG2_SF_12 0xC0
#define RFLR_MODEMCONFIG2_TXCONTINUOUSMODE_MASK 0xF7
#define RFLR_MODEMCONFIG2_TXCONTINUOUSMODE_ON 0x08
#define RFLR_MODEMCONFIG2_TXCONTINUOUSMODE_OFF 0x00
#define RFLR_MODEMCONFIG2_AGCAUTO_MASK 0xFB
#define RFLR_MODEMCONFIG2_AGCAUTO_ON 0x04 // Default
#define RFLR_MODEMCONFIG2_AGCAUTO_OFF 0x00
#define RFLR_MODEMCONFIG2_SYMBTIMEOUTMSB_MASK 0xFC
#define RFLR_MODEMCONFIG2_SYMBTIMEOUTMSB 0x00 // Default
/*!
* RegSymbTimeoutLsb
*/
#define RFLR_SYMBTIMEOUTLSB_SYMBTIMEOUT 0x64 // Default
/*!
* RegPreambleLengthMsb
*/
#define RFLR_PREAMBLELENGTHMSB 0x00 // Default
/*!
* RegPreambleLengthLsb
*/
#define RFLR_PREAMBLELENGTHLSB 0x08 // Default
/*!
* RegPayloadLength
*/
#define RFLR_PAYLOADLENGTH 0x0E // Default
/*!
* RegPayloadMaxLength
*/
#define RFLR_PAYLOADMAXLENGTH 0xFF // Default
/*!
* RegHopPeriod
*/
#define RFLR_HOPPERIOD_FREQFOPPINGPERIOD 0x00 // Default
/*!
* RegFifoRxByteAddr (Read Only)
*/
/*!
* RegFeiMsb (Read Only)
*/
/*!
* RegFeiMid (Read Only)
*/
/*!
* RegFeiLsb (Read Only)
*/
/*!
* RegRssiWideband (Read Only)
*/
/*!
* RegDetectOptimize
*/
#define RFLR_DETECTIONOPTIMIZE_MASK 0xF8
#define RFLR_DETECTIONOPTIMIZE_SF7_TO_SF12 0x03 // Default
#define RFLR_DETECTIONOPTIMIZE_SF6 0x05
/*!
* RegInvertIQ
*/
#define RFLR_INVERTIQ_RX_MASK 0xBF
#define RFLR_INVERTIQ_RX_OFF 0x00
#define RFLR_INVERTIQ_RX_ON 0x40
#define RFLR_INVERTIQ_TX_MASK 0xFE
#define RFLR_INVERTIQ_TX_OFF 0x01
#define RFLR_INVERTIQ_TX_ON 0x00
/*!
* RegDetectionThreshold
*/
#define RFLR_DETECTIONTHRESH_SF7_TO_SF12 0x0A // Default
#define RFLR_DETECTIONTHRESH_SF6 0x0C
/*!
* RegInvertIQ2
*/
#define RFLR_INVERTIQ2_ON 0x19
#define RFLR_INVERTIQ2_OFF 0x1D
/*!
* RegDioMapping1
*/
#define RFLR_DIOMAPPING1_DIO0_MASK 0x3F
#define RFLR_DIOMAPPING1_DIO0_00 0x00 // Default
#define RFLR_DIOMAPPING1_DIO0_01 0x40
#define RFLR_DIOMAPPING1_DIO0_10 0x80
#define RFLR_DIOMAPPING1_DIO0_11 0xC0
#define RFLR_DIOMAPPING1_DIO1_MASK 0xCF
#define RFLR_DIOMAPPING1_DIO1_00 0x00 // Default
#define RFLR_DIOMAPPING1_DIO1_01 0x10
#define RFLR_DIOMAPPING1_DIO1_10 0x20
#define RFLR_DIOMAPPING1_DIO1_11 0x30
#define RFLR_DIOMAPPING1_DIO2_MASK 0xF3
#define RFLR_DIOMAPPING1_DIO2_00 0x00 // Default
#define RFLR_DIOMAPPING1_DIO2_01 0x04
#define RFLR_DIOMAPPING1_DIO2_10 0x08
#define RFLR_DIOMAPPING1_DIO2_11 0x0C
#define RFLR_DIOMAPPING1_DIO3_MASK 0xFC
#define RFLR_DIOMAPPING1_DIO3_00 0x00 // Default
#define RFLR_DIOMAPPING1_DIO3_01 0x01
#define RFLR_DIOMAPPING1_DIO3_10 0x02
#define RFLR_DIOMAPPING1_DIO3_11 0x03
/*!
* RegDioMapping2
*/
#define RFLR_DIOMAPPING2_DIO4_MASK 0x3F
#define RFLR_DIOMAPPING2_DIO4_00 0x00 // Default
#define RFLR_DIOMAPPING2_DIO4_01 0x40
#define RFLR_DIOMAPPING2_DIO4_10 0x80
#define RFLR_DIOMAPPING2_DIO4_11 0xC0
#define RFLR_DIOMAPPING2_DIO5_MASK 0xCF
#define RFLR_DIOMAPPING2_DIO5_00 0x00 // Default
#define RFLR_DIOMAPPING2_DIO5_01 0x10
#define RFLR_DIOMAPPING2_DIO5_10 0x20
#define RFLR_DIOMAPPING2_DIO5_11 0x30
#define RFLR_DIOMAPPING2_MAP_MASK 0xFE
#define RFLR_DIOMAPPING2_MAP_PREAMBLEDETECT 0x01
#define RFLR_DIOMAPPING2_MAP_RSSI 0x00 // Default
/*!
* RegVersion (Read Only)
*/
/*!
* RegAgcRef
*/
/*!
* RegAgcThresh1
*/
/*!
* RegAgcThresh2
*/
/*!
* RegAgcThresh3
*/
/*!
* RegPllHop
*/
#define RFLR_PLLHOP_FASTHOP_MASK 0x7F
#define RFLR_PLLHOP_FASTHOP_ON 0x80
#define RFLR_PLLHOP_FASTHOP_OFF 0x00 // Default
/*!
* RegTcxo
*/
#define RFLR_TCXO_TCXOINPUT_MASK 0xEF
#define RFLR_TCXO_TCXOINPUT_ON 0x10
#define RFLR_TCXO_TCXOINPUT_OFF 0x00 // Default
/*!
* RegPaDac
*/
#define RFLR_PADAC_20DBM_MASK 0xF8
#define RFLR_PADAC_20DBM_ON 0x07
#define RFLR_PADAC_20DBM_OFF 0x04 // Default
/*!
* RegPll
*/
#define RFLR_PLL_BANDWIDTH_MASK 0x3F
#define RFLR_PLL_BANDWIDTH_75 0x00
#define RFLR_PLL_BANDWIDTH_150 0x40
#define RFLR_PLL_BANDWIDTH_225 0x80
#define RFLR_PLL_BANDWIDTH_300 0xC0 // Default
/*!
* RegPllLowPn
*/
#define RFLR_PLLLOWPN_BANDWIDTH_MASK 0x3F
#define RFLR_PLLLOWPN_BANDWIDTH_75 0x00
#define RFLR_PLLLOWPN_BANDWIDTH_150 0x40
#define RFLR_PLLLOWPN_BANDWIDTH_225 0x80
#define RFLR_PLLLOWPN_BANDWIDTH_300 0xC0 // Default
/*!
* RegFormerTemp
*/
#endif // __SX1272_REGS_LORA_H__

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/*
/ _____) _ | |
( (____ _____ ____ _| |_ _____ ____| |__
\____ \| ___ | (_ _) ___ |/ ___) _ \
_____) ) ____| | | || |_| ____( (___| | | |
(______/|_____)_|_|_| \__)_____)\____)_| |_|
( C )2014 Semtech
Description: -
License: Revised BSD License, see LICENSE.TXT file include in the project
Maintainers: Miguel Luis, Gregory Cristian and Nicolas Huguenin
*/
#include "sx1272-hal.h"
const RadioRegisters_t SX1272MB1xAS::RadioRegsInit[] =
{
{ MODEM_FSK , REG_LNA , 0x23 },
{ MODEM_FSK , REG_RXCONFIG , 0x1E },
{ MODEM_FSK , REG_RSSICONFIG , 0xD2 },
{ MODEM_FSK , REG_PREAMBLEDETECT , 0xAA },
{ MODEM_FSK , REG_OSC , 0x07 },
{ MODEM_FSK , REG_SYNCCONFIG , 0x12 },
{ MODEM_FSK , REG_SYNCVALUE1 , 0xC1 },
{ MODEM_FSK , REG_SYNCVALUE2 , 0x94 },
{ MODEM_FSK , REG_SYNCVALUE3 , 0xC1 },
{ MODEM_FSK , REG_PACKETCONFIG1 , 0x98 },
{ MODEM_FSK , REG_FIFOTHRESH , 0x8F },
{ MODEM_FSK , REG_IMAGECAL , 0x02 },
{ MODEM_FSK , REG_DIOMAPPING1 , 0x00 },
{ MODEM_FSK , REG_DIOMAPPING2 , 0x30 },
{ MODEM_LORA, REG_LR_PAYLOADMAXLENGTH, 0x40 },
};
SX1272MB1xAS::SX1272MB1xAS( void ( *txDone )( ), void ( *txTimeout ) ( ), void ( *rxDone ) ( uint8_t *payload, uint16_t size, int16_t rssi, int8_t snr ),
void ( *rxTimeout ) ( ), void ( *rxError ) ( ), void ( *fhssChangeChannel ) ( uint8_t channelIndex ), void ( *cadDone ) ( bool ChannelActivityDetected ),
PinName mosi, PinName miso, PinName sclk, PinName nss, PinName reset,
PinName dio0, PinName dio1, PinName dio2, PinName dio3, PinName dio4, PinName dio5,
PinName antSwitch )
: SX1272( txDone, txTimeout, rxDone, rxTimeout, rxError, fhssChangeChannel, cadDone, mosi, miso, sclk, nss, reset, dio0, dio1, dio2, dio3, dio4, dio5),
antSwitch( antSwitch ),
#if( defined ( TARGET_NUCLEO_L152RE ) )
fake( D8 )
#else
fake( A3 )
#endif
{
Reset( );
RxChainCalibration( );
IoInit( );
SetOpMode( RF_OPMODE_SLEEP );
IoIrqInit( dioIrq );
RadioRegistersInit( );
SetModem( MODEM_FSK );
this->settings.State = IDLE ;
}
SX1272MB1xAS::SX1272MB1xAS( void ( *txDone )( ), void ( *txTimeout ) ( ), void ( *rxDone ) ( uint8_t *payload, uint16_t size, int16_t rssi, int8_t snr ),
void ( *rxTimeout ) ( ), void ( *rxError ) ( ), void ( *fhssChangeChannel ) ( uint8_t channelIndex ), void ( *cadDone ) ( bool ChannelActivityDetected ) )
#if defined ( TARGET_NUCLEO_L152RE )
: SX1272( txDone, txTimeout, rxDone, rxTimeout, rxError, fhssChangeChannel, cadDone, D11, D12, D13, D10, A0, D2, D3, D4, D5, A3, D9 ), // For NUCLEO L152RE dio4 is on port A3
antSwitch( A4 ),
fake( D8 )
#else
: SX1272( txDone, txTimeout, rxDone, rxTimeout, rxError, fhssChangeChannel, cadDone, D11, D12, D13, PA_4, PC_4, PC_10, PC_11, PC_12, PD_2, PB_5, PB_6 ),
antSwitch( PB_1 ),
fake( PC_2 )
#endif
{
Reset( );
RxChainCalibration( );
IoInit( );
SetOpMode( RF_OPMODE_SLEEP );
IoIrqInit( dioIrq );
RadioRegistersInit( );
SetModem( MODEM_FSK );
this->settings.State = IDLE ;
}
//-------------------------------------------------------------------------
// Board relative functions
//-------------------------------------------------------------------------
void SX1272MB1xAS::IoInit( void )
{
AntSwInit( );
SpiInit( );
}
void SX1272MB1xAS::RadioRegistersInit( ){
uint8_t i = 0;
for( i = 0; i < sizeof( RadioRegsInit ) / sizeof( RadioRegisters_t ); i++ )
{
SetModem( RadioRegsInit[i].Modem );
Write( RadioRegsInit[i].Addr, RadioRegsInit[i].Value );
}
}
void SX1272MB1xAS::SpiInit( void )
{
nss = 1;
spi.format( 8,0 );
uint32_t frequencyToSet = 8000000;
#if( defined ( TARGET_NUCLEO_L152RE ) || defined ( TARGET_LPC11U6X ) )
spi.frequency( frequencyToSet );
#elif( defined ( TARGET_KL25Z ) ) //busclock frequency is halved -> double the spi frequency to compensate
spi.frequency( frequencyToSet * 2 );
#else
#warning "Check the board's SPI frequency"
#endif
wait(0.1);
}
void SX1272MB1xAS::IoIrqInit( DioIrqHandler *irqHandlers )
{
#if( defined ( TARGET_NUCLEO_L152RE ) || defined ( TARGET_LPC11U6X ) )
dio0.mode(PullDown);
dio1.mode(PullDown);
dio2.mode(PullDown);
dio3.mode(PullDown);
dio4.mode(PullDown);
#endif
dio0.rise( this, static_cast< TriggerMB1xASSX1272 > ( irqHandlers[0] ) );
dio1.rise( this, static_cast< TriggerMB1xASSX1272 > ( irqHandlers[1] ) );
dio2.rise( this, static_cast< TriggerMB1xASSX1272 > ( irqHandlers[2] ) );
dio3.rise( this, static_cast< TriggerMB1xASSX1272 > ( irqHandlers[3] ) );
dio4.rise( this, static_cast< TriggerMB1xASSX1272 > ( irqHandlers[4] ) );
}
void SX1272MB1xAS::IoDeInit( void )
{
//nothing
}
uint8_t SX1272MB1xAS::GetPaSelect( uint32_t channel )
{
return RF_PACONFIG_PASELECT_RFO;
}
void SX1272MB1xAS::SetAntSwLowPower( bool status )
{
if( isRadioActive != status )
{
isRadioActive = status;
if( status == false )
{
AntSwInit( );
}
else
{
AntSwDeInit( );
}
}
}
void SX1272MB1xAS::AntSwInit( void )
{
antSwitch = 0;
}
void SX1272MB1xAS::AntSwDeInit( void )
{
antSwitch = 0;
}
void SX1272MB1xAS::SetAntSw( uint8_t rxTx )
{
if( this->rxTx == rxTx )
{
//no need to go further
return;
}
this->rxTx = rxTx;
if( rxTx != 0 )
{
antSwitch = 1;
}
else
{
antSwitch = 0;
}
}
bool SX1272MB1xAS::CheckRfFrequency( uint32_t frequency )
{
//TODO: Implement check, currently all frequencies are supported
return true;
}
void SX1272MB1xAS::Reset( void )
{
reset.output();
reset = 0;
wait_ms( 1000 );
reset.input();
wait_ms( 6 );
}
void SX1272MB1xAS::Write( uint8_t addr, uint8_t data )
{
Write( addr, &data, 1 );
}
uint8_t SX1272MB1xAS::Read( uint8_t addr )
{
uint8_t data;
Read( addr, &data, 1 );
return data;
}
void SX1272MB1xAS::Write( uint8_t addr, uint8_t *buffer, uint8_t size )
{
uint8_t i;
nss = 0;
spi.write( addr | 0x80 );
for( i = 0; i < size; i++ )
{
spi.write( buffer[i] );
}
nss = 1;
}
void SX1272MB1xAS::Read( uint8_t addr, uint8_t *buffer, uint8_t size )
{
uint8_t i;
nss = 0;
spi.write( addr & 0x7F );
for( i = 0; i < size; i++ )
{
buffer[i] = spi.write( 0 );
}
nss = 1;
}
void SX1272MB1xAS::WriteFifo( uint8_t *buffer, uint8_t size )
{
Write( 0, buffer, size );
}
void SX1272MB1xAS::ReadFifo( uint8_t *buffer, uint8_t size )
{
Read( 0, buffer, size );
}

181
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@ -0,0 +1,181 @@
/*
/ _____) _ | |
( (____ _____ ____ _| |_ _____ ____| |__
\____ \| ___ | (_ _) ___ |/ ___) _ \
_____) ) ____| | | || |_| ____( (___| | | |
(______/|_____)_|_|_| \__)_____)\____)_| |_|
( C )2014 Semtech
Description: -
License: Revised BSD License, see LICENSE.TXT file include in the project
Maintainers: Miguel Luis, Gregory Cristian and Nicolas Huguenin
*/
#ifndef __SX1272_HAL_H__
#define __SX1272_HAL_H__
#include "sx1272.h"
/*!
* Actual implementation of a SX1272 radio, includes some modifications to make it compatible with the MB1 LAS board
*/
class SX1272MB1xAS : public SX1272
{
protected:
/*!
* Antenna switch GPIO pins objects
*/
DigitalInOut antSwitch;
DigitalIn fake;
private:
static const RadioRegisters_t RadioRegsInit[];
public:
SX1272MB1xAS( void ( *txDone )( ), void ( *txTimeout ) ( ), void ( *rxDone ) ( uint8_t *payload, uint16_t size, int16_t rssi, int8_t snr ),
void ( *rxTimeout ) ( ), void ( *rxError ) ( ), void ( *fhssChangeChannel ) ( uint8_t channelIndex ), void ( *cadDone ) ( bool ChannelActivityDetected ),
PinName mosi, PinName miso, PinName sclk, PinName nss, PinName reset,
PinName dio0, PinName dio1, PinName dio2, PinName dio3, PinName dio4, PinName dio5,
PinName antSwitch );
SX1272MB1xAS( void ( *txDone )( ), void ( *txTimeout ) ( ), void ( *rxDone ) ( uint8_t *payload, uint16_t size, int16_t rssi, int8_t snr ),
void ( *rxTimeout ) ( ), void ( *rxError ) ( ), void ( *fhssChangeChannel ) ( uint8_t channelIndex ), void ( *cadDone ) ( bool ChannelActivityDetected ) );
virtual ~SX1272MB1xAS( ) { };
protected:
/*!
* @brief Initializes the radio I/Os pins interface
*/
virtual void IoInit( void );
/*!
* @brief Initializes the radio registers
*/
virtual void RadioRegistersInit( );
/*!
* @brief Initializes the radio SPI
*/
virtual void SpiInit( void );
/*!
* @brief Initializes DIO IRQ handlers
*
* @param [IN] irqHandlers Array containing the IRQ callback functions
*/
virtual void IoIrqInit( DioIrqHandler *irqHandlers );
/*!
* @brief De-initializes the radio I/Os pins interface.
*
* \remark Useful when going in MCU lowpower modes
*/
virtual void IoDeInit( void );
/*!
* @brief Gets the board PA selection configuration
*
* @param [IN] channel Channel frequency in Hz
* @retval PaSelect RegPaConfig PaSelect value
*/
virtual uint8_t GetPaSelect( uint32_t channel );
/*!
* @brief Set the RF Switch I/Os pins in Low Power mode
*
* @param [IN] status enable or disable
*/
virtual void SetAntSwLowPower( bool status );
/*!
* @brief Initializes the RF Switch I/Os pins interface
*/
virtual void AntSwInit( void );
/*!
* @brief De-initializes the RF Switch I/Os pins interface
*
* \remark Needed to decrease the power consumption in MCU lowpower modes
*/
virtual void AntSwDeInit( void );
/*!
* @brief Controls the antena switch if necessary.
*
* \remark see errata note
*
* @param [IN] rxTx [1: Tx, 0: Rx]
*/
virtual void SetAntSw( uint8_t rxTx );
public:
/*!
* @brief Detect the board connected by reading the value of the antenna switch pin
*/
//virtual uint8_t DetectBoardType( void );
/*!
* @brief Checks if the given RF frequency is supported by the hardware
*
* @param [IN] frequency RF frequency to be checked
* @retval isSupported [true: supported, false: unsupported]
*/
virtual bool CheckRfFrequency( uint32_t frequency );
/*!
* @brief Writes the radio register at the specified address
*
* @param [IN]: addr Register address
* @param [IN]: data New register value
*/
virtual void Write ( uint8_t addr, uint8_t data ) ;
/*!
* @brief Reads the radio register at the specified address
*
* @param [IN]: addr Register address
* @retval data Register value
*/
virtual uint8_t Read ( uint8_t addr ) ;
/*!
* @brief Writes multiple radio registers starting at address
*
* @param [IN] addr First Radio register address
* @param [IN] buffer Buffer containing the new register's values
* @param [IN] size Number of registers to be written
*/
virtual void Write( uint8_t addr, uint8_t *buffer, uint8_t size ) ;
/*!
* @brief Reads multiple radio registers starting at address
*
* @param [IN] addr First Radio register address
* @param [OUT] buffer Buffer where to copy the registers data
* @param [IN] size Number of registers to be read
*/
virtual void Read ( uint8_t addr, uint8_t *buffer, uint8_t size ) ;
/*!
* @brief Writes the buffer contents to the SX1272 FIFO
*
* @param [IN] buffer Buffer containing data to be put on the FIFO.
* @param [IN] size Number of bytes to be written to the FIFO
*/
virtual void WriteFifo( uint8_t *buffer, uint8_t size ) ;
/*!
* @brief Reads the contents of the SX1272 FIFO
*
* @param [OUT] buffer Buffer where to copy the FIFO read data.
* @param [IN] size Number of bytes to be read from the FIFO
*/
virtual void ReadFifo( uint8_t *buffer, uint8_t size ) ;
/*!
* @brief Reset the SX1272
*/
virtual void Reset( void );
};
#endif // __SX1272_HAL_H__

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libraries/radio/SX1276Lib/sx1272/sx1272.cpp Normal file
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491
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/*
/ _____) _ | |
( (____ _____ ____ _| |_ _____ ____| |__
\____ \| ___ | (_ _) ___ |/ ___) _ \
_____) ) ____| | | || |_| ____( (___| | | |
(______/|_____)_|_|_| \__)_____)\____)_| |_|
( C )2014 Semtech
Description: Actual implementation of a SX1276 radio, inherits Radio
License: Revised BSD License, see LICENSE.TXT file include in the project
Maintainers: www.netblocks.eu
SX1272 LoRa RF module : http://www.netblocks.eu/xrange-sx1272-lora-datasheet/
*/
#ifndef __SX1272_H__
#define __SX1272_H__
#include "radio.h"
#include "./registers/sx1272Regs-Fsk.h"
#include "./registers/sx1272Regs-LoRa.h"
#include "./typedefs/typedefs.h"
/*!
* Radio wakeup time from SLEEP mode
*/
#define RADIO_WAKEUP_TIME 1000 // [us]
/*!
* SX1276 definitions
*/
#define XTAL_FREQ 32000000
#define FREQ_STEP 61.03515625
#define RX_BUFFER_SIZE 256
#define DEFAULT_TIMEOUT 200 //usec
#define RSSI_OFFSET -139.0
/*!
* Constant values need to compute the RSSI value
*/
//#define RSSI_OFFSET_LF -164.0
//#define RSSI_OFFSET_HF -157.0
//#define RF_MID_BAND_THRESH 525000000
/*!
* Actual implementation of a SX1276 radio, inherits Radio
*/
class SX1272 : public Radio
{
protected:
/*!
* SPI Interface
*/
SPI spi; // mosi, miso, sclk
DigitalOut nss;
/*!
* SX1276 Reset pin
*/
DigitalInOut reset;
/*!
* SX1276 DIO pins
*/
InterruptIn dio0;
InterruptIn dio1;
InterruptIn dio2;
InterruptIn dio3;
InterruptIn dio4;
DigitalIn dio5;
bool isRadioActive;
uint8_t *rxBuffer;
uint8_t previousOpMode;
/*!
* Hardware DIO IRQ functions
*/
DioIrqHandler *dioIrq;
/*!
* Tx and Rx timers
*/
Timeout txTimeoutTimer;
Timeout rxTimeoutTimer;
Timeout rxTimeoutSyncWord;
/*!
* rxTx: [1: Tx, 0: Rx]
*/
uint8_t rxTx;
RadioSettings_t settings;
static const FskBandwidth_t FskBandwidths[] ;
protected:
/*!
* Performs the Rx chain calibration for LF and HF bands
* \remark Must be called just after the reset so all registers are at their
* default values
*/
void RxChainCalibration( void );
public:
SX1272( void ( *txDone )( ), void ( *txTimeout ) ( ), void ( *rxDone ) ( uint8_t *payload, uint16_t size, int16_t rssi, int8_t snr ),
void ( *rxTimeout ) ( ), void ( *rxError ) ( ), void ( *fhssChangeChannel ) ( uint8_t channelIndex ), void ( *cadDone ) ( bool channelActivityDetected ),
PinName mosi, PinName miso, PinName sclk, PinName nss, PinName reset,
PinName dio0, PinName dio1, PinName dio2, PinName dio3, PinName dio4, PinName dio5 );
SX1272( void ( *txDone )( ), void ( *txTimeout ) ( ), void ( *rxDone ) ( uint8_t *payload, uint16_t size, int16_t rssi, int8_t snr ),
void ( *rxTimeout ) ( ), void ( *rxError ) ( ), void ( *fhssChangeChannel ) ( uint8_t channelIndex ), void ( *cadDone ) ( bool channelActivityDetected ) );
virtual ~SX1272( );
//-------------------------------------------------------------------------
// Redefined Radio functions
//-------------------------------------------------------------------------
/*!
* Return current radio status
*
* @param status Radio status. [IDLE, RX_RUNNING, TX_RUNNING]
*/
virtual RadioState GetState( void );
/*!
* @brief Configures the SX1276 with the given modem
*
* @param [IN] modem Modem to be used [0: FSK, 1: LoRa]
*/
virtual void SetModem( ModemType modem );
/*!
* @brief Sets the channel frequency
*
* @param [IN] freq Channel RF frequency
*/
virtual void SetChannel( uint32_t freq );
/*!
* @brief Sets the channels configuration
*
* @param [IN] modem Radio modem to be used [0: FSK, 1: LoRa]
* @param [IN] freq Channel RF frequency
* @param [IN] rssiThresh RSSI threshold
*
* @retval isFree [true: Channel is free, false: Channel is not free]
*/
virtual bool IsChannelFree( ModemType modem, uint32_t freq, int8_t rssiThresh );
/*!
* @brief Generates a 32 bits random value based on the RSSI readings
*
* \remark This function sets the radio in LoRa modem mode and disables
* all interrupts.
* After calling this function either Radio.SetRxConfig or
* Radio.SetTxConfig functions must be called.
*
* @retval randomValue 32 bits random value
*/
virtual uint32_t Random( void );
/*!
* @brief Sets the reception parameters
*
* @param [IN] modem Radio modem to be used [0: FSK, 1: LoRa]
* @param [IN] bandwidth Sets the bandwidth
* FSK : >= 2600 and <= 250000 Hz
* LoRa: [0: 125 kHz, 1: 250 kHz,
* 2: 500 kHz, 3: Reserved]
* @param [IN] datarate Sets the Datarate
* FSK : 600..300000 bits/s
* LoRa: [6: 64, 7: 128, 8: 256, 9: 512,
* 10: 1024, 11: 2048, 12: 4096 chips]
* @param [IN] coderate Sets the coding rate ( LoRa only )
* FSK : N/A ( set to 0 )
* LoRa: [1: 4/5, 2: 4/6, 3: 4/7, 4: 4/8]
* @param [IN] bandwidthAfc Sets the AFC Bandwidth ( FSK only )
* FSK : >= 2600 and <= 250000 Hz
* LoRa: N/A ( set to 0 )
* @param [IN] preambleLen Sets the Preamble length ( LoRa only )
* FSK : N/A ( set to 0 )
* LoRa: Length in symbols ( the hardware adds 4 more symbols )
* @param [IN] symbTimeout Sets the RxSingle timeout value ( LoRa only )
* FSK : N/A ( set to 0 )
* LoRa: timeout in symbols
* @param [IN] fixLen Fixed length packets [0: variable, 1: fixed]
* @param [IN] payloadLen Sets payload length when fixed lenght is used
* @param [IN] crcOn Enables/Disables the CRC [0: OFF, 1: ON]
* @param [IN] freqHopOn Enables disables the intra-packet frequency hopping [0: OFF, 1: ON] (LoRa only)
* @param [IN] hopPeriod Number of symbols bewteen each hop (LoRa only)
* @param [IN] iqInverted Inverts IQ signals ( LoRa only )
* FSK : N/A ( set to 0 )
* LoRa: [0: not inverted, 1: inverted]
* @param [IN] rxContinuous Sets the reception in continuous mode
* [false: single mode, true: continuous mode]
*/
virtual void SetRxConfig ( ModemType modem, uint32_t bandwidth,
uint32_t datarate, uint8_t coderate,
uint32_t bandwidthAfc, uint16_t preambleLen,
uint16_t symbTimeout, bool fixLen,
uint8_t payloadLen,
bool crcOn, bool freqHopOn, uint8_t hopPeriod,
bool iqInverted, bool rxContinuous );
/*!
* @brief Sets the transmission parameters
*
* @param [IN] modem Radio modem to be used [0: FSK, 1: LoRa]
* @param [IN] power Sets the output power [dBm]
* @param [IN] fdev Sets the frequency deviation ( FSK only )
* FSK : [Hz]
* LoRa: 0
* @param [IN] bandwidth Sets the bandwidth ( LoRa only )
* FSK : 0
* LoRa: [0: 125 kHz, 1: 250 kHz,
* 2: 500 kHz, 3: Reserved]
* @param [IN] datarate Sets the Datarate
* FSK : 600..300000 bits/s
* LoRa: [6: 64, 7: 128, 8: 256, 9: 512,
* 10: 1024, 11: 2048, 12: 4096 chips]
* @param [IN] coderate Sets the coding rate ( LoRa only )
* FSK : N/A ( set to 0 )
* LoRa: [1: 4/5, 2: 4/6, 3: 4/7, 4: 4/8]
* @param [IN] preambleLen Sets the preamble length
* @param [IN] fixLen Fixed length packets [0: variable, 1: fixed]
* @param [IN] crcOn Enables disables the CRC [0: OFF, 1: ON]
* @param [IN] freqHopOn Enables disables the intra-packet frequency hopping [0: OFF, 1: ON] (LoRa only)
* @param [IN] hopPeriod Number of symbols bewteen each hop (LoRa only)
* @param [IN] iqInverted Inverts IQ signals ( LoRa only )
* FSK : N/A ( set to 0 )
* LoRa: [0: not inverted, 1: inverted]
* @param [IN] timeout Transmission timeout [us]
*/
virtual void SetTxConfig( ModemType modem, int8_t power, uint32_t fdev,
uint32_t bandwidth, uint32_t datarate,
uint8_t coderate, uint16_t preambleLen,
bool fixLen, bool crcOn, bool freqHopOn,
uint8_t hopPeriod, bool iqInverted, uint32_t timeout );
/*!
* @brief Computes the packet time on air for the given payload
*
* \Remark Can only be called once SetRxConfig or SetTxConfig have been called
*
* @param [IN] modem Radio modem to be used [0: FSK, 1: LoRa]
* @param [IN] pktLen Packet payload length
*
* @retval airTime Computed airTime for the given packet payload length
*/
virtual double TimeOnAir ( ModemType modem, uint8_t pktLen );
/*!
* @brief Sends the buffer of size. Prepares the packet to be sent and sets
* the radio in transmission
*
* @param [IN]: buffer Buffer pointer
* @param [IN]: size Buffer size
*/
virtual void Send( uint8_t *buffer, uint8_t size );
/*!
* @brief Sets the radio in sleep mode
*/
virtual void Sleep( void );
/*!
* @brief Sets the radio in standby mode
*/
virtual void Standby( void );
/*!
* @brief Sets the radio in reception mode for the given time
* @param [IN] timeout Reception timeout [us]
* [0: continuous, others timeout]
*/
virtual void Rx( uint32_t timeout );
/*!
* @brief Sets the radio in transmission mode for the given time
* @param [IN] timeout Transmission timeout [us]
* [0: continuous, others timeout]
*/
virtual void Tx( uint32_t timeout );
/*!
* @brief Start a Channel Activity Detection
*/
virtual void StartCad( void );
/*!
* @brief Reads the current RSSI value
*
* @retval rssiValue Current RSSI value in [dBm]
*/
virtual int16_t GetRssi ( ModemType modem );
/*!
* @brief Writes the radio register at the specified address
*
* @param [IN]: addr Register address
* @param [IN]: data New register value
*/
virtual void Write ( uint8_t addr, uint8_t data ) = 0;
/*!
* @brief Reads the radio register at the specified address
*
* @param [IN]: addr Register address
* @retval data Register value
*/
virtual uint8_t Read ( uint8_t addr ) = 0;
/*!
* @brief Writes multiple radio registers starting at address
*
* @param [IN] addr First Radio register address
* @param [IN] buffer Buffer containing the new register's values
* @param [IN] size Number of registers to be written
*/
virtual void Write( uint8_t addr, uint8_t *buffer, uint8_t size ) = 0;
/*!
* @brief Reads multiple radio registers starting at address
*
* @param [IN] addr First Radio register address
* @param [OUT] buffer Buffer where to copy the registers data
* @param [IN] size Number of registers to be read
*/
virtual void Read ( uint8_t addr, uint8_t *buffer, uint8_t size ) = 0;
/*!
* @brief Writes the buffer contents to the SX1276 FIFO
*
* @param [IN] buffer Buffer containing data to be put on the FIFO.
* @param [IN] size Number of bytes to be written to the FIFO
*/
virtual void WriteFifo( uint8_t *buffer, uint8_t size ) = 0;
/*!
* @brief Reads the contents of the SX1276 FIFO
*
* @param [OUT] buffer Buffer where to copy the FIFO read data.
* @param [IN] size Number of bytes to be read from the FIFO
*/
virtual void ReadFifo( uint8_t *buffer, uint8_t size ) = 0;
/*!
* @brief Resets the SX1276
*/
virtual void Reset( void ) = 0;
//-------------------------------------------------------------------------
// Board relative functions
//-------------------------------------------------------------------------
protected:
/*!
* @brief Initializes the radio I/Os pins interface
*/
virtual void IoInit( void ) = 0;
/*!
* @brief Initializes the radio registers
*/
virtual void RadioRegistersInit( ) = 0;
/*!
* @brief Initializes the radio SPI
*/
virtual void SpiInit( void ) = 0;
/*!
* @brief Initializes DIO IRQ handlers
*
* @param [IN] irqHandlers Array containing the IRQ callback functions
*/
virtual void IoIrqInit( DioIrqHandler *irqHandlers ) = 0;
/*!
* @brief De-initializes the radio I/Os pins interface.
*
* \remark Useful when going in MCU lowpower modes
*/
virtual void IoDeInit( void ) = 0;
/*!
* @brief Gets the board PA selection configuration
*
* @param [IN] channel Channel frequency in Hz
* @retval PaSelect RegPaConfig PaSelect value
*/
virtual uint8_t GetPaSelect( uint32_t channel ) = 0;
/*!
* @brief Set the RF Switch I/Os pins in Low Power mode
*
* @param [IN] status enable or disable
*/
virtual void SetAntSwLowPower( bool status ) = 0;
/*!
* @brief Initializes the RF Switch I/Os pins interface
*/
virtual void AntSwInit( void ) = 0;
/*!
* @brief De-initializes the RF Switch I/Os pins interface
*
* \remark Needed to decrease the power consumption in MCU lowpower modes
*/
virtual void AntSwDeInit( void ) = 0;
/*!
* @brief Controls the antena switch if necessary.
*
* \remark see errata note
*
* @param [IN] rxTx [1: Tx, 0: Rx]
*/
virtual void SetAntSw( uint8_t rxTx ) = 0;
/*!
* @brief Checks if the given RF frequency is supported by the hardware
*
* @param [IN] frequency RF frequency to be checked
* @retval isSupported [true: supported, false: unsupported]
*/
virtual bool CheckRfFrequency( uint32_t frequency ) = 0;
protected:
/*!
* @brief Sets the SX1276 operating mode
*
* @param [IN] opMode New operating mode
*/
virtual void SetOpMode( uint8_t opMode );
/*
* SX1276 DIO IRQ callback functions prototype
*/
/*!
* @brief DIO 0 IRQ callback
*/
virtual void OnDio0Irq( void );
/*!
* @brief DIO 1 IRQ callback
*/
virtual void OnDio1Irq( void );
/*!
* @brief DIO 2 IRQ callback
*/
virtual void OnDio2Irq( void );
/*!
* @brief DIO 3 IRQ callback
*/
virtual void OnDio3Irq( void );
/*!
* @brief DIO 4 IRQ callback
*/
virtual void OnDio4Irq( void );
/*!
* @brief DIO 5 IRQ callback
*/
virtual void OnDio5Irq( void );
/*!
* @brief Tx & Rx timeout timer callback
*/
virtual void OnTimeoutIrq( void );
/*!
* Returns the known FSK bandwidth registers value
*
* \param [IN] bandwidth Bandwidth value in Hz
* \retval regValue Bandwidth register value.
*/
static uint8_t GetFskBandwidthRegValue( uint32_t bandwidth );
};
#endif //__SX1272_H__

10
libraries/radio/SX1276Lib/sx1276/sx1276-hal.cpp
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@ -143,11 +143,11 @@ void SX1276MB1xAS::IoIrqInit( DioIrqHandler *irqHandlers )
dio3.mode(PullDown);
dio4.mode(PullDown);
#endif
dio0.rise( this, static_cast< TriggerMB1xAS > ( irqHandlers[0] ) );
dio1.rise( this, static_cast< TriggerMB1xAS > ( irqHandlers[1] ) );
dio2.rise( this, static_cast< TriggerMB1xAS > ( irqHandlers[2] ) );
dio3.rise( this, static_cast< TriggerMB1xAS > ( irqHandlers[3] ) );
dio4.rise( this, static_cast< TriggerMB1xAS > ( irqHandlers[4] ) );
dio0.rise( this, static_cast< TriggerMB1xASSX1276 > ( irqHandlers[0] ) );
dio1.rise( this, static_cast< TriggerMB1xASSX1276 > ( irqHandlers[1] ) );
dio2.rise( this, static_cast< TriggerMB1xASSX1276 > ( irqHandlers[2] ) );
dio3.rise( this, static_cast< TriggerMB1xASSX1276 > ( irqHandlers[3] ) );
dio4.rise( this, static_cast< TriggerMB1xASSX1276 > ( irqHandlers[4] ) );
}
void SX1276MB1xAS::IoDeInit( void )

12
libraries/radio/SX1276Lib/sx1276/sx1276.cpp
View File

@ -58,12 +58,12 @@ SX1276::SX1276( void ( *txDone )( ), void ( *txTimeout ) ( ), void ( *rxDone ) (
this->dioIrq = new DioIrqHandler[6];
this->dioIrq[0] = &SX1276::OnDio0Irq;
this->dioIrq[1] = &SX1276::OnDio1Irq;
this->dioIrq[2] = &SX1276::OnDio2Irq;
this->dioIrq[3] = &SX1276::OnDio3Irq;
this->dioIrq[4] = &SX1276::OnDio4Irq;
this->dioIrq[5] = NULL;
this->dioIrq[0] = static_cast< DioIrqHandler > (&SX1276::OnDio0Irq);
this->dioIrq[1] = static_cast< DioIrqHandler > (&SX1276::OnDio1Irq);
this->dioIrq[2] = static_cast< DioIrqHandler > (&SX1276::OnDio2Irq);
this->dioIrq[3] = static_cast< DioIrqHandler > (&SX1276::OnDio3Irq);
this->dioIrq[4] = static_cast< DioIrqHandler > (&SX1276::OnDio4Irq);
this->dioIrq[5] = static_cast< DioIrqHandler > (0);
this->settings.State = IDLE;
}

10
libraries/radio/SX1276Lib/typedefs/typedefs.h
View File

@ -18,18 +18,22 @@ Maintainers: Miguel Luis, Gregory Cristian and Nicolas Huguenin
#include "mbed.h"
#include "./enums/enums.h"
class SX1276;
class Radio;
class SX1276MB1xAS;
class SX1272MB1xAS;
/*!
* Hardware IO IRQ callback function definition
*/
typedef void ( SX1276::*DioIrqHandler )( void );
typedef void ( Radio::*DioIrqHandler )( void );
/*!
* triggers definition
*/
typedef void ( SX1276::*Trigger )( void );
typedef void ( SX1276MB1xAS::*TriggerMB1xAS )( void );
typedef void ( Radio::*Trigger )( void );
typedef void ( SX1276MB1xAS::*TriggerMB1xASSX1276 )( void );
typedef void ( SX1272MB1xAS::*TriggerMB1xASSX1272 )( void );
/*!
* FSK bandwidth definition

6
libraries/tests/radio/SX127xPingPong/main.cpp
View File

@ -1,6 +1,6 @@
#include "mbed.h"
#include "main.h"
#include "sx1276-hal.h"
#include "sx1272-hal.h"
#include "debug.h"
/* Set this flag to '1' to display debug messages on the console */
@ -61,7 +61,7 @@ DigitalOut led(LED1);
typedef RadioState States_t;
volatile States_t State = LOWPOWER;
SX1276MB1xAS Radio( OnTxDone, OnTxTimeout, OnRxDone, OnRxTimeout, OnRxError, NULL, NULL );
SX1272MB1xAS Radio( OnTxDone, OnTxTimeout, OnRxDone, OnRxTimeout, OnRxError, NULL, NULL );
const uint8_t PingMsg[] = "PING";
const uint8_t PongMsg[] = "PONG";
@ -96,8 +96,6 @@ int main()
wait( 1 );
}
debug_if( ( DEBUG_MESSAGE & ( Radio.DetectBoardType( ) == SX1276MB1LAS ) ) , "\n\r > Board Type: SX1276MB1LAS < \n\r" );
debug_if( ( DEBUG_MESSAGE & ( Radio.DetectBoardType( ) == SX1276MB1MAS ) ) , "\n\r > Board Type: SX1276MB1MAS < \n\r" );
Radio.SetChannel( RF_FREQUENCY );