mirror of https://github.com/ARMmbed/mbed-os.git
Merge pull request #5608 from productize/nucleo-f413zh
NUCLEO_F413ZH: Add support for the NUCLEO-F413ZH boardpull/5732/merge
Jimmy Brisson
GitHub
commit
737f75a68f
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@ -140,6 +140,7 @@ USBHAL::USBHAL(void) {
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defined(TARGET_NUCLEO_F401RE) || \
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defined(TARGET_NUCLEO_F401RE) || \
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defined(TARGET_NUCLEO_F411RE) || \
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defined(TARGET_NUCLEO_F411RE) || \
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defined(TARGET_NUCLEO_F412ZG) || \
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defined(TARGET_NUCLEO_F412ZG) || \
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defined(TARGET_NUCLEO_F413ZH) || \
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defined(TARGET_NUCLEO_F429ZI) || \
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defined(TARGET_NUCLEO_F429ZI) || \
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defined(TARGET_NUCLEO_F446RE) || \
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defined(TARGET_NUCLEO_F446RE) || \
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defined(TARGET_NUCLEO_F446ZE) || \
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defined(TARGET_NUCLEO_F446ZE) || \
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@ -22,6 +22,7 @@
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defined(TARGET_NUCLEO_F401RE) || \
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defined(TARGET_NUCLEO_F401RE) || \
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defined(TARGET_NUCLEO_F411RE) || \
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defined(TARGET_NUCLEO_F411RE) || \
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defined(TARGET_NUCLEO_F412ZG) || \
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defined(TARGET_NUCLEO_F412ZG) || \
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defined(TARGET_NUCLEO_F413ZH) || \
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defined(TARGET_NUCLEO_F429ZI) || \
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defined(TARGET_NUCLEO_F429ZI) || \
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defined(TARGET_NUCLEO_F446RE) || \
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defined(TARGET_NUCLEO_F446RE) || \
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defined(TARGET_NUCLEO_F446ZE) || \
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defined(TARGET_NUCLEO_F446ZE) || \
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@ -67,6 +67,7 @@ static gpio_t gpio_powerpin;
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// NUCLEO_144 boards
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// NUCLEO_144 boards
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#elif defined(TARGET_NUCLEO_F207ZG) || \
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#elif defined(TARGET_NUCLEO_F207ZG) || \
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defined(TARGET_NUCLEO_F412ZG) || \
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defined(TARGET_NUCLEO_F412ZG) || \
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defined(TARGET_NUCLEO_F413ZH) || \
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defined(TARGET_NUCLEO_F429ZI) || \
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defined(TARGET_NUCLEO_F429ZI) || \
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defined(TARGET_NUCLEO_F439ZI) || \
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defined(TARGET_NUCLEO_F439ZI) || \
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defined(TARGET_NUCLEO_F446ZE) || \
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defined(TARGET_NUCLEO_F446ZE) || \
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@ -189,6 +190,7 @@ USBHALHost::USBHALHost()
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defined(TARGET_NUCLEO_L486RG) || \
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defined(TARGET_NUCLEO_L486RG) || \
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defined(TARGET_NUCLEO_F207ZG) || \
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defined(TARGET_NUCLEO_F207ZG) || \
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defined(TARGET_NUCLEO_F412ZG) || \
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defined(TARGET_NUCLEO_F412ZG) || \
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defined(TARGET_NUCLEO_F413ZH) || \
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defined(TARGET_NUCLEO_F429ZI) || \
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defined(TARGET_NUCLEO_F429ZI) || \
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defined(TARGET_NUCLEO_F439ZI) || \
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defined(TARGET_NUCLEO_F439ZI) || \
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defined(TARGET_NUCLEO_F446ZE) || \
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defined(TARGET_NUCLEO_F446ZE) || \
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@ -21,7 +21,8 @@ CAN can1(PD_0, PD_1);
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defined(TARGET_DISCO_F429ZI) || defined(TARGET_NUCLEO_F103RB) || \
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defined(TARGET_DISCO_F429ZI) || defined(TARGET_NUCLEO_F103RB) || \
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defined(TARGET_NUCLEO_F746ZG) || defined(TARGET_NUCLEO_L476RG) || \
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defined(TARGET_NUCLEO_F746ZG) || defined(TARGET_NUCLEO_L476RG) || \
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defined(TARGET_NUCLEO_F412ZG) || defined(TARGET_DISCO_F413ZH) || \
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defined(TARGET_NUCLEO_F412ZG) || defined(TARGET_DISCO_F413ZH) || \
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defined(TARGET_NUCLEO_L432KC) || defined(TARGET_DISCO_F303VC)
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defined(TARGET_NUCLEO_L432KC) || defined(TARGET_DISCO_F303VC) || \
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defined(TARGET_NUCLEO_F413ZH)
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CAN can1(PA_11, PA_12);
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CAN can1(PA_11, PA_12);
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#elif defined(TARGET_DISCO_F469NI) ||defined(TARGET_DISCO_F746NG)
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#elif defined(TARGET_DISCO_F469NI) ||defined(TARGET_DISCO_F746NG)
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CAN can1(PB_8, PB_9);
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CAN can1(PB_8, PB_9);
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@ -36,7 +37,7 @@ CAN can2(p30, p29);
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#elif defined(TARGET_NUCLEO_F446RE) || defined(TARGET_DISCO_F469NI) || \
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#elif defined(TARGET_NUCLEO_F446RE) || defined(TARGET_DISCO_F469NI) || \
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defined(TARGET_DISCO_F429ZI) || defined(TARGET_NUCLEO_F746ZG) || \
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defined(TARGET_DISCO_F429ZI) || defined(TARGET_NUCLEO_F746ZG) || \
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defined(TARGET_NUCLEO_F412ZG) || defined(TARGET_DISCO_F413ZH) || \
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defined(TARGET_NUCLEO_F412ZG) || defined(TARGET_DISCO_F413ZH) || \
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defined(TARGET_DISCO_F746NG)
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defined(TARGET_DISCO_F746NG) || defined(TARGET_NUCLEO_F413ZH)
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CAN can2(PB_5, PB_6);
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CAN can2(PB_5, PB_6);
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#endif
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#endif
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char counter = 0;
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char counter = 0;
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@ -21,7 +21,8 @@ CAN can1(PD_0, PD_1);
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defined(TARGET_DISCO_F429ZI) || defined(TARGET_NUCLEO_F103RB) || \
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defined(TARGET_DISCO_F429ZI) || defined(TARGET_NUCLEO_F103RB) || \
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defined(TARGET_NUCLEO_F746ZG) || defined(TARGET_NUCLEO_L476RG) || \
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defined(TARGET_NUCLEO_F746ZG) || defined(TARGET_NUCLEO_L476RG) || \
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defined(TARGET_NUCLEO_F412ZG) || defined(TARGET_DISCO_F413ZH) || \
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defined(TARGET_NUCLEO_F412ZG) || defined(TARGET_DISCO_F413ZH) || \
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defined(TARGET_NUCLEO_L432KC) || defined(TARGET_DISCO_F303VC)
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defined(TARGET_NUCLEO_L432KC) || defined(TARGET_DISCO_F303VC) || \
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defined(TARGET_NUCLEO_F413ZH)
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CAN can1(PA_11, PA_12);
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CAN can1(PA_11, PA_12);
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#elif defined(TARGET_DISCO_F469NI) || defined(TARGET_DISCO_F746NG)
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#elif defined(TARGET_DISCO_F469NI) || defined(TARGET_DISCO_F746NG)
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CAN can1(PB_8, PB_9);
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CAN can1(PB_8, PB_9);
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@ -36,7 +37,7 @@ CAN can2(p30, p29);
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#elif defined(TARGET_NUCLEO_F446RE) || defined(TARGET_DISCO_F469NI) || \
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#elif defined(TARGET_NUCLEO_F446RE) || defined(TARGET_DISCO_F469NI) || \
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defined(TARGET_DISCO_F429ZI) || defined(TARGET_NUCLEO_F746ZG) || \
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defined(TARGET_DISCO_F429ZI) || defined(TARGET_NUCLEO_F746ZG) || \
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defined(TARGET_NUCLEO_F412ZG) || defined(TARGET_DISCO_F413ZH) || \
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defined(TARGET_NUCLEO_F412ZG) || defined(TARGET_DISCO_F413ZH) || \
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defined(TARGET_DISCO_F746NG)
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defined(TARGET_DISCO_F746NG) || defined(TARGET_NUCLEO_F413ZH)
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CAN can2(PB_5, PB_6);
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CAN can2(PB_5, PB_6);
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#endif
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#endif
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char counter = 0;
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char counter = 0;
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@ -20,7 +20,8 @@ CAN can1(P5_9, P5_10);
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defined(TARGET_DISCO_F429ZI) || \
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defined(TARGET_DISCO_F429ZI) || \
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defined(TARGET_NUCLEO_F746ZG) || defined(TARGET_DISCO_L476VG) || defined(TARGET_DISCO_L475VG_IOT01A) || \
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defined(TARGET_NUCLEO_F746ZG) || defined(TARGET_DISCO_L476VG) || defined(TARGET_DISCO_L475VG_IOT01A) || \
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defined(TARGET_NUCLEO_F412ZG) || defined(TARGET_DISCO_F413ZH) || \
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defined(TARGET_NUCLEO_F412ZG) || defined(TARGET_DISCO_F413ZH) || \
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defined(TARGET_NUCLEO_L476RG) || defined(TARGET_NUCLEO_L432KC)
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defined(TARGET_NUCLEO_L476RG) || defined(TARGET_NUCLEO_L432KC) || \
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defined(TARGET_NUCLEO_F413ZH)
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CAN can1(PA_11, PA_12);
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CAN can1(PA_11, PA_12);
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#elif defined(TARGET_DISCO_F469NI) || defined(TARGET_DISCO_F746NG) || \
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#elif defined(TARGET_DISCO_F469NI) || defined(TARGET_DISCO_F746NG) || \
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defined(TARGET_NUCLEO_F446ZE) || defined(TARGET_NUCLEO_F103RB) || \
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defined(TARGET_NUCLEO_F446ZE) || defined(TARGET_NUCLEO_F103RB) || \
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@ -0,0 +1,90 @@
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/* mbed Microcontroller Library
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* Copyright (c) 2016 ARM Limited
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef MBED_PERIPHERALNAMES_H
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#define MBED_PERIPHERALNAMES_H
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#include "cmsis.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef enum {
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ADC_1 = (int)ADC1_BASE
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} ADCName;
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typedef enum {
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DAC_1 = (int)DAC_BASE
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} DACName;
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typedef enum {
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UART_1 = (int)USART1_BASE,
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UART_2 = (int)USART2_BASE,
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UART_3 = (int)USART3_BASE,
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UART_4 = (int)UART4_BASE,
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UART_5 = (int)UART5_BASE,
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UART_6 = (int)USART6_BASE,
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UART_7 = (int)UART7_BASE,
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UART_8 = (int)UART8_BASE,
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UART_9 = (int)UART9_BASE,
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UART_10 = (int)UART10_BASE
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} UARTName;
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#define STDIO_UART_TX PD_8
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#define STDIO_UART_RX PD_9
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#define STDIO_UART UART_3
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typedef enum {
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SPI_1 = (int)SPI1_BASE,
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SPI_2 = (int)SPI2_BASE,
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SPI_3 = (int)SPI3_BASE,
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SPI_4 = (int)SPI4_BASE,
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SPI_5 = (int)SPI5_BASE
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} SPIName;
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typedef enum {
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I2C_1 = (int)I2C1_BASE,
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I2C_2 = (int)I2C2_BASE,
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I2C_3 = (int)I2C3_BASE,
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FMPI2C_1 = (int)FMPI2C1_BASE
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} I2CName;
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typedef enum {
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PWM_1 = (int)TIM1_BASE,
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PWM_2 = (int)TIM2_BASE,
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PWM_3 = (int)TIM3_BASE,
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PWM_4 = (int)TIM4_BASE,
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PWM_5 = (int)TIM5_BASE,
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PWM_8 = (int)TIM8_BASE,
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PWM_9 = (int)TIM9_BASE,
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PWM_10 = (int)TIM10_BASE,
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PWM_11 = (int)TIM11_BASE,
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PWM_12 = (int)TIM12_BASE,
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PWM_13 = (int)TIM13_BASE,
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PWM_14 = (int)TIM14_BASE
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} PWMName;
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typedef enum {
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CAN_1 = (int)CAN1_BASE,
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CAN_2 = (int)CAN2_BASE,
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CAN_3 = (int)CAN3_BASE
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} CANName;
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#ifdef __cplusplus
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}
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#endif
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#endif
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@ -0,0 +1,396 @@
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/* mbed Microcontroller Library
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*******************************************************************************
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* Copyright (c) 2017, STMicroelectronics
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*******************************************************************************
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*/
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#include "PeripheralPins.h"
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//==============================================================================
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// Notes
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//
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// - The pins mentionned Px_y_ALTz are alternative possibilities which use other
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// HW peripheral instances. You can use them the same way as any other "normal"
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// pin (i.e. PwmOut pwm(PA_7_ALT0);). These pins are not displayed on the board
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// pinout image on mbed.org.
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//
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// - The pins which are connected to other components present on the board have
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// the comment "Connected to xxx". The pin function may not work properly in this
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// case. These pins may not be displayed on the board pinout image on mbed.org.
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// Please read the board reference manual and schematic for more information.
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//
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//==============================================================================
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//*** ADC ***
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const PinMap PinMap_ADC[] = {
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{PA_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)},
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{PA_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)},
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{PA_2, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)},
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{PA_3, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)},
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{PA_4, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)},
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{PA_5, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)},
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{PA_6, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)},
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{PA_7, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)},
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{PB_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // Connected to LED1
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{PB_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)},
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{PC_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)},
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{PC_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)},
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{PC_2, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)},
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{PC_3, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)},
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{PC_4, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)},
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{PC_5, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)},
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{NC, NC, 0}
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};
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const PinMap PinMap_ADC_Internal[] = {
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{ADC_TEMP, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // See in analogin_api.c the correct ADC channel used
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{ADC_VREF, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 17, 0)}, // See in analogin_api.c the correct ADC channel used
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{ADC_VBAT, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, // See in analogin_api.c the correct ADC channel used
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{NC, NC, 0}
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};
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//*** DAC ***
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const PinMap PinMap_DAC[] = {
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{PA_4, DAC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)},
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{PA_5, DAC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)},
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{NC, NC, 0}
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};
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//*** I2C ***
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const PinMap PinMap_I2C_SDA[] = {
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||||||
|
{PB_3, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF9_I2C2)},
|
||||||
|
{PB_3_ALT0, FMPI2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_FMPI2C1)},
|
||||||
|
{PB_4, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF9_I2C3)},
|
||||||
|
{PB_7, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, // Connected to LED2
|
||||||
|
{PB_8, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF9_I2C3)},
|
||||||
|
{PB_9, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
|
||||||
|
{PB_9_ALT0, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF9_I2C2)},
|
||||||
|
{PB_11, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
|
||||||
|
{PB_14, FMPI2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_FMPI2C1)}, // Connected to LED3
|
||||||
|
{PC_7, FMPI2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_FMPI2C1)},
|
||||||
|
{PC_9, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
|
||||||
|
{PD_13, FMPI2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_FMPI2C1)},
|
||||||
|
{PD_15, FMPI2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_FMPI2C1)},
|
||||||
|
{PF_0, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
|
||||||
|
{PF_15, FMPI2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_FMPI2C1)},
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
const PinMap PinMap_I2C_SCL[] = {
|
||||||
|
{PA_8, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
|
||||||
|
{PB_6, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
|
||||||
|
{PB_8, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
|
||||||
|
{PB_10, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
|
||||||
|
{PB_10_ALT0, FMPI2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF9_FMPI2C1)},
|
||||||
|
{PB_15, FMPI2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_FMPI2C1)},
|
||||||
|
{PC_6, FMPI2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_FMPI2C1)},
|
||||||
|
{PD_12, FMPI2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_FMPI2C1)},
|
||||||
|
{PD_14, FMPI2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_FMPI2C1)},
|
||||||
|
{PF_1, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
|
||||||
|
{PF_14, FMPI2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_FMPI2C1)},
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
//*** PWM ***
|
||||||
|
|
||||||
|
// Pins using PWM_5 (TIM5) cannot be used as TIM5 is already used by ticker.
|
||||||
|
const PinMap PinMap_PWM[] = {
|
||||||
|
{PA_0, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)},
|
||||||
|
// {PA_0, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)},
|
||||||
|
{PA_1, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)},
|
||||||
|
// {PA_1, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)},
|
||||||
|
{PA_2, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)},
|
||||||
|
// {PA_2, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)},
|
||||||
|
{PA_2_ALT0, PWM_9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)},
|
||||||
|
{PA_3, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)},
|
||||||
|
// {PA_3, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)},
|
||||||
|
{PA_3, PWM_9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)},
|
||||||
|
{PA_5, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)},
|
||||||
|
{PA_5_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)},
|
||||||
|
{PA_6, PWM_13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)},
|
||||||
|
{PA_6_ALT0, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)},
|
||||||
|
{PA_7, PWM_14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)},
|
||||||
|
{PA_7_ALT0, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)},
|
||||||
|
{PA_7_ALT1, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)},
|
||||||
|
{PA_7_ALT2, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 1)},
|
||||||
|
{PA_8, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)},
|
||||||
|
{PA_9, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)},
|
||||||
|
{PA_10, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)},
|
||||||
|
{PA_11, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)},
|
||||||
|
{PA_15, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)},
|
||||||
|
{PB_0, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // Connected to LED1
|
||||||
|
{PB_0_ALT0, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // Connected to LED1
|
||||||
|
{PB_0_ALT1, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // Connected to LED1
|
||||||
|
{PB_1, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)},
|
||||||
|
{PB_1_ALT0, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)},
|
||||||
|
{PB_1_ALT1, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)},
|
||||||
|
{PB_3, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)},
|
||||||
|
{PB_4, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)},
|
||||||
|
{PB_5, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)},
|
||||||
|
{PB_6, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)},
|
||||||
|
{PB_7, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // Connected to LED2
|
||||||
|
{PB_8, PWM_10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)},
|
||||||
|
{PB_8_ALT0, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)},
|
||||||
|
{PB_9, PWM_11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)},
|
||||||
|
{PB_9_ALT0, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)},
|
||||||
|
{PB_10, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)},
|
||||||
|
{PB_11, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)},
|
||||||
|
{PB_13, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)},
|
||||||
|
{PB_14, PWM_12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 1, 0)}, // Connected to LED3
|
||||||
|
{PB_14_ALT0, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // Connected to LED3
|
||||||
|
{PB_14_ALT1, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // Connected to LED3
|
||||||
|
{PB_15, PWM_12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM12, 2, 0)},
|
||||||
|
{PB_15_ALT0, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)},
|
||||||
|
{PB_15_ALT1, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)},
|
||||||
|
{PC_6, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)},
|
||||||
|
{PC_6_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 1, 0)},
|
||||||
|
{PC_7, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)},
|
||||||
|
{PC_7_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 0)},
|
||||||
|
{PC_8, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)},
|
||||||
|
{PC_8_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 0)},
|
||||||
|
{PC_9, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)},
|
||||||
|
{PC_9_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 4, 0)},
|
||||||
|
{PD_12, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)},
|
||||||
|
{PD_13, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)},
|
||||||
|
{PD_14, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)},
|
||||||
|
{PD_15, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)},
|
||||||
|
{PE_5, PWM_9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)},
|
||||||
|
{PE_6, PWM_9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)},
|
||||||
|
{PE_8, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)},
|
||||||
|
{PE_9, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)},
|
||||||
|
{PE_10, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)},
|
||||||
|
{PE_11, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)},
|
||||||
|
{PE_12, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)},
|
||||||
|
{PE_13, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)},
|
||||||
|
{PE_14, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)},
|
||||||
|
// {PF_3, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)},
|
||||||
|
// {PF_4, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)},
|
||||||
|
// {PF_5, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)},
|
||||||
|
{PF_6, PWM_10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)},
|
||||||
|
{PF_7, PWM_11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)},
|
||||||
|
{PF_8, PWM_13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM13, 1, 0)},
|
||||||
|
{PF_9, PWM_14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM14, 1, 0)},
|
||||||
|
// {PF_10, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)},
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
//*** SERIAL ***
|
||||||
|
|
||||||
|
const PinMap PinMap_UART_TX[] = {
|
||||||
|
{PA_0, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||||
|
{PA_2, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||||
|
{PA_9, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||||
|
{PA_12, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART4)},
|
||||||
|
{PA_11, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
|
||||||
|
{PA_15, UART_7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)},
|
||||||
|
{PA_15_ALT0, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||||
|
{PB_4, UART_7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)},
|
||||||
|
{PB_6, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||||
|
{PB_6_ALT0, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART5)},
|
||||||
|
{PB_9, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART5)},
|
||||||
|
{PB_10, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||||
|
{PB_13, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART5)},
|
||||||
|
{PC_6, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
|
||||||
|
{PC_10, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||||
|
{PC_12, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
|
||||||
|
{PD_1, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART4)},
|
||||||
|
{PD_5, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||||
|
{PD_8, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, // Connected to STDIO_UART_TX
|
||||||
|
{PD_10, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||||
|
{PD_15, UART_9, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART9)},
|
||||||
|
{PE_1, UART_8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)},
|
||||||
|
{PE_3, UART_10, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART10)},
|
||||||
|
{PE_8, UART_7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)},
|
||||||
|
{PG_1, UART_9, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART9)},
|
||||||
|
{PG_12, UART_10, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART10)},
|
||||||
|
{PF_7, UART_7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)},
|
||||||
|
{PF_9, UART_8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)},
|
||||||
|
{PG_14, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
const PinMap PinMap_UART_RX[] = {
|
||||||
|
{PA_1, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||||
|
{PA_3, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||||
|
{PA_8, UART_7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)},
|
||||||
|
{PA_10, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||||
|
{PA_11, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART4)},
|
||||||
|
{PA_12, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
|
||||||
|
{PB_3, UART_7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)},
|
||||||
|
{PB_3_ALT0, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||||
|
{PB_5, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART5)},
|
||||||
|
{PB_7, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, // Connected to LED2
|
||||||
|
{PB_8, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART5)},
|
||||||
|
{PB_11, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||||
|
{PB_12, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART5)},
|
||||||
|
{PC_5, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||||
|
{PC_7, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
|
||||||
|
{PC_11, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||||
|
{PC_11_ALT0, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||||
|
{PD_0, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART4)},
|
||||||
|
{PD_2, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
|
||||||
|
{PD_6, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||||
|
{PD_9, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, // Connected to STDIO_UART_RX
|
||||||
|
{PD_14, UART_9, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART9)},
|
||||||
|
{PE_0, UART_8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)},
|
||||||
|
{PE_2, UART_10, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART10)},
|
||||||
|
{PE_7, UART_7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)},
|
||||||
|
{PF_6, UART_7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART7)},
|
||||||
|
{PF_8, UART_8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)},
|
||||||
|
{PG_0, UART_9, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART9)},
|
||||||
|
{PG_9, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
|
||||||
|
{PG_11, UART_10, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART10)},
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
const PinMap PinMap_UART_RTS[] = {
|
||||||
|
{PA_1, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||||
|
{PA_12, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||||
|
{PB_14, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, // Connected to LED3
|
||||||
|
{PD_4, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||||
|
{PD_12, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||||
|
{PG_8, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
|
||||||
|
{PG_12, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
const PinMap PinMap_UART_CTS[] = {
|
||||||
|
{PA_0, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||||
|
{PA_11, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||||
|
{PB_13, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART3)},
|
||||||
|
{PD_3, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||||
|
{PD_11, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||||
|
{PG_13, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
|
||||||
|
{PG_15, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
//*** SPI ***
|
||||||
|
|
||||||
|
const PinMap PinMap_SPI_MOSI[] = {
|
||||||
|
{PA_1, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
|
||||||
|
{PA_7, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||||
|
{PA_10, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||||
|
{PA_10_ALT0, SPI_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI5)},
|
||||||
|
{PB_5, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||||
|
{PB_5_ALT0, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||||
|
{PB_8, SPI_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI5)},
|
||||||
|
{PB_15, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||||
|
{PC_3, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||||
|
{PC_12, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||||
|
{PD_6, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI3)},
|
||||||
|
{PE_6, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
|
||||||
|
{PE_6_ALT0, SPI_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI5)},
|
||||||
|
{PE_14, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
|
||||||
|
{PE_14_ALT0, SPI_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI5)},
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
const PinMap PinMap_SPI_MISO[] = {
|
||||||
|
{PA_6, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||||
|
{PA_11, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)},
|
||||||
|
{PA_12, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||||
|
{PA_12_ALT0, SPI_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI5)},
|
||||||
|
{PB_4, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||||
|
{PB_4_ALT0, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||||
|
{PB_14, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)}, // Connected to LED3
|
||||||
|
{PC_2, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||||
|
{PC_11, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||||
|
{PE_5, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
|
||||||
|
{PE_5_ALT0, SPI_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI5)},
|
||||||
|
{PE_13, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
|
||||||
|
{PE_13_ALT0, SPI_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI5)},
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
const PinMap PinMap_SPI_SCLK[] = {
|
||||||
|
{PA_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||||
|
{PA_9, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||||
|
{PB_0, SPI_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI5)}, // Connected to LED1
|
||||||
|
{PB_3, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||||
|
{PB_3_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||||
|
{PB_10, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||||
|
{PB_12, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_SPI3)},
|
||||||
|
{PB_13, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||||
|
{PB_13_ALT0, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)},
|
||||||
|
{PC_7, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||||
|
{PC_10, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||||
|
{PD_3, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||||
|
{PE_2, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
|
||||||
|
{PE_2_ALT0, SPI_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI5)},
|
||||||
|
{PE_12, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
|
||||||
|
{PE_12_ALT0, SPI_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI5)},
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
const PinMap PinMap_SPI_SSEL[] = {
|
||||||
|
{PA_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||||
|
{PA_4_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||||
|
{PA_11, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||||
|
{PA_15, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||||
|
{PA_15_ALT0, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||||
|
{PB_1, SPI_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI5)},
|
||||||
|
{PB_9, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||||
|
{PB_12, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||||
|
{PB_12_ALT0, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI4)},
|
||||||
|
{PE_4, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
|
||||||
|
{PE_4_ALT0, SPI_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI5)},
|
||||||
|
{PE_11, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
|
||||||
|
{PE_11_ALT0, SPI_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI5)},
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
//*** CAN ***
|
||||||
|
|
||||||
|
const PinMap PinMap_CAN_RD[] = {
|
||||||
|
{PA_11, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
|
||||||
|
{PA_8, CAN_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_CAN3)},
|
||||||
|
{PB_5, CAN_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
|
||||||
|
{PB_3, CAN_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_CAN3)},
|
||||||
|
{PB_8, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_CAN1)},
|
||||||
|
{PB_12, CAN_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
|
||||||
|
{PD_0, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
|
||||||
|
{PG_0, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
|
||||||
|
{PG_11, CAN_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
const PinMap PinMap_CAN_TD[] = {
|
||||||
|
{PA_12, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
|
||||||
|
{PA_15, CAN_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_CAN3)},
|
||||||
|
{PB_4, CAN_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_CAN3)},
|
||||||
|
{PB_6, CAN_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
|
||||||
|
{PB_9, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_CAN1)},
|
||||||
|
{PB_13, CAN_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
|
||||||
|
{PD_1, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
|
||||||
|
{PG_1, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
|
||||||
|
{PG_12, CAN_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
@ -0,0 +1,261 @@
|
||||||
|
/* mbed Microcontroller Library
|
||||||
|
* Copyright (c) 2017 ARM Limited
|
||||||
|
*
|
||||||
|
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||||
|
* you may not use this file except in compliance with the License.
|
||||||
|
* You may obtain a copy of the License at
|
||||||
|
*
|
||||||
|
* http://www.apache.org/licenses/LICENSE-2.0
|
||||||
|
*
|
||||||
|
* Unless required by applicable law or agreed to in writing, software
|
||||||
|
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||||
|
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||||
|
* See the License for the specific language governing permissions and
|
||||||
|
* limitations under the License.
|
||||||
|
*/
|
||||||
|
#ifndef MBED_PINNAMES_H
|
||||||
|
#define MBED_PINNAMES_H
|
||||||
|
|
||||||
|
#include "cmsis.h"
|
||||||
|
#include "PinNamesTypes.h"
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
typedef enum {
|
||||||
|
ALT0 = 0x100,
|
||||||
|
ALT1 = 0x200,
|
||||||
|
ALT2 = 0x300,
|
||||||
|
ALT3 = 0x400
|
||||||
|
} ALTx;
|
||||||
|
|
||||||
|
typedef enum {
|
||||||
|
PA_0 = 0x00,
|
||||||
|
PA_1 = 0x01,
|
||||||
|
PA_2 = 0x02,
|
||||||
|
PA_2_ALT0 = PA_2|ALT0,
|
||||||
|
PA_3 = 0x03,
|
||||||
|
PA_4 = 0x04,
|
||||||
|
PA_4_ALT0 = PA_4|ALT0,
|
||||||
|
PA_5 = 0x05,
|
||||||
|
PA_5_ALT0 = PA_5|ALT0,
|
||||||
|
PA_6 = 0x06,
|
||||||
|
PA_6_ALT0 = PA_6|ALT0,
|
||||||
|
PA_7 = 0x07,
|
||||||
|
PA_7_ALT0 = PA_7|ALT0,
|
||||||
|
PA_7_ALT1 = PA_7|ALT1,
|
||||||
|
PA_7_ALT2 = PA_7|ALT2,
|
||||||
|
PA_8 = 0x08,
|
||||||
|
PA_9 = 0x09,
|
||||||
|
PA_10 = 0x0A,
|
||||||
|
PA_10_ALT0 = PA_10|ALT0,
|
||||||
|
PA_11 = 0x0B,
|
||||||
|
PA_12 = 0x0C,
|
||||||
|
PA_12_ALT0 = PA_12|ALT0,
|
||||||
|
PA_13 = 0x0D,
|
||||||
|
PA_14 = 0x0E,
|
||||||
|
PA_15 = 0x0F,
|
||||||
|
PA_15_ALT0 = PA_15|ALT0,
|
||||||
|
|
||||||
|
PB_0 = 0x10,
|
||||||
|
PB_0_ALT0 = PB_0|ALT0,
|
||||||
|
PB_0_ALT1 = PB_0|ALT1,
|
||||||
|
PB_1 = 0x11,
|
||||||
|
PB_1_ALT0 = PB_1|ALT0,
|
||||||
|
PB_1_ALT1 = PB_1|ALT1,
|
||||||
|
PB_2 = 0x12,
|
||||||
|
PB_3 = 0x13,
|
||||||
|
PB_3_ALT0 = PB_3|ALT0,
|
||||||
|
PB_4 = 0x14,
|
||||||
|
PB_4_ALT0 = PA_4|ALT0,
|
||||||
|
PB_5 = 0x15,
|
||||||
|
PB_5_ALT0 = PB_5|ALT0,
|
||||||
|
PB_6 = 0x16,
|
||||||
|
PB_6_ALT0 = PB_6|ALT0,
|
||||||
|
PB_7 = 0x17,
|
||||||
|
PB_8 = 0x18,
|
||||||
|
PB_8_ALT0 = PB_8|ALT0,
|
||||||
|
PB_9 = 0x19,
|
||||||
|
PB_9_ALT0 = PB_9|ALT0,
|
||||||
|
PB_10 = 0x1A,
|
||||||
|
PB_10_ALT0 = PB_10|ALT0,
|
||||||
|
PB_11 = 0x1B,
|
||||||
|
PB_12 = 0x1C,
|
||||||
|
PB_12_ALT0 = PB_12|ALT0,
|
||||||
|
PB_13 = 0x1D,
|
||||||
|
PB_13_ALT0 = PB_13|ALT0,
|
||||||
|
PB_14 = 0x1E,
|
||||||
|
PB_14_ALT0 = PB_14|ALT0,
|
||||||
|
PB_14_ALT1 = PB_14|ALT1,
|
||||||
|
PB_15 = 0x1F,
|
||||||
|
PB_15_ALT0 = PB_15|ALT0,
|
||||||
|
PB_15_ALT1 = PB_15|ALT1,
|
||||||
|
|
||||||
|
PC_0 = 0x20,
|
||||||
|
PC_1 = 0x21,
|
||||||
|
PC_2 = 0x22,
|
||||||
|
PC_3 = 0x23,
|
||||||
|
PC_4 = 0x24,
|
||||||
|
PC_5 = 0x25,
|
||||||
|
PC_6 = 0x26,
|
||||||
|
PC_6_ALT0 = PC_6|ALT0,
|
||||||
|
PC_7 = 0x27,
|
||||||
|
PC_7_ALT0 = PC_7|ALT0,
|
||||||
|
PC_8 = 0x28,
|
||||||
|
PC_8_ALT0 = PC_8|ALT0,
|
||||||
|
PC_9 = 0x29,
|
||||||
|
PC_9_ALT0 = PC_9|ALT0,
|
||||||
|
PC_10 = 0x2A,
|
||||||
|
PC_11 = 0x2B,
|
||||||
|
PC_11_ALT0 = PC_11|ALT0,
|
||||||
|
PC_12 = 0x2C,
|
||||||
|
PC_13 = 0x2D,
|
||||||
|
PC_14 = 0x2E,
|
||||||
|
PC_15 = 0x2F,
|
||||||
|
|
||||||
|
PD_0 = 0x30,
|
||||||
|
PD_1 = 0x31,
|
||||||
|
PD_2 = 0x32,
|
||||||
|
PD_3 = 0x33,
|
||||||
|
PD_4 = 0x34,
|
||||||
|
PD_5 = 0x35,
|
||||||
|
PD_6 = 0x36,
|
||||||
|
PD_7 = 0x37,
|
||||||
|
PD_8 = 0x38,
|
||||||
|
PD_9 = 0x39,
|
||||||
|
PD_10 = 0x3A,
|
||||||
|
PD_11 = 0x3B,
|
||||||
|
PD_12 = 0x3C,
|
||||||
|
PD_13 = 0x3D,
|
||||||
|
PD_14 = 0x3E,
|
||||||
|
PD_15 = 0x3F,
|
||||||
|
|
||||||
|
PE_0 = 0x40,
|
||||||
|
PE_1 = 0x41,
|
||||||
|
PE_2 = 0x42,
|
||||||
|
PE_2_ALT0 = PE_2|ALT0,
|
||||||
|
PE_3 = 0x43,
|
||||||
|
PE_4 = 0x44,
|
||||||
|
PE_4_ALT0 = PE_4|ALT0,
|
||||||
|
PE_5 = 0x45,
|
||||||
|
PE_5_ALT0 = PE_5|ALT0,
|
||||||
|
PE_6 = 0x46,
|
||||||
|
PE_6_ALT0 = PE_6|ALT0,
|
||||||
|
PE_7 = 0x47,
|
||||||
|
PE_8 = 0x48,
|
||||||
|
PE_9 = 0x49,
|
||||||
|
PE_10 = 0x4A,
|
||||||
|
PE_11 = 0x4B,
|
||||||
|
PE_11_ALT0 = PE_11|ALT0,
|
||||||
|
PE_12 = 0x4C,
|
||||||
|
PE_12_ALT0 = PE_12|ALT0,
|
||||||
|
PE_13 = 0x4D,
|
||||||
|
PE_13_ALT0 = PE_13|ALT0,
|
||||||
|
PE_14 = 0x4E,
|
||||||
|
PE_14_ALT0 = PE_14|ALT0,
|
||||||
|
PE_15 = 0x4F,
|
||||||
|
|
||||||
|
PF_0 = 0x50,
|
||||||
|
PF_1 = 0x51,
|
||||||
|
PF_2 = 0x52,
|
||||||
|
PF_3 = 0x53,
|
||||||
|
PF_4 = 0x54,
|
||||||
|
PF_5 = 0x55,
|
||||||
|
PF_6 = 0x56,
|
||||||
|
PF_7 = 0x57,
|
||||||
|
PF_8 = 0x58,
|
||||||
|
PF_9 = 0x59,
|
||||||
|
PF_10 = 0x5A,
|
||||||
|
PF_11 = 0x5B,
|
||||||
|
PF_12 = 0x5C,
|
||||||
|
PF_13 = 0x5D,
|
||||||
|
PF_14 = 0x5E,
|
||||||
|
PF_15 = 0x5F,
|
||||||
|
|
||||||
|
PG_0 = 0x60,
|
||||||
|
PG_1 = 0x61,
|
||||||
|
PG_2 = 0x62,
|
||||||
|
PG_3 = 0x63,
|
||||||
|
PG_4 = 0x64,
|
||||||
|
PG_5 = 0x65,
|
||||||
|
PG_6 = 0x66,
|
||||||
|
PG_7 = 0x67,
|
||||||
|
PG_8 = 0x68,
|
||||||
|
PG_9 = 0x69,
|
||||||
|
PG_10 = 0x6A,
|
||||||
|
PG_11 = 0x6B,
|
||||||
|
PG_12 = 0x6C,
|
||||||
|
PG_13 = 0x6D,
|
||||||
|
PG_14 = 0x6E,
|
||||||
|
PG_15 = 0x6F,
|
||||||
|
|
||||||
|
PH_0 = 0x70,
|
||||||
|
PH_1 = 0x71,
|
||||||
|
|
||||||
|
// ADC internal channels
|
||||||
|
ADC_TEMP = 0xF0,
|
||||||
|
ADC_VREF = 0xF1,
|
||||||
|
ADC_VBAT = 0xF2,
|
||||||
|
|
||||||
|
// Arduino connector namings
|
||||||
|
A0 = PA_3,
|
||||||
|
A1 = PC_0,
|
||||||
|
A2 = PC_3,
|
||||||
|
A3 = PC_1,
|
||||||
|
A4 = PC_4,
|
||||||
|
A5 = PC_5,
|
||||||
|
D0 = PG_9,
|
||||||
|
D1 = PG_14,
|
||||||
|
D2 = PF_15,
|
||||||
|
D3 = PE_13,
|
||||||
|
D4 = PF_14,
|
||||||
|
D5 = PE_11,
|
||||||
|
D6 = PE_9,
|
||||||
|
D7 = PF_13,
|
||||||
|
D8 = PF_12,
|
||||||
|
D9 = PD_15,
|
||||||
|
D10 = PD_14,
|
||||||
|
D11 = PA_7,
|
||||||
|
D12 = PA_6,
|
||||||
|
D13 = PA_5,
|
||||||
|
D14 = PB_9,
|
||||||
|
D15 = PB_8,
|
||||||
|
|
||||||
|
// Generic signals namings
|
||||||
|
LED1 = PB_0, // Green
|
||||||
|
LED2 = PB_7, // Blue
|
||||||
|
LED3 = PB_14, // Red
|
||||||
|
LED4 = LED1,
|
||||||
|
LED_RED = LED3,
|
||||||
|
USER_BUTTON = PC_13,
|
||||||
|
// Standardized button names
|
||||||
|
BUTTON1 = USER_BUTTON,
|
||||||
|
SERIAL_TX = PD_8,
|
||||||
|
SERIAL_RX = PD_9,
|
||||||
|
USBTX = SERIAL_TX,
|
||||||
|
USBRX = SERIAL_RX,
|
||||||
|
I2C_SCL = D15,
|
||||||
|
I2C_SDA = D14,
|
||||||
|
SPI_MOSI = D11,
|
||||||
|
SPI_MISO = D12,
|
||||||
|
SPI_SCK = D13,
|
||||||
|
SPI_CS = D10,
|
||||||
|
PWM_OUT = D9,
|
||||||
|
|
||||||
|
//USB pins
|
||||||
|
USB_OTG_FS_SOF = PA_8,
|
||||||
|
USB_OTG_FS_VBUS = PA_9,
|
||||||
|
USB_OTG_FS_ID = PA_10,
|
||||||
|
USB_OTG_FS_DM = PA_11,
|
||||||
|
USB_OTG_FS_DP = PA_12,
|
||||||
|
|
||||||
|
// Not connected
|
||||||
|
NC = (int)0xFFFFFFFF
|
||||||
|
} PinName;
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,269 @@
|
||||||
|
/* mbed Microcontroller Library
|
||||||
|
* Copyright (c) 2006-2017 ARM Limited
|
||||||
|
*
|
||||||
|
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||||
|
* you may not use this file except in compliance with the License.
|
||||||
|
* You may obtain a copy of the License at
|
||||||
|
*
|
||||||
|
* http://www.apache.org/licenses/LICENSE-2.0
|
||||||
|
*
|
||||||
|
* Unless required by applicable law or agreed to in writing, software
|
||||||
|
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||||
|
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||||
|
* See the License for the specific language governing permissions and
|
||||||
|
* limitations under the License.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* This file configures the system clock as follows:
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* System clock source | 1- USE_PLL_HSE_EXTC (external 8 MHz clock)
|
||||||
|
* | 2- USE_PLL_HSE_XTAL (external 8 MHz xtal)
|
||||||
|
* | 3- USE_PLL_HSI (internal 16 MHz)
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* SYSCLK(MHz) | 100
|
||||||
|
* AHBCLK (MHz) | 100
|
||||||
|
* APB1CLK (MHz) | 50
|
||||||
|
* APB2CLK (MHz) | 100
|
||||||
|
* USB capable | YES
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
**/
|
||||||
|
|
||||||
|
#include "stm32f4xx.h"
|
||||||
|
#include "mbed_assert.h"
|
||||||
|
|
||||||
|
|
||||||
|
/*!< Uncomment the following line if you need to relocate your vector Table in
|
||||||
|
Internal SRAM. */
|
||||||
|
/* #define VECT_TAB_SRAM */
|
||||||
|
#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
|
||||||
|
This value must be a multiple of 0x200. */
|
||||||
|
|
||||||
|
|
||||||
|
// clock source is selected with CLOCK_SOURCE in json config
|
||||||
|
#define USE_PLL_HSE_EXTC 0x8 // Use external clock (ST Link MCO)
|
||||||
|
#define USE_PLL_HSE_XTAL 0x4 // Use external xtal (X3 on board - not provided by default)
|
||||||
|
#define USE_PLL_HSI 0x2 // Use HSI internal clock
|
||||||
|
|
||||||
|
#if ( ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) )
|
||||||
|
uint8_t SetSysClock_PLL_HSE(uint8_t bypass);
|
||||||
|
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */
|
||||||
|
|
||||||
|
#if ((CLOCK_SOURCE) & USE_PLL_HSI)
|
||||||
|
uint8_t SetSysClock_PLL_HSI(void);
|
||||||
|
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Setup the microcontroller system
|
||||||
|
* Initialize the FPU setting, vector table location and External memory
|
||||||
|
* configuration.
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void SystemInit(void)
|
||||||
|
{
|
||||||
|
/* FPU settings ------------------------------------------------------------*/
|
||||||
|
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
|
||||||
|
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
|
||||||
|
#endif
|
||||||
|
/* Reset the RCC clock configuration to the default reset state ------------*/
|
||||||
|
/* Set HSION bit */
|
||||||
|
RCC->CR |= (uint32_t)0x00000001;
|
||||||
|
|
||||||
|
/* Reset CFGR register */
|
||||||
|
RCC->CFGR = 0x00000000;
|
||||||
|
|
||||||
|
/* Reset HSEON, CSSON and PLLON bits */
|
||||||
|
RCC->CR &= (uint32_t)0xFEF6FFFF;
|
||||||
|
|
||||||
|
/* Reset PLLCFGR register */
|
||||||
|
RCC->PLLCFGR = 0x24003010;
|
||||||
|
|
||||||
|
/* Reset HSEBYP bit */
|
||||||
|
RCC->CR &= (uint32_t)0xFFFBFFFF;
|
||||||
|
|
||||||
|
/* Disable all interrupts */
|
||||||
|
RCC->CIR = 0x00000000;
|
||||||
|
|
||||||
|
#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
|
||||||
|
SystemInit_ExtMemCtl();
|
||||||
|
#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
|
||||||
|
|
||||||
|
/* Configure the Vector Table location add offset address ------------------*/
|
||||||
|
#ifdef VECT_TAB_SRAM
|
||||||
|
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
|
||||||
|
#else
|
||||||
|
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
|
||||||
|
#endif
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Configures the System clock source, PLL Multiplier and Divider factors,
|
||||||
|
* AHB/APBx prescalers and Flash settings
|
||||||
|
* @note This function should be called only once the RCC clock configuration
|
||||||
|
* is reset to the default reset state (done in SystemInit() function).
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
|
||||||
|
void SetSysClock(void)
|
||||||
|
{
|
||||||
|
#if ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC)
|
||||||
|
/* 1- Try to start with HSE and external clock */
|
||||||
|
if (SetSysClock_PLL_HSE(1) == 0)
|
||||||
|
#endif
|
||||||
|
{
|
||||||
|
#if ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL)
|
||||||
|
/* 2- If fail try to start with HSE and external xtal */
|
||||||
|
if (SetSysClock_PLL_HSE(0) == 0)
|
||||||
|
#endif
|
||||||
|
{
|
||||||
|
#if ((CLOCK_SOURCE) & USE_PLL_HSI)
|
||||||
|
/* 3- If fail start with HSI clock */
|
||||||
|
if (SetSysClock_PLL_HSI() == 0)
|
||||||
|
#endif
|
||||||
|
{
|
||||||
|
while(1) {
|
||||||
|
MBED_ASSERT(1);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Output clock on MCO2 pin(PC9) for debugging purpose */
|
||||||
|
//HAL_RCC_MCOConfig(RCC_MCO2, RCC_MCO2SOURCE_SYSCLK, RCC_MCODIV_4);
|
||||||
|
}
|
||||||
|
|
||||||
|
#if ( ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) )
|
||||||
|
/******************************************************************************/
|
||||||
|
/* PLL (clocked by HSE) used as System clock source */
|
||||||
|
/******************************************************************************/
|
||||||
|
uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
|
||||||
|
{
|
||||||
|
RCC_OscInitTypeDef RCC_OscInitStruct;
|
||||||
|
RCC_ClkInitTypeDef RCC_ClkInitStruct;
|
||||||
|
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
|
||||||
|
|
||||||
|
/* Enable Power Control clock */
|
||||||
|
__HAL_RCC_PWR_CLK_ENABLE();
|
||||||
|
|
||||||
|
/* The voltage scaling allows optimizing the power consumption when the device is
|
||||||
|
clocked below the maximum system frequency, to update the voltage scaling value
|
||||||
|
regarding system frequency refer to product datasheet. */
|
||||||
|
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
|
||||||
|
|
||||||
|
/* Enable HSE oscillator and activate PLL with HSE as source */
|
||||||
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
||||||
|
if (bypass == 0) {
|
||||||
|
RCC_OscInitStruct.HSEState = RCC_HSE_ON; /* External 8 MHz xtal on OSC_IN/OSC_OUT */
|
||||||
|
} else {
|
||||||
|
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; /* External 8 MHz clock on OSC_IN */
|
||||||
|
}
|
||||||
|
|
||||||
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||||
|
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||||
|
|
||||||
|
RCC_OscInitStruct.PLL.PLLM = 8; // VCO input clock = 1 MHz (8 MHz / 8)
|
||||||
|
RCC_OscInitStruct.PLL.PLLN = 200; // VCO output clock = 200 MHz (1 MHz * 200)
|
||||||
|
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // PLLCLK = 100 MHz (200 MHz / 2)
|
||||||
|
RCC_OscInitStruct.PLL.PLLQ = 7;
|
||||||
|
RCC_OscInitStruct.PLL.PLLR = 2;
|
||||||
|
|
||||||
|
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
|
||||||
|
return 0; // FAIL
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Select PLLSAI output as USB clock source */
|
||||||
|
PeriphClkInitStruct.PLLI2S.PLLI2SM = 8;
|
||||||
|
PeriphClkInitStruct.PLLI2S.PLLI2SQ = 4;
|
||||||
|
PeriphClkInitStruct.PLLI2S.PLLI2SN = 192;
|
||||||
|
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_CLK48;
|
||||||
|
PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLI2SQ;
|
||||||
|
|
||||||
|
HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
|
||||||
|
|
||||||
|
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
|
||||||
|
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
|
||||||
|
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||||||
|
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
||||||
|
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
|
||||||
|
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
|
||||||
|
|
||||||
|
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) {
|
||||||
|
return 0; // FAIL
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Output clock on MCO1 pin(PA8) for debugging purpose */
|
||||||
|
//if (bypass == 0)
|
||||||
|
// HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_2); // 4 MHz with xtal
|
||||||
|
//else
|
||||||
|
// HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_1); // 8 MHz with external clock
|
||||||
|
|
||||||
|
return 1; // OK
|
||||||
|
}
|
||||||
|
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */
|
||||||
|
|
||||||
|
#if ((CLOCK_SOURCE) & USE_PLL_HSI)
|
||||||
|
/******************************************************************************/
|
||||||
|
/* PLL (clocked by HSI) used as System clock source */
|
||||||
|
/******************************************************************************/
|
||||||
|
uint8_t SetSysClock_PLL_HSI(void)
|
||||||
|
{
|
||||||
|
RCC_OscInitTypeDef RCC_OscInitStruct;
|
||||||
|
RCC_ClkInitTypeDef RCC_ClkInitStruct;
|
||||||
|
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
|
||||||
|
|
||||||
|
/* Enable Power Control clock */
|
||||||
|
__HAL_RCC_PWR_CLK_ENABLE();
|
||||||
|
|
||||||
|
/* The voltage scaling allows optimizing the power consumption when the device is
|
||||||
|
clocked below the maximum system frequency, to update the voltage scaling value
|
||||||
|
regarding system frequency refer to product datasheet. */
|
||||||
|
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
|
||||||
|
|
||||||
|
/* Enable HSI oscillator and activate PLL with HSI as source */
|
||||||
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE;
|
||||||
|
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
|
||||||
|
RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
|
||||||
|
RCC_OscInitStruct.HSICalibrationValue = 16;
|
||||||
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||||
|
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
|
||||||
|
RCC_OscInitStruct.PLL.PLLM = 8; // VCO input clock = 2 MHz (16 MHz / 8)
|
||||||
|
RCC_OscInitStruct.PLL.PLLN = 100; // VCO output clock = 200 MHz (2 MHz * 100)
|
||||||
|
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // PLLCLK = 100 MHz (200 MHz / 2)
|
||||||
|
RCC_OscInitStruct.PLL.PLLQ = 2;
|
||||||
|
RCC_OscInitStruct.PLL.PLLR = 2;
|
||||||
|
|
||||||
|
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
|
||||||
|
return 0; // FAIL
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Select PLLI2S output as USB clock source */
|
||||||
|
PeriphClkInitStruct.PLLI2S.PLLI2SM = 16;
|
||||||
|
PeriphClkInitStruct.PLLI2S.PLLI2SN = 192;
|
||||||
|
PeriphClkInitStruct.PLLI2S.PLLI2SQ = 4;
|
||||||
|
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_CLK48;
|
||||||
|
PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLI2SQ;
|
||||||
|
|
||||||
|
HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
|
||||||
|
|
||||||
|
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
|
||||||
|
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
|
||||||
|
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||||||
|
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
||||||
|
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
|
||||||
|
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
|
||||||
|
|
||||||
|
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) {
|
||||||
|
return 0; // FAIL
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Output clock on MCO1 pin(PA8) for debugging purpose */
|
||||||
|
//HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI, RCC_MCODIV_1); // 16 MHz
|
||||||
|
|
||||||
|
return 1; // OK
|
||||||
|
}
|
||||||
|
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */
|
||||||
|
|
@ -1093,6 +1093,24 @@
|
||||||
"release_versions": ["2", "5"],
|
"release_versions": ["2", "5"],
|
||||||
"device_name": "STM32F413ZH"
|
"device_name": "STM32F413ZH"
|
||||||
},
|
},
|
||||||
|
"NUCLEO_F413ZH": {
|
||||||
|
"inherits": ["FAMILY_STM32"],
|
||||||
|
"supported_form_factors": ["ARDUINO"],
|
||||||
|
"core": "Cortex-M4F",
|
||||||
|
"extra_labels_add": ["STM32F4", "STM32F413xx", "STM32F413ZH", "STM32F413xH"],
|
||||||
|
"config": {
|
||||||
|
"clock_source": {
|
||||||
|
"help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI",
|
||||||
|
"value": "USE_PLL_HSE_EXTC|USE_PLL_HSI",
|
||||||
|
"macro_name": "CLOCK_SOURCE"
|
||||||
|
}
|
||||||
|
},
|
||||||
|
"detect_code": ["0743"],
|
||||||
|
"macros_add": ["USB_STM_HAL", "USBHOST_OTHER"],
|
||||||
|
"device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
|
||||||
|
"release_versions": ["2", "5"],
|
||||||
|
"device_name": "STM32F413ZH"
|
||||||
|
},
|
||||||
"ELMO_F411RE": {
|
"ELMO_F411RE": {
|
||||||
"inherits": ["FAMILY_STM32"],
|
"inherits": ["FAMILY_STM32"],
|
||||||
"supported_form_factors": ["ARDUINO"],
|
"supported_form_factors": ["ARDUINO"],
|
||||||
|
|
|
||||||
|
|
@ -52,6 +52,7 @@ build_list = [
|
||||||
{ "target": "NUCLEO_F410RB", "toolchains": "GCC_ARM", "libs": ["dsp"] },
|
{ "target": "NUCLEO_F410RB", "toolchains": "GCC_ARM", "libs": ["dsp"] },
|
||||||
{ "target": "NUCLEO_F411RE", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] },
|
{ "target": "NUCLEO_F411RE", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] },
|
||||||
{ "target": "NUCLEO_F412ZG", "toolchains": "GCC_ARM", "libs": ["dsp"] },
|
{ "target": "NUCLEO_F412ZG", "toolchains": "GCC_ARM", "libs": ["dsp"] },
|
||||||
|
{ "target": "NUCLEO_F413ZH", "toolchains": "GCC_ARM", "libs": ["dsp", "usb"] },
|
||||||
{ "target": "NUCLEO_L432KC", "toolchains": "GCC_ARM", "libs": ["dsp"] },
|
{ "target": "NUCLEO_L432KC", "toolchains": "GCC_ARM", "libs": ["dsp"] },
|
||||||
{ "target": "NUCLEO_L476RG", "toolchains": "GCC_ARM", "libs": ["dsp"] },
|
{ "target": "NUCLEO_L476RG", "toolchains": "GCC_ARM", "libs": ["dsp"] },
|
||||||
{ "target": "NUCLEO_L011K4", "toolchains": "GCC_ARM", "libs": ["dsp"] },
|
{ "target": "NUCLEO_L011K4", "toolchains": "GCC_ARM", "libs": ["dsp"] },
|
||||||
|
|
@ -243,6 +244,12 @@ linking_list = [
|
||||||
"tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"],
|
"tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"],
|
||||||
}
|
}
|
||||||
},
|
},
|
||||||
|
{"target": "NUCLEO_F413ZH",
|
||||||
|
"toolchains": "GCC_ARM",
|
||||||
|
"tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"],
|
||||||
|
"usb" : ["USB_1", "USB_2" ,"USB_3"],
|
||||||
|
}
|
||||||
|
},
|
||||||
{"target": "NUCLEO_F429ZI",
|
{"target": "NUCLEO_F429ZI",
|
||||||
"toolchains": "GCC_ARM",
|
"toolchains": "GCC_ARM",
|
||||||
"tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"],
|
"tests": {"" : ["MBED_2", "MBED_10", "MBED_11", "MBED_16"],
|
||||||
|
|
|
||||||
|
|
@ -189,6 +189,11 @@ class Sw4STM32(GNUARMEclipse):
|
||||||
'name': 'NUCLEO-F411RE',
|
'name': 'NUCLEO-F411RE',
|
||||||
'mcuId': 'STM32F411RETx'
|
'mcuId': 'STM32F411RETx'
|
||||||
},
|
},
|
||||||
|
'NUCLEO_F413ZH':
|
||||||
|
{
|
||||||
|
'name': 'NUCLEO-F413ZH',
|
||||||
|
'mcuId': 'STM32F413ZHTx'
|
||||||
|
},
|
||||||
'NUCLEO_F429ZI':
|
'NUCLEO_F429ZI':
|
||||||
{
|
{
|
||||||
'name': 'NUCLEO-F429ZI',
|
'name': 'NUCLEO-F429ZI',
|
||||||
|
|
|
||||||
|
|
@ -320,7 +320,7 @@ TESTS = [
|
||||||
"DISCO_F469NI", "DISCO_F429ZI", "NUCLEO_F103RB", "NUCLEO_F746ZG",
|
"DISCO_F469NI", "DISCO_F429ZI", "NUCLEO_F103RB", "NUCLEO_F746ZG",
|
||||||
"DISCO_F746NG", "DISCO_L476VG", "NUCLEO_L476RG", "NUCLEO_L432KC",
|
"DISCO_F746NG", "DISCO_L476VG", "NUCLEO_L476RG", "NUCLEO_L432KC",
|
||||||
"DISCO_F769NI", "NUCLEO_F767ZI", "DISCO_F303VC", "NUCLEO_F412ZG",
|
"DISCO_F769NI", "NUCLEO_F767ZI", "DISCO_F303VC", "NUCLEO_F412ZG",
|
||||||
"DISCO_F413ZH"]
|
"DISCO_F413ZH", "NUCLEO_F413ZH"]
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
"id": "MBED_A28", "description": "CAN loopback test",
|
"id": "MBED_A28", "description": "CAN loopback test",
|
||||||
|
|
@ -334,7 +334,7 @@ TESTS = [
|
||||||
|
|
||||||
"DISCO_F746NG", "DISCO_L476VG", "NUCLEO_L476RG", "NUCLEO_L432KC",
|
"DISCO_F746NG", "DISCO_L476VG", "NUCLEO_L476RG", "NUCLEO_L432KC",
|
||||||
"DISCO_F769NI", "NUCLEO_F767ZI", "DISCO_F303VC", "NUCLEO_F412ZG",
|
"DISCO_F769NI", "NUCLEO_F767ZI", "DISCO_F303VC", "NUCLEO_F412ZG",
|
||||||
"DISCO_F413ZH"]
|
"DISCO_F413ZH", "NUCLEO_F413ZH"]
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
"id": "MBED_A29", "description": "i2c_master_slave_asynch",
|
"id": "MBED_A29", "description": "i2c_master_slave_asynch",
|
||||||
|
|
@ -589,7 +589,7 @@ TESTS = [
|
||||||
"NUCLEO_F303K8", "NUCLEO_F302R8", "NUCLEO_F446RE","NUCLEO_F446ZE", "DISCO_F469NI", "NUCLEO_F207ZG",
|
"NUCLEO_F303K8", "NUCLEO_F302R8", "NUCLEO_F446RE","NUCLEO_F446ZE", "DISCO_F469NI", "NUCLEO_F207ZG",
|
||||||
"DISCO_F429ZI", "NUCLEO_F103RB", "NUCLEO_F746ZG", "DISCO_F746NG",
|
"DISCO_F429ZI", "NUCLEO_F103RB", "NUCLEO_F746ZG", "DISCO_F746NG",
|
||||||
"NUCLEO_L476RG", "NUCLEO_L432KC", "DISCO_F303VC", "NUCLEO_F412ZG",
|
"NUCLEO_L476RG", "NUCLEO_L432KC", "DISCO_F303VC", "NUCLEO_F412ZG",
|
||||||
"DISCO_F413ZH"]
|
"DISCO_F413ZH", "NUCLEO_F413ZH"]
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
"id": "MBED_30", "description": "CAN network test using interrupts",
|
"id": "MBED_30", "description": "CAN network test using interrupts",
|
||||||
|
|
@ -600,7 +600,7 @@ TESTS = [
|
||||||
"NUCLEO_F303K8", "NUCLEO_F302R8", "NUCLEO_F446RE", "NUCLEO_F446ZE", "DISCO_F469NI",
|
"NUCLEO_F303K8", "NUCLEO_F302R8", "NUCLEO_F446RE", "NUCLEO_F446ZE", "DISCO_F469NI",
|
||||||
"DISCO_F429ZI", "NUCLEO_F103RB", "NUCLEO_F746ZG", "DISCO_F746NG",
|
"DISCO_F429ZI", "NUCLEO_F103RB", "NUCLEO_F746ZG", "DISCO_F746NG",
|
||||||
"NUCLEO_L476RG", "NUCLEO_L432KC", "DISCO_F303VC", "NUCLEO_F412ZG",
|
"NUCLEO_L476RG", "NUCLEO_L432KC", "DISCO_F303VC", "NUCLEO_F412ZG",
|
||||||
"DISCO_F413ZH"]
|
"DISCO_F413ZH", "NUCLEO_F413ZH"]
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
"id": "MBED_31", "description": "PWM LED test",
|
"id": "MBED_31", "description": "PWM LED test",
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue