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Merge pull request #14872 from hallard/STM32WLEx 

Add STM32WLE5 for custom targets LORA_E5 and RAK3172
pull/14897/head
Martin Kojtal 2021-07-08 13:25:24 +02:00 committed by GitHub
parent f937383384 c8fdc0a897
commit 7350b03088
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
7 changed files with 179 additions and 1 deletions
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1
targets/TARGET_STM/TARGET_STM32WL/CMakeLists.txt
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@ -16,6 +16,7 @@ target_sources(mbed-stm32wl
pwmout_device.c
serial_device.c
spi_api.c
system_clock.c
)
target_include_directories(mbed-stm32wl

0
targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WL55xC/TARGET_NUCLEO_WL55JC/PeripheralNames.h → targets/TARGET_STM/TARGET_STM32WL/PeripheralNames.h
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1
targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WL55xC/TARGET_NUCLEO_WL55JC/CMakeLists.txt
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@ -6,7 +6,6 @@ add_library(mbed-nucleo-wl55jc INTERFACE)
target_sources(mbed-nucleo-wl55jc
INTERFACE
PeripheralPins.c
system_clock.c
)
target_include_directories(mbed-nucleo-wl55jc

26
targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WLE5xC/CMakeLists.txt Normal file
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@ -0,0 +1,26 @@
# Copyright (c) 2020 ARM Limited. All rights reserved.
# SPDX-License-Identifier: Apache-2.0
if(${MBED_TOOLCHAIN} STREQUAL "GCC_ARM")
set(STARTUP_FILE TOOLCHAIN_GCC_ARM/startup_stm32wle5xx.S)
set(LINKER_FILE TOOLCHAIN_GCC_ARM/stm32wle5xc.ld)
elseif(${MBED_TOOLCHAIN} STREQUAL "ARM")
set(STARTUP_FILE TOOLCHAIN_ARM/startup_stm32wle5xx.S)
set(LINKER_FILE TOOLCHAIN_ARM/stm32wle5xc.sct)
endif()
add_library(mbed-stm32wle5xc INTERFACE)
target_sources(mbed-stm32wle5xc
INTERFACE
${STARTUP_FILE}
)
target_include_directories(mbed-stm32wle5xc
INTERFACE
.
)
mbed_set_linker_script(mbed-stm32wle5xc ${CMAKE_CURRENT_SOURCE_DIR}/${LINKER_FILE})
target_link_libraries(mbed-stm32wle5xc INTERFACE mbed-stm32wl)

0
targets/TARGET_STM/TARGET_STM32WL/TARGET_STM32WL55xC/TARGET_NUCLEO_WL55JC/system_clock.c → targets/TARGET_STM/TARGET_STM32WL/system_clock.c
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16
targets/targets.json
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@ -4381,6 +4381,22 @@
],
"device_name": "STM32WL55JCIx"
},
"MCU_STM32WLE5xC": {
"inherits": [
"MCU_STM32WL"
],
"public": false,
"macros_add": [
"STM32WLE5xx"
],
"extra_labels_add": [
"STM32WLE5xC"
],
"mbed_rom_start": "0x8000000",
"mbed_rom_size": "0x40000",
"mbed_ram_start": "0x20000000",
"mbed_ram_size": "0x10000"
},
"MIMXRT1050_EVK": {
"supported_form_factors": [
"ARDUINO_UNO"

136
tools/arm_pack_manager/index.json
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@ -480222,6 +480222,142 @@
]
],
"sub_family": "STM32WL55"
},
"STM32WLE5JCIx": {
"name": "STM32WLE5JCIx:CM4",
"memories": {
"IRAM1": {
"access": {
"read": true,
"write": true,
"execute": false,
"peripheral": false,
"secure": false,
"non_secure": false,
"non_secure_callable": false
},
"start": 536870912,
"size": 65536,
"startup": false,
"default": true
},
"IROM1": {
"access": {
"read": true,
"write": false,
"execute": true,
"peripheral": false,
"secure": false,
"non_secure": false,
"non_secure_callable": false
},
"start": 134217728,
"size": 262144,
"startup": true,
"default": true
}
},
"algorithms": [
{
"file_name": "CMSIS/Flash/STM32WLxx_CM4.FLM",
"start": 134217728,
"size": 262144,
"default": true,
"ram_start": null,
"ram_size": null
}
],
"processor": {
"Symmetric": {
"units": 1,
"core": "CortexM4",
"fpu": "None",
"mpu": "Present"
}
},
"from_pack": {
"vendor": "Keil",
"pack": "STM32WLxx_DFP",
"version": "1.1.0",
"url": "http://www.keil.com/pack"
},
"vendor": "STMicroelectronics:13",
"family": "STM32WL Series",
"sectors": [
[
134217728,
2048
]
],
"sub_family": "STM32WLE5"
},
"STM32WLE5CCUx": {
"name": "STM32WLE5CCUx:CM4",
"memories": {
"IRAM1": {
"access": {
"read": true,
"write": true,
"execute": false,
"peripheral": false,
"secure": false,
"non_secure": false,
"non_secure_callable": false
},
"start": 536870912,
"size": 65536,
"startup": false,
"default": true
},
"IROM1": {
"access": {
"read": true,
"write": false,
"execute": true,
"peripheral": false,
"secure": false,
"non_secure": false,
"non_secure_callable": false
},
"start": 134217728,
"size": 262144,
"startup": true,
"default": true
}
},
"algorithms": [
{
"file_name": "CMSIS/Flash/STM32WLxx_CM4.FLM",
"start": 134217728,
"size": 262144,
"default": true,
"ram_start": null,
"ram_size": null
}
],
"processor": {
"Symmetric": {
"units": 1,
"core": "CortexM4",
"fpu": "None",
"mpu": "Present"
}
},
"from_pack": {
"vendor": "Keil",
"pack": "STM32WLxx_DFP",
"version": "1.1.0",
"url": "http://www.keil.com/pack"
},
"vendor": "STMicroelectronics:13",
"family": "STM32WL Series",
"sectors": [
[
134217728,
2048
]
],
"sub_family": "STM32WLE5"
},
"STM32WB15CCUx": {
"name": "STM32WB15CCUx",