Merge pull request #3318 from radhika-raghavendran/master

Register map changes for RevG

targets/TARGET_ONSEMI/TARGET_NCS36510/aes_map.h

@@ -67,18 +67,19 @@ typedef struct {
     __I uint32_t CBCo3; /**< Bits[127:96] of the 128-bit CBC result */
     union {
         struct {
-            __O uint32_t START:1; /**< start the encryption : 0 = no-effect , 1 = enable  */
+            __IO uint32_t START:1; /**< start the encryption : 0 = no-effect , 1 = enable  */
-            __O uint32_t ACC_CLR:1; /**< Clear the CBC accumulator : 0 = no-effect 1 = clears the CBC accumulator */
+            __IO uint32_t ACC_CLR:1; /**< Clear the CBC accumulator : 0 = no-effect 1 = clears the CBC accumulator */
-            __O uint32_t INT_CLEAR:1; /**<  interrupt clear : 0 = no-effect 1 = clear the interrupt  */
+            __IO uint32_t INT_CLEAR:1; /**<  interrupt clear : 0 = no-effect 1 = clear the interrupt  */
-            __O uint32_t KEY_LENGTH:1; /**<  Key Length: 0 = 128 Bit Encryption 1 = 256 Bit Encryption  */
         } BITS;
-        __O uint32_t WORD;
+        __IO uint32_t WORD;
     } CTL;
     union {
         struct {
             __IO uint32_t CBC_MODE:1; /**< counter mode : 0 = counter mode , 1 = CBC mode */
             __IO uint32_t BYPASS:1; /**< encryption : 0 = Normal Mode , 1 = Bypasss any encryption */
             __IO uint32_t INT_EN:1; /**< interrupt mask : 0 = disabled 1 = enabled  */
+            __IO uint32_t KEY_LENGTH:1; /**<  Key Length: 0 = 128 Bit Encryption 1 = 256 Bit Encryption  */
+
         } BITS;
         __IO uint32_t WORD;
     } MODE;

targets/TARGET_ONSEMI/TARGET_NCS36510/analogin_api.c

@@ -64,7 +64,8 @@ void analogin_init(analogin_t *obj, PinName pin)
     obj->adcReg = (AdcReg_pt)adc;
     obj->pin = pin;
     obj->pinFlag = 1;
-
+    obj->ADC_Offset_Value = TRIMREG->ADC_OFFSET_TRIM;
+    
     switch (pin) {
         case A0:
             adc_pin=0;
@@ -183,7 +184,14 @@ uint16_t analogin_read_u16(analogin_t *obj)
     while((uint32_t)(obj->adcReg->STATUS)!=(uint32_t)1) {
     }
     adcData =(uint16_t)(obj->adcReg->DATA);
-    CLOCK_DISABLE(CLOCK_ADC);
+    
+    /* Offset the ADC data with trim value */
+    if (obj->ADC_Offset_Value != 0xFFFFFFFF) {
+      
+        if(adcData >= obj->ADC_Offset_Value) {
+            adcData -= obj->ADC_Offset_Value;
+        }
+    }
 
     return(adcData);
 }

targets/TARGET_ONSEMI/TARGET_NCS36510/ncs36510Init.c

@@ -37,7 +37,7 @@
 #include "ncs36510Init.h"
 
 void fPmuInit(void);
-uint32_t ADC_Trim_Offset;
+
 /**
  * @brief
  * Hardware trimming function
@@ -94,8 +94,6 @@ boolean fTrim()
         RFANATRIMREG->TX_VCO_TRIM_LUT1 = TRIMREG->TX_VCO_LUT1.WORD;;
         RFANATRIMREG->TX_VCO_TRIM_LUT2 = TRIMREG->TX_VCO_LUT2.WORD;;
 
-        ADC_Trim_Offset = TRIMREG->ADC_OFFSET_TRIM;
-
         status = True;
 
     } else {

targets/TARGET_ONSEMI/TARGET_NCS36510/objects.h

@@ -111,6 +111,7 @@ struct analogin_s {
     AdcReg_pt             adcReg;
     PinName               pin;
     uint8_t               pinFlag;
+    uint32_t              ADC_Offset_Value;
 };
 
 struct pwmout_s {

targets/TARGET_ONSEMI/TARGET_NCS36510/pwm_map.h

@@ -45,24 +45,19 @@
 
 /** Power management Control HW Structure Overlay */
 typedef struct {
-    __IO uint32_t DUTYCYCLE;
+    __O uint32_t DUTYCYCLE;
-    union {
+    __O uint32_t PWM_ENABLE;
-        struct {
-            __O uint32_t ENABLE :8;          /**< Write any value to enable PWM output */
-            __I uint32_t PAD :1;             /** < Pad */
-            __I uint32_t ENABLE_STATE :1;    /**< Current state of pwmEnable configuration bit.  ‘1’ PWM output is enabled.  ‘0’ PWN output is disabled. */
-            __I uint32_t OUTPUT_STATE :1;    /**< Current state of PWM output */
-        } BITS;
-        __IO uint32_t WORD;
-    } PWM_ENABLE;
     __O uint32_t PWM_DISABLE;
+    __O uint32_t PRESCALE_ENABLE;
+    __O uint32_t PRESCALE_DISABLE;
     union {
         struct {
-            __O uint32_t ENABLE :8; /**< Write any value to select enable the 4-bit prescaler */
+            __I uint32_t CUR_DUTY_CYCLE_VALUE : 8; /** Curent value of duty Cycle */
-            __I uint32_t STATE:1; /**< Current state of the prescaler.  ‘1’ the prescaler is enabled.  ‘0’ the prescaler is disabled. */
+            __I uint32_t CUR_PRE_SCALER_STATE : 1; /** Current state of the prescaler.  ‘1’ the prescaler is enabled.  ‘0’ the prescaler is disabled. */
+            __I uint32_t CUR_PWM_ENABLE_STATE : 1; /** Current state of the PWM.  ‘1’ the PWM is enabled.  ‘0’ the PWM is disabled. */
+            __I uint32_t CUR_PWM_OUTPUT_STATE : 1; /** Current state of PWM output */
         } BITS;
-        __IO uint32_t WORD;
+        __I uint32_t WORD;
-    } PRESCALE_ENABLE;
+    } READ_CONFIG_STATUS;
-    __O uint32_t PRESCALE_DISABLE;
 } PwmReg_t, *PwmReg_pt;
 #endif /* PWM_MAP_H_ */

targets/TARGET_ONSEMI/TARGET_NCS36510/pwmout_api.c

@@ -61,7 +61,7 @@ void pwmout_init(pwmout_t *obj, PinName pin)
     obj->pwmReg->DUTYCYCLE = 0x80;
 
     /* Write the PWM output enable register 0x4000B004, to 1 */
-    obj->pwmReg->PWM_ENABLE.WORD = 0x1;
+    obj->pwmReg->PWM_ENABLE = 0x1;
 
     obj->pwmReg->PRESCALE_DISABLE = 0x1;
 
@@ -190,7 +190,7 @@ void pwmout_pulsewidth_us(pwmout_t *obj, int us)
     }
     /* If pulsewidth is less than 128uSec, set the prescaler to 4096
      * by enabling prescale register 0x4000B00C to 1 */
-    obj->pwmReg->PRESCALE_ENABLE.WORD = 0x1;
+    obj->pwmReg->PRESCALE_ENABLE = 0x1;
 
     /* Calculate the duty cycle based on the width of the pulse */
     /* ((255 * us) / 128) + 1 = duty cycle */