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Cellular: HSI set to be source clock for WISE_1570

pull/7489/head
Mirela Chirica 2018-07-12 10:12:15 +03:00
parent bcec185754
commit 72aabc9db4
1 changed files with 2 additions and 1 deletions
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3
targets/targets.json
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@ -1708,10 +1708,11 @@
"config": { "config": {
"clock_source": { "clock_source": {
"help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI", "help": "Mask value : USE_PLL_HSE_EXTC (need HW patch) | USE_PLL_HSE_XTAL (need HW patch) | USE_PLL_HSI | USE_PLL_MSI",
"value": "USE_PLL_HSE_XTAL", "value": "USE_PLL_HSI",
"macro_name": "CLOCK_SOURCE" "macro_name": "CLOCK_SOURCE"
} }
}, },
"overrides": {"lpuart_clock_source": "USE_LPUART_CLK_HSI"},
"detect_code": ["0460"], "detect_code": ["0460"],
"macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT", "WISE_1570", "TWO_RAM_REGIONS"], "macros_add": ["MBEDTLS_CONFIG_HW_SUPPORT", "WISE_1570", "TWO_RAM_REGIONS"],
"device_has_add": ["ANALOGOUT", "CRC", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"], "device_has_add": ["ANALOGOUT", "CRC", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],