mirror of https://github.com/ARMmbed/mbed-os.git
HAL removing code for API which is not ported yet
0xc0170
parent
a14d88f156
commit
72659a220b
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@ -25,52 +25,24 @@ extern "C" {
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typedef enum {
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UART_0 = (int)UART0_BASE
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} UARTName;
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#define STDIO_UART_TX USBTX
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#define STDIO_UART_RX USBRX
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#define STDIO_UART UART_0
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typedef enum {
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I2C_0 = (int)I2C0_BASE
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} I2CName;
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#define TPM_SHIFT 8
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typedef enum {
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PWM_1 = (0 << TPM_SHIFT) | (0), // TPM0 CH0
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PWM_2 = (0 << TPM_SHIFT) | (1), // TPM0 CH1
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PWM_3 = (0 << TPM_SHIFT) | (2), // TPM0 CH2
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PWM_4 = (0 << TPM_SHIFT) | (3), // TPM0 CH3
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PWM_5 = (0 << TPM_SHIFT) | (4), // TPM0 CH4
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PWM_6 = (0 << TPM_SHIFT) | (5), // TPM0 CH5
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PWM_7 = (1 << TPM_SHIFT) | (0), // TPM1 CH0
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PWM_8 = (1 << TPM_SHIFT) | (1), // TPM1 CH1
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PWM_9 = (2 << TPM_SHIFT) | (0), // TPM2 CH0
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PWM_10 = (2 << TPM_SHIFT) | (1) // TPM2 CH1
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} PWMName;
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typedef enum {
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ADC0_SE0 = 0,
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ADC0_SE2 = 2,
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ADC0_SE3 = 3,
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ADC0_SE4b = 4,
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ADC0_SE5b = 5,
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ADC0_SE6b = 6,
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ADC0_SE7b = 7,
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ADC0_SE8 = 8,
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ADC0_SE9 = 9,
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ADC0_SE11 = 11,
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ADC0_SE12 = 12,
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ADC0_SE13 = 13,
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ADC0_SE14 = 14,
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ADC0_SE15 = 15,
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ADC0_SE23 = 23
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ADC0_SE10 = 4,
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ADC0_SE11 = 5,
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ADC0_SE12 = 6,
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ADC0_SE13 = 7
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} ADCName;
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typedef enum {
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DAC_0 = 0
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} DACName;
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typedef enum {
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SPI_0 = (int)SPI0_BASE
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} SPIName;
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@ -20,20 +20,12 @@
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#include "error.h"
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static const PinMap PinMap_ADC[] = {
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{PTE20, ADC0_SE0, 0},
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{PTE22, ADC0_SE3, 0},
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{PTE29, ADC0_SE4b, 0},
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{PTE30, ADC0_SE23, 0},
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{PTB0, ADC0_SE8, 0},
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{PTB1, ADC0_SE9, 0},
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{PTB2, ADC0_SE12, 0},
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{PTB3, ADC0_SE13, 0},
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{PTC0, ADC0_SE14, 0},
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{PTC1, ADC0_SE15, 0},
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{PTC2, ADC0_SE11, 0},
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{PTD1, ADC0_SE5b, 0},
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{PTD5, ADC0_SE6b, 0},
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{PTD6, ADC0_SE7b, 0},
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{PTA0, ADC0_SE12, 0},
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{PTA8, ADC0_SE3, 0},
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{PTA9, ADC0_SE2, 0},
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{PTB8, ADC0_SE11, 0},
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{PTB9, ADC0_SE10, 0},
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{PTB13, ADC0_SE13, 0},
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{NC, NC, 0}
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};
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@ -22,7 +22,7 @@
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#define RANGE_12BIT 0xFFF
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static const PinMap PinMap_DAC[] = {
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{PTE30, DAC_0, 0},
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{PTB1, DAC_0, 0},
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{NC , NC , 0}
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};
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@ -20,26 +20,26 @@
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#define DEVICE_PORTOUT 1
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#define DEVICE_PORTINOUT 1
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#define DEVICE_INTERRUPTIN 1
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#define DEVICE_INTERRUPTIN 0
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#define DEVICE_ANALOGIN 1
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#define DEVICE_ANALOGOUT 1
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#define DEVICE_SERIAL 1
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#define DEVICE_SERIAL 0
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#define DEVICE_I2C 1
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#define DEVICE_I2CSLAVE 1
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#define DEVICE_I2C 0
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#define DEVICE_I2CSLAVE 0
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#define DEVICE_SPI 1
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#define DEVICE_SPISLAVE 1
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#define DEVICE_SPI 0
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#define DEVICE_SPISLAVE 0
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#define DEVICE_CAN 0
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#define DEVICE_RTC 1
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#define DEVICE_RTC 0
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#define DEVICE_ETHERNET 0
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#define DEVICE_PWMOUT 1
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#define DEVICE_PWMOUT 0
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#define DEVICE_SEMIHOST 1
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#define DEVICE_LOCALFILESYSTEM 0
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@ -19,128 +19,4 @@
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#include "gpio_irq_api.h"
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#include "error.h"
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#define CHANNEL_NUM 64
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static uint32_t channel_ids[CHANNEL_NUM] = {0};
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static gpio_irq_handler irq_handler;
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#define IRQ_DISABLED (0)
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#define IRQ_RAISING_EDGE PORT_PCR_IRQC(9)
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#define IRQ_FALLING_EDGE PORT_PCR_IRQC(10)
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#define IRQ_EITHER_EDGE PORT_PCR_IRQC(11)
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static void handle_interrupt_in(PORT_Type *port, int ch_base) {
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uint32_t mask = 0, i;
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for (i = 0; i < 32; i++) {
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uint32_t pmask = (1 << i);
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if (port->ISFR & pmask) {
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mask |= pmask;
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uint32_t id = channel_ids[ch_base + i];
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if (id == 0) continue;
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FGPIO_Type *gpio;
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gpio_irq_event event = IRQ_NONE;
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switch (port->PCR[i] & PORT_PCR_IRQC_MASK) {
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case IRQ_RAISING_EDGE:
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event = IRQ_RISE;
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break;
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case IRQ_FALLING_EDGE:
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event = IRQ_FALL;
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break;
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case IRQ_EITHER_EDGE:
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/* TODO */
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/* gpio = (port == PORTA) ? (FPTA) : (FPTD);*/
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event = (gpio->PDIR & pmask) ? (IRQ_RISE) : (IRQ_FALL);
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break;
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}
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if (event != IRQ_NONE)
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irq_handler(id, event);
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}
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}
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port->ISFR = mask;
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}
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void gpio_irqA(void) {handle_interrupt_in(PORTA, 0);}
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/* TODO void gpio_irqD(void) {handle_interrupt_in(PORTD, 32);} */
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int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) {
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if (pin == NC) return -1;
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irq_handler = handler;
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obj->port = pin >> PORT_SHIFT;
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obj->pin = (pin & 0x7F) >> 2;
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uint32_t ch_base, vector;
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IRQn_Type irq_n;
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switch (obj->port) {
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case PortA:
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ch_base = 0; irq_n = PORTA_IRQn; vector = (uint32_t)gpio_irqA;
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break;
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/*
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case PortD:
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ch_base = 32; irq_n = PORTD_IRQn; vector = (uint32_t)gpio_irqD;
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break;
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*/
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default:
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error("gpio_irq only supported on port A and D\n");
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break;
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}
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NVIC_SetVector(irq_n, vector);
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NVIC_EnableIRQ(irq_n);
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obj->ch = ch_base + obj->pin;
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channel_ids[obj->ch] = id;
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return 0;
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}
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void gpio_irq_free(gpio_irq_t *obj) {
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channel_ids[obj->ch] = 0;
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}
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void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) {
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PORT_Type *port = (PORT_Type *)(PORTA_BASE + 0x1000 * obj->port);
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uint32_t irq_settings = IRQ_DISABLED;
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switch (port->PCR[obj->pin] & PORT_PCR_IRQC_MASK) {
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case IRQ_DISABLED:
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if (enable) {
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irq_settings = (event == IRQ_RISE) ? (IRQ_RAISING_EDGE) : (IRQ_FALLING_EDGE);
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}
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break;
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case IRQ_RAISING_EDGE:
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if (enable) {
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irq_settings = (event == IRQ_RISE) ? (IRQ_RAISING_EDGE) : (IRQ_EITHER_EDGE);
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} else {
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if (event == IRQ_FALL)
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irq_settings = IRQ_RAISING_EDGE;
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}
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break;
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case IRQ_FALLING_EDGE:
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if (enable) {
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irq_settings = (event == IRQ_FALL) ? (IRQ_FALLING_EDGE) : (IRQ_EITHER_EDGE);
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} else {
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if (event == IRQ_RISE)
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irq_settings = IRQ_FALLING_EDGE;
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}
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break;
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case IRQ_EITHER_EDGE:
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if (enable) {
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irq_settings = IRQ_EITHER_EDGE;
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} else {
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irq_settings = (event == IRQ_RISE) ? (IRQ_FALLING_EDGE) : (IRQ_RAISING_EDGE);
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}
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break;
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}
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// Interrupt configuration and clear interrupt
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port->PCR[obj->pin] = (port->PCR[obj->pin] & ~PORT_PCR_IRQC_MASK) | irq_settings | PORT_PCR_ISF_MASK;
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}
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@ -18,389 +18,3 @@
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#include "cmsis.h"
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#include "pinmap.h"
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#include "error.h"
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static const PinMap PinMap_I2C_SDA[] = {
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{PTE25, I2C_0, 5},
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{PTC9, I2C_0, 2},
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/* {PTE0, I2C_1, 6},*/
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{PTB1, I2C_0, 2},
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{PTB3, I2C_0, 2},
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{NC , NC , 0}
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};
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static const PinMap PinMap_I2C_SCL[] = {
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{PTE24, I2C_0, 5},
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{PTC8, I2C_0, 2},
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/* {PTE1, I2C_1, 6},*/
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{PTB0, I2C_0, 2},
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{PTB2, I2C_0, 2},
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{NC , NC, 0}
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};
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static const uint16_t ICR[0x40] = {
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20, 22, 24, 26, 28,
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30, 34, 40, 28, 32,
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36, 40, 44, 48, 56,
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68, 48, 56, 64, 72,
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80, 88, 104, 128, 80,
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96, 112, 128, 144, 160,
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192, 240, 160, 192, 224,
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256, 288, 320, 384, 480,
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320, 384, 448, 512, 576,
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640, 768, 960, 640, 768,
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896, 1024, 1152, 1280, 1536,
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1920, 1280, 1536, 1792, 2048,
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2304, 2560, 3072, 3840
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};
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static uint8_t first_read;
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void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
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// determine the I2C to use
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I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
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I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
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obj->i2c = (I2C_Type*)pinmap_merge(i2c_sda, i2c_scl);
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if ((int)obj->i2c == NC) {
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error("I2C pin mapping failed");
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}
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// enable power
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switch ((int)obj->i2c) {
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case I2C_0: SIM->SCGC5 |= 1 << 13; SIM->SCGC4 |= 1 << 6; break;
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/*case I2C_1: SIM->SCGC5 |= 1 << 11; SIM->SCGC4 |= 1 << 7; break;*/
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}
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// set default frequency at 100k
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i2c_frequency(obj, 100000);
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// enable I2C interface
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obj->i2c->C1 |= 0x80;
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pinmap_pinout(sda, PinMap_I2C_SDA);
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pinmap_pinout(scl, PinMap_I2C_SCL);
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first_read = 1;
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}
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int i2c_start(i2c_t *obj) {
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// if we are in the middle of a transaction
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// activate the repeat_start flag
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if (obj->i2c->S & I2C_S_BUSY_MASK) {
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obj->i2c->C1 |= 0x04;
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} else {
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obj->i2c->C1 |= I2C_C1_MST_MASK;
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obj->i2c->C1 |= I2C_C1_TX_MASK;
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}
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first_read = 1;
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return 0;
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}
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void i2c_stop(i2c_t *obj) {
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volatile uint32_t n = 0;
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obj->i2c->C1 &= ~I2C_C1_MST_MASK;
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obj->i2c->C1 &= ~I2C_C1_TX_MASK;
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// It seems that there are timing problems
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// when there is no waiting time after a STOP.
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// This wait is also included on the samples
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// code provided with the freedom board
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for (n = 0; n < 100; n++) __NOP();
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first_read = 1;
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}
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static int timeout_status_poll(i2c_t *obj, uint32_t mask) {
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uint32_t i, timeout = 1000;
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for (i = 0; i < timeout; i++) {
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if (obj->i2c->S & mask)
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return 0;
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}
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return 1;
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}
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// this function waits the end of a tx transfer and return the status of the transaction:
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// 0: OK ack received
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// 1: OK ack not received
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// 2: failure
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static int i2c_wait_end_tx_transfer(i2c_t *obj) {
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// wait for the interrupt flag
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if (timeout_status_poll(obj, I2C_S_IICIF_MASK)) {
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return 2;
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}
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obj->i2c->S |= I2C_S_IICIF_MASK;
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// wait transfer complete
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if (timeout_status_poll(obj, I2C_S_TCF_MASK)) {
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return 2;
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}
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// check if we received the ACK or not
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return obj->i2c->S & I2C_S_RXAK_MASK ? 1 : 0;
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}
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// this function waits the end of a rx transfer and return the status of the transaction:
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// 0: OK
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// 1: failure
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static int i2c_wait_end_rx_transfer(i2c_t *obj) {
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// wait for the end of the rx transfer
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if (timeout_status_poll(obj, I2C_S_IICIF_MASK)) {
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return 1;
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}
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obj->i2c->S |= I2C_S_IICIF_MASK;
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return 0;
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}
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static void i2c_send_nack(i2c_t *obj) {
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obj->i2c->C1 |= I2C_C1_TXAK_MASK; // NACK
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}
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static void i2c_send_ack(i2c_t *obj) {
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obj->i2c->C1 &= ~I2C_C1_TXAK_MASK; // ACK
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}
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static int i2c_do_write(i2c_t *obj, int value) {
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// write the data
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obj->i2c->D = value;
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// init and wait the end of the transfer
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return i2c_wait_end_tx_transfer(obj);
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}
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static int i2c_do_read(i2c_t *obj, char * data, int last) {
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if (last)
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i2c_send_nack(obj);
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else
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i2c_send_ack(obj);
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*data = (obj->i2c->D & 0xFF);
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// start rx transfer and wait the end of the transfer
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return i2c_wait_end_rx_transfer(obj);
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}
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void i2c_frequency(i2c_t *obj, int hz) {
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uint8_t icr = 0;
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uint8_t mult = 0;
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uint32_t error = 0;
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uint32_t p_error = 0xffffffff;
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uint32_t ref = 0;
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uint8_t i, j;
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// bus clk
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uint32_t PCLK = 24000000u;
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uint32_t pulse = PCLK / (hz * 2);
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// we look for the values that minimize the error
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// test all the MULT values
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for (i = 1; i < 5; i*=2) {
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for (j = 0; j < 0x40; j++) {
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ref = PCLK / (i*ICR[j]);
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error = (ref > hz) ? ref - hz : hz - ref;
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if (error < p_error) {
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icr = j;
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mult = i/2;
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p_error = error;
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}
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}
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}
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pulse = icr | (mult << 6);
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// I2C Rate
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obj->i2c->F = pulse;
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}
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|
||||
int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
|
||||
uint8_t count;
|
||||
char dummy_read, *ptr;
|
||||
|
||||
if (i2c_start(obj)) {
|
||||
i2c_stop(obj);
|
||||
return 1;
|
||||
}
|
||||
|
||||
if (i2c_do_write(obj, (address | 0x01))) {
|
||||
i2c_stop(obj);
|
||||
return 1;
|
||||
}
|
||||
|
||||
// set rx mode
|
||||
obj->i2c->C1 &= ~I2C_C1_TX_MASK;
|
||||
|
||||
// Read in bytes
|
||||
for (count = 0; count < (length); count++) {
|
||||
ptr = (count == 0) ? &dummy_read : &data[count - 1];
|
||||
uint8_t stop_ = (count == (length - 1)) ? 1 : 0;
|
||||
if (i2c_do_read(obj, ptr, stop_)) {
|
||||
i2c_stop(obj);
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
|
||||
// If not repeated start, send stop.
|
||||
if (stop) {
|
||||
i2c_stop(obj);
|
||||
}
|
||||
|
||||
// last read
|
||||
data[count-1] = obj->i2c->D;
|
||||
|
||||
return 0;
|
||||
}
|
||||
int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
|
||||
int i;
|
||||
|
||||
if (i2c_start(obj)) {
|
||||
i2c_stop(obj);
|
||||
return 1;
|
||||
}
|
||||
|
||||
if (i2c_do_write(obj, (address & 0xFE))) {
|
||||
i2c_stop(obj);
|
||||
return 1;
|
||||
}
|
||||
|
||||
for (i = 0; i < length; i++) {
|
||||
if(i2c_do_write(obj, data[i])) {
|
||||
i2c_stop(obj);
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
|
||||
if (stop) {
|
||||
i2c_stop(obj);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void i2c_reset(i2c_t *obj) {
|
||||
i2c_stop(obj);
|
||||
}
|
||||
|
||||
int i2c_byte_read(i2c_t *obj, int last) {
|
||||
char data;
|
||||
|
||||
// set rx mode
|
||||
obj->i2c->C1 &= ~I2C_C1_TX_MASK;
|
||||
|
||||
if(first_read) {
|
||||
// first dummy read
|
||||
i2c_do_read(obj, &data, 0);
|
||||
first_read = 0;
|
||||
}
|
||||
|
||||
if (last) {
|
||||
// set tx mode
|
||||
obj->i2c->C1 |= I2C_C1_TX_MASK;
|
||||
return obj->i2c->D;
|
||||
}
|
||||
|
||||
i2c_do_read(obj, &data, last);
|
||||
|
||||
return data;
|
||||
}
|
||||
|
||||
int i2c_byte_write(i2c_t *obj, int data) {
|
||||
first_read = 1;
|
||||
|
||||
// set tx mode
|
||||
obj->i2c->C1 |= I2C_C1_TX_MASK;
|
||||
|
||||
return !i2c_do_write(obj, (data & 0xFF));
|
||||
}
|
||||
|
||||
|
||||
#if DEVICE_I2CSLAVE
|
||||
void i2c_slave_mode(i2c_t *obj, int enable_slave) {
|
||||
if (enable_slave) {
|
||||
// set slave mode
|
||||
obj->i2c->C1 &= ~I2C_C1_MST_MASK;
|
||||
obj->i2c->C1 |= I2C_C1_IICIE_MASK;
|
||||
} else {
|
||||
// set master mode
|
||||
obj->i2c->C1 |= I2C_C1_MST_MASK;
|
||||
}
|
||||
}
|
||||
|
||||
int i2c_slave_receive(i2c_t *obj) {
|
||||
switch(obj->i2c->S) {
|
||||
// read addressed
|
||||
case 0xE6: return 1;
|
||||
|
||||
// write addressed
|
||||
case 0xE2: return 3;
|
||||
|
||||
default: return 0;
|
||||
}
|
||||
}
|
||||
|
||||
int i2c_slave_read(i2c_t *obj, char *data, int length) {
|
||||
uint8_t dummy_read, count;
|
||||
uint8_t * ptr;
|
||||
|
||||
// set rx mode
|
||||
obj->i2c->C1 &= ~I2C_C1_TX_MASK;
|
||||
|
||||
// first dummy read
|
||||
dummy_read = obj->i2c->D;
|
||||
if(i2c_wait_end_rx_transfer(obj)) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
// read address
|
||||
dummy_read = obj->i2c->D;
|
||||
if(i2c_wait_end_rx_transfer(obj)) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
// read (length - 1) bytes
|
||||
for (count = 0; count < (length - 1); count++) {
|
||||
data[count] = obj->i2c->D;
|
||||
if(i2c_wait_end_rx_transfer(obj)) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
// read last byte
|
||||
ptr = (length == 0) ? &dummy_read : (uint8_t *)&data[count];
|
||||
*ptr = obj->i2c->D;
|
||||
|
||||
return (length) ? (count + 1) : 0;
|
||||
}
|
||||
|
||||
int i2c_slave_write(i2c_t *obj, const char *data, int length) {
|
||||
uint32_t i, count = 0;
|
||||
|
||||
// set tx mode
|
||||
obj->i2c->C1 |= I2C_C1_TX_MASK;
|
||||
|
||||
for (i = 0; i < length; i++) {
|
||||
if(i2c_do_write(obj, data[count++]) == 2) {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
// set rx mode
|
||||
obj->i2c->C1 &= ~I2C_C1_TX_MASK;
|
||||
|
||||
// dummy rx transfer needed
|
||||
// otherwise the master cannot generate a stop bit
|
||||
obj->i2c->D;
|
||||
if(i2c_wait_end_rx_transfer(obj) == 2) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
return count;
|
||||
}
|
||||
|
||||
void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) {
|
||||
obj->i2c->A1 = address & 0xfe;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
|
|||
|
|
@ -18,104 +18,3 @@
|
|||
#include "cmsis.h"
|
||||
#include "pinmap.h"
|
||||
#include "error.h"
|
||||
|
||||
static const PinMap PinMap_PWM[] = {
|
||||
// LEDs
|
||||
{LED_RED , PWM_9 , 3}, // PTB18, TPM2 CH0
|
||||
{LED_GREEN, PWM_10, 3}, // PTB19, TPM2 CH1
|
||||
{LED_BLUE , PWM_2 , 4}, // PTD1 , TPM0 CH1
|
||||
|
||||
// Arduino digital pinout
|
||||
{D0, PWM_9 , 3}, // PTA1 , TPM2 CH0
|
||||
{D1, PWM_10, 3}, // PTA2 , TPM2 CH1
|
||||
{D2, PWM_5 , 4}, // PTD4 , TPM0 CH4
|
||||
{D3, PWM_7 , 3}, // PTA12, TPM1 CH0
|
||||
{D4, PWM_2 , 3}, // PTA4 , TPM0 CH1
|
||||
{D5, PWM_3 , 3}, // PTA5 , TPM0 CH2
|
||||
{D6, PWM_5 , 3}, // PTC8 , TPM0 CH4
|
||||
{D7, PWM_6 , 3}, // PTC9 , TPM0 CH5
|
||||
{D8, PWM_8 , 3}, // PTA13, TPM1 CH1
|
||||
{D9, PWM_6 , 4}, // PTD5 , TPM0 CH5
|
||||
{D10, PWM_1 , 4}, // PTD0 , TPM0 CH0
|
||||
{D11, PWM_3 , 4}, // PTD2 , TPM0 CH2
|
||||
{D12, PWM_4 , 4}, // PTD3 , TPM0 CH3
|
||||
{D13, PWM_2 , 4}, // PTD1 , TPM0 CH1
|
||||
{NC , NC , 0}
|
||||
};
|
||||
|
||||
#define PWM_CLOCK_MHZ (0.75) // (48)MHz / 64 = (0.75)MHz
|
||||
|
||||
void pwmout_init(pwmout_t* obj, PinName pin) {
|
||||
// determine the channel
|
||||
PWMName pwm = (PWMName)pinmap_peripheral(pin, PinMap_PWM);
|
||||
if (pwm == (uint32_t)NC)
|
||||
error("PwmOut pin mapping failed");
|
||||
|
||||
unsigned int port = (unsigned int)pin >> PORT_SHIFT;
|
||||
unsigned int tpm_n = (pwm >> TPM_SHIFT);
|
||||
unsigned int ch_n = (pwm & 0xFF);
|
||||
|
||||
SIM->SCGC5 |= 1 << (SIM_SCGC5_PORTA_SHIFT + port);
|
||||
SIM->SCGC6 |= 1 << (SIM_SCGC6_TPM0_SHIFT + tpm_n);
|
||||
SIM->SOPT2 |= SIM_SOPT2_TPMSRC(1); // Clock source: MCGFLLCLK or MCGPLLCLK
|
||||
|
||||
TPM_Type *tpm = (TPM_Type *)(TPM0_BASE + 0x1000 * tpm_n);
|
||||
tpm->SC = TPM_SC_CMOD(1) | TPM_SC_PS(6); // (48)MHz / 64 = (0.75)MHz
|
||||
tpm->CONTROLS[ch_n].CnSC = (TPM_CnSC_MSB_MASK | TPM_CnSC_ELSB_MASK); /* No Interrupts; High True pulses on Edge Aligned PWM */
|
||||
|
||||
obj->CnV = &tpm->CONTROLS[ch_n].CnV;
|
||||
obj->MOD = &tpm->MOD;
|
||||
obj->CNT = &tpm->CNT;
|
||||
|
||||
// default to 20ms: standard for servos, and fine for e.g. brightness control
|
||||
pwmout_period_ms(obj, 20);
|
||||
pwmout_write (obj, 0);
|
||||
|
||||
// Wire pinout
|
||||
pinmap_pinout(pin, PinMap_PWM);
|
||||
}
|
||||
|
||||
void pwmout_free(pwmout_t* obj) {}
|
||||
|
||||
void pwmout_write(pwmout_t* obj, float value) {
|
||||
if (value < 0.0) {
|
||||
value = 0.0;
|
||||
} else if (value > 1.0) {
|
||||
value = 1.0;
|
||||
}
|
||||
|
||||
*obj->CnV = (uint32_t)((float)(*obj->MOD) * value);
|
||||
*obj->CNT = 0;
|
||||
}
|
||||
|
||||
float pwmout_read(pwmout_t* obj) {
|
||||
float v = (float)(*obj->CnV) / (float)(*obj->MOD);
|
||||
return (v > 1.0) ? (1.0) : (v);
|
||||
}
|
||||
|
||||
void pwmout_period(pwmout_t* obj, float seconds) {
|
||||
pwmout_period_us(obj, seconds * 1000000.0f);
|
||||
}
|
||||
|
||||
void pwmout_period_ms(pwmout_t* obj, int ms) {
|
||||
pwmout_period_us(obj, ms * 1000);
|
||||
}
|
||||
|
||||
// Set the PWM period, keeping the duty cycle the same.
|
||||
void pwmout_period_us(pwmout_t* obj, int us) {
|
||||
float dc = pwmout_read(obj);
|
||||
*obj->MOD = PWM_CLOCK_MHZ * us;
|
||||
pwmout_write(obj, dc);
|
||||
}
|
||||
|
||||
void pwmout_pulsewidth(pwmout_t* obj, float seconds) {
|
||||
pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
|
||||
}
|
||||
|
||||
void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) {
|
||||
pwmout_pulsewidth_us(obj, ms * 1000);
|
||||
}
|
||||
|
||||
void pwmout_pulsewidth_us(pwmout_t* obj, int us) {
|
||||
*obj->CnV = PWM_CLOCK_MHZ * us;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -17,62 +17,6 @@
|
|||
|
||||
#if DEVICE_RTC
|
||||
|
||||
static void init(void) {
|
||||
/* TODO */
|
||||
}
|
||||
|
||||
void rtc_init(void) {
|
||||
init();
|
||||
|
||||
//Configure the TSR. default value: 1
|
||||
RTC->TSR = 1;
|
||||
|
||||
// enable counter
|
||||
RTC->SR |= RTC_SR_TCE_MASK;
|
||||
}
|
||||
|
||||
void rtc_free(void) {
|
||||
// [TODO]
|
||||
}
|
||||
|
||||
/*
|
||||
* Little check routine to see if the RTC has been enabled
|
||||
* 0 = Disabled, 1 = Enabled
|
||||
*/
|
||||
int rtc_isenabled(void) {
|
||||
// even if the RTC module is enabled,
|
||||
// as we use RTC_CLKIN and an external clock,
|
||||
// we need to reconfigure the pins. That is why we
|
||||
// call init() if the rtc is enabled
|
||||
|
||||
// if RTC not enabled return 0
|
||||
/* SIM->SCGC5 |= SIM_SCGC5_PORTC_MASK;*/
|
||||
SIM->SCGC6 |= SIM_SCGC6_RTC_MASK;
|
||||
if ((RTC->SR & RTC_SR_TCE_MASK) == 0)
|
||||
return 0;
|
||||
|
||||
init();
|
||||
return 1;
|
||||
}
|
||||
|
||||
time_t rtc_read(void) {
|
||||
return RTC->TSR;
|
||||
}
|
||||
|
||||
void rtc_write(time_t t) {
|
||||
// disable counter
|
||||
RTC->SR &= ~RTC_SR_TCE_MASK;
|
||||
|
||||
// we do not write 0 into TSR
|
||||
// to avoid invalid time
|
||||
if (t == 0)
|
||||
t = 1;
|
||||
|
||||
// write seconds
|
||||
RTC->TSR = t;
|
||||
|
||||
// re-enable counter
|
||||
RTC->SR |= RTC_SR_TCE_MASK;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -24,95 +24,3 @@
|
|||
#include "pinmap.h"
|
||||
#include "error.h"
|
||||
|
||||
/******************************************************************************
|
||||
* INITIALIZATION
|
||||
******************************************************************************/
|
||||
static const PinMap PinMap_UART_TX[] = {
|
||||
|
||||
};
|
||||
|
||||
static const PinMap PinMap_UART_RX[] = {
|
||||
|
||||
};
|
||||
|
||||
#define UART_NUM 3
|
||||
static uint32_t serial_irq_ids[UART_NUM] = {0};
|
||||
static uart_irq_handler irq_handler;
|
||||
|
||||
int stdio_uart_inited = 0;
|
||||
serial_t stdio_uart;
|
||||
|
||||
void serial_init(serial_t *obj, PinName tx, PinName rx) {
|
||||
|
||||
}
|
||||
|
||||
void serial_free(serial_t *obj) {
|
||||
|
||||
}
|
||||
|
||||
// serial_baud
|
||||
//
|
||||
// set the baud rate, taking in to account the current SystemFrequency
|
||||
//
|
||||
// The LPC2300 and LPC1700 have a divider and a fractional divider to control the
|
||||
// baud rate. The formula is:
|
||||
//
|
||||
// Baudrate = (1 / PCLK) * 16 * DL * (1 + DivAddVal / MulVal)
|
||||
// where:
|
||||
// 1 < MulVal <= 15
|
||||
// 0 <= DivAddVal < 14
|
||||
// DivAddVal < MulVal
|
||||
//
|
||||
void serial_baud(serial_t *obj, int baudrate) {
|
||||
|
||||
|
||||
}
|
||||
|
||||
void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
|
||||
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
* INTERRUPTS HANDLING
|
||||
******************************************************************************/
|
||||
static inline void uart_irq(uint8_t status, uint32_t index) {
|
||||
|
||||
}
|
||||
|
||||
void uart0_irq() {
|
||||
|
||||
}
|
||||
|
||||
void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
|
||||
|
||||
}
|
||||
|
||||
void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
|
||||
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
* READ/WRITE
|
||||
******************************************************************************/
|
||||
int serial_getc(serial_t *obj) {
|
||||
|
||||
}
|
||||
|
||||
void serial_putc(serial_t *obj, int c) {
|
||||
|
||||
}
|
||||
|
||||
int serial_readable(serial_t *obj) {
|
||||
|
||||
}
|
||||
|
||||
int serial_writable(serial_t *obj) {
|
||||
|
||||
}
|
||||
|
||||
void serial_clear(serial_t *obj) {
|
||||
}
|
||||
|
||||
void serial_pinout_tx(PinName tx) {
|
||||
|
||||
}
|
||||
|
|
|
|||
|
|
@ -20,151 +20,3 @@
|
|||
#include "cmsis.h"
|
||||
#include "pinmap.h"
|
||||
#include "error.h"
|
||||
|
||||
static const PinMap PinMap_SPI_SCLK[] = {
|
||||
{PTC5, SPI_0, 2},
|
||||
{PTD1, SPI_0, 2},
|
||||
{NC , NC , 0}
|
||||
};
|
||||
|
||||
static const PinMap PinMap_SPI_MOSI[] = {
|
||||
{PTC6, SPI_0, 2},
|
||||
{PTD2, SPI_0, 2},
|
||||
{NC , NC , 0}
|
||||
};
|
||||
|
||||
static const PinMap PinMap_SPI_MISO[] = {
|
||||
{PTC7, SPI_0, 2},
|
||||
{PTD3, SPI_0, 2},
|
||||
{NC , NC , 0}
|
||||
};
|
||||
|
||||
static const PinMap PinMap_SPI_SSEL[] = {
|
||||
{PTC4, SPI_0, 2},
|
||||
{PTD0, SPI_0, 2},
|
||||
{NC , NC , 0}
|
||||
};
|
||||
|
||||
void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
|
||||
// determine the SPI to use
|
||||
SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
|
||||
SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
|
||||
SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
|
||||
SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL);
|
||||
SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
|
||||
SPIName spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
|
||||
|
||||
obj->spi = (SPI_Type*)pinmap_merge(spi_data, spi_cntl);
|
||||
if ((int)obj->spi == NC) {
|
||||
error("SPI pinout mapping failed");
|
||||
}
|
||||
|
||||
// enable power and clocking
|
||||
switch ((int)obj->spi) {
|
||||
case SPI_0: SIM->SCGC5 |= 1 << 11; SIM->SCGC4 |= 1 << 22; break;
|
||||
}
|
||||
|
||||
// set default format and frequency
|
||||
if (ssel == NC) {
|
||||
spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master
|
||||
} else {
|
||||
spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave
|
||||
}
|
||||
spi_frequency(obj, 1000000);
|
||||
|
||||
// enable SPI
|
||||
obj->spi->C1 |= SPI_C1_SPE_MASK;
|
||||
|
||||
// pin out the spi pins
|
||||
pinmap_pinout(mosi, PinMap_SPI_MOSI);
|
||||
pinmap_pinout(miso, PinMap_SPI_MISO);
|
||||
pinmap_pinout(sclk, PinMap_SPI_SCLK);
|
||||
if (ssel != NC) {
|
||||
pinmap_pinout(ssel, PinMap_SPI_SSEL);
|
||||
}
|
||||
}
|
||||
|
||||
void spi_free(spi_t *obj) {
|
||||
// [TODO]
|
||||
}
|
||||
void spi_format(spi_t *obj, int bits, int mode, int slave) {
|
||||
if (bits != 8) {
|
||||
error("Only 8bits SPI supported");
|
||||
}
|
||||
|
||||
if ((mode < 0) || (mode > 3)) {
|
||||
error("SPI mode unsupported");
|
||||
}
|
||||
|
||||
uint8_t polarity = (mode & 0x2) ? 1 : 0;
|
||||
uint8_t phase = (mode & 0x1) ? 1 : 0;
|
||||
uint8_t c1_data = ((!slave) << 4) | (polarity << 3) | (phase << 2);
|
||||
|
||||
// clear MSTR, CPOL and CPHA bits
|
||||
obj->spi->C1 &= ~(0x7 << 2);
|
||||
|
||||
// write new value
|
||||
obj->spi->C1 |= c1_data;
|
||||
}
|
||||
|
||||
void spi_frequency(spi_t *obj, int hz) {
|
||||
uint32_t error = 0;
|
||||
uint32_t p_error = 0xffffffff;
|
||||
uint32_t ref = 0;
|
||||
uint8_t spr = 0;
|
||||
uint8_t ref_spr = 0;
|
||||
uint8_t ref_prescaler = 0;
|
||||
|
||||
// bus clk
|
||||
uint32_t PCLK = 48000000u;
|
||||
uint8_t prescaler = 1;
|
||||
uint8_t divisor = 2;
|
||||
|
||||
for (prescaler = 1; prescaler <= 8; prescaler++) {
|
||||
divisor = 2;
|
||||
for (spr = 0; spr <= 8; spr++) {
|
||||
ref = PCLK / (prescaler*divisor);
|
||||
error = (ref > hz) ? ref - hz : hz - ref;
|
||||
if (error < p_error) {
|
||||
ref_spr = spr;
|
||||
ref_prescaler = prescaler - 1;
|
||||
p_error = error;
|
||||
}
|
||||
divisor *= 2;
|
||||
}
|
||||
}
|
||||
|
||||
// set SPPR and SPR
|
||||
obj->spi->BR = ((ref_prescaler & 0x7) << 4) | (ref_spr & 0xf);
|
||||
}
|
||||
|
||||
static inline int spi_writeable(spi_t * obj) {
|
||||
return (obj->spi->S & SPI_S_SPTEF_MASK) ? 1 : 0;
|
||||
}
|
||||
|
||||
static inline int spi_readable(spi_t * obj) {
|
||||
return (obj->spi->S & SPI_S_SPRF_MASK) ? 1 : 0;
|
||||
}
|
||||
|
||||
int spi_master_write(spi_t *obj, int value) {
|
||||
// wait tx buffer empty
|
||||
while(!spi_writeable(obj));
|
||||
obj->spi->D = (value & 0xff);
|
||||
|
||||
// wait rx buffer full
|
||||
while (!spi_readable(obj));
|
||||
return obj->spi->D & 0xff;
|
||||
}
|
||||
|
||||
int spi_slave_receive(spi_t *obj) {
|
||||
return spi_readable(obj);
|
||||
}
|
||||
|
||||
int spi_slave_read(spi_t *obj) {
|
||||
return obj->spi->D;
|
||||
}
|
||||
|
||||
void spi_slave_write(spi_t *obj, int value) {
|
||||
while (!spi_writeable(obj));
|
||||
obj->spi->D = value;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -17,10 +17,15 @@
|
|||
#include "us_ticker_api.h"
|
||||
#include "PeripheralNames.h"
|
||||
|
||||
/* Prototypes */
|
||||
static void pit_init(void);
|
||||
static void lptmr_init(void);
|
||||
|
||||
static int us_ticker_inited = 0;
|
||||
/* Global variables */
|
||||
static uint32_t us_ticker_inited = 0;
|
||||
static uint32_t us_ticker_int_counter = 0;
|
||||
static uint16_t us_ticker_int_remainder = 0;
|
||||
|
||||
|
||||
void us_ticker_init(void) {
|
||||
if (us_ticker_inited) return;
|
||||
|
|
@ -88,9 +93,6 @@ void us_ticker_clear_interrupt(void) {
|
|||
// we already clear interrupt in lptmr_isr
|
||||
}
|
||||
|
||||
static uint32_t us_ticker_int_counter = 0;
|
||||
static uint16_t us_ticker_int_remainder = 0;
|
||||
|
||||
static void lptmr_set(unsigned short count) {
|
||||
/* Reset */
|
||||
LPTMR0->CSR = 0;
|
||||
|
|
@ -125,8 +127,8 @@ static void lptmr_isr(void) {
|
|||
}
|
||||
}
|
||||
|
||||
void us_ticker_set_interrupt(unsigned int timestamp) {
|
||||
int delta = (int)(timestamp - us_ticker_read());
|
||||
void us_ticker_set_interrupt(uint32_t timestamp) {
|
||||
int32_t delta = (int32_t)(timestamp - us_ticker_read());
|
||||
if (delta <= 0) {
|
||||
// This event was in the past:
|
||||
us_ticker_irq_handler();
|
||||
|
|
|
|||
Loading…
Reference in New Issue