Fix ITM on NRF52 series

The ITM must be initialized before the SoftDevice, but due to the
lazy initialization in C++ on (at least) GCC the ITM init call
might happen too late.

This commit moves the initialization code into the NRF52 system
startup file.

targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/system_nrf52.c

@@ -216,6 +216,29 @@ void SystemInit(void)
     while (NRF_CLOCK->EVENTS_LFCLKSTARTED == 0) {
         // Do nothing.
     }
+
+    /**
+     * Mbed HAL specific code section.
+     *
+     * The ITM has to be initialized before the SoftDevice which weren't guaranteed using the normal API.
+     */
+    #if defined (DEVICE_ITM)
+        /* Enable SWO trace functionality */
+        CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
+        NRF_CLOCK->TRACECONFIG |= CLOCK_TRACECONFIG_TRACEMUX_Serial << CLOCK_TRACECONFIG_TRACEMUX_Pos;
+
+        /* set SWO clock speed to 4 MHz */
+        NRF_CLOCK->TRACECONFIG = (NRF_CLOCK->TRACECONFIG & ~CLOCK_TRACECONFIG_TRACEPORTSPEED_Msk) |
+                                 (CLOCK_TRACECONFIG_TRACEPORTSPEED_4MHz << CLOCK_TRACECONFIG_TRACEPORTSPEED_Pos);
+
+        /* set SWO pin */
+        NRF_P0->PIN_CNF[18] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) |
+                              (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) |
+                              (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+
+        /* set prescaler */
+        TPI->ACPR = 0;
+    #endif
 }
 
 

targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/system_nrf52840.c

@@ -192,6 +192,29 @@ void SystemInit(void)
     while (NRF_CLOCK->EVENTS_LFCLKSTARTED == 0) {
         // Do nothing.
     }
+
+    /**
+     * Mbed HAL specific code section.
+     *
+     * The ITM has to be initialized before the SoftDevice which weren't guaranteed using the normal API.
+     */
+    #if defined (DEVICE_ITM)
+        /* Enable SWO trace functionality */
+        CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
+        NRF_CLOCK->TRACECONFIG |= CLOCK_TRACECONFIG_TRACEMUX_Serial << CLOCK_TRACECONFIG_TRACEMUX_Pos;
+
+        /* set SWO clock speed to 4 MHz */
+        NRF_CLOCK->TRACECONFIG = (NRF_CLOCK->TRACECONFIG & ~CLOCK_TRACECONFIG_TRACEPORTSPEED_Msk) |
+                                 (CLOCK_TRACECONFIG_TRACEPORTSPEED_4MHz << CLOCK_TRACECONFIG_TRACEPORTSPEED_Pos);
+
+        /* set SWO pin */
+        NRF_P0->PIN_CNF[18] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) |
+                              (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) |
+                              (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+
+        /* set prescaler */
+        TPI->ACPR = 0;
+    #endif
 }
 
 

targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/itm_api.c

@@ -18,27 +18,11 @@
 
 #include "hal/itm_api.h"
 
-#include "nrf.h"
-#include "nrf5x_lf_clk_helper.h"
-
-/* SWO frequency: 4000 kHz */
 void itm_init(void)
 {
-    /* Enable SWO trace functionality */
+    /**
-    CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
+     * Initialization moved to system_nrf52840.c due to SoftDevice incompatibility.
-    NRF_CLOCK->TRACECONFIG |= CLOCK_TRACECONFIG_TRACEMUX_Serial << CLOCK_TRACECONFIG_TRACEMUX_Pos;
+     */
-
-    /* set SWO clock speed to 4 MHz */
-    NRF_CLOCK->TRACECONFIG = (NRF_CLOCK->TRACECONFIG & ~CLOCK_TRACECONFIG_TRACEPORTSPEED_Msk) | 
-                             (CLOCK_TRACECONFIG_TRACEPORTSPEED_4MHz << CLOCK_TRACECONFIG_TRACEPORTSPEED_Pos);
-
-    /* set SWO pin */
-    NRF_P0->PIN_CNF[18] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | 
-                          (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | 
-                          (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
-
-    /* set prescaler */
-    TPI->ACPR = 0;
 }
 
 #endif