diff --git a/features/FEATURE_BLE/ble/BLEInstanceBase.h b/features/FEATURE_BLE/ble/BLEInstanceBase.h index 6f080c45d3..d7ff34cb71 100644 --- a/features/FEATURE_BLE/ble/BLEInstanceBase.h +++ b/features/FEATURE_BLE/ble/BLEInstanceBase.h @@ -246,7 +246,7 @@ public: private: // this class is not a value type. - // prohibit copy construction and copy assignment + // prohibit copy construction and copy assignement BLEInstanceBase(const BLEInstanceBase&); BLEInstanceBase &operator=(const BLEInstanceBase&); }; diff --git a/features/FEATURE_BLE/ble/pal/AttClient.h b/features/FEATURE_BLE/ble/pal/AttClient.h index 678f99562c..56bd1a2f06 100644 --- a/features/FEATURE_BLE/ble/pal/AttClient.h +++ b/features/FEATURE_BLE/ble/pal/AttClient.h @@ -75,7 +75,7 @@ struct AttClient { * The mtu choosen for the connection is the minimum of the client Rx mtu * and server Rx mtu values. * - * If an error occurred then the mtu used remains the default value. + * If an error occured then the mtu used remains the default value. * * @param connection The handle of the connection to send this request to. * diff --git a/features/FEATURE_BLE/ble/pal/GapEvents.h b/features/FEATURE_BLE/ble/pal/GapEvents.h index 47cc2423dc..a406d6cdcc 100644 --- a/features/FEATURE_BLE/ble/pal/GapEvents.h +++ b/features/FEATURE_BLE/ble/pal/GapEvents.h @@ -75,7 +75,7 @@ struct GapEvent { protected: GapEvent(GapEventType type) : type(type) { } - // Disable copy construction and copy assignment operations. + // Disable copy construction and copy assignement operations. GapEvent(const GapEvent&); GapEvent& operator=(const GapEvent&); }; diff --git a/features/FEATURE_BLE/targets/TARGET_CORDIO/stack/cordio_stack/ws-core/sw/wsf/include/wsf_buf.h b/features/FEATURE_BLE/targets/TARGET_CORDIO/stack/cordio_stack/ws-core/sw/wsf/include/wsf_buf.h index 6b27ca73b3..e15476ed4b 100644 --- a/features/FEATURE_BLE/targets/TARGET_CORDIO/stack/cordio_stack/ws-core/sw/wsf/include/wsf_buf.h +++ b/features/FEATURE_BLE/targets/TARGET_CORDIO/stack/cordio_stack/ws-core/sw/wsf/include/wsf_buf.h @@ -63,7 +63,7 @@ typedef struct /*! WSF buffer diagnostics - buffer allocation failure */ typedef struct { - uint8_t taskId; /*! Task handler ID where failure occurred */ + uint8_t taskId; /*! Task handler ID where failure occured */ uint16_t len; /*! Length of buffer being allocated */ } wsfBufDiagAllocFail_t; diff --git a/features/FEATURE_BLE/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/hal_patch/sleep.c b/features/FEATURE_BLE/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/hal_patch/sleep.c index b810e4effd..aec280a0fb 100644 --- a/features/FEATURE_BLE/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/hal_patch/sleep.c +++ b/features/FEATURE_BLE/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/hal_patch/sleep.c @@ -57,7 +57,7 @@ void hal_sleep(void) return; } else { // next event will wakeup the CPU - // If an interrupt occurred between the test of SCB->ICSR and this + // If an interrupt occured between the test of SCB->ICSR and this // instruction, WFE will just not put the CPU to sleep __WFE(); } diff --git a/features/FEATURE_BLE/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/sdk/source/ble/peer_manager/id_manager.c b/features/FEATURE_BLE/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/sdk/source/ble/peer_manager/id_manager.c index 436fc783d1..c2942c84cd 100644 --- a/features/FEATURE_BLE/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/sdk/source/ble/peer_manager/id_manager.c +++ b/features/FEATURE_BLE/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/sdk/source/ble/peer_manager/id_manager.c @@ -359,7 +359,7 @@ bool is_duplicate_bonding_data(pm_peer_data_bonding_t const * p_bonding_data1, /**@brief Event handler for events from the peer_database module. * - * @param[in] p_event The event that has happened with peer id and flags. + * @param[in] p_event The event that has happend with peer id and flags. */ static void pdb_evt_handler(pdb_evt_t const * p_event) { diff --git a/features/FEATURE_BLE/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/sdk/source/libraries/bootloader_dfu/dfu_types.h b/features/FEATURE_BLE/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/sdk/source/libraries/bootloader_dfu/dfu_types.h index f8e8c40b6f..d26b72f7b6 100644 --- a/features/FEATURE_BLE/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/sdk/source/libraries/bootloader_dfu/dfu_types.h +++ b/features/FEATURE_BLE/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/sdk/source/libraries/bootloader_dfu/dfu_types.h @@ -152,10 +152,10 @@ typedef enum typedef struct { dfu_update_status_code_t status_code; /**< Device Firmware Update status. */ - uint16_t app_crc; /**< CRC of the received application. */ - uint32_t sd_size; /**< Size of the received SoftDevice. */ - uint32_t bl_size; /**< Size of the received BootLoader. */ - uint32_t app_size; /**< Size of the received Application. */ + uint16_t app_crc; /**< CRC of the recieved application. */ + uint32_t sd_size; /**< Size of the recieved SoftDevice. */ + uint32_t bl_size; /**< Size of the recieved BootLoader. */ + uint32_t app_size; /**< Size of the recieved Application. */ uint32_t sd_image_start; /**< Location in flash where the received SoftDevice image is stored. */ } dfu_update_status_t; diff --git a/features/FEATURE_BLE/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/sdk/source/softdevice/s130/headers/ble_gap.h b/features/FEATURE_BLE/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/sdk/source/softdevice/s130/headers/ble_gap.h index d5943b8ee5..be91c1df8e 100644 --- a/features/FEATURE_BLE/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/sdk/source/softdevice/s130/headers/ble_gap.h +++ b/features/FEATURE_BLE/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/sdk/source/softdevice/s130/headers/ble_gap.h @@ -721,7 +721,7 @@ typedef struct /**@brief GAP event structure. */ typedef struct { - uint16_t conn_handle; /**< Connection Handle on which event occurred. */ + uint16_t conn_handle; /**< Connection Handle on which event occured. */ union /**< union alternative identified by evt_id in enclosing struct. */ { ble_gap_evt_connected_t connected; /**< Connected Event Parameters. */ @@ -1153,7 +1153,7 @@ SVCALL(SD_BLE_GAP_DEVICE_NAME_GET, uint32_t, sd_ble_gap_device_name_get(uint8_t * @retval ::NRF_ERROR_INVALID_STATE Invalid state to perform operation. * @retval ::NRF_ERROR_BUSY The stack is busy, process pending events and retry. * @retval ::BLE_ERROR_INVALID_CONN_HANDLE Invalid connection handle supplied. - * @retval ::NRF_ERROR_TIMEOUT A SMP timout has occurred, and further SMP operations on this link is prohibited. + * @retval ::NRF_ERROR_TIMEOUT A SMP timout has occured, and further SMP operations on this link is prohibited. */ SVCALL(SD_BLE_GAP_AUTHENTICATE, uint32_t, sd_ble_gap_authenticate(uint16_t conn_handle, ble_gap_sec_params_t const *p_sec_params)); diff --git a/features/FEATURE_BLE/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/sdk/source/softdevice/s130/headers/ble_gattc.h b/features/FEATURE_BLE/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/sdk/source/softdevice/s130/headers/ble_gattc.h index 994ea2035e..bb074ce5cb 100644 --- a/features/FEATURE_BLE/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/sdk/source/softdevice/s130/headers/ble_gattc.h +++ b/features/FEATURE_BLE/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/sdk/source/softdevice/s130/headers/ble_gattc.h @@ -239,7 +239,7 @@ typedef struct /**@brief GATTC event structure. */ typedef struct { - uint16_t conn_handle; /**< Connection Handle on which event occurred. */ + uint16_t conn_handle; /**< Connection Handle on which event occured. */ uint16_t gatt_status; /**< GATT status code for the operation, see @ref BLE_GATT_STATUS_CODES. */ uint16_t error_handle; /**< In case of error: The handle causing the error. In all other cases @ref BLE_GATT_HANDLE_INVALID. */ union diff --git a/features/FEATURE_BLE/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/sdk/source/softdevice/s130/headers/ble_l2cap.h b/features/FEATURE_BLE/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/sdk/source/softdevice/s130/headers/ble_l2cap.h index f8e1e9258d..6e37a39560 100644 --- a/features/FEATURE_BLE/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/sdk/source/softdevice/s130/headers/ble_l2cap.h +++ b/features/FEATURE_BLE/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/sdk/source/softdevice/s130/headers/ble_l2cap.h @@ -107,7 +107,7 @@ typedef struct /**@brief L2CAP event callback event structure. */ typedef struct { - uint16_t conn_handle; /**< Connection Handle on which event occurred. */ + uint16_t conn_handle; /**< Connection Handle on which event occured. */ union { ble_l2cap_evt_rx_t rx; /**< RX Event parameters. */ diff --git a/features/FEATURE_LWIP/lwip-interface/EthernetInterface.h b/features/FEATURE_LWIP/lwip-interface/EthernetInterface.h index 5ef6843adb..61fba64cd2 100644 --- a/features/FEATURE_LWIP/lwip-interface/EthernetInterface.h +++ b/features/FEATURE_LWIP/lwip-interface/EthernetInterface.h @@ -82,21 +82,21 @@ public: /** Get the local IP address * * @return Null-terminated representation of the local IP address - * or null if no IP address has been received + * or null if no IP address has been recieved */ virtual const char *get_ip_address(); /** Get the local network mask * * @return Null-terminated representation of the local network mask - * or null if no network mask has been received + * or null if no network mask has been recieved */ virtual const char *get_netmask(); /** Get the local gateways * * @return Null-terminated representation of the local gateway - * or null if no network mask has been received + * or null if no network mask has been recieved */ virtual const char *get_gateway(); diff --git a/features/FEATURE_LWIP/lwip-interface/lwip-eth/arch/TARGET_NXP/TARGET_LPCTarget/lpc17xx_emac.h b/features/FEATURE_LWIP/lwip-interface/lwip-eth/arch/TARGET_NXP/TARGET_LPCTarget/lpc17xx_emac.h index 6e35c668a0..9979a2560c 100644 --- a/features/FEATURE_LWIP/lwip-interface/lwip-eth/arch/TARGET_NXP/TARGET_LPCTarget/lpc17xx_emac.h +++ b/features/FEATURE_LWIP/lwip-interface/lwip-eth/arch/TARGET_NXP/TARGET_LPCTarget/lpc17xx_emac.h @@ -249,7 +249,7 @@ extern "C" #define EMAC_TSV0_PKT_DEFER 0x00000040 /**< Packet Deferred */ #define EMAC_TSV0_EXC_DEFER 0x00000080 /**< Excessive Packet Deferral */ #define EMAC_TSV0_EXC_COLL 0x00000100 /**< Excessive Collision */ -#define EMAC_TSV0_LATE_COLL 0x00000200 /**< Late Collision Occurred */ +#define EMAC_TSV0_LATE_COLL 0x00000200 /**< Late Collision Occured */ #define EMAC_TSV0_GIANT 0x00000400 /**< Giant Frame */ #define EMAC_TSV0_UNDERRUN 0x00000800 /**< Buffer Underrun */ #define EMAC_TSV0_BYTES 0x0FFFF000 /**< Total Bytes Transferred */ @@ -373,7 +373,7 @@ extern "C" #define EMAC_RINFO_OVERRUN 0x10000000 /**< Receive overrun */ #define EMAC_RINFO_NO_DESCR 0x20000000 /**< No new Descriptor available */ #define EMAC_RINFO_LAST_FLAG 0x40000000 /**< Last Fragment in Frame */ -#define EMAC_RINFO_ERR 0x80000000 /**< Error Occurred (OR of all errors) */ +#define EMAC_RINFO_ERR 0x80000000 /**< Error Occured (OR of all errors) */ #define EMAC_RINFO_ERR_MASK (EMAC_RINFO_FAIL_FILT | EMAC_RINFO_CRC_ERR | EMAC_RINFO_SYM_ERR | \ EMAC_RINFO_LEN_ERR | EMAC_RINFO_ALIGN_ERR | EMAC_RINFO_OVERRUN) @@ -395,10 +395,10 @@ EMAC_RINFO_LEN_ERR | EMAC_RINFO_ALIGN_ERR | EMAC_RINFO_OVERRUN) #define EMAC_TINFO_DEFER 0x02000000 /**< Packet Deferred (not an error) */ #define EMAC_TINFO_EXCESS_DEF 0x04000000 /**< Excessive Deferral */ #define EMAC_TINFO_EXCESS_COL 0x08000000 /**< Excessive Collision */ -#define EMAC_TINFO_LATE_COL 0x10000000 /**< Late Collision Occurred */ +#define EMAC_TINFO_LATE_COL 0x10000000 /**< Late Collision Occured */ #define EMAC_TINFO_UNDERRUN 0x20000000 /**< Transmit Underrun */ #define EMAC_TINFO_NO_DESCR 0x40000000 /**< No new Descriptor available */ -#define EMAC_TINFO_ERR 0x80000000 /**< Error Occurred (OR of all errors) */ +#define EMAC_TINFO_ERR 0x80000000 /**< Error Occured (OR of all errors) */ #ifdef MCB_LPC_1768 /* DP83848C PHY definition ------------------------------------------------------------ */ @@ -417,7 +417,7 @@ EMAC_RINFO_LEN_ERR | EMAC_RINFO_ALIGN_ERR | EMAC_RINFO_OVERRUN) #define EMAC_PHY_REG_IDR1 0x02 /**< PHY Identifier 1 */ #define EMAC_PHY_REG_IDR2 0x03 /**< PHY Identifier 2 */ #define EMAC_PHY_REG_ANAR 0x04 /**< Auto-Negotiation Advertisement */ -#define EMAC_PHY_REG_ANLPAR 0x05 /**< Auto-Neg. Link Partner Ability */ +#define EMAC_PHY_REG_ANLPAR 0x05 /**< Auto-Neg. Link Partner Abitily */ #define EMAC_PHY_REG_ANER 0x06 /**< Auto-Neg. Expansion Register */ #define EMAC_PHY_REG_ANNPTR 0x07 /**< Auto-Neg. Next Page TX */ #define EMAC_PHY_REG_LPNPA 0x08 @@ -504,7 +504,7 @@ EMAC_RINFO_LEN_ERR | EMAC_RINFO_ALIGN_ERR | EMAC_RINFO_OVERRUN) #define EMAC_PHY_REG_IDR1 0x02 /**< PHY Identifier 1 */ #define EMAC_PHY_REG_IDR2 0x03 /**< PHY Identifier 2 */ #define EMAC_PHY_REG_ANAR 0x04 /**< Auto-Negotiation Advertisement */ -#define EMAC_PHY_REG_ANLPAR 0x05 /**< Auto-Neg. Link Partner Ability */ +#define EMAC_PHY_REG_ANLPAR 0x05 /**< Auto-Neg. Link Partner Abitily */ #define EMAC_PHY_REG_ANER 0x06 /**< Auto-Neg. Expansion Register */ #define EMAC_PHY_REG_ANNPTR 0x07 /**< Auto-Neg. Next Page TX */ #define EMAC_PHY_REG_LPNPA 0x08 /**< Link Partner Next Page Ability */ diff --git a/features/FEATURE_LWIP/lwip-interface/lwip/CHANGELOG b/features/FEATURE_LWIP/lwip-interface/lwip/CHANGELOG index bb10408c0f..1a5e27ba8b 100644 --- a/features/FEATURE_LWIP/lwip-interface/lwip/CHANGELOG +++ b/features/FEATURE_LWIP/lwip-interface/lwip/CHANGELOG @@ -3918,7 +3918,7 @@ HISTORY ++ Bug fixes: * Fixed pool pbuf memory leak in pbuf_alloc(). - Occurred if not enough PBUF_POOL pbufs for a packet pbuf chain. + Occured if not enough PBUF_POOL pbufs for a packet pbuf chain. Reported by Savin Zlobec. * PBUF_POOL chains had their tot_len field not set for non-first diff --git a/features/FEATURE_LWIP/lwip-interface/lwip/src/apps/snmp/lwip_snmp_msg.c b/features/FEATURE_LWIP/lwip-interface/lwip/src/apps/snmp/lwip_snmp_msg.c index f95c3b38f8..0cb7ca997c 100644 --- a/features/FEATURE_LWIP/lwip-interface/lwip/src/apps/snmp/lwip_snmp_msg.c +++ b/features/FEATURE_LWIP/lwip-interface/lwip/src/apps/snmp/lwip_snmp_msg.c @@ -1469,7 +1469,7 @@ snmp_complete_outbound_frame(struct snmp_request *request) if (request->error_status == SNMP_ERR_TOOBIG) { request->error_index = 0; /* defined by RFC 1157 */ } else if (request->error_index == 0) { - /* set index to varbind where error occurred (if not already set before, e.g. during GetBulk processing) */ + /* set index to varbind where error occured (if not already set before, e.g. during GetBulk processing) */ request->error_index = request->inbound_varbind_enumerator.varbind_count; } } else { diff --git a/features/FEATURE_LWIP/lwip-interface/lwip/src/apps/tftp/lwip_tftp_server.c b/features/FEATURE_LWIP/lwip-interface/lwip/src/apps/tftp/lwip_tftp_server.c index a9d98b8cc1..243b0924bd 100644 --- a/features/FEATURE_LWIP/lwip-interface/lwip/src/apps/tftp/lwip_tftp_server.c +++ b/features/FEATURE_LWIP/lwip-interface/lwip/src/apps/tftp/lwip_tftp_server.c @@ -191,7 +191,7 @@ send_data(void) ret = tftp_state.ctx->read(tftp_state.handle, &payload[2], TFTP_MAX_PAYLOAD_SIZE); if (ret < 0) { - send_error(&tftp_state.addr, tftp_state.port, TFTP_ERROR_ACCESS_VIOLATION, "Error occurred while reading the file."); + send_error(&tftp_state.addr, tftp_state.port, TFTP_ERROR_ACCESS_VIOLATION, "Error occured while reading the file."); close_handle(); return; } diff --git a/features/FEATURE_LWIP/lwip-interface/lwip/src/netif/ppp/lwip_ipcp.c b/features/FEATURE_LWIP/lwip-interface/lwip/src/netif/ppp/lwip_ipcp.c index cce0ae3d7d..05108a0628 100644 --- a/features/FEATURE_LWIP/lwip-interface/lwip/src/netif/ppp/lwip_ipcp.c +++ b/features/FEATURE_LWIP/lwip-interface/lwip/src/netif/ppp/lwip_ipcp.c @@ -1744,7 +1744,7 @@ static int ipcp_reqci(fsm *f, u_char *inp, int *len, int reject_if_disagree) { } endswitch: if (orc == CONFACK && /* Good CI */ - rc != CONFACK) /* but prior CI wasn't? */ + rc != CONFACK) /* but prior CI wasnt? */ continue; /* Don't send this one */ if (orc == CONFNAK) { /* Nak this CI? */ diff --git a/features/FEATURE_LWIP/lwip-interface/lwip/src/netif/ppp/lwip_ipv6cp.c b/features/FEATURE_LWIP/lwip-interface/lwip/src/netif/ppp/lwip_ipv6cp.c index f34375b498..f1592c6faf 100644 --- a/features/FEATURE_LWIP/lwip-interface/lwip/src/netif/ppp/lwip_ipv6cp.c +++ b/features/FEATURE_LWIP/lwip-interface/lwip/src/netif/ppp/lwip_ipv6cp.c @@ -1011,7 +1011,7 @@ endswitch: IPV6CPDEBUG((" (%s)\n", CODENAME(orc))); if (orc == CONFACK && /* Good CI */ - rc != CONFACK) /* but prior CI wasn't? */ + rc != CONFACK) /* but prior CI wasnt? */ continue; /* Don't send this one */ if (orc == CONFNAK) { /* Nak this CI? */ diff --git a/features/FEATURE_LWIP/lwip-interface/lwip/src/netif/ppp/lwip_lcp.c b/features/FEATURE_LWIP/lwip-interface/lwip/src/netif/ppp/lwip_lcp.c index fe050b4bc1..90ed183b75 100644 --- a/features/FEATURE_LWIP/lwip-interface/lwip/src/netif/ppp/lwip_lcp.c +++ b/features/FEATURE_LWIP/lwip-interface/lwip/src/netif/ppp/lwip_lcp.c @@ -2232,7 +2232,7 @@ static int lcp_reqci(fsm *f, u_char *inp, int *lenp, int reject_if_disagree) { endswitch: if (orc == CONFACK && /* Good CI */ - rc != CONFACK) /* but prior CI wasn't? */ + rc != CONFACK) /* but prior CI wasnt? */ continue; /* Don't send this one */ if (orc == CONFNAK) { /* Nak this CI? */ diff --git a/features/filesystem/fat/ChaN/ff.cpp b/features/filesystem/fat/ChaN/ff.cpp index ea827af866..cc04154a30 100644 --- a/features/filesystem/fat/ChaN/ff.cpp +++ b/features/filesystem/fat/ChaN/ff.cpp @@ -3299,7 +3299,7 @@ FRESULT find_volume ( /* FR_OK(0): successful, !=0: any error occurred */ fmt = bsect ? check_fs(fs, bsect) : 3; /* Check the partition */ } while (LD2PT(vol) == 0 && fmt >= 2 && ++i < 4); } - if (fmt == 4) return FR_DISK_ERR; /* An error occurred in the disk I/O layer */ + if (fmt == 4) return FR_DISK_ERR; /* An error occured in the disk I/O layer */ if (fmt >= 2) return FR_NO_FILESYSTEM; /* No FAT volume is found */ /* An FAT volume is found (bsect). Following code initializes the filesystem object */ diff --git a/features/lorawan/LoRaWANStack.cpp b/features/lorawan/LoRaWANStack.cpp index f2c4be02f7..418322ed14 100644 --- a/features/lorawan/LoRaWANStack.cpp +++ b/features/lorawan/LoRaWANStack.cpp @@ -860,7 +860,7 @@ void LoRaWANStack::mcps_confirm_handler(loramac_mcps_confirm_t *mcps_confirm) } if (mcps_confirm->status != LORAMAC_EVENT_INFO_STATUS_OK) { - // Couldn't schedule packet, ack not received in CONFIRMED case + // Couldn't schedule packet, ack not recieved in CONFIRMED case // or some other error happened. Discard buffer, unset the tx-ongoing // flag and let the application know _tx_msg.tx_ongoing = false; diff --git a/features/mbedtls/inc/mbedtls/bignum.h b/features/mbedtls/inc/mbedtls/bignum.h index e4144a9ac6..456a804204 100644 --- a/features/mbedtls/inc/mbedtls/bignum.h +++ b/features/mbedtls/inc/mbedtls/bignum.h @@ -242,7 +242,7 @@ int mbedtls_mpi_copy( mbedtls_mpi *X, const mbedtls_mpi *Y ); void mbedtls_mpi_swap( mbedtls_mpi *X, mbedtls_mpi *Y ); /** - * \brief Safe conditional assignment X = Y if assign is 1 + * \brief Safe conditional assignement X = Y if assign is 1 * * \param X MPI to conditionally assign to * \param Y Value to be assigned diff --git a/features/mbedtls/inc/mbedtls/x509.h b/features/mbedtls/inc/mbedtls/x509.h index 48552811bd..d7e318dfdc 100644 --- a/features/mbedtls/inc/mbedtls/x509.h +++ b/features/mbedtls/inc/mbedtls/x509.h @@ -76,7 +76,7 @@ #define MBEDTLS_ERR_X509_ALLOC_FAILED -0x2880 /**< Allocation of memory failed. */ #define MBEDTLS_ERR_X509_FILE_IO_ERROR -0x2900 /**< Read/write of file failed. */ #define MBEDTLS_ERR_X509_BUFFER_TOO_SMALL -0x2980 /**< Destination buffer is too small. */ -#define MBEDTLS_ERR_X509_FATAL_ERROR -0x3000 /**< A fatal error occurred, eg the chain is too long or the vrfy callback failed. */ +#define MBEDTLS_ERR_X509_FATAL_ERROR -0x3000 /**< A fatal error occured, eg the chain is too long or the vrfy callback failed. */ /* \} name */ /** @@ -249,7 +249,7 @@ int mbedtls_x509_serial_gets( char *buf, size_t size, const mbedtls_x509_buf *se * * \param to mbedtls_x509_time to check * - * \return 1 if the given time is in the past or an error occurred, + * \return 1 if the given time is in the past or an error occured, * 0 otherwise. */ int mbedtls_x509_time_is_past( const mbedtls_x509_time *to ); @@ -263,7 +263,7 @@ int mbedtls_x509_time_is_past( const mbedtls_x509_time *to ); * * \param from mbedtls_x509_time to check * - * \return 1 if the given time is in the future or an error occurred, + * \return 1 if the given time is in the future or an error occured, * 0 otherwise. */ int mbedtls_x509_time_is_future( const mbedtls_x509_time *from ); diff --git a/features/mbedtls/src/ecp.c b/features/mbedtls/src/ecp.c index 8c9b398209..5ad6863987 100644 --- a/features/mbedtls/src/ecp.c +++ b/features/mbedtls/src/ecp.c @@ -1470,7 +1470,7 @@ cleanup: /* * For Montgomery curves, we do all the internal arithmetic in projective * coordinates. Import/export of points uses only the x coordinates, which is - * internally represented as X / Z. + * internaly represented as X / Z. * * For scalar multiplication, we'll use a Montgomery ladder. */ diff --git a/features/mbedtls/src/error.c b/features/mbedtls/src/error.c index f5a2d1f114..db42381c42 100644 --- a/features/mbedtls/src/error.c +++ b/features/mbedtls/src/error.c @@ -481,7 +481,7 @@ void mbedtls_strerror( int ret, char *buf, size_t buflen ) if( use_ret == -(MBEDTLS_ERR_X509_BUFFER_TOO_SMALL) ) mbedtls_snprintf( buf, buflen, "X509 - Destination buffer is too small" ); if( use_ret == -(MBEDTLS_ERR_X509_FATAL_ERROR) ) - mbedtls_snprintf( buf, buflen, "X509 - A fatal error occurred, eg the chain is too long or the vrfy callback failed" ); + mbedtls_snprintf( buf, buflen, "X509 - A fatal error occured, eg the chain is too long or the vrfy callback failed" ); #endif /* MBEDTLS_X509_USE_C || MBEDTLS_X509_CREATE_C */ // END generated code diff --git a/features/mbedtls/targets/TARGET_STM/aes_alt.h b/features/mbedtls/targets/TARGET_STM/aes_alt.h index 7eadcb1e6a..120c9af5f1 100644 --- a/features/mbedtls/targets/TARGET_STM/aes_alt.h +++ b/features/mbedtls/targets/TARGET_STM/aes_alt.h @@ -32,7 +32,7 @@ extern "C" { #endif #define ST_AES_TIMEOUT ((uint32_t) 0xFF) /* 255 ms timeout for the crypto processor */ -#define ST_ERR_AES_BUSY (-0x0023) /* Crypto processor is busy, timeout occurred */ +#define ST_ERR_AES_BUSY (-0x0023) /* Crypto processor is busy, timeout occured */ /** * \brief AES context structure * diff --git a/features/nanostack/FEATURE_NANOSTACK/nanostack-interface/NanostackInterface.h b/features/nanostack/FEATURE_NANOSTACK/nanostack-interface/NanostackInterface.h index 8259984cab..453efa14ae 100644 --- a/features/nanostack/FEATURE_NANOSTACK/nanostack-interface/NanostackInterface.h +++ b/features/nanostack/FEATURE_NANOSTACK/nanostack-interface/NanostackInterface.h @@ -68,7 +68,7 @@ protected: /** Bind a specific address to a socket * - * Binding a socket specifies the address and port on which to receive + * Binding a socket specifies the address and port on which to recieve * data. If the IP address is zeroed, only the port is bound. * * @param handle Socket handle diff --git a/features/nanostack/FEATURE_NANOSTACK/sal-stack-nanostack/source/6LoWPAN/Thread/thread_dhcpv6_client.c b/features/nanostack/FEATURE_NANOSTACK/sal-stack-nanostack/source/6LoWPAN/Thread/thread_dhcpv6_client.c index dd83e45c50..7005b52336 100644 --- a/features/nanostack/FEATURE_NANOSTACK/sal-stack-nanostack/source/6LoWPAN/Thread/thread_dhcpv6_client.c +++ b/features/nanostack/FEATURE_NANOSTACK/sal-stack-nanostack/source/6LoWPAN/Thread/thread_dhcpv6_client.c @@ -60,7 +60,7 @@ void thread_dhcpv6_client_set_address(int8_t interface_id, dhcpv6_client_server_ void thread_dhcp_client_init(int8_t interface) { - // No support for multiple thread instances yet. + // No support for multible thread instances yet. dhcp_client.service_instance = dhcp_service_init(interface, DHCP_INSTANCE_CLIENT, NULL); dhcp_client.interface = interface; dhcp_client.libDhcp_instance = libdhcpv6_nonTemporal_entry_get_unique_instance_id(); diff --git a/features/nanostack/FEATURE_NANOSTACK/sal-stack-nanostack/source/6LoWPAN/Thread/thread_management_server.c b/features/nanostack/FEATURE_NANOSTACK/sal-stack-nanostack/source/6LoWPAN/Thread/thread_management_server.c index d98ab2f4a4..329c26c14a 100644 --- a/features/nanostack/FEATURE_NANOSTACK/sal-stack-nanostack/source/6LoWPAN/Thread/thread_management_server.c +++ b/features/nanostack/FEATURE_NANOSTACK/sal-stack-nanostack/source/6LoWPAN/Thread/thread_management_server.c @@ -552,7 +552,7 @@ static uint32_t reverse_bits(uint32_t num) } static void thread_panid_scan_response(int8_t if_id, const mlme_scan_conf_t* conf) { - bool conflict_occurred = false; + bool conflict_occured = false; nwk_scan_params_t *scan_parameters_ptr; nwk_pan_descriptor_t *result; protocol_interface_info_entry_t *interface; @@ -599,12 +599,12 @@ static void thread_panid_scan_response(int8_t if_id, const mlme_scan_conf_t* con if(result->pan_descriptor->CoordPANId == this->scan_ptr->panid) { //if pan id matches then send a conflict message tr_debug("Same pan id was found on channel %d", result->pan_descriptor->LogicalChannel); set_channel_mask(this->scan_ptr->channel_mask,result->pan_descriptor->LogicalChannel,0); - conflict_occurred = true; + conflict_occured = true; } result = result->next; } while (result); - if (conflict_occurred){ - tr_debug("conflict occurred"); + if (conflict_occured){ + tr_debug("conflict occured"); this->scan_ptr->timer = eventOS_timeout_ms(thread_panid_conflict_timeout_cb, 2000, this); } thread_start_mac_with_link_configuration(interface,linkConfiguration); diff --git a/features/nanostack/FEATURE_NANOSTACK/sal-stack-nanostack/source/Service_Libs/mdns/fnet/fnet_stack/services/dns/fnet_dns.h b/features/nanostack/FEATURE_NANOSTACK/sal-stack-nanostack/source/Service_Libs/mdns/fnet/fnet_stack/services/dns/fnet_dns.h index c154f6295b..d037c6b83d 100644 --- a/features/nanostack/FEATURE_NANOSTACK/sal-stack-nanostack/source/Service_Libs/mdns/fnet/fnet_stack/services/dns/fnet_dns.h +++ b/features/nanostack/FEATURE_NANOSTACK/sal-stack-nanostack/source/Service_Libs/mdns/fnet/fnet_stack/services/dns/fnet_dns.h @@ -122,7 +122,7 @@ struct fnet_dns_params fnet_address_family_t addr_family; /**< @brief Family of the IP Address which is queried.*/ fnet_dns_callback_resolved_t callback; /**< @brief Pointer to the callback function defined by * @ref fnet_dns_callback_resolved_t. It is called when the - * DNS-client resolving is finished or an error has occurred. */ + * DNS-client resolving is finished or an error is occurred. */ fnet_uint32_t cookie; /**< @brief Optional application-specific parameter. @n * It's passed to the @c callback * function as input parameter. */ @@ -155,7 +155,7 @@ extern "C" { * The resolved IP-address will be passed to the @ref fnet_dns_callback_resolved_t callback function, * which is set in @c params. @n * The DNS service is released automatically as soon as the - * resolving is finished or an error has occurred. + * resolving is finished or an error is occurred. * ******************************************************************************/ fnet_return_t fnet_dns_init( struct fnet_dns_params *params ); diff --git a/features/unsupported/USBDevice/USBMSD/USBMSD.cpp b/features/unsupported/USBDevice/USBMSD/USBMSD.cpp index a45c893c52..21d50f9b9f 100644 --- a/features/unsupported/USBDevice/USBMSD/USBMSD.cpp +++ b/features/unsupported/USBDevice/USBMSD/USBMSD.cpp @@ -170,7 +170,7 @@ bool USBMSD::EPBULK_OUT_callback() { } break; - // an error has occurred: stall endpoint and send CSW + // an error has occured: stall endpoint and send CSW default: stallEndpoint(EPBULK_OUT); csw.Status = CSW_ERROR; @@ -207,7 +207,7 @@ bool USBMSD::EPBULK_IN_callback() { stage = READ_CBW; break; - // an error has occurred + // an error has occured default: stallEndpoint(EPBULK_IN); sendCSW(); diff --git a/features/unsupported/USBDevice/targets/TARGET_Silicon_Labs/src/em_usbdep.c b/features/unsupported/USBDevice/targets/TARGET_Silicon_Labs/src/em_usbdep.c index 3846eb3d20..2017edaf97 100644 --- a/features/unsupported/USBDevice/targets/TARGET_Silicon_Labs/src/em_usbdep.c +++ b/features/unsupported/USBDevice/targets/TARGET_Silicon_Labs/src/em_usbdep.c @@ -40,7 +40,7 @@ static const char *epStatusStr[] = { /* * USBDEP_Ep0Handler() is called each time a packet has been transmitted - * or received on the default endpoint. + * or recieved on the default endpoint. * A state machine navigate us through the phases of a control transfer * according to "chapter 9" in the USB spec. */ @@ -417,7 +417,7 @@ void USBDEP_Ep0Handler( USBD_Device_TypeDef *device ) /* * USBDEP_EpHandler() is called each time a packet has been transmitted - * or received on an endpoint other than the default endpoint. + * or recieved on an endpoint other than the default endpoint. */ void USBDEP_EpHandler( uint8_t epAddr ) { diff --git a/features/unsupported/tests/libs/SPIHalfDuplex/SPIHalfDuplex.h b/features/unsupported/tests/libs/SPIHalfDuplex/SPIHalfDuplex.h index d012d7b946..14633b8555 100644 --- a/features/unsupported/tests/libs/SPIHalfDuplex/SPIHalfDuplex.h +++ b/features/unsupported/tests/libs/SPIHalfDuplex/SPIHalfDuplex.h @@ -48,7 +48,7 @@ public: * Pin Options: * (5, 6, 7) or (11, 12, 13) * - * mosi or miso can be specified as NC if not used + * mosi or miso can be specfied as NC if not used * * @param mosi SPI Master Out, Slave In pin * @param miso SPI Master In, Slave Out pin diff --git a/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/ethernet_api.c b/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/ethernet_api.c index 2460a3741a..d9755dfb33 100644 --- a/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/ethernet_api.c +++ b/targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/ethernet_api.c @@ -58,11 +58,11 @@ int ethernet_receive() return smsc9220_peek_next_packet_size(); } -/* Read from an received ethernet packet.*/ -/* After receive returned a number bigger than 0 it is*/ +/* Read from an recevied ethernet packet.*/ +/* After receive returnd a number bigger than 0 it is*/ /* possible to read bytes from this packet.*/ /* Read will write up to size bytes into data.*/ -/* It is possible to use read multiple times.*/ +/* It is possible to use read multible times.*/ /* Each time read will start reading after the last read byte before. */ int ethernet_read(char *data, int dlen) { diff --git a/targets/TARGET_ARM_SSG/TARGET_IOTSS/SDK/ETH_MPS2.c b/targets/TARGET_ARM_SSG/TARGET_IOTSS/SDK/ETH_MPS2.c index 036ee32578..2e20cb7113 100644 --- a/targets/TARGET_ARM_SSG/TARGET_IOTSS/SDK/ETH_MPS2.c +++ b/targets/TARGET_ARM_SSG/TARGET_IOTSS/SDK/ETH_MPS2.c @@ -375,7 +375,7 @@ unsigned int smsc9220_recv_packet(unsigned int *recvbuf, unsigned int *index) if(rxfifo_stat != 0) { // Fetch status of this packet pktsize = ((rxfifo_stat >> 16) & 0x3FFF); if(rxfifo_stat & (1 << 15)) { - printf("Error occurred during receiving of packets on the bus.\n"); + printf("Error occured during receiving of packets on the bus.\n"); return 1; } else { /* Below formula (recommended by SMSC9220 code) diff --git a/targets/TARGET_ARM_SSG/TARGET_IOTSS/SDK/mps2_ethernet_api.h b/targets/TARGET_ARM_SSG/TARGET_IOTSS/SDK/mps2_ethernet_api.h index 913191435d..2a15b24a6c 100644 --- a/targets/TARGET_ARM_SSG/TARGET_IOTSS/SDK/mps2_ethernet_api.h +++ b/targets/TARGET_ARM_SSG/TARGET_IOTSS/SDK/mps2_ethernet_api.h @@ -30,7 +30,7 @@ extern "C" { // send ethernet write buffer, returning the packet size sent int ethernet_transmission(unsigned char * pkt, unsigned int length); -// receive from ethernet buffer, returning packet size, or 0 if no packet +// recieve from ethernet buffer, returning packet size, or 0 if no packet int ethernet_reception(unsigned int *recvbuf, unsigned int *index); // get the ethernet address diff --git a/targets/TARGET_ARM_SSG/TARGET_IOTSS/ethernet_api.c b/targets/TARGET_ARM_SSG/TARGET_IOTSS/ethernet_api.c index 360997c5dd..78469a645f 100644 --- a/targets/TARGET_ARM_SSG/TARGET_IOTSS/ethernet_api.c +++ b/targets/TARGET_ARM_SSG/TARGET_IOTSS/ethernet_api.c @@ -136,11 +136,11 @@ int ethernet_receive() return 0; } -// Read from an received ethernet packet. -// After receive returned a number bigger than 0 it is +// Read from an recevied ethernet packet. +// After receive returnd a number bigger than 0 it is // possible to read bytes from this packet. // Read will write up to size bytes into data. -// It is possible to use read multiple times. +// It is possible to use read multible times. // Each time read will start reading after the last read byte before. int ethernet_read(char *data, int dlen) diff --git a/targets/TARGET_ARM_SSG/TARGET_MPS2/SDK/ETH_MPS2.c b/targets/TARGET_ARM_SSG/TARGET_MPS2/SDK/ETH_MPS2.c index 045cc07bc4..3910871cd9 100644 --- a/targets/TARGET_ARM_SSG/TARGET_MPS2/SDK/ETH_MPS2.c +++ b/targets/TARGET_ARM_SSG/TARGET_MPS2/SDK/ETH_MPS2.c @@ -375,7 +375,7 @@ unsigned int smsc9220_recv_packet(unsigned int *recvbuf, unsigned int *index) if(rxfifo_stat != 0) { // Fetch status of this packet pktsize = ((rxfifo_stat >> 16) & 0x3FFF); if(rxfifo_stat & (1 << 15)) { - printf("Error occurred during receiving of packets on the bus.\n"); + printf("Error occured during receiving of packets on the bus.\n"); return 1; } else { /* Below formula (recommended by SMSC9220 code) diff --git a/targets/TARGET_ARM_SSG/TARGET_MPS2/SDK/mps2_ethernet_api.h b/targets/TARGET_ARM_SSG/TARGET_MPS2/SDK/mps2_ethernet_api.h index 913191435d..2a15b24a6c 100644 --- a/targets/TARGET_ARM_SSG/TARGET_MPS2/SDK/mps2_ethernet_api.h +++ b/targets/TARGET_ARM_SSG/TARGET_MPS2/SDK/mps2_ethernet_api.h @@ -30,7 +30,7 @@ extern "C" { // send ethernet write buffer, returning the packet size sent int ethernet_transmission(unsigned char * pkt, unsigned int length); -// receive from ethernet buffer, returning packet size, or 0 if no packet +// recieve from ethernet buffer, returning packet size, or 0 if no packet int ethernet_reception(unsigned int *recvbuf, unsigned int *index); // get the ethernet address diff --git a/targets/TARGET_ARM_SSG/TARGET_MPS2/ethernet_api.c b/targets/TARGET_ARM_SSG/TARGET_MPS2/ethernet_api.c index 360997c5dd..78469a645f 100644 --- a/targets/TARGET_ARM_SSG/TARGET_MPS2/ethernet_api.c +++ b/targets/TARGET_ARM_SSG/TARGET_MPS2/ethernet_api.c @@ -136,11 +136,11 @@ int ethernet_receive() return 0; } -// Read from an received ethernet packet. -// After receive returned a number bigger than 0 it is +// Read from an recevied ethernet packet. +// After receive returnd a number bigger than 0 it is // possible to read bytes from this packet. // Read will write up to size bytes into data. -// It is possible to use read multiple times. +// It is possible to use read multible times. // Each time read will start reading after the last read byte before. int ethernet_read(char *data, int dlen) diff --git a/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/api/spi_api.c b/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/api/spi_api.c index 17411e72f8..dbecf7a149 100755 --- a/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/api/spi_api.c +++ b/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/api/spi_api.c @@ -327,7 +327,7 @@ int spi_master_write(spi_t *obj, int value) /** Write a block out in master mode and receive a value * - * The total number of bytes sent and received will be the maximum of + * The total number of bytes sent and recieved will be the maximum of * tx_length and rx_length. The bytes written will be padded with the * value 0xff. * diff --git a/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/bsp/tmr/adi_tmr.c b/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/bsp/tmr/adi_tmr.c index 0882cbae8b..9e889131ca 100755 --- a/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/bsp/tmr/adi_tmr.c +++ b/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/bsp/tmr/adi_tmr.c @@ -303,7 +303,7 @@ ADI_TMR_RESULT adi_tmr_ConfigTimer(ADI_TMR_DEVICE const eDevice, ADI_TMR_CONFIG* * * @details The timer can be configured to capture the timer value when a specific event occurs. The * list of events can be found in the hardware reference manual. The callback function specified - * in #adi_tmr_Init will be supplied #ADI_TMR_EVENT_CAPTURE to indicate the event occurred. The + * in #adi_tmr_Init will be supplied #ADI_TMR_EVENT_CAPTURE to indicate the event occured. The * user can then read the captured value by calling #adi_tmr_GetCaptureCount. * * @note This function can only be called when the timer is disabled. diff --git a/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/bsp/uart/adi_uart.c b/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/bsp/uart/adi_uart.c index 5c7a020447..f0dc346bfa 100755 --- a/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/bsp/uart/adi_uart.c +++ b/targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/bsp/uart/adi_uart.c @@ -1814,7 +1814,7 @@ ADI_UART_RESULT adi_uart_GetBaudRate( #endif /* ADI_DEBUG */ - /* If an error occurred during autobaud this value will be set to a + /* If an error occured during autobaud this value will be set to a non-zero value. The specific error can be found by checking against #ADI_UART_EVENT. */ diff --git a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/api/spi_api.c b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/api/spi_api.c index 74ef22135a..7f9fd048c5 100755 --- a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/api/spi_api.c +++ b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/api/spi_api.c @@ -302,7 +302,7 @@ int spi_master_write(spi_t *obj, int value) /** Write a block out in master mode and receive a value * - * The total number of bytes sent and received will be the maximum of + * The total number of bytes sent and recieved will be the maximum of * tx_length and rx_length. The bytes written will be padded with the * value 0xff. * diff --git a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/tmr/adi_tmr.c b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/tmr/adi_tmr.c index 505daff976..b7153b79a8 100755 --- a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/tmr/adi_tmr.c +++ b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/tmr/adi_tmr.c @@ -284,7 +284,7 @@ ADI_TMR_RESULT adi_tmr_ConfigTimer(ADI_TMR_DEVICE const eDevice, ADI_TMR_CONFIG * * @details The timer can be configured to capture the timer value when a specific event occurs. The * list of events can be found in the hardware reference manual. The callback function specified - * in #adi_tmr_Init will be supplied #ADI_TMR_EVENT_CAPTURE to indicate the event occurred. The + * in #adi_tmr_Init will be supplied #ADI_TMR_EVENT_CAPTURE to indicate the event occured. The * user can then read the captured value by calling #adi_tmr_GetCaptureCount. * * @note This function can only be called when the timer is disabled. diff --git a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/uart/adi_uart.c b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/uart/adi_uart.c index a511985c6c..d1f72d6048 100755 --- a/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/uart/adi_uart.c +++ b/targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/bsp/uart/adi_uart.c @@ -1808,7 +1808,7 @@ ADI_UART_RESULT adi_uart_GetBaudRate( #endif /* ADI_DEBUG */ - /* If an error occurred during autobaud this value will be set to a + /* If an error occured during autobaud this value will be set to a non-zero value. The specific error can be found by checking against #ADI_UART_EVENT. */ diff --git a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/drivers/tcc/tcc.c b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/drivers/tcc/tcc.c index 1038c22038..68e9defcc3 100644 --- a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/drivers/tcc/tcc.c +++ b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/drivers/tcc/tcc.c @@ -1354,10 +1354,10 @@ enum status_code tcc_set_pattern( * * \return Bitmask of \c TCC_STATUS_* flags. * - * \retval TCC_STATUS_CHANNEL_MATCH_CAPTURE(n) Channel n match/capture has occurred + * \retval TCC_STATUS_CHANNEL_MATCH_CAPTURE(n) Channel n match/capture has occured * \retval TCC_STATUS_CHANNEL_OUTPUT(n) Channel n match/capture output state - * \retval TCC_STATUS_NON_RECOVERABLE_FAULT_OCCUR(x) Non-recoverable fault x has occurred - * \retval TCC_STATUS_RECOVERABLE_FAULT_OCCUR(n) Recoverable fault n has occurred + * \retval TCC_STATUS_NON_RECOVERABLE_FAULT_OCCUR(x) Non-recoverable fault x has occured + * \retval TCC_STATUS_RECOVERABLE_FAULT_OCCUR(n) Recoverable fault n has occured * \retval TCC_STATUS_NON_RECOVERABLE_FAULT_PRESENT(x) Non-recoverable fault x input present * \retval TCC_STATUS_RECOVERABLE_FAULT_PRESENT(n) Recoverable fault n input present * \retval TCC_STATUS_SYNC_READY None of register is syncing diff --git a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/drivers/tcc/tcc.h b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/drivers/tcc/tcc.h index 7a53cc60a5..ec409a340d 100644 --- a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/drivers/tcc/tcc.h +++ b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/drivers/tcc/tcc.h @@ -852,7 +852,7 @@ enum tcc_callback { #define TCC_STATUS_CHANNEL_OUTPUT(ch) (1UL << ((ch)+8)) /** A Non-Recoverable Fault \c x (0 ~ 1) has occurred. */ #define TCC_STATUS_NON_RECOVERABLE_FAULT_OCCUR(x) (1UL << ((x)+16)) -/** A Recoverable Fault \c n (0 ~ 1 representing A ~ B) has occurred. */ +/** A Recoverable Fault \c n (0 ~ 1 representing A ~ B) has occured. */ #define TCC_STATUS_RECOVERABLE_FAULT_OCCUR(n) (1UL << ((n)+18)) /** The Non-Recoverable Fault \c x (0 ~ 1) input is present. */ #define TCC_STATUS_NON_RECOVERABLE_FAULT_PRESENT(x) (1UL << ((x)+20)) diff --git a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/serial_api.c b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/serial_api.c index 8fed98d48d..2ca86a6b63 100644 --- a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/serial_api.c +++ b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/serial_api.c @@ -1024,7 +1024,7 @@ int serial_rx_irq_handler_asynch(serial_t *obj) event |= SERIAL_EVENT_RX_CHARACTER_MATCH; } - /* Return to the call back if character match occurred */ + /* Return to the call back if character match occured */ if(event != 0) { serial_rx_abort_asynch(obj); return event & obj->serial.events; diff --git a/targets/TARGET_Atmel/TARGET_SAM_CortexM4/utils/cmsis/TARGET_SAMG55/include/component/comp_rstc.h b/targets/TARGET_Atmel/TARGET_SAM_CortexM4/utils/cmsis/TARGET_SAMG55/include/component/comp_rstc.h index f076cf2073..987762aa64 100644 --- a/targets/TARGET_Atmel/TARGET_SAM_CortexM4/utils/cmsis/TARGET_SAMG55/include/component/comp_rstc.h +++ b/targets/TARGET_Atmel/TARGET_SAM_CortexM4/utils/cmsis/TARGET_SAMG55/include/component/comp_rstc.h @@ -75,7 +75,7 @@ typedef struct { #define RSTC_SR_RSTTYP_WDT_RST (0x2u << 8) /**< \brief (RSTC_SR) Watchdog fault occurred */ #define RSTC_SR_RSTTYP_SOFT_RST (0x3u << 8) /**< \brief (RSTC_SR) Processor reset required by the software */ #define RSTC_SR_RSTTYP_USER_RST (0x4u << 8) /**< \brief (RSTC_SR) NRST pin detected low */ -#define RSTC_SR_RSTTYP_SLCK_XTAL_RST (0x7u << 8) /**< \brief (RSTC_SR) Slow Crystal Failure Detection fault occurred */ +#define RSTC_SR_RSTTYP_SLCK_XTAL_RST (0x7u << 8) /**< \brief (RSTC_SR) Slow Crystal Failure Detection fault occured */ #define RSTC_SR_NRSTL (0x1u << 16) /**< \brief (RSTC_SR) NRST Pin Level */ #define RSTC_SR_SRCMP (0x1u << 17) /**< \brief (RSTC_SR) Software Reset Command in Progress */ /* -------- RSTC_MR : (RSTC Offset: 0x08) Mode Register -------- */ diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/drivers/fsl_flexcan.h b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/drivers/fsl_flexcan.h index 1d19e01f72..118badf58f 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/drivers/fsl_flexcan.h +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/drivers/fsl_flexcan.h @@ -227,7 +227,7 @@ enum _flexcan_interrupt_enable * * This provides constants for the FlexCAN status flags for use in the FlexCAN functions. * Note: The CPU read action clears FlEXCAN_ErrorFlag, therefore user need to - * read FlEXCAN_ErrorFlag and distinguish which error has occurred using + * read FlEXCAN_ErrorFlag and distinguish which error is occur using * @ref _flexcan_error_flags enumerations. */ enum _flexcan_flags diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/drivers/fsl_sai.c b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/drivers/fsl_sai.c index 57b8dbb499..73ea64fa4e 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/drivers/fsl_sai.c +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/drivers/fsl_sai.c @@ -37,7 +37,7 @@ enum _sai_transfer_state { kSAI_Busy = 0x0U, /*!< SAI is busy */ kSAI_Idle, /*!< Transfer is done. */ - kSAI_Error /*!< Transfer error occurred. */ + kSAI_Error /*!< Transfer error occured. */ }; /*! @brief Typedef for sai tx interrupt handler. */ diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/drivers/fsl_qspi.c b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/drivers/fsl_qspi.c index db7a8e891a..748a1e7167 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/drivers/fsl_qspi.c +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/drivers/fsl_qspi.c @@ -37,7 +37,7 @@ enum _qspi_transfer_state { kQSPI_TxBusy = 0x0U, /*!< QSPI is busy */ kQSPI_TxIdle, /*!< Transfer is done. */ - kQSPI_TxError /*!< Transfer error occurred. */ + kQSPI_TxError /*!< Transfer error occured. */ }; #define QSPI_AHB_BUFFER_REG(base, index) (*((uint32_t *)&(base->BUF0CR) + index)) diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/drivers/fsl_sai.c b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/drivers/fsl_sai.c index 97620fb6ad..0d19d09e7a 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/drivers/fsl_sai.c +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/drivers/fsl_sai.c @@ -37,7 +37,7 @@ enum _sai_transfer_state { kSAI_Busy = 0x0U, /*!< SAI is busy */ kSAI_Idle, /*!< Transfer is done. */ - kSAI_Error /*!< Transfer error occurred. */ + kSAI_Error /*!< Transfer error occured. */ }; /*! @brief Typedef for sai tx interrupt handler. */ diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/drivers/fsl_trng.c b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/drivers/fsl_trng.c index 99f67b36a7..959fb6050c 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/drivers/fsl_trng.c +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/drivers/fsl_trng.c @@ -1173,7 +1173,7 @@ typedef enum _trng_statistical_check * TRNG access mode in the SA-TRNG Miscellaneous Control Register. * * Values: - * - 0b0 - Programmability of registers controlled only by the RNG Miscellaneous + * - 0b0 - Programability of registers controlled only by the RNG Miscellaneous * Control Register's access mode bit. * - 0b1 - Overides RNG Miscellaneous Control Register access mode and prevents * TRNG register programming. diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/drivers/fsl_sai.c b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/drivers/fsl_sai.c index 9c8aab085d..c38165ec04 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/drivers/fsl_sai.c +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/drivers/fsl_sai.c @@ -37,7 +37,7 @@ enum _sai_transfer_state { kSAI_Busy = 0x0U, /*!< SAI is busy */ kSAI_Idle, /*!< Transfer is done. */ - kSAI_Error /*!< Transfer error occurred. */ + kSAI_Error /*!< Transfer error occured. */ }; /*! @brief Typedef for sai tx interrupt handler. */ diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/drivers/fsl_sai_dma.h b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/drivers/fsl_sai_dma.h index d5f55559f0..9606afcfdf 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/drivers/fsl_sai_dma.h +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/drivers/fsl_sai_dma.h @@ -56,7 +56,7 @@ struct _sai_dma_handle uint8_t bytesPerFrame; /*!< Bytes in a frame */ uint8_t channel; /*!< Which Data channel SAI use */ uint32_t state; /*!< SAI DMA transfer internal state */ - sai_dma_callback_t callback; /*!< Callback for users while transfer finish or error occurred */ + sai_dma_callback_t callback; /*!< Callback for users while transfer finish or error occured */ void *userData; /*!< User callback parameter */ sai_transfer_t saiQueue[SAI_XFER_QUEUE_SIZE]; /*!< Transfer queue storing queued transfer. */ size_t transferSize[SAI_XFER_QUEUE_SIZE]; /*!< Data bytes need to transfer */ diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL82Z/drivers/fsl_qspi.c b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL82Z/drivers/fsl_qspi.c index 2b23c1a11a..00f511cd73 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL82Z/drivers/fsl_qspi.c +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL82Z/drivers/fsl_qspi.c @@ -37,7 +37,7 @@ enum _qspi_transfer_state { kQSPI_TxBusy = 0x0U, /*!< QSPI is busy */ kQSPI_TxIdle, /*!< Transfer is done. */ - kQSPI_TxError /*!< Transfer error occurred. */ + kQSPI_TxError /*!< Transfer error occured. */ }; #define QSPI_AHB_BUFFER_REG(base, index) (*((uint32_t *)&(base->BUF0CR) + index)) diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL82Z/drivers/fsl_trng.c b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL82Z/drivers/fsl_trng.c index d084fc1a58..a5fd937dcd 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL82Z/drivers/fsl_trng.c +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL82Z/drivers/fsl_trng.c @@ -1173,7 +1173,7 @@ typedef enum _trng_statistical_check * TRNG access mode in the SA-TRNG Miscellaneous Control Register. * * Values: - * - 0b0 - Programmability of registers controlled only by the RNG Miscellaneous + * - 0b0 - Programability of registers controlled only by the RNG Miscellaneous * Control Register's access mode bit. * - 0b1 - Overides RNG Miscellaneous Control Register access mode and prevents * TRNG register programming. diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW24D/drivers/fsl_sai.c b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW24D/drivers/fsl_sai.c index 9c8aab085d..c38165ec04 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW24D/drivers/fsl_sai.c +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW24D/drivers/fsl_sai.c @@ -37,7 +37,7 @@ enum _sai_transfer_state { kSAI_Busy = 0x0U, /*!< SAI is busy */ kSAI_Idle, /*!< Transfer is done. */ - kSAI_Error /*!< Transfer error occurred. */ + kSAI_Error /*!< Transfer error occured. */ }; /*! @brief Typedef for sai tx interrupt handler. */ diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/drivers/fsl_trng.c b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/drivers/fsl_trng.c index d084fc1a58..a5fd937dcd 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/drivers/fsl_trng.c +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/drivers/fsl_trng.c @@ -1173,7 +1173,7 @@ typedef enum _trng_statistical_check * TRNG access mode in the SA-TRNG Miscellaneous Control Register. * * Values: - * - 0b0 - Programmability of registers controlled only by the RNG Miscellaneous + * - 0b0 - Programability of registers controlled only by the RNG Miscellaneous * Control Register's access mode bit. * - 0b1 - Overides RNG Miscellaneous Control Register access mode and prevents * TRNG register programming. diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/drivers/fsl_sai.c b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/drivers/fsl_sai.c index 9c8aab085d..c38165ec04 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/drivers/fsl_sai.c +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/drivers/fsl_sai.c @@ -37,7 +37,7 @@ enum _sai_transfer_state { kSAI_Busy = 0x0U, /*!< SAI is busy */ kSAI_Idle, /*!< Transfer is done. */ - kSAI_Error /*!< Transfer error occurred. */ + kSAI_Error /*!< Transfer error occured. */ }; /*! @brief Typedef for sai tx interrupt handler. */ diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K24F/drivers/fsl_flexcan.h b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K24F/drivers/fsl_flexcan.h index 1d19e01f72..118badf58f 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K24F/drivers/fsl_flexcan.h +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K24F/drivers/fsl_flexcan.h @@ -227,7 +227,7 @@ enum _flexcan_interrupt_enable * * This provides constants for the FlexCAN status flags for use in the FlexCAN functions. * Note: The CPU read action clears FlEXCAN_ErrorFlag, therefore user need to - * read FlEXCAN_ErrorFlag and distinguish which error has occurred using + * read FlEXCAN_ErrorFlag and distinguish which error is occur using * @ref _flexcan_error_flags enumerations. */ enum _flexcan_flags diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K24F/drivers/fsl_sai.c b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K24F/drivers/fsl_sai.c index 57b8dbb499..73ea64fa4e 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K24F/drivers/fsl_sai.c +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K24F/drivers/fsl_sai.c @@ -37,7 +37,7 @@ enum _sai_transfer_state { kSAI_Busy = 0x0U, /*!< SAI is busy */ kSAI_Idle, /*!< Transfer is done. */ - kSAI_Error /*!< Transfer error occurred. */ + kSAI_Error /*!< Transfer error occured. */ }; /*! @brief Typedef for sai tx interrupt handler. */ diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/drivers/fsl_flexcan.h b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/drivers/fsl_flexcan.h index 1b060f31ef..bafc4450ac 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/drivers/fsl_flexcan.h +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/drivers/fsl_flexcan.h @@ -227,7 +227,7 @@ enum _flexcan_interrupt_enable * * This provides constants for the FlexCAN status flags for use in the FlexCAN functions. * Note: The CPU read action clears FlEXCAN_ErrorFlag, therefore user need to - * read FlEXCAN_ErrorFlag and distinguish which error has occurred using + * read FlEXCAN_ErrorFlag and distinguish which error is occur using * @ref _flexcan_error_flags enumerations. */ enum _flexcan_flags diff --git a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/drivers/fsl_sai.c b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/drivers/fsl_sai.c index 97620fb6ad..0d19d09e7a 100644 --- a/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/drivers/fsl_sai.c +++ b/targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/drivers/fsl_sai.c @@ -37,7 +37,7 @@ enum _sai_transfer_state { kSAI_Busy = 0x0U, /*!< SAI is busy */ kSAI_Idle, /*!< Transfer is done. */ - kSAI_Error /*!< Transfer error occurred. */ + kSAI_Error /*!< Transfer error occured. */ }; /*! @brief Typedef for sai tx interrupt handler. */ diff --git a/targets/TARGET_Maxim/TARGET_MAX32625/mxc/tmr_utils.h b/targets/TARGET_Maxim/TARGET_MAX32625/mxc/tmr_utils.h index 14f1aab224..a6712372ba 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32625/mxc/tmr_utils.h +++ b/targets/TARGET_Maxim/TARGET_MAX32625/mxc/tmr_utils.h @@ -75,7 +75,7 @@ void TMR_Delay(mxc_tmr_regs_t* tmr, unsigned long us); void TMR_TO_Start(mxc_tmr_regs_t* tmr, unsigned long us); /** - * @brief Check if the timeout has occurred. + * @brief Check if the timeout has occured. * @param tmr TMR module to operate on * @returns E_NO_ERROR if the timeout has not occurred, E_TIME_OUT if it has. */ diff --git a/targets/TARGET_Maxim/TARGET_MAX32630/mxc/aes.h b/targets/TARGET_Maxim/TARGET_MAX32630/mxc/aes.h index f81510af91..70e452d1ca 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32630/mxc/aes.h +++ b/targets/TARGET_Maxim/TARGET_MAX32630/mxc/aes.h @@ -129,7 +129,7 @@ int AES_SetKey(const uint8_t *key, mxc_aes_mode_t mode); * @param dir Operation to perform, see #mxc_aes_dir_t for supported operations. * * @return #E_SUCCESS Operation completed successfully, output data is stored in @a *out. - * @return ErrorCode An @ref MXC_Error_Codes "Error Code" if an error occurred. + * @return ErrorCode An @ref MXC_Error_Codes "Error Code" if an error occured. */ int AES_ECBOp(const uint8_t *in, uint8_t *out, mxc_aes_mode_t mode, mxc_aes_dir_t dir); @@ -143,7 +143,7 @@ int AES_ECBOp(const uint8_t *in, uint8_t *out, mxc_aes_mode_t mode, mxc_aes_dir_ * @return #E_SUCCESS Output data was written to the location pointed * to by @a *out. * @return A @ref MXC_Error_Codes "Error Code" indicating the error that - * occurred. + * occured. */ int AES_GetOutput(uint8_t *out); diff --git a/targets/TARGET_Maxim/TARGET_MAX32630/mxc/tmr_utils.h b/targets/TARGET_Maxim/TARGET_MAX32630/mxc/tmr_utils.h index 19c92ae994..c401ff04ed 100644 --- a/targets/TARGET_Maxim/TARGET_MAX32630/mxc/tmr_utils.h +++ b/targets/TARGET_Maxim/TARGET_MAX32630/mxc/tmr_utils.h @@ -83,7 +83,7 @@ void TMR_Delay(mxc_tmr_regs_t* tmr, unsigned long us); void TMR_TO_Start(mxc_tmr_regs_t* tmr, unsigned long us); /** - * @brief Check if the timeout has occurred. + * @brief Check if the timeout has occured. * @param tmr TMR module to operate on * @return #E_NO_ERROR if the timeout has not occurred, #E_TIME_OUT if it has. */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/sdk/softdevice/s130/headers/nrf_ble_gattc.h b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/sdk/softdevice/s130/headers/nrf_ble_gattc.h index 634da43bcb..5aa20fe430 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/sdk/softdevice/s130/headers/nrf_ble_gattc.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/sdk/softdevice/s130/headers/nrf_ble_gattc.h @@ -283,7 +283,7 @@ typedef struct /**@brief GATTC event structure. */ typedef struct { - uint16_t conn_handle; /**< Connection Handle on which event occurred. */ + uint16_t conn_handle; /**< Connection Handle on which event occured. */ uint16_t gatt_status; /**< GATT status code for the operation, see @ref BLE_GATT_STATUS_CODES. */ uint16_t error_handle; /**< In case of error: The handle causing the error. In all other cases @ref BLE_GATT_HANDLE_INVALID. */ union diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/sdk/softdevice/s130/headers/nrf_ble_l2cap.h b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/sdk/softdevice/s130/headers/nrf_ble_l2cap.h index e3fb2177cf..57d3592969 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/sdk/softdevice/s130/headers/nrf_ble_l2cap.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/sdk/softdevice/s130/headers/nrf_ble_l2cap.h @@ -119,7 +119,7 @@ typedef struct /**@brief L2CAP event callback event structure. */ typedef struct { - uint16_t conn_handle; /**< Connection Handle on which event occurred. */ + uint16_t conn_handle; /**< Connection Handle on which event occured. */ union { ble_l2cap_evt_rx_t rx; /**< RX Event parameters. */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/sdk/softdevice/s132/headers/nrf_ble_gattc.h b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/sdk/softdevice/s132/headers/nrf_ble_gattc.h index 634da43bcb..5aa20fe430 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/sdk/softdevice/s132/headers/nrf_ble_gattc.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/sdk/softdevice/s132/headers/nrf_ble_gattc.h @@ -283,7 +283,7 @@ typedef struct /**@brief GATTC event structure. */ typedef struct { - uint16_t conn_handle; /**< Connection Handle on which event occurred. */ + uint16_t conn_handle; /**< Connection Handle on which event occured. */ uint16_t gatt_status; /**< GATT status code for the operation, see @ref BLE_GATT_STATUS_CODES. */ uint16_t error_handle; /**< In case of error: The handle causing the error. In all other cases @ref BLE_GATT_HANDLE_INVALID. */ union diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/sdk/softdevice/s132/headers/nrf_ble_l2cap.h b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/sdk/softdevice/s132/headers/nrf_ble_l2cap.h index e3fb2177cf..57d3592969 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/sdk/softdevice/s132/headers/nrf_ble_l2cap.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/sdk/softdevice/s132/headers/nrf_ble_l2cap.h @@ -119,7 +119,7 @@ typedef struct /**@brief L2CAP event callback event structure. */ typedef struct { - uint16_t conn_handle; /**< Connection Handle on which event occurred. */ + uint16_t conn_handle; /**< Connection Handle on which event occured. */ union { ble_l2cap_evt_rx_t rx; /**< RX Event parameters. */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52840/sdk/softdevice/s140/headers/nrf_ble_gattc.h b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52840/sdk/softdevice/s140/headers/nrf_ble_gattc.h index 62175952d5..eb1f7753d7 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52840/sdk/softdevice/s140/headers/nrf_ble_gattc.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52840/sdk/softdevice/s140/headers/nrf_ble_gattc.h @@ -301,7 +301,7 @@ typedef struct /**@brief GATTC event structure. */ typedef struct { - uint16_t conn_handle; /**< Connection Handle on which event occurred. */ + uint16_t conn_handle; /**< Connection Handle on which event occured. */ uint16_t gatt_status; /**< GATT status code for the operation, see @ref BLE_GATT_STATUS_CODES. */ uint16_t error_handle; /**< In case of error: The handle causing the error. In all other cases @ref BLE_GATT_HANDLE_INVALID. */ union diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52840/sdk/softdevice/s140/headers/nrf_ble_l2cap.h b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52840/sdk/softdevice/s140/headers/nrf_ble_l2cap.h index bb980764d9..d3cc747b10 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52840/sdk/softdevice/s140/headers/nrf_ble_l2cap.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52840/sdk/softdevice/s140/headers/nrf_ble_l2cap.h @@ -118,7 +118,7 @@ typedef struct /**@brief L2CAP event callback event structure. */ typedef struct { - uint16_t conn_handle; /**< Connection Handle on which event occurred. */ + uint16_t conn_handle; /**< Connection Handle on which event occured. */ union { ble_l2cap_evt_rx_t rx; /**< RX Event parameters. */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK11/ble/ble_error_log/ble_error_log.h b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK11/ble/ble_error_log/ble_error_log.h index a685ad163e..ab121c2b3c 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK11/ble/ble_error_log/ble_error_log.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK11/ble/ble_error_log/ble_error_log.h @@ -62,7 +62,7 @@ /**@brief Error Log Data structure. * * @details The structure contains the error, message/filename, line number as well as the current - * stack, at the time where an error occurred. + * stack, at the time where an error occured. */ typedef struct { @@ -82,8 +82,8 @@ typedef struct * * @param[in] err_code Error code to be logged. * @param[in] p_message Message to be written to the flash together with stack dump, usually - * the file name where the error occurred. - * @param[in] line_number Line number where the error occurred. + * the file name where the error occured. + * @param[in] line_number Line number where the error occured. * * @return NRF_SUCCESS on successful writing of the error log. * diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK11/ble/peer_manager/gattc_cache_manager.c b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK11/ble/peer_manager/gattc_cache_manager.c index d02d0a350f..e6b5469b41 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK11/ble/peer_manager/gattc_cache_manager.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK11/ble/peer_manager/gattc_cache_manager.c @@ -67,7 +67,7 @@ static void internal_state_reset(gccm_t * gccm) /**@brief Event handler for events from the peer_database module. * - * @param[in] p_event The event that has happened with peer id and flags. + * @param[in] p_event The event that has happend with peer id and flags. */ static void pdb_evt_handler(pdb_evt_t const * p_event) { diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK11/ble/peer_manager/gatts_cache_manager.c b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK11/ble/peer_manager/gatts_cache_manager.c index 25e5e7f402..8cbca8e3f1 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK11/ble/peer_manager/gatts_cache_manager.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK11/ble/peer_manager/gatts_cache_manager.c @@ -116,7 +116,7 @@ static void service_changed_pending_set(void) /**@brief Event handler for events from the peer_database module. * - * @param[in] p_event The event that has happened with peer id and flags. + * @param[in] p_event The event that has happend with peer id and flags. */ static void pdb_evt_handler(pdb_evt_t const * p_event) { diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK11/ble/peer_manager/id_manager.c b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK11/ble/peer_manager/id_manager.c index 38f20660a3..94bc363ef6 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK11/ble/peer_manager/id_manager.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK11/ble/peer_manager/id_manager.c @@ -351,7 +351,7 @@ bool is_duplicate_bonding_data(pm_peer_data_bonding_t const * p_bonding_data1, /**@brief Event handler for events from the peer_database module. * - * @param[in] p_event The event that has happened with peer id and flags. + * @param[in] p_event The event that has happend with peer id and flags. */ static void pdb_evt_handler(pdb_evt_t const * p_event) { diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK11/device/nrf52_bitfields.h b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK11/device/nrf52_bitfields.h index 6c4287f595..c7802c46a3 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK11/device/nrf52_bitfields.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK11/device/nrf52_bitfields.h @@ -13385,8 +13385,8 @@ /* Bit 0 : Overrun error */ #define TWI_ERRORSRC_OVERRUN_Pos (0UL) /*!< Position of OVERRUN field. */ #define TWI_ERRORSRC_OVERRUN_Msk (0x1UL << TWI_ERRORSRC_OVERRUN_Pos) /*!< Bit mask of OVERRUN field. */ -#define TWI_ERRORSRC_OVERRUN_NotPresent (0UL) /*!< Read: no overrun occurred */ -#define TWI_ERRORSRC_OVERRUN_Present (1UL) /*!< Read: overrun occurred */ +#define TWI_ERRORSRC_OVERRUN_NotPresent (0UL) /*!< Read: no overrun occured */ +#define TWI_ERRORSRC_OVERRUN_Present (1UL) /*!< Read: overrun occured */ /* Register: TWI_ENABLE */ /* Description: Enable TWI */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK11/libraries/bootloader_dfu/dfu_types.h b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK11/libraries/bootloader_dfu/dfu_types.h index e78723e739..7a7421d878 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK11/libraries/bootloader_dfu/dfu_types.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK11/libraries/bootloader_dfu/dfu_types.h @@ -180,10 +180,10 @@ typedef enum typedef struct { dfu_update_status_code_t status_code; /**< Device Firmware Update status. */ - uint16_t app_crc; /**< CRC of the received application. */ - uint32_t sd_size; /**< Size of the received SoftDevice. */ - uint32_t bl_size; /**< Size of the received BootLoader. */ - uint32_t app_size; /**< Size of the received Application. */ + uint16_t app_crc; /**< CRC of the recieved application. */ + uint32_t sd_size; /**< Size of the recieved SoftDevice. */ + uint32_t bl_size; /**< Size of the recieved BootLoader. */ + uint32_t app_size; /**< Size of the recieved Application. */ uint32_t sd_image_start; /**< Location in flash where the received SoftDevice image is stored. */ } dfu_update_status_t; diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK13/ble/ble_error_log/ble_error_log.h b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK13/ble/ble_error_log/ble_error_log.h index 0b8e540d59..9a7556f983 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK13/ble/ble_error_log/ble_error_log.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK13/ble/ble_error_log/ble_error_log.h @@ -65,7 +65,7 @@ extern "C" { /**@brief Error Log Data structure. * * @details The structure contains the error, message/filename, line number as well as the current - * stack, at the time where an error occurred. + * stack, at the time where an error occured. */ typedef struct { @@ -85,8 +85,8 @@ typedef struct * * @param[in] err_code Error code to be logged. * @param[in] p_message Message to be written to the flash together with stack dump, usually - * the file name where the error occurred. - * @param[in] line_number Line number where the error occurred. + * the file name where the error occured. + * @param[in] line_number Line number where the error occured. * * @return NRF_SUCCESS on successful writing of the error log. * diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK13/ble/peer_manager/gatts_cache_manager.c b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK13/ble/peer_manager/gatts_cache_manager.c index 3aba5f7a76..3f4ac47060 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK13/ble/peer_manager/gatts_cache_manager.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK13/ble/peer_manager/gatts_cache_manager.c @@ -126,7 +126,7 @@ static void service_changed_pending_set(void) /**@brief Event handler for events from the Peer Database module. * This function is extern in Peer Database. * - * @param[in] p_event The event that has happened with peer id and flags. + * @param[in] p_event The event that has happend with peer id and flags. */ void gscm_pdb_evt_handler(pdb_evt_t const * p_event) { diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK13/ble/peer_manager/id_manager.c b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK13/ble/peer_manager/id_manager.c index fa565c8520..03cf432591 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK13/ble/peer_manager/id_manager.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK13/ble/peer_manager/id_manager.c @@ -365,7 +365,7 @@ bool im_is_duplicate_bonding_data(pm_peer_data_bonding_t const * p_bonding_data1 /**@brief Event handler for events from the Peer Database module. * This function is extern in Peer Database. * - * @param[in] p_event The event that has happened with peer id and flags. + * @param[in] p_event The event that has happend with peer id and flags. */ void im_pdb_evt_handler(pdb_evt_t const * p_event) { diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK13/device/nrf52840_bitfields.h b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK13/device/nrf52840_bitfields.h index ac856b8628..3c71d50578 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK13/device/nrf52840_bitfields.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK13/device/nrf52840_bitfields.h @@ -11762,8 +11762,8 @@ /* Bit 0 : Overrun error */ #define TWI_ERRORSRC_OVERRUN_Pos (0UL) /*!< Position of OVERRUN field. */ #define TWI_ERRORSRC_OVERRUN_Msk (0x1UL << TWI_ERRORSRC_OVERRUN_Pos) /*!< Bit mask of OVERRUN field. */ -#define TWI_ERRORSRC_OVERRUN_NotPresent (0UL) /*!< Read: no overrun occurred */ -#define TWI_ERRORSRC_OVERRUN_Present (1UL) /*!< Read: overrun occurred */ +#define TWI_ERRORSRC_OVERRUN_NotPresent (0UL) /*!< Read: no overrun occured */ +#define TWI_ERRORSRC_OVERRUN_Present (1UL) /*!< Read: overrun occured */ /* Register: TWI_ENABLE */ /* Description: Enable TWI */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK13/device/nrf52_bitfields.h b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK13/device/nrf52_bitfields.h index c6fa759ecb..9debbb6a26 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK13/device/nrf52_bitfields.h +++ b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK13/device/nrf52_bitfields.h @@ -11114,8 +11114,8 @@ /* Bit 0 : Overrun error */ #define TWI_ERRORSRC_OVERRUN_Pos (0UL) /*!< Position of OVERRUN field. */ #define TWI_ERRORSRC_OVERRUN_Msk (0x1UL << TWI_ERRORSRC_OVERRUN_Pos) /*!< Bit mask of OVERRUN field. */ -#define TWI_ERRORSRC_OVERRUN_NotPresent (0UL) /*!< Read: no overrun occurred */ -#define TWI_ERRORSRC_OVERRUN_Present (1UL) /*!< Read: overrun occurred */ +#define TWI_ERRORSRC_OVERRUN_NotPresent (0UL) /*!< Read: no overrun occured */ +#define TWI_ERRORSRC_OVERRUN_Present (1UL) /*!< Read: overrun occured */ #define TWI_ERRORSRC_OVERRUN_Clear (1UL) /*!< Write: clear error on writing '1' */ /* Register: TWI_ENABLE */ diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/serial_api.c b/targets/TARGET_NORDIC/TARGET_NRF5/serial_api.c index 38dea91aa1..0835c51765 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5/serial_api.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5/serial_api.c @@ -112,7 +112,7 @@ typedef struct { void (*tx_asynch_handler)(); uint32_t events_wanted; - uint32_t events_occurred; + uint32_t events_occured; #define UART_IRQ_TX 1 #define UART_IRQ_RX 2 @@ -165,13 +165,13 @@ void UART_IRQ_HANDLER(void) if (UART_CB.char_match != SERIAL_RESERVED_CHAR_MATCH && rx_data == UART_CB.char_match) { // If it does, report the match and abort further receiving. - UART_CB.events_occurred |= SERIAL_EVENT_RX_CHARACTER_MATCH; + UART_CB.events_occured |= SERIAL_EVENT_RX_CHARACTER_MATCH; if (UART_CB.events_wanted & SERIAL_EVENT_RX_CHARACTER_MATCH) { end_rx = true; } } if (++UART_CB.rx_pos >= UART_CB.rx_length) { - UART_CB.events_occurred |= SERIAL_EVENT_RX_COMPLETE; + UART_CB.events_occured |= SERIAL_EVENT_RX_COMPLETE; end_rx = true; } if (end_rx) { @@ -215,7 +215,7 @@ void UART_IRQ_HANDLER(void) // 'serial_writable' function to work properly. end_asynch_tx(); - UART_CB.events_occurred |= SERIAL_EVENT_TX_COMPLETE; + UART_CB.events_occured |= SERIAL_EVENT_TX_COMPLETE; if (UART_CB.tx_asynch_handler) { // Use local variable to make it possible to start a next // transfer from callback routine. @@ -239,15 +239,15 @@ void UART_IRQ_HANDLER(void) uint8_t errorsrc = nrf_uart_errorsrc_get_and_clear(UART_INSTANCE); if (UART_CB.rx_asynch_handler) { - UART_CB.events_occurred |= SERIAL_EVENT_ERROR; + UART_CB.events_occured |= SERIAL_EVENT_ERROR; if (errorsrc & NRF_UART_ERROR_PARITY_MASK) { - UART_CB.events_occurred |= SERIAL_EVENT_RX_PARITY_ERROR; + UART_CB.events_occured |= SERIAL_EVENT_RX_PARITY_ERROR; } if (errorsrc & NRF_UART_ERROR_FRAMING_MASK) { - UART_CB.events_occurred |= SERIAL_EVENT_RX_FRAMING_ERROR; + UART_CB.events_occured |= SERIAL_EVENT_RX_FRAMING_ERROR; } if (errorsrc & NRF_UART_ERROR_OVERRUN_MASK) { - UART_CB.events_occurred |= SERIAL_EVENT_RX_OVERRUN_ERROR; + UART_CB.events_occured |= SERIAL_EVENT_RX_OVERRUN_ERROR; } UART_CB.rx_asynch_handler(); } @@ -641,8 +641,8 @@ uint8_t serial_rx_active(serial_t *obj) int serial_irq_handler_asynch(serial_t *obj) { (void)obj; - uint32_t events_to_report = UART_CB.events_wanted & UART_CB.events_occurred; - UART_CB.events_occurred &= (~events_to_report); + uint32_t events_to_report = UART_CB.events_wanted & UART_CB.events_occured; + UART_CB.events_occured &= (~events_to_report); return events_to_report; } diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/sleep.c b/targets/TARGET_NORDIC/TARGET_NRF5/sleep.c index 7bb2d85f4c..f806e7a0a6 100644 --- a/targets/TARGET_NORDIC/TARGET_NRF5/sleep.c +++ b/targets/TARGET_NORDIC/TARGET_NRF5/sleep.c @@ -66,7 +66,7 @@ void hal_sleep(void) return; } else { // next event will wakeup the CPU - // If an interrupt occurred between the test of SCB->ICSR and this + // If an interrupt occured between the test of SCB->ICSR and this // instruction, WFE will just not put the CPU to sleep __WFE(); } diff --git a/targets/TARGET_NUVOTON/TARGET_M480/device/M480.h b/targets/TARGET_NUVOTON/TARGET_M480/device/M480.h index 24e169925f..d3e5669df7 100644 --- a/targets/TARGET_NUVOTON/TARGET_M480/device/M480.h +++ b/targets/TARGET_NUVOTON/TARGET_M480/device/M480.h @@ -3469,7 +3469,7 @@ typedef struct { * | | |Note2: This bit is write protected. Refer to the SYS_REGLCTL register. * |[6] |PDWKIF |Power-down Mode Wake-up Interrupt Status * | | |Set by "Power-down wake-up event", it indicates that resume from Power-down mode. - * | | |The flag is set if any wake-up source has occurred. Refer Power Modes and Wake-up Sources chapter. + * | | |The flag is set if any wake-up source is occurred. Refer Power Modes and Wake-up Sources chapter. * | | |Note1: Write 1 to clear the bit to 0. * | | |Note2: This bit works only if PDWKIEN (CLK_PWRCTL[5]) set to 1. * |[7] |PDEN |System Power-down Enable (Write Protect) @@ -25914,7 +25914,7 @@ typedef struct { * | | |0 = DMA Disabled. * | | |1 = DMA Enabled. * | | |If this bit is cleared, DMA will ignore all requests from SD host and force bus master into IDLE state. - * | | |Note: If target abort has occurred, DMAEN will be cleared. + * | | |Note: If target abort is occurred, DMAEN will be cleared. * |[1] |DMARST |Software Engine Reset * | | |0 = No effect. * | | |1 = Reset internal state machine and pointers @@ -26006,7 +26006,7 @@ typedef struct { * | :----: | :----: | :---- | * |[0] |DTAIF |DMA READ/WRITE Target Abort Interrupt Flag (Read Only) * | | |This bit indicates DMA received an ERROR response from internal AHB bus during DMA read/write operation - * | | |When Target Abort has occurred, please reset all engine. + * | | |When Target Abort is occurred, please reset all engine. * | | |0 = No bus ERROR response received. * | | |1 = Bus ERROR response received. * | | |Note: This bit is read only, but can be cleared by writing '1' to it. @@ -26119,12 +26119,12 @@ typedef struct { * | | |Note: This bit is read only, but can be cleared by writing '1' to it. * |[1] |CRCIF |CRC7, CRC16 and CRC Status Error Interrupt Flag (Read Only) * | | |This bit indicates that SD host has occurred CRC error during response in, data-in or data-out (CRC status error) transfer - * | | |When CRC error has occurred, software should reset SD engine + * | | |When CRC error is occurred, software should reset SD engine * | | |Some response (ex * | | |R3) doesn't have CRC7 information with it; SD host will still calculate CRC7, get CRC error and set this flag * | | |In this condition, software should ignore CRC error and clears this bit manually. - * | | |0 = No CRC error has occurred. - * | | |1 = CRC error has occurred. + * | | |0 = No CRC error is occurred. + * | | |1 = CRC error is occurred. * | | |Note: This bit is read only, but can be cleared by writing '1' to it. * |[2] |CRC7 |CRC7 Check Status (Read Only) * | | |SD host will check CRC7 correctness during each response in @@ -27705,60 +27705,60 @@ typedef struct { * | | |This bit conveys the interrupt status for USB specific events endpoint * | | |When set, USB interrupt status register should be read to determine the cause of the interrupt. * | | |0 = No interrupt event occurred. - * | | |1 = The related interrupt event has occurred. + * | | |1 = The related interrupt event is occurred. * |[1] |CEPIF |Control Endpoint Interrupt * | | |This bit conveys the interrupt status for control endpoint * | | |When set, Control-ep's interrupt status register should be read to determine the cause of the interrupt. * | | |0 = No interrupt event occurred. - * | | |1 = The related interrupt event has occurred. + * | | |1 = The related interrupt event is occurred. * |[2] |EPAIF |Endpoint a Interrupt * | | |When set, the corresponding Endpoint A's interrupt status register should be read to determine the cause of the interrupt. * | | |0 = No interrupt event occurred. - * | | |1 = The related interrupt event has occurred. + * | | |1 = The related interrupt event is occurred. * |[3] |EPBIF |Endpoint B Interrupt * | | |When set, the corresponding Endpoint B's interrupt status register should be read to determine the cause of the interrupt. * | | |0 = No interrupt event occurred. - * | | |1 = The related interrupt event has occurred. + * | | |1 = The related interrupt event is occurred. * |[4] |EPCIF |Endpoint C Interrupt * | | |When set, the corresponding Endpoint C's interrupt status register should be read to determine the cause of the interrupt. * | | |0 = No interrupt event occurred. - * | | |1 = The related interrupt event has occurred. + * | | |1 = The related interrupt event is occurred. * |[5] |EPDIF |Endpoint D Interrupt * | | |When set, the corresponding Endpoint D's interrupt status register should be read to determine the cause of the interrupt. * | | |0 = No interrupt event occurred. - * | | |1 = The related interrupt event has occurred. + * | | |1 = The related interrupt event is occurred. * |[6] |EPEIF |Endpoint E Interrupt * | | |When set, the corresponding Endpoint E's interrupt status register should be read to determine the cause of the interrupt. * | | |0 = No interrupt event occurred. - * | | |1 = The related interrupt event has occurred. + * | | |1 = The related interrupt event is occurred. * |[7] |EPFIF |Endpoint F Interrupt * | | |When set, the corresponding Endpoint F's interrupt status register should be read to determine the cause of the interrupt. * | | |0 = No interrupt event occurred. - * | | |1 = The related interrupt event has occurred. + * | | |1 = The related interrupt event is occurred. * |[8] |EPGIF |Endpoint G Interrupt * | | |When set, the corresponding Endpoint G's interrupt status register should be read to determine the cause of the interrupt. * | | |0 = No interrupt event occurred. - * | | |1 = The related interrupt event has occurred. + * | | |1 = The related interrupt event is occurred. * |[9] |EPHIF |Endpoint H Interrupt * | | |When set, the corresponding Endpoint H's interrupt status register should be read to determine the cause of the interrupt. * | | |0 = No interrupt event occurred. - * | | |1 = The related interrupt event has occurred. + * | | |1 = The related interrupt event is occurred. * |[10] |EPIIF |Endpoint I Interrupt * | | |When set, the corresponding Endpoint I's interrupt status register should be read to determine the cause of the interrupt. * | | |0 = No interrupt event occurred. - * | | |1 = The related interrupt event has occurred. + * | | |1 = The related interrupt event is occurred. * |[11] |EPJIF |Endpoint J Interrupt * | | |When set, the corresponding Endpoint J's interrupt status register should be read to determine the cause of the interrupt. * | | |0 = No interrupt event occurred. - * | | |1 = The related interrupt event has occurred. + * | | |1 = The related interrupt event is occurred. * |[12] |EPKIF |Endpoint K Interrupt * | | |When set, the corresponding Endpoint K's interrupt status register should be read to determine the cause of the interrupt. * | | |0 = No interrupt event occurred. - * | | |1 = The related interrupt event has occurred. + * | | |1 = The related interrupt event is occurred. * |[13] |EPLIF |Endpoint L Interrupt * | | |When set, the corresponding Endpoint L's interrupt status register should be read to determine the cause of the interrupt. * | | |0 = No interrupt event occurred. - * | | |1 = The related interrupt event has occurred. + * | | |1 = The related interrupt event is occurred. * @var HSUSBD_T::GINTEN * Offset: 0x08 Global Interrupt Enable Register * --------------------------------------------------------------------------------------------------- diff --git a/targets/TARGET_NUVOTON/TARGET_NANO100/device/Nano100Series.h b/targets/TARGET_NUVOTON/TARGET_NANO100/device/Nano100Series.h index f661a3c4b5..6a6520e57c 100644 --- a/targets/TARGET_NUVOTON/TARGET_NANO100/device/Nano100Series.h +++ b/targets/TARGET_NUVOTON/TARGET_NANO100/device/Nano100Series.h @@ -10976,18 +10976,18 @@ typedef struct { * |[0] |BUS_STS |BUS Interrupt Status * | | |The BUS event means there is bus suspense or bus resume in the bus. * | | |This bit is used to indicate that there is one of events in the bus. - * | | |0 = No BUS event has occurred. + * | | |0 = No BUS event is occurred. * | | |1 = BUS event occurred; check USB_BUSSTS [3:0] to know which kind of bus event was occurred, cleared by write "1" to USB_INTSTS [0]. * |[1] |USB_STS |USB Interrupt Status * | | |The USB event means that there is Setup Token, IN token, OUT ACK, ISO IN, or ISO OUT event in the bus. * | | |This bit is used to indicate that there is one of events in the bus. - * | | |0 = No USB event has occurred. + * | | |0 = No USB event is occurred. * | | |1 = USB event occurred, check EPSTS0~7[3:0] in USB_EPSTS [31:8] to know which kind of USB event was occurred, cleared by write "1" to USB_INTSTS [1] or USB_INTSTS[31] or EPEVT0~7. * |[2] |FLD_STS |Floating Interrupt Status * | | |0 = There is not attached event in the USB. * | | |1 = There is attached event in the USB and it is cleared by write "1" to USB_INTSTS [2]. * |[3] |WKEUP_STS |Wake-Up Interrupt Status - * | | |0 = No wake-up event has occurred. + * | | |0 = No wake-up event is occurred. * | | |1 = Wake-up event occurred, cleared by write 1 to USB_INTSTS [3]. * |[16] |EPEVT0 |USB Event Status On EP0 * | | |0 = No event occurred in Endpoint 0. diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/NUC472_442.h b/targets/TARGET_NUVOTON/TARGET_NUC472/device/NUC472_442.h index 762f35c936..00af9638de 100644 --- a/targets/TARGET_NUVOTON/TARGET_NUC472/device/NUC472_442.h +++ b/targets/TARGET_NUVOTON/TARGET_NUC472/device/NUC472_442.h @@ -20502,7 +20502,7 @@ typedef struct { * | | |Note: This bit is only cleared by writing 1 to it. * |[2] |OVUNF |QEI Counter Overflow Or Underflow Flag * | | |Flag is set by hardware while QEI_CNT overflows from 0xFFFF_FFFF to zero in free-counting mode or from the QEI_MAXCNT value to zero in compare-counting mode. - * | | |Similarly, the flag is set while QEI counter underflows from zero to 0xFFFF_FFFF or QEI_MAXCNT. + * | | |Similarly, the flag is set wile QEI counter underflows from zero to 0xFFFF_FFFF or QEI_MAXCNT. * | | |0 = No overflow or underflow occurs in QEI counter. * | | |1 = QEI counter occurs counting overflow or underflow. * | | |Note: This bit is only cleared by writing 1 to it. @@ -22305,7 +22305,7 @@ typedef struct { * | | |0 = DMA Disabled. * | | |1 = DMA Enabled. * | | |If this bit is cleared, DMA will ignore all requests from SD host and force bus master into IDLE state. - * | | |Note: If target abort has occurred, DMAEN will be cleared. + * | | |Note: If target abort is occurred, DMAEN will be cleared. * |[1] |DMARST |Software Engine Reset * | | |0 = No effect. * | | |1 = Reset internal state machine and pointers. @@ -22432,7 +22432,7 @@ typedef struct { * | :----: | :----: | :---- | * |[0] |DTAIF |DMA READ/WRITE Target Abort Interrupt Flag (Read Only) * | | |This bit indicates DMA received an ERROR response from internal AHB bus during DMA read/write operation. - * | | |When Target Abort has occurred, please reset all engine. + * | | |When Target Abort is occurred, please reset all engine. * | | |0 = No bus ERROR response received. * | | |1 = Bus ERROR response received. * | | |Note: This bit is read only, but can be cleared by writing '1' to it. @@ -22583,12 +22583,12 @@ typedef struct { * | | |Note: This bit is read only, but can be cleared by writing '1' to it. * |[1] |CRCIF |CRC7, CRC16 And CRC Status Error Interrupt Flag (Read Only) * | | |This bit indicates that SD host has occurred CRC error during response in, data-in or data-out (CRC status error) transfer. - * | | |When CRC error has occurred, software should reset SD engine. + * | | |When CRC error is occurred, software should reset SD engine. * | | |Some response (ex. * | | |R3) doesn't have CRC7 information with it; SD host will still calculate CRC7, get CRC error and set this flag. * | | |In this condition, software should ignore CRC error and clears this bit manually. - * | | |0 = No CRC error has occurred. - * | | |1 = CRC error has occurred. + * | | |0 = No CRC error is occurred. + * | | |1 = CRC error is occurred. * | | |Note: This bit is read only, but can be cleared by writing '1' to it. * |[2] |CRC7 |CRC7 Check Status (Read Only) * | | |SD host will check CRC7 correctness during each response in. @@ -27165,60 +27165,60 @@ typedef struct { * | | |This bit conveys the interrupt status for USB specific events endpoint. * | | |When set, USB interrupt status register should be read to determine the cause of the interrupt. * | | |0 = No interrupt event occurred. - * | | |1 = The related interrupt event has occurred. + * | | |1 = The related interrupt event is occurred. * |[1] |CEPIF |Control Endpoint Interrupt * | | |This bit conveys the interrupt status for control endpoint. * | | |When set, Control-ep's interrupt status register should be read to determine the cause of the interrupt. * | | |0 = No interrupt event occurred. - * | | |1 = The related interrupt event has occurred. + * | | |1 = The related interrupt event is occurred. * |[2] |EPAIF |Endpoints A Interrupt * | | |When set, the corresponding Endpoint A's interrupt status register should be read to determine the cause of the interrupt. * | | |0 = No interrupt event occurred. - * | | |1 = The related interrupt event has occurred. + * | | |1 = The related interrupt event is occurred. * |[3] |EPBIF |Endpoints B Interrupt * | | |When set, the corresponding Endpoint B's interrupt status register should be read to determine the cause of the interrupt. * | | |0 = No interrupt event occurred. - * | | |1 = The related interrupt event has occurred. + * | | |1 = The related interrupt event is occurred. * |[4] |EPCIF |Endpoints C Interrupt * | | |When set, the corresponding Endpoint C's interrupt status register should be read to determine the cause of the interrupt. * | | |0 = No interrupt event occurred. - * | | |1 = The related interrupt event has occurred. + * | | |1 = The related interrupt event is occurred. * |[5] |EPDIF |Endpoints D Interrupt * | | |When set, the corresponding Endpoint D's interrupt status register should be read to determine the cause of the interrupt. * | | |0 = No interrupt event occurred. - * | | |1 = The related interrupt event has occurred. + * | | |1 = The related interrupt event is occurred. * |[6] |EPEIF |Endpoints E Interrupt * | | |When set, the corresponding Endpoint E's interrupt status register should be read to determine the cause of the interrupt. * | | |0 = No interrupt event occurred. - * | | |1 = The related interrupt event has occurred. + * | | |1 = The related interrupt event is occurred. * |[7] |EPFIF |Endpoints F Interrupt * | | |When set, the corresponding Endpoint F's interrupt status register should be read to determine the cause of the interrupt. * | | |0 = No interrupt event occurred. - * | | |1 = The related interrupt event has occurred. + * | | |1 = The related interrupt event is occurred. * |[8] |EPGIF |Endpoints G Interrupt * | | |When set, the corresponding Endpoint G's interrupt status register should be read to determine the cause of the interrupt. * | | |0 = No interrupt event occurred. - * | | |1 = The related interrupt event has occurred. + * | | |1 = The related interrupt event is occurred. * |[9] |EPHIF |Endpoints H Interrupt * | | |When set, the corresponding Endpoint H's interrupt status register should be read to determine the cause of the interrupt. * | | |0 = No interrupt event occurred. - * | | |1 = The related interrupt event has occurred. + * | | |1 = The related interrupt event is occurred. * |[10] |EPIIF |Endpoints I Interrupt * | | |When set, the corresponding Endpoint I's interrupt status register should be read to determine the cause of the interrupt. * | | |0 = No interrupt event occurred. - * | | |1 = The related interrupt event has occurred. + * | | |1 = The related interrupt event is occurred. * |[11] |EPJIF |Endpoints J Interrupt * | | |When set, the corresponding Endpoint J's interrupt status register should be read to determine the cause of the interrupt. * | | |0 = No interrupt event occurred. - * | | |1 = The related interrupt event has occurred. + * | | |1 = The related interrupt event is occurred. * |[12] |EPKIF |Endpoints K Interrupt * | | |When set, the corresponding Endpoint K's interrupt status register should be read to determine the cause of the interrupt. * | | |0 = No interrupt event occurred. - * | | |1 = The related interrupt event has occurred. + * | | |1 = The related interrupt event is occurred. * |[13] |EPLIF |Endpoints L Interrupt * | | |When set, the corresponding Endpoint L's interrupt status register should be read to determine the cause of the interrupt. * | | |0 = No interrupt event occurred. - * | | |1 = The related interrupt event has occurred. + * | | |1 = The related interrupt event is occurred. */ __I uint32_t GINTSTS; uint32_t RESERVE0[1]; diff --git a/targets/TARGET_NXP/TARGET_LPC11U6X/i2c_api.c b/targets/TARGET_NXP/TARGET_LPC11U6X/i2c_api.c index f0e53c483e..84eeed8f93 100644 --- a/targets/TARGET_NXP/TARGET_LPC11U6X/i2c_api.c +++ b/targets/TARGET_NXP/TARGET_LPC11U6X/i2c_api.c @@ -204,7 +204,7 @@ void i2c_frequency(i2c_t *obj, int hz) { // 2) on error, we use the standard error mechanisms to report/debug // // Therefore an I2C transaction should always complete. If it doesn't it is usually -// because something is setup wrong (e.g. wiring), and we don't need to programmatically +// because something is setup wrong (e.g. wiring), and we don't need to programatically // check for that int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) { diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/i2c_api.c b/targets/TARGET_NXP/TARGET_LPC11UXX/i2c_api.c index 5bfd6433e1..4c5202d6bc 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/i2c_api.c +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/i2c_api.c @@ -187,7 +187,7 @@ void i2c_frequency(i2c_t *obj, int hz) { // 2) on error, we use the standard error mechanisms to report/debug // // Therefore an I2C transaction should always complete. If it doesn't it is usually -// because something is setup wrong (e.g. wiring), and we don't need to programmatically +// because something is setup wrong (e.g. wiring), and we don't need to programatically // check for that int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) { diff --git a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/i2c_api.c b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/i2c_api.c index 21976fb217..52f6f4486e 100644 --- a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/i2c_api.c +++ b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/i2c_api.c @@ -197,7 +197,7 @@ void i2c_frequency(i2c_t *obj, int hz) { // 2) on error, we use the standard error mechanisms to report/debug // // Therefore an I2C transaction should always complete. If it doesn't it is usually -// because something is setup wrong (e.g. wiring), and we don't need to programmatically +// because something is setup wrong (e.g. wiring), and we don't need to programatically // check for that int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) { diff --git a/targets/TARGET_NXP/TARGET_LPC13XX/i2c_api.c b/targets/TARGET_NXP/TARGET_LPC13XX/i2c_api.c index 97fbb29018..415ef071af 100644 --- a/targets/TARGET_NXP/TARGET_LPC13XX/i2c_api.c +++ b/targets/TARGET_NXP/TARGET_LPC13XX/i2c_api.c @@ -197,7 +197,7 @@ void i2c_frequency(i2c_t *obj, int hz) { // 2) on error, we use the standard error mechanisms to report/debug // // Therefore an I2C transaction should always complete. If it doesn't it is usually -// because something is setup wrong (e.g. wiring), and we don't need to programmatically +// because something is setup wrong (e.g. wiring), and we don't need to programatically // check for that int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) { diff --git a/targets/TARGET_NXP/TARGET_LPC176X/ethernet_api.c b/targets/TARGET_NXP/TARGET_LPC176X/ethernet_api.c index d98ca77a69..0b4b7a8312 100644 --- a/targets/TARGET_NXP/TARGET_LPC176X/ethernet_api.c +++ b/targets/TARGET_NXP/TARGET_LPC176X/ethernet_api.c @@ -172,7 +172,7 @@ typedef struct TX_STAT_TypeDef TX_STAT_TypeDef; #define TSV0_PKT_DEFER 0x00000040 /* Packet Deferred */ #define TSV0_EXC_DEFER 0x00000080 /* Excessive Packet Deferral */ #define TSV0_EXC_COLL 0x00000100 /* Excessive Collision */ -#define TSV0_LATE_COLL 0x00000200 /* Late Collision Occurred */ +#define TSV0_LATE_COLL 0x00000200 /* Late Collision Occured */ #define TSV0_GIANT 0x00000400 /* Giant Frame */ #define TSV0_UNDERRUN 0x00000800 /* Buffer Underrun */ #define TSV0_BYTES 0x0FFFF000 /* Total Bytes Transferred */ @@ -268,7 +268,7 @@ typedef struct TX_STAT_TypeDef TX_STAT_TypeDef; #define RINFO_OVERRUN 0x10000000 /* Receive overrun */ #define RINFO_NO_DESCR 0x20000000 /* No new Descriptor available */ #define RINFO_LAST_FLAG 0x40000000 /* Last Fragment in Frame */ -#define RINFO_ERR 0x80000000 /* Error Occurred (OR of all errors) */ +#define RINFO_ERR 0x80000000 /* Error Occured (OR of all errors) */ //#define RINFO_ERR_MASK (RINFO_FAIL_FILT | RINFO_CRC_ERR | RINFO_SYM_ERR | RINFO_LEN_ERR | RINFO_ALIGN_ERR | RINFO_OVERRUN) #define RINFO_ERR_MASK (RINFO_FAIL_FILT | RINFO_SYM_ERR | \ @@ -289,10 +289,10 @@ typedef struct TX_STAT_TypeDef TX_STAT_TypeDef; #define TINFO_DEFER 0x02000000 /* Packet Deferred (not an error) */ #define TINFO_EXCESS_DEF 0x04000000 /* Excessive Deferral */ #define TINFO_EXCESS_COL 0x08000000 /* Excessive Collision */ -#define TINFO_LATE_COL 0x10000000 /* Late Collision Occurred */ +#define TINFO_LATE_COL 0x10000000 /* Late Collision Occured */ #define TINFO_UNDERRUN 0x20000000 /* Transmit Underrun */ #define TINFO_NO_DESCR 0x40000000 /* No new Descriptor available */ -#define TINFO_ERR 0x80000000 /* Error Occurred (OR of all errors) */ +#define TINFO_ERR 0x80000000 /* Error Occured (OR of all errors) */ /* ENET Device Revision ID */ #define OLD_EMAC_MODULE_ID 0x39022000 /* Rev. ID for first rev '-' */ @@ -303,7 +303,7 @@ typedef struct TX_STAT_TypeDef TX_STAT_TypeDef; #define PHY_REG_IDR1 0x02 /* PHY Identifier 1 */ #define PHY_REG_IDR2 0x03 /* PHY Identifier 2 */ #define PHY_REG_ANAR 0x04 /* Auto-Negotiation Advertisement */ -#define PHY_REG_ANLPAR 0x05 /* Auto-Neg. Link Partner Ability */ +#define PHY_REG_ANLPAR 0x05 /* Auto-Neg. Link Partner Abitily */ #define PHY_REG_ANER 0x06 /* Auto-Neg. Expansion Register */ #define PHY_REG_ANNPTR 0x07 /* Auto-Neg. Next Page TX */ @@ -540,8 +540,8 @@ void ethernet_free() { // if(TxProduceIndex == TxConsumeIndex) buffer array is empty // if(TxProduceIndex == TxConsumeIndex - 1) buffer is full, should not fill -// TxProduceIndex - The buffer that will be / is being fileld by driver, s/w increment -// TxConsumeIndex - The buffer that will be / is being sent by hardware +// TxProduceIndex - The buffer that will/is being fileld by driver, s/w increment +// TxConsumeIndex - The buffer that will/is beign sent by hardware int ethernet_write(const char *data, int slen) { @@ -651,22 +651,22 @@ int ethernet_send() { #endif } -// RxConsmeIndex - The index of buffer the driver will read / is reading from. Driver should inc once read -// RxProduceIndex - The index of buffer that will be / is being filled by MAC. H/w will inc once rxd +// RxConsmeIndex - The index of buffer the driver will/is reading from. Driver should inc once read +// RxProduceIndex - The index of buffer that will/is being filled by MAC. H/w will inc once rxd // // if(RxConsumeIndex == RxProduceIndex) buffer array is empty // if(RxConsumeIndex == RxProduceIndex + 1) buffer array is full -// Receives an arrived ethernet packet. +// Recevies an arrived ethernet packet. // Receiving an ethernet packet will drop the last received ethernet packet // and make a new ethernet packet ready to read. // Returns size of packet, else 0 if nothing to receive // We read from RxConsumeIndex from position rx_consume_offset -// if rx_consume_offset < 0, then we have not received the RxConsumeIndex packet for reading +// if rx_consume_offset < 0, then we have not recieved the RxConsumeIndex packet for reading // rx_consume_offset = -1 // no frame // rx_consume_offset = 0 // start of frame -// Assumption: A fragment should always be a whole frame +// Assumption: A fragment should alway be a whole frame int ethernet_receive() { #if NEW_LOGIC @@ -722,11 +722,11 @@ int ethernet_receive() { #endif } -// Read from an received ethernet packet. -// After receive returned a number bigger than 0 it is +// Read from an recevied ethernet packet. +// After receive returnd a number bigger than 0 it is // possible to read bytes from this packet. // Read will write up to size bytes into data. -// It is possible to use read multiple times. +// It is possible to use read multible times. // Each time read will start reading after the last read byte before. int ethernet_read(char *data, int dlen) { diff --git a/targets/TARGET_NXP/TARGET_LPC176X/i2c_api.c b/targets/TARGET_NXP/TARGET_LPC176X/i2c_api.c index fde4e8e746..fb2ed1656a 100644 --- a/targets/TARGET_NXP/TARGET_LPC176X/i2c_api.c +++ b/targets/TARGET_NXP/TARGET_LPC176X/i2c_api.c @@ -204,7 +204,7 @@ void i2c_frequency(i2c_t *obj, int hz) { // 2) on error, we use the standard error mechanisms to report/debug // // Therefore an I2C transaction should always complete. If it doesn't it is usually -// because something is setup wrong (e.g. wiring), and we don't need to programmatically +// because something is setup wrong (e.g. wiring), and we don't need to programatically // check for that int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) { diff --git a/targets/TARGET_NXP/TARGET_LPC408X/TARGET_LPC4088/ethernet_api.c b/targets/TARGET_NXP/TARGET_LPC408X/TARGET_LPC4088/ethernet_api.c index 3583096b06..7ea6885fbf 100644 --- a/targets/TARGET_NXP/TARGET_LPC408X/TARGET_LPC4088/ethernet_api.c +++ b/targets/TARGET_NXP/TARGET_LPC408X/TARGET_LPC4088/ethernet_api.c @@ -100,7 +100,7 @@ typedef struct TX_STAT_TypeDef TX_STAT_TypeDef; #define MAC2_PPREAM_ENF 0x00000100 /* Pure Preamble Enforcement */ #define MAC2_LPREAM_ENF 0x00000200 /* Long Preamble Enforcement */ #define MAC2_NO_BACKOFF 0x00001000 /* No Backoff Algorithm */ -#define MAC2_BACK_PRESSURE 0x00002000 /* Backoff Pressure / No Backoff */ +#define MAC2_BACK_PRESSURE 0x00002000 /* Backoff Presurre / No Backoff */ #define MAC2_EXCESS_DEF 0x00004000 /* Excess Defer */ /* Back-to-Back Inter-Packet-Gap Register */ @@ -166,19 +166,19 @@ typedef struct TX_STAT_TypeDef TX_STAT_TypeDef; #define TSV0_CRC_ERR 0x00000001 /* CRC error */ #define TSV0_LEN_CHKERR 0x00000002 /* Length Check Error */ #define TSV0_LEN_OUTRNG 0x00000004 /* Length Out of Range */ -#define TSV0_DONE 0x00000008 /* Transmission Completed */ +#define TSV0_DONE 0x00000008 /* Tramsmission Completed */ #define TSV0_MCAST 0x00000010 /* Multicast Destination */ #define TSV0_BCAST 0x00000020 /* Broadcast Destination */ #define TSV0_PKT_DEFER 0x00000040 /* Packet Deferred */ #define TSV0_EXC_DEFER 0x00000080 /* Excessive Packet Deferral */ #define TSV0_EXC_COLL 0x00000100 /* Excessive Collision */ -#define TSV0_LATE_COLL 0x00000200 /* Late Collision Occurred */ +#define TSV0_LATE_COLL 0x00000200 /* Late Collision Occured */ #define TSV0_GIANT 0x00000400 /* Giant Frame */ #define TSV0_UNDERRUN 0x00000800 /* Buffer Underrun */ #define TSV0_BYTES 0x0FFFF000 /* Total Bytes Transferred */ #define TSV0_CTRL_FRAME 0x10000000 /* Control Frame */ #define TSV0_PAUSE 0x20000000 /* Pause Frame */ -#define TSV0_BACK_PRESS 0x40000000 /* Back pressure Method Applied */ +#define TSV0_BACK_PRESS 0x40000000 /* Backpressure Method Applied */ #define TSV0_VLAN 0x80000000 /* VLAN Frame */ /* Transmit Status Vector 1 Register */ @@ -268,7 +268,7 @@ typedef struct TX_STAT_TypeDef TX_STAT_TypeDef; #define RINFO_OVERRUN 0x10000000 /* Receive overrun */ #define RINFO_NO_DESCR 0x20000000 /* No new Descriptor available */ #define RINFO_LAST_FLAG 0x40000000 /* Last Fragment in Frame */ -#define RINFO_ERR 0x80000000 /* Error Occurred (OR of all errors) */ +#define RINFO_ERR 0x80000000 /* Error Occured (OR of all errors) */ //#define RINFO_ERR_MASK (RINFO_FAIL_FILT | RINFO_CRC_ERR | RINFO_SYM_ERR | RINFO_LEN_ERR | RINFO_ALIGN_ERR | RINFO_OVERRUN) #define RINFO_ERR_MASK (RINFO_FAIL_FILT | RINFO_SYM_ERR | \ @@ -289,10 +289,10 @@ typedef struct TX_STAT_TypeDef TX_STAT_TypeDef; #define TINFO_DEFER 0x02000000 /* Packet Deferred (not an error) */ #define TINFO_EXCESS_DEF 0x04000000 /* Excessive Deferral */ #define TINFO_EXCESS_COL 0x08000000 /* Excessive Collision */ -#define TINFO_LATE_COL 0x10000000 /* Late Collision Occurred */ +#define TINFO_LATE_COL 0x10000000 /* Late Collision Occured */ #define TINFO_UNDERRUN 0x20000000 /* Transmit Underrun */ #define TINFO_NO_DESCR 0x40000000 /* No new Descriptor available */ -#define TINFO_ERR 0x80000000 /* Error Occurred (OR of all errors) */ +#define TINFO_ERR 0x80000000 /* Error Occured (OR of all errors) */ /* ENET Device Revision ID */ #define OLD_EMAC_MODULE_ID 0x39022000 /* Rev. ID for first rev '-' */ @@ -303,7 +303,7 @@ typedef struct TX_STAT_TypeDef TX_STAT_TypeDef; #define PHY_REG_IDR1 0x02 /* PHY Identifier 1 */ #define PHY_REG_IDR2 0x03 /* PHY Identifier 2 */ #define PHY_REG_ANAR 0x04 /* Auto-Negotiation Advertisement */ -#define PHY_REG_ANLPAR 0x05 /* Auto-Neg. Link Partner Ability */ +#define PHY_REG_ANLPAR 0x05 /* Auto-Neg. Link Partner Abitily */ #define PHY_REG_ANER 0x06 /* Auto-Neg. Expansion Register */ #define PHY_REG_ANNPTR 0x07 /* Auto-Neg. Next Page TX */ @@ -565,8 +565,8 @@ void ethernet_free() { // if(TxProduceIndex == TxConsumeIndex) buffer array is empty // if(TxProduceIndex == TxConsumeIndex - 1) buffer is full, should not fill -// TxProduceIndex - The buffer that will be / is being filled by driver, s/w increment -// TxConsumeIndex - The buffer that will be / is being sent by hardware +// TxProduceIndex - The buffer that will/is being fileld by driver, s/w increment +// TxConsumeIndex - The buffer that will/is beign sent by hardware int ethernet_write(const char *data, int slen) { @@ -676,22 +676,22 @@ int ethernet_send() { #endif } -// RxConsmeIndex - The index of buffer the driver will read / is reading from. Driver should inc once read -// RxProduceIndex - The index of buffer that will be / is being filled by MAC. H/w will inc once rxd +// RxConsmeIndex - The index of buffer the driver will/is reading from. Driver should inc once read +// RxProduceIndex - The index of buffer that will/is being filled by MAC. H/w will inc once rxd // // if(RxConsumeIndex == RxProduceIndex) buffer array is empty // if(RxConsumeIndex == RxProduceIndex + 1) buffer array is full -// Receives an arrived ethernet packet. +// Recevies an arrived ethernet packet. // Receiving an ethernet packet will drop the last received ethernet packet // and make a new ethernet packet ready to read. // Returns size of packet, else 0 if nothing to receive // We read from RxConsumeIndex from position rx_consume_offset -// if rx_consume_offset < 0, then we have not received the RxConsumeIndex packet for reading +// if rx_consume_offset < 0, then we have not recieved the RxConsumeIndex packet for reading // rx_consume_offset = -1 // no frame // rx_consume_offset = 0 // start of frame -// Assumption: A fragment should always be a whole frame +// Assumption: A fragment should alway be a whole frame int ethernet_receive() { #if NEW_LOGIC @@ -747,11 +747,11 @@ int ethernet_receive() { #endif } -// Read from an received ethernet packet. -// After receive returned a number bigger than 0 it is +// Read from an recevied ethernet packet. +// After receive returnd a number bigger than 0 it is // possible to read bytes from this packet. // Read will write up to size bytes into data. -// It is possible to use read multiple times. +// It is possible to use read multible times. // Each time read will start reading after the last read byte before. int ethernet_read(char *data, int dlen) { diff --git a/targets/TARGET_NXP/TARGET_LPC408X/TARGET_LPC4088/i2c_api.c b/targets/TARGET_NXP/TARGET_LPC408X/TARGET_LPC4088/i2c_api.c index 8a1cd29e8d..730e51eb49 100644 --- a/targets/TARGET_NXP/TARGET_LPC408X/TARGET_LPC4088/i2c_api.c +++ b/targets/TARGET_NXP/TARGET_LPC408X/TARGET_LPC4088/i2c_api.c @@ -224,7 +224,7 @@ void i2c_frequency(i2c_t *obj, int hz) { // 2) on error, we use the standard error mechanisms to report/debug // // Therefore an I2C transaction should always complete. If it doesn't it is usually -// because something is setup wrong (e.g. wiring), and we don't need to programmatically +// because something is setup wrong (e.g. wiring), and we don't need to programatically // check for that int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) { int count, status; diff --git a/targets/TARGET_NXP/TARGET_LPC408X/TARGET_LPC4088_DM/ethernet_api.c b/targets/TARGET_NXP/TARGET_LPC408X/TARGET_LPC4088_DM/ethernet_api.c index 6477094954..67d344aa4e 100644 --- a/targets/TARGET_NXP/TARGET_LPC408X/TARGET_LPC4088_DM/ethernet_api.c +++ b/targets/TARGET_NXP/TARGET_LPC408X/TARGET_LPC4088_DM/ethernet_api.c @@ -172,7 +172,7 @@ typedef struct TX_STAT_TypeDef TX_STAT_TypeDef; #define TSV0_PKT_DEFER 0x00000040 /* Packet Deferred */ #define TSV0_EXC_DEFER 0x00000080 /* Excessive Packet Deferral */ #define TSV0_EXC_COLL 0x00000100 /* Excessive Collision */ -#define TSV0_LATE_COLL 0x00000200 /* Late Collision Occurred */ +#define TSV0_LATE_COLL 0x00000200 /* Late Collision Occured */ #define TSV0_GIANT 0x00000400 /* Giant Frame */ #define TSV0_UNDERRUN 0x00000800 /* Buffer Underrun */ #define TSV0_BYTES 0x0FFFF000 /* Total Bytes Transferred */ @@ -268,7 +268,7 @@ typedef struct TX_STAT_TypeDef TX_STAT_TypeDef; #define RINFO_OVERRUN 0x10000000 /* Receive overrun */ #define RINFO_NO_DESCR 0x20000000 /* No new Descriptor available */ #define RINFO_LAST_FLAG 0x40000000 /* Last Fragment in Frame */ -#define RINFO_ERR 0x80000000 /* Error Occurred (OR of all errors) */ +#define RINFO_ERR 0x80000000 /* Error Occured (OR of all errors) */ //#define RINFO_ERR_MASK (RINFO_FAIL_FILT | RINFO_CRC_ERR | RINFO_SYM_ERR | RINFO_LEN_ERR | RINFO_ALIGN_ERR | RINFO_OVERRUN) #define RINFO_ERR_MASK (RINFO_FAIL_FILT | RINFO_SYM_ERR | \ @@ -289,10 +289,10 @@ typedef struct TX_STAT_TypeDef TX_STAT_TypeDef; #define TINFO_DEFER 0x02000000 /* Packet Deferred (not an error) */ #define TINFO_EXCESS_DEF 0x04000000 /* Excessive Deferral */ #define TINFO_EXCESS_COL 0x08000000 /* Excessive Collision */ -#define TINFO_LATE_COL 0x10000000 /* Late Collision Occurred */ +#define TINFO_LATE_COL 0x10000000 /* Late Collision Occured */ #define TINFO_UNDERRUN 0x20000000 /* Transmit Underrun */ #define TINFO_NO_DESCR 0x40000000 /* No new Descriptor available */ -#define TINFO_ERR 0x80000000 /* Error Occurred (OR of all errors) */ +#define TINFO_ERR 0x80000000 /* Error Occured (OR of all errors) */ /* ENET Device Revision ID */ #define OLD_EMAC_MODULE_ID 0x39022000 /* Rev. ID for first rev '-' */ @@ -303,7 +303,7 @@ typedef struct TX_STAT_TypeDef TX_STAT_TypeDef; #define PHY_REG_IDR1 0x02 /* PHY Identifier 1 */ #define PHY_REG_IDR2 0x03 /* PHY Identifier 2 */ #define PHY_REG_ANAR 0x04 /* Auto-Negotiation Advertisement */ -#define PHY_REG_ANLPAR 0x05 /* Auto-Neg. Link Partner Ability */ +#define PHY_REG_ANLPAR 0x05 /* Auto-Neg. Link Partner Abitily */ #define PHY_REG_ANER 0x06 /* Auto-Neg. Expansion Register */ #define PHY_REG_ANNPTR 0x07 /* Auto-Neg. Next Page TX */ @@ -565,8 +565,8 @@ void ethernet_free() { // if(TxProduceIndex == TxConsumeIndex) buffer array is empty // if(TxProduceIndex == TxConsumeIndex - 1) buffer is full, should not fill -// TxProduceIndex - The buffer that will be / is being fileld by driver, s/w increment -// TxConsumeIndex - The buffer that will be / is being sent by hardware +// TxProduceIndex - The buffer that will/is being fileld by driver, s/w increment +// TxConsumeIndex - The buffer that will/is beign sent by hardware int ethernet_write(const char *data, int slen) { @@ -676,22 +676,22 @@ int ethernet_send() { #endif } -// RxConsmeIndex - The index of buffer the driver will read / is reading from. Driver should inc once read -// RxProduceIndex - The index of buffer that will be / is being filled by MAC. H/w will inc once rxd +// RxConsmeIndex - The index of buffer the driver will/is reading from. Driver should inc once read +// RxProduceIndex - The index of buffer that will/is being filled by MAC. H/w will inc once rxd // // if(RxConsumeIndex == RxProduceIndex) buffer array is empty // if(RxConsumeIndex == RxProduceIndex + 1) buffer array is full -// Receives an arrived ethernet packet. +// Recevies an arrived ethernet packet. // Receiving an ethernet packet will drop the last received ethernet packet // and make a new ethernet packet ready to read. // Returns size of packet, else 0 if nothing to receive // We read from RxConsumeIndex from position rx_consume_offset -// if rx_consume_offset < 0, then we have not received the RxConsumeIndex packet for reading +// if rx_consume_offset < 0, then we have not recieved the RxConsumeIndex packet for reading // rx_consume_offset = -1 // no frame // rx_consume_offset = 0 // start of frame -// Assumption: A fragment should always be a whole frame +// Assumption: A fragment should alway be a whole frame int ethernet_receive() { #if NEW_LOGIC @@ -747,11 +747,11 @@ int ethernet_receive() { #endif } -// Read from an received ethernet packet. -// After receive returned a number bigger than 0 it is +// Read from an recevied ethernet packet. +// After receive returnd a number bigger than 0 it is // possible to read bytes from this packet. // Read will write up to size bytes into data. -// It is possible to use read multiple times. +// It is possible to use read multible times. // Each time read will start reading after the last read byte before. int ethernet_read(char *data, int dlen) { diff --git a/targets/TARGET_NXP/TARGET_LPC408X/TARGET_LPC4088_DM/i2c_api.c b/targets/TARGET_NXP/TARGET_LPC408X/TARGET_LPC4088_DM/i2c_api.c index 5093dfc6ea..64ebe3cc1c 100644 --- a/targets/TARGET_NXP/TARGET_LPC408X/TARGET_LPC4088_DM/i2c_api.c +++ b/targets/TARGET_NXP/TARGET_LPC408X/TARGET_LPC4088_DM/i2c_api.c @@ -210,7 +210,7 @@ void i2c_frequency(i2c_t *obj, int hz) { // 2) on error, we use the standard error mechanisms to report/debug // // Therefore an I2C transaction should always complete. If it doesn't it is usually -// because something is setup wrong (e.g. wiring), and we don't need to programmatically +// because something is setup wrong (e.g. wiring), and we don't need to programatically // check for that int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) { int count, status; diff --git a/targets/TARGET_NXP/TARGET_LPC408X/device/system_LPC407x_8x_177x_8x.c b/targets/TARGET_NXP/TARGET_LPC408X/device/system_LPC407x_8x_177x_8x.c index 835d31b4a5..9978362559 100644 --- a/targets/TARGET_NXP/TARGET_LPC408X/device/system_LPC407x_8x_177x_8x.c +++ b/targets/TARGET_NXP/TARGET_LPC408X/device/system_LPC407x_8x_177x_8x.c @@ -555,7 +555,8 @@ fpu_init(); LPC_SC->CLKOUTCFG = CLKOUTCFG_Val; /* Clock Output Configuration */ #endif - LPC_SC->PBOOST |= 0x03; /* Power Boost control */ + //TODO: verify correct operation w/ this setting. Refer to Table 18 in UM10562.pdf. + LPC_SC->PBOOST |= 0x00; /* Power Boost control */ #if (FLASH_SETUP == 1) /* Flash Accelerator Setup */ LPC_SC->FLASHCFG = FLASHCFG_Val|0x03A; diff --git a/targets/TARGET_NXP/TARGET_LPC43XX/ethernet_api.c b/targets/TARGET_NXP/TARGET_LPC43XX/ethernet_api.c index 6845904c69..b947155941 100644 --- a/targets/TARGET_NXP/TARGET_LPC43XX/ethernet_api.c +++ b/targets/TARGET_NXP/TARGET_LPC43XX/ethernet_api.c @@ -148,7 +148,7 @@ typedef struct TX_DESC_TypeDef TX_DESC_TypeDef; #define PHY_REG_IDR1 0x02 /* PHY Identifier 1 */ #define PHY_REG_IDR2 0x03 /* PHY Identifier 2 */ #define PHY_REG_ANAR 0x04 /* Auto-Negotiation Advertisement */ -#define PHY_REG_ANLPAR 0x05 /* Auto-Neg. Link Partner Ability */ +#define PHY_REG_ANLPAR 0x05 /* Auto-Neg. Link Partner Abitily */ #define PHY_REG_ANER 0x06 /* Auto-Neg. Expansion Register */ #define PHY_REG_ANNPTR 0x07 /* Auto-Neg. Next Page TX */ diff --git a/targets/TARGET_NXP/TARGET_LPC43XX/i2c_api.c b/targets/TARGET_NXP/TARGET_LPC43XX/i2c_api.c index fe1791fbc4..0e26102c91 100644 --- a/targets/TARGET_NXP/TARGET_LPC43XX/i2c_api.c +++ b/targets/TARGET_NXP/TARGET_LPC43XX/i2c_api.c @@ -205,7 +205,7 @@ void i2c_frequency(i2c_t *obj, int hz) { // 2) on error, we use the standard error mechanisms to report/debug // // Therefore an I2C transaction should always complete. If it doesn't it is usually -// because something is setup wrong (e.g. wiring), and we don't need to programmatically +// because something is setup wrong (e.g. wiring), and we don't need to programatically // check for that int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) { diff --git a/targets/TARGET_NXP/TARGET_LPC81X/i2c_api.c b/targets/TARGET_NXP/TARGET_LPC81X/i2c_api.c index df5979754a..916242f3bd 100644 --- a/targets/TARGET_NXP/TARGET_LPC81X/i2c_api.c +++ b/targets/TARGET_NXP/TARGET_LPC81X/i2c_api.c @@ -151,7 +151,7 @@ void i2c_frequency(i2c_t *obj, int hz) { // 2) on error, we use the standard error mechanisms to report/debug // // Therefore an I2C transaction should always complete. If it doesn't it is usually -// because something is setup wrong (e.g. wiring), and we don't need to programmatically +// because something is setup wrong (e.g. wiring), and we don't need to programatically // check for that //New version WH, Tested OK for Start and Repeated Start diff --git a/targets/TARGET_NXP/TARGET_LPC82X/i2c_api.c b/targets/TARGET_NXP/TARGET_LPC82X/i2c_api.c index a8d662da33..91044d4ab3 100644 --- a/targets/TARGET_NXP/TARGET_LPC82X/i2c_api.c +++ b/targets/TARGET_NXP/TARGET_LPC82X/i2c_api.c @@ -242,7 +242,7 @@ void i2c_frequency(i2c_t *obj, int hz) { // 2) on error, we use the standard error mechanisms to report/debug // // Therefore an I2C transaction should always complete. If it doesn't it is usually -// because something is setup wrong (e.g. wiring), and we don't need to programmatically +// because something is setup wrong (e.g. wiring), and we don't need to programatically // check for that int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) { int count, status; diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/drivers/fsl_mcan.h b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/drivers/fsl_mcan.h index ce3657195c..4a8a4bd727 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/drivers/fsl_mcan.h +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/drivers/fsl_mcan.h @@ -75,7 +75,7 @@ enum _mcan_status * * This provides constants for the MCAN status flags for use in the MCAN functions. * Note: The CPU read action clears MCAN_ErrorFlag, therefore user need to - * read MCAN_ErrorFlag and distinguish which error has occurred using + * read MCAN_ErrorFlag and distinguish which error is occur using * @ref _mcan_error_flags enumerations. */ enum _mcan_flags @@ -544,7 +544,7 @@ void MCAN_SetDataTimingConfig(CAN_Type *base, const mcan_timing_config_t *config * @brief Configures an MCAN receive fifo 0 buffer. * * This function sets start address, element size, watermark, operation mode - * and datafield size of the receive fifo 0. + * and datafield size of the recieve fifo 0. * * @param base MCAN peripheral base address. * @param config The receive fifo 0 configuration structure. @@ -555,7 +555,7 @@ void MCAN_SetRxFifo0Config(CAN_Type *base, const mcan_rx_fifo_config_t *config); * @brief Configures an MCAN receive fifo 1 buffer. * * This function sets start address, element size, watermark, operation mode - * and datafield size of the receive fifo 1. + * and datafield size of the recieve fifo 1. * * @param base MCAN peripheral base address. * @param config The receive fifo 1 configuration structure. @@ -565,7 +565,7 @@ void MCAN_SetRxFifo1Config(CAN_Type *base, const mcan_rx_fifo_config_t *config); /*! * @brief Configures an MCAN receive buffer. * - * This function sets start address and datafield size of the receive buffer. + * This function sets start address and datafield size of the recieve buffer. * * @param base MCAN peripheral base address. * @param config The receive buffer configuration structure. diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/drivers/fsl_sdif.h b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/drivers/fsl_sdif.h index 7ee57474f8..6b1b7e8c08 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/drivers/fsl_sdif.h +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC546XX/drivers/fsl_sdif.h @@ -313,7 +313,7 @@ typedef struct _sdif_data size_t blockSize; /*!< Block size, take care when config this parameter */ uint32_t blockCount; /*!< Block count */ - uint32_t *rxData; /*!< data buffer to receive */ + uint32_t *rxData; /*!< data buffer to recieve */ const uint32_t *txData; /*!< data buffer to transfer */ } sdif_data_t; @@ -331,7 +331,7 @@ typedef struct _sdif_command uint32_t responseType; /*!< Command response type */ uint32_t flags; /*!< Cmd flags */ uint32_t responseErrorFlags; /*!< response error flags, need to check the flags when - receive the cmd response */ + recieve the cmd response */ } sdif_command_t; /*! @brief Transfer state */ diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/drivers/fsl_adc.h b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/drivers/fsl_adc.h index 2f1871ba7d..e5b6b8c16f 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/drivers/fsl_adc.h +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/drivers/fsl_adc.h @@ -52,7 +52,7 @@ typedef enum _adc_status_flags kADC_ConversionActiveFlag = ADC_GS_ADACT_MASK, /*!< Conversion is active,not support w1c. */ kADC_CalibrationFailedFlag = ADC_GS_CALF_MASK, /*!< Calibration is failed,support w1c. */ kADC_AsynchronousWakeupInterruptFlag = - ADC_GS_AWKST_MASK, /*!< Asynchronous wakeup interrupt occurred, support w1c. */ + ADC_GS_AWKST_MASK, /*!< Asynchronous wakeup interrupt occured, support w1c. */ } adc_status_flags_t; /*! diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/drivers/fsl_flexcan.h b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/drivers/fsl_flexcan.h index 335c41b591..3ae7598f00 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/drivers/fsl_flexcan.h +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/drivers/fsl_flexcan.h @@ -240,7 +240,7 @@ enum _flexcan_interrupt_enable * * This provides constants for the FlexCAN status flags for use in the FlexCAN functions. * Note: The CPU read action clears FlEXCAN_ErrorFlag, therefore user need to - * read FlEXCAN_ErrorFlag and distinguish which error has occurred using + * read FlEXCAN_ErrorFlag and distinguish which error is occur using * @ref _flexcan_error_flags enumerations. */ enum _flexcan_flags diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/drivers/fsl_sai.c b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/drivers/fsl_sai.c index 6e6a5e30ce..31fd061e4c 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/drivers/fsl_sai.c +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/drivers/fsl_sai.c @@ -37,7 +37,7 @@ enum _sai_transfer_state { kSAI_Busy = 0x0U, /*!< SAI is busy */ kSAI_Idle, /*!< Transfer is done. */ - kSAI_Error /*!< Transfer error occurred. */ + kSAI_Error /*!< Transfer error occured. */ }; /*! @brief Typedef for sai tx interrupt handler. */ diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/drivers/fsl_spdif.c b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/drivers/fsl_spdif.c index 31f7691b72..b0e70c0358 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/drivers/fsl_spdif.c +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/drivers/fsl_spdif.c @@ -37,7 +37,7 @@ enum _spdif_transfer_state { kSPDIF_Busy = 0x0U, /*!< SPDIF is busy */ kSPDIF_Idle, /*!< Transfer is done. */ - kSPDIF_Error /*!< Transfer error occurred. */ + kSPDIF_Error /*!< Transfer error occured. */ }; /*! @brief Typedef for spdif tx interrupt handler. */ diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/drivers/fsl_trng.c b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/drivers/fsl_trng.c index 46190dc159..0aafb78d8e 100644 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/drivers/fsl_trng.c +++ b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/drivers/fsl_trng.c @@ -1176,7 +1176,7 @@ typedef enum _trng_statistical_check * TRNG access mode in the SA-TRNG Miscellaneous Control Register. * * Values: - * - 0b0 - Programmability of registers controlled only by the RNG Miscellaneous + * - 0b0 - Programability of registers controlled only by the RNG Miscellaneous * Control Register's access mode bit. * - 0b1 - Overides RNG Miscellaneous Control Register access mode and prevents * TRNG register programming. diff --git a/targets/TARGET_ONSEMI/TARGET_NCS36510/char_driver.h b/targets/TARGET_ONSEMI/TARGET_NCS36510/char_driver.h index 61a08ec6f3..0f6ab4489d 100644 --- a/targets/TARGET_ONSEMI/TARGET_NCS36510/char_driver.h +++ b/targets/TARGET_ONSEMI/TARGET_NCS36510/char_driver.h @@ -26,7 +26,7 @@ * * @details * The character driver is intended for devices that allow read and write - * operations with "streams" of data, such as UART devices, SPI or I2C, etc. + * operations with "streams" of data, such as UART devices, SPI or I2c, etc. * * The character driver derives from the generic driver template (see driver.h). * It does so by including an element of the generic driver_t type. diff --git a/targets/TARGET_ONSEMI/TARGET_NCS36510/ncs36510_i2c.c b/targets/TARGET_ONSEMI/TARGET_NCS36510/ncs36510_i2c.c index 593ddf48a7..8ae4a9b935 100644 --- a/targets/TARGET_ONSEMI/TARGET_NCS36510/ncs36510_i2c.c +++ b/targets/TARGET_ONSEMI/TARGET_NCS36510/ncs36510_i2c.c @@ -145,7 +145,7 @@ int32_t fI2cStop(i2c_t *obj) if (obj->membase->STATUS.WORD & (I2C_STATUS_CMD_FIFO_FULL_BIT | I2C_STATUS_CMD_FIFO_OFL_BIT | I2C_STATUS_BUS_ERR_BIT)) { - /* I2C error occurred */ + /* I2c error occured */ return I2C_ERROR_BUS_BUSY; } return I2C_API_STATUS_SUCCESS; @@ -164,7 +164,7 @@ int32_t fI2cReadB(i2c_t *obj, char *buf, int len) SEND_COMMAND(I2C_CMD_RDAT8); while(!RD_DATA_READY) { if (I2C_BUS_ERR_CHECK) { - /* Bus error occurred */ + /* Bus error occured */ return I2C_ERROR_BUS_BUSY; } } diff --git a/targets/TARGET_RENESAS/TARGET_RZ_A1XX/i2c_api.c b/targets/TARGET_RENESAS/TARGET_RZ_A1XX/i2c_api.c index ac37ba5cb5..227ac68f4e 100644 --- a/targets/TARGET_RENESAS/TARGET_RZ_A1XX/i2c_api.c +++ b/targets/TARGET_RENESAS/TARGET_RZ_A1XX/i2c_api.c @@ -442,7 +442,7 @@ int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) { i2c_set_err_noslave(obj); return I2C_ERROR_NO_SLAVE; } - /* Receive the data */ + /* Recieve the data */ if (count == (length - 2)) { value = i2c_do_read(obj, 1); } else if ((length >= 3) && (count == (length - 3))) { diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/RTWInterface.h b/targets/TARGET_Realtek/TARGET_AMEBA/RTWInterface.h index 8b25da958a..f221efc744 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/RTWInterface.h +++ b/targets/TARGET_Realtek/TARGET_AMEBA/RTWInterface.h @@ -125,21 +125,21 @@ public: /** Get the local IP address * * @return Null-terminated representation of the local IP address - * or null if no IP address has been received + * or null if no IP address has been recieved */ virtual const char *get_ip_address(); /** Get the local network mask * * @return Null-terminated representation of the local network mask - * or null if no network mask has been received + * or null if no network mask has been recieved */ virtual const char *get_netmask(); /** Get the local gateways * * @return Null-terminated representation of the local gateway - * or null if no network mask has been received + * or null if no network mask has been recieved */ virtual const char *get_gateway(); diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/sdk/common/drivers/wlan/realtek/src/osdep/wireless.h b/targets/TARGET_Realtek/TARGET_AMEBA/sdk/common/drivers/wlan/realtek/src/osdep/wireless.h index 660258bd4d..ac988590c4 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/sdk/common/drivers/wlan/realtek/src/osdep/wireless.h +++ b/targets/TARGET_Realtek/TARGET_AMEBA/sdk/common/drivers/wlan/realtek/src/osdep/wireless.h @@ -145,7 +145,7 @@ * * V11 to V12 * ---------- - * - Add SIOCSIWSTATS to get /proc/net/wireless programmatically + * - Add SIOCSIWSTATS to get /proc/net/wireless programatically * - Add DEV PRIVATE IOCTL to avoid collisions in SIOCDEVPRIVATE space * - Add new statistics (frag, retry, beacon) * - Add average quality (for user space calibration) diff --git a/targets/TARGET_Realtek/TARGET_AMEBA/sdk/soc/realtek/8195a/fwlib/rtl8195a/rtl8195a_spi_flash.h b/targets/TARGET_Realtek/TARGET_AMEBA/sdk/soc/realtek/8195a/fwlib/rtl8195a/rtl8195a_spi_flash.h index 183f8c20f9..315db89171 100644 --- a/targets/TARGET_Realtek/TARGET_AMEBA/sdk/soc/realtek/8195a/fwlib/rtl8195a/rtl8195a_spi_flash.h +++ b/targets/TARGET_Realtek/TARGET_AMEBA/sdk/soc/realtek/8195a/fwlib/rtl8195a/rtl8195a_spi_flash.h @@ -1000,7 +1000,7 @@ #define REG_SPIC_FLUSH_FIFO 0x0128//O VOID SpicInitRtl8195A(u8 InitBaudRate, u8 SpicBitMode); // spi-flash controller initialization -VOID SpicRxCmdRtl8195A(u8); // receive command +VOID SpicRxCmdRtl8195A(u8); // recieve command VOID SpicTxCmdRtl8195A(u8 cmd, SPIC_INIT_PARA SpicInitPara); // transfer command u8 SpicGetFlashStatusRtl8195A(SPIC_INIT_PARA SpicInitPara); // RDSR, read spi-flash status register VOID SpicSetFlashStatusRtl8195A(u32 data, SPIC_INIT_PARA SpicInitPara); // WRSR, write spi-flash status register diff --git a/targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_flash.c b/targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_flash.c index fa656f6a09..167bb4bb66 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_flash.c +++ b/targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_flash.c @@ -170,7 +170,7 @@ extern void FLASH_PageErase(uint32_t PageAddress); * @note If an erase and a program operations are requested simultaneously, * the erase operation is performed before the program one. * - * @note FLASH should be previously erased before new programming (only exception to this + * @note FLASH should be previously erased before new programmation (only exception to this * is when 0x0000 is programmed) * * @param TypeProgram Indicate the way to program at a specified address. @@ -223,7 +223,7 @@ HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint /* If the program operation is completed, disable the PG Bit */ CLEAR_BIT(FLASH->CR, FLASH_CR_PG); - /* In case of error, stop programming procedure */ + /* In case of error, stop programation procedure */ if (status != HAL_OK) { break; diff --git a/targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_i2s.c b/targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_i2s.c index ec0de43d9c..d0fe3dada4 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_i2s.c +++ b/targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_i2s.c @@ -1040,7 +1040,7 @@ void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s) return; } - /* I2S Overrun error interrupt occurred --------------------------------*/ + /* I2S Overrun error interrupt occured ---------------------------------*/ if(((i2ssr & I2S_FLAG_OVR) == I2S_FLAG_OVR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET)) { /* Disable RXNE and ERR interrupt */ @@ -1054,7 +1054,7 @@ void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s) HAL_I2S_ErrorCallback(hi2s); } - /* I2S Underrun error interrupt occurred -------------------------------*/ + /* I2S Underrun error interrupt occured --------------------------------*/ if(((i2ssr & I2S_FLAG_UDR) == I2S_FLAG_UDR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET)) { /* Disable TXE and ERR interrupt */ diff --git a/targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_tsc.c b/targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_tsc.c index 2297a402a0..eaf1697a91 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_tsc.c +++ b/targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_tsc.c @@ -703,14 +703,14 @@ void HAL_TSC_IRQHandler(TSC_HandleTypeDef* htsc) /* Check the parameters */ assert_param(IS_TSC_ALL_INSTANCE(htsc->Instance)); - /* Check if the end of acquisition occurred */ + /* Check if the end of acquisition occured */ if (__HAL_TSC_GET_FLAG(htsc, TSC_FLAG_EOA) != RESET) { /* Clear EOA flag */ __HAL_TSC_CLEAR_FLAG(htsc, TSC_FLAG_EOA); } - /* Check if max count error occurred */ + /* Check if max count error occured */ if (__HAL_TSC_GET_FLAG(htsc, TSC_FLAG_MCE) != RESET) { /* Clear MCE flag */ diff --git a/targets/TARGET_STM/TARGET_STM32F1/TARGET_BLUEPILL_F103C8/device/system_clock.c b/targets/TARGET_STM/TARGET_STM32F1/TARGET_BLUEPILL_F103C8/device/system_clock.c index 57fc036b67..3aa2e4c37b 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/TARGET_BLUEPILL_F103C8/device/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32F1/TARGET_BLUEPILL_F103C8/device/system_clock.c @@ -143,7 +143,7 @@ void SetSysClock(void) /* 3- If fail start with HSI clock */ if (SetSysClock_PLL_HSI() == 0) { while(1) { - // [TODO] Put something here to tell the user that a problem occurred... + // [TODO] Put something here to tell the user that a problem occured... } } } diff --git a/targets/TARGET_STM/TARGET_STM32F1/TARGET_DISCO_F100RB/device/system_clock.c b/targets/TARGET_STM/TARGET_STM32F1/TARGET_DISCO_F100RB/device/system_clock.c index 7f53e68078..40ccdaf31b 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/TARGET_DISCO_F100RB/device/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32F1/TARGET_DISCO_F100RB/device/system_clock.c @@ -142,7 +142,7 @@ void SetSysClock(void) /* 3- If fail start with HSI clock */ if (SetSysClock_PLL_HSI() == 0) { while(1) { - // [TODO] Put something here to tell the user that a problem occurred... + // [TODO] Put something here to tell the user that a problem occured... } } } diff --git a/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_flash.c b/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_flash.c index 4d83c9a258..2bbb626f14 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_flash.c +++ b/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_flash.c @@ -173,7 +173,7 @@ extern void FLASH_PageErase(uint32_t PageAddress); * @note If an erase and a program operations are requested simultaneously, * the erase operation is performed before the program one. * - * @note FLASH should be previously erased before new programming (only exception to this + * @note FLASH should be previously erased before new programmation (only exception to this * is when 0x0000 is programmed) * * @param TypeProgram: Indicate the way to program at a specified address. @@ -253,7 +253,7 @@ HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint CLEAR_BIT(FLASH->CR2, FLASH_CR2_PG); } #endif /* FLASH_BANK2_END */ - /* In case of error, stop programming procedure */ + /* In case of error, stop programation procedure */ if (status != HAL_OK) { break; diff --git a/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_i2s.c b/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_i2s.c index 828cd30823..332717572f 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_i2s.c +++ b/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_i2s.c @@ -1363,7 +1363,7 @@ static void I2S_IRQHandler(I2S_HandleTypeDef *hi2s) I2S_Receive_IT(hi2s); } - /* I2S Overrun error interrupt occurred -------------------------------------*/ + /* I2S Overrun error interrupt occured -------------------------------------*/ if(((i2ssr & I2S_FLAG_OVR) == I2S_FLAG_OVR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET)) { /* Disable RXNE and ERR interrupt */ diff --git a/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_ll_i2c.h b/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_ll_i2c.h index 6c3810db2a..98081ddc45 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_ll_i2c.h +++ b/targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_ll_i2c.h @@ -1203,7 +1203,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_ADDR(I2C_TypeDef *I2Cx) /** * @brief Indicate the status of 10-bit header sent (master mode). - * @note RESET: When no ADD10 event occurred. + * @note RESET: When no ADD10 event occured. * SET: When the master has sent the first address byte (header). * @rmtoll SR1 ADD10 LL_I2C_IsActiveFlag_ADD10 * @param I2Cx I2C Instance. diff --git a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_i2c.h b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_i2c.h index 514829d48c..a3b261e85c 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_i2c.h +++ b/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_ll_i2c.h @@ -1203,7 +1203,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_ADDR(I2C_TypeDef *I2Cx) /** * @brief Indicate the status of 10-bit header sent (master mode). - * @note RESET: When no ADD10 event occurred. + * @note RESET: When no ADD10 event occured. * SET: When the master has sent the first address byte (header). * @rmtoll SR1 ADD10 LL_I2C_IsActiveFlag_ADD10 * @param I2Cx I2C Instance. diff --git a/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_flash.c b/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_flash.c index 98908e1ee3..eaebd5682b 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_flash.c +++ b/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_flash.c @@ -173,7 +173,7 @@ extern void FLASH_PageErase(uint32_t PageAddress); * @note If an erase and a program operations are requested simultaneously, * the erase operation is performed before the program one. * - * @note FLASH should be previously erased before new programming (only exception to this + * @note FLASH should be previously erased before new programmation (only exception to this * is when 0x0000 is programmed) * * @param TypeProgram Indicate the way to program at a specified address. @@ -226,7 +226,7 @@ HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint /* If the program operation is completed, disable the PG Bit */ CLEAR_BIT(FLASH->CR, FLASH_CR_PG); - /* In case of error, stop programming procedure */ + /* In case of error, stop programation procedure */ if (status != HAL_OK) { break; diff --git a/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_hrtim.c b/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_hrtim.c index 7549d7c58f..497a85c936 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_hrtim.c +++ b/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_hrtim.c @@ -5978,7 +5978,7 @@ void HAL_HRTIM_IRQHandler(HRTIM_HandleTypeDef * hhrtim, } /** - * @brief Callback function invoked when a fault 1 interrupt occurred + * @brief Callback function invoked when a fault 1 interrupt occured * @param hhrtim: pointer to HAL HRTIM handle * @retval None * @retval None */ @@ -5993,7 +5993,7 @@ __weak void HAL_HRTIM_Fault1Callback(HRTIM_HandleTypeDef * hhrtim) } /** - * @brief Callback function invoked when a fault 2 interrupt occurred + * @brief Callback function invoked when a fault 2 interrupt occured * @param hhrtim: pointer to HAL HRTIM handle * @retval None */ @@ -6008,7 +6008,7 @@ __weak void HAL_HRTIM_Fault2Callback(HRTIM_HandleTypeDef * hhrtim) } /** - * @brief Callback function invoked when a fault 3 interrupt occurred + * @brief Callback function invoked when a fault 3 interrupt occured * @param hhrtim: pointer to HAL HRTIM handle * @retval None */ @@ -6023,7 +6023,7 @@ __weak void HAL_HRTIM_Fault3Callback(HRTIM_HandleTypeDef * hhrtim) } /** - * @brief Callback function invoked when a fault 4 interrupt occurred + * @brief Callback function invoked when a fault 4 interrupt occured * @param hhrtim: pointer to HAL HRTIM handle * @retval None */ @@ -6038,7 +6038,7 @@ __weak void HAL_HRTIM_Fault4Callback(HRTIM_HandleTypeDef * hhrtim) } /** - * @brief Callback function invoked when a fault 5 interrupt occurred + * @brief Callback function invoked when a fault 5 interrupt occured * @param hhrtim: pointer to HAL HRTIM handle * @retval None */ @@ -6053,7 +6053,7 @@ __weak void HAL_HRTIM_Fault5Callback(HRTIM_HandleTypeDef * hhrtim) } /** - * @brief Callback function invoked when a system fault interrupt occurred + * @brief Callback function invoked when a system fault interrupt occured * @param hhrtim: pointer to HAL HRTIM handle * @retval None */ diff --git a/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_i2s.c b/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_i2s.c index d1844d77ba..0a9abba63f 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_i2s.c +++ b/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_i2s.c @@ -945,7 +945,7 @@ void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s) I2S_Receive_IT(hi2s); } - /* I2S Overrun error interrupt occurred ------------------------------------*/ + /* I2S Overrun error interrupt occured -------------------------------------*/ if(((i2ssr & I2S_FLAG_OVR) == I2S_FLAG_OVR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET)) { /* Disable RXNE and ERR interrupt */ @@ -967,7 +967,7 @@ void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s) I2S_Transmit_IT(hi2s); } - /* I2S Underrun error interrupt occurred -----------------------------------*/ + /* I2S Underrun error interrupt occured ------------------------------------*/ if(((i2ssr & I2S_FLAG_UDR) == I2S_FLAG_UDR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET)) { /* Disable TXE and ERR interrupt */ diff --git a/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_i2s_ex.c b/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_i2s_ex.c index 338b9acd7a..37a3adbe27 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_i2s_ex.c +++ b/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_i2s_ex.c @@ -435,7 +435,7 @@ void HAL_I2S_FullDuplex_IRQHandler(I2S_HandleTypeDef *hi2s) I2S_FullDuplexRx_IT(hi2s, I2S_USE_I2SEXT); } - /* I2Sext Overrun error interrupt occurred -------------------------------*/ + /* I2Sext Overrun error interrupt occured --------------------------------*/ if(((i2sextsr & I2S_FLAG_OVR) == I2S_FLAG_OVR) && (__HAL_I2SEXT_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET)) { /* Disable RXNE and ERR interrupt */ @@ -452,7 +452,7 @@ void HAL_I2S_FullDuplex_IRQHandler(I2S_HandleTypeDef *hi2s) HAL_I2S_ErrorCallback(hi2s); } - /* I2S Underrun error interrupt occurred ---------------------------------*/ + /* I2S Underrun error interrupt occured ----------------------------------*/ if(((i2ssr & I2S_FLAG_UDR) == I2S_FLAG_UDR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET)) { /* Disable TXE and ERR interrupt */ @@ -488,7 +488,7 @@ void HAL_I2S_FullDuplex_IRQHandler(I2S_HandleTypeDef *hi2s) I2S_FullDuplexRx_IT(hi2s, I2S_USE_I2S); } - /* I2S Overrun error interrupt occurred ------------------------------------*/ + /* I2S Overrun error interrupt occured -------------------------------------*/ if(((i2ssr & I2S_FLAG_OVR) == I2S_FLAG_OVR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET)) { /* Disable RXNE and ERR interrupt */ @@ -505,7 +505,7 @@ void HAL_I2S_FullDuplex_IRQHandler(I2S_HandleTypeDef *hi2s) HAL_I2S_ErrorCallback(hi2s); } - /* I2Sext Underrun error interrupt occurred ------------------------------*/ + /* I2Sext Underrun error interrupt occured -------------------------------*/ if(((i2sextsr & I2S_FLAG_UDR) == I2S_FLAG_UDR) && (__HAL_I2SEXT_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET)) { /* Disable TXE and ERR interrupt */ diff --git a/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_irda.c b/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_irda.c index 0e4df04945..77ba4ecd78 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_irda.c +++ b/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_irda.c @@ -1811,7 +1811,7 @@ static HAL_StatusTypeDef IRDA_CheckIdleState(IRDA_HandleTypeDef *hirda) /* Wait until REACK flag is set */ if(IRDA_WaitOnFlagUntilTimeout(hirda, USART_ISR_REACK, RESET, tickstart, IRDA_TEACK_REACK_TIMEOUT) != HAL_OK) { - /* Timeout Occurred */ + /* Timeout Occured */ return HAL_TIMEOUT; } } diff --git a/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_uart.c b/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_uart.c index 20f6c81007..f691e7f2f8 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_uart.c +++ b/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_uart.c @@ -2296,7 +2296,7 @@ HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart) /* Wait until TEACK flag is set */ if(UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK) { - /* Timeout Occurred */ + /* Timeout Occured */ return HAL_TIMEOUT; } } @@ -2306,7 +2306,7 @@ HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart) /* Wait until REACK flag is set */ if(UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK) { - /* Timeout Occurred */ + /* Timeout Occured */ return HAL_TIMEOUT; } } diff --git a/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_usart.c b/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_usart.c index 9c2afcc7ee..a2caa0ddc4 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_usart.c +++ b/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_usart.c @@ -2128,7 +2128,7 @@ static HAL_StatusTypeDef USART_CheckIdleState(USART_HandleTypeDef *husart) /* Wait until TEACK flag is set */ if(USART_WaitOnFlagUntilTimeout(husart, USART_ISR_TEACK, RESET, tickstart, USART_TEACK_REACK_TIMEOUT) != HAL_OK) { - /* Timeout Occurred */ + /* Timeout Occured */ return HAL_TIMEOUT; } } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTB_MTS_DRAGONFLY/device/system_clock.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTB_MTS_DRAGONFLY/device/system_clock.c index f1f150016f..6ae08aac48 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTB_MTS_DRAGONFLY/device/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTB_MTS_DRAGONFLY/device/system_clock.c @@ -124,7 +124,7 @@ void SetSysClock(void) /* 3- If fail start with HSI clock */ if (SetSysClock_PLL_HSI() == 0) { while(1) { - // [TODO] Put something here to tell the user that a problem occurred... + // [TODO] Put something here to tell the user that a problem occured... } } } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/system_clock.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/system_clock.c index f1f150016f..6ae08aac48 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/system_clock.c @@ -124,7 +124,7 @@ void SetSysClock(void) /* 3- If fail start with HSI clock */ if (SetSysClock_PLL_HSI() == 0) { while(1) { - // [TODO] Put something here to tell the user that a problem occurred... + // [TODO] Put something here to tell the user that a problem occured... } } } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/device/system_clock.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/device/system_clock.c index 7d64108a6a..13d92ef57a 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/device/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/device/system_clock.c @@ -130,7 +130,7 @@ void SetSysClock(void) /* 3- If fail start with HSI clock */ if (SetSysClock_PLL_HSI() == 0) { while(1) { - // [TODO] Put something here to tell the user that a problem occurred... + // [TODO] Put something here to tell the user that a problem occured... } } } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xC/TARGET_DISCO_F401VC/system_clock.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xC/TARGET_DISCO_F401VC/system_clock.c index c96b51c08c..f42278ce2c 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xC/TARGET_DISCO_F401VC/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xC/TARGET_DISCO_F401VC/system_clock.c @@ -121,7 +121,7 @@ void SetSysClock(void) /* 3- If fail start with HSI clock */ if (SetSysClock_PLL_HSI() == 0) { while(1) { - // [TODO] Put something here to tell the user that a problem occurred... + // [TODO] Put something here to tell the user that a problem occured... } } } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TARGET_ARCH_MAX/system_clock.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TARGET_ARCH_MAX/system_clock.c index 425580bc01..9c33be421e 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TARGET_ARCH_MAX/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/TARGET_ARCH_MAX/system_clock.c @@ -121,7 +121,7 @@ void SetSysClock(void) /* 3- If fail start with HSI clock */ if (SetSysClock_PLL_HSI() == 0) { while(1) { - // [TODO] Put something here to tell the user that a problem occurred... + // [TODO] Put something here to tell the user that a problem occured... } } } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/device/stm32f407xx.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/device/stm32f407xx.h index abb008c413..23c09610e9 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/device/stm32f407xx.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/device/stm32f407xx.h @@ -13604,7 +13604,7 @@ typedef struct #define ETH_DMASR_RPS_Closing ETH_DMASR_RPS_Closing_Msk /* Running - closing descriptor */ #define ETH_DMASR_RPS_Queuing_Pos (17U) #define ETH_DMASR_RPS_Queuing_Msk (0x7U << ETH_DMASR_RPS_Queuing_Pos) /*!< 0x000E0000 */ -#define ETH_DMASR_RPS_Queuing ETH_DMASR_RPS_Queuing_Msk /* Running - queuing the receive frame into host memory */ +#define ETH_DMASR_RPS_Queuing ETH_DMASR_RPS_Queuing_Msk /* Running - queuing the recieve frame into host memory */ #define ETH_DMASR_NIS_Pos (16U) #define ETH_DMASR_NIS_Msk (0x1U << ETH_DMASR_NIS_Pos) /*!< 0x00010000 */ #define ETH_DMASR_NIS ETH_DMASR_NIS_Msk /* Normal interrupt summary */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_ELMO_F411RE/system_clock.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_ELMO_F411RE/system_clock.c index 698f92ec57..bffa88a663 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_ELMO_F411RE/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_ELMO_F411RE/system_clock.c @@ -125,7 +125,7 @@ void SetSysClock(void) /* 3- If fail start with HSI clock */ if (SetSysClock_PLL_HSI() == 0) { while(1) { - // [TODO] Put something here to tell the user that a problem occurred... + // [TODO] Put something here to tell the user that a problem occured... } } } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/stm32f429xx.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/stm32f429xx.h index 1bc9d75b7d..5feb7667c5 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/stm32f429xx.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/stm32f429xx.h @@ -15156,7 +15156,7 @@ typedef struct #define ETH_DMASR_RPS_Closing ETH_DMASR_RPS_Closing_Msk /* Running - closing descriptor */ #define ETH_DMASR_RPS_Queuing_Pos (17U) #define ETH_DMASR_RPS_Queuing_Msk (0x7U << ETH_DMASR_RPS_Queuing_Pos) /*!< 0x000E0000 */ -#define ETH_DMASR_RPS_Queuing ETH_DMASR_RPS_Queuing_Msk /* Running - queuing the receive frame into host memory */ +#define ETH_DMASR_RPS_Queuing ETH_DMASR_RPS_Queuing_Msk /* Running - queuing the recieve frame into host memory */ #define ETH_DMASR_NIS_Pos (16U) #define ETH_DMASR_NIS_Msk (0x1U << ETH_DMASR_NIS_Pos) /*!< 0x00010000 */ #define ETH_DMASR_NIS ETH_DMASR_NIS_Msk /* Normal interrupt summary */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/stm32f437xx.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/stm32f437xx.h index 9302e9b082..a7df3124bc 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/stm32f437xx.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/stm32f437xx.h @@ -15096,7 +15096,7 @@ typedef struct #define ETH_DMASR_RPS_Closing ETH_DMASR_RPS_Closing_Msk /* Running - closing descriptor */ #define ETH_DMASR_RPS_Queuing_Pos (17U) #define ETH_DMASR_RPS_Queuing_Msk (0x7U << ETH_DMASR_RPS_Queuing_Pos) /*!< 0x000E0000 */ -#define ETH_DMASR_RPS_Queuing ETH_DMASR_RPS_Queuing_Msk /* Running - queuing the receive frame into host memory */ +#define ETH_DMASR_RPS_Queuing ETH_DMASR_RPS_Queuing_Msk /* Running - queuing the recieve frame into host memory */ #define ETH_DMASR_NIS_Pos (16U) #define ETH_DMASR_NIS_Msk (0x1U << ETH_DMASR_NIS_Pos) /*!< 0x00010000 */ #define ETH_DMASR_NIS ETH_DMASR_NIS_Msk /* Normal interrupt summary */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_MODULE_UBLOX_ODIN_W2/sdk/ublox-odin-w2-drivers/OdinWiFiInterface.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_MODULE_UBLOX_ODIN_W2/sdk/ublox-odin-w2-drivers/OdinWiFiInterface.h index f01a8b1f38..24be80d57a 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_MODULE_UBLOX_ODIN_W2/sdk/ublox-odin-w2-drivers/OdinWiFiInterface.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_MODULE_UBLOX_ODIN_W2/sdk/ublox-odin-w2-drivers/OdinWiFiInterface.h @@ -115,7 +115,7 @@ public: /** Get the local IP address * * @return Null-terminated representation of the local IP address - * or null if no IP address has been received + * or null if no IP address has been recieved */ virtual const char *get_ip_address(); @@ -129,7 +129,7 @@ public: /** Get the local gateway * * @return Null-terminated representation of the local gateway - * or null if no network mask has been received + * or null if no network mask has been recieved */ virtual const char *get_gateway(); diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/stm32f439xx.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/stm32f439xx.h index 80634c63ee..16eb383e44 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/stm32f439xx.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/stm32f439xx.h @@ -15444,7 +15444,7 @@ typedef struct #define ETH_DMASR_RPS_Closing ETH_DMASR_RPS_Closing_Msk /* Running - closing descriptor */ #define ETH_DMASR_RPS_Queuing_Pos (17U) #define ETH_DMASR_RPS_Queuing_Msk (0x7U << ETH_DMASR_RPS_Queuing_Pos) /*!< 0x000E0000 */ -#define ETH_DMASR_RPS_Queuing ETH_DMASR_RPS_Queuing_Msk /* Running - queuing the receive frame into host memory */ +#define ETH_DMASR_RPS_Queuing ETH_DMASR_RPS_Queuing_Msk /* Running - queuing the recieve frame into host memory */ #define ETH_DMASR_NIS_Pos (16U) #define ETH_DMASR_NIS_Msk (0x1U << ETH_DMASR_NIS_Pos) /*!< 0x00010000 */ #define ETH_DMASR_NIS ETH_DMASR_NIS_Msk /* Normal interrupt summary */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_B96B_F446VE/system_clock.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_B96B_F446VE/system_clock.c index 6d1bdc97ad..ed57a5fa5d 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_B96B_F446VE/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_B96B_F446VE/system_clock.c @@ -124,7 +124,7 @@ void SetSysClock(void) /* 3- If fail start with HSI clock */ if (SetSysClock_PLL_HSI() == 0) { while(1) { - // [TODO] Put something here to tell the user that a problem occurred... + // [TODO] Put something here to tell the user that a problem occured... } } } diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/device/stm32f469xx.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/device/stm32f469xx.h index b8893dae93..d054b8fb07 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/device/stm32f469xx.h +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/device/stm32f469xx.h @@ -18175,7 +18175,7 @@ typedef struct #define ETH_DMASR_RPS_Closing ETH_DMASR_RPS_Closing_Msk /* Running - closing descriptor */ #define ETH_DMASR_RPS_Queuing_Pos (17U) #define ETH_DMASR_RPS_Queuing_Msk (0x7U << ETH_DMASR_RPS_Queuing_Pos) /*!< 0x000E0000 */ -#define ETH_DMASR_RPS_Queuing ETH_DMASR_RPS_Queuing_Msk /* Running - queuing the receive frame into host memory */ +#define ETH_DMASR_RPS_Queuing ETH_DMASR_RPS_Queuing_Msk /* Running - queuing the recieve frame into host memory */ #define ETH_DMASR_NIS_Pos (16U) #define ETH_DMASR_NIS_Msk (0x1U << ETH_DMASR_NIS_Pos) /*!< 0x00010000 */ #define ETH_DMASR_NIS ETH_DMASR_NIS_Msk /* Normal interrupt summary */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_i2s.c b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_i2s.c index 606c22dc8b..f80478f6ad 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_i2s.c +++ b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_i2s.c @@ -1443,7 +1443,7 @@ static void I2S_IRQHandler(I2S_HandleTypeDef *hi2s) I2S_Receive_IT(hi2s); } - /* I2S Overrun error interrupt occurred ------------------------------------*/ + /* I2S Overrun error interrupt occured -------------------------------------*/ if(((i2ssr & I2S_FLAG_OVR) == I2S_FLAG_OVR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET)) { /* Disable RXNE and ERR interrupt */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_i2s_ex.c b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_i2s_ex.c index 978c7ea753..aae1ac401a 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_i2s_ex.c +++ b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_i2s_ex.c @@ -784,7 +784,7 @@ void HAL_I2SEx_FullDuplex_IRQHandler(I2S_HandleTypeDef *hi2s) I2SEx_FullDuplexRx_IT(hi2s, I2S_USE_I2SEXT); } - /* I2Sext Overrun error interrupt occurred -------------------------------*/ + /* I2Sext Overrun error interrupt occured --------------------------------*/ if(((i2sextsr & I2S_FLAG_OVR) == I2S_FLAG_OVR) && (__HAL_I2SEXT_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET)) { /* Disable RXNE and ERR interrupt */ @@ -804,7 +804,7 @@ void HAL_I2SEx_FullDuplex_IRQHandler(I2S_HandleTypeDef *hi2s) HAL_I2S_ErrorCallback(hi2s); } - /* I2S Underrun error interrupt occurred ---------------------------------*/ + /* I2S Underrun error interrupt occured ----------------------------------*/ if(((i2ssr & I2S_FLAG_UDR) == I2S_FLAG_UDR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET)) { /* Disable TXE and ERR interrupt */ @@ -843,7 +843,7 @@ void HAL_I2SEx_FullDuplex_IRQHandler(I2S_HandleTypeDef *hi2s) I2SEx_FullDuplexRx_IT(hi2s, I2S_USE_I2S); } - /* I2S Overrun error interrupt occurred ------------------------------------*/ + /* I2S Overrun error interrupt occured -------------------------------------*/ if(((i2ssr & I2S_FLAG_OVR) == I2S_FLAG_OVR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET)) { /* Disable RXNE and ERR interrupt */ @@ -860,7 +860,7 @@ void HAL_I2SEx_FullDuplex_IRQHandler(I2S_HandleTypeDef *hi2s) HAL_I2S_ErrorCallback(hi2s); } - /* I2Sext Underrun error interrupt occurred ------------------------------*/ + /* I2Sext Underrun error interrupt occured -------------------------------*/ if(((i2sextsr & I2S_FLAG_UDR) == I2S_FLAG_UDR) && (__HAL_I2SEXT_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET)) { /* Disable TXE and ERR interrupt */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_sai.c b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_sai.c index 6d8daf6933..0fba5e62c1 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_sai.c +++ b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_sai.c @@ -1310,7 +1310,7 @@ void HAL_SAI_IRQHandler(SAI_HandleTypeDef *hsai) uint32_t cr1config = hsai->Instance->CR1; uint32_t tmperror; - /* SAI Fifo request interrupt occurred -----------------------------------*/ + /* SAI Fifo request interrupt occured ------------------------------------*/ if(((itflags & SAI_xSR_FREQ) == SAI_xSR_FREQ) && ((itsources & SAI_IT_FREQ) == SAI_IT_FREQ)) { hsai->InterruptServiceRoutine(hsai); diff --git a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_i2c.h b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_i2c.h index 1db3dba380..69f44ce05b 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_i2c.h +++ b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_i2c.h @@ -1309,7 +1309,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_ADDR(I2C_TypeDef *I2Cx) /** * @brief Indicate the status of 10-bit header sent (master mode). - * @note RESET: When no ADD10 event occurred. + * @note RESET: When no ADD10 event occured. * SET: When the master has sent the first address byte (header). * @rmtoll SR1 ADD10 LL_I2C_IsActiveFlag_ADD10 * @param I2Cx I2C Instance. diff --git a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_lptim.h b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_lptim.h index f5a79948dc..6ca83de287 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_lptim.h +++ b/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_lptim.h @@ -976,7 +976,7 @@ __STATIC_INLINE void LL_LPTIM_ClearFLAG_ARRM(LPTIM_TypeDef *LPTIMx) } /** - * @brief Inform application whether a autoreload match interrupt has occurred. + * @brief Inform application whether a autoreload match interrupt has occured. * @rmtoll ISR ARRM LL_LPTIM_IsActiveFlag_ARRM * @param LPTIMx Low-Power Timer instance * @retval State of bit (1 or 0). diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/stm32f746xx.h b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/stm32f746xx.h index 4a6350c6f9..ca9deeebf4 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/stm32f746xx.h +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/stm32f746xx.h @@ -15398,7 +15398,7 @@ typedef struct #define ETH_DMASR_RPS_Closing ETH_DMASR_RPS_Closing_Msk /* Running - closing descriptor */ #define ETH_DMASR_RPS_Queuing_Pos (17U) #define ETH_DMASR_RPS_Queuing_Msk (0x7U << ETH_DMASR_RPS_Queuing_Pos) /*!< 0x000E0000 */ -#define ETH_DMASR_RPS_Queuing ETH_DMASR_RPS_Queuing_Msk /* Running - queuing the receive frame into host memory */ +#define ETH_DMASR_RPS_Queuing ETH_DMASR_RPS_Queuing_Msk /* Running - queuing the recieve frame into host memory */ #define ETH_DMASR_NIS_Pos (16U) #define ETH_DMASR_NIS_Msk (0x1U << ETH_DMASR_NIS_Pos) /*!< 0x00010000 */ #define ETH_DMASR_NIS ETH_DMASR_NIS_Msk /* Normal interrupt summary */ diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/device/stm32f756xx.h b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/device/stm32f756xx.h index 6c29b80fa9..1a19a08cfb 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/device/stm32f756xx.h +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/device/stm32f756xx.h @@ -15685,7 +15685,7 @@ typedef struct #define ETH_DMASR_RPS_Closing ETH_DMASR_RPS_Closing_Msk /* Running - closing descriptor */ #define ETH_DMASR_RPS_Queuing_Pos (17U) #define ETH_DMASR_RPS_Queuing_Msk (0x7U << ETH_DMASR_RPS_Queuing_Pos) /*!< 0x000E0000 */ -#define ETH_DMASR_RPS_Queuing ETH_DMASR_RPS_Queuing_Msk /* Running - queuing the receive frame into host memory */ +#define ETH_DMASR_RPS_Queuing ETH_DMASR_RPS_Queuing_Msk /* Running - queuing the recieve frame into host memory */ #define ETH_DMASR_NIS_Pos (16U) #define ETH_DMASR_NIS_Msk (0x1U << ETH_DMASR_NIS_Pos) /*!< 0x00010000 */ #define ETH_DMASR_NIS ETH_DMASR_NIS_Msk /* Normal interrupt summary */ diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/stm32f767xx.h b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/stm32f767xx.h index 083f43e419..4e7911cf69 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/stm32f767xx.h +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/stm32f767xx.h @@ -16074,7 +16074,7 @@ typedef struct #define ETH_DMASR_RPS_Closing ETH_DMASR_RPS_Closing_Msk /* Running - closing descriptor */ #define ETH_DMASR_RPS_Queuing_Pos (17U) #define ETH_DMASR_RPS_Queuing_Msk (0x7U << ETH_DMASR_RPS_Queuing_Pos) /*!< 0x000E0000 */ -#define ETH_DMASR_RPS_Queuing ETH_DMASR_RPS_Queuing_Msk /* Running - queuing the receive frame into host memory */ +#define ETH_DMASR_RPS_Queuing ETH_DMASR_RPS_Queuing_Msk /* Running - queuing the recieve frame into host memory */ #define ETH_DMASR_NIS_Pos (16U) #define ETH_DMASR_NIS_Msk (0x1U << ETH_DMASR_NIS_Pos) /*!< 0x00010000 */ #define ETH_DMASR_NIS ETH_DMASR_NIS_Msk /* Normal interrupt summary */ diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/device/stm32f769xx.h b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/device/stm32f769xx.h index 59e29e1b0c..5cde08e3a0 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/device/stm32f769xx.h +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/device/stm32f769xx.h @@ -16169,7 +16169,7 @@ typedef struct #define ETH_DMASR_RPS_Closing ETH_DMASR_RPS_Closing_Msk /* Running - closing descriptor */ #define ETH_DMASR_RPS_Queuing_Pos (17U) #define ETH_DMASR_RPS_Queuing_Msk (0x7U << ETH_DMASR_RPS_Queuing_Pos) /*!< 0x000E0000 */ -#define ETH_DMASR_RPS_Queuing ETH_DMASR_RPS_Queuing_Msk /* Running - queuing the receive frame into host memory */ +#define ETH_DMASR_RPS_Queuing ETH_DMASR_RPS_Queuing_Msk /* Running - queuing the recieve frame into host memory */ #define ETH_DMASR_NIS_Pos (16U) #define ETH_DMASR_NIS_Msk (0x1U << ETH_DMASR_NIS_Pos) /*!< 0x00010000 */ #define ETH_DMASR_NIS ETH_DMASR_NIS_Msk /* Normal interrupt summary */ diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_mdios.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_mdios.c index b5e8263498..acc8a6bbc4 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_mdios.c +++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_mdios.c @@ -577,7 +577,7 @@ __weak void HAL_MDIOS_WakeUpCallback(MDIOS_HandleTypeDef *hmdios) [..] This subsection provides a set of functions allowing to control the MDIOS. (+) HAL_MDIOS_GetState() API, helpful to check in run-time the state. - (+) HAL_MDIOS_GetError() API, returns the errors occurred during data transfer. + (+) HAL_MDIOS_GetError() API, returns the errors occured during data transfer. @endverbatim * @{ @@ -586,7 +586,7 @@ __weak void HAL_MDIOS_WakeUpCallback(MDIOS_HandleTypeDef *hmdios) /** * @brief Gets MDIOS error flags * @param hmdios mdios handle - * @retval bit map of occurred errors + * @retval bit map of occured errors */ uint32_t HAL_MDIOS_GetError(MDIOS_HandleTypeDef *hmdios) { diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sai.c b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sai.c index 5b9f5e4730..15cf097456 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sai.c +++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_sai.c @@ -1358,7 +1358,7 @@ void HAL_SAI_IRQHandler(SAI_HandleTypeDef *hsai) uint32_t cr1config = hsai->Instance->CR1; uint32_t tmperror; - /* SAI Fifo request interrupt occurred -----------------------------------*/ + /* SAI Fifo request interrupt occured ------------------------------------*/ if(((itflags & SAI_xSR_FREQ) == SAI_xSR_FREQ) && ((itsources & SAI_IT_FREQ) == SAI_IT_FREQ)) { hsai->InterruptServiceRoutine(hsai); diff --git a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_ll_lptim.h b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_ll_lptim.h index c69eb8b4a7..007656613e 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_ll_lptim.h +++ b/targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_ll_lptim.h @@ -981,7 +981,7 @@ __STATIC_INLINE void LL_LPTIM_ClearFLAG_ARRM(LPTIM_TypeDef *LPTIMx) } /** - * @brief Inform application whether a autoreload match interrupt has occurred. + * @brief Inform application whether a autoreload match interrupt has occured. * @rmtoll ISR ARRM LL_LPTIM_IsActiveFlag_ARRM * @param LPTIMx Low-Power Timer instance * @retval State of bit (1 or 0). diff --git a/targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_i2s.c b/targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_i2s.c index d9d0873531..c1c3fad6fc 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_i2s.c +++ b/targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_i2s.c @@ -1069,7 +1069,7 @@ void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s) /* I2S interrupt error -------------------------------------------------*/ if(__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET) { - /* I2S Overrun error interrupt occurred --------------------------------*/ + /* I2S Overrun error interrupt occured ---------------------------------*/ if((i2ssr & I2S_FLAG_OVR) == I2S_FLAG_OVR) { /* Disable RXNE and ERR interrupt */ @@ -1079,7 +1079,7 @@ void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s) SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_OVR); } - /* I2S Underrun error interrupt occurred -------------------------------*/ + /* I2S Underrun error interrupt occured --------------------------------*/ if((i2ssr & I2S_FLAG_UDR) == I2S_FLAG_UDR) { /* Disable TXE and ERR interrupt */ diff --git a/targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_irda.c b/targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_irda.c index ad0fd57f14..06bd6981c2 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_irda.c +++ b/targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_irda.c @@ -896,7 +896,7 @@ HAL_StatusTypeDef HAL_IRDA_DMAStop(IRDA_HandleTypeDef *hirda) */ void HAL_IRDA_IRQHandler(IRDA_HandleTypeDef *hirda) { - /* IRDA parity error interrupt occurred ------------------------------------*/ + /* IRDA parity error interrupt occurred -------------------------------------*/ if((__HAL_IRDA_GET_IT(hirda, IRDA_IT_PE) != RESET) && (__HAL_IRDA_GET_IT_SOURCE(hirda, IRDA_IT_PE) != RESET)) { __HAL_IRDA_CLEAR_PEFLAG(hirda); @@ -906,7 +906,7 @@ void HAL_IRDA_IRQHandler(IRDA_HandleTypeDef *hirda) hirda->State = HAL_IRDA_STATE_READY; } - /* IRDA frame error interrupt occurred -------------------------------------*/ + /* IRDA frame error interrupt occured --------------------------------------*/ if((__HAL_IRDA_GET_IT(hirda, IRDA_IT_FE) != RESET) && (__HAL_IRDA_GET_IT_SOURCE(hirda, IRDA_IT_ERR) != RESET)) { __HAL_IRDA_CLEAR_FEFLAG(hirda); @@ -916,7 +916,7 @@ void HAL_IRDA_IRQHandler(IRDA_HandleTypeDef *hirda) hirda->State = HAL_IRDA_STATE_READY; } - /* IRDA noise error interrupt occurred -------------------------------------*/ + /* IRDA noise error interrupt occured --------------------------------------*/ if((__HAL_IRDA_GET_IT(hirda, IRDA_IT_NE) != RESET) && (__HAL_IRDA_GET_IT_SOURCE(hirda, IRDA_IT_ERR) != RESET)) { __HAL_IRDA_CLEAR_NEFLAG(hirda); @@ -926,7 +926,7 @@ void HAL_IRDA_IRQHandler(IRDA_HandleTypeDef *hirda) hirda->State = HAL_IRDA_STATE_READY; } - /* IRDA Over-Run interrupt occurred -----------------------------------------*/ + /* IRDA Over-Run interrupt occured -----------------------------------------*/ if((__HAL_IRDA_GET_IT(hirda, IRDA_IT_ORE) != RESET) && (__HAL_IRDA_GET_IT_SOURCE(hirda, IRDA_IT_ERR) != RESET)) { __HAL_IRDA_CLEAR_OREFLAG(hirda); diff --git a/targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_smartcard.c b/targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_smartcard.c index 492bff6bd2..a33f92310c 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_smartcard.c +++ b/targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_smartcard.c @@ -724,7 +724,7 @@ void HAL_SMARTCARD_IRQHandler(SMARTCARD_HandleTypeDef *hsc) hsc->State = HAL_SMARTCARD_STATE_READY; } - /* SMARTCARD frame error interrupt occurred --------------------------------*/ + /* SMARTCARD frame error interrupt occured ---------------------------------*/ if((__HAL_SMARTCARD_GET_IT(hsc, SMARTCARD_IT_FE) != RESET) && (__HAL_SMARTCARD_GET_IT_SOURCE(hsc, SMARTCARD_IT_ERR) != RESET)) { __HAL_SMARTCARD_CLEAR_FEFLAG(hsc); @@ -733,7 +733,7 @@ void HAL_SMARTCARD_IRQHandler(SMARTCARD_HandleTypeDef *hsc) hsc->State = HAL_SMARTCARD_STATE_READY; } - /* SMARTCARD noise error interrupt occurred --------------------------------*/ + /* SMARTCARD noise error interrupt occured ---------------------------------*/ if((__HAL_SMARTCARD_GET_IT(hsc, SMARTCARD_IT_NE) != RESET) && (__HAL_SMARTCARD_GET_IT_SOURCE(hsc, SMARTCARD_IT_ERR) != RESET)) { __HAL_SMARTCARD_CLEAR_NEFLAG(hsc); @@ -742,7 +742,7 @@ void HAL_SMARTCARD_IRQHandler(SMARTCARD_HandleTypeDef *hsc) hsc->State = HAL_SMARTCARD_STATE_READY; } - /* SMARTCARD Over-Run interrupt occurred -----------------------------------*/ + /* SMARTCARD Over-Run interrupt occured ------------------------------------*/ if((__HAL_SMARTCARD_GET_IT(hsc, SMARTCARD_IT_ORE) != RESET) && (__HAL_SMARTCARD_GET_IT_SOURCE(hsc, SMARTCARD_IT_ERR) != RESET)) { __HAL_SMARTCARD_CLEAR_OREFLAG(hsc); @@ -751,7 +751,7 @@ void HAL_SMARTCARD_IRQHandler(SMARTCARD_HandleTypeDef *hsc) hsc->State = HAL_SMARTCARD_STATE_READY; } - /* SMARTCARD receiver timeout interrupt occurred ---------------------------*/ + /* SMARTCARD receiver timeout interrupt occured ----------------------------*/ if((__HAL_SMARTCARD_GET_IT(hsc, SMARTCARD_IT_RTO) != RESET) && (__HAL_SMARTCARD_GET_IT_SOURCE(hsc, SMARTCARD_IT_RTO) != RESET)) { __HAL_SMARTCARD_CLEAR_IT(hsc, SMARTCARD_CLEAR_RTOF); diff --git a/targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_tsc.c b/targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_tsc.c index fe51945c15..daf265ddd3 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_tsc.c +++ b/targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_tsc.c @@ -709,14 +709,14 @@ void HAL_TSC_IRQHandler(TSC_HandleTypeDef* htsc) /* Check the parameters */ assert_param(IS_TSC_ALL_INSTANCE(htsc->Instance)); - /* Check if the end of acquisition occurred */ + /* Check if the end of acquisition occured */ if (__HAL_TSC_GET_FLAG(htsc, TSC_FLAG_EOA) != RESET) { /* Clear EOA flag */ __HAL_TSC_CLEAR_FLAG(htsc, TSC_FLAG_EOA); } - /* Check if max count error occurred */ + /* Check if max count error occured */ if (__HAL_TSC_GET_FLAG(htsc, TSC_FLAG_MCE) != RESET) { /* Clear MCE flag */ diff --git a/targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_uart.c b/targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_uart.c index 694e8baea0..98470850f3 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_uart.c +++ b/targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_uart.c @@ -1083,7 +1083,7 @@ HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart) */ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) { - /* UART parity error interrupt occurred -----------------------------------*/ + /* UART parity error interrupt occurred ------------------------------------*/ if((__HAL_UART_GET_IT(huart, UART_IT_PE) != RESET) && (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_PE) != RESET)) { @@ -1095,7 +1095,7 @@ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) huart->RxState = HAL_UART_STATE_READY; } - /* UART frame error interrupt occurred -------------------------------------*/ + /* UART frame error interrupt occured --------------------------------------*/ if((__HAL_UART_GET_IT(huart, UART_IT_FE) != RESET) && (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_ERR) != RESET)) { __HAL_UART_CLEAR_IT(huart, UART_CLEAR_FEF); @@ -1106,7 +1106,7 @@ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) huart->RxState = HAL_UART_STATE_READY; } - /* UART noise error interrupt occurred -------------------------------------*/ + /* UART noise error interrupt occured --------------------------------------*/ if((__HAL_UART_GET_IT(huart, UART_IT_NE) != RESET) && (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_ERR) != RESET)) { __HAL_UART_CLEAR_IT(huart, UART_CLEAR_NEF); @@ -1117,7 +1117,7 @@ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) huart->RxState = HAL_UART_STATE_READY; } - /* UART Over-Run interrupt occurred ----------------------------------------*/ + /* UART Over-Run interrupt occurred -----------------------------------------*/ if((__HAL_UART_GET_IT(huart, UART_IT_ORE) != RESET) && (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_ERR) != RESET)) { __HAL_UART_CLEAR_IT(huart, UART_CLEAR_OREF); @@ -1128,7 +1128,7 @@ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) huart->RxState = HAL_UART_STATE_READY; } - /* Call UART Error Call back function if need be ---------------------------*/ + /* Call UART Error Call back function if need be --------------------------*/ if(huart->ErrorCode != HAL_UART_ERROR_NONE) { /* Set the UART state ready to be able to start again the process */ @@ -1138,7 +1138,7 @@ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) HAL_UART_ErrorCallback(huart); } - /* UART Wake Up interrupt occurred -----------------------------------------*/ + /* UART Wake Up interrupt occured ------------------------------------------*/ if((__HAL_UART_GET_IT(huart, UART_IT_WUF) != RESET) && (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_WUF) != RESET)) { __HAL_UART_CLEAR_IT(huart, UART_CLEAR_WUF); diff --git a/targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_usart.c b/targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_usart.c index 32e34e5fda..3fc35648d2 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_usart.c +++ b/targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_usart.c @@ -1040,7 +1040,7 @@ HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart) void HAL_USART_IRQHandler(USART_HandleTypeDef *husart) { - /* USART parity error interrupt occurred ------------------------------------*/ + /* USART parity error interrupt occured ------------------------------------*/ if((__HAL_USART_GET_IT(husart, USART_IT_PE) != RESET) && (__HAL_USART_GET_IT_SOURCE(husart, USART_IT_PE) != RESET)) { __HAL_USART_CLEAR_PEFLAG(husart); @@ -1049,7 +1049,7 @@ void HAL_USART_IRQHandler(USART_HandleTypeDef *husart) husart->State = HAL_USART_STATE_READY; } - /* USART frame error interrupt occurred -------------------------------------*/ + /* USART frame error interrupt occured -------------------------------------*/ if((__HAL_USART_GET_IT(husart, USART_IT_FE) != RESET) && (__HAL_USART_GET_IT_SOURCE(husart, USART_IT_ERR) != RESET)) { __HAL_USART_CLEAR_FEFLAG(husart); @@ -1058,7 +1058,7 @@ void HAL_USART_IRQHandler(USART_HandleTypeDef *husart) husart->State = HAL_USART_STATE_READY; } - /* USART noise error interrupt occurred -------------------------------------*/ + /* USART noise error interrupt occured -------------------------------------*/ if((__HAL_USART_GET_IT(husart, USART_IT_NE) != RESET) && (__HAL_USART_GET_IT_SOURCE(husart, USART_IT_ERR) != RESET)) { __HAL_USART_CLEAR_NEFLAG(husart); @@ -1067,7 +1067,7 @@ void HAL_USART_IRQHandler(USART_HandleTypeDef *husart) husart->State = HAL_USART_STATE_READY; } - /* USART Over-Run interrupt occurred ----------------------------------------*/ + /* USART Over-Run interrupt occured ----------------------------------------*/ if((__HAL_USART_GET_IT(husart, USART_IT_ORE) != RESET) && (__HAL_USART_GET_IT_SOURCE(husart, USART_IT_ERR) != RESET)) { __HAL_USART_CLEAR_OREFLAG(husart); diff --git a/targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_ll_lptim.h b/targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_ll_lptim.h index 57c89976ab..42c6916ca1 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_ll_lptim.h +++ b/targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_ll_lptim.h @@ -983,7 +983,7 @@ __STATIC_INLINE void LL_LPTIM_ClearFLAG_ARRM(LPTIM_TypeDef *LPTIMx) } /** - * @brief Inform application whether a autoreload match interrupt has occurred. + * @brief Inform application whether a autoreload match interrupt has occured. * @rmtoll ISR ARRM LL_LPTIM_IsActiveFlag_ARRM * @param LPTIMx Low-Power Timer instance * @retval State of bit (1 or 0). diff --git a/targets/TARGET_STM/TARGET_STM32L0/flash_api.c b/targets/TARGET_STM/TARGET_STM32L0/flash_api.c index 1a232bb2f5..bd4a411cb0 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/flash_api.c +++ b/targets/TARGET_STM/TARGET_STM32L0/flash_api.c @@ -158,7 +158,7 @@ uint32_t flash_get_sector_size(const flash_t *obj, uint32_t address) { } uint32_t flash_get_page_size(const flash_t *obj) { - /* Page size is the minimum programmable size, which 4 bytes */ + /* Page size is the minimum programable size, which 4 bytes */ return 4; } diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/system_clock.c b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/system_clock.c index 944956c5da..d14cbc4bc6 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/system_clock.c @@ -117,7 +117,7 @@ void SetSysClock(void) /* 3- If fail start with HSI clock */ if (SetSysClock_PLL_HSI() == 0) { while(1) { - // [TODO] Put something here to tell the user that a problem occurred... + // [TODO] Put something here to tell the user that a problem occured... } } } diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_MTS_XDOT/device/system_clock.c b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_MTS_XDOT/device/system_clock.c index f776950cf6..6d1889d50a 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_MTS_XDOT/device/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_MTS_XDOT/device/system_clock.c @@ -133,7 +133,7 @@ void SetSysClock(void) /* 3- If fail start with HSI clock */ if (SetSysClock_PLL_HSI() == 0) { while(1) { - // [TODO] Put something here to tell the user that a problem occurred... + // [TODO] Put something here to tell the user that a problem occured... } } } diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/device/system_clock.c b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/device/system_clock.c index d6cf4416dc..df762686ea 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/device/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/device/system_clock.c @@ -117,7 +117,7 @@ void SetSysClock(void) /* 3- If fail start with HSI clock */ if (SetSysClock_PLL_HSI() == 0) { while(1) { - // [TODO] Put something here to tell the user that a problem occurred... + // [TODO] Put something here to tell the user that a problem occured... } } } diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/system_clock.c b/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/system_clock.c index f776950cf6..6d1889d50a 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/system_clock.c @@ -133,7 +133,7 @@ void SetSysClock(void) /* 3- If fail start with HSI clock */ if (SetSysClock_PLL_HSI() == 0) { while(1) { - // [TODO] Put something here to tell the user that a problem occurred... + // [TODO] Put something here to tell the user that a problem occured... } } } diff --git a/targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_flash_ex.c b/targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_flash_ex.c index c8aa093cb7..63d8b991c4 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_flash_ex.c +++ b/targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_flash_ex.c @@ -1056,7 +1056,7 @@ static HAL_StatusTypeDef FLASH_OB_BORConfig(uint8_t OB_BOR) status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); } - /* Return the Option Byte BOR programming Status */ + /* Return the Option Byte BOR programmation Status */ return status; } diff --git a/targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_i2s.c b/targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_i2s.c index 73f83e2e8b..9e4151e1a7 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_i2s.c +++ b/targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_i2s.c @@ -1033,7 +1033,7 @@ void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s) /* I2S interrupt error -------------------------------------------------*/ if(__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET) { - /* I2S Overrun error interrupt occurred --------------------------------*/ + /* I2S Overrun error interrupt occured ---------------------------------*/ if((i2ssr & I2S_FLAG_OVR) == I2S_FLAG_OVR) { /* Disable RXNE and ERR interrupt */ @@ -1043,7 +1043,7 @@ void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s) SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_OVR); } - /* I2S Underrun error interrupt occurred -------------------------------*/ + /* I2S Underrun error interrupt occured --------------------------------*/ if((i2ssr & I2S_FLAG_UDR) == I2S_FLAG_UDR) { /* Disable TXE and ERR interrupt */ @@ -1053,7 +1053,7 @@ void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s) SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_UDR); } - /* I2S Frame format error interrupt occurred --------------------------*/ + /* I2S Frame format error interrupt occured --------------------------*/ if((i2ssr & I2S_FLAG_FRE) == I2S_FLAG_FRE) { /* Disable TXE and ERR interrupt */ diff --git a/targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_sd.c b/targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_sd.c index e45d6b1151..31b144ac60 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_sd.c +++ b/targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_sd.c @@ -1781,7 +1781,7 @@ HAL_SD_ErrorTypedef HAL_SD_WideBusOperation_Config(SD_HandleTypeDef *hsd, uint32 } else { - /* An error occurred while enabling/disabling the wide bus*/ + /* An error occured while enabling/disabling the wide bus*/ } } else diff --git a/targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_ll_i2c.h b/targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_ll_i2c.h index 84a2057411..dbe82c30be 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_ll_i2c.h +++ b/targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_ll_i2c.h @@ -1205,7 +1205,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_ADDR(I2C_TypeDef *I2Cx) /** * @brief Indicate the status of 10-bit header sent (master mode). - * @note RESET: When no ADD10 event occurred. + * @note RESET: When no ADD10 event occured. * SET: When the master has sent the first address byte (header). * @rmtoll SR1 ADD10 LL_I2C_IsActiveFlag_ADD10 * @param I2Cx I2C Instance. diff --git a/targets/TARGET_STM/TARGET_STM32L1/flash_api.c b/targets/TARGET_STM/TARGET_STM32L1/flash_api.c index d4b1b44203..5e6932071f 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/flash_api.c +++ b/targets/TARGET_STM/TARGET_STM32L1/flash_api.c @@ -157,7 +157,7 @@ uint32_t flash_get_sector_size(const flash_t *obj, uint32_t address) uint32_t flash_get_page_size(const flash_t *obj) { - /* Page size is the minimum programmable size, which 4 bytes */ + /* Page size is the minimum programable size, which 4 bytes */ return 4; } diff --git a/targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_sai.c b/targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_sai.c index 74f81be2ce..02f941c970 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_sai.c +++ b/targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_sai.c @@ -1469,7 +1469,7 @@ void HAL_SAI_IRQHandler(SAI_HandleTypeDef *hsai) uint32_t cr1config = hsai->Instance->CR1; uint32_t tmperror; - /* SAI Fifo request interrupt occurred -----------------------------------*/ + /* SAI Fifo request interrupt occured ------------------------------------*/ if(((itflags & SAI_xSR_FREQ) == SAI_xSR_FREQ) && ((itsources & SAI_IT_FREQ) == SAI_IT_FREQ)) { hsai->InterruptServiceRoutine(hsai); diff --git a/targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_ll_lptim.h b/targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_ll_lptim.h index 4b8c1dc129..fc04402a39 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_ll_lptim.h +++ b/targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_ll_lptim.h @@ -1030,7 +1030,7 @@ __STATIC_INLINE void LL_LPTIM_ClearFLAG_ARRM(LPTIM_TypeDef *LPTIMx) } /** - * @brief Inform application whether a autoreload match interrupt has occurred. + * @brief Inform application whether a autoreload match interrupt has occured. * @rmtoll ISR ARRM LL_LPTIM_IsActiveFlag_ARRM * @param LPTIMx Low-Power Timer instance * @retval State of bit (1 or 0). diff --git a/targets/TARGET_STM/TARGET_STM32L4/flash_api.c b/targets/TARGET_STM/TARGET_STM32L4/flash_api.c index 45444bee0e..4904e93317 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/flash_api.c +++ b/targets/TARGET_STM/TARGET_STM32L4/flash_api.c @@ -254,7 +254,7 @@ uint32_t flash_get_sector_size(const flash_t *obj, uint32_t address) { * @return The size of a page */ uint32_t flash_get_page_size(const flash_t *obj) { - /* Page size is the minimum programmable size, which 8 bytes */ + /* Page size is the minimum programable size, which 8 bytes */ return 8; } diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/serial_api.c b/targets/TARGET_Silicon_Labs/TARGET_EFM32/serial_api.c index a5b98a4081..987ee98375 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/serial_api.c +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/serial_api.c @@ -1910,7 +1910,7 @@ uint8_t serial_rx_active(serial_t *obj) } /** The asynchronous TX handler. Writes to the TX FIFO and checks for events. - * If any TX event has occurred, the TX abort function is called. + * If any TX event has occured, the TX abort function is called. * * @param obj The serial object * @return Returns event flags if a TX transfer termination condition was met or 0 otherwise @@ -1961,7 +1961,7 @@ int serial_tx_irq_handler_asynch(serial_t *obj) } /** The asynchronous RX handler. Reads from the RX FIFOF and checks for events. - * If any RX event has occurred, the RX abort function is called. + * If any RX event has occured, the RX abort function is called. * * @param obj The serial object * @return Returns event flags if a RX transfer termination condition was met or 0 otherwise diff --git a/targets/TARGET_TOSHIBA/TARGET_TMPM066/Periph_Driver/inc/tmpm066_uart.h b/targets/TARGET_TOSHIBA/TARGET_TMPM066/Periph_Driver/inc/tmpm066_uart.h index f49d91b38a..8f5df68ef2 100644 --- a/targets/TARGET_TOSHIBA/TARGET_TMPM066/Periph_Driver/inc/tmpm066_uart.h +++ b/targets/TARGET_TOSHIBA/TARGET_TMPM066/Periph_Driver/inc/tmpm066_uart.h @@ -59,7 +59,7 @@ extern "C" { uint32_t TIDLE; /*!< The status of TXDx pin after output of the last bit */ uint32_t TXDEMP; /*!< The status of TXDx pin when an under run error - has occurred in SCLK input mode */ + is occured in SCLK input mode */ uint32_t EHOLDTime; /*!< The last bit hold time of TXDx pin in SCLK input mode */ uint32_t IntervalTime; /*!< Setting interval time of continuous transmission which diff --git a/targets/TARGET_TOSHIBA/TARGET_TMPM066/Periph_Driver/src/tmpm066_i2c.c b/targets/TARGET_TOSHIBA/TARGET_TMPM066/Periph_Driver/src/tmpm066_i2c.c index a6c993cc29..2a90f4a30f 100644 --- a/targets/TARGET_TOSHIBA/TARGET_TMPM066/Periph_Driver/src/tmpm066_i2c.c +++ b/targets/TARGET_TOSHIBA/TARGET_TMPM066/Periph_Driver/src/tmpm066_i2c.c @@ -246,7 +246,7 @@ void I2C_ClearINTReq(TSB_I2C_TypeDef * I2Cx) } /** - * @brief Set I2C bus to Master mode and Generate start condition in I2C mode. + * @brief Set I2c bus to Master mode and Generate start condition in I2C mode. * @param I2Cx: Select the I2C channel. * This parameter can be one of the following values: * TSB_I2C0,TSB_I2C1 @@ -262,7 +262,7 @@ void I2C_GenerateStart(TSB_I2C_TypeDef * I2Cx) } /** - * @brief Set I2C bus to Master mode and Generate stop condition in I2C mode. + * @brief Set I2c bus to Master mode and Generate stop condition in I2C mode. * @param I2Cx: Select the I2C channel. * This parameter can be one of the following values: * TSB_I2C0,TSB_I2C1 diff --git a/targets/TARGET_TOSHIBA/TARGET_TMPM066/Periph_Driver/src/tmpm066_uart.c b/targets/TARGET_TOSHIBA/TARGET_TMPM066/Periph_Driver/src/tmpm066_uart.c index 0f1dd33ec9..2dd7cc1b8c 100644 --- a/targets/TARGET_TOSHIBA/TARGET_TMPM066/Periph_Driver/src/tmpm066_uart.c +++ b/targets/TARGET_TOSHIBA/TARGET_TMPM066/Periph_Driver/src/tmpm066_uart.c @@ -1121,7 +1121,7 @@ void SIO_Init(TSB_SC_TypeDef * SIOx, uint32_t IOClkSel, SIO_InitTypeDef * InitSt tmp &= (CR_IOC_MASK & CR_SCLKS_MASK & CR_TIDLE_MASK); tmp |= (IOClkSel | InitStruct->InputClkEdge | InitStruct->TIDLE); - /* Set status of TXDx pin when an under run error has occurred + /* Set status of TXDx pin when an under run error is occured and The last bit hold time of TXDx pin in SCLK input mode */ if (IOClkSel == SIO_CLK_SCLKINPUT) { tmp &= (CR_TXDEMP_MASK & CR_EHOLD_MASK);