diff --git a/hal/mpu/mbed_mpu_v7m.c b/hal/mpu/mbed_mpu_v7m.c index 5778e74739..7b7a7c7259 100644 --- a/hal/mpu/mbed_mpu_v7m.c +++ b/hal/mpu/mbed_mpu_v7m.c @@ -15,7 +15,6 @@ */ #include "hal/mpu_api.h" #include "platform/mbed_assert.h" -#include "platform/mbed_error.h" #include "cmsis.h" #if ((__ARM_ARCH_7M__ == 1U) || (__ARM_ARCH_7EM__ == 1U) || (__ARM_ARCH_6M__ == 1U)) && \ @@ -26,7 +25,9 @@ #error "Device has v7m MPU but it is not enabled. Add 'MPU' to device_has in targets.json" #endif -#if !defined(MBED_MPU_ROM_END) +#ifdef MBED_CONF_TARGET_MPU_ROM_END +#define MBED_MPU_ROM_END MBED_CONF_TARGET_MPU_ROM_END +#else #define MBED_MPU_ROM_END (0x10000000 - 1) #endif #define MBED_MPU_RAM_START (MBED_MPU_ROM_END + 1) @@ -45,12 +46,17 @@ MBED_STATIC_ASSERT( void mbed_mpu_init() { // Flush memory writes before configuring the MPU. - __DSB(); + __DMB(); const uint32_t regions = (MPU->TYPE & MPU_TYPE_DREGION_Msk) >> MPU_TYPE_DREGION_Pos; - if (regions < 4) { - MBED_ERROR(MBED_MAKE_ERROR(MBED_MODULE_HAL, MBED_ERROR_CODE_EINVAL), "Device is not capable of supporting an MPU - remove DEVICE_MPU for device_has."); - } + + // Our MPU setup requires 3 or 4 regions - if this assert is hit, remove + // a region by setting MPU_ROM_END to 0x1fffffff, or remove MPU from device_has +#if MBED_MPU_RAM_START == 0x20000000 + MBED_ASSERT(regions >= 3); +#else + MBED_ASSERT(regions >= 4); +#endif // Disable the MCU MPU->CTRL = 0; @@ -74,13 +80,12 @@ void mbed_mpu_init() * 0xE0000000 - 0xFFFFFFFF System No */ - // Select region 1 and used it for the WT rom region - // - RAM 0x00000000 to MBED_MPU_ROM_END - MPU->RNR = 0; - // Set address to 0 - MPU->RBAR = 0; - // Configure and enable region - MPU->RASR = + // Select region 0 and use it for the WT read-only rom region + // - Code 0x00000000 to MBED_MPU_ROM_END + ARM_MPU_SetRegion( + ARM_MPU_RBAR( + 0, // Region + 0x00000000), // Base ARM_MPU_RASR( 0, // DisableExec ARM_MPU_AP_RO, // AccessPermission @@ -97,16 +102,16 @@ void mbed_mpu_init() ((MBED_MPU_ROM_END >= 0x14000000) ? 0 : (1 << 5)) | ((MBED_MPU_ROM_END >= 0x18000000) ? 0 : (1 << 6)) | ((MBED_MPU_ROM_END >= 0x1C000000) ? 0 : (1 << 7)), - ARM_MPU_REGION_SIZE_512MB // Size - ); + ARM_MPU_REGION_SIZE_512MB) // Size + ); - // Select region 1 and used it for the WT rom region - // - RAM MBED_MPU_ROM_END + 1 to 0x1FFFFFFF - MPU->RNR = 1; - // Set address to 0 - MPU->RBAR = 0; - // Configure and enable region - MPU->RASR = +#if MBED_MPU_RAM_START < 0x20000000 + // Select region 3 and use it for a WT ram region in the Code area + // - Code MBED_MPU_ROM_END + 1 to 0x1FFFFFFF + ARM_MPU_SetRegion( + ARM_MPU_RBAR( + 3, // Region + 0x00000000), // Base ARM_MPU_RASR( 1, // DisableExec ARM_MPU_AP_FULL, // AccessPermission @@ -123,17 +128,20 @@ void mbed_mpu_init() ((MBED_MPU_RAM_START <= 0x18000000) ? 0 : (1 << 5)) | ((MBED_MPU_RAM_START <= 0x1C000000) ? 0 : (1 << 6)) | ((MBED_MPU_RAM_START <= 0x20000000) ? 0 : (1 << 7)), - ARM_MPU_REGION_SIZE_512MB // Size - ); + ARM_MPU_REGION_SIZE_512MB) // Size + ); +#define LAST_RAM_REGION 3 +#else +#define LAST_RAM_REGION 2 +#endif - // Select region 2 and used it for WBWA ram regions + // Select region 1 and use it for WBWA ram regions // - SRAM 0x20000000 to 0x3FFFFFFF // - RAM 0x60000000 to 0x7FFFFFFF - MPU->RNR = 2; - // Set address to 0 - MPU->RBAR = 0; - // Configure and enable region - MPU->RASR = + ARM_MPU_SetRegion( + ARM_MPU_RBAR( + 1, // Region + 0x00000000), // Base ARM_MPU_RASR( 1, // DisableExec ARM_MPU_AP_FULL, // AccessPermission @@ -150,16 +158,15 @@ void mbed_mpu_init() (1 << 5) | // Disable Sub-region (1 << 6) | // Disable Sub-region (1 << 7), // Disable Sub-region - ARM_MPU_REGION_SIZE_4GB // Size - ); + ARM_MPU_REGION_SIZE_4GB) // Size + ); - // Select region 3 and used it for the WT ram region - // - RAM RAM 0x80000000 to 0x9FFFFFFF - MPU->RNR = 3; - // Set address - MPU->RBAR = 0x80000000; - // Configure and enable region - MPU->RASR = + // Select region 2 and use it for the WT ram region + // - RAM 0x80000000 to 0x9FFFFFFF + ARM_MPU_SetRegion( + ARM_MPU_RBAR( + 2, // Region + 0x80000000), // Base ARM_MPU_RASR( 1, // DisableExec ARM_MPU_AP_FULL, // AccessPermission @@ -167,9 +174,9 @@ void mbed_mpu_init() 0, // IsShareable 1, // IsCacheable 0, // IsBufferable - ~0U, // SubRegionDisable - ARM_MPU_REGION_SIZE_512MB // Size - ); + 0U, // SubRegionDisable + ARM_MPU_REGION_SIZE_512MB) // Size + ); // Enable the MPU MPU->CTRL = @@ -178,53 +185,53 @@ void mbed_mpu_init() (1 << MPU_CTRL_ENABLE_Pos); // Enable MPU // Ensure changes take effect - __ISB(); __DSB(); + __ISB(); } void mbed_mpu_free() { // Flush memory writes before configuring the MPU. - __DSB(); + __DMB(); // Disable the MPU MPU->CTRL = 0; // Ensure changes take effect - __ISB(); __DSB(); + __ISB(); +} + +static void enable_region(bool enable, uint32_t region) +{ + MPU->RNR = region; + MPU->RASR = (MPU->RASR & ~MPU_RASR_ENABLE_Msk) | (enable << MPU_RASR_ENABLE_Pos); } void mbed_mpu_enable_rom_wn(bool enable) { // Flush memory writes before configuring the MPU. - __DSB(); + __DMB(); - MPU->RNR = 0; - MPU->RASR = (MPU->RASR & ~MPU_RASR_ENABLE_Msk) | (enable ? MPU_RASR_ENABLE_Msk : 0); + enable_region(enable, 0); // Ensure changes take effect - __ISB(); __DSB(); + __ISB(); } void mbed_mpu_enable_ram_xn(bool enable) { // Flush memory writes before configuring the MPU. - __DSB(); + __DMB(); - MPU->RNR = 1; - MPU->RASR = (MPU->RASR & ~MPU_RASR_ENABLE_Msk) | (enable ? MPU_RASR_ENABLE_Msk : 0); - - MPU->RNR = 2; - MPU->RASR = (MPU->RASR & ~MPU_RASR_ENABLE_Msk) | (enable ? MPU_RASR_ENABLE_Msk : 0); - - MPU->RNR = 3; - MPU->RASR = (MPU->RASR & ~MPU_RASR_ENABLE_Msk) | (enable ? MPU_RASR_ENABLE_Msk : 0); + for (uint32_t region = 1; region <= LAST_RAM_REGION; region++) { + enable_region(enable, region); + } // Ensure changes take effect - __ISB(); __DSB(); + __ISB(); } #endif diff --git a/hal/mpu/mbed_mpu_v8m.c b/hal/mpu/mbed_mpu_v8m.c index 7304c149b9..4b992f543d 100644 --- a/hal/mpu/mbed_mpu_v8m.c +++ b/hal/mpu/mbed_mpu_v8m.c @@ -15,7 +15,6 @@ */ #include "hal/mpu_api.h" #include "platform/mbed_assert.h" -#include "platform/mbed_error.h" #include "cmsis.h" #if ((__ARM_ARCH_8M_BASE__ == 1U) || (__ARM_ARCH_8M_MAIN__ == 1U)) && \ @@ -26,35 +25,44 @@ #error "Device has v8m MPU but it is not enabled. Add 'MPU' to device_has in targets.json" #endif -#if !defined(MBED_MPU_ROM_END) -#define MBED_MPU_ROM_END (0x20000000 - 1) +#ifdef MBED_CONF_TARGET_MPU_ROM_END +#define MBED_MPU_ROM_END MBED_CONF_TARGET_MPU_ROM_END +#else +#define MBED_MPU_ROM_END (0x10000000 - 1) #endif +#define MBED_MPU_RAM_START (MBED_MPU_ROM_END + 1) -MBED_STATIC_ASSERT(MBED_MPU_ROM_END == 0x1fffffff, "Changing MBED_MPU_ROM_END for ARMv8-M is not supported."); +MBED_STATIC_ASSERT(MBED_MPU_ROM_END <= 0x20000000 - 1, + "Unsupported value for MBED_MPU_ROM_END"); void mbed_mpu_init() { // Flush memory writes before configuring the MPU. - __DSB(); + __DMB(); const uint32_t regions = (MPU->TYPE & MPU_TYPE_DREGION_Msk) >> MPU_TYPE_DREGION_Pos; - if (regions < 4) { - MBED_ERROR(MBED_MAKE_ERROR(MBED_MODULE_HAL, MBED_ERROR_CODE_EINVAL), "Device is not capable of supporting an MPU - remove DEVICE_MPU for device_has."); - } + + // Our MPU setup requires 4 or 5 regions - if this assert is hit, remove + // a region by setting MPU_ROM_END to 0x1fffffff, or remove MPU from device_has +#if MBED_MPU_RAM_START == 0x20000000 + MBED_ASSERT(regions >= 4); +#else + MBED_ASSERT(regions >= 5); +#endif // Disable the MCU MPU->CTRL = 0; // Reset all mapping for (uint32_t i = 0; i < regions; i++) { - ARM_MPU_ClrRegionEx(MPU, i); + ARM_MPU_ClrRegion(i); } /* * ARMv8-M memory map: * * Start End Name Executable by default Default cache Mbed MPU protection - * 0x00000000 - 0x1FFFFFFF Code Yes WT, WA Write disabled + * 0x00000000 - 0x1FFFFFFF Code Yes WT, WA Write disabled for first portion and execute disabled for the rest * 0x20000000 - 0x3FFFFFFF SRAM Yes WB, WA, RA Execute disabled * 0x40000000 - 0x5FFFFFFF Peripheral No * 0x60000000 - 0x7FFFFFFF RAM Yes WB, WA, RA Execute disabled @@ -64,61 +72,85 @@ void mbed_mpu_init() * 0xE0000000 - 0xFFFFFFFF System No */ - uint32_t region; - uint8_t outer; - uint8_t inner; + const uint8_t WTRA = ARM_MPU_ATTR_MEMORY_(1, 0, 1, 0); // Non-transient, Write-Through, Read-allocate, Not Write-allocate + const uint8_t WBWARA = ARM_MPU_ATTR_MEMORY_(1, 1, 1, 1); // Non-transient, Write-Back, Read-allocate, Write-allocate + enum { + AttrIndex_WTRA, + AttrIndex_WBWARA, + }; - region = 0; - MPU->RNR = region; - outer = 0xA; // Write-Through, Non-transient, Read-allocate - inner = 0xA; // Write-Through, Non-transient, Read-allocate - ARM_MPU_SetMemAttrEx(MPU, region, (outer << 4) | (inner << 0)); - MPU->RBAR = (0x00000000 & MPU_RBAR_BASE_Msk) | // Start address is 0x00000000 - (0 << MPU_RBAR_SH_Pos) | // Not shareable - (3 << MPU_RBAR_AP_Pos) | // RO allowed by all privilege levels - (0 << MPU_RBAR_XN_Pos); // Execute Never disabled - MPU->RLAR = (0x1FFFFFFF & MPU_RLAR_LIMIT_Msk) | // Last address is 0x1FFFFFFF - (region << MPU_RLAR_AttrIndx_Pos) | // Attribute index - configured to be the same as the region number - (1 << MPU_RLAR_EN_Pos); // Region enabled + ARM_MPU_SetMemAttr(AttrIndex_WTRA, ARM_MPU_ATTR(WTRA, WTRA)); + ARM_MPU_SetMemAttr(AttrIndex_WBWARA, ARM_MPU_ATTR(WBWARA, WBWARA)); - region = 1; - MPU->RNR = region; - outer = 0xF; // Write-Back, Non-transient, Read-allocate, Write-allocate - outer = 0xF; // Write-Back, Non-transient, Read-allocate, Write-allocate - ARM_MPU_SetMemAttrEx(MPU, region, (outer << 4) | (inner << 0)); - MPU->RBAR = (0x20000000 & MPU_RBAR_BASE_Msk) | // Start address is 0x20000000 - (0 << MPU_RBAR_SH_Pos) | // Not shareable - (1 << MPU_RBAR_AP_Pos) | // RW allowed by all privilege levels - (1 << MPU_RBAR_XN_Pos); // Execute Never enabled - MPU->RLAR = (0x3FFFFFFF & MPU_RLAR_LIMIT_Msk) | // Last address is 0x3FFFFFFF - (region << MPU_RLAR_AttrIndx_Pos) | // Attribute index - configured to be the same as the region number - (1 << MPU_RLAR_EN_Pos); // Region enabled + ARM_MPU_SetRegion( + 0, // Region + ARM_MPU_RBAR( + 0x00000000, // Base + ARM_MPU_SH_NON, // Non-shareable + 1, // Read-Only + 1, // Non-Privileged + 0), // Execute Never disabled + ARM_MPU_RLAR( + MBED_MPU_ROM_END, // Limit + AttrIndex_WTRA) // Attribute index - Write-Through, Read-allocate + ); - region = 2; - MPU->RNR = region; - outer = 0xF; // Write-Back, Non-transient, Read-allocate, Write-allocate - outer = 0xF; // Write-Back, Non-transient, Read-allocate, Write-allocate - ARM_MPU_SetMemAttrEx(MPU, region, (outer << 4) | (inner << 0)); - MPU->RBAR = (0x60000000 & MPU_RBAR_BASE_Msk) | // Start address is 0x60000000 - (0 << MPU_RBAR_SH_Pos) | // Not shareable - (1 << MPU_RBAR_AP_Pos) | // RW allowed by all privilege levels - (1 << MPU_RBAR_XN_Pos); // Execute Never enabled - MPU->RLAR = (0x7FFFFFFF & MPU_RLAR_LIMIT_Msk) | // Last address is 0x7FFFFFFF - (region << MPU_RLAR_AttrIndx_Pos) | // Attribute index - configured to be the same as the region number - (1 << MPU_RLAR_EN_Pos); // Region enabled +#if MBED_MPU_RAM_START != 0x20000000 + ARM_MPU_SetRegion( + 4, // Region + ARM_MPU_RBAR( + MBED_MPU_RAM_START, // Base + ARM_MPU_SH_NON, // Non-shareable + 0, // Read-Write + 1, // Non-Privileged + 1), // Execute Never enabled + ARM_MPU_RLAR( + 0x1FFFFFFF, // Limit + AttrIndex_WTRA) // Attribute index - Write-Through, Read-allocate + ); +#define LAST_RAM_REGION 4 +#else +#define LAST_RAM_REGION 3 +#endif - region = 3; - MPU->RNR = region; - outer = 0xA; // Write-Through, Non-transient, Read-allocate - inner = 0xA; // Write-Through, Non-transient, Read-allocate - ARM_MPU_SetMemAttrEx(MPU, region, (outer << 4) | (inner << 0)); - MPU->RBAR = (0x80000000 & MPU_RBAR_BASE_Msk) | // Start address is 0x80000000 - (0 << MPU_RBAR_SH_Pos) | // Not shareable - (1 << MPU_RBAR_AP_Pos) | // RW allowed by all privilege levels - (1 << MPU_RBAR_XN_Pos); // Execute Never enabled - MPU->RLAR = (0x9FFFFFFF & MPU_RLAR_LIMIT_Msk) | // Last address is 0x9FFFFFFF - (region << MPU_RLAR_AttrIndx_Pos) | // Attribute index - configured to be the same as the region number - (1 << MPU_RLAR_EN_Pos); // Region enabled + ARM_MPU_SetRegion( + 1, // Region + ARM_MPU_RBAR( + 0x20000000, // Base + ARM_MPU_SH_NON, // Non-shareable + 0, // Read-Write + 1, // Non-Privileged + 1), // Execute Never enabled + ARM_MPU_RLAR( + 0x3FFFFFFF, // Limit + AttrIndex_WBWARA) // Attribute index - Write-Back, Write-allocate + ); + + ARM_MPU_SetRegion( + 2, // Region + ARM_MPU_RBAR( + 0x60000000, // Base + ARM_MPU_SH_NON, // Non-shareable + 0, // Read-Write + 1, // Non-Privileged + 1), // Execute Never enabled + ARM_MPU_RLAR( + 0x7FFFFFFF, // Limit + AttrIndex_WBWARA) // Attribute index - Write-Back, Write-allocate + ); + + ARM_MPU_SetRegion( + 3, // Region + ARM_MPU_RBAR( + 0x80000000, // Base + ARM_MPU_SH_NON, // Non-shareable + 0, // Read-Write + 1, // Non-Privileged + 1), // Execute Never enabled + ARM_MPU_RLAR( + 0x9FFFFFFF, // Limit + AttrIndex_WTRA) // Attribute index - Write-Through, Read-allocate + ); // Enable the MPU MPU->CTRL = @@ -127,53 +159,53 @@ void mbed_mpu_init() (1 << MPU_CTRL_ENABLE_Pos); // Enable MPU // Ensure changes take effect - __ISB(); __DSB(); + __ISB(); } void mbed_mpu_free() { // Flush memory writes before configuring the MPU. - __DSB(); + __DMB(); // Disable the MCU MPU->CTRL = 0; // Ensure changes take effect - __ISB(); __DSB(); + __ISB(); +} + +static void enable_region(bool enable, uint32_t region) +{ + MPU->RNR = region; + MPU->RLAR = (MPU->RLAR & ~MPU_RLAR_EN_Msk) | (enable << MPU_RLAR_EN_Pos); } void mbed_mpu_enable_rom_wn(bool enable) { // Flush memory writes before configuring the MPU. - __DSB(); + __DMB(); - MPU->RNR = 0; - MPU->RLAR = (MPU->RLAR & ~MPU_RLAR_EN_Msk) | (enable ? MPU_RLAR_EN_Msk : 0); + enable_region(enable, 0); // Ensure changes take effect - __ISB(); __DSB(); + __ISB(); } void mbed_mpu_enable_ram_xn(bool enable) { // Flush memory writes before configuring the MPU. - __DSB(); + __DMB(); - MPU->RNR = 1; - MPU->RLAR = (MPU->RLAR & ~MPU_RLAR_EN_Msk) | (enable ? MPU_RLAR_EN_Msk : 0); - - MPU->RNR = 2; - MPU->RLAR = (MPU->RLAR & ~MPU_RLAR_EN_Msk) | (enable ? MPU_RLAR_EN_Msk : 0); - - MPU->RNR = 3; - MPU->RLAR = (MPU->RLAR & ~MPU_RLAR_EN_Msk) | (enable ? MPU_RLAR_EN_Msk : 0); + for (uint32_t region = 1; region <= LAST_RAM_REGION; region++) { + enable_region(enable, region); + } // Ensure changes take effect - __ISB(); __DSB(); + __ISB(); } #endif diff --git a/platform/mbed_application.c b/platform/mbed_application.c index 41930fcd65..c23520b0b3 100644 --- a/platform/mbed_application.c +++ b/platform/mbed_application.c @@ -19,7 +19,7 @@ #include #include "device.h" #include "platform/mbed_application.h" -#include "hal/mpu_api.h" +#include "platform/mbed_mpu_mgmt.h" #if MBED_APPLICATION_SUPPORT @@ -69,7 +69,7 @@ void mbed_start_application(uintptr_t address) SysTick->CTRL = 0x00000000; powerdown_nvic(); powerdown_scb(address); - mbed_mpu_free(); + mbed_mpu_manager_deinit(); #ifdef MBED_DEBUG // Configs to make debugging easier diff --git a/platform/mbed_mpu_mgmt.h b/platform/mbed_mpu_mgmt.h index 6140c3110f..8364941d79 100644 --- a/platform/mbed_mpu_mgmt.h +++ b/platform/mbed_mpu_mgmt.h @@ -35,6 +35,8 @@ extern "C" { #define mbed_mpu_manager_init() mbed_mpu_init() +#define mbed_mpu_manager_deinit() mbed_mpu_free() + /** Lock ram execute never mode off * * This disables the MPU's execute never ram protection and allows @@ -87,6 +89,8 @@ void mbed_mpu_manager_unlock_rom_write(void); #define mbed_mpu_manager_init() (void)0 +#define mbed_mpu_manager_deinit() (void)0 + #define mbed_mpu_manager_lock_ram_execution() (void)0 #define mbed_mpu_manager_unlock_ram_execution() (void)0 diff --git a/targets/targets.json b/targets/targets.json index c76565fd33..598b517df2 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -33,8 +33,7 @@ }, "mpu-rom-end": { "help": "Last address of ROM protected by the MPU", - "value": "0x0fffffff", - "macro_name": "MPU_ROM_END" + "value": "0x0fffffff" } } }, @@ -6735,6 +6734,9 @@ "value": 0 } }, + "overrides": { + "mpu-rom-end": "0x1fffffff" + }, "OUTPUT_EXT": "hex", "is_disk_virtual": true, "supported_toolchains": ["GCC_ARM", "ARM", "IAR"], @@ -7535,6 +7537,9 @@ "value": "GPIO_DBCTL_DBCLKSEL_16" } }, + "overrides": { + "mpu-rom-end": "0x1fffffff" + }, "inherits": ["Target"], "device_has": [ "USTICKER",