mirror of https://github.com/ARMmbed/mbed-os.git
Merge branch 'c027_lpc1768_refactor' of git://github.com/sg-/mbed into sg--c027_lpc1768_refactor
Conflicts: workspace_tools/export/uvision4.pypull/159/merge
commit
6e82b54538
|
@ -24,6 +24,7 @@ Supported Microcontrollers
|
|||
--------------------------
|
||||
NXP:
|
||||
* [LPC1768](http://mbed.org/platforms/mbed-LPC1768/) (Cortex-M3)
|
||||
* [LPC1768](http://mbed.org/platforms/u-blox-C027/) (Cortex-M3)
|
||||
* [LPC11U24](http://mbed.org/platforms/mbed-LPC11U24/) (Cortex-M0)
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* LPC2368 (ARM7TDMI-S)
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||||
* LPC810 (Cortex-M0+)
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|
|
|
@ -19,10 +19,12 @@
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|||
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||||
WEAK void mbed_die(void);
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WEAK void mbed_die(void) {
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#if defined(DEVICE_ERROR_RED)
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__disable_irq(); // dont allow interrupts to disturb the flash pattern
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#if (DEVICE_ERROR_RED == 1)
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gpio_t led_red; gpio_init(&led_red, LED_RED, PIN_OUTPUT);
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|
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#elif defined(DEVICE_ERROR_PATTERN)
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#elif (DEVICE_ERROR_PATTERN == 1)
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gpio_t led_1; gpio_init(&led_1, LED1, PIN_OUTPUT);
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gpio_t led_2; gpio_init(&led_2, LED2, PIN_OUTPUT);
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gpio_t led_3; gpio_init(&led_3, LED3, PIN_OUTPUT);
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@ -30,26 +32,28 @@ WEAK void mbed_die(void) {
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#endif
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while (1) {
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#if defined(DEVICE_ERROR_RED)
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#if (DEVICE_ERROR_RED == 1)
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gpio_write(&led_red, 1);
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#elif defined(DEVICE_ERROR_PATTERN)
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#elif (DEVICE_ERROR_PATTERN == 1)
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gpio_write(&led_1, 1);
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gpio_write(&led_2, 0);
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gpio_write(&led_3, 0);
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gpio_write(&led_4, 1);
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#endif
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wait_ms(150);
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#if defined(DEVICE_ERROR_RED)
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#if (DEVICE_ERROR_RED == 1)
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gpio_write(&led_red, 0);
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#elif defined(DEVICE_ERROR_PATTERN)
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#elif (DEVICE_ERROR_PATTERN == 1)
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gpio_write(&led_1, 0);
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gpio_write(&led_2, 1);
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gpio_write(&led_3, 1);
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gpio_write(&led_4, 0);
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#endif
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wait_ms(150);
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}
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}
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|
|
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@ -0,0 +1,8 @@
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// List of reserved pins for MBED LPC1768
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#ifndef RESERVED_PINS_H
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#define RESERVED_PINS_H
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#define TARGET_RESERVED_PINS {}
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#endif
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@ -0,0 +1,188 @@
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/* mbed Microcontroller Library
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* Copyright (c) 2006-2013 ARM Limited
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*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
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||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
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||||
* http://www.apache.org/licenses/LICENSE-2.0
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||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
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#ifndef MBED_PINNAMES_H
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#define MBED_PINNAMES_H
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#include "cmsis.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
|
||||
|
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typedef enum {
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PIN_INPUT,
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PIN_OUTPUT
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} PinDirection;
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#define PORT_SHIFT 5
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typedef enum {
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// LPC Pin Names
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P0_0 = LPC_GPIO0_BASE,
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P0_1, P0_2, P0_3, P0_4, P0_5, P0_6, P0_7, P0_8, P0_9, P0_10, P0_11, P0_12, P0_13, P0_14, P0_15, P0_16, P0_17, P0_18, P0_19, P0_20, P0_21, P0_22, P0_23, P0_24, P0_25, P0_26, P0_27, P0_28, P0_29, P0_30, P0_31,
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P1_0, P1_1, P1_2, P1_3, P1_4, P1_5, P1_6, P1_7, P1_8, P1_9, P1_10, P1_11, P1_12, P1_13, P1_14, P1_15, P1_16, P1_17, P1_18, P1_19, P1_20, P1_21, P1_22, P1_23, P1_24, P1_25, P1_26, P1_27, P1_28, P1_29, P1_30, P1_31,
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P2_0, P2_1, P2_2, P2_3, P2_4, P2_5, P2_6, P2_7, P2_8, P2_9, P2_10, P2_11, P2_12, P2_13, P2_14, P2_15, P2_16, P2_17, P2_18, P2_19, P2_20, P2_21, P2_22, P2_23, P2_24, P2_25, P2_26, P2_27, P2_28, P2_29, P2_30, P2_31,
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P3_0, P3_1, P3_2, P3_3, P3_4, P3_5, P3_6, P3_7, P3_8, P3_9, P3_10, P3_11, P3_12, P3_13, P3_14, P3_15, P3_16, P3_17, P3_18, P3_19, P3_20, P3_21, P3_22, P3_23, P3_24, P3_25, P3_26, P3_27, P3_28, P3_29, P3_30, P3_31,
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P4_0, P4_1, P4_2, P4_3, P4_4, P4_5, P4_6, P4_7, P4_8, P4_9, P4_10, P4_11, P4_12, P4_13, P4_14, P4_15, P4_16, P4_17, P4_18, P4_19, P4_20, P4_21, P4_22, P4_23, P4_24, P4_25, P4_26, P4_27, P4_28, P4_29, P4_30, P4_31,
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// Arduino Pin Names
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// PIN header connector
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// for standard-based form factor with expansion board
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// -----------------------------------------------------------
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// PMW = Pulswidth Modulator
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// EINT = External Interrupt
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// AOUT = Analog Output
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// Analog Ports (A0-A5)
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A0 = P0_23, // I2S_CLK
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A1 = P0_24, // I2S_WS
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A2 = P0_25, // I2S_SDA
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A3 = P0_26, // AOUT
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A4 = P1_30, //
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A5 = P1_31, //
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// Digital Port (D0-D7)
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D0 = P4_29, // TXD
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D1 = P4_28, // RXD
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D2 = P2_13, // EINT
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D3 = P2_0, // PWM
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D4 = P2_12, // EINT
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D5 = P2_1, // PWM
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D6 = P2_2, // PWM
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||||
D7 = P2_11, // EINT
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// Digital Port (D8-D13)
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D8 = P2_4, // PWM
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D9 = P2_3, // PWM
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D10 = P1_21, // PWM SSEL
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D11 = P1_24, // PWM MOSI
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D12 = P1_23, // PWM MISO
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D13 = P1_20, // PWM SCK
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// GND
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// AREF
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SDA = P0_0,
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D14 = SDA,
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SCL = P0_1,
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D15 = SCL,
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// I2C (shared with LISA/SARA)
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GPSSDA = P0_27,
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GPSSCL = P0_28,
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// UART
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GPSTXD = P0_10,
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GPSRXD = P0_11,
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// Control
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GPSRST = P1_18, // Reset (input to GPS, active low)
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GPSPPS = P1_19, // 1PPS Timepulse (output from GPS)
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GPSINT = P1_22, // Interrupt (input to GPS)
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||||
GPSEN = P1_29, // Supply Control (high = enabled)
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||||
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// u-blox LISA/SARA cellular modem
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||||
// http://www.u-blox.com/wireless-modules.html
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||||
// -----------------------------------------------------------
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||||
// UART (LPC1768 = DTE, LISA/SARA = DCE)
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MDMTXD = P0_15, // Transmit Data
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MDMRXD = P0_16, // Receive Data
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MDMCTS = P0_17, // Clear to Send
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MDMDCD = P0_18, // Data Carrier Detect
|
||||
MDMDSR = P0_19, // Data Set Ready
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||||
MDMDTR = P0_20, // Data Terminal Ready (set high or use handshake)
|
||||
MDMRI = P0_21, // Ring Indicator
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MDMRTS = P0_22, // Request to Send (set high or use handshake)
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||||
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// USB (not available on C27-G35)
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MDMUSBDP = P0_29, // USB D+
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MDMUSBDN = P0_30, // USB D-
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MDMUSBCON = P2_9, // USB Connect
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MDMUSBDET = P0_7, // USB Detect (n/a on REV.A board)
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// Control
|
||||
MDMEN = P2_5, // Supply Control (high = enabled)
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MDMPWRON = P2_6, //
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MDMGPIO1 = P2_7, // GPIO1, Network status
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||||
MDMRST = P2_8, // Reset (active low, set as open drain!)
|
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MDMLVLOE = P0_9, // Serial/GPIO Level Shifter Output Enable (n/a on REV.A board)
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MDMILVLOE = P0_8, // I2C Level Shifter Output Enable (n/a on REV.A board)
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// CAN (TJA1040)
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// -----------------------------------------------------------
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CANRD = P0_4,
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CANTD = P0_5,
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CANS = P0_6, // standby (low=normal, high=standby/rxonly)
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// Ethernet (DP83848)
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// -----------------------------------------------------------
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ETHTXD0 = P1_0,
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ETHTXD1 = P1_1,
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||||
ETHTXEN = P1_4,
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ETHCRS = P1_8,
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ETHRXD0 = P1_9,
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ETHRXD1 = P1_10,
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ETHRXEN = P1_14,
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ETHREFCLK = P1_15,
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ETHMDC = P1_16,
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ETHMDIO = P1_17,
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ETHOSCEN = P1_27,
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ETHRST = P1_28,
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ETHLINK = P1_25, // LED_LINK
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ETHSPEED = P1_26, // LED_SPEED
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// ISP port
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// -----------------------------------------------------------
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||||
ISP = P2_10,
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// Other mbed Pin Names
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LED = P3_25,
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LED1 = LED,
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LED_RED = LED,
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||||
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// mbed / debug IF (LPC11)
|
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// -----------------------------------------------------------
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// Serial Port
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USBTX = P0_2,
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USBRX = P0_3,
|
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USBTXD = USBTX, // identical USBTX
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USBRXD = USBRX, // identical USBRX
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|
||||
// Not connected
|
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NC = (int)0xFFFFFFFF
|
||||
} PinName;
|
||||
|
||||
typedef enum {
|
||||
PullUp = 0,
|
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PullDown = 3,
|
||||
PullNone = 2,
|
||||
OpenDrain = 4
|
||||
} PinMode;
|
||||
|
||||
// version of PINCON_TypeDef using register arrays
|
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typedef struct {
|
||||
__IO uint32_t PINSEL[11];
|
||||
uint32_t RESERVED0[5];
|
||||
__IO uint32_t PINMODE[10];
|
||||
__IO uint32_t PINMODE_OD[5];
|
||||
} PINCONARRAY_TypeDef;
|
||||
|
||||
#define PINCONARRAY ((PINCONARRAY_TypeDef *)LPC_PINCON_BASE)
|
||||
|
||||
//Additional C027 stuff
|
||||
#define GPSADR (66<<1) // GPS I2C Address
|
||||
#define GPSBAUD 9600 // Default GPS Baud Rate
|
||||
#define MDMBAUD 115200 // Default Modem Baud Rate
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
|
@ -0,0 +1,62 @@
|
|||
/* mbed Microcontroller Library
|
||||
* Copyright (c) 2006-2013 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#ifndef MBED_DEVICE_H
|
||||
#define MBED_DEVICE_H
|
||||
|
||||
#define DEVICE_PORTIN 1
|
||||
#define DEVICE_PORTOUT 1
|
||||
#define DEVICE_PORTINOUT 1
|
||||
|
||||
#define DEVICE_INTERRUPTIN 1
|
||||
|
||||
#define DEVICE_ANALOGIN 1
|
||||
#define DEVICE_ANALOGOUT 1
|
||||
|
||||
#define DEVICE_SERIAL 1
|
||||
#define DEVICE_SERIAL_FC 1
|
||||
|
||||
#define DEVICE_I2C 1
|
||||
#define DEVICE_I2CSLAVE 1
|
||||
|
||||
#define DEVICE_SPI 1
|
||||
#define DEVICE_SPISLAVE 1
|
||||
|
||||
#define DEVICE_CAN 1
|
||||
|
||||
#define DEVICE_RTC 1
|
||||
|
||||
#define DEVICE_ETHERNET 1
|
||||
|
||||
#define DEVICE_PWMOUT 1
|
||||
|
||||
#define DEVICE_SEMIHOST 0
|
||||
#define DEVICE_LOCALFILESYSTEM 0
|
||||
#define DEVICE_ID_LENGTH 0
|
||||
#define DEVICE_MAC_OFFSET 0
|
||||
|
||||
#define DEVICE_SLEEP 1
|
||||
|
||||
#define DEVICE_DEBUG_AWARENESS 1
|
||||
|
||||
#define DEVICE_STDIO_MESSAGES 1
|
||||
|
||||
// should only enable one or the other, not both
|
||||
#define DEVICE_ERROR_PATTERN 0
|
||||
#define DEVICE_ERROR_RED 1
|
||||
|
||||
#include "objects.h"
|
||||
|
||||
#endif
|
|
@ -0,0 +1,8 @@
|
|||
// List of reserved pins for C027 LPC1768
|
||||
|
||||
#ifndef RESERVED_PINS_H
|
||||
#define RESERVED_PINS_H
|
||||
|
||||
#define TARGET_RESERVED_PINS {P3_26}
|
||||
|
||||
#endif
|
|
@ -18,9 +18,12 @@
|
|||
#include "mbed_interface.h"
|
||||
|
||||
void sleep(void) {
|
||||
|
||||
#if (DEVICE_SEMIHOST == 1)
|
||||
// ensure debug is disconnected
|
||||
mbed_interface_disconnect();
|
||||
|
||||
#endif
|
||||
|
||||
// PCON[PD] set to sleep
|
||||
LPC_SC->PCON = 0x0;
|
||||
|
||||
|
@ -58,8 +61,11 @@ void sleep(void) {
|
|||
*/
|
||||
|
||||
void deepsleep(void) {
|
||||
|
||||
#if (DEVICE_SEMIHOST == 1)
|
||||
// ensure debug is disconnected
|
||||
mbed_interface_disconnect();
|
||||
#endif
|
||||
|
||||
// PCON[PD] set to deepsleep
|
||||
sleep();
|
||||
|
|
|
@ -21,7 +21,7 @@ from os.path import basename
|
|||
class Uvision4(Exporter):
|
||||
NAME = 'uVision4'
|
||||
|
||||
TARGETS = ['LPC1768', 'LPC11U24', 'KL05Z', 'KL25Z', 'KL46Z', 'K20D5M', 'LPC1347', 'LPC1114', 'LPC11C24', 'LPC4088', 'LPC812', 'NUCLEO_F103RB', 'NUCLEO_L152RE', 'NUCLEO_F030R8']
|
||||
TARGETS = ['LPC1768', 'LPC11U24', 'KL05Z', 'KL25Z', 'KL46Z', 'K20D5M', 'LPC1347', 'LPC1114', 'LPC11C24', 'LPC4088', 'LPC812', 'NUCLEO_F103RB', 'NUCLEO_L152RE', 'NUCLEO_F030R8', 'C027']
|
||||
|
||||
USING_MICROLIB = ['LPC11U24', 'LPC1114', 'LPC11C24', 'LPC812', 'NUCLEO_F103RB', 'NUCLEO_L152RE', 'NUCLEO_F030R8']
|
||||
|
||||
|
|
|
@ -0,0 +1,201 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
|
||||
|
||||
<SchemaVersion>1.0</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Extensions>
|
||||
<cExt>*.c</cExt>
|
||||
<aExt>*.s*; *.src; *.a*</aExt>
|
||||
<oExt>*.obj</oExt>
|
||||
<lExt>*.lib</lExt>
|
||||
<tExt>*.txt; *.h; *.inc</tExt>
|
||||
<pExt>*.plm</pExt>
|
||||
<CppX>*.cpp</CppX>
|
||||
</Extensions>
|
||||
|
||||
<DaveTm>
|
||||
<dwLowDateTime>0</dwLowDateTime>
|
||||
<dwHighDateTime>0</dwHighDateTime>
|
||||
</DaveTm>
|
||||
|
||||
<Target>
|
||||
<TargetName>mbed NXP LPC1768</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<CLKADS>12000000</CLKADS>
|
||||
<OPTTT>
|
||||
<gFlags>1</gFlags>
|
||||
<BeepAtEnd>1</BeepAtEnd>
|
||||
<RunSim>1</RunSim>
|
||||
<RunTarget>0</RunTarget>
|
||||
</OPTTT>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<FlashByte>65535</FlashByte>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
</OPTHX>
|
||||
<OPTLEX>
|
||||
<PageWidth>79</PageWidth>
|
||||
<PageLength>66</PageLength>
|
||||
<TabStop>8</TabStop>
|
||||
<ListingPath>.\build\</ListingPath>
|
||||
</OPTLEX>
|
||||
<ListingPage>
|
||||
<CreateCListing>1</CreateCListing>
|
||||
<CreateAListing>1</CreateAListing>
|
||||
<CreateLListing>1</CreateLListing>
|
||||
<CreateIListing>0</CreateIListing>
|
||||
<AsmCond>1</AsmCond>
|
||||
<AsmSymb>1</AsmSymb>
|
||||
<AsmXref>0</AsmXref>
|
||||
<CCond>1</CCond>
|
||||
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|
||||
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|
||||
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|
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|
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|
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|
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|
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|
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|
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|
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|
||||
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|
||||
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|
||||
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|
||||
<CpuCode>0</CpuCode>
|
||||
<DllOpt>
|
||||
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
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|
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|
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
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|
||||
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|
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|
||||
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|
||||
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|
||||
<sDlgDll></sDlgDll>
|
||||
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|
||||
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|
||||
<tDll></tDll>
|
||||
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|
||||
<tDlgDll></tDlgDll>
|
||||
<tDlgPa></tDlgPa>
|
||||
<tIfile></tIfile>
|
||||
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|
||||
</DebugOpt>
|
||||
<TargetDriverDllRegistry>
|
||||
<SetRegEntry>
|
||||
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|
||||
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|
||||
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|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
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|
||||
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|
||||
<Name></Name>
|
||||
</SetRegEntry>
|
||||
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|
||||
<Number>0</Number>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<Key>ARMDBGFLAGS</Key>
|
||||
<Name></Name>
|
||||
</SetRegEntry>
|
||||
<SetRegEntry>
|
||||
<Number>0</Number>
|
||||
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|
||||
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|
||||
</SetRegEntry>
|
||||
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|
||||
<Breakpoint/>
|
||||
<DebugFlag>
|
||||
<trace>0</trace>
|
||||
<periodic>0</periodic>
|
||||
<aLwin>1</aLwin>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<aPa1>0</aPa1>
|
||||
<AscS4>0</AscS4>
|
||||
<aSer4>0</aSer4>
|
||||
<StkLoc>0</StkLoc>
|
||||
<TrcWin>0</TrcWin>
|
||||
<newCpu>0</newCpu>
|
||||
<uProt>0</uProt>
|
||||
</DebugFlag>
|
||||
<LintExecutable></LintExecutable>
|
||||
<LintConfigFile></LintConfigFile>
|
||||
</TargetOption>
|
||||
</Target>
|
||||
|
||||
<Group>
|
||||
<GroupName>src</GroupName>
|
||||
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|
||||
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||||
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||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
<TopLine>1</TopLine>
|
||||
<CurrentLine>7</CurrentLine>
|
||||
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|
||||
<PathWithFileName>main.cpp</PathWithFileName>
|
||||
<FilenameWithoutPath>main.cpp</FilenameWithoutPath>
|
||||
</File>
|
||||
</Group>
|
||||
|
||||
</ProjectOpt>
|
|
@ -0,0 +1,422 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
|
||||
|
||||
<SchemaVersion>1.1</SchemaVersion>
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||||
|
||||
<Header>###This file was automagically generated by mbed.org. For more information, see http://mbed.org/handbook/Exporting-To-Uvision </Header>
|
||||
|
||||
<Targets>
|
||||
<Target>
|
||||
<TargetName>mbed NXP LPC1768</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<TargetOption>
|
||||
<TargetCommonOption>
|
||||
<Device>LPC1768</Device>
|
||||
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|
||||
<Cpu>IRAM(0x10000000-0x10007FFF) IRAM2(0x2007C000-0x20083FFF) IROM(0-0x7FFFF) CLOCK(12000000) CPUTYPE("Cortex-M3")</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
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|
||||
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|
||||
<DeviceId>4868</DeviceId>
|
||||
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|
||||
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|
||||
<Cmp></Cmp>
|
||||
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|
||||
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|
||||
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|
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<InfinionOptionDll></InfinionOptionDll>
|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
<SimDlls>
|
||||
<CpuDll></CpuDll>
|
||||
<CpuDllArguments></CpuDllArguments>
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<Flash1>
|
||||
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|
||||
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|
||||
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||||
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||||
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|
||||
<DriverSelection>4105</DriverSelection>
|
||||
</Flash1>
|
||||
<Flash2>BIN\CMSIS_AGDI.dll</Flash2>
|
||||
<Flash3>"" ()</Flash3>
|
||||
<Flash4></Flash4>
|
||||
</Utilities>
|
||||
<TargetArmAds>
|
||||
<ArmAdsMisc>
|
||||
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|
||||
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||||
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|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
||||
<GenPPlst>0</GenPPlst>
|
||||
<AdsCpuType>"Cortex-M3"</AdsCpuType>
|
||||
<RvctDeviceName></RvctDeviceName>
|
||||
<mOS>0</mOS>
|
||||
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|
||||
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||||
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|
||||
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||||
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|
||||
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|
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||||
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||||
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|
||||
<Ir1Chk>1</Ir1Chk>
|
||||
<Ir2Chk>0</Ir2Chk>
|
||||
<Ra1Chk>0</Ra1Chk>
|
||||
<Ra2Chk>0</Ra2Chk>
|
||||
<Ra3Chk>0</Ra3Chk>
|
||||
<Im1Chk>1</Im1Chk>
|
||||
<Im2Chk>0</Im2Chk>
|
||||
<OnChipMemories>
|
||||
<Ocm1>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm1>
|
||||
<Ocm2>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm2>
|
||||
<Ocm3>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm3>
|
||||
<Ocm4>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm4>
|
||||
<Ocm5>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm5>
|
||||
<Ocm6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm6>
|
||||
<IRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x10000000</StartAddress>
|
||||
<Size>0x8000</Size>
|
||||
</IRAM>
|
||||
<IROM>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x80000</Size>
|
||||
</IROM>
|
||||
<XRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</XRAM>
|
||||
<OCR_RVCT1>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT1>
|
||||
<OCR_RVCT2>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT2>
|
||||
<OCR_RVCT3>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT3>
|
||||
<OCR_RVCT4>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x80000</Size>
|
||||
</OCR_RVCT4>
|
||||
<OCR_RVCT5>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT5>
|
||||
<OCR_RVCT6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT6>
|
||||
<OCR_RVCT7>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT7>
|
||||
<OCR_RVCT8>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT8>
|
||||
<OCR_RVCT9>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x10000000</StartAddress>
|
||||
<Size>0x8000</Size>
|
||||
</OCR_RVCT9>
|
||||
<OCR_RVCT10>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x2007c000</StartAddress>
|
||||
<Size>0x8000</Size>
|
||||
</OCR_RVCT10>
|
||||
</OnChipMemories>
|
||||
<RvctStartVector></RvctStartVector>
|
||||
</ArmAdsMisc>
|
||||
<Cads>
|
||||
<interw>1</interw>
|
||||
<Optim>1</Optim>
|
||||
<oTime>0</oTime>
|
||||
<SplitLS>0</SplitLS>
|
||||
<OneElfS>0</OneElfS>
|
||||
<Strict>0</Strict>
|
||||
<EnumInt>0</EnumInt>
|
||||
<PlainCh>0</PlainCh>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<wLevel>0</wLevel>
|
||||
<uThumb>0</uThumb>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<VariousControls>
|
||||
<MiscControls>--gnu</MiscControls>
|
||||
<Define>{% for s in symbols %} {{s}}, {% endfor %}</Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath> {% for path in include_paths %} {{path}}; {% endfor %} </IncludePath>
|
||||
</VariousControls>
|
||||
</Cads>
|
||||
<Aads>
|
||||
<interw>1</interw>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<thumb>0</thumb>
|
||||
<SplitLS>0</SplitLS>
|
||||
<SwStkChk>0</SwStkChk>
|
||||
<NoWarn>0</NoWarn>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Aads>
|
||||
<LDads>
|
||||
<umfTarg>0</umfTarg>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<noStLib>0</noStLib>
|
||||
<RepFail>1</RepFail>
|
||||
<useFile>0</useFile>
|
||||
<TextAddressRange>0x00000000</TextAddressRange>
|
||||
<DataAddressRange>0x10000000</DataAddressRange>
|
||||
<ScatterFile>{{scatter_file}}</ScatterFile>
|
||||
<IncludeLibs></IncludeLibs>
|
||||
<IncludeLibsPath></IncludeLibsPath>
|
||||
<Misc>
|
||||
{% for file in object_files %}
|
||||
{{file}}
|
||||
{% endfor %}
|
||||
</Misc>
|
||||
<LinkerInputFile></LinkerInputFile>
|
||||
<DisabledWarnings></DisabledWarnings>
|
||||
</LDads>
|
||||
</TargetArmAds>
|
||||
</TargetOption>
|
||||
<Groups>
|
||||
{% for group,files in source_files %}
|
||||
<Group>
|
||||
<GroupName>{{group}}</GroupName>
|
||||
<Files>
|
||||
{% for file in files %}
|
||||
<File>
|
||||
<FileName>{{file.name}}</FileName>
|
||||
<FileType>{{file.type}}</FileType>
|
||||
<FilePath>{{file.path}}</FilePath>
|
||||
{%if file.type == "1" %}
|
||||
<FileOption>
|
||||
<FileArmAds>
|
||||
<Cads>
|
||||
<VariousControls>
|
||||
<MiscControls>--c99</MiscControls>
|
||||
</VariousControls>
|
||||
</Cads>
|
||||
</FileArmAds>
|
||||
</FileOption>
|
||||
{% endif %}
|
||||
</File>
|
||||
{% endfor %}
|
||||
</Files>
|
||||
</Group>
|
||||
{% endfor %}
|
||||
</Groups>
|
||||
</Target>
|
||||
</Targets>
|
||||
|
||||
</Project>
|
|
@ -71,7 +71,7 @@ class LPC1768(Target):
|
|||
|
||||
self.core = "Cortex-M3"
|
||||
|
||||
self.extra_labels = ['NXP', 'LPC176X']
|
||||
self.extra_labels = ['NXP', 'LPC176X', 'MBED_LPC1768']
|
||||
|
||||
self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CS", "GCC_CR", "IAR"]
|
||||
|
||||
|
@ -369,6 +369,17 @@ class nRF51822(Target):
|
|||
self.extra_labels = ["NORDIC"]
|
||||
|
||||
self.supported_toolchains = ["ARM"]
|
||||
|
||||
|
||||
class C027(Target):
|
||||
def __init__(self):
|
||||
Target.__init__(self)
|
||||
|
||||
self.core = "Cortex-M3"
|
||||
|
||||
self.extra_labels = ['NXP', 'LPC176X', 'UBLOX_C027']
|
||||
|
||||
self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "GCC_CS", "GCC_CR", "IAR"]
|
||||
|
||||
|
||||
# Get a single instance for each target
|
||||
|
@ -395,7 +406,8 @@ TARGETS = [
|
|||
LPC1114(),
|
||||
LPC11C24(),
|
||||
LPC11U35_401(),
|
||||
nRF51822()
|
||||
nRF51822(),
|
||||
C027()
|
||||
]
|
||||
|
||||
# Map each target name to its unique instance
|
||||
|
|
Loading…
Reference in New Issue