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@ -14,7 +14,7 @@
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* limitations under the License.
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* limitations under the License.
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*/
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*/
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#include <string.h>
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#include <string.h>
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#if defined(MBED_CONF_NANOSTACK_CONFIGURATION) && DEVICE_SPI && defined(MBED_CONF_RTOS_PRESENT)
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#if defined(MBED_CONF_NANOSTACK_CONFIGURATION) && DEVICE_SPI && DEVICE_INTERRUPTIN && defined(MBED_CONF_RTOS_PRESENT)
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#include "platform/arm_hal_interrupt.h"
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#include "platform/arm_hal_interrupt.h"
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#include "nanostack/platform/arm_hal_phy.h"
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#include "nanostack/platform/arm_hal_phy.h"
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#include "ns_types.h"
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#include "ns_types.h"
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@ -140,11 +140,9 @@ public:
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Timeout cca_timer;
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Timeout cca_timer;
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Timeout backup_timer;
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Timeout backup_timer;
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Timer tx_timer;
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Timer tx_timer;
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#ifdef MBED_CONF_RTOS_PRESENT
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Thread irq_thread;
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Thread irq_thread;
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Mutex mutex;
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Mutex mutex;
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void rf_irq_task();
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void rf_irq_task();
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#endif //MBED_CONF_RTOS_PRESENT
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};
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};
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RFPins::RFPins(PinName spi_sdi, PinName spi_sdo,
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RFPins::RFPins(PinName spi_sdi, PinName spi_sdo,
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@ -167,14 +165,10 @@ RFPins::RFPins(PinName spi_sdi, PinName spi_sdo,
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RF_S2LP_GPIO0(spi_gpio0),
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RF_S2LP_GPIO0(spi_gpio0),
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RF_S2LP_GPIO1(spi_gpio1),
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RF_S2LP_GPIO1(spi_gpio1),
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RF_S2LP_GPIO2(spi_gpio2),
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RF_S2LP_GPIO2(spi_gpio2),
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RF_S2LP_GPIO3(spi_gpio3)
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RF_S2LP_GPIO3(spi_gpio3),
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#ifdef MBED_CONF_RTOS_PRESENT
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irq_thread(osPriorityRealtime, 1024)
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, irq_thread(osPriorityRealtime, 1024)
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#endif //MBED_CONF_RTOS_PRESENT
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{
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{
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#ifdef MBED_CONF_RTOS_PRESENT
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irq_thread.start(mbed::callback(this, &RFPins::rf_irq_task));
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irq_thread.start(mbed::callback(this, &RFPins::rf_irq_task));
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#endif //MBED_CONF_RTOS_PRESENT
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}
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}
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static uint8_t rf_read_register(uint8_t addr);
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static uint8_t rf_read_register(uint8_t addr);
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@ -215,6 +209,7 @@ static uint8_t s2lp_short_address[2];
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static uint8_t s2lp_MAC[8];
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static uint8_t s2lp_MAC[8];
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static rf_mode_e rf_mode = RF_MODE_NORMAL;
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static rf_mode_e rf_mode = RF_MODE_NORMAL;
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static bool rf_update_config = false;
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static bool rf_update_config = false;
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static uint16_t cur_packet_len = 0xffff;
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/* Channel configurations for sub-GHz */
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/* Channel configurations for sub-GHz */
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static phy_rf_channel_configuration_s phy_subghz = {
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static phy_rf_channel_configuration_s phy_subghz = {
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@ -232,7 +227,6 @@ static const phy_device_channel_page_s phy_channel_pages[] = {
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{ CHANNEL_PAGE_0, NULL}
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{ CHANNEL_PAGE_0, NULL}
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};
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};
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#ifdef MBED_CONF_RTOS_PRESENT
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#include "rtos.h"
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#include "rtos.h"
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@ -243,7 +237,6 @@ static void rf_irq_task_process_irq();
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#define SIG_TIMER_CCA 2
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#define SIG_TIMER_CCA 2
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#define SIG_TIMER_BACKUP 4
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#define SIG_TIMER_BACKUP 4
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#endif //MBED_CONF_RTOS_PRESENT
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#define ACK_FRAME_LENGTH 3
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#define ACK_FRAME_LENGTH 3
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// Give some additional time for processing, PHY headers, CRC etc.
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// Give some additional time for processing, PHY headers, CRC etc.
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@ -292,7 +285,6 @@ static void rf_unlock(void)
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platform_exit_critical();
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platform_exit_critical();
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}
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}
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#ifdef MBED_CONF_RTOS_PRESENT
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static void rf_cca_timer_signal(void)
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static void rf_cca_timer_signal(void)
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{
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{
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rf->irq_thread.flags_set(SIG_TIMER_CCA);
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rf->irq_thread.flags_set(SIG_TIMER_CCA);
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@ -302,7 +294,6 @@ static void rf_backup_timer_signal(void)
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{
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{
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rf->irq_thread.flags_set(SIG_TIMER_BACKUP);
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rf->irq_thread.flags_set(SIG_TIMER_BACKUP);
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}
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}
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#endif //MBED_CONF_RTOS_PRESENT
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/*
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/*
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* \brief Function writes/read data in SPI interface
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* \brief Function writes/read data in SPI interface
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@ -365,22 +356,36 @@ static void rf_enable_gpio_signal(uint8_t gpio_pin, uint8_t interrupt_signal, ui
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static void rf_enable_interrupt(uint8_t event)
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static void rf_enable_interrupt(uint8_t event)
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{
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{
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if (enabled_interrupts & (1 << event)) {
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return;
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}
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rf_write_register_field(IRQ_MASK0 - (event / 8), 1 << (event % 8), 1 << (event % 8));
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rf_write_register_field(IRQ_MASK0 - (event / 8), 1 << (event % 8), 1 << (event % 8));
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enabled_interrupts |= (1 << event);
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enabled_interrupts |= (1 << event);
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}
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}
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static void rf_disable_interrupt(uint8_t event)
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static void rf_disable_interrupt(uint8_t event)
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{
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{
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if (!(enabled_interrupts & (1 << event))) {
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return;
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}
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rf_write_register_field(IRQ_MASK0 - (event / 8), 1 << (event % 8), 0 << (event % 8));
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rf_write_register_field(IRQ_MASK0 - (event / 8), 1 << (event % 8), 0 << (event % 8));
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enabled_interrupts &= ~(1 << event);
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enabled_interrupts &= ~(1 << event);
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}
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}
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static void rf_disable_all_interrupts(void)
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static void rf_disable_all_interrupts(void)
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{
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{
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if ((uint8_t)enabled_interrupts & 0xff) {
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rf_write_register(IRQ_MASK0, 0);
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rf_write_register(IRQ_MASK0, 0);
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}
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if ((uint8_t)(enabled_interrupts >> 8) & 0xff) {
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rf_write_register(IRQ_MASK1, 0);
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rf_write_register(IRQ_MASK1, 0);
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}
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if ((uint8_t)(enabled_interrupts >> 16) & 0xff) {
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rf_write_register(IRQ_MASK2, 0);
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rf_write_register(IRQ_MASK2, 0);
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}
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if ((uint8_t)(enabled_interrupts >> 24) & 0xff) {
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rf_write_register(IRQ_MASK3, 0);
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rf_write_register(IRQ_MASK3, 0);
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}
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enabled_interrupts = 0;
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enabled_interrupts = 0;
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read_irq_status();
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read_irq_status();
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}
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}
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@ -459,10 +464,29 @@ static int rf_read_rx_fifo(uint16_t rx_index, uint16_t length)
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return length;
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return length;
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}
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}
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static void rf_flush_tx_fifo(void)
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{
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if (rf_read_register(TX_FIFO_STATUS)) {
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rf_send_command(S2LP_CMD_FLUSHTXFIFO);
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}
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}
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static void rf_flush_rx_fifo(void)
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{
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if (rf_read_register(RX_FIFO_STATUS)) {
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rf_send_command(S2LP_CMD_FLUSHRXFIFO);
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}
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}
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static void rf_write_packet_length(uint16_t packet_length)
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static void rf_write_packet_length(uint16_t packet_length)
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{
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{
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if ((uint8_t)(cur_packet_len >> 8) != (packet_length / 256)) {
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rf_write_register(PCKTLEN1, packet_length / 256);
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rf_write_register(PCKTLEN1, packet_length / 256);
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}
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if ((uint8_t)cur_packet_len != (packet_length % 256)) {
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rf_write_register(PCKTLEN0, packet_length % 256);
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rf_write_register(PCKTLEN0, packet_length % 256);
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}
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cur_packet_len = packet_length;
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}
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}
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static uint32_t read_irq_status(void)
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static uint32_t read_irq_status(void)
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@ -514,12 +538,6 @@ static void rf_set_channel_configuration_registers(void)
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rf_channel_multiplier++;
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rf_channel_multiplier++;
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}
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}
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rf_write_register(CHSPACE, ch_space);
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rf_write_register(CHSPACE, ch_space);
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tr_info("RF config update:");
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tr_info("Frequency(ch0): %luHz", phy_subghz.channel_0_center_frequency);
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tr_info("Channel spacing: %luHz", phy_subghz.channel_spacing);
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tr_info("Datarate: %lubps", phy_subghz.datarate);
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tr_info("Deviation: %luHz", deviation);
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tr_info("RX BW M: %u, E: %u", chflt_m, chflt_e);
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}
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}
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static void rf_init_registers(void)
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static void rf_init_registers(void)
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@ -733,19 +751,17 @@ static void rf_start_tx(void)
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static void rf_cca_timer_interrupt(void)
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static void rf_cca_timer_interrupt(void)
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{
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{
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if (device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_CCA_PREPARE, 0, 0) != 0) {
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if (device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_CCA_PREPARE, 0, 0) != 0) {
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if (rf_read_register(TX_FIFO_STATUS)) {
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rf_flush_tx_fifo();
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rf_send_command(S2LP_CMD_FLUSHTXFIFO);
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if (rf_state == RF_CSMA_STARTED) {
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}
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rf_state = RF_IDLE;
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rf_state = RF_IDLE;
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}
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return;
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return;
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}
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}
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if ((cca_enabled == true) && ((rf_state != RF_CSMA_STARTED && rf_state != RF_IDLE) || (read_irq_status() & (1 << SYNC_WORD)) || (rf_read_register(LINK_QUALIF1) & CARRIER_SENSE))) {
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if ((cca_enabled == true) && ((rf_state != RF_CSMA_STARTED && rf_state != RF_IDLE) || (read_irq_status() & (1 << SYNC_WORD)) || (rf_read_register(LINK_QUALIF1) & CARRIER_SENSE))) {
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if (rf_state == RF_CSMA_STARTED) {
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if (rf_state == RF_CSMA_STARTED) {
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rf_state = RF_IDLE;
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rf_state = RF_IDLE;
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}
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}
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if (rf_read_register(TX_FIFO_STATUS)) {
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rf_flush_tx_fifo();
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rf_send_command(S2LP_CMD_FLUSHTXFIFO);
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}
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tx_finnish_time = rf_get_timestamp();
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tx_finnish_time = rf_get_timestamp();
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if (device_driver.phy_tx_done_cb) {
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if (device_driver.phy_tx_done_cb) {
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device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_CCA_FAIL, 0, 0);
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device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_CCA_FAIL, 0, 0);
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@ -764,11 +780,7 @@ static void rf_cca_timer_stop(void)
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static void rf_cca_timer_start(uint32_t slots)
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static void rf_cca_timer_start(uint32_t slots)
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{
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{
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#ifdef MBED_CONF_RTOS_PRESENT
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rf->cca_timer.attach_us(rf_cca_timer_signal, slots);
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rf->cca_timer.attach_us(rf_cca_timer_signal, slots);
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#else //MBED_CONF_RTOS_PRESENT
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rf->cca_timer.attach_us(rf_cca_timer_interrupt, slots);
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#endif //MBED_CONF_RTOS_PRESENT
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}
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}
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static void rf_backup_timer_interrupt(void)
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static void rf_backup_timer_interrupt(void)
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@ -779,9 +791,7 @@ static void rf_backup_timer_interrupt(void)
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device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_TX_SUCCESS, 0, 0);
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device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_TX_SUCCESS, 0, 0);
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}
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}
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}
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}
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if (rf_read_register(TX_FIFO_STATUS)) {
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rf_flush_tx_fifo();
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rf_send_command(S2LP_CMD_FLUSHTXFIFO);
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}
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TEST_TX_DONE
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TEST_TX_DONE
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TEST_RX_DONE
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TEST_RX_DONE
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rf_state = RF_IDLE;
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rf_state = RF_IDLE;
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@ -795,11 +805,7 @@ static void rf_backup_timer_stop(void)
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static void rf_backup_timer_start(uint32_t slots)
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static void rf_backup_timer_start(uint32_t slots)
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{
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{
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#ifdef MBED_CONF_RTOS_PRESENT
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rf->backup_timer.attach_us(rf_backup_timer_signal, slots);
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rf->backup_timer.attach_us(rf_backup_timer_signal, slots);
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#else //MBED_CONF_RTOS_PRESENT
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rf->backup_timer.attach_us(rf_backup_timer_interrupt, slots);
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#endif //MBED_CONF_RTOS_PRESENT
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}
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}
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static int8_t rf_start_cca(uint8_t *data_ptr, uint16_t data_length, uint8_t tx_handle, data_protocol_e data_protocol)
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static int8_t rf_start_cca(uint8_t *data_ptr, uint16_t data_length, uint8_t tx_handle, data_protocol_e data_protocol)
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@ -842,13 +848,6 @@ static int8_t rf_start_cca(uint8_t *data_ptr, uint16_t data_length, uint8_t tx_h
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static void rf_send_ack(uint8_t seq)
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static void rf_send_ack(uint8_t seq)
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{
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{
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|
// If the reception started during CCA process, the TX FIFO may already contain a data packet
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if (rf_read_register(TX_FIFO_STATUS)) {
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rf_send_command(S2LP_CMD_SABORT);
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rf_poll_state_change(S2LP_STATE_READY);
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rf_send_command(S2LP_CMD_FLUSHTXFIFO);
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rf_poll_state_change(S2LP_STATE_READY);
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}
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rf_state = RF_TX_ACK;
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|
rf_state = RF_TX_ACK;
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|
uint8_t ack_frame[3] = {MAC_TYPE_ACK, 0, seq};
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|
uint8_t ack_frame[3] = {MAC_TYPE_ACK, 0, seq};
|
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|
|
rf_write_tx_fifo(ack_frame, sizeof(ack_frame));
|
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|
rf_write_tx_fifo(ack_frame, sizeof(ack_frame));
|
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|
@ -880,6 +879,7 @@ static void rf_rx_ready_handler(void)
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|
{
|
|
|
|
{
|
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|
|
rf_backup_timer_stop();
|
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|
|
rf_backup_timer_stop();
|
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|
|
TEST_RX_DONE
|
|
|
|
TEST_RX_DONE
|
|
|
|
|
|
|
|
rf_flush_tx_fifo();
|
|
|
|
int rx_read_length = rf_read_rx_fifo(rx_data_length, rf_read_register(RX_FIFO_STATUS));
|
|
|
|
int rx_read_length = rf_read_rx_fifo(rx_data_length, rf_read_register(RX_FIFO_STATUS));
|
|
|
|
if (rx_read_length < 0) {
|
|
|
|
if (rx_read_length < 0) {
|
|
|
|
rf_receive(rf_rx_channel);
|
|
|
|
rf_receive(rf_rx_channel);
|
|
|
|
@ -931,6 +931,8 @@ static void rf_sync_detected_handler(void)
|
|
|
|
rf_state = RF_RX_STARTED;
|
|
|
|
rf_state = RF_RX_STARTED;
|
|
|
|
TEST_RX_STARTED
|
|
|
|
TEST_RX_STARTED
|
|
|
|
rf_disable_interrupt(SYNC_WORD);
|
|
|
|
rf_disable_interrupt(SYNC_WORD);
|
|
|
|
|
|
|
|
rf_enable_interrupt(RX_FIFO_ALMOST_FULL);
|
|
|
|
|
|
|
|
rf_enable_interrupt(RX_DATA_READY);
|
|
|
|
rf_backup_timer_start(MAX_PACKET_SENDING_TIME);
|
|
|
|
rf_backup_timer_start(MAX_PACKET_SENDING_TIME);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
@ -940,10 +942,10 @@ static void rf_receive(uint8_t rx_channel)
|
|
|
|
return;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
rf_lock();
|
|
|
|
rf_lock();
|
|
|
|
|
|
|
|
rf_send_command(S2LP_CMD_SABORT);
|
|
|
|
rf_disable_all_interrupts();
|
|
|
|
rf_disable_all_interrupts();
|
|
|
|
rf_state_change(S2LP_STATE_READY, false);
|
|
|
|
|
|
|
|
rf_send_command(S2LP_CMD_FLUSHRXFIFO);
|
|
|
|
|
|
|
|
rf_poll_state_change(S2LP_STATE_READY);
|
|
|
|
rf_poll_state_change(S2LP_STATE_READY);
|
|
|
|
|
|
|
|
rf_flush_rx_fifo();
|
|
|
|
if (rf_update_config == true) {
|
|
|
|
if (rf_update_config == true) {
|
|
|
|
rf_update_config = false;
|
|
|
|
rf_update_config = false;
|
|
|
|
rf_set_channel_configuration_registers();
|
|
|
|
rf_set_channel_configuration_registers();
|
|
|
|
@ -952,18 +954,17 @@ static void rf_receive(uint8_t rx_channel)
|
|
|
|
rf_write_register(CHNUM, rx_channel * rf_channel_multiplier);
|
|
|
|
rf_write_register(CHNUM, rx_channel * rf_channel_multiplier);
|
|
|
|
rf_rx_channel = rf_new_channel = rx_channel;
|
|
|
|
rf_rx_channel = rf_new_channel = rx_channel;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
rf_state_change(S2LP_STATE_LOCK, false);
|
|
|
|
rf_send_command(S2LP_CMD_RX);
|
|
|
|
rf_state_change(S2LP_STATE_RX, false);
|
|
|
|
|
|
|
|
rf_enable_interrupt(SYNC_WORD);
|
|
|
|
rf_enable_interrupt(SYNC_WORD);
|
|
|
|
rf_enable_interrupt(RX_FIFO_ALMOST_FULL);
|
|
|
|
|
|
|
|
rf_enable_interrupt(RX_DATA_READY);
|
|
|
|
|
|
|
|
rf_enable_interrupt(RX_FIFO_UNF_OVF);
|
|
|
|
rf_enable_interrupt(RX_FIFO_UNF_OVF);
|
|
|
|
rx_data_length = 0;
|
|
|
|
rx_data_length = 0;
|
|
|
|
|
|
|
|
if (rf_state != RF_CSMA_STARTED) {
|
|
|
|
rf_state = RF_IDLE;
|
|
|
|
rf_state = RF_IDLE;
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
rf_poll_state_change(S2LP_STATE_RX);
|
|
|
|
rf_unlock();
|
|
|
|
rf_unlock();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
#ifdef MBED_CONF_RTOS_PRESENT
|
|
|
|
|
|
|
|
static void rf_interrupt_handler(void)
|
|
|
|
static void rf_interrupt_handler(void)
|
|
|
|
{
|
|
|
|
{
|
|
|
|
rf->irq_thread.flags_set(SIG_RADIO);
|
|
|
|
rf->irq_thread.flags_set(SIG_RADIO);
|
|
|
|
@ -988,9 +989,6 @@ void RFPins::rf_irq_task(void)
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static void rf_irq_task_process_irq(void)
|
|
|
|
static void rf_irq_task_process_irq(void)
|
|
|
|
#else //MBED_CONF_RTOS_PRESENT
|
|
|
|
|
|
|
|
static void rf_interrupt_handler(void)
|
|
|
|
|
|
|
|
#endif //MBED_CONF_RTOS_PRESENT
|
|
|
|
|
|
|
|
{
|
|
|
|
{
|
|
|
|
rf_lock();
|
|
|
|
rf_lock();
|
|
|
|
uint32_t irq_status = read_irq_status();
|
|
|
|
uint32_t irq_status = read_irq_status();
|
|
|
|
@ -1027,6 +1025,7 @@ static void rf_interrupt_handler(void)
|
|
|
|
} else {
|
|
|
|
} else {
|
|
|
|
TEST_RX_DONE
|
|
|
|
TEST_RX_DONE
|
|
|
|
rf_backup_timer_stop();
|
|
|
|
rf_backup_timer_stop();
|
|
|
|
|
|
|
|
rf_flush_tx_fifo();
|
|
|
|
rf_state = RF_IDLE;
|
|
|
|
rf_state = RF_IDLE;
|
|
|
|
// In case the channel change was called during reception, driver is responsible to change the channel if CRC failed.
|
|
|
|
// In case the channel change was called during reception, driver is responsible to change the channel if CRC failed.
|
|
|
|
rf_receive(rf_new_channel);
|
|
|
|
rf_receive(rf_new_channel);
|
|
|
|
@ -1044,10 +1043,12 @@ static void rf_interrupt_handler(void)
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if ((irq_status & (1 << RX_FIFO_UNF_OVF)) && (enabled_interrupts & (1 << RX_FIFO_UNF_OVF))) {
|
|
|
|
if ((irq_status & (1 << RX_FIFO_UNF_OVF)) && (enabled_interrupts & (1 << RX_FIFO_UNF_OVF))) {
|
|
|
|
TEST_RX_DONE
|
|
|
|
TEST_RX_DONE
|
|
|
|
|
|
|
|
rf_backup_timer_stop();
|
|
|
|
rf_send_command(S2LP_CMD_SABORT);
|
|
|
|
rf_send_command(S2LP_CMD_SABORT);
|
|
|
|
rf_poll_state_change(S2LP_STATE_READY);
|
|
|
|
rf_poll_state_change(S2LP_STATE_READY);
|
|
|
|
rf_send_command(S2LP_CMD_FLUSHRXFIFO);
|
|
|
|
rf_send_command(S2LP_CMD_FLUSHRXFIFO);
|
|
|
|
rf_poll_state_change(S2LP_STATE_READY);
|
|
|
|
rf_poll_state_change(S2LP_STATE_READY);
|
|
|
|
|
|
|
|
rf_flush_tx_fifo();
|
|
|
|
rf_state = RF_IDLE;
|
|
|
|
rf_state = RF_IDLE;
|
|
|
|
rf_receive(rf_rx_channel);
|
|
|
|
rf_receive(rf_rx_channel);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
@ -1126,7 +1127,7 @@ void NanostackRfPhys2lp::get_mac_address(uint8_t *mac)
|
|
|
|
rf_unlock();
|
|
|
|
rf_unlock();
|
|
|
|
return;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
memcpy((void*)mac, (void*)_mac_addr, sizeof(_mac_addr));
|
|
|
|
memcpy((void *)mac, (void *)_mac_addr, sizeof(_mac_addr));
|
|
|
|
|
|
|
|
|
|
|
|
rf_unlock();
|
|
|
|
rf_unlock();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
@ -1140,7 +1141,7 @@ void NanostackRfPhys2lp::set_mac_address(uint8_t *mac)
|
|
|
|
rf_unlock();
|
|
|
|
rf_unlock();
|
|
|
|
return;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
memcpy((void*)_mac_addr, (void*)mac, sizeof(_mac_addr));
|
|
|
|
memcpy((void *)_mac_addr, (void *)mac, sizeof(_mac_addr));
|
|
|
|
_mac_set = true;
|
|
|
|
_mac_set = true;
|
|
|
|
|
|
|
|
|
|
|
|
rf_unlock();
|
|
|
|
rf_unlock();
|
|
|
|
@ -1162,7 +1163,7 @@ int8_t NanostackRfPhys2lp::rf_register()
|
|
|
|
randLIB_get_n_bytes_random(s2lp_MAC, 8);
|
|
|
|
randLIB_get_n_bytes_random(s2lp_MAC, 8);
|
|
|
|
s2lp_MAC[0] |= 2; //Set Local Bit
|
|
|
|
s2lp_MAC[0] |= 2; //Set Local Bit
|
|
|
|
s2lp_MAC[0] &= ~1; //Clear multicast bit
|
|
|
|
s2lp_MAC[0] &= ~1; //Clear multicast bit
|
|
|
|
tr_info("Generated random MAC %s", trace_array(s2lp_MAC,8));
|
|
|
|
tr_info("Generated random MAC %s", trace_array(s2lp_MAC, 8));
|
|
|
|
set_mac_address(s2lp_MAC);
|
|
|
|
set_mac_address(s2lp_MAC);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
rf = _rf;
|
|
|
|
rf = _rf;
|
|
|
|
|