From 6b525950d18ad7901c90ff28692fd33e9d9c59e5 Mon Sep 17 00:00:00 2001
From: Martin Kojtal <0xc0170@gmail.com>
Date: Wed, 8 Nov 2017 13:58:57 +0000
Subject: [PATCH] QSPI: improve mode documentation

SPI mode means Clock polarity and phase mode (0 - 3)
---
 hal/qspi_api.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/hal/qspi_api.h b/hal/qspi_api.h
index 0348c15d17..c6475196e7 100644
--- a/hal/qspi_api.h
+++ b/hal/qspi_api.h
@@ -101,7 +101,7 @@ typedef enum qspi_status {
 
 /** Initialize QSPI peripheral. 
  *
- * It should initialize QSPI pins (io0-io3, sclk and ssel), set frequency and SPI mode. The clock for the peripheral should be enabled
+ * It should initialize QSPI pins (io0-io3, sclk and ssel), set frequency, clock polarity and phase mode. The clock for the peripheral should be enabled
  * 
  * @param obj QSPI object
  * @param io0 Data pin 0
@@ -111,7 +111,7 @@ typedef enum qspi_status {
  * @param sclk The clock pin
  * @param ssel The chip select pin
  * @param hz The bus frequency
- * @param mode SPI mode
+ * @param mode Clock polarity and phase mode (0 - 3)
  * @return QSPI_STATUS_OK if initialisation successfully executed
            QSPI_STATUS_INVALID_PARAMETER if invalid parameter found
            QSPI_STATUS_ERROR otherwise