Extend SPI capabilities

Add setting if block transfer allows different sizes of rx/tx buffers.
pull/12153/head
Przemyslaw Stekiel 2019-12-20 11:43:34 +01:00
parent f77f4ea911
commit 689e0be00c
2 changed files with 5 additions and 3 deletions

View File

@ -55,6 +55,7 @@ MBED_WEAK void spi_get_capabilities(PinName ssel, bool slave, spi_capabilities_t
cap->hw_cs_handle = false; // irrelevant in slave mode
cap->slave_delay_between_symbols_ns = 2500; // 2.5 us
cap->clk_modes = 0x0f; // all clock modes
cap->tx_rx_buffers_equal_length = true; // rx buffer size must be equal tx buffer size
#if DEVICE_SPI_ASYNCH
cap->async_mode = true;
#else
@ -68,6 +69,7 @@ MBED_WEAK void spi_get_capabilities(PinName ssel, bool slave, spi_capabilities_t
cap->hw_cs_handle = false; // to be determined later based on ssel
cap->slave_delay_between_symbols_ns = 0; // irrelevant in master mode
cap->clk_modes = 0x0f; // all clock modes
cap->tx_rx_buffers_equal_length = true; // rx buffer size must be equal tx buffer size
#if DEVICE_SPI_ASYNCH
cap->async_mode = true;
#else

View File

@ -84,7 +84,7 @@ typedef struct {
bool support_slave_mode; /**< If true, the device can handle SPI slave mode using hardware management on the specified ssel pin. */
bool hw_cs_handle; /**< If true, in SPI master mode Chip Select can be handled by hardware. */
bool async_mode; /**< If true, in async mode is supported. */
bool tx_rx_buffers_equal_length; /**< If true, rx and tx buffers must have the same length. */
} spi_capabilities_t;
#ifdef __cplusplus
@ -96,11 +96,11 @@ extern "C" {
*
* # Defined behavior
* * ::spi_init initializes the spi_t control structure
* * ::spi_init configures the pins used by SPI
* * ::spi_init configures the pins used by SPI - Verified by ::fpga_spi_test_init_free, ::fpga_spi_test_common_no_ss and ::fpga_spi_test_common
* * ::spi_get_capabilities() fills the given `spi_capabilities_t` instance
* * ::spi_get_capabilities() should consider the `ssel` pin when evaluation the `support_slave_mode` and `hw_cs_handle` capability
* * ::spi_get_capabilities(): if the given `ssel` pin cannot be managed by hardware, `support_slave_mode` and `hw_cs_handle` should be false
* * At least a symbol width of 8bit must be supported
* * At least a symbol width of 8bit must be supported - Verified by ::fpga_spi_test_common_no_ss and ::fpga_spi_test_common
* * The supported frequency range must include the range [0.2..2] MHz
* * ::spi_free returns the pins owned by the SPI object to their reset state
* * ::spi_format sets the number of bits per frame