From 67b677d28538f6cc75567655767ca5e753a41221 Mon Sep 17 00:00:00 2001
From: deepikabhavnani <deepika.bhavnani@arm.com>
Date: Tue, 6 Feb 2018 21:52:19 -0600
Subject: [PATCH] CMSIS/RTX: Pre-processor defines used for assembly

CMSIS repo does not support pre-processor defines, hence multiple assembly
files are added for secure/non-secure and floating point tools.

Mbed OS tools support assembly file pre-processing, but the build system
does not support multiple assembly files for each target, hence updating
the assembly files.

(cherry picked from commit 287121ffdc4c9c19f9ce8872e4edd941862daca1)
---
 .../Source/TOOLCHAIN_ARM/TARGET_M23/irq_armv8mbl.S   |  6 +++---
 .../Source/TOOLCHAIN_ARM/TARGET_M33/irq_armv8mml.S   | 12 +++++-------
 .../Source/TOOLCHAIN_GCC/TARGET_M23/irq_armv8mbl.S   |  4 ++--
 .../Source/TOOLCHAIN_GCC/TARGET_M33/irq_armv8mml.S   |  8 ++++----
 4 files changed, 14 insertions(+), 16 deletions(-)

diff --git a/rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_ARM/TARGET_M23/irq_armv8mbl.S b/rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_ARM/TARGET_M23/irq_armv8mbl.S
index 5a0d1f081b..4caf963634 100644
--- a/rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_ARM/TARGET_M23/irq_armv8mbl.S
+++ b/rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_ARM/TARGET_M23/irq_armv8mbl.S
@@ -24,9 +24,9 @@
 ; */
 
 
-                IF       :LNOT::DEF:DOMAIN_NS
-DOMAIN_NS       EQU      0
-                ENDIF
+#ifndef DOMAIN_NS
+DOMAIN_NS     EQU      0
+#endif
 
 I_T_RUN_OFS     EQU      20                     ; osRtxInfo.thread.run offset
 TCB_SM_OFS      EQU      48                     ; TCB.stack_mem offset
diff --git a/rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_ARM/TARGET_M33/irq_armv8mml.S b/rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_ARM/TARGET_M33/irq_armv8mml.S
index b0c88f956c..75a068349c 100644
--- a/rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_ARM/TARGET_M33/irq_armv8mml.S
+++ b/rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_ARM/TARGET_M33/irq_armv8mml.S
@@ -24,15 +24,13 @@
 ; */
 
 
-                IF       :LNOT::DEF:DOMAIN_NS
-DOMAIN_NS       EQU      0
-                ENDIF
+#ifndef DOMAIN_NS
+DOMAIN_NS     EQU      0
+#endif
 
-                IF       ({FPU}="FPv5-SP") || ({FPU}="FPv5_D16")
-__FPU_USED      EQU      1
-                ELSE
+#ifndef __FPU_USED
 __FPU_USED      EQU      0
-                ENDIF
+#endif
 
 I_T_RUN_OFS     EQU      20                     ; osRtxInfo.thread.run offset
 TCB_SM_OFS      EQU      48                     ; TCB.stack_mem offset
diff --git a/rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_GCC/TARGET_M23/irq_armv8mbl.S b/rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_GCC/TARGET_M23/irq_armv8mbl.S
index 56b486d5ce..bbd071f51a 100644
--- a/rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_GCC/TARGET_M23/irq_armv8mbl.S
+++ b/rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_GCC/TARGET_M23/irq_armv8mbl.S
@@ -27,9 +27,9 @@
         .file    "irq_armv8mbl.S"
         .syntax  unified
 
-        .ifndef  DOMAIN_NS
+#ifndef  DOMAIN_NS
         .equ     DOMAIN_NS, 0
-        .endif
+#endif
 
         .equ     I_T_RUN_OFS, 20        // osRtxInfo.thread.run offset
         .equ     TCB_SM_OFS,  48        // TCB.stack_mem offset
diff --git a/rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_GCC/TARGET_M33/irq_armv8mml.S b/rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_GCC/TARGET_M33/irq_armv8mml.S
index c9c497c02c..a727728202 100644
--- a/rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_GCC/TARGET_M33/irq_armv8mml.S
+++ b/rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_GCC/TARGET_M33/irq_armv8mml.S
@@ -27,13 +27,13 @@
         .file    "irq_armv8mml.S"
         .syntax  unified
 
-        .ifndef  DOMAIN_NS
+#ifndef DOMAIN_NS
         .equ     DOMAIN_NS, 0
-        .endif
+#endif
 
-        .ifndef  __FPU_USED
+#ifndef  __FPU_USED
         .equ     __FPU_USED,  0
-        .endif
+#endif
 
         .equ     I_T_RUN_OFS, 20        // osRtxInfo.thread.run offset
         .equ     TCB_SM_OFS,  48        // TCB.stack_mem offset