mirror of https://github.com/ARMmbed/mbed-os.git
Merge branch 'nrf51822-gcc-arm-export' of git://github.com/juancferrer/mbed into juancferrer-nrf51822-gcc-arm-export
Conflicts: workspace_tools/export/gccarm.py workspace_tools/export_test.py workspace_tools/targets.pypull/357/head
Bogdan Marinescu
commit
66d25186cd
|
|
@ -0,0 +1,152 @@
|
|||
/* Linker script to configure memory regions. */
|
||||
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x00014000, LENGTH = 0x2C000
|
||||
RAM (rwx) : ORIGIN = 0x20002000, LENGTH = 0x2000
|
||||
}
|
||||
|
||||
OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
|
||||
|
||||
/* Linker script to place sections and symbol values. Should be used together
|
||||
* with other linker script that defines memory regions FLASH and RAM.
|
||||
* It references following symbols, which must be defined in code:
|
||||
* Reset_Handler : Entry of reset handler
|
||||
*
|
||||
* It defines following symbols, which code can use without definition:
|
||||
* __exidx_start
|
||||
* __exidx_end
|
||||
* __etext
|
||||
* __data_start__
|
||||
* __preinit_array_start
|
||||
* __preinit_array_end
|
||||
* __init_array_start
|
||||
* __init_array_end
|
||||
* __fini_array_start
|
||||
* __fini_array_end
|
||||
* __data_end__
|
||||
* __bss_start__
|
||||
* __bss_end__
|
||||
* __end__
|
||||
* end
|
||||
* __HeapLimit
|
||||
* __StackLimit
|
||||
* __StackTop
|
||||
* __stack
|
||||
*/
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.text :
|
||||
{
|
||||
KEEP(*(.Vectors))
|
||||
*(.text*)
|
||||
|
||||
*(.init)
|
||||
*(.fini)
|
||||
|
||||
/* .ctors */
|
||||
*crtbegin.o(.ctors)
|
||||
*crtbegin?.o(.ctors)
|
||||
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
|
||||
*(SORT(.ctors.*))
|
||||
*(.ctors)
|
||||
|
||||
/* .dtors */
|
||||
*crtbegin.o(.dtors)
|
||||
*crtbegin?.o(.dtors)
|
||||
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
|
||||
*(SORT(.dtors.*))
|
||||
*(.dtors)
|
||||
|
||||
*(.rodata*)
|
||||
|
||||
*(.eh_frame*)
|
||||
} > FLASH
|
||||
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > FLASH
|
||||
|
||||
__exidx_start = .;
|
||||
.ARM.exidx :
|
||||
{
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
} > FLASH
|
||||
__exidx_end = .;
|
||||
|
||||
__etext = .;
|
||||
|
||||
.data : AT (__etext)
|
||||
{
|
||||
__data_start__ = .;
|
||||
*(vtable)
|
||||
*(.data*)
|
||||
|
||||
. = ALIGN(4);
|
||||
/* preinit data */
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
*(.preinit_array)
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
/* init data */
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
*(SORT(.init_array.*))
|
||||
*(.init_array)
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
|
||||
|
||||
. = ALIGN(4);
|
||||
/* finit data */
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
*(SORT(.fini_array.*))
|
||||
*(.fini_array)
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
|
||||
*(.jcr)
|
||||
. = ALIGN(4);
|
||||
/* All data end */
|
||||
__data_end__ = .;
|
||||
|
||||
} > RAM
|
||||
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__bss_start__ = .;
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
__bss_end__ = .;
|
||||
} > RAM
|
||||
|
||||
.heap (COPY):
|
||||
{
|
||||
__end__ = .;
|
||||
end = __end__;
|
||||
*(.heap*)
|
||||
__HeapLimit = .;
|
||||
} > RAM
|
||||
|
||||
/* .stack_dummy section doesn't contains any symbols. It is only
|
||||
* used for linker to calculate size of stack sections, and assign
|
||||
* values to stack symbols later */
|
||||
.stack_dummy (COPY):
|
||||
{
|
||||
*(.stack*)
|
||||
} > RAM
|
||||
|
||||
/* Set stack top to end of RAM, and stack limit move down by
|
||||
* size of stack_dummy section */
|
||||
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
|
||||
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
|
||||
PROVIDE(__stack = __StackTop);
|
||||
|
||||
/* Check if data + heap + stack exceeds RAM limit */
|
||||
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,262 @@
|
|||
/*
|
||||
Copyright (c) 2013, Nordic Semiconductor ASA
|
||||
All rights reserved.
|
||||
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions are met:
|
||||
|
||||
* Redistributions of source code must retain the above copyright notice, this
|
||||
list of conditions and the following disclaimer.
|
||||
|
||||
* Redistributions in binary form must reproduce the above copyright notice,
|
||||
this list of conditions and the following disclaimer in the documentation
|
||||
and/or other materials provided with the distribution.
|
||||
|
||||
* Neither the name of Nordic Semiconductor ASA nor the names of its
|
||||
contributors may be used to endorse or promote products derived from
|
||||
this software without specific prior written permission.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/*
|
||||
NOTE: Template files (including this one) are application specific and therefore
|
||||
expected to be copied into the application project folder prior to its use!
|
||||
*/
|
||||
|
||||
.syntax unified
|
||||
.arch armv6-m
|
||||
|
||||
.section .stack
|
||||
.align 3
|
||||
#ifdef __STACK_SIZE
|
||||
.equ Stack_Size, __STACK_SIZE
|
||||
#else
|
||||
.equ Stack_Size, 2048
|
||||
#endif
|
||||
.globl __StackTop
|
||||
.globl __StackLimit
|
||||
__StackLimit:
|
||||
.space Stack_Size
|
||||
.size __StackLimit, . - __StackLimit
|
||||
__StackTop:
|
||||
.size __StackTop, . - __StackTop
|
||||
|
||||
.section .heap
|
||||
.align 3
|
||||
#ifdef __HEAP_SIZE
|
||||
.equ Heap_Size, __HEAP_SIZE
|
||||
#else
|
||||
.equ Heap_Size, 2048
|
||||
#endif
|
||||
.globl __HeapBase
|
||||
.globl __HeapLimit
|
||||
__HeapBase:
|
||||
.if Heap_Size
|
||||
.space Heap_Size
|
||||
.endif
|
||||
.size __HeapBase, . - __HeapBase
|
||||
__HeapLimit:
|
||||
.size __HeapLimit, . - __HeapLimit
|
||||
|
||||
.section .Vectors
|
||||
.align 2
|
||||
.globl __Vectors
|
||||
__Vectors:
|
||||
.long __StackTop /* Top of Stack */
|
||||
.long Reset_Handler /* Reset Handler */
|
||||
.long NMI_Handler /* NMI Handler */
|
||||
.long HardFault_Handler /* Hard Fault Handler */
|
||||
.long 0 /* Reserved */
|
||||
.long 0 /* Reserved */
|
||||
.long 0 /* Reserved */
|
||||
.long 0 /* Reserved */
|
||||
.long 0 /* Reserved */
|
||||
.long 0 /* Reserved */
|
||||
.long 0 /* Reserved */
|
||||
.long SVC_Handler /* SVCall Handler */
|
||||
.long 0 /* Reserved */
|
||||
.long 0 /* Reserved */
|
||||
.long PendSV_Handler /* PendSV Handler */
|
||||
.long SysTick_Handler /* SysTick Handler */
|
||||
|
||||
/* External Interrupts */
|
||||
.long POWER_CLOCK_IRQHandler /*POWER_CLOCK */
|
||||
.long RADIO_IRQHandler /*RADIO */
|
||||
.long UART0_IRQHandler /*UART0 */
|
||||
.long SPI0_TWI0_IRQHandler /*SPI0_TWI0 */
|
||||
.long SPI1_TWI1_IRQHandler /*SPI1_TWI1 */
|
||||
.long 0 /*Reserved */
|
||||
.long GPIOTE_IRQHandler /*GPIOTE */
|
||||
.long ADC_IRQHandler /*ADC */
|
||||
.long TIMER0_IRQHandler /*TIMER0 */
|
||||
.long TIMER1_IRQHandler /*TIMER1 */
|
||||
.long TIMER2_IRQHandler /*TIMER2 */
|
||||
.long RTC0_IRQHandler /*RTC0 */
|
||||
.long TEMP_IRQHandler /*TEMP */
|
||||
.long RNG_IRQHandler /*RNG */
|
||||
.long ECB_IRQHandler /*ECB */
|
||||
.long CCM_AAR_IRQHandler /*CCM_AAR */
|
||||
.long WDT_IRQHandler /*WDT */
|
||||
.long RTC1_IRQHandler /*RTC1 */
|
||||
.long QDEC_IRQHandler /*QDEC */
|
||||
.long LPCOMP_IRQHandler /*LPCOMP */
|
||||
.long SWI0_IRQHandler /*SWI0 */
|
||||
.long SWI1_IRQHandler /*SWI1 */
|
||||
.long SWI2_IRQHandler /*SWI2 */
|
||||
.long SWI3_IRQHandler /*SWI3 */
|
||||
.long SWI4_IRQHandler /*SWI4 */
|
||||
.long SWI5_IRQHandler /*SWI5 */
|
||||
.long 0 /*Reserved */
|
||||
.long 0 /*Reserved */
|
||||
.long 0 /*Reserved */
|
||||
.long 0 /*Reserved */
|
||||
.long 0 /*Reserved */
|
||||
.long 0 /*Reserved */
|
||||
|
||||
|
||||
.size __Vectors, . - __Vectors
|
||||
|
||||
/* Reset Handler */
|
||||
|
||||
.equ NRF_POWER_RAMON_ADDRESS, 0x40000524
|
||||
.equ NRF_POWER_RAMON_RAMxON_ONMODE_Msk, 0x3
|
||||
|
||||
.text
|
||||
.thumb
|
||||
.thumb_func
|
||||
.align 1
|
||||
.globl Reset_Handler
|
||||
.type Reset_Handler, %function
|
||||
Reset_Handler:
|
||||
.fnstart
|
||||
|
||||
/* Make sure ALL RAM banks are powered on */
|
||||
LDR R0, =NRF_POWER_RAMON_ADDRESS
|
||||
LDR R2, [R0]
|
||||
MOVS R1, #NRF_POWER_RAMON_RAMxON_ONMODE_Msk
|
||||
ORRS R2, R1
|
||||
STR R2, [R0]
|
||||
|
||||
/* Loop to copy data from read only memory to RAM. The ranges
|
||||
* of copy from/to are specified by following symbols evaluated in
|
||||
* linker script.
|
||||
* __etext: End of code section, i.e., begin of data sections to copy from.
|
||||
* __data_start__/__data_end__: RAM address range that data should be
|
||||
* copied to. Both must be aligned to 4 bytes boundary. */
|
||||
|
||||
ldr r1, =__etext
|
||||
ldr r2, =__data_start__
|
||||
ldr r3, =__data_end__
|
||||
|
||||
subs r3, r2
|
||||
ble .LC0
|
||||
|
||||
.LC1:
|
||||
subs r3, 4
|
||||
ldr r0, [r1,r3]
|
||||
str r0, [r2,r3]
|
||||
bgt .LC1
|
||||
.LC0:
|
||||
|
||||
LDR R0, =SystemInit
|
||||
BLX R0
|
||||
LDR R0, =_start
|
||||
BX R0
|
||||
|
||||
.pool
|
||||
.cantunwind
|
||||
.fnend
|
||||
.size Reset_Handler,.-Reset_Handler
|
||||
|
||||
.section ".text"
|
||||
|
||||
|
||||
/* Dummy Exception Handlers (infinite loops which can be modified) */
|
||||
|
||||
.weak NMI_Handler
|
||||
.type NMI_Handler, %function
|
||||
NMI_Handler:
|
||||
B .
|
||||
.size NMI_Handler, . - NMI_Handler
|
||||
|
||||
|
||||
.weak HardFault_Handler
|
||||
.type HardFault_Handler, %function
|
||||
HardFault_Handler:
|
||||
B .
|
||||
.size HardFault_Handler, . - HardFault_Handler
|
||||
|
||||
|
||||
.weak SVC_Handler
|
||||
.type SVC_Handler, %function
|
||||
SVC_Handler:
|
||||
B .
|
||||
.size SVC_Handler, . - SVC_Handler
|
||||
|
||||
|
||||
.weak PendSV_Handler
|
||||
.type PendSV_Handler, %function
|
||||
PendSV_Handler:
|
||||
B .
|
||||
.size PendSV_Handler, . - PendSV_Handler
|
||||
|
||||
|
||||
.weak SysTick_Handler
|
||||
.type SysTick_Handler, %function
|
||||
SysTick_Handler:
|
||||
B .
|
||||
.size SysTick_Handler, . - SysTick_Handler
|
||||
|
||||
|
||||
/* IRQ Handlers */
|
||||
|
||||
.globl Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
B .
|
||||
.size Default_Handler, . - Default_Handler
|
||||
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
IRQ POWER_CLOCK_IRQHandler
|
||||
IRQ RADIO_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ SPI0_TWI0_IRQHandler
|
||||
IRQ SPI1_TWI1_IRQHandler
|
||||
IRQ GPIOTE_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ TIMER0_IRQHandler
|
||||
IRQ TIMER1_IRQHandler
|
||||
IRQ TIMER2_IRQHandler
|
||||
IRQ RTC0_IRQHandler
|
||||
IRQ TEMP_IRQHandler
|
||||
IRQ RNG_IRQHandler
|
||||
IRQ ECB_IRQHandler
|
||||
IRQ CCM_AAR_IRQHandler
|
||||
IRQ WDT_IRQHandler
|
||||
IRQ RTC1_IRQHandler
|
||||
IRQ QDEC_IRQHandler
|
||||
IRQ LPCOMP_IRQHandler
|
||||
IRQ SWI0_IRQHandler
|
||||
IRQ SWI1_IRQHandler
|
||||
IRQ SWI2_IRQHandler
|
||||
IRQ SWI3_IRQHandler
|
||||
IRQ SWI4_IRQHandler
|
||||
IRQ SWI5_IRQHandler
|
||||
|
||||
|
||||
.end
|
||||
|
||||
|
|
@ -247,6 +247,9 @@ osThreadDef_t os_thread_def_main = {(os_pthread)main, osPriorityNormal, 0, NULL}
|
|||
#elif defined(TARGET_LPC11U68)
|
||||
#define INITIAL_SP (0x10004000UL)
|
||||
|
||||
#elif defined(TARGET_NRF51822)
|
||||
#define INITIAL_SP (0x20004000UL)
|
||||
|
||||
#else
|
||||
#error "no target defined"
|
||||
|
||||
|
|
|
|||
|
|
@ -50,7 +50,7 @@
|
|||
// <i> Default: 6
|
||||
#ifndef OS_TASKCNT
|
||||
# if defined(TARGET_LPC1768) || defined(TARGET_LPC2368) || defined(TARGET_LPC4088) || defined(TARGET_LPC1347) || defined(TARGET_K64F) \
|
||||
|| defined(TARGET_KL46Z) || defined(TARGET_STM32F407) || defined(TARGET_F407VG) || defined(TARGET_STM32F303VC) || defined(TARGET_LPC1549) || defined(TARGET_LPC11U68)
|
||||
|| defined(TARGET_KL46Z) || defined(TARGET_STM32F407) || defined(TARGET_F407VG) || defined(TARGET_STM32F303VC) || defined(TARGET_LPC1549) || defined(TARGET_LPC11U68) || defined(TARGET_NRF51822)
|
||||
# define OS_TASKCNT 14
|
||||
# elif defined(TARGET_LPC11U24) || defined(TARGET_LPC11U35_401) || defined(TARGET_LPC11U35_501) || defined(TARGET_LPC1114) \
|
||||
|| defined(TARGET_LPC812) || defined(TARGET_KL25Z) || defined(TARGET_KL05Z) || defined(TARGET_STM32F100RB) || defined(TARGET_STM32F051R8)
|
||||
|
|
@ -63,7 +63,7 @@
|
|||
// <o>Scheduler (+ interrupts) stack size [bytes] <64-4096:8><#/4>
|
||||
#ifndef OS_SCHEDULERSTKSIZE
|
||||
# if defined(TARGET_LPC1768) || defined(TARGET_LPC2368) || defined(TARGET_LPC4088) || defined(TARGET_LPC1347) || defined(TARGET_K64F) \
|
||||
|| defined(TARGET_KL46Z) || defined(TARGET_STM32F407) || defined(TARGET_F407VG) || defined(TARGET_STM32F303VC) || defined(TARGET_LPC1549) || defined(TARGET_LPC11U68)
|
||||
|| defined(TARGET_KL46Z) || defined(TARGET_STM32F407) || defined(TARGET_F407VG) || defined(TARGET_STM32F303VC) || defined(TARGET_LPC1549) || defined(TARGET_LPC11U68) || defined(TARGET_NRF51822)
|
||||
# define OS_SCHEDULERSTKSIZE 256
|
||||
# elif defined(TARGET_LPC11U24) || defined(TARGET_LPC11U35_401) || defined(TARGET_LPC11U35_501) || defined(TARGET_LPC1114) \
|
||||
|| defined(TARGET_LPC812) || defined(TARGET_KL25Z) || defined(TARGET_KL05Z) || defined(TARGET_STM32F100RB) || defined(TARGET_STM32F051R8)
|
||||
|
|
@ -130,6 +130,9 @@
|
|||
# elif defined(TARGET_STM32F407) || defined(TARGET_F407VG)
|
||||
# define OS_CLOCK 168000000
|
||||
|
||||
# elif defined(TARGET_NRF51822)
|
||||
# define OS_CLOCK 16000000
|
||||
|
||||
# else
|
||||
# error "no target defined"
|
||||
# endif
|
||||
|
|
|
|||
|
|
@ -0,0 +1,57 @@
|
|||
# This file was automagically generated by mbed.org. For more information,
|
||||
# see http://mbed.org/handbook/Exporting-to-GCC-ARM-Embedded
|
||||
|
||||
GCC_BIN =
|
||||
PROJECT = {{name}}
|
||||
OBJECTS = {% for f in to_be_compiled %}{{f}} {% endfor %}
|
||||
SYS_OBJECTS = {% for f in object_files %}{{f}} {% endfor %}
|
||||
INCLUDE_PATHS = {% for p in include_paths %}-I{{p}} {% endfor %}
|
||||
LIBRARY_PATHS = {% for p in library_paths %}-L{{p}} {% endfor %}
|
||||
LIBRARIES = {% for lib in libraries %}-l{{lib}} {% endfor %}
|
||||
LINKER_SCRIPT = {{linker_script}}
|
||||
SOFTDEVICE = mbed/TARGET_NRF51822/TARGET_NORDIC/TARGET_NRF51822/Lib/s110_nrf51822_6_0_0/s110_nrf51822_6.0.0_softdevice.hex
|
||||
|
||||
###############################################################################
|
||||
AS = $(GCC_BIN)arm-none-eabi-as
|
||||
CC = $(GCC_BIN)arm-none-eabi-gcc
|
||||
CPP = $(GCC_BIN)arm-none-eabi-g++
|
||||
LD = $(GCC_BIN)arm-none-eabi-gcc
|
||||
OBJCOPY = $(GCC_BIN)arm-none-eabi-objcopy
|
||||
SREC_CAT = srec_cat
|
||||
|
||||
CPU = -mcpu=cortex-m0 -mthumb
|
||||
CC_FLAGS = $(CPU) -c -g -fno-common -fmessage-length=0 -Wall -fno-exceptions -ffunction-sections -fdata-sections
|
||||
CC_SYMBOLS = {% for s in symbols %}-D{{s}} {% endfor %}
|
||||
|
||||
LD_FLAGS = -mcpu=cortex-m0 -mthumb -Wl,--gc-sections --specs=nano.specs -u _printf_float -u _scanf_float
|
||||
LD_SYS_LIBS = -lstdc++ -lsupc++ -lm -lc -lgcc -lnosys
|
||||
|
||||
ifeq ($(DEBUG), 1)
|
||||
CC_FLAGS += -DDEBUG -O0
|
||||
else
|
||||
CC_FLAGS += -DNDEBUG -Os
|
||||
endif
|
||||
|
||||
all: $(PROJECT).hex merge
|
||||
|
||||
clean:
|
||||
rm -f $(PROJECT).hex $(PROJECT).elf $(OBJECTS)
|
||||
|
||||
.s.o:
|
||||
$(AS) $(CPU) -o $@ $<
|
||||
|
||||
.c.o:
|
||||
$(CC) $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu99 $(INCLUDE_PATHS) -o $@ $<
|
||||
|
||||
.cpp.o:
|
||||
$(CPP) $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu++98 $(INCLUDE_PATHS) -o $@ $<
|
||||
|
||||
|
||||
$(PROJECT).elf: $(OBJECTS) $(SYS_OBJECTS)
|
||||
$(LD) $(LD_FLAGS) -T$(LINKER_SCRIPT) $(LIBRARY_PATHS) -o $@ $^ $(LIBRARIES) $(LD_SYS_LIBS) $(LIBRARIES) $(LD_SYS_LIBS)
|
||||
|
||||
$(PROJECT).hex: $(PROJECT).elf
|
||||
$(OBJCOPY) -O ihex $< $@
|
||||
|
||||
merge:
|
||||
$(SREC_CAT) $(SOFTDEVICE) -intel $(PROJECT).hex -binary --offset 0x14000 -o combined.hex -intel --line-length=46
|
||||
|
|
@ -41,6 +41,7 @@ class GccArm(Exporter):
|
|||
'DISCO_F303VC',
|
||||
'UBLOX_C027',
|
||||
'ARCH_PRO',
|
||||
'NRF51822',
|
||||
]
|
||||
|
||||
DOT_IN_RELATIVE_PATH = True
|
||||
|
|
|
|||
|
|
@ -105,14 +105,14 @@ if __name__ == '__main__':
|
|||
('gcc_arm', 'DISCO_F051R8'),
|
||||
('gcc_arm', 'DISCO_F407VG'),
|
||||
('gcc_arm', 'DISCO_F303VC'),
|
||||
('gcc_arm', 'NRF51822'),
|
||||
|
||||
|
||||
('ds5_5', 'LPC1768'), ('ds5_5', 'LPC11U24'),
|
||||
|
||||
('iar', 'LPC1768'),
|
||||
|
||||
|
||||
(None, None)
|
||||
(None, None),
|
||||
]:
|
||||
print '\n=== Exporting to "%s::%s" ===' % (toolchain, target)
|
||||
test_export(toolchain, target)
|
||||
|
|
|
|||
|
|
@ -516,10 +516,13 @@ class NRF51822(Target):
|
|||
self.core = "Cortex-M0"
|
||||
|
||||
self.extra_labels = ["NORDIC"]
|
||||
|
||||
self.supported_toolchains = ["ARM"]
|
||||
|
||||
|
||||
self.supported_toolchains = ["ARM", "GCC_ARM"]
|
||||
|
||||
self.is_disk_virtual = True
|
||||
|
||||
def program_cycle_s(self):
|
||||
return 6
|
||||
|
||||
def init_hooks(self, hook, toolchain_name):
|
||||
if toolchain_name in ['ARM_STD', 'ARM_MICRO']:
|
||||
|
|
|
|||
Loading…
Reference in New Issue