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Merge remote-tracking branch 'upstream/master'

pull/133/head
Yihui Xiong 2013-12-19 12:38:04 +08:00
parent a3465b5eac b74e0c8b39
commit 6501b16213
107 changed files with 38373 additions and 685 deletions
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96
MANIFEST
View File

@ -1,96 +0,0 @@
# file GENERATED by distutils, do NOT edit
LICENSE
setup.py
workspace_tools/__init__.py
workspace_tools/__init__.pyc
workspace_tools/autotest.py
workspace_tools/build.py
workspace_tools/build_api.py
workspace_tools/build_release.py
workspace_tools/client.py
workspace_tools/export_test.py
workspace_tools/hooks.py
workspace_tools/libraries.py
workspace_tools/make.py
workspace_tools/options.py
workspace_tools/patch.py
workspace_tools/paths.py
workspace_tools/project.py
workspace_tools/server.py
workspace_tools/settings.py
workspace_tools/size.py
workspace_tools/syms.py
workspace_tools/synch.py
workspace_tools/targets.py
workspace_tools/tests.py
workspace_tools/utils.py
workspace_tools/data/__init__.py
workspace_tools/data/example_test_spec.json
workspace_tools/data/support.py
workspace_tools/data/rpc/RPCClasses.h
workspace_tools/data/rpc/class.cpp
workspace_tools/dev/__init__.py
workspace_tools/dev/dsp_fir.py
workspace_tools/dev/rpc_classes.py
workspace_tools/export/__init__.py
workspace_tools/export/codered.py
workspace_tools/export/codered_lpc1768_cproject.tmpl
workspace_tools/export/codered_lpc1768_project.tmpl
workspace_tools/export/codered_lpc4088_cproject.tmpl
workspace_tools/export/codered_lpc4088_project.tmpl
workspace_tools/export/codesourcery.py
workspace_tools/export/codesourcery_lpc1768.tmpl
workspace_tools/export/ds5_5.py
workspace_tools/export/ds5_5_lpc11u24.cproject.tmpl
workspace_tools/export/ds5_5_lpc11u24.launch.tmpl
workspace_tools/export/ds5_5_lpc11u24.project.tmpl
workspace_tools/export/ds5_5_lpc1768.cproject.tmpl
workspace_tools/export/ds5_5_lpc1768.launch.tmpl
workspace_tools/export/ds5_5_lpc1768.project.tmpl
workspace_tools/export/exporters.py
workspace_tools/export/gcc_arm_lpc1768.tmpl
workspace_tools/export/gccarm.py
workspace_tools/export/iar.ewp.tmpl
workspace_tools/export/iar.eww.tmpl
workspace_tools/export/iar.py
workspace_tools/export/uvision4.py
workspace_tools/export/uvision4_kl25z.uvopt.tmpl
workspace_tools/export/uvision4_kl25z.uvproj.tmpl
workspace_tools/export/uvision4_lpc1114.uvopt.tmpl
workspace_tools/export/uvision4_lpc1114.uvproj.tmpl
workspace_tools/export/uvision4_lpc11c24.uvopt.tmpl
workspace_tools/export/uvision4_lpc11c24.uvproj.tmpl
workspace_tools/export/uvision4_lpc11u24.uvopt.tmpl
workspace_tools/export/uvision4_lpc11u24.uvproj.tmpl
workspace_tools/export/uvision4_lpc1347.uvopt.tmpl
workspace_tools/export/uvision4_lpc1347.uvproj.tmpl
workspace_tools/export/uvision4_lpc1768.uvopt.tmpl
workspace_tools/export/uvision4_lpc1768.uvproj.tmpl
workspace_tools/export/uvision4_lpc4088.uvopt.tmpl
workspace_tools/export/uvision4_lpc4088.uvproj.tmpl
workspace_tools/export/uvision4_lpc812.uvopt.tmpl
workspace_tools/export/uvision4_lpc812.uvproj.tmpl
workspace_tools/host_tests/__init__.py
workspace_tools/host_tests/echo.py
workspace_tools/host_tests/host_test.py
workspace_tools/host_tests/mbedrpc.py
workspace_tools/host_tests/net_test.py
workspace_tools/host_tests/rpc.py
workspace_tools/host_tests/tcpecho_client.py
workspace_tools/host_tests/tcpecho_server.py
workspace_tools/host_tests/tcpecho_server_loop.py
workspace_tools/host_tests/udpecho_client.py
workspace_tools/host_tests/udpecho_server.py
workspace_tools/host_tests/example/BroadcastReceive.py
workspace_tools/host_tests/example/BroadcastSend.py
workspace_tools/host_tests/example/MulticastReceive.py
workspace_tools/host_tests/example/MulticastSend.py
workspace_tools/host_tests/example/TCPEchoClient.py
workspace_tools/host_tests/example/TCPEchoServer.py
workspace_tools/host_tests/example/UDPEchoClient.py
workspace_tools/host_tests/example/UDPEchoServer.py
workspace_tools/host_tests/example/__init__.py
workspace_tools/toolchains/__init__.py
workspace_tools/toolchains/arm.py
workspace_tools/toolchains/gcc.py
workspace_tools/toolchains/iar.py

3
MANIFEST.in
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@ -1,2 +1,3 @@
graft workspace_tools
include __init__.py LICENSE
recursive-exclude workspace_tools *.pyc
include LICENSE

3
README.md
View File

@ -35,8 +35,9 @@ NXP:
* LPC11C24 (Cortex-M0)
Freescale:
* [KL25Z](http://mbed.org/platforms/KL25Z/) (Cortex-M0+)
* KL05Z (Cortex-M0+)
* [KL25Z](http://mbed.org/platforms/KL25Z/) (Cortex-M0+)
* [KL46Z](https://mbed.org/platforms/FRDM-KL46Z/) (Cortex-M0+)
STMicroelectronics:
* STM32F407 (Cortex-M4)

2
libraries/USBDevice/USBDevice/USBEndpoints.h
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@ -43,6 +43,8 @@ typedef enum {
#include "USBEndpoints_LPC11U.h"
#elif defined(TARGET_KL25Z)
#include "USBEndpoints_KL25Z.h"
#elif defined (TARGET_STM32F4XX)
#include "USBEndpoints_STM32F4.h"
#else
#error "Unknown target type"
#endif

61
libraries/USBDevice/USBDevice/USBEndpoints_STM32F4.h Normal file
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@ -0,0 +1,61 @@
/* Copyright (c) 2010-2011 mbed.org, MIT License
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of this software
* and associated documentation files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all copies or
* substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#define NUMBER_OF_LOGICAL_ENDPOINTS (4)
#define NUMBER_OF_PHYSICAL_ENDPOINTS (NUMBER_OF_LOGICAL_ENDPOINTS * 2)
/* Define physical endpoint numbers */
/* Endpoint No. Type(s) MaxPacket DoubleBuffer */
/* ---------------- ------------ ---------- --- */
#define EP0OUT (0) /* Control 64 No */
#define EP0IN (1) /* Control 64 No */
#define EP1OUT (2) /* Int/Bulk/Iso 64/64/1023 Yes */
#define EP1IN (3) /* Int/Bulk/Iso 64/64/1023 Yes */
#define EP2OUT (4) /* Int/Bulk/Iso 64/64/1023 Yes */
#define EP2IN (5) /* Int/Bulk/Iso 64/64/1023 Yes */
#define EP3OUT (6) /* Int/Bulk/Iso 64/64/1023 Yes */
#define EP3IN (7) /* Int/Bulk/Iso 64/64/1023 Yes */
/* Maximum Packet sizes */
#define MAX_PACKET_SIZE_EP0 (64)
#define MAX_PACKET_SIZE_EP1 (64) /* Int/Bulk */
#define MAX_PACKET_SIZE_EP2 (64) /* Int/Bulk */
#define MAX_PACKET_SIZE_EP3 (64) /* Int/Bulk */
#define MAX_PACKET_SIZE_EP1_ISO (1023) /* Isochronous */
#define MAX_PACKET_SIZE_EP2_ISO (1023) /* Isochronous */
#define MAX_PACKET_SIZE_EP3_ISO (1023) /* Isochronous */
/* Generic endpoints - intended to be portable accross devices */
/* and be suitable for simple USB devices. */
/* Bulk endpoint */
#define EPBULK_OUT (EP2OUT)
#define EPBULK_IN (EP2IN)
/* Interrupt endpoint */
#define EPINT_OUT (EP1OUT)
#define EPINT_IN (EP1IN)
/* Isochronous endpoint */
#define EPISO_OUT (EP3OUT)
#define EPISO_IN (EP3IN)
#define MAX_PACKET_SIZE_EPBULK (MAX_PACKET_SIZE_EP2)
#define MAX_PACKET_SIZE_EPINT (MAX_PACKET_SIZE_EP1)
#define MAX_PACKET_SIZE_EPISO (MAX_PACKET_SIZE_EP3_ISO)

5
libraries/USBDevice/USBDevice/USBHAL.h
View File

@ -74,9 +74,9 @@ protected:
virtual bool EP2_IN_callback(){return false;};
virtual bool EP3_OUT_callback(){return false;};
virtual bool EP3_IN_callback(){return false;};
#if !defined(TARGET_STM32F4)
virtual bool EP4_OUT_callback(){return false;};
virtual bool EP4_IN_callback(){return false;};
#if !defined(TARGET_LPC11U24)
virtual bool EP5_OUT_callback(){return false;};
virtual bool EP5_IN_callback(){return false;};
@ -101,6 +101,7 @@ protected:
virtual bool EP15_OUT_callback(){return false;};
virtual bool EP15_IN_callback(){return false;};
#endif
#endif
private:
void usbisr(void);
@ -109,6 +110,8 @@ private:
#if defined(TARGET_LPC11U24)
bool (USBHAL::*epCallback[10 - 2])(void);
#elif defined(TARGET_STM32F4XX)
bool (USBHAL::*epCallback[8 - 2])(void);
#else
bool (USBHAL::*epCallback[32 - 2])(void);
#endif

402
libraries/USBDevice/USBDevice/USBHAL_STM32F4.cpp Normal file
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@ -0,0 +1,402 @@
/* Copyright (c) 2010-2011 mbed.org, MIT License
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of this software
* and associated documentation files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all copies or
* substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#if defined(TARGET_STM32F4XX)
#include "USBHAL.h"
#include "USBRegs_STM32.h"
#include "pinmap.h"
USBHAL * USBHAL::instance;
static volatile int epComplete = 0;
static uint32_t bufferEnd = 0;
static const uint32_t rxFifoSize = 512;
static uint32_t rxFifoCount = 0;
static uint32_t setupBuffer[MAX_PACKET_SIZE_EP0 >> 2];
uint32_t USBHAL::endpointReadcore(uint8_t endpoint, uint8_t *buffer) {
return 0;
}
USBHAL::USBHAL(void) {
NVIC_DisableIRQ(OTG_FS_IRQn);
epCallback[0] = &USBHAL::EP1_OUT_callback;
epCallback[1] = &USBHAL::EP1_IN_callback;
epCallback[2] = &USBHAL::EP2_OUT_callback;
epCallback[3] = &USBHAL::EP2_IN_callback;
epCallback[4] = &USBHAL::EP3_OUT_callback;
epCallback[5] = &USBHAL::EP3_IN_callback;
// Enable power and clocking
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN;
pin_function(PA_8, STM_PIN_DATA(2, 10));
pin_function(PA_9, STM_PIN_DATA(0, 0));
pin_function(PA_10, STM_PIN_DATA(2, 10));
pin_function(PA_11, STM_PIN_DATA(2, 10));
pin_function(PA_12, STM_PIN_DATA(2, 10));
// Set ID pin to open drain with pull-up resistor
pin_mode(PA_10, OpenDrain);
GPIOA->PUPDR &= ~(0x3 << 20);
GPIOA->PUPDR |= 1 << 20;
// Set VBUS pin to open drain
pin_mode(PA_9, OpenDrain);
RCC->AHB2ENR |= RCC_AHB2ENR_OTGFSEN;
// Enable interrupts
OTG_FS->GREGS.GAHBCFG |= (1 << 0);
// Turnaround time to maximum value - too small causes packet loss
OTG_FS->GREGS.GUSBCFG |= (0xF << 10);
// Unmask global interrupts
OTG_FS->GREGS.GINTMSK |= (1 << 3) | // SOF
(1 << 4) | // RX FIFO not empty
(1 << 12); // USB reset
OTG_FS->DREGS.DCFG |= (0x3 << 0) | // Full speed
(1 << 2); // Non-zero-length status OUT handshake
OTG_FS->GREGS.GCCFG |= (1 << 19) | // Enable VBUS sensing
(1 << 16); // Power Up
instance = this;
NVIC_SetVector(OTG_FS_IRQn, (uint32_t)&_usbisr);
NVIC_SetPriority(OTG_FS_IRQn, 1);
}
USBHAL::~USBHAL(void) {
}
void USBHAL::connect(void) {
NVIC_EnableIRQ(OTG_FS_IRQn);
}
void USBHAL::disconnect(void) {
NVIC_DisableIRQ(OTG_FS_IRQn);
}
void USBHAL::configureDevice(void) {
// Not needed
}
void USBHAL::unconfigureDevice(void) {
// Not needed
}
void USBHAL::setAddress(uint8_t address) {
OTG_FS->DREGS.DCFG |= (address << 4);
EP0write(0, 0);
}
bool USBHAL::realiseEndpoint(uint8_t endpoint, uint32_t maxPacket,
uint32_t flags) {
uint32_t epIndex = endpoint >> 1;
uint32_t type;
switch (endpoint) {
case EP0IN:
case EP0OUT:
type = 0;
break;
case EPISO_IN:
case EPISO_OUT:
type = 1;
case EPBULK_IN:
case EPBULK_OUT:
type = 2;
break;
case EPINT_IN:
case EPINT_OUT:
type = 3;
break;
}
// Generic in or out EP controls
uint32_t control = (maxPacket << 0) | // Packet size
(1 << 15) | // Active endpoint
(type << 18); // Endpoint type
if (endpoint & 0x1) { // In Endpoint
// Set up the Tx FIFO
if (endpoint == EP0IN) {
OTG_FS->GREGS.DIEPTXF0_HNPTXFSIZ = ((maxPacket >> 2) << 16) |
(bufferEnd << 0);
}
else {
OTG_FS->GREGS.DIEPTXF[epIndex - 1] = ((maxPacket >> 2) << 16) |
(bufferEnd << 0);
}
bufferEnd += maxPacket >> 2;
// Set the In EP specific control settings
if (endpoint != EP0IN) {
control |= (1 << 28); // SD0PID
}
control |= (epIndex << 22) | // TxFIFO index
(1 << 27); // SNAK
OTG_FS->INEP_REGS[epIndex].DIEPCTL = control;
// Unmask the interrupt
OTG_FS->DREGS.DAINTMSK |= (1 << epIndex);
}
else { // Out endpoint
// Set the out EP specific control settings
control |= (1 << 26); // CNAK
OTG_FS->OUTEP_REGS[epIndex].DOEPCTL = control;
// Unmask the interrupt
OTG_FS->DREGS.DAINTMSK |= (1 << (epIndex + 16));
}
return true;
}
// read setup packet
void USBHAL::EP0setup(uint8_t *buffer) {
memcpy(buffer, setupBuffer, MAX_PACKET_SIZE_EP0);
}
void USBHAL::EP0readStage(void) {
}
void USBHAL::EP0read(void) {
}
uint32_t USBHAL::EP0getReadResult(uint8_t *buffer) {
uint32_t* buffer32 = (uint32_t *) buffer;
uint32_t length = rxFifoCount;
for (uint32_t i = 0; i < length; i += 4) {
buffer32[i >> 2] = OTG_FS->FIFO[0][0];
}
rxFifoCount = 0;
return length;
}
void USBHAL::EP0write(uint8_t *buffer, uint32_t size) {
endpointWrite(0, buffer, size);
}
void USBHAL::EP0getWriteResult(void) {
}
void USBHAL::EP0stall(void) {
// If we stall the out endpoint here then we have problems transferring
// and setup requests after the (stalled) get device qualifier requests.
// TODO: Find out if this is correct behavior, or whether we are doing
// something else wrong
stallEndpoint(EP0IN);
// stallEndpoint(EP0OUT);
}
EP_STATUS USBHAL::endpointRead(uint8_t endpoint, uint32_t maximumSize) {
uint32_t epIndex = endpoint >> 1;
uint32_t size = (1 << 19) | // 1 packet
(maximumSize << 0); // Packet size
// if (endpoint == EP0OUT) {
size |= (1 << 29); // 1 setup packet
// }
OTG_FS->OUTEP_REGS[epIndex].DOEPTSIZ = size;
OTG_FS->OUTEP_REGS[epIndex].DOEPCTL |= (1 << 31) | // Enable endpoint
(1 << 26); // Clear NAK
epComplete &= ~(1 << endpoint);
return EP_PENDING;
}
EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t * buffer, uint32_t *bytesRead) {
if (!(epComplete & (1 << endpoint))) {
return EP_PENDING;
}
uint32_t* buffer32 = (uint32_t *) buffer;
uint32_t length = rxFifoCount;
for (uint32_t i = 0; i < length; i += 4) {
buffer32[i >> 2] = OTG_FS->FIFO[endpoint >> 1][0];
}
rxFifoCount = 0;
*bytesRead = length;
return EP_COMPLETED;
}
EP_STATUS USBHAL::endpointWrite(uint8_t endpoint, uint8_t *data, uint32_t size) {
uint32_t epIndex = endpoint >> 1;
OTG_FS->INEP_REGS[epIndex].DIEPTSIZ = (1 << 19) | // 1 packet
(size << 0); // Size of packet
OTG_FS->INEP_REGS[epIndex].DIEPCTL |= (1 << 31) | // Enable endpoint
(1 << 26); // CNAK
OTG_FS->DREGS.DIEPEMPMSK = (1 << epIndex);
while ((OTG_FS->INEP_REGS[epIndex].DTXFSTS & 0XFFFF) < ((size + 3) >> 2));
for (uint32_t i=0; i<(size + 3) >> 2; i++, data+=4) {
OTG_FS->FIFO[epIndex][0] = *(uint32_t *)data;
}
epComplete &= ~(1 << endpoint);
return EP_PENDING;
}
EP_STATUS USBHAL::endpointWriteResult(uint8_t endpoint) {
if (epComplete & (1 << endpoint)) {
epComplete &= ~(1 << endpoint);
return EP_COMPLETED;
}
return EP_PENDING;
}
void USBHAL::stallEndpoint(uint8_t endpoint) {
if (endpoint & 0x1) { // In EP
OTG_FS->INEP_REGS[endpoint >> 1].DIEPCTL |= (1 << 30) | // Disable
(1 << 21); // Stall
}
else { // Out EP
OTG_FS->DREGS.DCTL |= (1 << 9); // Set global out NAK
OTG_FS->OUTEP_REGS[endpoint >> 1].DOEPCTL |= (1 << 30) | // Disable
(1 << 21); // Stall
}
}
void USBHAL::unstallEndpoint(uint8_t endpoint) {
}
bool USBHAL::getEndpointStallState(uint8_t endpoint) {
return false;
}
void USBHAL::remoteWakeup(void) {
}
void USBHAL::_usbisr(void) {
instance->usbisr();
}
void USBHAL::usbisr(void) {
if (OTG_FS->GREGS.GINTSTS & (1 << 12)) { // USB Reset
// Set SNAK bits
OTG_FS->OUTEP_REGS[0].DOEPCTL |= (1 << 27);
OTG_FS->OUTEP_REGS[1].DOEPCTL |= (1 << 27);
OTG_FS->OUTEP_REGS[2].DOEPCTL |= (1 << 27);
OTG_FS->OUTEP_REGS[3].DOEPCTL |= (1 << 27);
OTG_FS->DREGS.DIEPMSK = (1 << 0);
bufferEnd = 0;
// Set the receive FIFO size
OTG_FS->GREGS.GRXFSIZ = rxFifoSize >> 2;
bufferEnd += rxFifoSize >> 2;
// Create the endpoints, and wait for setup packets on out EP0
realiseEndpoint(EP0IN, MAX_PACKET_SIZE_EP0, 0);
realiseEndpoint(EP0OUT, MAX_PACKET_SIZE_EP0, 0);
endpointRead(EP0OUT, MAX_PACKET_SIZE_EP0);
OTG_FS->GREGS.GINTSTS = (1 << 12);
}
if (OTG_FS->GREGS.GINTSTS & (1 << 4)) { // RX FIFO not empty
uint32_t status = OTG_FS->GREGS.GRXSTSP;
uint32_t endpoint = (status & 0xF) << 1;
uint32_t length = (status >> 4) & 0x7FF;
uint32_t type = (status >> 17) & 0xF;
rxFifoCount = length;
if (type == 0x6) {
// Setup packet
for (uint32_t i=0; i<length; i+=4) {
setupBuffer[i >> 2] = OTG_FS->FIFO[0][i >> 2];
}
rxFifoCount = 0;
}
if (type == 0x4) {
// Setup complete
EP0setupCallback();
endpointRead(EP0OUT, MAX_PACKET_SIZE_EP0);
}
if (type == 0x2) {
// Out packet
if (endpoint == EP0OUT) {
EP0out();
}
else {
epComplete |= (1 << endpoint);
if ((instance->*(epCallback[endpoint - 2]))()) {
epComplete &= (1 << endpoint);
}
}
}
for (uint32_t i=0; i<rxFifoCount; i+=4) {
(void) OTG_FS->FIFO[0][0];
}
OTG_FS->GREGS.GINTSTS = (1 << 4);
}
if (OTG_FS->GREGS.GINTSTS & (1 << 18)) { // In endpoint interrupt
// Loop through the in endpoints
for (uint32_t i=0; i<4; i++) {
if (OTG_FS->DREGS.DAINT & (1 << i)) { // Interrupt is on endpoint
if (OTG_FS->INEP_REGS[i].DIEPINT & (1 << 7)) {// Tx FIFO empty
// If the Tx FIFO is empty on EP0 we need to send a further
// packet, so call EP0in()
if (i == 0) {
EP0in();
}
// Clear the interrupt
OTG_FS->INEP_REGS[i].DIEPINT = (1 << 7);
// Stop firing Tx empty interrupts
// Will get turned on again if another write is called
OTG_FS->DREGS.DIEPEMPMSK &= ~(1 << i);
}
// If the transfer is complete
if (OTG_FS->INEP_REGS[i].DIEPINT & (1 << 0)) { // Tx Complete
epComplete |= (1 << (1 + (i << 1)));
OTG_FS->INEP_REGS[i].DIEPINT = (1 << 0);
}
}
}
OTG_FS->GREGS.GINTSTS = (1 << 18);
}
if (OTG_FS->GREGS.GINTSTS & (1 << 3)) { // Start of frame
SOF((OTG_FS->GREGS.GRXSTSR >> 17) & 0xF);
OTG_FS->GREGS.GINTSTS = (1 << 3);
}
}
#endif

149
libraries/USBDevice/USBDevice/USBRegs_STM32.h Normal file
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@ -0,0 +1,149 @@
/**
******************************************************************************
* @file usb_regs.h
* @author MCD Application Team
* @version V2.1.0
* @date 19-March-2012
* @brief hardware registers
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
* You may obtain a copy of the License at:
*
* http://www.st.com/software_license_agreement_liberty_v2
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
*/
#ifndef __USB_OTG_REGS_H__
#define __USB_OTG_REGS_H__
typedef struct //000h
{
__IO uint32_t GOTGCTL; /* USB_OTG Control and Status Register 000h*/
__IO uint32_t GOTGINT; /* USB_OTG Interrupt Register 004h*/
__IO uint32_t GAHBCFG; /* Core AHB Configuration Register 008h*/
__IO uint32_t GUSBCFG; /* Core USB Configuration Register 00Ch*/
__IO uint32_t GRSTCTL; /* Core Reset Register 010h*/
__IO uint32_t GINTSTS; /* Core Interrupt Register 014h*/
__IO uint32_t GINTMSK; /* Core Interrupt Mask Register 018h*/
__IO uint32_t GRXSTSR; /* Receive Sts Q Read Register 01Ch*/
__IO uint32_t GRXSTSP; /* Receive Sts Q Read & POP Register 020h*/
__IO uint32_t GRXFSIZ; /* Receive FIFO Size Register 024h*/
__IO uint32_t DIEPTXF0_HNPTXFSIZ; /* EP0 / Non Periodic Tx FIFO Size Register 028h*/
__IO uint32_t HNPTXSTS; /* Non Periodic Tx FIFO/Queue Sts reg 02Ch*/
uint32_t Reserved30[2]; /* Reserved 030h*/
__IO uint32_t GCCFG; /* General Purpose IO Register 038h*/
__IO uint32_t CID; /* User ID Register 03Ch*/
uint32_t Reserved40[48]; /* Reserved 040h-0FFh*/
__IO uint32_t HPTXFSIZ; /* Host Periodic Tx FIFO Size Reg 100h*/
__IO uint32_t DIEPTXF[3];/* dev Periodic Transmit FIFO */
}
USB_OTG_GREGS;
typedef struct // 800h
{
__IO uint32_t DCFG; /* dev Configuration Register 800h*/
__IO uint32_t DCTL; /* dev Control Register 804h*/
__IO uint32_t DSTS; /* dev Status Register (RO) 808h*/
uint32_t Reserved0C; /* Reserved 80Ch*/
__IO uint32_t DIEPMSK; /* dev IN Endpoint Mask 810h*/
__IO uint32_t DOEPMSK; /* dev OUT Endpoint Mask 814h*/
__IO uint32_t DAINT; /* dev All Endpoints Itr Reg 818h*/
__IO uint32_t DAINTMSK; /* dev All Endpoints Itr Mask 81Ch*/
uint32_t Reserved20; /* Reserved 820h*/
uint32_t Reserved9; /* Reserved 824h*/
__IO uint32_t DVBUSDIS; /* dev VBUS discharge Register 828h*/
__IO uint32_t DVBUSPULSE; /* dev VBUS Pulse Register 82Ch*/
__IO uint32_t DTHRCTL; /* dev thr 830h*/
__IO uint32_t DIEPEMPMSK; /* dev empty msk 834h*/
}
USB_OTG_DREGS;
typedef struct
{
__IO uint32_t DIEPCTL; /* dev IN Endpoint Control Reg 900h + (ep_num * 20h) + 00h*/
uint32_t Reserved04; /* Reserved 900h + (ep_num * 20h) + 04h*/
__IO uint32_t DIEPINT; /* dev IN Endpoint Itr Reg 900h + (ep_num * 20h) + 08h*/
uint32_t Reserved0C; /* Reserved 900h + (ep_num * 20h) + 0Ch*/
__IO uint32_t DIEPTSIZ; /* IN Endpoint Txfer Size 900h + (ep_num * 20h) + 10h*/
uint32_t Reserved14;
__IO uint32_t DTXFSTS;/*IN Endpoint Tx FIFO Status Reg 900h + (ep_num * 20h) + 18h*/
uint32_t Reserved1C; /* Reserved 900h+(ep_num*20h)+1Ch-900h+ (ep_num * 20h) + 1Ch*/
}
USB_OTG_INEPREGS;
typedef struct
{
__IO uint32_t DOEPCTL; /* dev OUT Endpoint Control Reg B00h + (ep_num * 20h) + 00h*/
uint32_t Reserved04; /* Reserved B00h + (ep_num * 20h) + 04h*/
__IO uint32_t DOEPINT; /* dev OUT Endpoint Itr Reg B00h + (ep_num * 20h) + 08h*/
uint32_t Reserved0C; /* Reserved B00h + (ep_num * 20h) + 0Ch*/
__IO uint32_t DOEPTSIZ; /* dev OUT Endpoint Txfer Size B00h + (ep_num * 20h) + 10h*/
uint32_t Reserved14[3];
}
USB_OTG_OUTEPREGS;
typedef struct
{
__IO uint32_t HCFG; /* Host Configuration Register 400h*/
__IO uint32_t HFIR; /* Host Frame Interval Register 404h*/
__IO uint32_t HFNUM; /* Host Frame Nbr/Frame Remaining 408h*/
uint32_t Reserved40C; /* Reserved 40Ch*/
__IO uint32_t HPTXSTS; /* Host Periodic Tx FIFO/ Queue Status 410h*/
__IO uint32_t HAINT; /* Host All Channels Interrupt Register 414h*/
__IO uint32_t HAINTMSK; /* Host All Channels Interrupt Mask 418h*/
}
USB_OTG_HREGS;
typedef struct
{
__IO uint32_t HCCHAR;
__IO uint32_t HCSPLT;
__IO uint32_t HCINT;
__IO uint32_t HCINTMSK;
__IO uint32_t HCTSIZ;
uint32_t Reserved[3];
}
USB_OTG_HC_REGS;
typedef struct
{
USB_OTG_GREGS GREGS;
uint32_t RESERVED0[188];
USB_OTG_HREGS HREGS;
uint32_t RESERVED1[9];
__IO uint32_t HPRT;
uint32_t RESERVED2[47];
USB_OTG_HC_REGS HC_REGS[8];
uint32_t RESERVED3[128];
USB_OTG_DREGS DREGS;
uint32_t RESERVED4[50];
USB_OTG_INEPREGS INEP_REGS[4];
uint32_t RESERVED5[96];
USB_OTG_OUTEPREGS OUTEP_REGS[4];
uint32_t RESERVED6[160];
__IO uint32_t PCGCCTL;
uint32_t RESERVED7[127];
__IO uint32_t FIFO[4][1024];
}
USB_OTG_CORE_REGS;
#define OTG_FS_BASE (AHB2PERIPH_BASE + 0x0000)
#define OTG_FS ((USB_OTG_CORE_REGS *) OTG_FS_BASE)
#endif //__USB_OTG_REGS_H__
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

2
libraries/USBHost/USBHost/USBHostConf.h
View File

@ -49,7 +49,7 @@
#define USBHOST_MOUSE 1
/*
* Enable USBHostSerial
* Enable USBHostSerial or USBHostMultiSerial (if set > 1)
*/
#define USBHOST_SERIAL 1

25
libraries/USBHost/USBHost/dbg.h
View File

@ -18,17 +18,35 @@
#define USB_DEBUG_H
//Debug is disabled by default
#define DEBUG 0
#define DEBUG 3 /*INFO,ERR,WARN*/
#define DEBUG_TRANSFER 0
#define DEBUG_EP_STATE 0
#define DEBUG_EVENT 0
#if (DEBUG)
#if (DEBUG > 3)
#define USB_DBG(x, ...) std::printf("[USB_DBG: %s:%d]" x "\r\n", __FILE__, __LINE__, ##__VA_ARGS__);
#else
#define USB_DBG(x, ...)
#endif
#if (DEBUG > 2)
#define USB_INFO(x, ...) std::printf("[USB_INFO: %s:%d]" x "\r\n", __FILE__, __LINE__, ##__VA_ARGS__);
#else
#define USB_INFO(x, ...)
#endif
#if (DEBUG > 1)
#define USB_WARN(x, ...) std::printf("[USB_WARNING: %s:%d]" x "\r\n", __FILE__, __LINE__, ##__VA_ARGS__);
#else
#define USB_WARN(x, ...)
#endif
#if (DEBUG > 0)
#define USB_ERR(x, ...) std::printf("[USB_ERR: %s:%d]" x "\r\n", __FILE__, __LINE__, ##__VA_ARGS__);
#else
#define USB_ERR(x, ...)
#endif
#if (DEBUG_TRANSFER)
#define USB_DBG_TRANSFER(x, ...) std::printf("[USB_TRANSFER: %s:%d]" x "\r\n", __FILE__, __LINE__, ##__VA_ARGS__);
#else
@ -41,9 +59,6 @@
#define USB_DBG_EVENT(x, ...)
#endif
#define USB_INFO(x, ...) std::printf("[USB_INFO: %s:%d]" x "\r\n", __FILE__, __LINE__, ##__VA_ARGS__);
#define USB_WARN(x, ...) std::printf("[USB_WARNING: %s:%d]" x "\r\n", __FILE__, __LINE__, ##__VA_ARGS__);
#define USB_ERR(x, ...) std::printf("[USB_ERR: %s:%d]" x "\r\n", __FILE__, __LINE__, ##__VA_ARGS__);
#endif

321
libraries/USBHost/USBHostSerial/USBHostSerial.cpp
View File

@ -20,27 +20,17 @@
#include "dbg.h"
#define SET_LINE_CODING 0x20
#define CHECK_INTERFACE(cls,subcls,proto) \
(((cls == 0xFF) && (subcls == 0xFF) && (proto == 0xFF)) /* QUALCOM CDC */ || \
((cls == SERIAL_CLASS) && (subcls == 0x00) && (proto == 0x00)) /* STANDARD CDC */ )
USBHostSerial::USBHostSerial(): circ_buf() {
#if (USBHOST_SERIAL <= 1)
USBHostSerial::USBHostSerial()
{
host = USBHost::getHostInst();
size_bulk_in = 0;
size_bulk_out = 0;
init();
}
void USBHostSerial::init() {
dev = NULL;
bulk_in = NULL;
bulk_out = NULL;
ports_found = 0;
dev_connected = false;
serial_intf = -1;
serial_device_found = false;
line_coding.baudrate = 9600;
line_coding.data_bits = 8;
line_coding.parity = None;
line_coding.stop_bits = 1;
circ_buf.flush();
}
bool USBHostSerial::connected()
@ -48,49 +38,219 @@ bool USBHostSerial::connected()
return dev_connected;
}
void USBHostSerial::disconnect(void)
{
ports_found = 0;
dev = NULL;
}
bool USBHostSerial::connect() {
if (dev_connected) {
return true;
if (dev)
{
for (uint8_t i = 0; i < MAX_DEVICE_CONNECTED; i++)
{
USBDeviceConnected* d = host->getDevice(i);
if (dev == d)
return true;
}
disconnect();
}
for (uint8_t i = 0; i < MAX_DEVICE_CONNECTED; i++) {
if ((dev = host->getDevice(i)) != NULL) {
for (uint8_t i = 0; i < MAX_DEVICE_CONNECTED; i++)
{
USBDeviceConnected* d = host->getDevice(i);
if (d != NULL) {
USB_DBG("Trying to connect serial device\r\n");
if(host->enumerate(dev, this))
USB_DBG("Trying to connect serial device \r\n");
if(host->enumerate(d, this))
break;
if (serial_device_found) {
bulk_in = dev->getEndpoint(serial_intf, BULK_ENDPOINT, IN);
bulk_out = dev->getEndpoint(serial_intf, BULK_ENDPOINT, OUT);
if (!bulk_in || !bulk_out)
break;
USB_INFO("New Serial device: VID:%04x PID:%04x [dev: %p - intf: %d]", dev->getVid(), dev->getPid(), dev, serial_intf);
dev->setName("Serial", serial_intf);
host->registerDriver(dev, serial_intf, this, &USBHostSerial::init);
baud(9600);
size_bulk_in = bulk_in->getSize();
size_bulk_out = bulk_out->getSize();
bulk_in->attach(this, &USBHostSerial::rxHandler);
bulk_out->attach(this, &USBHostSerial::txHandler);
host->bulkRead(dev, bulk_in, buf, size_bulk_in, false);
dev_connected = true;
return true;
USBEndpoint* bulk_in = d->getEndpoint(port_intf, BULK_ENDPOINT, IN);
USBEndpoint* bulk_out = d->getEndpoint(port_intf, BULK_ENDPOINT, OUT);
if (bulk_in && bulk_out)
{
USBHostSerialPort::connect(host,d,port_intf,bulk_in, bulk_out);
dev = d;
}
}
}
init();
return dev != NULL;
}
/*virtual*/ void USBHostSerial::setVidPid(uint16_t vid, uint16_t pid)
{
// we don't check VID/PID for MSD driver
}
/*virtual*/ bool USBHostSerial::parseInterface(uint8_t intf_nb, uint8_t intf_class, uint8_t intf_subclass, uint8_t intf_protocol) //Must return true if the interface should be parsed
{
if (!ports_found &&
CHECK_INTERFACE(intf_class, intf_subclass, intf_protocol)) {
port_intf = intf_nb;
ports_found = true;
return true;
}
return false;
}
void USBHostSerial::rxHandler() {
/*virtual*/ bool USBHostSerial::useEndpoint(uint8_t intf_nb, ENDPOINT_TYPE type, ENDPOINT_DIRECTION dir) //Must return true if the endpoint will be used
{
if (ports_found && (intf_nb == port_intf)) {
if (type == BULK_ENDPOINT)
return true;
}
return false;
}
#else // (USBHOST_SERIAL > 1)
//------------------------------------------------------------------------------
USBHostMultiSerial::USBHostMultiSerial()
{
host = USBHost::getHostInst();
dev = NULL;
memset(ports, NULL, sizeof(ports));
ports_found = 0;
dev_connected = false;
}
USBHostMultiSerial::~USBHostMultiSerial()
{
disconnect();
}
bool USBHostMultiSerial::connected()
{
return dev_connected;
}
void USBHostMultiSerial::disconnect(void)
{
for (int port = 0; port < USBHOST_SERIAL; port ++)
{
if (ports[port])
{
delete ports[port];
ports[port] = NULL;
}
}
ports_found = 0;
dev = NULL;
}
bool USBHostMultiSerial::connect() {
if (dev)
{
for (uint8_t i = 0; i < MAX_DEVICE_CONNECTED; i++)
{
USBDeviceConnected* d = host->getDevice(i);
if (dev == d)
return true;
}
disconnect();
}
for (uint8_t i = 0; i < MAX_DEVICE_CONNECTED; i++)
{
USBDeviceConnected* d = host->getDevice(i);
if (d != NULL) {
USB_DBG("Trying to connect serial device \r\n");
if(host->enumerate(d, this))
break;
for (int port = 0; port < ports_found; port ++)
{
USBEndpoint* bulk_in = d->getEndpoint(port_intf[port], BULK_ENDPOINT, IN);
USBEndpoint* bulk_out = d->getEndpoint(port_intf[port], BULK_ENDPOINT, OUT);
if (bulk_in && bulk_out)
{
ports[port] = new USBHostSerialPort();
if (ports[port])
{
ports[port]->connect(host,d,port_intf[port],bulk_in, bulk_out);
dev = d;
}
}
}
}
}
return dev != NULL;
}
/*virtual*/ void USBHostMultiSerial::setVidPid(uint16_t vid, uint16_t pid)
{
// we don't check VID/PID for MSD driver
}
/*virtual*/ bool USBHostMultiSerial::parseInterface(uint8_t intf_nb, uint8_t intf_class, uint8_t intf_subclass, uint8_t intf_protocol) //Must return true if the interface should be parsed
{
if ((ports_found < USBHOST_SERIAL) &&
CHECK_INTERFACE(intf_class, intf_subclass, intf_protocol)) {
port_intf[ports_found++] = intf_nb;
return true;
}
return false;
}
/*virtual*/ bool USBHostMultiSerial::useEndpoint(uint8_t intf_nb, ENDPOINT_TYPE type, ENDPOINT_DIRECTION dir) //Must return true if the endpoint will be used
{
if ((ports_found > 0) && (intf_nb == port_intf[ports_found-1])) {
if (type == BULK_ENDPOINT)
return true;
}
return false;
}
#endif
//------------------------------------------------------------------------------
#define SET_LINE_CODING 0x20
USBHostSerialPort::USBHostSerialPort(): circ_buf()
{
init();
}
void USBHostSerialPort::init(void)
{
host = NULL;
dev = NULL;
serial_intf = NULL;
size_bulk_in = 0;
size_bulk_out = 0;
bulk_in = NULL;
bulk_out = NULL;
line_coding.baudrate = 9600;
line_coding.data_bits = 8;
line_coding.parity = None;
line_coding.stop_bits = 1;
circ_buf.flush();
}
void USBHostSerialPort::connect(USBHost* _host, USBDeviceConnected * _dev,
uint8_t _serial_intf, USBEndpoint* _bulk_in, USBEndpoint* _bulk_out)
{
host = _host;
dev = _dev;
serial_intf = _serial_intf;
bulk_in = _bulk_in;
bulk_out = _bulk_out;
USB_INFO("New Serial device: VID:%04x PID:%04x [dev: %p - intf: %d]", dev->getVid(), dev->getPid(), dev, serial_intf);
dev->setName("Serial", serial_intf);
host->registerDriver(dev, serial_intf, this, &USBHostSerialPort::init);
//baud(9600);
size_bulk_in = bulk_in->getSize();
size_bulk_out = bulk_out->getSize();
bulk_in->attach(this, &USBHostSerialPort::rxHandler);
bulk_out->attach(this, &USBHostSerialPort::txHandler);
host->bulkRead(dev, bulk_in, buf, size_bulk_in, false);
}
void USBHostSerialPort::rxHandler() {
if (bulk_in) {
int len = bulk_in->getLengthTransferred();
if (bulk_in->getState() == USB_TYPE_IDLE) {
@ -103,7 +263,7 @@ void USBHostSerial::rxHandler() {
}
}
void USBHostSerial::txHandler() {
void USBHostSerialPort::txHandler() {
if (bulk_out) {
if (bulk_out->getState() == USB_TYPE_IDLE) {
tx.call();
@ -111,7 +271,7 @@ void USBHostSerial::txHandler() {
}
}
int USBHostSerial::_putc(int c) {
int USBHostSerialPort::_putc(int c) {
if (bulk_out) {
if (host->bulkWrite(dev, bulk_out, (uint8_t *)&c, 1) == USB_TYPE_OK) {
return 1;
@ -120,12 +280,12 @@ int USBHostSerial::_putc(int c) {
return -1;
}
void USBHostSerial::baud(int baudrate) {
void USBHostSerialPort::baud(int baudrate) {
line_coding.baudrate = baudrate;
format(line_coding.data_bits, (Parity)line_coding.parity, line_coding.stop_bits);
}
void USBHostSerial::format(int bits, Parity parity, int stop_bits) {
void USBHostSerialPort::format(int bits, Parity parity, int stop_bits) {
line_coding.data_bits = bits;
line_coding.parity = parity;
line_coding.stop_bits = (stop_bits == 1) ? 0 : 2;
@ -137,7 +297,7 @@ void USBHostSerial::format(int bits, Parity parity, int stop_bits) {
0, serial_intf, (uint8_t *)&line_coding, 7);
}
int USBHostSerial::_getc() {
int USBHostSerialPort::_getc() {
uint8_t c = 0;
if (bulk_in == NULL) {
init();
@ -148,37 +308,36 @@ int USBHostSerial::_getc() {
return c;
}
int USBHostSerialPort::writeBuf(const char* b, int s)
{
int c = 0;
if (bulk_out)
{
while (c < s)
{
int i = (s < size_bulk_out) ? s : size_bulk_out;
if (host->bulkWrite(dev, bulk_out, (uint8_t *)(b+c), i) == USB_TYPE_OK)
c += i;
}
}
return s;
}
uint8_t USBHostSerial::available() {
int USBHostSerialPort::readBuf(char* b, int s)
{
int i = 0;
if (bulk_in)
{
for (i = 0; i < s; )
b[i++] = getc();
}
return i;
}
uint8_t USBHostSerialPort::available() {
return circ_buf.available();
}
/*virtual*/ void USBHostSerial::setVidPid(uint16_t vid, uint16_t pid)
{
// we don't check VID/PID for MSD driver
}
/*virtual*/ bool USBHostSerial::parseInterface(uint8_t intf_nb, uint8_t intf_class, uint8_t intf_subclass, uint8_t intf_protocol) //Must return true if the interface should be parsed
{
if ((serial_intf == -1) &&
(intf_class == SERIAL_CLASS) &&
(intf_subclass == 0x00) &&
(intf_protocol == 0x00)) {
serial_intf = intf_nb;
return true;
}
return false;
}
/*virtual*/ bool USBHostSerial::useEndpoint(uint8_t intf_nb, ENDPOINT_TYPE type, ENDPOINT_DIRECTION dir) //Must return true if the endpoint will be used
{
if (intf_nb == serial_intf) {
if (type == BULK_ENDPOINT) {
serial_device_found = true;
return true;
}
}
return false;
}
#endif

125
libraries/USBHost/USBHostSerial/USBHostSerial.h
View File

@ -28,12 +28,12 @@
/**
* A class to communicate a USB virtual serial port
*/
class USBHostSerial : public IUSBEnumerator, public Stream {
class USBHostSerialPort : public Stream {
public:
/**
* Constructor
*/
USBHostSerial();
USBHostSerialPort();
enum IrqType {
RxIrq,
@ -48,20 +48,9 @@ public:
Space
};
/**
* Check if a virtual serial port is connected
*
* @returns true if a serial device is connected
*/
bool connected();
/**
* Try to connect a serial device
*
* @return true if connection was successful
*/
bool connect();
void connect(USBHost* _host, USBDeviceConnected * _dev,
uint8_t _serial_intf, USBEndpoint* _bulk_in, USBEndpoint* _bulk_out);
/**
* Check the number of bytes available.
*
@ -111,34 +100,29 @@ public:
/** Set the transmission format used by the Serial port
*
* @param bits The number of bits in a word (default = 8)
* @param parity The parity used (USBHostSerial::None, USBHostSerial::Odd, USBHostSerial::Even, USBHostSerial::Mark, USBHostSerial::Space; default = USBHostSerial::None)
* @param parity The parity used (USBHostSerialPort::None, USBHostSerialPort::Odd, USBHostSerialPort::Even, USBHostSerialPort::Mark, USBHostSerialPort::Space; default = USBHostSerialPort::None)
* @param stop The number of stop bits (1 or 2; default = 1)
*/
void format(int bits = 8, Parity parity = USBHostSerial::None, int stop_bits = 1);
void format(int bits = 8, Parity parity = USBHostSerialPort::None, int stop_bits = 1);
virtual int writeBuf(const char* b, int s);
virtual int readBuf(char* b, int s);
protected:
//From IUSBEnumerator
virtual void setVidPid(uint16_t vid, uint16_t pid);
virtual bool parseInterface(uint8_t intf_nb, uint8_t intf_class, uint8_t intf_subclass, uint8_t intf_protocol); //Must return true if the interface should be parsed
virtual bool useEndpoint(uint8_t intf_nb, ENDPOINT_TYPE type, ENDPOINT_DIRECTION dir); //Must return true if the endpoint will be used
virtual int _getc();
virtual int _putc(int c);
private:
USBHost * host;
USBDeviceConnected * dev;
USBEndpoint * bulk_in;
USBEndpoint * bulk_out;
uint32_t size_bulk_in;
uint32_t size_bulk_out;
bool dev_connected;
void init();
MtxCircBuffer<uint8_t, 64> circ_buf;
MtxCircBuffer<uint8_t, 128> circ_buf;
uint8_t buf[64];
@ -156,11 +140,92 @@ private:
FunctionPointer rx;
FunctionPointer tx;
int serial_intf;
bool serial_device_found;
uint8_t serial_intf;
};
#if (USBHOST_SERIAL <= 1)
class USBHostSerial : public IUSBEnumerator, public USBHostSerialPort
{
public:
USBHostSerial();
/**
* Try to connect a serial device
*
* @return true if connection was successful
*/
bool connect();
void disconnect();
/**
* Check if a any serial port is connected
*
* @returns true if a serial device is connected
*/
bool connected();
protected:
USBHost* host;
USBDeviceConnected* dev;
uint8_t port_intf;
int ports_found;
//From IUSBEnumerator
virtual void setVidPid(uint16_t vid, uint16_t pid);
virtual bool parseInterface(uint8_t intf_nb, uint8_t intf_class, uint8_t intf_subclass, uint8_t intf_protocol); //Must return true if the interface should be parsed
virtual bool useEndpoint(uint8_t intf_nb, ENDPOINT_TYPE type, ENDPOINT_DIRECTION dir); //Must return true if the endpoint will be used
private:
bool dev_connected;
};
#else // (USBHOST_SERIAL > 1)
class USBHostMultiSerial : public IUSBEnumerator {
public:
USBHostMultiSerial();
virtual ~USBHostMultiSerial();
USBHostSerialPort* getPort(int port)
{
return port < USBHOST_SERIAL ? ports[port] : NULL;
}
/**
* Try to connect a serial device
*
* @return true if connection was successful
*/
bool connect();
void disconnect();
/**
* Check if a any serial port is connected
*
* @returns true if a serial device is connected
*/
bool connected();
protected:
USBHost* host;
USBDeviceConnected* dev;
USBHostSerialPort* ports[USBHOST_SERIAL];
uint8_t port_intf[USBHOST_SERIAL];
int ports_found;
//From IUSBEnumerator
virtual void setVidPid(uint16_t vid, uint16_t pid);
virtual bool parseInterface(uint8_t intf_nb, uint8_t intf_class, uint8_t intf_subclass, uint8_t intf_protocol); //Must return true if the interface should be parsed
virtual bool useEndpoint(uint8_t intf_nb, ENDPOINT_TYPE type, ENDPOINT_DIRECTION dir); //Must return true if the endpoint will be used
private:
bool dev_connected;
};
#endif // (USBHOST_SERIAL <= 1)
#endif
#endif

154
libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL05Z/TOOLCHAIN_GCC_ARM/MKL05Z4.ld Normal file
View File

@ -0,0 +1,154 @@
/*
* KL05Z ARM GCC linker script file, Martin Kojtal (0xc0170)
*/
MEMORY
{
VECTORS (rx) : ORIGIN = 0x00000000, LENGTH = 0x00000410
FLASH (rx) : ORIGIN = 0x00000410, LENGTH = 32K - 0x00000410
RAM (rwx) : ORIGIN = 0x1FFFFC00, LENGTH = 4K - 0xC0
}
/* Linker script to place sections and symbol values. Should be used together
* with other linker script that defines memory regions FLASH and RAM.
* It references following symbols, which must be defined in code:
* _reset_init : Entry of reset handler
*
* It defines following symbols, which code can use without definition:
* __exidx_start
* __exidx_end
* __etext
* __data_start__
* __preinit_array_start
* __preinit_array_end
* __init_array_start
* __init_array_end
* __fini_array_start
* __fini_array_end
* __data_end__
* __bss_start__
* __bss_end__
* __end__
* end
* __HeapLimit
* __StackLimit
* __StackTop
* __stack
*/
ENTRY(Reset_Handler)
SECTIONS
{
.isr_vector :
{
__vector_table = .;
KEEP(*(.vector_table))
. = ALIGN(4);
} > VECTORS
.text :
{
*(.text*)
KEEP(*(.init))
KEEP(*(.fini))
/* .ctors */
*crtbegin.o(.ctors)
*crtbegin?.o(.ctors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
*(SORT(.ctors.*))
*(.ctors)
/* .dtors */
*crtbegin.o(.dtors)
*crtbegin?.o(.dtors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
*(SORT(.dtors.*))
*(.dtors)
*(.rodata*)
KEEP(*(.eh_frame*))
} > FLASH
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > FLASH
__exidx_start = .;
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > FLASH
__exidx_end = .;
__etext = .;
.data : AT (__etext)
{
__data_start__ = .;
*(vtable)
*(.data*)
. = ALIGN(4);
/* preinit data */
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP(*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);
. = ALIGN(4);
/* init data */
PROVIDE_HIDDEN (__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
KEEP(*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(4);
/* finit data */
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP(*(SORT(.fini_array.*)))
KEEP(*(.fini_array))
PROVIDE_HIDDEN (__fini_array_end = .);
. = ALIGN(4);
/* All data end */
__data_end__ = .;
} > RAM
.bss :
{
__bss_start__ = .;
*(.bss*)
*(COMMON)
__bss_end__ = .;
} > RAM
.heap :
{
__end__ = .;
end = __end__;
*(.heap*)
__HeapLimit = .;
} > RAM
/* .stack_dummy section doesn't contains any symbols. It is only
* used for linker to calculate size of stack sections, and assign
* values to stack symbols later */
.stack_dummy :
{
*(.stack)
} > RAM
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
}

225
libraries/mbed/targets/cmsis/TARGET_Freescale/TARGET_KL05Z/TOOLCHAIN_GCC_ARM/startup_MKL05Z4.s Normal file
View File

@ -0,0 +1,225 @@
/* KL05Z startup ARM GCC, Martin Kojtal (0xc0170)
* Purpose: startup file for Cortex-M0 devices. Should use with
* GCC for ARM Embedded Processors
* Version: V1.2
* Date: 15 Nov 2011
*
* Copyright (c) 2011, ARM Limited
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
* Neither the name of the ARM Limited nor the
names of its contributors may be used to endorse or promote products
derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL ARM LIMITED BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
.syntax unified
.arch armv6-m
/* Memory Model
The HEAP starts at the end of the DATA section and grows upward.
The STACK starts at the end of the RAM and grows downward.
The HEAP and stack STACK are only checked at compile time:
(DATA_SIZE + HEAP_SIZE + STACK_SIZE) < RAM_SIZE
This is just a check for the bare minimum for the Heap+Stack area before
aborting compilation, it is not the run time limit:
Heap_Size + Stack_Size = 0x80 + 0x80 = 0x100
*/
.section .stack
.align 3
#ifdef __STACK_SIZE
.equ Stack_Size, __STACK_SIZE
#else
.equ Stack_Size, 0x80
#endif
.globl __StackTop
.globl __StackLimit
__StackLimit:
.space Stack_Size
.size __StackLimit, . - __StackLimit
__StackTop:
.size __StackTop, . - __StackTop
.section .heap
.align 3
#ifdef __HEAP_SIZE
.equ Heap_Size, __HEAP_SIZE
#else
.equ Heap_Size, 0x80
#endif
.globl __HeapBase
.globl __HeapLimit
__HeapBase:
.space Heap_Size
.size __HeapBase, . - __HeapBase
__HeapLimit:
.size __HeapLimit, . - __HeapLimit
.section .vector_table,"a",%progbits
.align 2
.globl __isr_vector
__isr_vector:
.long __StackTop /* Top of Stack */
.long Reset_Handler /* Reset Handler */
.long NMI_Handler /* NMI Handler */
.long HardFault_Handler /* Hard Fault Handler */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long SVC_Handler /* SVCall Handler */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long PendSV_Handler /* PendSV Handler */
.long SysTick_Handler /* SysTick Handler */
/* External interrupts */
.long DMA0_IRQHandler /* DMA channel 0 transfer complete interrupt */
.long DMA1_IRQHandler /* DMA channel 1 transfer complete interrupt */
.long DMA2_IRQHandler /* DMA channel 2 transfer complete interrupt */
.long DMA3_IRQHandler /* DMA channel 3 transfer complete interrupt */
.long Default_Handler /* Reserved interrupt 20 */
.long FTFA_IRQHandler /* FTFA interrupt */
.long LVD_LVW_IRQHandler /* Low Voltage Detect, Low Voltage Warning */
.long LLW_IRQHandler /* Low Leakage Wakeup */
.long I2C0_IRQHandler /* I2C0 interrupt */
.long Default_Handler /* Reserved interrupt 25 */
.long SPI0_IRQHandler /* SPI0 interrupt */
.long Default_Handler /* Reserved interrupt 27 */
.long UART0_IRQHandler /* UART0 status/error interrupt */
.long Default_Handler /* Reserved interrupt 29 */
.long Default_Handler /* Reserved interrupt 30 */
.long ADC0_IRQHandler /* ADC0 interrupt */
.long CMP0_IRQHandler /* CMP0 interrupt */
.long TPM0_IRQHandler /* TPM0 fault, overflow and channels interrupt */
.long TPM1_IRQHandler /* TPM1 fault, overflow and channels interrupt */
.long Default_Handler /* Reserved interrupt 35 */
.long RTC_IRQHandler /* RTC interrupt */
.long RTC_Seconds_IRQHandler /* RTC seconds interrupt */
.long PIT_IRQHandler /* PIT timer interrupt */
.long Default_Handler /* Reserved interrupt 39 */
.long Default_Handler /* Reserved interrupt 40 */
.long DAC0_IRQHandler /* DAC interrupt */
.long TSI0_IRQHandler /* TSI0 interrupt */
.long MCG_IRQHandler /* MCG interrupt */
.long LPTimer_IRQHandler /* LPTimer interrupt */
.long Default_Handler /* Reserved interrupt 45 */
.long PORTA_IRQHandler /* Port A interrupt */
.long PORTB_IRQHandler /* Port B interrupt */
.size __isr_vector, . - __isr_vector
.org 0x400, 0xff
.long 0xffffffff
.long 0xffffffff
.long 0xffffffff
.long 0xfffffffe
.section .text.Reset_Handler
.thumb
.thumb_func
.align 2
.globl Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
/* Loop to copy data from read only memory to RAM. The ranges
* of copy from/to are specified by following symbols evaluated in
* linker script.
* __etext: End of code section, i.e., begin of data sections to copy from.
* __data_start__/__data_end__: RAM address range that data should be
* copied to. Both must be aligned to 4 bytes boundary. */
ldr r1, =__etext
ldr r2, =__data_start__
ldr r3, =__data_end__
subs r3, r2
ble .flash_to_ram_loop_end
movs r4, 0
.flash_to_ram_loop:
ldr r0, [r1,r4]
str r0, [r2,r4]
adds r4, 4
cmp r4, r3
blt .flash_to_ram_loop
.flash_to_ram_loop_end:
ldr r0, =SystemInit
blx r0
ldr r0, =_start
bx r0
.pool
.size Reset_Handler, . - Reset_Handler
.text
/* Macro to define default handlers. Default handler
* will be weak symbol and just dead loops. They can be
* overwritten by other handlers */
.macro def_default_handler handler_name
.align 1
.thumb_func
.weak \handler_name
.type \handler_name, %function
\handler_name :
b .
.size \handler_name, . - \handler_name
.endm
def_default_handler NMI_Handler
def_default_handler HardFault_Handler
def_default_handler SVC_Handler
def_default_handler PendSV_Handler
def_default_handler SysTick_Handler
def_default_handler Default_Handler
def_default_handler DMA0_IRQHandler
def_default_handler DMA1_IRQHandler
def_default_handler DMA2_IRQHandler
def_default_handler DMA3_IRQHandler
def_default_handler FTFA_IRQHandler
def_default_handler LVD_LVW_IRQHandler
def_default_handler LLW_IRQHandler
def_default_handler I2C0_IRQHandler
def_default_handler SPI0_IRQHandler
def_default_handler UART0_IRQHandler
def_default_handler ADC0_IRQHandler
def_default_handler CMP0_IRQHandler
def_default_handler TPM0_IRQHandler
def_default_handler TPM1_IRQHandler
def_default_handler RTC_IRQHandler
def_default_handler RTC_Seconds_IRQHandler
def_default_handler PIT_IRQHandler
def_default_handler DAC0_IRQHandler
def_default_handler TSI0_IRQHandler
def_default_handler MCG_IRQHandler
def_default_handler LPTimer_IRQHandler
def_default_handler PORTA_IRQHandler
def_default_handler PORTB_IRQHandler
.weak DEF_IRQHandler
.set DEF_IRQHandler, Default_Handler
.end

7
libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_ARM_STD/TARGET_LPC4088_EA/LPC407X_8X.sct → libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_ARM_STD/LPC407X_8X.sct
View File

@ -6,7 +6,9 @@ LR_IROM1 0x00000000 0x00080000 { ; load region size_region
ER_IROM1 0x00000000 0x00080000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
*.o (+RO-CODE) ; forces all CODE to IFLASH
.ANY2 (+RO-DATA) ; prioritizes DATA in IFLASH before SPIFI
.ANY (+RO) ; remaining RO
}
RW_IRAM1 0x100000E8 0x0000FF18 { ; RW data
.ANY (+RW +ZI)
@ -21,7 +23,8 @@ LR_IROM1 0x00000000 0x00080000 { ; load region size_region
LR_IROM2 0x28000000 0x01000000 {
ER_IROM2 0x28000000 0x01000000 { ; load address = execution address
.ANY (+RO)
.ANY1 (+RO-DATA) ; all DATA not fitting in IFLASH
.ANY (SPIFI_MEM) ; DATA tagged as SPIFI_MEM
}
}

18
libraries/mbed/targets/cmsis/TARGET_NXP/TARGET_LPC408X/TOOLCHAIN_ARM_STD/TARGET_LPC4088/LPC407X_8X.sct
View File

@ -1,18 +0,0 @@
; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************
LR_IROM1 0x00000000 0x00080000 { ; load region size_region
ER_IROM1 0x00000000 0x00080000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
RW_IRAM1 0x100000E8 0x0000FF18 { ; RW data
.ANY (+RW +ZI)
}
RW_IRAM2 0x20000000 0x00008000 {
.ANY (AHBSRAM1)
}
}

54
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_MICRO/startup_stm32f10x_md.s
View File

@ -1,19 +1,7 @@
;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
;*******************************************************************************
;* File Name : startup_stm32f10x_md.s
;* Author : MCD Application Team
;* Version : V3.5.0
;* Date : 11-March-2011
;* Description : STM32F10x Medium Density Devices vector table for MDK-ARM
;* toolchain.
;* This module performs:
;* - Set the initial SP
;* - Set the initial PC == Reset_Handler
;* - Set the vector table entries with the exceptions ISR address
;* - Configure the clock system
;* - Branches to __main in the C library (which eventually
;* calls main()).
;* After Reset the CortexM3 processor is in Thread mode,
;* priority is Privileged, and the Stack is set to Main.
;* toolchain + ARM_MICRO compiler
;* <<< Use Configuration Wizard in Context Menu >>>
;*******************************************************************************
; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
@ -33,6 +21,8 @@
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN=3
EXPORT __initial_sp
Stack_Mem SPACE Stack_Size
__initial_sp EQU 0x20005000 ; Top of RAM
@ -41,9 +31,12 @@ __initial_sp EQU 0x20005000 ; Top of RAM
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00000200
Heap_Size EQU 0x00000000
AREA HEAP, NOINIT, READWRITE, ALIGN=3
EXPORT __heap_base
EXPORT __heap_limit
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
@ -275,33 +268,4 @@ USBWakeUp_IRQHandler
ENDP
ALIGN
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END
;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****
END

69
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/TOOLCHAIN_ARM_STD/startup_stm32f10x_md.s
View File

@ -1,19 +1,7 @@
;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
;*******************************************************************************
;* File Name : startup_stm32f10x_md.s
;* Author : MCD Application Team
;* Version : V3.5.0
;* Date : 11-March-2011
;* Description : STM32F10x Medium Density Devices vector table for MDK-ARM
;* toolchain.
;* This module performs:
;* - Set the initial SP
;* - Set the initial PC == Reset_Handler
;* - Set the vector table entries with the exceptions ISR address
;* - Configure the clock system
;* - Branches to __main in the C library (which eventually
;* calls main()).
;* After Reset the CortexM3 processor is in Thread mode,
;* priority is Privileged, and the Stack is set to Main.
;* toolchain + ARM_STD compiler
;* <<< Use Configuration Wizard in Context Menu >>>
;*******************************************************************************
; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
@ -24,30 +12,8 @@
; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
;*******************************************************************************
; Amount of memory (in bytes) allocated for Stack
; Tailor this value to your application needs
; <h> Stack Configuration
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Stack_Size EQU 0x00000400
AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size
__initial_sp EQU 0x20005000 ; Top of RAM
; <h> Heap Configuration
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
; </h>
Heap_Size EQU 0x00000200
AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit
PRESERVE8
THUMB
@ -275,33 +241,4 @@ USBWakeUp_IRQHandler
ENDP
ALIGN
;*******************************************************************************
; User Stack and Heap initialization
;*******************************************************************************
IF :DEF:__MICROLIB
EXPORT __initial_sp
EXPORT __heap_base
EXPORT __heap_limit
ELSE
IMPORT __use_two_region_memory
EXPORT __user_initial_stackheap
__user_initial_stackheap
LDR R0, = Heap_Mem
LDR R1, =(Stack_Mem + Stack_Size)
LDR R2, = (Heap_Mem + Heap_Size)
LDR R3, = Stack_Mem
BX LR
ALIGN
ENDIF
END
;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****
END

4
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F103RB/system_stm32f10x.c
View File

@ -105,14 +105,14 @@
#if defined (STM32F10X_LD_VL) || (defined STM32F10X_MD_VL) || (defined STM32F10X_HD_VL)
/* #define SYSCLK_FREQ_HSE HSE_VALUE */
#define SYSCLK_FREQ_24MHz 24000000
/* #define SYSCLK_FREQ_24MHz 24000000 */
#else
/* #define SYSCLK_FREQ_HSE HSE_VALUE */
/* #define SYSCLK_FREQ_24MHz 24000000 */
/* #define SYSCLK_FREQ_36MHz 36000000 */
/* #define SYSCLK_FREQ_48MHz 48000000 */
/* #define SYSCLK_FREQ_56MHz 56000000 */
#define SYSCLK_FREQ_72MHz 72000000
/* #define SYSCLK_FREQ_72MHz 72000000 */
#endif
/*!< Uncomment the following line if you need to use external SRAM mounted

2
libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL05Z/us_ticker.c
View File

@ -114,7 +114,7 @@ static void lptmr_isr(void) {
}
}
void us_ticker_set_interrupt(uint32_t timestamp) {
void us_ticker_set_interrupt(unsigned int timestamp) {
int32_t delta = (int32_t)(timestamp - us_ticker_read());
if (delta <= 0) {
// This event was in the past:

5
libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KL46Z/PinNames.h
View File

@ -231,10 +231,11 @@ typedef enum {
NC = (int)0xFFFFFFFF
} PinName;
/* PullDown not available for KL46 */
/* Pull modes for input pins */
typedef enum {
PullNone = 0,
PullUp = 2,
PullDown = 2,
PullUp = 3
} PinMode;
#ifdef __cplusplus

0
libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11UXX/PeripheralNames.h → libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11UXX/TARGET_LPC11U24_301/PeripheralNames.h
View File

0
libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11UXX/PinNames.h → libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11UXX/TARGET_LPC11U24_301/PinNames.h
View File

87
libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11UXX/TARGET_LPC11U24_401/PeripheralNames.h Normal file
View File

@ -0,0 +1,87 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PERIPHERALNAMES_H
#define MBED_PERIPHERALNAMES_H
#include "cmsis.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
UART_0 = (int)LPC_USART_BASE
} UARTName;
typedef enum {
I2C_0 = (int)LPC_I2C_BASE
} I2CName;
typedef enum {
ADC0_0 = 0,
ADC0_1,
ADC0_2,
ADC0_3,
ADC0_4,
ADC0_5,
ADC0_6,
ADC0_7
} ADCName;
typedef enum {
SPI_0 = (int)LPC_SSP0_BASE,
SPI_1 = (int)LPC_SSP1_BASE
} SPIName;
typedef enum {
PWM_1 = 0,
PWM_2,
PWM_3,
PWM_4,
PWM_5,
PWM_6,
PWM_7,
PWM_8,
PWM_9,
PWM_10,
PWM_11
} PWMName;
#define STDIO_UART_TX USBTX
#define STDIO_UART_RX USBRX
#define STDIO_UART UART_0
// Default peripherals
#define MBED_SPI0 p5, p6, p7, p8
#define MBED_SPI1 p11, p12, p13, p14
#define MBED_UART0 p9, p10
#define MBED_UARTUSB USBTX, USBRX
#define MBED_I2C0 p28, p27
#define MBED_ANALOGIN0 p15
#define MBED_ANALOGIN1 p16
#define MBED_ANALOGIN2 p17
#define MBED_ANALOGIN3 p18
#define MBED_ANALOGIN4 p19
#define MBED_ANALOGIN5 p20
#ifdef __cplusplus
}
#endif
#endif

165
libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11UXX/TARGET_LPC11U24_401/PinNames.h Normal file
View File

@ -0,0 +1,165 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PINNAMES_H
#define MBED_PINNAMES_H
#include "cmsis.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
PIN_INPUT,
PIN_OUTPUT
} PinDirection;
#define PORT_SHIFT 5
typedef enum {
// LPC11U Pin Names
P0_0 = 0,
P0_1 = 1,
P0_2 = 2,
P0_3 = 3,
P0_4 = 4,
P0_5 = 5,
P0_6 = 6,
P0_7 = 7,
P0_8 = 8,
P0_9 = 9,
P0_10 = 10,
P0_11 = 11,
P0_12 = 12,
P0_13 = 13,
P0_14 = 14,
P0_15 = 15,
P0_16 = 16,
P0_17 = 17,
P0_18 = 18,
P0_19 = 19,
P0_20 = 20,
P0_21 = 21,
P0_22 = 22,
P0_23 = 23,
P0_24 = 24,
P0_25 = 25,
P0_26 = 26,
P0_27 = 27,
P1_0 = 32,
P1_1 = 33,
P1_2 = 34,
P1_3 = 35,
P1_4 = 36,
P1_5 = 37,
P1_6 = 38,
P1_7 = 39,
P1_8 = 40,
P1_9 = 41,
P1_10 = 42,
P1_11 = 43,
P1_12 = 44,
P1_13 = 45,
P1_14 = 46,
P1_15 = 47,
P1_16 = 48,
P1_17 = 49,
P1_18 = 50,
P1_19 = 51,
P1_20 = 52,
P1_21 = 53,
P1_22 = 54,
P1_23 = 55,
P1_24 = 56,
P1_25 = 57,
P1_26 = 58,
P1_27 = 59,
P1_28 = 60,
P1_29 = 61,
P1_31 = 63,
// mbed DIP Pin Names
p5 = P0_9,
p6 = P0_8,
p7 = P1_29,
p8 = P0_2,
p9 = P1_27,
p10 = P1_26,
p11 = P1_22,
p12 = P1_21,
p13 = P1_20,
p14 = P1_23,
p15 = P0_11,
p16 = P0_12,
p17 = P0_13,
p18 = P0_14,
p19 = P0_16,
p20 = P0_22,
p21 = P0_7,
p22 = P0_17,
p23 = P1_17,
p24 = P1_18,
p25 = P1_24,
p26 = P1_25,
p27 = P0_4,
p28 = P0_5,
p29 = P1_5,
p30 = P1_2,
p33 = P0_3,
p34 = P1_15,
p35 = P0_20,
p36 = P0_21,
// Other mbed Pin Names
LED1 = P1_8,
LED2 = P1_9,
LED3 = P1_10,
LED4 = P1_11,
USBTX = P0_19,
USBRX = P0_18,
// Not connected
NC = (int)0xFFFFFFFF,
} PinName;
typedef enum {
CHANNEL0 = FLEX_INT0_IRQn,
CHANNEL1 = FLEX_INT1_IRQn,
CHANNEL2 = FLEX_INT2_IRQn,
CHANNEL3 = FLEX_INT3_IRQn,
CHANNEL4 = FLEX_INT4_IRQn,
CHANNEL5 = FLEX_INT5_IRQn,
CHANNEL6 = FLEX_INT6_IRQn,
CHANNEL7 = FLEX_INT7_IRQn
} Channel;
typedef enum {
PullUp = 2,
PullDown = 1,
PullNone = 0,
Repeater = 3,
OpenDrain = 4
} PinMode;
#ifdef __cplusplus
}
#endif
#endif

71
libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11UXX/TARGET_LPC11U35_401/PeripheralNames.h Normal file
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@ -0,0 +1,71 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PERIPHERALNAMES_H
#define MBED_PERIPHERALNAMES_H
#include "cmsis.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
UART_0 = (int)LPC_USART_BASE
} UARTName;
typedef enum {
I2C_0 = (int)LPC_I2C_BASE
} I2CName;
typedef enum {
ADC0_0 = 0,
ADC0_1,
ADC0_2,
ADC0_3,
ADC0_4,
ADC0_5,
ADC0_6,
ADC0_7
} ADCName;
typedef enum {
SPI_0 = (int)LPC_SSP0_BASE,
SPI_1 = (int)LPC_SSP1_BASE
} SPIName;
typedef enum {
PWM_1 = 0,
PWM_2,
PWM_3,
PWM_4,
PWM_5,
PWM_6,
PWM_7,
PWM_8,
PWM_9,
PWM_10,
PWM_11
} PWMName;
#define STDIO_UART_TX UART_TX
#define STDIO_UART_RX UART_RX
#define STDIO_UART UART_0
#ifdef __cplusplus
}
#endif
#endif

160
libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11UXX/TARGET_LPC11U35_401/PinNames.h Normal file
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@ -0,0 +1,160 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MBED_PINNAMES_H
#define MBED_PINNAMES_H
#include "cmsis.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
PIN_INPUT,
PIN_OUTPUT
} PinDirection;
#define PORT_SHIFT 5
typedef enum {
// LPC11U Pin Names
P0_0 = 0,
P0_1 = 1,
P0_2 = 2,
P0_3 = 3,
P0_4 = 4,
P0_5 = 5,
P0_6 = 6,
P0_7 = 7,
P0_8 = 8,
P0_9 = 9,
P0_10 = 10,
P0_11 = 11,
P0_12 = 12,
P0_13 = 13,
P0_14 = 14,
P0_15 = 15,
P0_16 = 16,
P0_17 = 17,
P0_18 = 18,
P0_19 = 19,
P0_20 = 20,
P0_21 = 21,
P0_22 = 22,
P0_23 = 23,
P0_24 = 24,
P0_25 = 25,
P0_26 = 26,
P0_27 = 27,
P1_0 = 32,
P1_1 = 33,
P1_2 = 34,
P1_3 = 35,
P1_4 = 36,
P1_5 = 37,
P1_6 = 38,
P1_7 = 39,
P1_8 = 40,
P1_9 = 41,
P1_10 = 42,
P1_11 = 43,
P1_12 = 44,
P1_13 = 45,
P1_14 = 46,
P1_15 = 47,
P1_16 = 48,
P1_17 = 49,
P1_18 = 50,
P1_19 = 51,
P1_20 = 52,
P1_21 = 53,
P1_22 = 54,
P1_23 = 55,
P1_24 = 56,
P1_25 = 57,
P1_26 = 58,
P1_27 = 59,
P1_28 = 60,
P1_29 = 61,
P1_31 = 63,
// mbed DIP Pin Names
p3 = P0_7,
p4 = P0_8,
p5 = P0_9,
p6 = P0_10,
p7 = P0_22,
p8 = P0_11,
p9 = P0_12,
p10 = P0_13,
p11 = P0_14,
p12 = P0_15,
p13 = P0_16,
p14 = P0_23,
p15 = P1_15,
p16 = P0_17,
p17 = P0_18,
p18 = P0_19,
p19 = P0_1,
p20 = P1_19,
p21 = P0_0,
p22 = P0_20,
p23 = P0_2,
p24 = P0_3,
p25 = P0_4,
p26 = P0_5,
p27 = P0_21,
p28 = P0_6,
// Other mbed Pin Names
LED1 = P0_7,
LED2 = P0_7,
LED3 = P0_7,
LED4 = P0_7,
UART_TX = P0_19,
UART_RX = P0_18,
// Not connected
NC = (int)0xFFFFFFFF,
} PinName;
typedef enum {
CHANNEL0 = FLEX_INT0_IRQn,
CHANNEL1 = FLEX_INT1_IRQn,
CHANNEL2 = FLEX_INT2_IRQn,
CHANNEL3 = FLEX_INT3_IRQn,
CHANNEL4 = FLEX_INT4_IRQn,
CHANNEL5 = FLEX_INT5_IRQn,
CHANNEL6 = FLEX_INT6_IRQn,
CHANNEL7 = FLEX_INT7_IRQn
} Channel;
typedef enum {
PullUp = 2,
PullDown = 1,
PullNone = 0,
Repeater = 3,
OpenDrain = 4
} PinMode;
#ifdef __cplusplus
}
#endif
#endif

4
libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC11UXX/serial_api.c
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@ -63,9 +63,11 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) {
// [TODO] Consider more elegant approach
// disconnect USBTX/RX mapping mux, for case when switching ports
#ifdef USBTX
pin_function(USBTX, 0);
pin_function(USBRX, 0);
#endif
// enable fifos and default rx trigger level
obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled
| 0 << 1 // Rx Fifo Reset

4
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/PeripheralNames.h
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@ -32,8 +32,8 @@ typedef enum {
UART_2 = (int)USART2_BASE
} UARTName;
#define STDIO_UART_TX UART_TX
#define STDIO_UART_RX UART_RX
#define STDIO_UART_TX PA_2
#define STDIO_UART_RX PA_3
#define STDIO_UART UART_2
typedef enum {

59
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/PinNames.h
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@ -88,45 +88,10 @@ typedef enum {
PC_14 = 0x2E,
PC_15 = 0x2F,
PD_0 = 0x30,
PD_1 = 0x31,
PD_2 = 0x32,
PD_3 = 0x33,
PD_4 = 0x34,
PD_5 = 0x35,
PD_6 = 0x36,
PD_7 = 0x37,
PD_8 = 0x38,
PD_9 = 0x39,
PD_10 = 0x3A,
PD_11 = 0x3B,
PD_12 = 0x3C,
PD_13 = 0x3D,
PD_14 = 0x3E,
PD_15 = 0x3F,
PE_0 = 0x40,
PE_1 = 0x41,
PE_2 = 0x42,
PE_3 = 0x43,
PE_4 = 0x44,
PE_5 = 0x45,
PE_6 = 0x46,
PE_7 = 0x47,
PE_8 = 0x48,
PE_9 = 0x49,
PE_10 = 0x4A,
PE_11 = 0x4B,
PE_12 = 0x4C,
PE_13 = 0x4D,
PE_14 = 0x4E,
PE_15 = 0x4F,
//--------------------
// NUCLEO_F103RB board
//--------------------
// Arduino connectors
// Arduino connector namings
A0 = PA_0,
A1 = PA_1,
A2 = PA_4,
@ -150,15 +115,21 @@ typedef enum {
D14 = PB_9,
D15 = PB_8,
// Generic signals namings
LED1 = PA_5,
LED2 = PA_5,
LED3 = PA_5,
LED4 = PA_5,
USER_BUTTON = PC_13,
UART_TX = PA_2,
UART_RX = PA_3,
// mbed mandatory namings
LED1 = PA_5,
LED2 = PA_5,
LED3 = PA_5,
LED4 = PA_5,
SERIAL_TX = PA_2,
SERIAL_RX = PA_3,
I2C_SCL = PB_8,
I2C_SDA = PB_9,
SPI_MOSI = PA_7,
SPI_MISO = PA_6,
SPI_SCK = PA_5,
SPI_CS = PB_6,
PWM_OUT = PB_3,
// Not connected
NC = (int)0xFFFFFFFF

3
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/analogin_api.c
View File

@ -13,9 +13,6 @@
* See the License for the specific language governing permissions and
* limitations under the License.
*/
//==============================================================================
// STM32F103
//==============================================================================
#include "analogin_api.h"
#include "wait_api.h"

10
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/device.h
View File

@ -20,31 +20,31 @@
#define DEVICE_PORTOUT 1
#define DEVICE_PORTINOUT 1
#define DEVICE_INTERRUPTIN 0
#define DEVICE_INTERRUPTIN 1
#define DEVICE_ANALOGIN 1
#define DEVICE_ANALOGOUT 0
#define DEVICE_SERIAL 1
#define DEVICE_I2C 0
#define DEVICE_I2C 1
#define DEVICE_I2CSLAVE 0
#define DEVICE_SPI 1
#define DEVICE_SPISLAVE 0
#define DEVICE_RTC 0
#define DEVICE_RTC 1
#define DEVICE_PWMOUT 1
#define DEVICE_SLEEP 1
//=======================================
#define DEVICE_SEMIHOST 0
#define DEVICE_LOCALFILESYSTEM 0
#define DEVICE_ID_LENGTH 24
#define DEVICE_SLEEP 0
#define DEVICE_DEBUG_AWARENESS 0
#define DEVICE_STDIO_MESSAGES 1

242
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/gpio_irq_api.c Normal file
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@ -0,0 +1,242 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include <stddef.h>
#include "cmsis.h"
#include "gpio_irq_api.h"
#include "error.h"
#define EDGE_NONE (0)
#define EDGE_RISE (1)
#define EDGE_FALL (2)
#define EDGE_BOTH (3)
#define CHANNEL_NUM (16)
static uint32_t channel_ids[CHANNEL_NUM] = {0};
static gpio_irq_handler irq_handler;
static void handle_interrupt_in(uint32_t channel) {
if (channel_ids[channel] == 0) return;
uint32_t exti_line = (uint32_t)(1 << channel);
if (EXTI_GetITStatus(exti_line) != RESET)
{
EXTI_ClearITPendingBit(exti_line);
}
// Warning:
// On this device we don't know if a rising or falling event occured.
// In case both rise and fall events are set, only the FALL event will be reported.
if (EXTI->FTSR & (uint32_t)(1 << channel)) {
irq_handler(channel_ids[channel], IRQ_FALL);
}
else {
irq_handler(channel_ids[channel], IRQ_RISE);
}
}
static void gpio_irq0(void) {handle_interrupt_in(0);}
static void gpio_irq1(void) {handle_interrupt_in(1);}
static void gpio_irq2(void) {handle_interrupt_in(2);}
static void gpio_irq3(void) {handle_interrupt_in(3);}
static void gpio_irq4(void) {handle_interrupt_in(4);}
static void gpio_irq5(void) {handle_interrupt_in(5);}
static void gpio_irq6(void) {handle_interrupt_in(6);}
static void gpio_irq7(void) {handle_interrupt_in(7);}
static void gpio_irq8(void) {handle_interrupt_in(8);}
static void gpio_irq9(void) {handle_interrupt_in(9);}
static void gpio_irq10(void) {handle_interrupt_in(10);}
static void gpio_irq11(void) {handle_interrupt_in(11);}
static void gpio_irq12(void) {handle_interrupt_in(12);}
static void gpio_irq13(void) {handle_interrupt_in(13);}
static void gpio_irq14(void) {handle_interrupt_in(14);}
static void gpio_irq15(void) {handle_interrupt_in(15);}
int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) {
IRQn_Type irq_n = (IRQn_Type)0;
uint32_t vector = 0;
if (pin == NC) return -1;
uint32_t pin_number = (uint32_t)pin;
uint32_t pin_index = (pin_number & 0xF);
uint32_t port_index = (pin_number >> 4);
// Select irq number and vector
switch (pin_index) {
case 0:
irq_n = EXTI0_IRQn;
vector = (uint32_t)&gpio_irq0;
break;
case 1:
irq_n = EXTI1_IRQn;
vector = (uint32_t)&gpio_irq1;
break;
case 2:
irq_n = EXTI2_IRQn;
vector = (uint32_t)&gpio_irq2;
break;
case 3:
irq_n = EXTI3_IRQn;
vector = (uint32_t)&gpio_irq3;
break;
case 4:
irq_n = EXTI4_IRQn;
vector = (uint32_t)&gpio_irq4;
break;
case 5:
irq_n = EXTI9_5_IRQn;
vector = (uint32_t)&gpio_irq5;
break;
case 6:
irq_n = EXTI9_5_IRQn;
vector = (uint32_t)&gpio_irq6;
break;
case 7:
irq_n = EXTI9_5_IRQn;
vector = (uint32_t)&gpio_irq7;
break;
case 8:
irq_n = EXTI9_5_IRQn;
vector = (uint32_t)&gpio_irq8;
break;
case 9:
irq_n = EXTI9_5_IRQn;
vector = (uint32_t)&gpio_irq9;
break;
case 10:
irq_n = EXTI15_10_IRQn;
vector = (uint32_t)&gpio_irq10;
break;
case 11:
irq_n = EXTI15_10_IRQn;
vector = (uint32_t)&gpio_irq11;
break;
case 12:
irq_n = EXTI15_10_IRQn;
vector = (uint32_t)&gpio_irq12;
break;
case 13:
irq_n = EXTI15_10_IRQn;
vector = (uint32_t)&gpio_irq13;
break;
case 14:
irq_n = EXTI15_10_IRQn;
vector = (uint32_t)&gpio_irq14;
break;
case 15:
irq_n = EXTI15_10_IRQn;
vector = (uint32_t)&gpio_irq15;
break;
default:
return -1;
}
// Enable GPIO and AFIO clocks
RCC_APB2PeriphClockCmd((uint32_t)(RCC_APB2Periph_GPIOA << port_index), ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
// Connect EXTI line to pin
GPIO_EXTILineConfig(port_index, pin_index);
// Configure EXTI line
EXTI_InitTypeDef EXTI_InitStructure;
EXTI_InitStructure.EXTI_Line = (uint32_t)(1 << pin_index);
EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling;
EXTI_InitStructure.EXTI_LineCmd = ENABLE;
EXTI_Init(&EXTI_InitStructure);
// Enable and set EXTI interrupt to the lowest priority
NVIC_InitTypeDef NVIC_InitStructure;
NVIC_InitStructure.NVIC_IRQChannel = irq_n;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0x0F;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x0F;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
NVIC_SetVector(irq_n, vector);
NVIC_EnableIRQ(irq_n);
// Save for future use
obj->ch = pin_index;
obj->irq_n = irq_n;
obj->event = EDGE_NONE;
channel_ids[obj->ch] = id;
irq_handler = handler;
return 0;
}
void gpio_irq_free(gpio_irq_t *obj) {
channel_ids[obj->ch] = 0;
// Disable EXTI line
EXTI_InitTypeDef EXTI_InitStructure;
EXTI_StructInit(&EXTI_InitStructure);
EXTI_Init(&EXTI_InitStructure);
obj->event = EDGE_NONE;
}
void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) {
EXTI_InitTypeDef EXTI_InitStructure;
EXTI_InitStructure.EXTI_Line = (uint32_t)(1 << obj->ch);
EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
if (event == IRQ_RISE) {
if ((obj->event == EDGE_FALL) || (obj->event == EDGE_BOTH)) {
EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising_Falling;
obj->event = EDGE_BOTH;
}
else { // NONE or RISE
EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising;
obj->event = EDGE_RISE;
}
}
if (event == IRQ_FALL) {
if ((obj->event == EDGE_RISE) || (obj->event == EDGE_BOTH)) {
EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising_Falling;
obj->event = EDGE_BOTH;
}
else { // NONE or FALL
EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling;
obj->event = EDGE_FALL;
}
}
if (enable) {
EXTI_InitStructure.EXTI_LineCmd = ENABLE;
}
else {
EXTI_InitStructure.EXTI_LineCmd = DISABLE;
}
EXTI_Init(&EXTI_InitStructure);
}
void gpio_irq_enable(gpio_irq_t *obj) {
NVIC_EnableIRQ(obj->irq_n);
}
void gpio_irq_disable(gpio_irq_t *obj) {
NVIC_DisableIRQ(obj->irq_n);
obj->event = EDGE_NONE;
}

323
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/i2c_api.c Normal file
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@ -0,0 +1,323 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "i2c_api.h"
#if DEVICE_I2C
#include "cmsis.h"
#include "pinmap.h"
#include "error.h"
/* Timeout values for flags and events waiting loops. These timeouts are
not based on accurate values, they just guarantee that the application will
not remain stuck if the I2C communication is corrupted. */
#define FLAG_TIMEOUT ((int)0x1000)
#define LONG_TIMEOUT ((int)0x8000)
static const PinMap PinMap_I2C_SDA[] = {
{PB_9, I2C_1, STM_PIN_DATA(GPIO_Mode_AF_OD, 8)}, // GPIO_Remap_I2C1
{NC, NC, 0}
};
static const PinMap PinMap_I2C_SCL[] = {
{PB_8, I2C_1, STM_PIN_DATA(GPIO_Mode_AF_OD, 8)}, // GPIO_Remap_I2C1
{NC, NC, 0}
};
void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
// Determine the I2C to use
I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
obj->i2c = (I2CName)pinmap_merge(i2c_sda, i2c_scl);
if (obj->i2c == (I2CName)NC) {
error("I2C pin mapping failed");
}
// Enable I2C clock
if (obj->i2c == I2C_1) {
RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2C1, ENABLE);
}
if (obj->i2c == I2C_2) {
RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2C2, ENABLE);
}
// Configure I2C pins
pinmap_pinout(sda, PinMap_I2C_SDA);
pinmap_pinout(scl, PinMap_I2C_SCL);
pin_mode(sda, OpenDrain);
pin_mode(scl, OpenDrain);
// Reset to clear pending flags if any
i2c_reset(obj);
// I2C configuration
i2c_frequency(obj, 100000); // 100 kHz per default
}
void i2c_frequency(i2c_t *obj, int hz) {
I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
I2C_InitTypeDef I2C_InitStructure;
if ((hz != 0) && (hz <= 400000)) {
// I2C configuration
I2C_InitStructure.I2C_Mode = I2C_Mode_I2C;
I2C_InitStructure.I2C_DutyCycle = I2C_DutyCycle_2;
I2C_InitStructure.I2C_OwnAddress1 = 0;
I2C_InitStructure.I2C_Ack = I2C_Ack_Enable;
I2C_InitStructure.I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit;
I2C_InitStructure.I2C_ClockSpeed = hz;
I2C_Cmd(i2c, ENABLE);
I2C_Init(i2c, &I2C_InitStructure);
}
}
inline int i2c_start(i2c_t *obj) {
I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
int timeout;
I2C_ClearFlag(i2c, I2C_FLAG_AF); // Clear Acknowledge failure flag
// Generate the START condition
I2C_GenerateSTART(i2c, ENABLE);
// Wait the START condition has been correctly sent
timeout = FLAG_TIMEOUT;
//while (I2C_CheckEvent(i2c, I2C_EVENT_MASTER_MODE_SELECT) == ERROR) {
while (I2C_GetFlagStatus(i2c, I2C_FLAG_SB) == RESET) {
if ((timeout--) == 0) {
return 1;
}
}
return 0;
}
inline int i2c_stop(i2c_t *obj) {
I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
I2C_GenerateSTOP(i2c, ENABLE);
return 0;
}
int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
int timeout;
int count;
int value;
if (length == 0) return 0;
/*
// Wait until the bus is not busy anymore
timeout = LONG_TIMEOUT;
while (I2C_GetFlagStatus(i2c, I2C_FLAG_BUSY) == SET) {
if ((timeout--) == 0) {
return 0;
}
}
*/
i2c_start(obj);
// Send slave address for read
I2C_Send7bitAddress(i2c, address, I2C_Direction_Receiver);
// Wait address is acknowledged
timeout = FLAG_TIMEOUT;
while (I2C_CheckEvent(i2c, I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED) == ERROR) {
if ((timeout--) == 0) {
return 0;
}
}
// Read all bytes except last one
for (count = 0; count < (length - 1); count++) {
value = i2c_byte_read(obj, 0);
data[count] = (char)value;
}
// If not repeated start, send stop.
// Warning: must be done BEFORE the data is read.
if (stop) {
i2c_stop(obj);
}
// Read the last byte
value = i2c_byte_read(obj, 1);
data[count] = (char)value;
return length;
}
int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
int timeout;
int count;
/*
// Wait until the bus is not busy anymore
timeout = LONG_TIMEOUT;
while (I2C_GetFlagStatus(i2c, I2C_FLAG_BUSY) == SET) {
if ((timeout--) == 0) {
return 0;
}
}
*/
i2c_start(obj);
// Send slave address for write
I2C_Send7bitAddress(i2c, address, I2C_Direction_Transmitter);
// Wait address is acknowledged
timeout = FLAG_TIMEOUT;
while (I2C_CheckEvent(i2c, I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED) == ERROR) {
if ((timeout--) == 0) {
return 0;
}
}
for (count = 0; count < length; count++) {
if (i2c_byte_write(obj, data[count]) != 1) {
i2c_stop(obj);
return 0;
}
}
// If not repeated start, send stop.
if (stop) {
i2c_stop(obj);
}
return count;
}
int i2c_byte_read(i2c_t *obj, int last) {
I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
uint8_t data;
int timeout;
if (last) {
// Don't acknowledge the last byte
I2C_AcknowledgeConfig(i2c, DISABLE);
} else {
// Acknowledge the byte
I2C_AcknowledgeConfig(i2c, ENABLE);
}
// Wait until the byte is received
timeout = FLAG_TIMEOUT;
while (I2C_GetFlagStatus(i2c, I2C_FLAG_RXNE) == RESET) {
if ((timeout--) == 0) {
return 0;
}
}
data = I2C_ReceiveData(i2c);
return (int)data;
}
int i2c_byte_write(i2c_t *obj, int data) {
I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
int timeout;
I2C_SendData(i2c, (uint8_t)data);
// Wait until the byte is transmitted
timeout = FLAG_TIMEOUT;
//while (I2C_CheckEvent(i2c, I2C_EVENT_MASTER_BYTE_TRANSMITTED) == ERROR) {
while ((I2C_GetFlagStatus(i2c, I2C_FLAG_TXE) == RESET) &&
(I2C_GetFlagStatus(i2c, I2C_FLAG_BTF) == RESET)) {
if ((timeout--) == 0) {
return 0;
}
}
return 1;
}
void i2c_reset(i2c_t *obj) {
if (obj->i2c == I2C_1) {
RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, ENABLE);
RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, DISABLE);
}
if (obj->i2c == I2C_2) {
RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, ENABLE);
RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, DISABLE);
}
}
#if DEVICE_I2CSLAVE
void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) {
I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
uint16_t tmpreg;
// Get the old register value
tmpreg = i2c->OAR1;
// Reset address bits
tmpreg &= 0xFC00;
// Set new address
tmpreg |= (uint16_t)((uint16_t)address & (uint16_t)0x00FE); // 7-bits
// Store the new register value
i2c->OAR1 = tmpreg;
}
void i2c_slave_mode(i2c_t *obj, int enable_slave) {
// Nothing to do
}
// See I2CSlave.h
#define NoData 0 // the slave has not been addressed
#define ReadAddressed 1 // the master has requested a read from this slave (slave = transmitter)
#define WriteGeneral 2 // the master is writing to all slave
#define WriteAddressed 3 // the master is writing to this slave (slave = receiver)
int i2c_slave_receive(i2c_t *obj) {
// TO BE DONE
return(0);
}
int i2c_slave_read(i2c_t *obj, char *data, int length) {
int count = 0;
// Read all bytes
for (count = 0; count < length; count++) {
data[count] = i2c_byte_read(obj, 0);
}
return count;
}
int i2c_slave_write(i2c_t *obj, const char *data, int length) {
int count = 0;
// Write all bytes
for (count = 0; count < length; count++) {
i2c_byte_write(obj, data[count]);
}
return count;
}
#endif // DEVICE_I2CSLAVE
#endif // DEVICE_I2C

5
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/objects.h
View File

@ -26,9 +26,9 @@ extern "C" {
#endif
struct gpio_irq_s {
uint32_t port;
uint32_t pin;
uint32_t ch;
IRQn_Type irq_n;
uint32_t event; // 0=none, 1=rise, 2=fall, 3=rise+fall
};
struct port_s {
@ -65,7 +65,6 @@ struct spi_s {
struct i2c_s {
I2CName i2c;
uint32_t clk_speed;
};
struct pwmout_s {

17
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/pinmap.c
View File

@ -18,14 +18,15 @@
// Alternate-function mapping
static const uint32_t AF_mapping[] = {
0, // 0 = No AF
GPIO_Remap_SPI1, // 1
GPIO_Remap_I2C1, // 2
GPIO_Remap_USART1, // 3
GPIO_Remap_USART2, // 4
GPIO_FullRemap_TIM2, // 5
GPIO_FullRemap_TIM3, // 6
GPIO_Remap_I2C1 // 7
0, // 0 = No AF
GPIO_Remap_SPI1, // 1
GPIO_Remap_I2C1, // 2
GPIO_Remap_USART1, // 3
GPIO_Remap_USART2, // 4
GPIO_FullRemap_TIM2, // 5
GPIO_FullRemap_TIM3, // 6
GPIO_PartialRemap_TIM3, // 7
GPIO_Remap_I2C1 // 8
};
/**

56
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/pwmout_api.c
View File

@ -21,25 +21,19 @@
// Only TIM2 and TIM3 can be used (TIM1 and TIM4 are used by the us_ticker)
static const PinMap PinMap_PWM[] = {
// TIM2
{PA_2, PWM_2, STM_PIN_DATA(GPIO_Mode_AF_PP, 0)}, // TIM2_CH3 OK
{PA_3, PWM_2, STM_PIN_DATA(GPIO_Mode_AF_PP, 0)}, // TIM2_CH4 OK
// TIM2 remap
{PA_15, PWM_2, STM_PIN_DATA(GPIO_Mode_AF_PP, 5)}, // TIM2r_CH1 FAIL
{PB_3, PWM_2, STM_PIN_DATA(GPIO_Mode_AF_PP, 5)}, // TIM2r_CH2 FAIL - ARDUINO D3
{PB_10, PWM_2, STM_PIN_DATA(GPIO_Mode_AF_PP, 5)}, // TIM2r_CH3 OK - ARDUINO D6
{PB_11, PWM_2, STM_PIN_DATA(GPIO_Mode_AF_PP, 5)}, // TIM2r_CH4 OK
// TIM3
{PA_6, PWM_3, STM_PIN_DATA(GPIO_Mode_AF_PP, 0)}, // TIM3_CH1 OK
{PA_7, PWM_3, STM_PIN_DATA(GPIO_Mode_AF_PP, 0)}, // TIM3_CH2 OK - ARDUINO D11
{PB_1, PWM_3, STM_PIN_DATA(GPIO_Mode_AF_PP, 0)}, // TIM3_CH4 OK
// TIM3 remap
{PB_4, PWM_3, STM_PIN_DATA(GPIO_Mode_AF_PP, 6)}, // TIM3r_CH1 FAIL - ARDUINO D5
{PC_6, PWM_3, STM_PIN_DATA(GPIO_Mode_AF_PP, 6)}, // TIM3r_CH1 OK
{PC_7, PWM_3, STM_PIN_DATA(GPIO_Mode_AF_PP, 6)}, // TIM3r_CH2 OK - ARDUINO D9
{PB_5, PWM_3, STM_PIN_DATA(GPIO_Mode_AF_PP, 6)}, // TIM3r_CH2 FAIL - Bug confirmed in ES
{PC_8, PWM_3, STM_PIN_DATA(GPIO_Mode_AF_PP, 6)}, // TIM3r_CH3 OK
{PC_9, PWM_3, STM_PIN_DATA(GPIO_Mode_AF_PP, 6)}, // TIM3r_CH4 OK
// TIM2 default
//{PA_2, PWM_2, STM_PIN_DATA(GPIO_Mode_AF_PP, 0)}, // TIM2_CH3 - ARDUINO D1
//{PA_3, PWM_2, STM_PIN_DATA(GPIO_Mode_AF_PP, 0)}, // TIM2_CH4 - ARDUINO D0
// TIM2 full remap
{PB_3, PWM_2, STM_PIN_DATA(GPIO_Mode_AF_PP, 5)}, // TIM2fr_CH2 - ARDUINO D3
//{PB_10, PWM_2, STM_PIN_DATA(GPIO_Mode_AF_PP, 5)}, // TIM2fr_CH3 - ARDUINO D6
// TIM3 default
//{PA_6, PWM_3, STM_PIN_DATA(GPIO_Mode_AF_PP, 0)}, // TIM3_CH1 - ARDUINO D12
//{PA_7, PWM_3, STM_PIN_DATA(GPIO_Mode_AF_PP, 0)}, // TIM3_CH2 - ARDUINO D11
// TIM3 full remap
//{PC_7, PWM_3, STM_PIN_DATA(GPIO_Mode_AF_PP, 6)}, // TIM3fr_CH2 - ARDUINO D9
// TIM3 partial remap
{PB_4, PWM_3, STM_PIN_DATA(GPIO_Mode_AF_PP, 7)}, // TIM3pr_CH1 - ARDUINO D5
{NC, NC, 0}
};
@ -90,25 +84,29 @@ void pwmout_write(pwmout_t* obj, float value) {
TIM_OCInitStructure.TIM_Pulse = obj->pulse;
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
if ((obj->pin == PA_6) || (obj->pin == PA_15) || (obj->pin == PB_4) || (obj->pin == PC_6)) { // TIM Channel 1
// Configure channel 1
if (obj->pin == PB_4) {
TIM_OC1PreloadConfig(tim, TIM_OCPreload_Enable);
TIM_OC1Init(tim, &TIM_OCInitStructure);
}
if ((obj->pin == PA_7) || (obj->pin == PB_3) || (obj->pin == PB_5) || (obj->pin == PC_7)) { // TIM Channel 2
// Configure channel 2
if (obj->pin == PB_3) {
TIM_OC2PreloadConfig(tim, TIM_OCPreload_Enable);
TIM_OC2Init(tim, &TIM_OCInitStructure);
}
if ((obj->pin == PA_2) || (obj->pin == PB_10) || (obj->pin == PC_8)) { // TIM Channel 3
TIM_OC3PreloadConfig(tim, TIM_OCPreload_Enable);
TIM_OC3Init(tim, &TIM_OCInitStructure);
}
// Configure channel 3
//if (obj->pin == PB_10) {
// TIM_OC3PreloadConfig(tim, TIM_OCPreload_Enable);
// TIM_OC3Init(tim, &TIM_OCInitStructure);
//}
if ((obj->pin == PA_3) || (obj->pin == PB_1) || (obj->pin == PB_11) || (obj->pin == PC_9)) { // TIM Channel 4
TIM_OC4PreloadConfig(tim, TIM_OCPreload_Enable);
TIM_OC4Init(tim, &TIM_OCInitStructure);
}
// Configure channel 4
//if (obj->pin == PA_3) {
// TIM_OC4PreloadConfig(tim, TIM_OCPreload_Enable);
// TIM_OC4Init(tim, &TIM_OCInitStructure);
//}
}
float pwmout_read(pwmout_t* obj) {

72
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/rtc_api.c Normal file
View File

@ -0,0 +1,72 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "rtc_api.h"
static int rtc_inited = 0;
void rtc_init(void) {
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_BKP, ENABLE); // Enable PWR and Backup clock
PWR_BackupAccessCmd(ENABLE); // Allow access to Backup Domain
BKP_DeInit(); // Reset Backup Domain
// Uncomment these lines if you use the LSE
// Enable LSE and wait till it's ready
//RCC_LSEConfig(RCC_LSE_ON);
//while (RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET) {}
//RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE); // Select LSE as RTC Clock Source
// Uncomment these lines if you use the LSI
// Enable LSI and wait till it's ready
RCC_LSICmd(ENABLE);
while (RCC_GetFlagStatus(RCC_FLAG_LSIRDY) == RESET) {}
RCC_RTCCLKConfig(RCC_RTCCLKSource_LSI); // Select LSI as RTC Clock Source
RCC_RTCCLKCmd(ENABLE); // Enable RTC Clock
RTC_WaitForSynchro(); // Wait for RTC registers synchronization
RTC_WaitForLastTask(); // Wait until last write operation on RTC registers has finished
// Set RTC period to 1 sec
// For LSE: prescaler = RTCCLK/RTC period = 32768Hz/1Hz = 32768
// For LSI: prescaler = RTCCLK/RTC period = 40000Hz/1Hz = 40000
RTC_SetPrescaler(39999);
RTC_WaitForLastTask(); // Wait until last write operation on RTC registers has finished
rtc_inited = 1;
}
void rtc_free(void) {
RCC_DeInit(); // Resets the RCC clock configuration to the default reset state
rtc_inited = 0;
}
int rtc_isenabled(void) {
return rtc_inited;
}
time_t rtc_read(void) {
return (time_t)RTC_GetCounter();
}
void rtc_write(time_t t) {
RTC_WaitForLastTask(); // Wait until last write operation on RTC registers has finished
RTC_SetCounter(t); // Change the current time
RTC_WaitForLastTask(); // Wait until last write operation on RTC registers has finished
}

104
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/serial_api.c
View File

@ -13,19 +13,12 @@
* See the License for the specific language governing permissions and
* limitations under the License.
*/
//==============================================================================
// STM32F103
//==============================================================================
#include "serial_api.h"
#include "cmsis.h"
#include "pinmap.h"
#include "error.h"
#include <string.h>
/******************************************************************************
* INITIALIZATION
******************************************************************************/
static const PinMap PinMap_UART_TX[] = {
{PA_9, UART_1, STM_PIN_DATA(GPIO_Mode_AF_PP, 0)},
{PA_2, UART_2, STM_PIN_DATA(GPIO_Mode_AF_PP, 0)},
@ -47,11 +40,24 @@ static uart_irq_handler irq_handler;
int stdio_uart_inited = 0;
serial_t stdio_uart;
void serial_init(serial_t *obj, PinName tx, PinName rx) {
USART_TypeDef *usart;
static void init_usart(serial_t *obj) {
USART_TypeDef *usart = (USART_TypeDef *)(obj->uart);
USART_InitTypeDef USART_InitStructure;
USART_Cmd(usart, DISABLE);
USART_InitStructure.USART_BaudRate = obj->baudrate;
USART_InitStructure.USART_WordLength = obj->databits;
USART_InitStructure.USART_StopBits = obj->stopbits;
USART_InitStructure.USART_Parity = obj->parity;
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
USART_Init(usart, &USART_InitStructure);
USART_Cmd(usart, ENABLE);
}
void serial_init(serial_t *obj, PinName tx, PinName rx) {
// Determine the UART to use (UART_1, UART_2, ...)
UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
@ -62,10 +68,7 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) {
if (obj->uart == (UARTName)NC) {
error("Serial pinout mapping failed");
}
// Get UART registers structure address
usart = (USART_TypeDef *)(obj->uart);
// Enable USART clock
if (obj->uart == UART_1) {
RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
@ -84,15 +87,7 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) {
obj->stopbits = USART_StopBits_1;
obj->parity = USART_Parity_No;
USART_InitStructure.USART_BaudRate = obj->baudrate;
USART_InitStructure.USART_WordLength = obj->databits;
USART_InitStructure.USART_StopBits = obj->stopbits;
USART_InitStructure.USART_Parity = obj->parity;
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
USART_Init(usart, &USART_InitStructure);
USART_Cmd(usart, ENABLE);
init_usart(obj);
// The index is used by irq
if (obj->uart == UART_1) obj->index = 0;
@ -111,31 +106,11 @@ void serial_free(serial_t *obj) {
}
void serial_baud(serial_t *obj, int baudrate) {
USART_TypeDef *usart = (USART_TypeDef *)(obj->uart);
USART_InitTypeDef USART_InitStructure;
// Save new value
obj->baudrate = baudrate;
USART_Cmd(usart, DISABLE);
USART_InitStructure.USART_BaudRate = obj->baudrate;
USART_InitStructure.USART_WordLength = obj->databits;
USART_InitStructure.USART_StopBits = obj->stopbits;
USART_InitStructure.USART_Parity = obj->parity;
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
USART_Init(usart, &USART_InitStructure);
USART_Cmd(usart, ENABLE);
init_usart(obj);
}
void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
USART_TypeDef *usart = (USART_TypeDef *)(obj->uart);
USART_InitTypeDef USART_InitStructure;
// Save new values
if (data_bits == 8) {
obj->databits = USART_WordLength_8b;
}
@ -164,17 +139,7 @@ void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_b
obj->stopbits = USART_StopBits_1;
}
USART_Cmd(usart, DISABLE);
USART_InitStructure.USART_BaudRate = obj->baudrate;
USART_InitStructure.USART_WordLength = obj->databits;
USART_InitStructure.USART_StopBits = obj->stopbits;
USART_InitStructure.USART_Parity = obj->parity;
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
USART_Init(usart, &USART_InitStructure);
USART_Cmd(usart, ENABLE);
init_usart(obj);
}
/******************************************************************************
@ -182,30 +147,21 @@ void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_b
******************************************************************************/
// not api
void uart1_irq(void) {
USART_TypeDef *usart = (USART_TypeDef *)UART_1;
if (serial_irq_ids[0] != 0) {
if (USART_GetITStatus(usart, USART_IT_TXE) != RESET) {
irq_handler(serial_irq_ids[0], TxIrq);
static void uart_irq(USART_TypeDef* usart, int id) {
if (serial_irq_ids[id] != 0) {
if (USART_GetITStatus(usart, USART_IT_TC) != RESET) {
irq_handler(serial_irq_ids[id], TxIrq);
USART_ClearITPendingBit(usart, USART_IT_TC);
}
if (USART_GetITStatus(usart, USART_IT_RXNE) != RESET) {
irq_handler(serial_irq_ids[0], RxIrq);
irq_handler(serial_irq_ids[id], RxIrq);
USART_ClearITPendingBit(usart, USART_IT_RXNE);
}
}
}
// not api
void uart2_irq(void) {
USART_TypeDef *usart = (USART_TypeDef *)UART_2;
if (serial_irq_ids[1] != 0) {
if (USART_GetITStatus(usart, USART_IT_TXE) != RESET) {
irq_handler(serial_irq_ids[1], TxIrq);
}
if (USART_GetITStatus(usart, USART_IT_RXNE) != RESET) {
irq_handler(serial_irq_ids[1], RxIrq);
}
}
}
static void uart1_irq(void) {uart_irq((USART_TypeDef*)UART_1, 0);}
static void uart2_irq(void) {uart_irq((USART_TypeDef*)UART_2, 1);}
void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
irq_handler = handler;
@ -233,7 +189,7 @@ void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
USART_ITConfig(usart, USART_IT_RXNE, ENABLE);
}
else { // TxIrq
USART_ITConfig(usart, USART_IT_TXE, ENABLE);
USART_ITConfig(usart, USART_IT_TC, ENABLE);
}
NVIC_SetVector(irq_n, vector);

53
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/sleep.c Normal file
View File

@ -0,0 +1,53 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2013 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "sleep_api.h"
#include "cmsis.h"
static void SYSCLKConfig_STOP(void)
{
ErrorStatus HSEStartUpStatus;
RCC_HSEConfig(RCC_HSE_ON); // Enable HSE
HSEStartUpStatus = RCC_WaitForHSEStartUp(); // Wait till HSE is ready
if (HSEStartUpStatus == SUCCESS) {
RCC_PLLCmd(ENABLE); // Enable PLL
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) {} // Wait till PLL is ready
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); // Select PLL as system clock source
while(RCC_GetSYSCLKSource() != 0x08) {} // Wait till PLL is used as system clock source
}
}
void sleep(void)
{
SCB->SCR = 0; // Normal sleep mode for ARM core
__WFI();
}
void deepsleep(void)
{
// Enable PWR clock
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
// Request to enter STOP mode with regulator in low power mode
PWR_EnterSTOPMode(PWR_Regulator_LowPower, PWR_STOPEntry_WFI);
// At this stage the system has resumed from STOP mode.
// Re-configure the system clock: enable HSE, PLL and select
// PLL as system clock source (because HSE and PLL are disabled in STOP mode).
SYSCLKConfig_STOP();
}

90
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/spi_api.c
View File

@ -13,9 +13,6 @@
* See the License for the specific language governing permissions and
* limitations under the License.
*/
//==============================================================================
// STM32F103
//==============================================================================
#include "spi_api.h"
#if DEVICE_SPI
@ -45,16 +42,33 @@ static const PinMap PinMap_SPI_SCLK[] = {
// Only used in Slave mode
static const PinMap PinMap_SPI_SSEL[] = {
{PA_4, SPI_1, STM_PIN_DATA(GPIO_Mode_IN_FLOATING, 0)},
{PA_15, SPI_1, STM_PIN_DATA(GPIO_Mode_IN_FLOATING, 1)}, // Remap
{PB_6, SPI_1, STM_PIN_DATA(GPIO_Mode_IN_FLOATING, 0)}, // Generic IO, not real H/W NSS pin
//{PA_4, SPI_1, STM_PIN_DATA(GPIO_Mode_IN_FLOATING, 0)},
//{PA_15, SPI_1, STM_PIN_DATA(GPIO_Mode_IN_FLOATING, 1)}, // Remap
{NC, NC, 0}
};
void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
SPI_TypeDef *spi;
static void init_spi(spi_t *obj) {
SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi);
SPI_InitTypeDef SPI_InitStructure;
SPI_Cmd(spi, DISABLE);
SPI_InitStructure.SPI_Mode = obj->mode;
SPI_InitStructure.SPI_NSS = obj->nss;
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
SPI_InitStructure.SPI_DataSize = obj->bits;
SPI_InitStructure.SPI_CPOL = obj->cpol;
SPI_InitStructure.SPI_CPHA = obj->cpha;
SPI_InitStructure.SPI_BaudRatePrescaler = obj->br_presc;
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
SPI_InitStructure.SPI_CRCPolynomial = 7;
SPI_Init(spi, &SPI_InitStructure);
SPI_Cmd(spi, ENABLE);
}
void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
// Determine the SPI to use
SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
@ -69,9 +83,6 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
if (obj->spi == (SPIName)NC) {
error("SPI pinout mapping failed");
}
// Get SPI registers structure address
spi = (SPI_TypeDef *)(obj->spi);
// Enable SPI clock
if (obj->spi == SPI_1) {
@ -99,22 +110,10 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
else { // Slave
pinmap_pinout(ssel, PinMap_SPI_SSEL);
obj->mode = SPI_Mode_Slave;
obj->nss = SPI_NSS_Hard;
obj->nss = SPI_NSS_Soft;
}
// SPI configuration
SPI_InitStructure.SPI_Mode = obj->mode;
SPI_InitStructure.SPI_NSS = obj->nss;
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
SPI_InitStructure.SPI_DataSize = obj->bits;
SPI_InitStructure.SPI_CPOL = obj->cpol;
SPI_InitStructure.SPI_CPHA = obj->cpha;
SPI_InitStructure.SPI_BaudRatePrescaler = obj->br_presc;
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
SPI_InitStructure.SPI_CRCPolynomial = 7;
SPI_Init(spi, &SPI_InitStructure);
SPI_Cmd(spi, ENABLE);
init_spi(obj);
}
void spi_free(spi_t *obj) {
@ -122,12 +121,8 @@ void spi_free(spi_t *obj) {
SPI_I2S_DeInit(spi);
}
void spi_format(spi_t *obj, int bits, int mode, int slave) {
SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi);
SPI_InitTypeDef SPI_InitStructure;
void spi_format(spi_t *obj, int bits, int mode, int slave) {
// Save new values
if (bits == 8) {
obj->bits = SPI_DataSize_8b;
}
@ -163,26 +158,10 @@ void spi_format(spi_t *obj, int bits, int mode, int slave) {
obj->nss = SPI_NSS_Hard;
}
SPI_Cmd(spi, DISABLE);
SPI_InitStructure.SPI_Mode = obj->mode;
SPI_InitStructure.SPI_NSS = obj->nss;
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
SPI_InitStructure.SPI_DataSize = obj->bits;
SPI_InitStructure.SPI_CPOL = obj->cpol;
SPI_InitStructure.SPI_CPHA = obj->cpha;
SPI_InitStructure.SPI_BaudRatePrescaler = obj->br_presc;
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
SPI_InitStructure.SPI_CRCPolynomial = 7;
SPI_Init(spi, &SPI_InitStructure);
SPI_Cmd(spi, ENABLE);
init_spi(obj);
}
void spi_frequency(spi_t *obj, int hz) {
SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi);
SPI_InitTypeDef SPI_InitStructure;
// Get SPI clock frequency
uint32_t PCLK = SystemCoreClock >> 1;
@ -203,20 +182,7 @@ void spi_frequency(spi_t *obj, int hz) {
// Save new value
obj->br_presc = ((baud_rate > 7) ? (7 << 3) : (baud_rate << 3));
SPI_Cmd(spi, DISABLE);
SPI_InitStructure.SPI_Mode = obj->mode;
SPI_InitStructure.SPI_NSS = obj->nss;
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
SPI_InitStructure.SPI_DataSize = obj->bits;
SPI_InitStructure.SPI_CPOL = obj->cpol;
SPI_InitStructure.SPI_CPHA = obj->cpha;
SPI_InitStructure.SPI_BaudRatePrescaler = obj->br_presc;
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
SPI_InitStructure.SPI_CRCPolynomial = 7;
SPI_Init(spi, &SPI_InitStructure);
SPI_Cmd(spi, ENABLE);
init_spi(obj);
}
static inline int ssp_readable(spi_t *obj) {

21
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F103RB/us_ticker.c
View File

@ -33,6 +33,7 @@ void us_ticker_init(void) {
// Time base configuration
// TIM1 is used as "master", "TIM4" as "slave". TIM4 is clocked by TIM1.
TIM_TimeBaseStructInit(&TIM_TimeBaseStructure);
TIM_TimeBaseStructure.TIM_Period = 0xFFFF;
TIM_TimeBaseStructure.TIM_Prescaler = (uint16_t)(SystemCoreClock / 1000000) - 1; // 1 µs tick
TIM_TimeBaseStructure.TIM_ClockDivision = 0;
@ -42,6 +43,7 @@ void us_ticker_init(void) {
TIM_TimeBaseInit(TIM4, &TIM_TimeBaseStructure);
// Master timer configuration
TIM_OCStructInit(&TIM_OCInitStructure);
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_Toggle;
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_Pulse = 0;
@ -51,7 +53,7 @@ void us_ticker_init(void) {
TIM_SelectOutputTrigger(TIM1, TIM_TRGOSource_Update);
// Slave timer configuration
TIM_SelectSlaveMode(TIM4, TIM_SlaveMode_Gated);
TIM_SelectSlaveMode(TIM4, TIM_SlaveMode_External1);
TIM_SelectInputTrigger(TIM4, TIM_TS_ITR0);
// Enable timers
@ -60,10 +62,21 @@ void us_ticker_init(void) {
}
uint32_t us_ticker_read() {
uint32_t counter;
uint32_t counter, counter2;
if (!us_ticker_inited) us_ticker_init();
counter = (uint32_t)((uint32_t)TIM_GetCounter(TIM4) << 16) + (uint32_t)TIM_GetCounter(TIM1);
return counter;
// A situation might appear when TIM1 overflows right after TIM4 is read and before the
// new (overflowed) value of TIM1 is read, which would make the code below consider the
// previous (incorrect) value of TIM4 and the new value of TIM1, which would return a
// value in the past. Avoid this by computing consecutive values of the timer until they
// are properly ordered.
counter = counter2 = (uint32_t)((uint32_t)TIM_GetCounter(TIM4) << 16) + (uint32_t)TIM_GetCounter(TIM1);
while (1) {
counter2 = (uint32_t)((uint32_t)TIM_GetCounter(TIM4) << 16) + (uint32_t)TIM_GetCounter(TIM1);
if (counter2 > counter)
break;
counter = counter2;
}
return counter2;
}
void us_ticker_set_interrupt(unsigned int timestamp) {

35
libraries/net/cellular/CellularModem/at/ATCommandsInterface.cpp
View File

@ -63,30 +63,33 @@ int ATCommandsInterface::open()
}
//Initialize AT link & start events processing
int ATCommandsInterface::init()
int ATCommandsInterface::init(bool reset /* = true*/)
{
DBG("Sending ATZ E1 V1");
//Lock transaction mutex
m_transactionMtx.lock();
//Should we flush m_pStream at this point ???
int err;
int tries = 5;
do
if (reset)
{
err = executeInternal("ATZ E1 V1", this, NULL, 3000); //Enable echo and verbosity
if(err && tries)
DBG("Sending ATZ E1 V1");
//Should we flush m_pStream at this point ???
int err;
int tries = 5;
do
{
WARN("No response, trying again");
Thread::wait(1000); //Give dongle time to recover
err = executeInternal("ATZ E1 V1", this, NULL, 3000); //Enable echo and verbosity
if(err && tries)
{
WARN("No response, trying again");
Thread::wait(1000); //Give dongle time to recover
}
} while(err && tries--);
if( err )
{
ERR("Sending ATZ E1 V1 returned with err code %d", err);
m_transactionMtx.unlock();
return err;
}
} while(err && tries--);
if( err )
{
ERR("Sending ATZ E1 V1 returned with err code %d", err);
m_transactionMtx.unlock();
return err;
}
//Enable events handling and execute events enabling commands

2
libraries/net/cellular/CellularModem/at/ATCommandsInterface.h
View File

@ -77,7 +77,7 @@ public:
int open();
//Initialize AT link
int init();
int init(bool reset = true);
//Close connection
int close();

47
libraries/net/cellular/CellularModem/ip/PPPIPInterface.cpp
View File

@ -50,22 +50,15 @@ extern "C" {
#include "netif/ppp/ppp.h"
}
PPPIPInterface::PPPIPInterface(IOStream* pStream, const char* msisdn) : LwIPInterface(), m_linkStatusSphre(1), m_pppErrCode(0), m_pStream(pStream), m_streamAvail(true), m_pppd(-1)
PPPIPInterface::PPPIPInterface(IOStream* pStream) : LwIPInterface(), m_linkStatusSphre(1), m_pppErrCode(0), m_pStream(pStream), m_streamAvail(true), m_pppd(-1)
{
m_connectCmd = new char[strlen(CONNECT_CMD_PREFIX) + strlen(msisdn) + strlen(CONNECT_CMD_SUFFIX) + 1];
sprintf(m_connectCmd, "%s%s%s", CONNECT_CMD_PREFIX, msisdn, CONNECT_CMD_SUFFIX);
m_expectedResp = new char[strlen(m_connectCmd) + strlen(EXPECTED_RESP_SUFFIX) + 1];
sprintf(m_expectedResp, "%s%s", m_connectCmd, EXPECTED_RESP_SUFFIX);
m_expectedRespDatarate = new char[strlen(m_connectCmd) + strlen(EXPECTED_RESP_DATARATE_SUFFIX) + 1];
sprintf(m_expectedRespDatarate, "%s%s", m_connectCmd, EXPECTED_RESP_DATARATE_SUFFIX);
m_linkStatusSphre.wait();
}
/*virtual*/ PPPIPInterface::~PPPIPInterface()
{
delete m_connectCmd;
delete m_expectedResp;
delete m_expectedRespDatarate;
}
/*virtual*/ int PPPIPInterface::init() //Init PPP-specific stuff, create the right bindings, etc
@ -78,10 +71,11 @@ PPPIPInterface::PPPIPInterface(IOStream* pStream, const char* msisdn) : LwIPInte
return OK;
}
int PPPIPInterface::setup(const char* user, const char* pw)
int PPPIPInterface::setup(const char* user, const char* pw, const char* msisdn)
{
DBG("Configuring PPP authentication method");
pppSetAuth(PPPAUTHTYPE_ANY, user, pw);
m_msisdn = msisdn;
DBG("Done");
return OK;
}
@ -89,22 +83,22 @@ int PPPIPInterface::setup(const char* user, const char* pw)
/*virtual*/ int PPPIPInterface::connect()
{
int ret;
char cmd[32];
int cmdLen;
char buf[32];
size_t len;
DBG("Trying to connect with PPP");
cleanupLink();
DBG("Sending %s", m_connectCmd);
ret = m_pStream->write((uint8_t*)m_connectCmd, strlen(m_connectCmd), osWaitForever);
cmdLen = sprintf(cmd, "%s%s%s", CONNECT_CMD_PREFIX, m_msisdn, CONNECT_CMD_SUFFIX);
DBG("Sending %s", cmd);
ret = m_pStream->write((uint8_t*)cmd, cmdLen, osWaitForever);
if( ret != OK )
{
return NET_UNKNOWN;
}
DBG("Expect %s", m_expectedResp);
len = 0;
size_t readLen;
ret = m_pStream->read((uint8_t*)buf + len, &readLen, EXPECTED_RESP_MIN_LEN, 10000);
@ -128,16 +122,21 @@ int PPPIPInterface::setup(const char* user, const char* pw)
DBG("Got %s[len %d]", buf, len);
int datarate = 0;
if( (sscanf(buf, m_expectedRespDatarate, &datarate ) != 1) && (strcmp(m_expectedResp, buf) != 0) )
strcpy(&cmd[cmdLen], EXPECTED_RESP_DATARATE_SUFFIX);
if( (sscanf(buf, cmd, &datarate ) != 1))
{
//Discard buffer
do //Clear buf
strcpy(&cmd[cmdLen], EXPECTED_RESP_SUFFIX);
if (strcmp(cmd, buf) != 0)
{
ret = m_pStream->read((uint8_t*)buf, &len, 32, 0);
} while( (ret == OK) && (len > 0) );
return NET_CONN;
}
//Discard buffer
do //Clear buf
{
ret = m_pStream->read((uint8_t*)buf, &len, 32, 0);
} while( (ret == OK) && (len > 0) );
return NET_CONN;
}
}
DBG("Transport link open");
if(datarate != 0)
{

9
libraries/net/cellular/CellularModem/ip/PPPIPInterface.h
View File

@ -40,11 +40,11 @@ using namespace rtos;
class PPPIPInterface : public LwIPInterface
{
public:
PPPIPInterface(IOStream* pStream, const char* msisdn);
PPPIPInterface(IOStream* pStream);
virtual ~PPPIPInterface();
int init(); //Init PPP-specific stuff, create the right bindings, etc
int setup(const char* user, const char* pw); //Setup authentication
int setup(const char* user, const char* pw, const char* msisdn); //Setup authentication
virtual int connect();
virtual int disconnect();
@ -57,16 +57,13 @@ private:
IOStream* m_pStream; //Serial stream
bool m_streamAvail;
const char* m_msisdn;
int m_pppd;
friend u32_t sio_write(sio_fd_t fd, u8_t *data, u32_t len);
friend u32_t sio_read(sio_fd_t fd, u8_t *data, u32_t len);
friend void sio_read_abort(sio_fd_t fd);
char* m_connectCmd;
char* m_expectedResp;
char* m_expectedRespDatarate;
};
#endif /* PPPIPINTERFACE_H_ */

26
libraries/net/cellular/CellularModem/link/LinkMonitor.cpp
View File

@ -33,20 +33,24 @@ using std::sscanf;
LinkMonitor::LinkMonitor(ATCommandsInterface* pIf) : m_pIf(pIf), m_rssi(0), m_registrationState(REGISTRATION_STATE_UNKNOWN), m_bearer(BEARER_UNKNOWN)
{
m_gsm = true;
}
int LinkMonitor::init()
int LinkMonitor::init(bool gsm)
{
// we need to make sure that we setup the operator selection to be in 'numeric' format.
// i.e. it is made up of a network and country code when returned by the modem e.g. Operator = 23415. This allows easy logic parsing for
// setting up other network parameters in future.
DBG("LinkMonitor::init() being called. This should only happen once: executinging AT+COPS=0,2");
int ret = m_pIf->executeSimple("AT+COPS=0,2", NULL, DEFAULT_TIMEOUT); //Configure to set the operator string to Country Code and mobile network code
if(ret != OK)
m_gsm = gsm;
if (m_gsm)
{
WARN(" NET_PROTOCOL error from sending the AT+COPS command to the modem. ");
return NET_PROTOCOL;
// we need to make sure that we setup the operator selection to be in 'numeric' format.
// i.e. it is made up of a network and country code when returned by the modem e.g. Operator = 23415. This allows easy logic parsing for
// setting up other network parameters in future.
DBG("LinkMonitor::init() being called. This should only happen once: executinging AT+COPS=0,2");
int ret = m_pIf->executeSimple("AT+COPS=0,2", NULL, DEFAULT_TIMEOUT); //Configure to set the operator string to Country Code and mobile network code
if(ret != OK)
{
WARN(" NET_PROTOCOL error from sending the AT+COPS command to the modem. ");
return NET_PROTOCOL;
}
}
return OK;
}
@ -136,7 +140,7 @@ int LinkMonitor::getState(int* pRssi, REGISTRATION_STATE* pRegistrationState, BE
m_rssi = 0;
m_registrationState = REGISTRATION_STATE_UNKNOWN;
m_bearer = BEARER_UNKNOWN;
int ret = m_pIf->execute("AT+CREG?;+COPS?;+CSQ", this, NULL, DEFAULT_TIMEOUT); //Configure to get registration info & get it; get signal quality
int ret = m_pIf->execute(m_gsm ? "AT+CREG?;+COPS?;+CSQ" : "AT+CREG?;+CSQ", this, NULL, DEFAULT_TIMEOUT); //Configure to get registration info & get it; get signal quality
if(ret != OK)
{
return NET_PROTOCOL;

3
libraries/net/cellular/CellularModem/link/LinkMonitor.h
View File

@ -39,7 +39,7 @@ public:
/** Initialize monitor
*/
int init();
int init(bool gsm = true);
/** Registration State
*/
@ -82,6 +82,7 @@ private:
ATCommandsInterface* m_pIf;
int m_rssi;
bool m_gsm;
REGISTRATION_STATE m_registrationState;
BEARER m_bearer;

253
libraries/net/cellular/CellularUSBModem/serial/io/IOSerialStream.cpp Normal file
View File

@ -0,0 +1,253 @@
/* IOSerialStream.cpp */
/* Copyright (C) 2012 mbed.org, MIT License
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of this software
* and associated documentation files (the "Software"), to deal in the Software without restriction,
* including without limitation the rights to use, copy, modify, merge, publish, distribute,
* sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all copies or
* substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#define __DEBUG__ 0 //Maximum verbosity
#ifndef __MODULE__
#define __MODULE__ "IOSerialStream.cpp"
#endif
#include "core/fwk.h"
#include <cstring>
#include "IOSerialStream.h"
#define UART_X ((LPC_UART_TypeDef *)(UART_1))
IOSerialStream::IOSerialStream(mbed::RawSerial& serial) : m_serial(serial), m_serialTxFifoEmpty(true),
m_availableSphre(1), m_spaceSphre(1), m_inBuf(), m_outBuf()
{
m_availableSphre.wait();
m_spaceSphre.wait();
//Attach interrupts
m_serial.attach(this, &IOSerialStream::readable, mbed::SerialBase::RxIrq);
m_serial.attach(this, &IOSerialStream::writeable, mbed::SerialBase::TxIrq);
}
/*virtual*/ IOSerialStream::~IOSerialStream()
{
m_serial.attach(NULL, mbed::SerialBase::RxIrq);
m_serial.attach(NULL, mbed::SerialBase::TxIrq);
}
//0 for non-blocking (returns immediately), osWaitForever for infinite blocking
/*virtual*/ int IOSerialStream::read(uint8_t* buf, size_t* pLength, size_t maxLength, uint32_t timeout/*=osWaitForever*/)
{
DBG("Trying to read at most %d chars", maxLength);
int ret = waitAvailable(timeout);
if(ret)
{
WARN("Error %d while waiting for incoming data", ret);
return ret;
}
int readLen = MIN( available(), maxLength );
*pLength = readLen;
setupReadableISR(false);
while(readLen--)
{
m_inBuf.dequeue(buf);
buf++;
}
setupReadableISR(true);
DBG("Read %d chars successfully", *pLength);
return OK;
}
/*virtual*/ size_t IOSerialStream::available()
{
setupReadableISR(false); //m_inBuf.available() is not reentrant
size_t len = m_inBuf.available();
setupReadableISR(true);
return len;
}
/*virtual*/ int IOSerialStream::waitAvailable(uint32_t timeout/*=osWaitForever*/) //Wait for data to be available
{
int ret;
if(available()) //Is data already available?
{
m_availableSphre.wait(0); //Clear the queue as data is available
return OK;
}
DBG("Waiting for data availability %d ms (-1 is infinite)", timeout);
ret = m_availableSphre.wait(timeout); //Wait for data to arrive or for abort
if(ret <= 0)
{
DBG("Timeout");
return NET_TIMEOUT;
}
if(!available()) //Even if abort has been called, return that data is available
{
DBG("Aborted");
return NET_INTERRUPTED;
}
DBG("Finished waiting");
m_availableSphre.wait(0); //Clear the queue as data is available
return OK;
}
/*virtual*/ int IOSerialStream::abortRead() //Abort current reading (or waiting) operation
{
if( !available() ) //If there is data pending, no need to abort
{
m_availableSphre.release(); //Force exiting the waiting state; kludge to pass a RC directly
}
else
{
DBG("Serial is readable"); ;
}
return OK;
}
void IOSerialStream::setupReadableISR(bool en)
{
if(en)
{
UART_X->IER |= 1 << 0;
}
else
{
UART_X->IER &= ~(1 << 0);
}
}
void IOSerialStream::readable() //Callback from m_serial when new data is available
{
do
{
m_inBuf.queue(m_serial.getc());
} while(m_serial.readable());
m_availableSphre.release(); //Force exiting the waiting state
}
//0 for non-blocking (returns immediately), osWaitForever for infinite blocking
/*virtual*/ int IOSerialStream::write(uint8_t* buf, size_t length, uint32_t timeout/*=osWaitForever*/)
{
DBG("Trying to write %d chars", length);
int ret = waitSpace(timeout);
if(ret)
{
WARN("Error %d while waiting for space", ret);
return ret;
}
DBG("Writing %d chars", length);
setupWriteableISR(false);
while(length)
{
m_outBuf.queue(*buf);
buf++;
length--;
if(length && !space())
{
DBG("Waiting to write remaining %d chars", length);
setupWriteableISR(true);
ret = waitSpace(timeout);
if(ret)
{
WARN("Error %d while waiting for space", ret);
return ret;
}
setupWriteableISR(false);
}
}
//If m_serial tx fifo is empty we need to manually tx a byte in order to trigger the interrupt
if( m_outBuf.available() && m_serialTxFifoEmpty )
{
m_serialTxFifoEmpty = false;
uint8_t c;
m_outBuf.dequeue(&c);
m_serial.putc((char)c);
}
setupWriteableISR(true);
DBG("Write successful");
return OK;
}
/*virtual*/ size_t IOSerialStream::space()
{
setupWriteableISR(false); //m_outBuf.available() is not reentrant
size_t len = CIRCBUF_SIZE - m_outBuf.available();
setupWriteableISR(true);
return len;
}
/*virtual*/ int IOSerialStream::waitSpace(uint32_t timeout/*=osWaitForever*/) //Wait for space to be available
{
int ret;
if(space()) //Is still space already left?
{
m_spaceSphre.wait(0); //Clear the queue as space is available
return OK;
}
DBG("Waiting for data space %d ms (-1 is infinite)", timeout);
ret = m_spaceSphre.wait(timeout); //Wait for space to be made or for abort
if(ret <= 0)
{
DBG("Timeout");
return NET_TIMEOUT;
}
if(!space()) //Even if abort has been called, return that space is available
{
DBG("Aborted");
return NET_INTERRUPTED;
}
m_spaceSphre.wait(0); //Clear the queue as space is available
return OK;
}
/*virtual*/ int IOSerialStream::abortWrite() //Abort current writing (or waiting) operation
{
if( !space() ) //If there is space left, no need to abort
{
m_spaceSphre.release(); //Force exiting the waiting state
}
return OK;
}
void IOSerialStream::setupWriteableISR(bool en)
{
if(en)
{
UART_X->IER |= 1 << 1;
}
else
{
UART_X->IER &= ~(1 << 1);
}
}
void IOSerialStream::writeable() //Callback from m_serial when new space is available
{
if(m_outBuf.isEmpty())
{
m_serialTxFifoEmpty = true;
}
else
{
while(m_serial.writeable() && !m_outBuf.isEmpty())
{
uint8_t c;
m_outBuf.dequeue(&c);
m_serial.putc((char)c);
}
}
m_spaceSphre.release(); //Force exiting the waiting state
}

72
libraries/net/cellular/CellularUSBModem/serial/io/IOSerialStream.h Normal file
View File

@ -0,0 +1,72 @@
/* IOSerialStream.h */
/* Copyright (C) 2012 mbed.org, MIT License
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of this software
* and associated documentation files (the "Software"), to deal in the Software without restriction,
* including without limitation the rights to use, copy, modify, merge, publish, distribute,
* sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all copies or
* substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef IOSERIALSTREAM_H_
#define IOSERIALSTREAM_H_
#include "core/fwk.h"
#include "RawSerial.h"
#include "rtos.h"
#include "core/MtxCircBuffer.h"
/** Input Serial Stream for physical serial interfaces (UART...)
This class is not thread-safe, except for the *Abort() methods that can be called by any thread/ISR
*/
class IOSerialStream : public IOStream
{
public:
enum { CIRCBUF_SIZE = 255 };
IOSerialStream(mbed::RawSerial& serial);
/*virtual*/ ~IOSerialStream();
//0 for non-blocking (returns immediately), osWaitForever for infinite blocking
virtual int read(uint8_t* buf, size_t* pLength, size_t maxLength, uint32_t timeout=osWaitForever);
virtual size_t available();
virtual int waitAvailable(uint32_t timeout=osWaitForever); //Wait for data to be available
virtual int abortRead(); //Abort current reading (or waiting) operation
//0 for non-blocking (returns immediately), osWaitForever for infinite blocking
virtual int write(uint8_t* buf, size_t length, uint32_t timeout=osWaitForever);
virtual size_t space();
virtual int waitSpace(uint32_t timeout=osWaitForever); //Wait for space to be available
virtual int abortWrite(); //Abort current writing (or waiting) operation
private:
mbed::RawSerial& m_serial;
volatile bool m_serialTxFifoEmpty;
void setupReadableISR(bool en);
void readable(); //Callback from m_serial when new data is available
Semaphore m_availableSphre; //Used for signalling
void setupWriteableISR(bool en);
void writeable(); //Callback from m_serial when new space is available
Semaphore m_spaceSphre; //Used for signalling
MtxCircBuffer<uint8_t, CIRCBUF_SIZE + 1> m_inBuf;
MtxCircBuffer<uint8_t, CIRCBUF_SIZE + 1> m_outBuf;
};
#endif /* IOSERIALSTREAM_H_ */

3
libraries/net/cellular/CellularUSBModem/serial/usb/USBSerialStream.h
View File

@ -32,10 +32,11 @@
/* Input Serial Stream for USB virtual serial ports interfaces
This class is not thread-safe, except for the *Abort() methods that can be called by any thread/ISR
*/
#define CIRCBUF_SIZE 127
class USBSerialStream : public IOStream, IUSBHostSerialListener
{
public:
enum { CIRCBUF_SIZE = 127 };
USBSerialStream(IUSBHostSerial& serial);
/*virtual*/ ~USBSerialStream();

2
libraries/net/cellular/UbloxUSBModem/UbloxCDMAModemInitializer.cpp
View File

@ -109,6 +109,6 @@ int UbloxCDMAModemInitializer::getSerialPortCount()
/*virtual*/ int UbloxCDMAModemInitializer::getType()
{
return WAN_DONGLE_TYPE_UBLOXC200;
return WAN_DONGLE_TYPE_UBLOX_LISAC200;
}

2
libraries/net/cellular/UbloxUSBModem/UbloxCDMAModemInitializer.h
View File

@ -27,7 +27,7 @@
enum
{
WAN_DONGLE_TYPE_UBLOXC200
WAN_DONGLE_TYPE_UBLOX_LISAC200 = 0xC200,
};
class UbloxCDMAModemInitializer : public WANDongleInitializer

2
libraries/net/cellular/UbloxUSBModem/UbloxGSMModemInitializer.cpp
View File

@ -126,6 +126,6 @@ int UbloxGSMModemInitializer::getSerialPortCount()
/*virtual*/ int UbloxGSMModemInitializer::getType()
{
return WAN_DONGLE_TYPE_UBX;
return WAN_DONGLE_TYPE_UBLOX_LISAU200;
}

2
libraries/net/cellular/UbloxUSBModem/UbloxGSMModemInitializer.h
View File

@ -23,7 +23,7 @@
enum
{
WAN_DONGLE_TYPE_UBX
WAN_DONGLE_TYPE_UBLOX_LISAU200 = 0x0200
};
//-----------------------------------------------------------------------

518
libraries/net/cellular/UbloxUSBModem/UbloxModem.cpp Normal file
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@ -0,0 +1,518 @@
/* UbloxModem.cpp */
/* Copyright (C) 2012 mbed.org, MIT License
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of this software
* and associated documentation files (the "Software"), to deal in the Software without restriction,
* including without limitation the rights to use, copy, modify, merge, publish, distribute,
* sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all copies or
* substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#define __DEBUG__ 3
#ifndef __MODULE__
#define __MODULE__ "UbloxModem.cpp"
#endif
#include "core/fwk.h"
#include "sms/GSMSMSInterface.h"
#include "sms/CDMASMSInterface.h"
#include "UbloxModem.h"
UbloxModem::UbloxModem(IOStream* atStream, IOStream* pppStream) :
m_at(atStream), // Construct ATCommandsInterface with the AT serial channel
m_CdmaSms(&m_at), // Construct SMSInterface with the ATCommandsInterface
m_GsmSms(&m_at), // Construct SMSInterface with the ATCommandsInterface
m_ussd(&m_at), // Construct USSDInterface with the ATCommandsInterface
m_linkMonitor(&m_at), // Construct LinkMonitor with the ATCommandsInterface
m_ppp(pppStream ? pppStream : atStream), // Construct PPPIPInterface with the PPP serial channel
m_ipInit(false), // PPIPInterface connection is initially down
m_smsInit(false), // SMSInterface starts un-initialised
m_ussdInit(false), // USSDInterface starts un-initialised
m_linkMonitorInit(false), // LinkMonitor subsystem starts un-initialised
m_atOpen(false), // ATCommandsInterface starts in a closed state
m_onePort(pppStream == NULL),
m_gsm(true)
{
}
class AtiProcessor : public IATCommandsProcessor
{
public:
AtiProcessor()
{
i = 0;
str[0] = '\0';
}
const char* getInfo(void) { return str; }
private:
virtual int onNewATResponseLine(ATCommandsInterface* pInst, const char* line)
{
int l = strlen(line);
if (i + l + 2 > sizeof(str))
return NET_OVERFLOW;
if (i) str[i++] = ',';
strcat(&str[i], line);
i += l;
return OK;
}
virtual int onNewEntryPrompt(ATCommandsInterface* pInst)
{
return OK;
}
protected:
char str[256];
int i;
};
class CREGProcessor : public IATCommandsProcessor
{
public:
CREGProcessor(bool gsm) : status(STATUS_REGISTERING)
{
m_gsm = gsm;
}
enum REGISTERING_STATUS { STATUS_REGISTERING, STATUS_OK, STATUS_FAILED };
REGISTERING_STATUS getStatus()
{
return status;
}
const char* getAtCommand()
{
return m_gsm ? "AT+CREG?" : "AT+CSS?";
}
private:
virtual int onNewATResponseLine(ATCommandsInterface* pInst, const char* line)
{
int r;
if (m_gsm)
{
if( sscanf(line, "+CREG: %*d,%d", &r) == 1 )
{
status = (r == 1 || r == 5) ? STATUS_OK :
(r == 0 || r == 2) ? STATUS_REGISTERING :
// (r == 3) ? STATUS_FAILED :
STATUS_FAILED;
}
}
else
{
char bc[3] = "";
if(sscanf(line, "%*s %*c,%2s,%*d",bc)==1)
{
status = (strcmp("Z", bc) == 0) ? STATUS_REGISTERING : STATUS_OK;
}
}
return OK;
}
virtual int onNewEntryPrompt(ATCommandsInterface* pInst)
{
return OK;
}
volatile REGISTERING_STATUS status;
bool m_gsm;
};
int UbloxModem::connect(const char* apn, const char* user, const char* password)
{
if( !m_ipInit )
{
m_ipInit = true;
m_ppp.init();
}
m_ppp.setup(user, password, m_gsm ? DEFAULT_MSISDN_GSM : DEFAULT_MSISDN_CDMA);
int ret = init();
if(ret)
{
return ret;
}
if (m_onePort)
{
m_smsInit = false; //SMS status reset
m_ussdInit = false; //USSD status reset
m_linkMonitorInit = false; //Link monitor status reset
}
ATCommandsInterface::ATResult result;
if(apn != NULL)
{
char cmd[48];
int tries = 30;
sprintf(cmd, "AT+CGDCONT=1,\"IP\",\"%s\"", apn);
do //Try 30 times because for some reasons it can fail *a lot* with the K3772-Z dongle
{
ret = m_at.executeSimple(cmd, &result);
DBG("Result of command: Err code=%d", ret);
if(ret)
{
Thread::wait(500);
}
} while(ret && --tries);
DBG("ATResult: AT return=%d (code %d)", result.result, result.code);
DBG("APN set to %s", apn);
}
//Connect
DBG("Connecting");
if (m_onePort)
{
m_at.close(); // Closing AT parser
m_atOpen = false; //Will need to be reinitialized afterwards
}
DBG("Connecting PPP");
ret = m_ppp.connect();
DBG("Result of connect: Err code=%d", ret);
return ret;
}
int UbloxModem::disconnect()
{
DBG("Disconnecting from PPP");
int ret = m_ppp.disconnect();
if(ret)
{
ERR("Disconnect returned %d, still trying to disconnect", ret);
}
//Ugly but leave dongle time to recover
Thread::wait(500);
if (m_onePort)
{
//ATCommandsInterface::ATResult result;
DBG("Starting AT thread");
ret = m_at.open();
if(ret)
{
return ret;
}
}
DBG("Trying to hangup");
if (m_onePort)
{
//Reinit AT parser
ret = m_at.init(false);
DBG("Result of command: Err code=%d\n", ret);
if(ret)
{
m_at.close(); // Closing AT parser
DBG("AT Parser closed, could not complete disconnection");
return NET_TIMEOUT;
}
}
return OK;
}
int UbloxModem::sendSM(const char* number, const char* message)
{
int ret = init();
if(ret)
{
return ret;
}
ISMSInterface* sms;
if (m_gsm) sms = &m_GsmSms;
else sms = &m_CdmaSms;
if(!m_smsInit)
{
ret = sms->init();
if(ret)
{
return ret;
}
m_smsInit = true;
}
ret = sms->send(number, message);
if(ret)
{
return ret;
}
return OK;
}
int UbloxModem::getSM(char* number, char* message, size_t maxLength)
{
int ret = init();
if(ret)
{
return ret;
}
ISMSInterface* sms;
if (m_gsm) sms = &m_GsmSms;
else sms = &m_CdmaSms;
if(!m_smsInit)
{
ret = sms->init();
if(ret)
{
return ret;
}
m_smsInit = true;
}
ret = sms->get(number, message, maxLength);
if(ret)
{
return ret;
}
return OK;
}
int UbloxModem::getSMCount(size_t* pCount)
{
int ret = init();
if(ret)
{
return ret;
}
ISMSInterface* sms;
if (m_gsm) sms = &m_GsmSms;
else sms = &m_CdmaSms;
if(!m_smsInit)
{
ret = sms->init();
if(ret)
{
return ret;
}
m_smsInit = true;
}
ret = sms->getCount(pCount);
if(ret)
{
return ret;
}
return OK;
}
ATCommandsInterface* UbloxModem::getATCommandsInterface()
{
return &m_at;
}
int UbloxModem::init()
{
if(m_atOpen)
{
return OK;
}
DBG("Starting AT thread if needed");
int ret = m_at.open();
if(ret)
{
return ret;
}
DBG("Sending initialisation commands");
ret = m_at.init(false);
if(ret)
{
return ret;
}
ATCommandsInterface::ATResult result;
AtiProcessor atiProcessor;
do
{
ret = m_at.execute("ATI", &atiProcessor, &result);
}
while (ret != OK);
{
const char* info = atiProcessor.getInfo();
DBG("Modem Identification [%s]", info);
if (strstr(info, "LISA-C200"))
{
m_gsm = false; // it is CDMA modem
m_onePort = true; // force use of only one port
}
}
CREGProcessor cregProcessor(m_gsm);
//Wait for network registration
do
{
DBG("Waiting for network registration");
ret = m_at.execute(cregProcessor.getAtCommand(), &cregProcessor, &result);
DBG("Result of command: Err code=%d\n", ret);
DBG("ATResult: AT return=%d (code %d)\n", result.result, result.code);
if(cregProcessor.getStatus() == CREGProcessor::STATUS_REGISTERING)
{
Thread::wait(3000);
}
} while(cregProcessor.getStatus() == CREGProcessor::STATUS_REGISTERING);
if(cregProcessor.getStatus() == CREGProcessor::STATUS_FAILED)
{
ERR("Registration denied");
return NET_AUTH;
}
m_atOpen = true;
return OK;
}
int UbloxModem::cleanup()
{
if(m_ppp.isConnected())
{
WARN("Data connection is still open"); //Try to encourage good behaviour from the user
m_ppp.disconnect();
}
m_smsInit = false;
m_ussdInit = false;
m_linkMonitorInit = false;
//We don't reset m_ipInit as PPPIPInterface::init() only needs to be called once
if(m_atOpen)
{
m_at.close();
m_atOpen = false;
}
return OK;
}
int UbloxModem::sendUSSD(const char* command, char* result, size_t maxLength)
{
int ret = init();
if(ret)
{
return ret;
}
if(!m_ussdInit)
{
ret = m_ussd.init();
if(ret)
{
return ret;
}
m_ussdInit = true;
}
ret = m_ussd.send(command, result, maxLength);
if(ret)
{
return ret;
}
return OK;
}
int UbloxModem::getLinkState(int* pRssi, LinkMonitor::REGISTRATION_STATE* pRegistrationState, LinkMonitor::BEARER* pBearer)
{
int ret = init();
if(ret)
{
return ret;
}
if(!m_linkMonitorInit)
{
ret = m_linkMonitor.init();
ret = m_linkMonitor.init(m_gsm);
if(ret)
{
return ret;
}
m_linkMonitorInit = true;
}
ret = m_linkMonitor.getState(pRssi, pRegistrationState, pBearer);
if(ret)
{
return ret;
}
return OK;
}
#include "USBHost.h"
#include "UbloxGSMModemInitializer.h"
#include "UbloxCDMAModemInitializer.h"
UbloxUSBModem::UbloxUSBModem() :
UbloxModem(&m_atStream, &m_pppStream),
m_dongle(), // Construct WANDongle: USB interface with two serial channels to the modem (USBSerialStream objects)
m_atStream(m_dongle.getSerial(1)), // AT commands are sent down one serial channel.
m_pppStream(m_dongle.getSerial(0)), // PPP connections are managed via another serial channel.
m_dongleConnected(false) // Dongle is initially not ready for anything
{
USBHost* host = USBHost::getHostInst();
m_dongle.addInitializer(new UbloxGSMModemInitializer(host));
m_dongle.addInitializer(new UbloxCDMAModemInitializer(host));
}
int UbloxUSBModem::init()
{
if( !m_dongleConnected )
{
m_dongleConnected = true;
while( !m_dongle.connected() )
{
m_dongle.tryConnect();
Thread::wait(10);
}
if(m_dongle.getDongleType() == WAN_DONGLE_TYPE_UBLOX_LISAU200)
{
INFO("Using a u-blox LISA-U200 3G/WCDMA Modem");
}
else if(m_dongle.getDongleType() == WAN_DONGLE_TYPE_UBLOX_LISAC200)
{
INFO("Using a u-blox LISA-C200 CDMA Modem");
m_gsm = false;
m_onePort = true;
}
else
{
WARN("Using an Unknown Dongle");
}
}
return UbloxModem::init();
}
int UbloxUSBModem::cleanup()
{
UbloxModem::cleanup();
m_dongle.disconnect();
m_dongleConnected = false;
return OK;
}
UbloxSerModem::UbloxSerModem() :
UbloxModem(&m_atStream, NULL),
m_Serial(P0_15,P0_16),
m_atStream(m_Serial)
{
m_Serial.baud(115200);
}

168
libraries/net/cellular/UbloxUSBModem/UbloxModem.h Normal file
View File

@ -0,0 +1,168 @@
/* VodafoneUSBModem.h */
/* Copyright (C) 2012 mbed.org, MIT License
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of this software
* and associated documentation files (the "Software"), to deal in the Software without restriction,
* including without limitation the rights to use, copy, modify, merge, publish, distribute,
* sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all copies or
* substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef UBLOXMODEM_H_
#define UBLOXMODEM_H_
#include "core/fwk.h"
#include "at/ATCommandsInterface.h"
#include "ip/PPPIPInterface.h"
#include "sms/GSMSMSInterface.h"
#include "sms/CDMASMSInterface.h"
#include "ussd/USSDInterface.h"
#include "link/LinkMonitor.h"
#include "CellularModem.h"
/** u-blox WCDMA modem (LISA-U200)
*/
class UbloxModem: public CellularModem
{
public:
/** Create u-blox API instance
@param powerGatingPin Optional pin commanding a power gating transistor on the modem's power line
@param powerGatingOnWhenPinHigh true if the pin needs to be high to power the dongle, defaults to true
*/
UbloxModem(IOStream* atStream, IOStream* pppStream);
//Internet-related functions
/** Open a 3G internet connection
@return 0 on success, error code on failure
*/
virtual int connect(const char* apn = NULL, const char* user = NULL, const char* password = NULL);
/** Close the internet connection
@return 0 on success, error code on failure
*/
virtual int disconnect();
/** Send a SM
@param number The receiver's phone number
@param message The message to send
@return 0 on success, error code on failure
*/
virtual int sendSM(const char* number, const char* message);
/** Receive a SM
@param number Pointer to a buffer to store the sender's phone number (must be at least 17 characters-long, including the sapce for the null-terminating char)
@param message Pointer to a buffer to store the the incoming message
@param maxLength Maximum message length that can be stored in buffer (including null-terminating character)
@return 0 on success, error code on failure
*/
virtual int getSM(char* number, char* message, size_t maxLength);
/** Get the number of SMs in the incoming box
@param pCount pointer to store the number of unprocessed SMs on
@return 0 on success, error code on failure
*/
virtual int getSMCount(size_t* pCount);
/** Send a USSD command & wait for its result
@param command The command to send
@param result Buffer in which to store the result
@param maxLength Maximum result length that can be stored in buffer (including null-terminating character)
@return 0 on success, error code on failure
*/
int sendUSSD(const char* command, char* result, size_t maxLength);
/** Get link state
@param pRssi pointer to store the current RSSI in dBm, between -51 dBm and -113 dBm if known; -51 dBm means -51 dBm or more; -113 dBm means -113 dBm or less; 0 if unknown
@param pRegistrationState pointer to store the current registration state
@param pBearer pointer to store the current bearer
@return 0 on success, error code on failure
*/
int getLinkState(int* pRssi, LinkMonitor::REGISTRATION_STATE* pRegistrationState, LinkMonitor::BEARER* pBearer);
/** Get the ATCommandsInterface instance
@return Pointer to the ATCommandsInterface instance
*/
virtual ATCommandsInterface* getATCommandsInterface();
protected:
/** Initialise dongle.
* The following actions are performed:
* 1) Start AT interface thread
* 2) Wait for network registration
*/
virtual int init();
/** De-initialise dongle.
* The following actions are performed:
* 1) Tear down PPP session
* 2) Set SMS,USSD, and LinkMonitor subsystems to un-initialised
* 3) Close the AT commands interface
*/
virtual int cleanup();
private:
ATCommandsInterface m_at; //< Interface to AT commands processing
CDMASMSInterface m_CdmaSms; //< Interface to SMS manager (send/receive etc)
GSMSMSInterface m_GsmSms; //< Interface to SMS manager (send/receive etc)
USSDInterface m_ussd; //< Interface to USSD manager (send etc)
LinkMonitor m_linkMonitor; //< Interface to link monitor (RSSI)
PPPIPInterface m_ppp; //< Interface to PPP conection manager (IP assignment etc)
bool m_ipInit; //< Has PPIPInterface object (m_ppp) been initialised? true/false
bool m_smsInit; //< Has SMSInterface object (m_sms) been initialised? true/false
bool m_ussdInit; //< Has USSDInterface object (m_ussd) been initialised? true/false
bool m_linkMonitorInit; //< Has LinkMonitor object (m_linkMonitor) been initialised? true/false
bool m_atOpen; //< Is the interface to the ATCommandsInterface open? true/false
protected:
bool m_onePort;
bool m_gsm;
};
#include "WANDongle.h"
#include "serial/usb/USBSerialStream.h"
class UbloxUSBModem: public UbloxModem
{
public:
UbloxUSBModem();
virtual int init();
virtual int cleanup();
virtual int power(bool enable) { return 1; }
private:
WANDongle m_dongle; //< Interface to USB connected WAN dongle
USBSerialStream m_atStream; //< Serial interface to AT channel on modem
USBSerialStream m_pppStream; //< Serial interface to PPP channel on modem
bool m_dongleConnected; //< Is the dongle physically connected (does the USB stack respond)? true/false
};
#include "serial/io/IOSerialStream.h"
class UbloxSerModem: public UbloxModem
{
public:
UbloxSerModem();
virtual int power(bool enable) { return 1; }
private:
RawSerial m_Serial;
IOSerialStream m_atStream; //< Serial interface to AT channel on modem
};
#endif /* UBLOXMODEM_H_ */

6
libraries/net/cellular/UbloxUSBModem/UbloxUSBCDMAModem.cpp
View File

@ -33,7 +33,7 @@
UbloxUSBCDMAModem::UbloxUSBCDMAModem(PinName powerGatingPin /*= NC*/, bool powerGatingOnWhenPinHigh /* = true*/, int serial /* 0 */) : m_dongle(),
m_stream(m_dongle.getSerial(serial)),
m_at(&m_stream),
m_sms(&m_at), m_ppp(&m_stream, DEFAULT_MSISDN_CDMA),
m_sms(&m_at), m_ppp(&m_stream),
m_dongleConnected(false), m_ipInit(false), m_smsInit(false), m_atOpen(false),
m_powerGatingPin(powerGatingPin), m_powerGatingOnWhenPinHigh(powerGatingOnWhenPinHigh)
{
@ -88,7 +88,7 @@ int UbloxUSBCDMAModem::connect(const char* apn, const char* user, const char* pa
m_ipInit = true;
m_ppp.init();
}
m_ppp.setup(user, password);
m_ppp.setup(user, password, DEFAULT_MSISDN_CDMA);
int ret = init();
if(ret)
@ -341,7 +341,7 @@ int UbloxUSBCDMAModem::init()
return ret;
}
if(m_dongle.getDongleType() == WAN_DONGLE_TYPE_UBLOXC200)
if(m_dongle.getDongleType() == WAN_DONGLE_TYPE_UBLOX_LISAC200)
{
INFO("Using a UBLOX C200 Dongle");
}

6
libraries/net/cellular/UbloxUSBModem/UbloxUSBGSMModem.cpp
View File

@ -36,7 +36,7 @@ UbloxUSBGSMModem::UbloxUSBGSMModem(PinName powerGatingPin /*= NC*/, bool powerGa
m_sms(&m_at), // Construct SMSInterface with the ATCommandsInterface
m_ussd(&m_at), // Construct USSDInterface with the ATCommandsInterface
m_linkMonitor(&m_at), // Construct LinkMonitor with the ATCommandsInterface
m_ppp(&m_pppStream, DEFAULT_MSISDN_GSM), // Construct PPPIPInterface with the PPP serial channel
m_ppp(&m_pppStream), // Construct PPPIPInterface with the PPP serial channel
m_dongleConnected(false), // Dongle is initially not ready for anything
m_ipInit(false), // PPIPInterface connection is initially down
m_smsInit(false), // SMSInterface starts un-initialised
@ -185,7 +185,7 @@ int UbloxUSBGSMModem::connect(const char* apn, const char* user, const char* pas
m_ipInit = true;
m_ppp.init();
}
m_ppp.setup(user, password);
m_ppp.setup(user, password, DEFAULT_MSISDN_GSM);
int ret = init();
if(ret)
@ -543,7 +543,7 @@ int UbloxUSBGSMModem::init()
return ret;
}
if(m_dongle.getDongleType() == WAN_DONGLE_TYPE_UBX)
if(m_dongle.getDongleType() == WAN_DONGLE_TYPE_UBLOX_LISAU200)
{
INFO("Using a u-blox LISA-U");
}

4
libraries/net/lwip/lwip/lwipopts.h
View File

@ -48,7 +48,11 @@
// 32-bit alignment
#define MEM_ALIGNMENT 4
#if defined(TARGET_LPC4088)
#define MEM_SIZE 15360
#else
#define MEM_SIZE 16362
#endif
#define PBUF_POOL_SIZE 5
#define MEMP_NUM_TCP_PCB_LISTEN 4

5
libraries/tests/mbed/digitalin_digitalout/main.cpp
View File

@ -1,6 +1,5 @@
#include "test_env.h"
#if defined(TARGET_KL25Z)
DigitalOut out(PTA5);
DigitalIn in(PTC6);
@ -13,6 +12,10 @@ DigitalIn in(PTB1);
DigitalOut out(dp1);
DigitalIn in(dp2);
#elif defined(TARGET_NUCLEO_F103RB)
DigitalOut out(PC_6);
DigitalIn in(PB_8);
#else
DigitalOut out(p5);
DigitalIn in(p25);

4
libraries/tests/mbed/digitalinout/main.cpp
View File

@ -12,6 +12,10 @@ DigitalInOut d2(PTB1);
DigitalInOut d1(dp1);
DigitalInOut d2(dp2);
#elif defined(TARGET_NUCLEO_F103RB)
DigitalInOut d1(PC_6);
DigitalInOut d2(PB_8);
#else
DigitalInOut d1(p5);
DigitalInOut d2(p25);

10
libraries/tests/mbed/echo/main.cpp
View File

@ -1,9 +1,17 @@
#include "mbed.h"
#ifdef TARGET_NUCLEO_F103RB
#define TXPIN SERIAL_TX
#define RXPIN SERIAL_RX
#else
#define TXPIN USBTX
#define RXPIN USBRX
#endif
int main() {
char buf[256];
Serial pc(USBTX, USBRX);
Serial pc(TXPIN, RXPIN);
pc.baud(115200);
while (1) {

2
libraries/tests/mbed/i2c_eeprom/main.cpp
View File

@ -30,6 +30,8 @@ static const int i2c_delay_us = 0;
#if defined(TARGET_KL25Z)
I2C i2c(PTE0, PTE1);
#elif defined(TARGET_NUCLEO_F103RB)
I2C i2c(I2C_SDA, I2C_SCL);
#else
I2C i2c(p28, p27);
#endif

9
libraries/tests/mbed/portinout/main.cpp
View File

@ -44,6 +44,15 @@
#define P2_1 (1 << 5) // PTC5
#define P2_2 (1 << 6) // PTC6
#define PORT_2 PortC
#elif defined(TARGET_NUCLEO_F103RB)
#define P1_1 (1 << 6) // PC_6
#define P1_2 (1 << 5) // PC_5
#define PORT_1 PortC
#define P2_1 (1 << 8) // PB_8
#define P2_2 (1 << 9) // PB_9
#define PORT_2 PortB
#endif
#define MASK_1 (P1_1 | P1_2)

9
libraries/tests/mbed/portout_portin/main.cpp
View File

@ -44,6 +44,15 @@
#define P2_1 (1 << 5) // PTC5
#define P2_2 (1 << 6) // PTC6
#define PORT_2 PortC
#elif defined(TARGET_NUCLEO_F103RB)
#define P1_1 (1 << 6) // PC_6
#define P1_2 (1 << 5) // PC_5
#define PORT_1 PortC
#define P2_1 (1 << 8) // PB_8
#define P2_2 (1 << 9) // PB_9
#define PORT_2 PortB
#endif
#define MASK_1 (P1_1 | P1_2)

26
libraries/tests/mbed/pwm_led/pwm.cpp Normal file
View File

@ -0,0 +1,26 @@
#include "mbed.h"
#ifdef TARGET_NUCLEO_F103RB
PwmOut led(D3);
#else
#error This test is not supported on this target.
#endif
int main() {
float crt = 1.0, delta = 0.05;
led.period_ms(2); // 500Hz
while (true) {
led.write(crt);
wait_ms(50);
crt = crt + delta;
if (crt > 1.0) {
crt = 1.0;
delta = -delta;
}
else if (crt < 0) {
crt = 0;
delta = -delta;
}
}
}

2
libraries/tests/mbed/sd/main.cpp
View File

@ -4,6 +4,8 @@
#if defined(TARGET_KL25Z)
SDFileSystem sd(PTD2, PTD3, PTD1, PTD0, "sd");
#elif defined(TARGET_NUCLEO_F103RB)
SDFileSystem sd(D11, D12, D13, D10, "sd");
#else
SDFileSystem sd(p11, p12, p13, p14, "sd");
#endif

6
libraries/tests/mbed/serial_interrupt/main.cpp
View File

@ -3,8 +3,12 @@
DigitalOut led1(LED1);
DigitalOut led2(LED2);
#ifndef TARGET_NUCLEO_F103RB
Serial computer(USBTX, USBRX);
#else
Serial computer(SERIAL_TX, SERIAL_RX);
#endif
// This function is called when a character goes into the TX buffer.
void txCallback() {
led1 = !led1;

107
libraries/tests/mbed/spifi1/main.cpp Normal file
View File

@ -0,0 +1,107 @@
#include "test_env.h"
#include "mbed.h"
#include "spifi_rom_api.h"
__attribute__((section("SPIFI_MEM"))) const unsigned char cube_image[] = {
137,80,78,71,13,10,26,10,0,0,0,13,73,72,68,82,
0,0,0,150,0,0,0,200,8,2,0,0,0,133,231,143,
50,0,0,0,1,115,82,71,66,0,174,206,28,233,0,0,
0,4,103,65,77,65,0,0,177,143,11,252,97,5,0,0,
0,9,112,72,89,115,0,0,14,195,0,0,14,195,1,199,
111,168,100,0,0,156,193,73,68,65,84,120,94,236,253,103,
124,27,233,125,54,140,14,48,24,0,51,24,244,94,9,246,
0,0,0,0,73,69,78,68,174,66,96,130};
int cube_image_sz = sizeof(cube_image);
const unsigned char cube_image_ref[] = {
137,80,78,71,13,10,26,10,0,0,0,13,73,72,68,82,
0,0,0,150,0,0,0,200,8,2,0,0,0,133,231,143,
50,0,0,0,1,115,82,71,66,0,174,206,28,233,0,0,
0,4,103,65,77,65,0,0,177,143,11,252,97,5,0,0,
0,9,112,72,89,115,0,0,14,195,0,0,14,195,1,199,
111,168,100,0,0,156,193,73,68,65,84,120,94,236,253,103,
124,27,233,125,54,140,14,48,24,0,51,24,244,94,9,246,
0,0,0,0,73,69,78,68,174,66,96,130};
int cube_image_ref_sz = sizeof(cube_image_ref);
/*
* The SPIFI_ROM_PTR (0x1FFF1FF8) points to an area where the pointers to
* different drivers in ROM are stored.
*/
typedef struct {
/*const*/ unsigned p_usbd; // USBROMD
/*const*/ unsigned p_clib;
/*const*/ unsigned p_cand;
/*const*/ unsigned p_pwrd; // PWRROMD
/*const*/ unsigned p_promd; // DIVROMD
/*const*/ SPIFI_RTNS *pSPIFID; // SPIFIROMD
/*const*/ unsigned p_dev3;
/*const*/ unsigned p_dev4;
} ROM;
#define ROM_DRIVERS_PTR ((ROM *)(*((unsigned int *)SPIFI_ROM_PTR)))
#define IS_ADDR_IN_SPIFI(__addr) ( (((uint32_t)(__addr)) & 0xff000000) == SPIFI_MEM_BASE )
#define IS_ADDR_IN_IFLASH(__addr) ( (((uint32_t)(__addr)) & 0xff000000) == 0x10000000 )
static void initialize_spifi(void)
{
SPIFIobj* obj = (SPIFIobj*)malloc(sizeof(SPIFIobj));
if (obj == NULL) {
// Failed to allocate memory for ROM data
notify_completion(false);
}
// Turn on SPIFI block as it is disabled on reset
LPC_SC->PCONP |= 0x00010000;
// pinsel for SPIFI
LPC_IOCON->P2_7 = 5; /* SPIFI_CSN @ P2.7 */
LPC_IOCON->P0_22 = 5; /* SPIFI_CLK @ P0.22 */
LPC_IOCON->P0_15 = 5; /* SPIFI_IO2 @ P0.15 */
LPC_IOCON->P0_16 = 5; /* SPIFI_IO3 @ P0.16 */
LPC_IOCON->P0_17 = 5; /* SPIFI_IO1 @ P0.17 */
LPC_IOCON->P0_18 = 5; /* SPIFI_IO0 @ P0.18 */
uint32_t spifi_clk_div = (*((volatile uint32_t*)0x400FC1B4)) & 0x1f;
uint32_t spifi_clk_mhz = (SystemCoreClock / spifi_clk_div) / 1000000;
const SPIFI_RTNS* _spifi = ROM_DRIVERS_PTR->pSPIFID;
/* Typical time tCS is 20 ns min, we give 200 ns to be on safer side */
int rc = _spifi->spifi_init (obj, spifi_clk_mhz/5, S_FULLCLK+S_RCVCLK, spifi_clk_mhz);
if (rc) {
// Failed to initialize SPIFI
notify_completion(false);
}
}
int main() {
initialize_spifi();
// Make sure that cube_image is placed in SPIFI
if (!IS_ADDR_IN_SPIFI(cube_image)) {
notify_completion(false);
}
// Make sure that cube_image_ref is in IFLASH
if (IS_ADDR_IN_SPIFI(cube_image_ref)) {
notify_completion(false);
}
// Compare content
if (cube_image_sz != cube_image_ref_sz) {
notify_completion(false);
} else {
int i = 0;
for (; i < cube_image_sz; i++) {
if (cube_image[i] != cube_image_ref[i]) {
notify_completion(false);
}
}
}
notify_completion(true);
}

165
libraries/tests/mbed/spifi1/spifi_rom_api.h Normal file
View File

@ -0,0 +1,165 @@
/* definitions for ROM API for SPIFI in NXP MCUs
copyright (c) 2010 NXP Semiconductors
written by CAM start 4/16/10
first testing 5/12/10
OK with first SST & Winbond devices 6/8/10
OK with Gigadevice, Numonyx, Atmel,
some Macronyx 7/13/10
consensus with BK, performance optimized 8/24/10
this file is largely platform-independent */
#ifndef SPIFI_ROM_API_H
#define SPIFI_ROM_API_H
#define SPIFI_MEM_BASE 0x28000000
/* allocated size of the SPIFI memory area on this device */
#define MEM_AREA_SIZE 0x00001000
#define SPIFI_ROM_PTR 0x1FFF1FF8
/* define the symbol TESTING in the environment if test output desired */
/* maintain LONGEST_PROT >= the length (in bytes) of the largest
protection block of any serial flash that this driver handles */
#define LONGEST_PROT 68
/* protection/sector descriptors */
typedef struct {
unsigned base;
uint8_t flags;
signed char log2;
uint16_t rept;
} protEnt;
typedef union {
uint16_t hw;
uint8_t byte[2];
}stat_t;
/* the object that init returns, and other routines use as an operand */
typedef struct {
unsigned base, regbase, devSize, memSize;
uint8_t mfger, devType, devID, busy;
stat_t stat;
uint16_t reserved;
uint16_t set_prot, write_prot;
unsigned mem_cmd, prog_cmd;
uint16_t sectors, protBytes;
unsigned opts, errCheck;
uint8_t erase_shifts[4], erase_ops[4];
protEnt *protEnts;
char prot[LONGEST_PROT];
} SPIFIobj;
/* operands of program and erase */
typedef struct {
char *dest; /* starting address for programming or erasing */
unsigned length; /* number of bytes to be programmed or erased */
char *scratch; /* address of work area or NULL */
int protect; /* protection to apply after programming/erasing is done */
unsigned options; /* see the table below */
} SPIFIopers;
/* bits in options operands (MODE3, RCVCLK, and FULLCLK
have the same relationship as in the Control register) */
#define S_MODE3 1
#define S_MODE0 0
#define S_MINIMAL 2
#define S_MAXIMAL 0
#define S_FORCE_ERASE 4
#define S_ERASE_NOT_REQD 8
#define S_CALLER_ERASE 8
#define S_ERASE_AS_REQD 0
#define S_VERIFY_PROG 0x10
#define S_VERIFY_ERASE 0x20
#define S_NO_VERIFY 0
#define S_RCVCLK 0x80
#define S_INTCLK 0
#define S_FULLCLK 0x40
#define S_HALFCLK 0
#define S_DUAL 0x100
#define S_CALLER_PROT 0x200
#define S_DRIVER_PROT 0
/* the length of a standard program command is 256 on all devices */
#define PROG_SIZE 256
/* interface to ROM API */
typedef struct {
int (*spifi_init) (SPIFIobj *obj, unsigned csHigh, unsigned options,
unsigned mhz);
int (*spifi_program) (SPIFIobj *obj, char *source, SPIFIopers *opers);
int (*spifi_erase) (SPIFIobj *obj, SPIFIopers *opers);
/* mode switching */
void (*cancel_mem_mode)(SPIFIobj *obj);
void (*set_mem_mode) (SPIFIobj *obj);
/* mid level functions */
int (*checkAd) (SPIFIobj *obj, SPIFIopers *opers);
int (*setProt) (SPIFIobj *obj, SPIFIopers *opers, char *change,
char *saveProt);
int (*check_block) (SPIFIobj *obj, char *source, SPIFIopers *opers,
unsigned check_program);
int (*send_erase_cmd) (SPIFIobj *obj, unsigned char op, unsigned addr);
unsigned (*ck_erase) (SPIFIobj *obj, unsigned *addr, unsigned length);
int (*prog_block) (SPIFIobj *obj, char *source, SPIFIopers *opers,
unsigned *left_in_page);
unsigned (*ck_prog) (SPIFIobj *obj, char *source, char *dest, unsigned length);
/* low level functions */
void(*setSize) (SPIFIobj *obj, int value);
int (*setDev) (SPIFIobj *obj, unsigned opts, unsigned mem_cmd,
unsigned prog_cmd);
unsigned (*cmd) (uint8_t op, uint8_t addrLen, uint8_t intLen, unsigned short len);
unsigned (*readAd) (SPIFIobj *obj, unsigned cmd, unsigned addr);
void (*send04) (SPIFIobj *obj, uint8_t op, uint8_t len, unsigned value);
void (*wren_sendAd) (SPIFIobj *obj, unsigned cmd, unsigned addr, unsigned value);
int (*write_stat) (SPIFIobj *obj, uint8_t len, uint16_t value);
int (*wait_busy) (SPIFIobj *obj, uint8_t prog_or_erase);
} SPIFI_RTNS;
//#define define_spifi_romPtr(name) const SPIFI_RTNS *name=*((SPIFI_RTNS **)SPIFI_ROM_PTR)
/* example of using this interface:
#include "spifi_rom_api.h"
#define CSHIGH 4
#define SPIFI_MHZ 80
#define source_data_ad (char *)1234
int rc;
SPIFIopers opers;
define_spifi_romPtr(spifi);
SPIFIobj *obj = malloc(sizeof(SPIFIobj));
if (!obj) { can't allocate memory }
rc = spifi->spifi_init (obj, CSHIGH, S_FULLCLK+S_RCVCLK, SPIFI_MHZ);
if (rc) { investigate init error rc }
printf ("the serial flash contains %d bytes\n", obj->devSize);
opers.dest = where_to_program;
opers.length = how_many_bytes;
opers.scratch = NULL; // unprogrammed data is not saved/restored
opers.protect = -1; // save & restore protection
opers.options = S_VERIFY_PROG;
rc = spifi->spifi_program (obj, source_data_ad, &opers);
if (rc) { investigate program error rc }
*/
/* these are for normal users, including boot code */
int spifi_init (SPIFIobj *obj, unsigned csHigh, unsigned options, unsigned mhz);
int spifi_program (SPIFIobj *obj, char *source, SPIFIopers *opers);
int spifi_erase (SPIFIobj *obj, SPIFIopers *opers);
/* these are used by the manufacturer-specific init functions */
void setSize (SPIFIobj *obj, int value);
int setDev (SPIFIobj *obj, unsigned opts, unsigned mem_cmd, unsigned prog_cmd);
unsigned read04(SPIFIobj *obj, uint8_t op, uint8_t len);
int write_stat (SPIFIobj *obj, uint8_t len, uint16_t value);
void setProtEnts(SPIFIobj *obj, const protEnt *p, unsigned protTabLen);
#endif

100
libraries/tests/mbed/spifi2/main.cpp Normal file
View File

@ -0,0 +1,100 @@
#include "test_env.h"
#include "mbed.h"
#include "spifi_rom_api.h"
extern const unsigned char splash_image1[]; extern int splash_image1_sz;
extern const unsigned char splash_image2[]; extern int splash_image2_sz;
extern const unsigned char splash_image3[]; extern int splash_image3_sz;
extern const unsigned char splash_image4[]; extern int splash_image4_sz;
extern const unsigned char splash_image5[]; extern int splash_image5_sz;
extern const unsigned char splash_image6[]; extern int splash_image6_sz;
extern const unsigned char splash_image7[]; extern int splash_image7_sz;
extern const unsigned char splash_image8[]; extern int splash_image8_sz;
extern const unsigned char splash_image9[]; extern int splash_image9_sz;
extern const unsigned char splash_image10[]; extern int splash_image10_sz;
extern const unsigned char splash_image11[]; extern int splash_image11_sz;
extern const unsigned char splash_image12[]; extern int splash_image12_sz;
extern const unsigned char splash_image13[]; extern int splash_image13_sz;
extern const unsigned char splash_image14[]; extern int splash_image14_sz;
extern const unsigned char splash_image15[]; extern int splash_image15_sz;
/*
* The SPIFI_ROM_PTR (0x1FFF1FF8) points to an area where the pointers to
* different drivers in ROM are stored.
*/
typedef struct {
/*const*/ unsigned p_usbd; // USBROMD
/*const*/ unsigned p_clib;
/*const*/ unsigned p_cand;
/*const*/ unsigned p_pwrd; // PWRROMD
/*const*/ unsigned p_promd; // DIVROMD
/*const*/ SPIFI_RTNS *pSPIFID; // SPIFIROMD
/*const*/ unsigned p_dev3;
/*const*/ unsigned p_dev4;
} ROM;
#define ROM_DRIVERS_PTR ((ROM *)(*((unsigned int *)SPIFI_ROM_PTR)))
#define IS_ADDR_IN_SPIFI(__addr) ( (((uint32_t)(__addr)) & 0xff000000) == SPIFI_MEM_BASE )
#define IS_ADDR_IN_IFLASH(__addr) ( (((uint32_t)(__addr)) & 0xff000000) == 0x10000000 )
static void initialize_spifi(void)
{
SPIFIobj* obj = (SPIFIobj*)malloc(sizeof(SPIFIobj));
if (obj == NULL) {
// Failed to allocate memory for ROM data
notify_completion(false);
}
// Turn on SPIFI block as it is disabled on reset
LPC_SC->PCONP |= 0x00010000;
// pinsel for SPIFI
LPC_IOCON->P2_7 = 5; /* SPIFI_CSN @ P2.7 */
LPC_IOCON->P0_22 = 5; /* SPIFI_CLK @ P0.22 */
LPC_IOCON->P0_15 = 5; /* SPIFI_IO2 @ P0.15 */
LPC_IOCON->P0_16 = 5; /* SPIFI_IO3 @ P0.16 */
LPC_IOCON->P0_17 = 5; /* SPIFI_IO1 @ P0.17 */
LPC_IOCON->P0_18 = 5; /* SPIFI_IO0 @ P0.18 */
uint32_t spifi_clk_div = (*((volatile uint32_t*)0x400FC1B4)) & 0x1f;
uint32_t spifi_clk_mhz = (SystemCoreClock / spifi_clk_div) / 1000000;
const SPIFI_RTNS* _spifi = ROM_DRIVERS_PTR->pSPIFID;
/* Typical time tCS is 20 ns min, we give 200 ns to be on safer side */
int rc = _spifi->spifi_init (obj, spifi_clk_mhz/5, S_FULLCLK+S_RCVCLK, spifi_clk_mhz);
if (rc) {
// Failed to initialize SPIFI
notify_completion(false);
}
}
int main() {
initialize_spifi();
// Make sure that most files are placed in IFLASH
if (IS_ADDR_IN_SPIFI(splash_image1) ||
IS_ADDR_IN_SPIFI(splash_image2) ||
IS_ADDR_IN_SPIFI(splash_image3) ||
IS_ADDR_IN_SPIFI(splash_image4) ||
IS_ADDR_IN_SPIFI(splash_image5) ||
IS_ADDR_IN_SPIFI(splash_image6) ||
IS_ADDR_IN_SPIFI(splash_image7) ||
IS_ADDR_IN_SPIFI(splash_image8) ||
IS_ADDR_IN_SPIFI(splash_image9) ||
IS_ADDR_IN_SPIFI(splash_image10) ||
IS_ADDR_IN_SPIFI(splash_image11) ||
IS_ADDR_IN_SPIFI(splash_image12) ||
IS_ADDR_IN_SPIFI(splash_image13) ||
IS_ADDR_IN_SPIFI(splash_image14)) {
notify_completion(false);
}
// Make sure that splash_image15 is placed in SPIFI
if (!IS_ADDR_IN_SPIFI(splash_image15)) {
notify_completion(false);
}
notify_completion(true);
}

165
libraries/tests/mbed/spifi2/spifi_rom_api.h Normal file
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@ -0,0 +1,165 @@
/* definitions for ROM API for SPIFI in NXP MCUs
copyright (c) 2010 NXP Semiconductors
written by CAM start 4/16/10
first testing 5/12/10
OK with first SST & Winbond devices 6/8/10
OK with Gigadevice, Numonyx, Atmel,
some Macronyx 7/13/10
consensus with BK, performance optimized 8/24/10
this file is largely platform-independent */
#ifndef SPIFI_ROM_API_H
#define SPIFI_ROM_API_H
#define SPIFI_MEM_BASE 0x28000000
/* allocated size of the SPIFI memory area on this device */
#define MEM_AREA_SIZE 0x00001000
#define SPIFI_ROM_PTR 0x1FFF1FF8
/* define the symbol TESTING in the environment if test output desired */
/* maintain LONGEST_PROT >= the length (in bytes) of the largest
protection block of any serial flash that this driver handles */
#define LONGEST_PROT 68
/* protection/sector descriptors */
typedef struct {
unsigned base;
uint8_t flags;
signed char log2;
uint16_t rept;
} protEnt;
typedef union {
uint16_t hw;
uint8_t byte[2];
}stat_t;
/* the object that init returns, and other routines use as an operand */
typedef struct {
unsigned base, regbase, devSize, memSize;
uint8_t mfger, devType, devID, busy;
stat_t stat;
uint16_t reserved;
uint16_t set_prot, write_prot;
unsigned mem_cmd, prog_cmd;
uint16_t sectors, protBytes;
unsigned opts, errCheck;
uint8_t erase_shifts[4], erase_ops[4];
protEnt *protEnts;
char prot[LONGEST_PROT];
} SPIFIobj;
/* operands of program and erase */
typedef struct {
char *dest; /* starting address for programming or erasing */
unsigned length; /* number of bytes to be programmed or erased */
char *scratch; /* address of work area or NULL */
int protect; /* protection to apply after programming/erasing is done */
unsigned options; /* see the table below */
} SPIFIopers;
/* bits in options operands (MODE3, RCVCLK, and FULLCLK
have the same relationship as in the Control register) */
#define S_MODE3 1
#define S_MODE0 0
#define S_MINIMAL 2
#define S_MAXIMAL 0
#define S_FORCE_ERASE 4
#define S_ERASE_NOT_REQD 8
#define S_CALLER_ERASE 8
#define S_ERASE_AS_REQD 0
#define S_VERIFY_PROG 0x10
#define S_VERIFY_ERASE 0x20
#define S_NO_VERIFY 0
#define S_RCVCLK 0x80
#define S_INTCLK 0
#define S_FULLCLK 0x40
#define S_HALFCLK 0
#define S_DUAL 0x100
#define S_CALLER_PROT 0x200
#define S_DRIVER_PROT 0
/* the length of a standard program command is 256 on all devices */
#define PROG_SIZE 256
/* interface to ROM API */
typedef struct {
int (*spifi_init) (SPIFIobj *obj, unsigned csHigh, unsigned options,
unsigned mhz);
int (*spifi_program) (SPIFIobj *obj, char *source, SPIFIopers *opers);
int (*spifi_erase) (SPIFIobj *obj, SPIFIopers *opers);
/* mode switching */
void (*cancel_mem_mode)(SPIFIobj *obj);
void (*set_mem_mode) (SPIFIobj *obj);
/* mid level functions */
int (*checkAd) (SPIFIobj *obj, SPIFIopers *opers);
int (*setProt) (SPIFIobj *obj, SPIFIopers *opers, char *change,
char *saveProt);
int (*check_block) (SPIFIobj *obj, char *source, SPIFIopers *opers,
unsigned check_program);
int (*send_erase_cmd) (SPIFIobj *obj, unsigned char op, unsigned addr);
unsigned (*ck_erase) (SPIFIobj *obj, unsigned *addr, unsigned length);
int (*prog_block) (SPIFIobj *obj, char *source, SPIFIopers *opers,
unsigned *left_in_page);
unsigned (*ck_prog) (SPIFIobj *obj, char *source, char *dest, unsigned length);
/* low level functions */
void(*setSize) (SPIFIobj *obj, int value);
int (*setDev) (SPIFIobj *obj, unsigned opts, unsigned mem_cmd,
unsigned prog_cmd);
unsigned (*cmd) (uint8_t op, uint8_t addrLen, uint8_t intLen, unsigned short len);
unsigned (*readAd) (SPIFIobj *obj, unsigned cmd, unsigned addr);
void (*send04) (SPIFIobj *obj, uint8_t op, uint8_t len, unsigned value);
void (*wren_sendAd) (SPIFIobj *obj, unsigned cmd, unsigned addr, unsigned value);
int (*write_stat) (SPIFIobj *obj, uint8_t len, uint16_t value);
int (*wait_busy) (SPIFIobj *obj, uint8_t prog_or_erase);
} SPIFI_RTNS;
//#define define_spifi_romPtr(name) const SPIFI_RTNS *name=*((SPIFI_RTNS **)SPIFI_ROM_PTR)
/* example of using this interface:
#include "spifi_rom_api.h"
#define CSHIGH 4
#define SPIFI_MHZ 80
#define source_data_ad (char *)1234
int rc;
SPIFIopers opers;
define_spifi_romPtr(spifi);
SPIFIobj *obj = malloc(sizeof(SPIFIobj));
if (!obj) { can't allocate memory }
rc = spifi->spifi_init (obj, CSHIGH, S_FULLCLK+S_RCVCLK, SPIFI_MHZ);
if (rc) { investigate init error rc }
printf ("the serial flash contains %d bytes\n", obj->devSize);
opers.dest = where_to_program;
opers.length = how_many_bytes;
opers.scratch = NULL; // unprogrammed data is not saved/restored
opers.protect = -1; // save & restore protection
opers.options = S_VERIFY_PROG;
rc = spifi->spifi_program (obj, source_data_ad, &opers);
if (rc) { investigate program error rc }
*/
/* these are for normal users, including boot code */
int spifi_init (SPIFIobj *obj, unsigned csHigh, unsigned options, unsigned mhz);
int spifi_program (SPIFIobj *obj, char *source, SPIFIopers *opers);
int spifi_erase (SPIFIobj *obj, SPIFIopers *opers);
/* these are used by the manufacturer-specific init functions */
void setSize (SPIFIobj *obj, int value);
int setDev (SPIFIobj *obj, unsigned opts, unsigned mem_cmd, unsigned prog_cmd);
unsigned read04(SPIFIobj *obj, uint8_t op, uint8_t len);
int write_stat (SPIFIobj *obj, uint8_t len, uint16_t value);
void setProtEnts(SPIFIobj *obj, const protEnt *p, unsigned protTabLen);
#endif

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26
setup.py
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@ -4,6 +4,10 @@ PyPI package for the Mbed SDK
"""
from distutils.core import setup
from setuptools import find_packages
from os.path import isfile, join
from tempfile import TemporaryFile
from shutil import copyfileobj
LICENSE = open('LICENSE').read()
DESCRIPTION = """A set of Python scripts that can be used to compile programs written on top of the `mbed framework`_. It can also be used to export mbed projects to other build systems and IDEs (uVision, IAR, makefiles).
@ -12,8 +16,21 @@ DESCRIPTION = """A set of Python scripts that can be used to compile programs wr
OWNER_NAMES = 'emilmont, bogdanm'
OWNER_EMAILS = 'Emilio.Monti@arm.com, Bogdan.Marinescu@arm.com'
# If private_settings.py exists in workspace_tools, read it in a temporary file
# so it can be restored later
private_settings = join('workspace_tools', 'private_settings.py')
backup = None
if isfile(private_settings):
backup = TemporaryFile()
with open(private_settings, "rb") as f:
copyfileobj(f, backup)
# Create the correct private_settings.py for the distribution
with open(private_settings, "wt") as f:
f.write("from mbed_settings import *\n")
setup(name='mbed-tools',
version='0.1.7',
version='0.1.14',
description='Build and test system for mbed',
long_description=DESCRIPTION,
author=OWNER_NAMES,
@ -21,4 +38,11 @@ setup(name='mbed-tools',
maintainer=OWNER_NAMES,
maintainer_email=OWNER_EMAILS,
url='https://github.com/mbedmicro/mbed',
packages=find_packages(),
license=LICENSE)
# Restore previous private_settings if needed
if backup:
backup.seek(0)
with open(private_settings, "wb") as f:
copyfileobj(backup, f)

4
workspace_tools/build_release.py
View File

@ -34,7 +34,9 @@ OFFICIAL_MBED_LIBRARY_BUILD = (
('LPC1347', ('ARM',)),
('LPC4088', ('ARM', 'GCC_ARM', 'GCC_CR')),
('LPC1114', ('uARM',)),
('NUCLEO_F103RB', ('ARM', 'uARM', 'GCC_ARM')),
('KL46Z', ('ARM', 'GCC_ARM')),
('NUCLEO_F103RB', ('ARM',)),
('LPC11U35_401', ('ARM', 'uARM')),
)

9
workspace_tools/export/README.md
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@ -74,4 +74,13 @@ Exporter Toolchain/Platform Support
<td></td>
<td>&#10003;</td>
</tr>
<tr>
<td>Freescale KL46Z</td>
<td></td>
<td></td>
<td></td>
<td>&#10003;</td>
<td></td>
<td>&#10003;</td>
</tr>
</table>

46
workspace_tools/export/gcc_arm_kl05z.tmpl Normal file
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@ -0,0 +1,46 @@
# This file was automagically generated by mbed.org. For more information,
# see http://mbed.org/handbook/Exporting-to-GCC-ARM-Embedded
GCC_BIN =
PROJECT = {{name}}
OBJECTS = {% for f in to_be_compiled %}{{f}} {% endfor %}
SYS_OBJECTS = {% for f in object_files %}{{f}} {% endfor %}
INCLUDE_PATHS = {% for p in include_paths %}-I{{p}} {% endfor %}
LIBRARY_PATHS = {% for p in library_paths %}-L{{p}} {% endfor %}
LIBRARIES = {% for lib in libraries %}-l{{lib}} {% endfor %}
LINKER_SCRIPT = {{linker_script}}
###############################################################################
AS = $(GCC_BIN)arm-none-eabi-as
CC = $(GCC_BIN)arm-none-eabi-gcc
CPP = $(GCC_BIN)arm-none-eabi-g++
LD = $(GCC_BIN)arm-none-eabi-gcc
OBJCOPY = $(GCC_BIN)arm-none-eabi-objcopy
CPU = -mcpu=cortex-m0plus -mthumb
CC_FLAGS = $(CPU) -c -Os -fno-common -fmessage-length=0 -Wall -fno-exceptions -ffunction-sections -fdata-sections
CC_SYMBOLS = {% for s in symbols %}-D{{s}} {% endfor %}
LD_FLAGS = -mcpu=cortex-m0plus -mthumb -Wl,--gc-sections --specs=nano.specs -u _printf_float -u _scanf_float
LD_SYS_LIBS = -lstdc++ -lsupc++ -lm -lc -lgcc -lnosys
all: $(PROJECT).bin
clean:
rm -f $(PROJECT).bin $(PROJECT).elf $(OBJECTS)
.s.o:
$(AS) $(CPU) -o $@ $<
.c.o:
$(CC) $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu99 $(INCLUDE_PATHS) -o $@ $<
.cpp.o:
$(CPP) $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu++98 $(INCLUDE_PATHS) -o $@ $<
$(PROJECT).elf: $(OBJECTS) $(SYS_OBJECTS)
$(LD) $(LD_FLAGS) -T$(LINKER_SCRIPT) $(LIBRARY_PATHS) -o $@ $^ $(LIBRARIES) $(LD_SYS_LIBS) $(LIBRARIES) $(LD_SYS_LIBS)
$(PROJECT).bin: $(PROJECT).elf
$(OBJCOPY) -O binary $< $@

46
workspace_tools/export/gcc_arm_kl46z.tmpl Normal file
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@ -0,0 +1,46 @@
# This file was automagically generated by mbed.org. For more information,
# see http://mbed.org/handbook/Exporting-to-GCC-ARM-Embedded
GCC_BIN =
PROJECT = {{name}}
OBJECTS = {% for f in to_be_compiled %}{{f}} {% endfor %}
SYS_OBJECTS = {% for f in object_files %}{{f}} {% endfor %}
INCLUDE_PATHS = {% for p in include_paths %}-I{{p}} {% endfor %}
LIBRARY_PATHS = {% for p in library_paths %}-L{{p}} {% endfor %}
LIBRARIES = {% for lib in libraries %}-l{{lib}} {% endfor %}
LINKER_SCRIPT = {{linker_script}}
###############################################################################
AS = $(GCC_BIN)arm-none-eabi-as
CC = $(GCC_BIN)arm-none-eabi-gcc
CPP = $(GCC_BIN)arm-none-eabi-g++
LD = $(GCC_BIN)arm-none-eabi-gcc
OBJCOPY = $(GCC_BIN)arm-none-eabi-objcopy
CPU = -mcpu=cortex-m0plus -mthumb
CC_FLAGS = $(CPU) -c -Os -fno-common -fmessage-length=0 -Wall -fno-exceptions -ffunction-sections -fdata-sections
CC_SYMBOLS = {% for s in symbols %}-D{{s}} {% endfor %}
LD_FLAGS = -mcpu=cortex-m0plus -mthumb -Wl,--gc-sections --specs=nano.specs -u _printf_float -u _scanf_float
LD_SYS_LIBS = -lstdc++ -lsupc++ -lm -lc -lgcc -lnosys
all: $(PROJECT).bin
clean:
rm -f $(PROJECT).bin $(PROJECT).elf $(OBJECTS)
.s.o:
$(AS) $(CPU) -o $@ $<
.c.o:
$(CC) $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu99 $(INCLUDE_PATHS) -o $@ $<
.cpp.o:
$(CPP) $(CC_FLAGS) $(CC_SYMBOLS) -std=gnu++98 $(INCLUDE_PATHS) -o $@ $<
$(PROJECT).elf: $(OBJECTS) $(SYS_OBJECTS)
$(LD) $(LD_FLAGS) -T$(LINKER_SCRIPT) $(LIBRARY_PATHS) -o $@ $^ $(LIBRARIES) $(LD_SYS_LIBS) $(LIBRARIES) $(LD_SYS_LIBS)
$(PROJECT).bin: $(PROJECT).elf
$(OBJCOPY) -O binary $< $@

2
workspace_tools/export/gccarm.py
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@ -21,7 +21,7 @@ from os.path import splitext, basename
class GccArm(Exporter):
NAME = 'GccArm'
TOOLCHAIN = 'GCC_ARM'
TARGETS = ['LPC1768','KL25Z','LPC4088']
TARGETS = ['LPC1768','KL05Z','KL25Z','KL46Z','LPC4088']
DOT_IN_RELATIVE_PATH = True
def generate(self):

2
workspace_tools/export/uvision4.py
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@ -21,7 +21,7 @@ from os.path import basename
class Uvision4(Exporter):
NAME = 'uVision4'
TARGETS = ['LPC1768', 'LPC11U24', 'KL25Z', 'LPC1347', 'LPC1114', 'LPC11C24', 'LPC4088', 'LPC812', 'NUCLEO_F103RB']
TARGETS = ['LPC1768', 'LPC11U24', 'KL05Z', 'KL25Z', 'KL46Z', 'LPC1347', 'LPC1114', 'LPC11C24', 'LPC4088', 'LPC812', 'NUCLEO_F103RB']
USING_MICROLIB = ['LPC11U24', 'LPC1114', 'LPC11C24', 'LPC812', 'NUCLEO_F103RB']

204
workspace_tools/export/uvision4_kl05z.uvopt.tmpl Normal file
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@ -0,0 +1,204 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
<SchemaVersion>1.0</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Extensions>
<cExt>*.c</cExt>
<aExt>*.s*; *.src; *.a*</aExt>
<oExt>*.obj</oExt>
<lExt>*.lib</lExt>
<tExt>*.txt; *.h; *.inc</tExt>
<pExt>*.plm</pExt>
<CppX>*.cpp</CppX>
</Extensions>
<DaveTm>
<dwLowDateTime>0</dwLowDateTime>
<dwHighDateTime>0</dwHighDateTime>
</DaveTm>
<Target>
<TargetName>mbed FRDM-KL05Z</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<CLKADS>8000000</CLKADS>
<OPTTT>
<gFlags>1</gFlags>
<BeepAtEnd>1</BeepAtEnd>
<RunSim>1</RunSim>
<RunTarget>0</RunTarget>
</OPTTT>
<OPTHX>
<HexSelection>1</HexSelection>
<FlashByte>65535</FlashByte>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
</OPTHX>
<OPTLEX>
<PageWidth>79</PageWidth>
<PageLength>66</PageLength>
<TabStop>8</TabStop>
<ListingPath>.\build\</ListingPath>
</OPTLEX>
<ListingPage>
<CreateCListing>1</CreateCListing>
<CreateAListing>1</CreateAListing>
<CreateLListing>1</CreateLListing>
<CreateIListing>0</CreateIListing>
<AsmCond>1</AsmCond>
<AsmSymb>1</AsmSymb>
<AsmXref>0</AsmXref>
<CCond>1</CCond>
<CCode>0</CCode>
<CListInc>0</CListInc>
<CSymb>0</CSymb>
<LinkerCodeListing>0</LinkerCodeListing>
</ListingPage>
<OPTXL>
<LMap>1</LMap>
<LComments>1</LComments>
<LGenerateSymbols>1</LGenerateSymbols>
<LLibSym>1</LLibSym>
<LLines>1</LLines>
<LLocSym>1</LLocSym>
<LPubSym>1</LPubSym>
<LXref>0</LXref>
<LExpSel>0</LExpSel>
</OPTXL>
<OPTFL>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>14</CpuCode>
<Books>
<Book>
<Number>0</Number>
<Title>Data Sheet</Title>
<Path>DATASHTS\Freescale\KL05PB.pdf</Path>
</Book>
<Book>
<Number>1</Number>
<Title>Technical Reference Manual</Title>
<Path>datashts\arm\cortex_m0p\r0p0\DDI0484B_CORTEX_M0P_R0P0_TRM.PDF</Path>
</Book>
<Book>
<Number>2</Number>
<Title>Generic User Guide</Title>
<Path>datashts\arm\cortex_m0p\r0p0\DUI0662A_CORTEX_M0P_R0P0_DGUG.PDF</Path>
</Book>
</Books>
<DllOpt>
<SimDllName>SARMCM3.DLL</SimDllName>
<SimDllArguments></SimDllArguments>
<SimDlgDllName>DARMCM1.DLL</SimDlgDllName>
<SimDlgDllArguments>-pCM0+</SimDlgDllArguments>
<TargetDllName>SARMCM3.DLL</TargetDllName>
<TargetDllArguments></TargetDllArguments>
<TargetDlgDllName>TARMCM1.DLL</TargetDlgDllName>
<TargetDlgDllArguments>-pCM0+</TargetDlgDllArguments>
</DllOpt>
<DebugOpt>
<uSim>0</uSim>
<uTrg>1</uTrg>
<sLdApp>1</sLdApp>
<sGomain>1</sGomain>
<sRbreak>1</sRbreak>
<sRwatch>1</sRwatch>
<sRmem>1</sRmem>
<sRfunc>1</sRfunc>
<sRbox>1</sRbox>
<tLdApp>1</tLdApp>
<tGomain>1</tGomain>
<tRbreak>1</tRbreak>
<tRwatch>1</tRwatch>
<tRmem>1</tRmem>
<tRfunc>0</tRfunc>
<tRbox>1</tRbox>
<sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime>
<nTsel>14</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
<sDlgDll></sDlgDll>
<sDlgPa></sDlgPa>
<sIfile></sIfile>
<tDll></tDll>
<tDllPa></tDllPa>
<tDlgDll></tDlgDll>
<tDlgPa></tDlgPa>
<tIfile></tIfile>
<pMon>BIN\CMSIS_AGDI.dll</pMon>
</DebugOpt>
<TargetDriverDllRegistry>
<SetRegEntry>
<Number>0</Number>
<Key>ULP2CM3</Key>
<Name>-O2510 -S0 -C0 -FO15 -FD20000000 -FC800 -FN1 -FF0MK_P32_48MHZ -FS00 -FL008000)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>CMSIS_AGDI</Key>
<Name>-X"MBED CMSIS-DAP" -UA000000001 -O462 -S0 -C0 -N00("ARM CoreSight SW-DP") -D00(0BC11477) -L00(0) -FO15 -FD20000000 -FC800 -FN1 -FF0MK_P32_48MHZ -FS00 -FL08000</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint/>
<DebugFlag>
<trace>0</trace>
<periodic>0</periodic>
<aLwin>0</aLwin>
<aCover>0</aCover>
<aSer1>0</aSer1>
<aSer2>0</aSer2>
<aPa>0</aPa>
<viewmode>0</viewmode>
<vrSel>0</vrSel>
<aSym>0</aSym>
<aTbox>0</aTbox>
<AscS1>0</AscS1>
<AscS2>0</AscS2>
<AscS3>0</AscS3>
<aSer3>0</aSer3>
<eProf>0</eProf>
<aLa>0</aLa>
<aPa1>0</aPa1>
<AscS4>0</AscS4>
<aSer4>0</aSer4>
<StkLoc>0</StkLoc>
<TrcWin>0</TrcWin>
<newCpu>0</newCpu>
<uProt>0</uProt>
</DebugFlag>
<LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile>
</TargetOption>
</Target>
<Group>
<GroupName>src</GroupName>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>1</FileNumber>
<FileType>8</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>1</TopLine>
<CurrentLine>2</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>main.cpp</PathWithFileName>
<FilenameWithoutPath>main.cpp</FilenameWithoutPath>
</File>
</Group>
</ProjectOpt>

423
workspace_tools/export/uvision4_kl05z.uvproj.tmpl Normal file
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@ -0,0 +1,423 @@
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
<SchemaVersion>1.1</SchemaVersion>
<Header>###This file was automagically generated by mbed.org. For more information, see http://mbed.org/handbook/Exporting-To-Uvision </Header>
<Targets>
<Target>
<TargetName>mbed FRDM-KL05Z</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<TargetCommonOption>
<Device>MKL05Z32xxx4</Device>
<Vendor>Freescale Semiconductor</Vendor>
<Cpu>IRAM(0x1FFFFC00-0x1FFFFFFF) IRAM2(0x20000000-0x20000BFF) IROM(0x0-0x07FFF) CLOCK(8000000) CPUTYPE("Cortex-M0+") ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile>"STARTUP\Freescale\Kinetis\startup_MKL05Z4.s" ("Freescale MKL05Zxxxxxx4 Startup Code")</StartupFile>
<FlashDriverDll>ULP2CM3(-O2510 -S0 -C0 -FO15 -FD20000000 -FC800 -FN1 -FF0MK_P32_48MHZ -FS00 -FL08000)</FlashDriverDll>
<DeviceId>6544</DeviceId>
<RegisterFile>MKL05Z4.H</RegisterFile>
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile>SFD\Freescale\Kinetis\MKL05Z4.sfr</SFDFile>
<UseEnv>0</UseEnv>
<BinPath></BinPath>
<IncludePath></IncludePath>
<LibPath></LibPath>
<RegisterFilePath>Freescale\Kinetis\</RegisterFilePath>
<DBRegisterFilePath>Freescale\Kinetis\</DBRegisterFilePath>
<TargetStatus>
<Error>0</Error>
<ExitCodeStop>0</ExitCodeStop>
<ButtonStop>0</ButtonStop>
<NotGenerated>0</NotGenerated>
<InvalidFlash>1</InvalidFlash>
</TargetStatus>
<OutputDirectory>.\build\</OutputDirectory>
<OutputName>{{name}}</OutputName>
<CreateExecutable>1</CreateExecutable>
<CreateLib>0</CreateLib>
<CreateHexFile>0</CreateHexFile>
<DebugInformation>1</DebugInformation>
<BrowseInformation>1</BrowseInformation>
<ListingPath>.\build\</ListingPath>
<HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K>
<CreateBatchFile>0</CreateBatchFile>
<BeforeCompile>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
<nStopU2X>0</nStopU2X>
</BeforeCompile>
<BeforeMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
</BeforeMake>
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name>fromelf --bin -o build\{{name}}_KL05Z.bin build\{{name}}.axf</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
</AfterMake>
<SelectedForBatchBuild>0</SelectedForBatchBuild>
<SVCSIdString></SVCSIdString>
</TargetCommonOption>
<CommonProperty>
<UseCPPCompiler>0</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
</CommonProperty>
<DllOption>
<SimDllName>SARMCM3.DLL</SimDllName>
<SimDllArguments></SimDllArguments>
<SimDlgDll>DARMCM1.DLL</SimDlgDll>
<SimDlgDllArguments>-pCM0+</SimDlgDllArguments>
<TargetDllName>SARMCM3.DLL</TargetDllName>
<TargetDllArguments></TargetDllArguments>
<TargetDlgDll>TARMCM1.DLL</TargetDlgDll>
<TargetDlgDllArguments>-pCM0+</TargetDlgDllArguments>
</DllOption>
<DebugOption>
<OPTHX>
<HexSelection>1</HexSelection>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
<Oh166RecLen>16</Oh166RecLen>
</OPTHX>
<Simulator>
<UseSimulator>0</UseSimulator>
<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
<RunToMain>1</RunToMain>
<RestoreBreakpoints>1</RestoreBreakpoints>
<RestoreWatchpoints>1</RestoreWatchpoints>
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
<RestoreFunctions>1</RestoreFunctions>
<RestoreToolbox>1</RestoreToolbox>
<LimitSpeedToRealTime>0</LimitSpeedToRealTime>
</Simulator>
<Target>
<UseTarget>1</UseTarget>
<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
<RunToMain>1</RunToMain>
<RestoreBreakpoints>1</RestoreBreakpoints>
<RestoreWatchpoints>1</RestoreWatchpoints>
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
<RestoreFunctions>0</RestoreFunctions>
<RestoreToolbox>1</RestoreToolbox>
</Target>
<RunDebugAfterBuild>0</RunDebugAfterBuild>
<TargetSelection>14</TargetSelection>
<SimDlls>
<CpuDll></CpuDll>
<CpuDllArguments></CpuDllArguments>
<PeripheralDll></PeripheralDll>
<PeripheralDllArguments></PeripheralDllArguments>
<InitializationFile></InitializationFile>
</SimDlls>
<TargetDlls>
<CpuDll></CpuDll>
<CpuDllArguments></CpuDllArguments>
<PeripheralDll></PeripheralDll>
<PeripheralDllArguments></PeripheralDllArguments>
<InitializationFile></InitializationFile>
<Driver>BIN\CMSIS_AGDI.dll</Driver>
</TargetDlls>
</DebugOption>
<Utilities>
<Flash1>
<UseTargetDll>1</UseTargetDll>
<UseExternalTool>0</UseExternalTool>
<RunIndependent>0</RunIndependent>
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
<Capability>1</Capability>
<DriverSelection>4105</DriverSelection>
</Flash1>
<Flash2>BIN\CMSIS_AGDI.dll</Flash2>
<Flash3>"" ()</Flash3>
<Flash4></Flash4>
</Utilities>
<TargetArmAds>
<ArmAdsMisc>
<GenerateListings>0</GenerateListings>
<asHll>1</asHll>
<asAsm>1</asAsm>
<asMacX>1</asMacX>
<asSyms>1</asSyms>
<asFals>1</asFals>
<asDbgD>1</asDbgD>
<asForm>1</asForm>
<ldLst>0</ldLst>
<ldmm>1</ldmm>
<ldXref>1</ldXref>
<BigEnd>0</BigEnd>
<AdsALst>1</AdsALst>
<AdsACrf>1</AdsACrf>
<AdsANop>0</AdsANop>
<AdsANot>0</AdsANot>
<AdsLLst>1</AdsLLst>
<AdsLmap>1</AdsLmap>
<AdsLcgr>1</AdsLcgr>
<AdsLsym>1</AdsLsym>
<AdsLszi>1</AdsLszi>
<AdsLtoi>1</AdsLtoi>
<AdsLsun>1</AdsLsun>
<AdsLven>1</AdsLven>
<AdsLsxf>1</AdsLsxf>
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>"Cortex-M0+"</AdsCpuType>
<RvctDeviceName></RvctDeviceName>
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
<hadIROM>1</hadIROM>
<hadIRAM>1</hadIRAM>
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>0</RvdsVP>
<hadIRAM2>1</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>8</StupSel>
<useUlib>0</useUlib>
<EndSel>0</EndSel>
<uLtcg>0</uLtcg>
<RoSelD>3</RoSelD>
<RwSelD>3</RwSelD>
<CodeSel>0</CodeSel>
<OptFeed>0</OptFeed>
<NoZi1>0</NoZi1>
<NoZi2>0</NoZi2>
<NoZi3>0</NoZi3>
<NoZi4>0</NoZi4>
<NoZi5>0</NoZi5>
<Ro1Chk>0</Ro1Chk>
<Ro2Chk>0</Ro2Chk>
<Ro3Chk>0</Ro3Chk>
<Ir1Chk>1</Ir1Chk>
<Ir2Chk>0</Ir2Chk>
<Ra1Chk>0</Ra1Chk>
<Ra2Chk>0</Ra2Chk>
<Ra3Chk>0</Ra3Chk>
<Im1Chk>1</Im1Chk>
<Im2Chk>0</Im2Chk>
<OnChipMemories>
<Ocm1>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm1>
<Ocm2>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm2>
<Ocm3>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm3>
<Ocm4>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm4>
<Ocm5>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm5>
<Ocm6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm6>
<IRAM>
<Type>0</Type>
<StartAddress>0x1ffffc00</StartAddress>
<Size>0x400</Size>
</IRAM>
<IROM>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x8000</Size>
</IROM>
<XRAM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</XRAM>
<OCR_RVCT1>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT1>
<OCR_RVCT2>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT2>
<OCR_RVCT3>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT3>
<OCR_RVCT4>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x8000</Size>
</OCR_RVCT4>
<OCR_RVCT5>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT5>
<OCR_RVCT6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT6>
<OCR_RVCT7>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT7>
<OCR_RVCT8>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT8>
<OCR_RVCT9>
<Type>0</Type>
<StartAddress>0x1ffffc00</StartAddress>
<Size>0x400</Size>
</OCR_RVCT9>
<OCR_RVCT10>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector></RvctStartVector>
</ArmAdsMisc>
<Cads>
<interw>1</interw>
<Optim>1</Optim>
<oTime>0</oTime>
<SplitLS>0</SplitLS>
<OneElfS>0</OneElfS>
<Strict>0</Strict>
<EnumInt>0</EnumInt>
<PlainCh>0</PlainCh>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<wLevel>0</wLevel>
<uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<VariousControls>
<MiscControls>--gnu</MiscControls>
<Define>{% for s in symbols %} {{s}}, {% endfor %}</Define>
<Undefine></Undefine>
<IncludePath> {% for path in include_paths %} {{path}}; {% endfor %} </IncludePath>
</VariousControls>
</Cads>
<Aads>
<interw>1</interw>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<thumb>0</thumb>
<SplitLS>0</SplitLS>
<SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn>
<uSurpInc>0</uSurpInc>
<VariousControls>
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Aads>
<LDads>
<umfTarg>0</umfTarg>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<noStLib>0</noStLib>
<RepFail>1</RepFail>
<useFile>0</useFile>
<TextAddressRange>0x00000000</TextAddressRange>
<DataAddressRange>0x10000000</DataAddressRange>
<ScatterFile>{{scatter_file}}</ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc>
{% for file in object_files %}
{{file}}
{% endfor %}
</Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
</TargetArmAds>
</TargetOption>
<Groups>
{% for group,files in source_files %}
<Group>
<GroupName>{{group}}</GroupName>
<Files>
{% for file in files %}
<File>
<FileName>{{file.name}}</FileName>
<FileType>{{file.type}}</FileType>
<FilePath>{{file.path}}</FilePath>
{%if file.type == "1" %}
<FileOption>
<FileArmAds>
<Cads>
<VariousControls>
<MiscControls>--c99</MiscControls>
</VariousControls>
</Cads>
</FileArmAds>
</FileOption>
{% endif %}
</File>
{% endfor %}
</Files>
</Group>
{% endfor %}
</Groups>
</Target>
</Targets>
</Project>

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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
<SchemaVersion>1.0</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Extensions>
<cExt>*.c</cExt>
<aExt>*.s*; *.src; *.a*</aExt>
<oExt>*.obj</oExt>
<lExt>*.lib</lExt>
<tExt>*.txt; *.h; *.inc</tExt>
<pExt>*.plm</pExt>
<CppX>*.cpp</CppX>
</Extensions>
<DaveTm>
<dwLowDateTime>0</dwLowDateTime>
<dwHighDateTime>0</dwHighDateTime>
</DaveTm>
<Target>
<TargetName>mbed FRDM-KL46Z</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<CLKADS>8000000</CLKADS>
<OPTTT>
<gFlags>1</gFlags>
<BeepAtEnd>1</BeepAtEnd>
<RunSim>1</RunSim>
<RunTarget>0</RunTarget>
</OPTTT>
<OPTHX>
<HexSelection>1</HexSelection>
<FlashByte>65535</FlashByte>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
</OPTHX>
<OPTLEX>
<PageWidth>79</PageWidth>
<PageLength>66</PageLength>
<TabStop>8</TabStop>
<ListingPath>.\build\</ListingPath>
</OPTLEX>
<ListingPage>
<CreateCListing>1</CreateCListing>
<CreateAListing>1</CreateAListing>
<CreateLListing>1</CreateLListing>
<CreateIListing>0</CreateIListing>
<AsmCond>1</AsmCond>
<AsmSymb>1</AsmSymb>
<AsmXref>0</AsmXref>
<CCond>1</CCond>
<CCode>0</CCode>
<CListInc>0</CListInc>
<CSymb>0</CSymb>
<LinkerCodeListing>0</LinkerCodeListing>
</ListingPage>
<OPTXL>
<LMap>1</LMap>
<LComments>1</LComments>
<LGenerateSymbols>1</LGenerateSymbols>
<LLibSym>1</LLibSym>
<LLines>1</LLines>
<LLocSym>1</LLocSym>
<LPubSym>1</LPubSym>
<LXref>0</LXref>
<LExpSel>0</LExpSel>
</OPTXL>
<OPTFL>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>14</CpuCode>
<Books>
<Book>
<Number>0</Number>
<Title>Data Sheet</Title>
<Path>DATASHTS\Freescale\K40PB.pdf</Path>
</Book>
<Book>
<Number>1</Number>
<Title>Technical Reference Manual</Title>
<Path>datashts\arm\cortex_m0p\r0p0\DDI0484B_CORTEX_M0P_R0P0_TRM.PDF</Path>
</Book>
<Book>
<Number>2</Number>
<Title>Generic User Guide</Title>
<Path>datashts\arm\cortex_m0p\r0p0\DUI0662A_CORTEX_M0P_R0P0_DGUG.PDF</Path>
</Book>
</Books>
<DllOpt>
<SimDllName>SARMCM3.DLL</SimDllName>
<SimDllArguments></SimDllArguments>
<SimDlgDllName>DARMCM1.DLL</SimDlgDllName>
<SimDlgDllArguments>-pCM0+</SimDlgDllArguments>
<TargetDllName>SARMCM3.DLL</TargetDllName>
<TargetDllArguments></TargetDllArguments>
<TargetDlgDllName>TARMCM1.DLL</TargetDlgDllName>
<TargetDlgDllArguments>-pCM0+</TargetDlgDllArguments>
</DllOpt>
<DebugOpt>
<uSim>0</uSim>
<uTrg>1</uTrg>
<sLdApp>1</sLdApp>
<sGomain>1</sGomain>
<sRbreak>1</sRbreak>
<sRwatch>1</sRwatch>
<sRmem>1</sRmem>
<sRfunc>1</sRfunc>
<sRbox>1</sRbox>
<tLdApp>1</tLdApp>
<tGomain>1</tGomain>
<tRbreak>1</tRbreak>
<tRwatch>1</tRwatch>
<tRmem>1</tRmem>
<tRfunc>0</tRfunc>
<tRbox>1</tRbox>
<sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime>
<nTsel>14</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
<sDlgDll></sDlgDll>
<sDlgPa></sDlgPa>
<sIfile></sIfile>
<tDll></tDll>
<tDllPa></tDllPa>
<tDlgDll></tDlgDll>
<tDlgPa></tDlgPa>
<tIfile></tIfile>
<pMon>BIN\CMSIS_AGDI.dll</pMon>
</DebugOpt>
<TargetDriverDllRegistry>
<SetRegEntry>
<Number>0</Number>
<Key>ULP2CM3</Key>
<Name>-O2510 -S0 -C0 -FO15 -FD20000000 -FC800 -FN1 -FF0MK_P256_48MHZ -FS00 -FL040000)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>CMSIS_AGDI</Key>
<Name>-X"MBED CMSIS-DAP" -UA000000001 -O462 -S0 -C0 -N00("ARM CoreSight SW-DP") -D00(0BC11477) -L00(0) -FO15 -FD20000000 -FC800 -FN1 -FF0MK_P256_48MHZ -FS00 -FL040000</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint/>
<DebugFlag>
<trace>0</trace>
<periodic>0</periodic>
<aLwin>0</aLwin>
<aCover>0</aCover>
<aSer1>0</aSer1>
<aSer2>0</aSer2>
<aPa>0</aPa>
<viewmode>0</viewmode>
<vrSel>0</vrSel>
<aSym>0</aSym>
<aTbox>0</aTbox>
<AscS1>0</AscS1>
<AscS2>0</AscS2>
<AscS3>0</AscS3>
<aSer3>0</aSer3>
<eProf>0</eProf>
<aLa>0</aLa>
<aPa1>0</aPa1>
<AscS4>0</AscS4>
<aSer4>0</aSer4>
<StkLoc>0</StkLoc>
<TrcWin>0</TrcWin>
<newCpu>0</newCpu>
<uProt>0</uProt>
</DebugFlag>
<LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile>
</TargetOption>
</Target>
<Group>
<GroupName>src</GroupName>
<tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<File>
<GroupNumber>1</GroupNumber>
<FileNumber>1</FileNumber>
<FileType>8</FileType>
<tvExp>0</tvExp>
<Focus>0</Focus>
<ColumnNumber>0</ColumnNumber>
<tvExpOptDlg>0</tvExpOptDlg>
<TopLine>1</TopLine>
<CurrentLine>2</CurrentLine>
<bDave2>0</bDave2>
<PathWithFileName>main.cpp</PathWithFileName>
<FilenameWithoutPath>main.cpp</FilenameWithoutPath>
</File>
</Group>
</ProjectOpt>

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<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
<SchemaVersion>1.1</SchemaVersion>
<Header>###This file was automagically generated by mbed.org. For more information, see http://mbed.org/handbook/Exporting-To-Uvision </Header>
<Targets>
<Target>
<TargetName>mbed FRDM-KL46Z</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<TargetCommonOption>
<Device>MKL46Z256xxx4</Device>
<Vendor>Freescale Semiconductor</Vendor>
<Cpu>IRAM(0x1FFFE000-0x1FFFFFFF) IRAM2(0x20000000-0x20005FFF) IROM(0x0-0x3FFFF) CLOCK(8000000) CPUTYPE("Cortex-M0+") ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile>"STARTUP\Freescale\Kinetis\startup_MKL46Z4.s" ("Freescale MKL46Zxxxxxx4 Startup Code")</StartupFile>
<FlashDriverDll>UL2CM3(-O2510 -S0 -C0 -FO15 -FD20000000 -FC800 -FN1 -FF0MK_P256_48MHZ -FS00 -FL040000)</FlashDriverDll>
<DeviceId>6834</DeviceId>
<RegisterFile>MKL46Z4.H</RegisterFile>
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile>SFD\Freescale\Kinetis\MKL46Z4.sfr</SFDFile>
<UseEnv>0</UseEnv>
<BinPath></BinPath>
<IncludePath></IncludePath>
<LibPath></LibPath>
<RegisterFilePath>Freescale\Kinetis\</RegisterFilePath>
<DBRegisterFilePath>Freescale\Kinetis\</DBRegisterFilePath>
<TargetStatus>
<Error>0</Error>
<ExitCodeStop>0</ExitCodeStop>
<ButtonStop>0</ButtonStop>
<NotGenerated>0</NotGenerated>
<InvalidFlash>1</InvalidFlash>
</TargetStatus>
<OutputDirectory>.\build\</OutputDirectory>
<OutputName>{{name}}</OutputName>
<CreateExecutable>1</CreateExecutable>
<CreateLib>0</CreateLib>
<CreateHexFile>0</CreateHexFile>
<DebugInformation>1</DebugInformation>
<BrowseInformation>1</BrowseInformation>
<ListingPath>.\build\</ListingPath>
<HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K>
<CreateBatchFile>0</CreateBatchFile>
<BeforeCompile>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
<nStopU1X>0</nStopU1X>
<nStopU2X>0</nStopU2X>
</BeforeCompile>
<BeforeMake>
<RunUserProg1>0</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
</BeforeMake>
<AfterMake>
<RunUserProg1>1</RunUserProg1>
<RunUserProg2>0</RunUserProg2>
<UserProg1Name>fromelf --bin -o build\{{name}}_KL25Z.bin build\{{name}}.axf</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
</AfterMake>
<SelectedForBatchBuild>0</SelectedForBatchBuild>
<SVCSIdString></SVCSIdString>
</TargetCommonOption>
<CommonProperty>
<UseCPPCompiler>0</UseCPPCompiler>
<RVCTCodeConst>0</RVCTCodeConst>
<RVCTZI>0</RVCTZI>
<RVCTOtherData>0</RVCTOtherData>
<ModuleSelection>0</ModuleSelection>
<IncludeInBuild>1</IncludeInBuild>
<AlwaysBuild>0</AlwaysBuild>
<GenerateAssemblyFile>0</GenerateAssemblyFile>
<AssembleAssemblyFile>0</AssembleAssemblyFile>
<PublicsOnly>0</PublicsOnly>
<StopOnExitCode>3</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
</CommonProperty>
<DllOption>
<SimDllName>SARMCM3.DLL</SimDllName>
<SimDllArguments></SimDllArguments>
<SimDlgDll>DARMCM1.DLL</SimDlgDll>
<SimDlgDllArguments>-pCM0+</SimDlgDllArguments>
<TargetDllName>SARMCM3.DLL</TargetDllName>
<TargetDllArguments></TargetDllArguments>
<TargetDlgDll>TARMCM1.DLL</TargetDlgDll>
<TargetDlgDllArguments>-pCM0+</TargetDlgDllArguments>
</DllOption>
<DebugOption>
<OPTHX>
<HexSelection>1</HexSelection>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
<Oh166RecLen>16</Oh166RecLen>
</OPTHX>
<Simulator>
<UseSimulator>0</UseSimulator>
<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
<RunToMain>1</RunToMain>
<RestoreBreakpoints>1</RestoreBreakpoints>
<RestoreWatchpoints>1</RestoreWatchpoints>
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
<RestoreFunctions>1</RestoreFunctions>
<RestoreToolbox>1</RestoreToolbox>
<LimitSpeedToRealTime>0</LimitSpeedToRealTime>
</Simulator>
<Target>
<UseTarget>1</UseTarget>
<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
<RunToMain>1</RunToMain>
<RestoreBreakpoints>1</RestoreBreakpoints>
<RestoreWatchpoints>1</RestoreWatchpoints>
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
<RestoreFunctions>0</RestoreFunctions>
<RestoreToolbox>1</RestoreToolbox>
</Target>
<RunDebugAfterBuild>0</RunDebugAfterBuild>
<TargetSelection>14</TargetSelection>
<SimDlls>
<CpuDll></CpuDll>
<CpuDllArguments></CpuDllArguments>
<PeripheralDll></PeripheralDll>
<PeripheralDllArguments></PeripheralDllArguments>
<InitializationFile></InitializationFile>
</SimDlls>
<TargetDlls>
<CpuDll></CpuDll>
<CpuDllArguments></CpuDllArguments>
<PeripheralDll></PeripheralDll>
<PeripheralDllArguments></PeripheralDllArguments>
<InitializationFile></InitializationFile>
<Driver>BIN\CMSIS_AGDI.dll</Driver>
</TargetDlls>
</DebugOption>
<Utilities>
<Flash1>
<UseTargetDll>1</UseTargetDll>
<UseExternalTool>0</UseExternalTool>
<RunIndependent>0</RunIndependent>
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
<Capability>1</Capability>
<DriverSelection>4105</DriverSelection>
</Flash1>
<Flash2>BIN\CMSIS_AGDI.dll</Flash2>
<Flash3>"" ()</Flash3>
<Flash4></Flash4>
</Utilities>
<TargetArmAds>
<ArmAdsMisc>
<GenerateListings>0</GenerateListings>
<asHll>1</asHll>
<asAsm>1</asAsm>
<asMacX>1</asMacX>
<asSyms>1</asSyms>
<asFals>1</asFals>
<asDbgD>1</asDbgD>
<asForm>1</asForm>
<ldLst>0</ldLst>
<ldmm>1</ldmm>
<ldXref>1</ldXref>
<BigEnd>0</BigEnd>
<AdsALst>1</AdsALst>
<AdsACrf>1</AdsACrf>
<AdsANop>0</AdsANop>
<AdsANot>0</AdsANot>
<AdsLLst>1</AdsLLst>
<AdsLmap>1</AdsLmap>
<AdsLcgr>1</AdsLcgr>
<AdsLsym>1</AdsLsym>
<AdsLszi>1</AdsLszi>
<AdsLtoi>1</AdsLtoi>
<AdsLsun>1</AdsLsun>
<AdsLven>1</AdsLven>
<AdsLsxf>1</AdsLsxf>
<RvctClst>0</RvctClst>
<GenPPlst>0</GenPPlst>
<AdsCpuType>"Cortex-M0+"</AdsCpuType>
<RvctDeviceName></RvctDeviceName>
<mOS>0</mOS>
<uocRom>0</uocRom>
<uocRam>0</uocRam>
<hadIROM>1</hadIROM>
<hadIRAM>1</hadIRAM>
<hadXRAM>0</hadXRAM>
<uocXRam>0</uocXRam>
<RvdsVP>0</RvdsVP>
<hadIRAM2>1</hadIRAM2>
<hadIROM2>0</hadIROM2>
<StupSel>8</StupSel>
<useUlib>0</useUlib>
<EndSel>0</EndSel>
<uLtcg>0</uLtcg>
<RoSelD>3</RoSelD>
<RwSelD>3</RwSelD>
<CodeSel>0</CodeSel>
<OptFeed>0</OptFeed>
<NoZi1>0</NoZi1>
<NoZi2>0</NoZi2>
<NoZi3>0</NoZi3>
<NoZi4>0</NoZi4>
<NoZi5>0</NoZi5>
<Ro1Chk>0</Ro1Chk>
<Ro2Chk>0</Ro2Chk>
<Ro3Chk>0</Ro3Chk>
<Ir1Chk>1</Ir1Chk>
<Ir2Chk>0</Ir2Chk>
<Ra1Chk>0</Ra1Chk>
<Ra2Chk>0</Ra2Chk>
<Ra3Chk>0</Ra3Chk>
<Im1Chk>1</Im1Chk>
<Im2Chk>0</Im2Chk>
<OnChipMemories>
<Ocm1>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm1>
<Ocm2>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm2>
<Ocm3>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm3>
<Ocm4>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm4>
<Ocm5>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm5>
<Ocm6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</Ocm6>
<IRAM>
<Type>0</Type>
<StartAddress>0x1ffff000</StartAddress>
<Size>0x1000</Size>
</IRAM>
<IROM>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x20000</Size>
</IROM>
<XRAM>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</XRAM>
<OCR_RVCT1>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT1>
<OCR_RVCT2>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT2>
<OCR_RVCT3>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT3>
<OCR_RVCT4>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x40000</Size>
</OCR_RVCT4>
<OCR_RVCT5>
<Type>1</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT5>
<OCR_RVCT6>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT6>
<OCR_RVCT7>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT7>
<OCR_RVCT8>
<Type>0</Type>
<StartAddress>0x0</StartAddress>
<Size>0x0</Size>
</OCR_RVCT8>
<OCR_RVCT9>
<Type>0</Type>
<StartAddress>0x1fffe000</StartAddress>
<Size>0x2000</Size>
</OCR_RVCT9>
<OCR_RVCT10>
<Type>0</Type>
<StartAddress>0x20000000</StartAddress>
<Size>0x6000</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector></RvctStartVector>
</ArmAdsMisc>
<Cads>
<interw>1</interw>
<Optim>1</Optim>
<oTime>0</oTime>
<SplitLS>0</SplitLS>
<OneElfS>0</OneElfS>
<Strict>0</Strict>
<EnumInt>0</EnumInt>
<PlainCh>0</PlainCh>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<wLevel>0</wLevel>
<uThumb>0</uThumb>
<uSurpInc>0</uSurpInc>
<VariousControls>
<MiscControls>--gnu</MiscControls>
<Define>{% for s in symbols %} {{s}}, {% endfor %}</Define>
<Undefine></Undefine>
<IncludePath> {% for path in include_paths %} {{path}}; {% endfor %} </IncludePath>
</VariousControls>
</Cads>
<Aads>
<interw>1</interw>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<thumb>0</thumb>
<SplitLS>0</SplitLS>
<SwStkChk>0</SwStkChk>
<NoWarn>0</NoWarn>
<uSurpInc>0</uSurpInc>
<VariousControls>
<MiscControls></MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Aads>
<LDads>
<umfTarg>0</umfTarg>
<Ropi>0</Ropi>
<Rwpi>0</Rwpi>
<noStLib>0</noStLib>
<RepFail>1</RepFail>
<useFile>0</useFile>
<TextAddressRange>0x00000000</TextAddressRange>
<DataAddressRange>0x10000000</DataAddressRange>
<ScatterFile>{{scatter_file}}</ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc>
{% for file in object_files %}
{{file}}
{% endfor %}
</Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
</TargetArmAds>
</TargetOption>
<Groups>
{% for group,files in source_files %}
<Group>
<GroupName>{{group}}</GroupName>
<Files>
{% for file in files %}
<File>
<FileName>{{file.name}}</FileName>
<FileType>{{file.type}}</FileType>
<FilePath>{{file.path}}</FilePath>
{%if file.type == "1" %}
<FileOption>
<FileArmAds>
<Cads>
<VariousControls>
<MiscControls>--c99</MiscControls>
</VariousControls>
</Cads>
</FileArmAds>
</FileOption>
{% endif %}
</File>
{% endfor %}
</Files>
</Group>
{% endfor %}
</Groups>
</Target>
</Targets>
</Project>

54
workspace_tools/hooks.py
View File

@ -11,7 +11,7 @@ _hooks = {}
_running_hooks = {}
# Available hook types
_hook_types = ["binary"]
_hook_types = ["binary", "compile", "link", "assemble"]
# Available hook steps
_hook_steps = ["pre", "replace", "post"]
@ -59,10 +59,12 @@ def hook_tool(function):
class Hook:
def __init__(self, target, toolchain):
_hooks.clear()
self._cmdline_hooks = {}
self.toolchain = toolchain
target.init_hooks(self, toolchain.__class__.__name__)
def hook_add(self, hook_type, hook_step, function):
# Hook various functions directly
def _hook_add(self, hook_type, hook_step, function):
if not hook_type in _hook_types or not hook_step in _hook_steps:
return False
if not hook_type in _hooks:
@ -70,8 +72,54 @@ class Hook:
_hooks[hook_type][hook_step] = function
return True
def hook_add_compiler(self, hook_step, function):
return self._hook_add("compile", hook_step, function)
def hook_add_linker(self, hook_step, function):
return self._hook_add("link", hook_step, function)
def hook_add_assembler(self, hook_step, function):
return self._hook_add("assemble", hook_step, function)
def hook_add_binary(self, hook_step, function):
return self.hook_add("binary", hook_step, function)
return self._hook_add("binary", hook_step, function)
# Hook command lines
def _hook_cmdline(self, hook_type, function):
if not hook_type in _hook_types:
return False
self._cmdline_hooks[hook_type] = function
return True
def hook_cmdline_compiler(self, function):
return self._hook_cmdline("compile", function)
def hook_cmdline_linker(self, function):
return self._hook_cmdline("link", function)
def hook_cmdline_assembler(self, function):
return self._hook_cmdline("assemble", function)
def hook_cmdline_binary(self, function):
return self._hook_cmdline("binary", function)
# Return the command line after applying the hook
def _get_cmdline(self, hook_type, cmdline):
if self._cmdline_hooks.has_key(hook_type):
cmdline = self._cmdline_hooks[hook_type](self.toolchain.__class__.__name__, cmdline)
return cmdline
def get_cmdline_compiler(self, cmdline):
return self._get_cmdline("compile", cmdline)
def get_cmdline_linker(self, cmdline):
return self._get_cmdline("link", cmdline)
def get_cmdline_assembler(self, cmdline):
return self._get_cmdline("assemble", cmdline)
def get_cmdline_binary(self, cmdline):
return self._get_cmdline("binary", cmdline)
################################################################################

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