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Disable attempted 4-byte addressing for some boards 

4-byte addressing has been seen to cause failures on NORDIC
boards and with Macronix memories. Suppress the attempt to enable it
on that hardware (via vendor quirks and a target check) until either
the failure cause can be fixed or a more robust suppression mechanism
is implemented.
pull/11894/head
Kyle Kearney 2019-11-11 15:07:12 -08:00 committed by adbridge
parent 3b80a9ba1e
commit 649234e7e7
2 changed files with 14 additions and 4 deletions
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16
components/storage/blockdevice/COMPONENT_QSPIF/QSPIFBlockDevice.cpp
View File

@ -187,6 +187,7 @@ QSPIFBlockDevice::QSPIFBlockDevice(PinName io0, PinName io1, PinName io2, PinNam
_clear_protection_method = QSPIF_BP_CLEAR_SR; _clear_protection_method = QSPIF_BP_CLEAR_SR;
// Set default 4-byte addressing extension register write instruction // Set default 4-byte addressing extension register write instruction
_attempt_4_byte_addressing = true;
_4byte_msb_reg_write_inst = QSPIF_INST_4BYTE_REG_WRITE_DEFAULT; _4byte_msb_reg_write_inst = QSPIF_INST_4BYTE_REG_WRITE_DEFAULT;
} }
@ -750,10 +751,15 @@ int QSPIFBlockDevice::_sfdp_parse_basic_param_table(uint32_t basic_table_addr, s
} }
} }
if (_sfdp_detect_and_enable_4byte_addressing(param_table, basic_table_size) != QSPIF_BD_ERROR_OK) { #ifndef TARGET_NORDIC
tr_error("Init - Detecting/enabling 4-byte addressing failed"); // 4 byte addressing is not currently supported with the Nordic QSPI controller
return -1; if (_attempt_4_byte_addressing) {
if (_sfdp_detect_and_enable_4byte_addressing(param_table, basic_table_size) != QSPIF_BD_ERROR_OK) {
tr_error("Init - Detecting/enabling 4-byte addressing failed");
return -1;
}
} }
#endif
if (false == _is_mem_ready()) { if (false == _is_mem_ready()) {
tr_error("Init - _is_mem_ready Failed"); tr_error("Init - _is_mem_ready Failed");
@ -1242,13 +1248,15 @@ int QSPIFBlockDevice::_handle_vendor_quirks()
_clear_protection_method = QSPIF_BP_ULBPR; _clear_protection_method = QSPIF_BP_ULBPR;
break; break;
case 0xc2: case 0xc2:
// Macronix devices have two quirks: // Macronix devices have several quirks:
// 1. Have one status register and 2 config registers, with a nonstandard instruction for reading the config registers // 1. Have one status register and 2 config registers, with a nonstandard instruction for reading the config registers
// 2. Require setting a "fast mode" bit in config register 2 to operate at higher clock rates // 2. Require setting a "fast mode" bit in config register 2 to operate at higher clock rates
// 3. Should never attempt to enable 4-byte addressing (it causes reads and writes to fail)
tr_debug("Applying quirks for macronix"); tr_debug("Applying quirks for macronix");
_needs_fast_mode = true; _needs_fast_mode = true;
_num_status_registers = 3; _num_status_registers = 3;
_read_status_reg_2_inst = QSPIF_INST_RDCR; _read_status_reg_2_inst = QSPIF_INST_RDCR;
_attempt_4_byte_addressing = false;
break; break;
} }

2
components/storage/blockdevice/COMPONENT_QSPIF/QSPIFBlockDevice.h
View File

@ -358,6 +358,8 @@ private:
mbed::qspi_inst_t _write_status_reg_2_inst; mbed::qspi_inst_t _write_status_reg_2_inst;
mbed::qspi_inst_t _read_status_reg_2_inst; // If three registers, this instruction reads the latter two mbed::qspi_inst_t _read_status_reg_2_inst; // If three registers, this instruction reads the latter two
// Attempt to enable 4-byte addressing. True by default, but may be disabled for some vendors
bool _attempt_4_byte_addressing;
// 4-byte addressing extension register write instruction // 4-byte addressing extension register write instruction
mbed::qspi_inst_t _4byte_msb_reg_write_inst; mbed::qspi_inst_t _4byte_msb_reg_write_inst;