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Merge pull request #15472 from jtmyz9/jmcloud/STM32-use-more-than-one-fifo 

Don't overlap STM32 FDCAN RAM sections
pull/15485/head
Martin Kojtal 2023-12-19 16:33:14 +01:00 committed by GitHub
parent 6403ec75c7 9859c60751
commit 61ab4f7f76
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GPG Key ID: 4AEE18F83AFDEB23
1 changed files with 5 additions and 3 deletions
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8
targets/TARGET_STM/can_api.c
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@ -183,8 +183,11 @@ static void _can_init_freq_direct(can_t *obj, const can_pinmap_t *pinmap, int hz
obj->CanHandle.Init.DataTimeSeg1 = 0x1; // Not used - only in FDCAN
obj->CanHandle.Init.DataTimeSeg2 = 0x1; // Not used - only in FDCAN
#ifdef TARGET_STM32H7
/* Message RAM offset is only supported in STM32H7 platforms of supported FDCAN platforms */
obj->CanHandle.Init.MessageRAMOffset = 0;
/* Message RAM offset is only supported in STM32H7 platforms of supported FDCAN platforms
* Total RAM size is 2560 words, each FDCAN object allocates approx 300 words, so offset each by
* 512 to make sure RAM sections don't overlap if using multiple FDCAN instances on one chip
*/
obj->CanHandle.Init.MessageRAMOffset = obj->index * 512;
/* The number of Standard and Extended ID filters are initialized to the maximum possile extent
* for STM32H7 platforms
@ -1222,7 +1225,6 @@ static void can_irq(CANName name, int id)
// rx interrupts will be unamsked in read operation. reads must be deffered to thread context.
// refer to the CAN receive interrupt problem due to mutex and resolution section of README doc.
__HAL_CAN_DISABLE_IT(&CanHandle, CAN_IT_FMP0);
irq_handler(can_irq_contexts[id], IRQ_RX);
}