From 5fbe3299d7cd2680f530dde0e697026ea488abc9 Mon Sep 17 00:00:00 2001
From: Laurent MEUNIER <laurent.meunier@st.com>
Date: Tue, 28 Mar 2017 22:26:26 +0200
Subject: [PATCH] Rebase of:
 https://github.com/ARMmbed/mbed-os/pull/4063/commits/e51c40c0613135a9cb14f00d77dea849a551b9cb

Fix vector table

The address of the vector table is hardcoded to the start of flash.
This patch updates make it properly handle updating the VTOR with
a bootloader.
---
 .../TARGET_DISCO_L476VG/system_stm32l4xx.c    |  3 +-
 .../TARGET_NUCLEO_L476RG/system_stm32l4xx.c   |  3 +-
 .../TARGET_STM32L476xG/device/nvic_addr.h     | 40 +++++++++++++++++++
 3 files changed, 44 insertions(+), 2 deletions(-)
 create mode 100644 targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/nvic_addr.h

diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_DISCO_L476VG/system_stm32l4xx.c b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_DISCO_L476VG/system_stm32l4xx.c
index 1622015733..a8d62c4f17 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_DISCO_L476VG/system_stm32l4xx.c
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_DISCO_L476VG/system_stm32l4xx.c
@@ -84,6 +84,7 @@
 
 #include "stm32l4xx.h"
 #include "hal_tick.h"
+#include "nvic_addr.h"
 
 #if !defined  (HSE_VALUE)
   #define HSE_VALUE    ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */
@@ -215,7 +216,7 @@ void SystemInit(void)
 #ifdef VECT_TAB_SRAM
   SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
 #else
-  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+  SCB->VTOR = NVIC_FLASH_VECTOR_ADDRESS; /* Vector Table Relocation in Internal FLASH */
 #endif
 
   /* Configure the Cube driver */
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_NUCLEO_L476RG/system_stm32l4xx.c b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_NUCLEO_L476RG/system_stm32l4xx.c
index 1622015733..e9f508ccd2 100644
--- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_NUCLEO_L476RG/system_stm32l4xx.c
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_NUCLEO_L476RG/system_stm32l4xx.c
@@ -84,6 +84,7 @@
 
 #include "stm32l4xx.h"
 #include "hal_tick.h"
+#include "nvic_addr.h"
 
 #if !defined  (HSE_VALUE)
   #define HSE_VALUE    ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */
@@ -215,7 +216,7 @@ void SystemInit(void)
 #ifdef VECT_TAB_SRAM
   SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
 #else
-  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+  SCB->VTOR = NVIC_FLASH_VECTOR_ADDRESS;; /* Vector Table Relocation in Internal FLASH */
 #endif
 
   /* Configure the Cube driver */
diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/nvic_addr.h b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/nvic_addr.h
new file mode 100644
index 0000000000..307c99edd6
--- /dev/null
+++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/nvic_addr.h
@@ -0,0 +1,40 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2017-2017 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef NVIC_ADDR_H
+#define NVIC_ADDR_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if defined(__ICCARM__)
+    #pragma section=".intvec"
+    #define NVIC_FLASH_VECTOR_ADDRESS   ((uint32_t)__section_begin(".intvec"))
+#elif defined(__CC_ARM)
+    extern uint32_t Load$$LR$$LR_IROM1$$Base[];
+    #define NVIC_FLASH_VECTOR_ADDRESS   ((uint32_t)Load$$LR$$LR_IROM1$$Base)
+#elif defined(__GNUC__)
+    extern uint32_t g_pfnVectors[];
+    #define NVIC_FLASH_VECTOR_ADDRESS   ((uint32_t)g_pfnVectors)
+#else
+    #error "Flash vector address not set for this toolchain"
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif