[LPC1549] put PINASSIGN0-15 to PINASSIGN[] on LPC15xx.h

and fixed typo on system_LPC15xx.c
pull/182/head
ytsuboi 2014-02-12 16:13:00 +09:00
parent 741bfc22b1
commit 5f1f6c7417
2 changed files with 27 additions and 21 deletions

View File

@ -12,6 +12,7 @@
* from CMSIS SVD File 'H2_v0.3.svd' Version 0.3,
*
* modified by Keil
* modified by ytsuboi
*******************************************************************************************************/
@ -1029,6 +1030,9 @@ typedef struct { /*!< WWDT Structure
*/
typedef struct { /*!< SWM Structure */
union {
__IO uint32_t PINASSIGN[16];
struct {
__IO uint32_t PINASSIGN0; /*!< Pin assign register 0. Assign movable functions U0_TXD, U0_RXD,
U0_RTS, U0_CTS. */
__IO uint32_t PINASSIGN1; /*!< Pin assign register 1. Assign movable functions U0_SCLK, U1_TXD,
@ -1048,6 +1052,8 @@ typedef struct { /*!< SWM Structure
__IO uint32_t PINASSIGN13; /*!< Pin assign register 13. Assign movable functions */
__IO uint32_t PINASSIGN14; /*!< Pin assign register 14. Assign movable functions */
__IO uint32_t PINASSIGN15; /*!< Pin assign register 15. Assign movable functions */
};
};
__I uint32_t RESERVED0[96];
__IO uint32_t PINENABLE0; /*!< Pin enable register 0. Enables fixed-pin functions */
__IO uint32_t PINENABLE1; /*!< Pin enable register 0. Enables fixed-pin functions */

View File

@ -141,7 +141,7 @@
// </e>
//
// <e> SCT Clock Configuration
#define SCT_CLOCK_SETUP 0
#define SCT_CLOCK_SETUP 1
// <h> SCT PLL Control (SCTPLLCTRL)
// <i> F_clkout = M * F_clkin = F_CCO / (2 * P)
// <i> F_clkin must be in the range of 10 MHz to 25 MHz
@ -503,7 +503,7 @@ void SystemInit (void) {
LPC_SYSCON->PDRUNCFG &= ~(1 << 24); /* Power-up SCT PLL */
LPC_SYSCON->SCTPLLCLKSEL = SCTPLLCLKSEL_Val; /* Select PLL Input */
LPC_SYSCON->USBPLLCTRL = SCTPLLCTRL_Val;
LPC_SYSCON->SCTPLLCTRL = SCTPLLCTRL_Val;
while (!(LPC_SYSCON->SCTPLLSTAT & 0x01)); /* Wait Until PLL Locked */
#else /* SCT clock is not used */
LPC_SYSCON->PDRUNCFG |= (1 << 24); /* Power-down SCT PLL */