mirror of https://github.com/ARMmbed/mbed-os.git
Support for MTS MDOT
Michael Brudevold
parent
05b86e41c1
commit
5d6ee64bf1
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;/******************** (C) COPYRIGHT 2014 STMicroelectronics ********************
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;* File Name : startup_stm32f405xx.s
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;* Author : MCD Application Team
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;* Version : V2.1.0
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;* Date : 19-June-2014
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;* Description : STM32F405xx devices vector table for EWARM toolchain.
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;* This module performs:
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;* - Set the initial SP
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;* - Set the initial PC == _iar_program_start,
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;* - Set the vector table entries with the exceptions ISR
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;* address.
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;* - Branches to main in the C library (which eventually
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;* calls main()).
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;* After Reset the Cortex-M4 processor is in Thread mode,
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;* priority is Privileged, and the Stack is set to Main.
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;********************************************************************************
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;*
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;* Redistribution and use in source and binary forms, with or without modification,
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;* are permitted provided that the following conditions are met:
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;* 1. Redistributions of source code must retain the above copyright notice,
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;* this list of conditions and the following disclaimer.
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;* 2. Redistributions in binary form must reproduce the above copyright notice,
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;* this list of conditions and the following disclaimer in the documentation
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;* and/or other materials provided with the distribution.
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;* 3. Neither the name of STMicroelectronics nor the names of its contributors
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;* may be used to endorse or promote products derived from this software
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;* without specific prior written permission.
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;*
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;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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;*
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;*******************************************************************************
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;
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;
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; The modules in this file are included in the libraries, and may be replaced
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; by any user-defined modules that define the PUBLIC symbol _program_start or
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; a user defined start symbol.
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; To override the cstartup defined in the library, simply add your modified
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; version to the workbench project.
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;
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; The vector table is normally located at address 0.
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; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
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; The name "__vector_table" has special meaning for C-SPY:
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; it is where the SP start value is found, and the NVIC vector
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; table register (VTOR) is initialized to this address if != 0.
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;
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; Cortex-M version
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;
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MODULE ?cstartup
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;; Forward declaration of sections.
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SECTION CSTACK:DATA:NOROOT(3)
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SECTION .intvec:CODE:NOROOT(2)
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EXTERN __iar_program_start
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EXTERN SystemInit
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PUBLIC __vector_table
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DATA
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__vector_table
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DCD sfe(CSTACK)
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DCD Reset_Handler ; Reset Handler
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DCD NMI_Handler ; NMI Handler
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DCD HardFault_Handler ; Hard Fault Handler
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DCD MemManage_Handler ; MPU Fault Handler
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DCD BusFault_Handler ; Bus Fault Handler
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DCD UsageFault_Handler ; Usage Fault Handler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD SVC_Handler ; SVCall Handler
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DCD DebugMon_Handler ; Debug Monitor Handler
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DCD 0 ; Reserved
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DCD PendSV_Handler ; PendSV Handler
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DCD SysTick_Handler ; SysTick Handler
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; External Interrupts
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DCD WWDG_IRQHandler ; Window WatchDog
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DCD PVD_IRQHandler ; PVD through EXTI Line detection
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DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
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DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
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DCD FLASH_IRQHandler ; FLASH
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DCD RCC_IRQHandler ; RCC
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DCD EXTI0_IRQHandler ; EXTI Line0
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DCD EXTI1_IRQHandler ; EXTI Line1
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DCD EXTI2_IRQHandler ; EXTI Line2
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DCD EXTI3_IRQHandler ; EXTI Line3
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DCD EXTI4_IRQHandler ; EXTI Line4
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DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0
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DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1
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DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2
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DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3
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DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4
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DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5
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DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6
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DCD ADC_IRQHandler ; ADC1, ADC2 and ADC3s
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DCD CAN1_TX_IRQHandler ; CAN1 TX
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DCD CAN1_RX0_IRQHandler ; CAN1 RX0
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DCD CAN1_RX1_IRQHandler ; CAN1 RX1
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DCD CAN1_SCE_IRQHandler ; CAN1 SCE
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DCD EXTI9_5_IRQHandler ; External Line[9:5]s
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DCD TIM1_BRK_TIM9_IRQHandler ; TIM1 Break and TIM9
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DCD TIM1_UP_TIM10_IRQHandler ; TIM1 Update and TIM10
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DCD TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11
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DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
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DCD TIM2_IRQHandler ; TIM2
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DCD TIM3_IRQHandler ; TIM3
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DCD TIM4_IRQHandler ; TIM4
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DCD I2C1_EV_IRQHandler ; I2C1 Event
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DCD I2C1_ER_IRQHandler ; I2C1 Error
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DCD I2C2_EV_IRQHandler ; I2C2 Event
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DCD I2C2_ER_IRQHandler ; I2C2 Error
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DCD SPI1_IRQHandler ; SPI1
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DCD SPI2_IRQHandler ; SPI2
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DCD USART1_IRQHandler ; USART1
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DCD USART2_IRQHandler ; USART2
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DCD USART3_IRQHandler ; USART3
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DCD EXTI15_10_IRQHandler ; External Line[15:10]s
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DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
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DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line
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DCD TIM8_BRK_TIM12_IRQHandler ; TIM8 Break and TIM12
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DCD TIM8_UP_TIM13_IRQHandler ; TIM8 Update and TIM13
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DCD TIM8_TRG_COM_TIM14_IRQHandler ; TIM8 Trigger and Commutation and TIM14
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DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare
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DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7
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DCD FSMC_IRQHandler ; FSMC
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DCD SDIO_IRQHandler ; SDIO
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DCD TIM5_IRQHandler ; TIM5
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DCD SPI3_IRQHandler ; SPI3
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DCD UART4_IRQHandler ; UART4
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DCD UART5_IRQHandler ; UART5
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DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
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DCD TIM7_IRQHandler ; TIM7
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DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0
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DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1
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DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2
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DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3
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DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD CAN2_TX_IRQHandler ; CAN2 TX
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DCD CAN2_RX0_IRQHandler ; CAN2 RX0
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DCD CAN2_RX1_IRQHandler ; CAN2 RX1
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DCD CAN2_SCE_IRQHandler ; CAN2 SCE
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DCD OTG_FS_IRQHandler ; USB OTG FS
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DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5
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DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6
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DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7
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DCD USART6_IRQHandler ; USART6
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DCD I2C3_EV_IRQHandler ; I2C3 event
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DCD I2C3_ER_IRQHandler ; I2C3 error
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DCD OTG_HS_EP1_OUT_IRQHandler ; USB OTG HS End Point 1 Out
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DCD OTG_HS_EP1_IN_IRQHandler ; USB OTG HS End Point 1 In
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DCD OTG_HS_WKUP_IRQHandler ; USB OTG HS Wakeup through EXTI
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DCD OTG_HS_IRQHandler ; USB OTG HS
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD HASH_RNG_IRQHandler ; Hash and RNG
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DCD FPU_IRQHandler ; FPU
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;
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;; Default interrupt handlers.
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;;
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THUMB
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PUBWEAK Reset_Handler
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SECTION .text:CODE:REORDER:NOROOT(2)
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Reset_Handler
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LDR R0, =SystemInit
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BLX R0
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LDR R0, =__iar_program_start
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BX R0
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PUBWEAK NMI_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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NMI_Handler
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B NMI_Handler
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PUBWEAK HardFault_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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HardFault_Handler
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B HardFault_Handler
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PUBWEAK MemManage_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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MemManage_Handler
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B MemManage_Handler
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PUBWEAK BusFault_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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BusFault_Handler
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B BusFault_Handler
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PUBWEAK UsageFault_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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UsageFault_Handler
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B UsageFault_Handler
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PUBWEAK SVC_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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SVC_Handler
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B SVC_Handler
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PUBWEAK DebugMon_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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DebugMon_Handler
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B DebugMon_Handler
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PUBWEAK PendSV_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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PendSV_Handler
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B PendSV_Handler
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PUBWEAK SysTick_Handler
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SECTION .text:CODE:REORDER:NOROOT(1)
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SysTick_Handler
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B SysTick_Handler
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PUBWEAK WWDG_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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WWDG_IRQHandler
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B WWDG_IRQHandler
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PUBWEAK PVD_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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PVD_IRQHandler
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B PVD_IRQHandler
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PUBWEAK TAMP_STAMP_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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TAMP_STAMP_IRQHandler
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B TAMP_STAMP_IRQHandler
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PUBWEAK RTC_WKUP_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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RTC_WKUP_IRQHandler
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B RTC_WKUP_IRQHandler
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PUBWEAK FLASH_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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FLASH_IRQHandler
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B FLASH_IRQHandler
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PUBWEAK RCC_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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RCC_IRQHandler
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B RCC_IRQHandler
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PUBWEAK EXTI0_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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EXTI0_IRQHandler
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B EXTI0_IRQHandler
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PUBWEAK EXTI1_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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EXTI1_IRQHandler
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B EXTI1_IRQHandler
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PUBWEAK EXTI2_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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EXTI2_IRQHandler
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B EXTI2_IRQHandler
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PUBWEAK EXTI3_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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EXTI3_IRQHandler
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B EXTI3_IRQHandler
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PUBWEAK EXTI4_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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EXTI4_IRQHandler
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B EXTI4_IRQHandler
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PUBWEAK DMA1_Stream0_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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DMA1_Stream0_IRQHandler
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B DMA1_Stream0_IRQHandler
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PUBWEAK DMA1_Stream1_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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DMA1_Stream1_IRQHandler
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B DMA1_Stream1_IRQHandler
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PUBWEAK DMA1_Stream2_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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DMA1_Stream2_IRQHandler
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B DMA1_Stream2_IRQHandler
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PUBWEAK DMA1_Stream3_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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DMA1_Stream3_IRQHandler
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B DMA1_Stream3_IRQHandler
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PUBWEAK DMA1_Stream4_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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DMA1_Stream4_IRQHandler
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B DMA1_Stream4_IRQHandler
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PUBWEAK DMA1_Stream5_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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DMA1_Stream5_IRQHandler
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B DMA1_Stream5_IRQHandler
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PUBWEAK DMA1_Stream6_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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DMA1_Stream6_IRQHandler
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B DMA1_Stream6_IRQHandler
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PUBWEAK ADC_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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ADC_IRQHandler
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B ADC_IRQHandler
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PUBWEAK CAN1_TX_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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CAN1_TX_IRQHandler
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B CAN1_TX_IRQHandler
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PUBWEAK CAN1_RX0_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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CAN1_RX0_IRQHandler
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B CAN1_RX0_IRQHandler
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PUBWEAK CAN1_RX1_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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CAN1_RX1_IRQHandler
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B CAN1_RX1_IRQHandler
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PUBWEAK CAN1_SCE_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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CAN1_SCE_IRQHandler
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B CAN1_SCE_IRQHandler
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PUBWEAK EXTI9_5_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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EXTI9_5_IRQHandler
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B EXTI9_5_IRQHandler
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PUBWEAK TIM1_BRK_TIM9_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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TIM1_BRK_TIM9_IRQHandler
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B TIM1_BRK_TIM9_IRQHandler
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PUBWEAK TIM1_UP_TIM10_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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TIM1_UP_TIM10_IRQHandler
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B TIM1_UP_TIM10_IRQHandler
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PUBWEAK TIM1_TRG_COM_TIM11_IRQHandler
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SECTION .text:CODE:REORDER:NOROOT(1)
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TIM1_TRG_COM_TIM11_IRQHandler
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|
B TIM1_TRG_COM_TIM11_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK TIM1_CC_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
TIM1_CC_IRQHandler
|
||||||
|
B TIM1_CC_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK TIM2_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
TIM2_IRQHandler
|
||||||
|
B TIM2_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK TIM3_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
TIM3_IRQHandler
|
||||||
|
B TIM3_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK TIM4_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
TIM4_IRQHandler
|
||||||
|
B TIM4_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK I2C1_EV_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
I2C1_EV_IRQHandler
|
||||||
|
B I2C1_EV_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK I2C1_ER_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
I2C1_ER_IRQHandler
|
||||||
|
B I2C1_ER_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK I2C2_EV_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
I2C2_EV_IRQHandler
|
||||||
|
B I2C2_EV_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK I2C2_ER_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
I2C2_ER_IRQHandler
|
||||||
|
B I2C2_ER_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK SPI1_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
SPI1_IRQHandler
|
||||||
|
B SPI1_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK SPI2_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
SPI2_IRQHandler
|
||||||
|
B SPI2_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK USART1_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
USART1_IRQHandler
|
||||||
|
B USART1_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK USART2_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
USART2_IRQHandler
|
||||||
|
B USART2_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK USART3_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
USART3_IRQHandler
|
||||||
|
B USART3_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK EXTI15_10_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
EXTI15_10_IRQHandler
|
||||||
|
B EXTI15_10_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK RTC_Alarm_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
RTC_Alarm_IRQHandler
|
||||||
|
B RTC_Alarm_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK OTG_FS_WKUP_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
OTG_FS_WKUP_IRQHandler
|
||||||
|
B OTG_FS_WKUP_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK TIM8_BRK_TIM12_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
TIM8_BRK_TIM12_IRQHandler
|
||||||
|
B TIM8_BRK_TIM12_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK TIM8_UP_TIM13_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
TIM8_UP_TIM13_IRQHandler
|
||||||
|
B TIM8_UP_TIM13_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK TIM8_TRG_COM_TIM14_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
TIM8_TRG_COM_TIM14_IRQHandler
|
||||||
|
B TIM8_TRG_COM_TIM14_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK TIM8_CC_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
TIM8_CC_IRQHandler
|
||||||
|
B TIM8_CC_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK DMA1_Stream7_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
DMA1_Stream7_IRQHandler
|
||||||
|
B DMA1_Stream7_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK FSMC_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
FSMC_IRQHandler
|
||||||
|
B FSMC_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK SDIO_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
SDIO_IRQHandler
|
||||||
|
B SDIO_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK TIM5_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
TIM5_IRQHandler
|
||||||
|
B TIM5_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK SPI3_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
SPI3_IRQHandler
|
||||||
|
B SPI3_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK UART4_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
UART4_IRQHandler
|
||||||
|
B UART4_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK UART5_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
UART5_IRQHandler
|
||||||
|
B UART5_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK TIM6_DAC_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
TIM6_DAC_IRQHandler
|
||||||
|
B TIM6_DAC_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK TIM7_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
TIM7_IRQHandler
|
||||||
|
B TIM7_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK DMA2_Stream0_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
DMA2_Stream0_IRQHandler
|
||||||
|
B DMA2_Stream0_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK DMA2_Stream1_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
DMA2_Stream1_IRQHandler
|
||||||
|
B DMA2_Stream1_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK DMA2_Stream2_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
DMA2_Stream2_IRQHandler
|
||||||
|
B DMA2_Stream2_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK DMA2_Stream3_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
DMA2_Stream3_IRQHandler
|
||||||
|
B DMA2_Stream3_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK DMA2_Stream4_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
DMA2_Stream4_IRQHandler
|
||||||
|
B DMA2_Stream4_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK CAN2_TX_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
CAN2_TX_IRQHandler
|
||||||
|
B CAN2_TX_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK CAN2_RX0_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
CAN2_RX0_IRQHandler
|
||||||
|
B CAN2_RX0_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK CAN2_RX1_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
CAN2_RX1_IRQHandler
|
||||||
|
B CAN2_RX1_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK CAN2_SCE_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
CAN2_SCE_IRQHandler
|
||||||
|
B CAN2_SCE_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK OTG_FS_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
OTG_FS_IRQHandler
|
||||||
|
B OTG_FS_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK DMA2_Stream5_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
DMA2_Stream5_IRQHandler
|
||||||
|
B DMA2_Stream5_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK DMA2_Stream6_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
DMA2_Stream6_IRQHandler
|
||||||
|
B DMA2_Stream6_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK DMA2_Stream7_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
DMA2_Stream7_IRQHandler
|
||||||
|
B DMA2_Stream7_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK USART6_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
USART6_IRQHandler
|
||||||
|
B USART6_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK I2C3_EV_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
I2C3_EV_IRQHandler
|
||||||
|
B I2C3_EV_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK I2C3_ER_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
I2C3_ER_IRQHandler
|
||||||
|
B I2C3_ER_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK OTG_HS_EP1_OUT_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
OTG_HS_EP1_OUT_IRQHandler
|
||||||
|
B OTG_HS_EP1_OUT_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK OTG_HS_EP1_IN_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
OTG_HS_EP1_IN_IRQHandler
|
||||||
|
B OTG_HS_EP1_IN_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK OTG_HS_WKUP_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
OTG_HS_WKUP_IRQHandler
|
||||||
|
B OTG_HS_WKUP_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK OTG_HS_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
OTG_HS_IRQHandler
|
||||||
|
B OTG_HS_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK HASH_RNG_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
HASH_RNG_IRQHandler
|
||||||
|
B HASH_RNG_IRQHandler
|
||||||
|
|
||||||
|
PUBWEAK FPU_IRQHandler
|
||||||
|
SECTION .text:CODE:REORDER:NOROOT(1)
|
||||||
|
FPU_IRQHandler
|
||||||
|
B FPU_IRQHandler
|
||||||
|
|
||||||
|
END
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
|
|
@ -0,0 +1,37 @@
|
||||||
|
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||||
|
/*-Editor annotation file-*/
|
||||||
|
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||||
|
/*-Specials-*/
|
||||||
|
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||||
|
/*-Memory Regions-*/
|
||||||
|
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
|
||||||
|
define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF;
|
||||||
|
/* [RAM] Vector table dynamic copy: 98 vectors * 4 bytes = 392 bytes (0x188) */
|
||||||
|
define symbol __NVIC_start__ = 0x20000000;
|
||||||
|
define symbol __NVIC_end__ = 0x20000187; /* to be aligned on 8 bytes */
|
||||||
|
define symbol __ICFEDIT_region_RAM_start__ = 0x20000188;
|
||||||
|
define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF;
|
||||||
|
define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000;
|
||||||
|
define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF;
|
||||||
|
/*-Sizes-*/
|
||||||
|
define symbol __ICFEDIT_size_cstack__ = 0x400;
|
||||||
|
define symbol __ICFEDIT_size_heap__ = 0x8000;
|
||||||
|
/**** End of ICF editor section. ###ICF###*/
|
||||||
|
|
||||||
|
|
||||||
|
define memory mem with size = 4G;
|
||||||
|
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||||
|
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||||
|
define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__];
|
||||||
|
|
||||||
|
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||||
|
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||||
|
|
||||||
|
initialize by copy { readwrite };
|
||||||
|
do not initialize { section .noinit };
|
||||||
|
|
||||||
|
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||||
|
|
||||||
|
place in ROM_region { readonly };
|
||||||
|
place in RAM_region { readwrite,
|
||||||
|
block CSTACK, block HEAP };
|
||||||
|
|
@ -0,0 +1,38 @@
|
||||||
|
/* mbed Microcontroller Library
|
||||||
|
* A generic CMSIS include header
|
||||||
|
*******************************************************************************
|
||||||
|
* Copyright (c) 2014, STMicroelectronics
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef MBED_CMSIS_H
|
||||||
|
#define MBED_CMSIS_H
|
||||||
|
|
||||||
|
#include "stm32f4xx.h"
|
||||||
|
#include "cmsis_nvic.h"
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,55 @@
|
||||||
|
/* mbed Microcontroller Library
|
||||||
|
* CMSIS-style functionality to support dynamic vectors
|
||||||
|
*******************************************************************************
|
||||||
|
* Copyright (c) 2014, STMicroelectronics
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*******************************************************************************
|
||||||
|
*/
|
||||||
|
#include "cmsis_nvic.h"
|
||||||
|
|
||||||
|
#define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Vectors positioned at start of RAM
|
||||||
|
#define NVIC_FLASH_VECTOR_ADDRESS (0x08000000) // Initial vector position in flash
|
||||||
|
|
||||||
|
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
|
||||||
|
uint32_t *vectors = (uint32_t *)SCB->VTOR;
|
||||||
|
uint32_t i;
|
||||||
|
|
||||||
|
// Copy and switch to dynamic vectors if the first time called
|
||||||
|
if (SCB->VTOR == NVIC_FLASH_VECTOR_ADDRESS) {
|
||||||
|
uint32_t *old_vectors = vectors;
|
||||||
|
vectors = (uint32_t*)NVIC_RAM_VECTOR_ADDRESS;
|
||||||
|
for (i=0; i<NVIC_NUM_VECTORS; i++) {
|
||||||
|
vectors[i] = old_vectors[i];
|
||||||
|
}
|
||||||
|
SCB->VTOR = (uint32_t)NVIC_RAM_VECTOR_ADDRESS;
|
||||||
|
}
|
||||||
|
vectors[IRQn + NVIC_USER_IRQ_OFFSET] = vector;
|
||||||
|
}
|
||||||
|
|
||||||
|
uint32_t NVIC_GetVector(IRQn_Type IRQn) {
|
||||||
|
uint32_t *vectors = (uint32_t*)SCB->VTOR;
|
||||||
|
return vectors[IRQn + NVIC_USER_IRQ_OFFSET];
|
||||||
|
}
|
||||||
|
|
@ -0,0 +1,55 @@
|
||||||
|
/* mbed Microcontroller Library
|
||||||
|
* CMSIS-style functionality to support dynamic vectors
|
||||||
|
*******************************************************************************
|
||||||
|
* Copyright (c) 2014, STMicroelectronics
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef MBED_CMSIS_NVIC_H
|
||||||
|
#define MBED_CMSIS_NVIC_H
|
||||||
|
|
||||||
|
// STM32F405RG
|
||||||
|
// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F
|
||||||
|
// MCU Peripherals: 82 vectors = 328 bytes from 0x40 to ...
|
||||||
|
// Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM
|
||||||
|
#define NVIC_NUM_VECTORS 98
|
||||||
|
#define NVIC_USER_IRQ_OFFSET 16
|
||||||
|
|
||||||
|
#include "cmsis.h"
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector);
|
||||||
|
uint32_t NVIC_GetVector(IRQn_Type IRQn);
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,120 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file hal_tick.c
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief Initialization of HAL tick
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without modification,
|
||||||
|
* are permitted provided that the following conditions are met:
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
#include "hal_tick.h"
|
||||||
|
|
||||||
|
TIM_HandleTypeDef TimMasterHandle;
|
||||||
|
uint32_t PreviousVal = 0;
|
||||||
|
|
||||||
|
void us_ticker_irq_handler(void);
|
||||||
|
|
||||||
|
void timer_irq_handler(void) {
|
||||||
|
// Channel 1 for mbed timeout
|
||||||
|
if (__HAL_TIM_GET_ITSTATUS(&TimMasterHandle, TIM_IT_CC1) == SET) {
|
||||||
|
__HAL_TIM_CLEAR_IT(&TimMasterHandle, TIM_IT_CC1);
|
||||||
|
us_ticker_irq_handler();
|
||||||
|
}
|
||||||
|
|
||||||
|
// Channel 2 for HAL tick
|
||||||
|
if (__HAL_TIM_GET_ITSTATUS(&TimMasterHandle, TIM_IT_CC2) == SET) {
|
||||||
|
__HAL_TIM_CLEAR_IT(&TimMasterHandle, TIM_IT_CC2);
|
||||||
|
uint32_t val = __HAL_TIM_GetCounter(&TimMasterHandle);
|
||||||
|
if ((val - PreviousVal) >= HAL_TICK_DELAY) {
|
||||||
|
// Increment HAL variable
|
||||||
|
HAL_IncTick();
|
||||||
|
// Prepare next interrupt
|
||||||
|
__HAL_TIM_SetCompare(&TimMasterHandle, TIM_CHANNEL_2, val + HAL_TICK_DELAY);
|
||||||
|
PreviousVal = val;
|
||||||
|
#if 0 // For DEBUG only
|
||||||
|
HAL_GPIO_TogglePin(GPIOB, GPIO_PIN_6);
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
// Reconfigure the HAL tick using a standard timer instead of systick.
|
||||||
|
HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) {
|
||||||
|
// Enable timer clock
|
||||||
|
TIM_MST_RCC;
|
||||||
|
|
||||||
|
// Reset timer
|
||||||
|
TIM_MST_RESET_ON;
|
||||||
|
TIM_MST_RESET_OFF;
|
||||||
|
|
||||||
|
// Configure time base
|
||||||
|
TimMasterHandle.Instance = TIM_MST;
|
||||||
|
TimMasterHandle.Init.Period = 0xFFFFFFFF;
|
||||||
|
TimMasterHandle.Init.Prescaler = (uint32_t)(SystemCoreClock / 1000000) - 1; // 1 µs tick
|
||||||
|
TimMasterHandle.Init.ClockDivision = 0;
|
||||||
|
TimMasterHandle.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||||||
|
TimMasterHandle.Init.RepetitionCounter = 0;
|
||||||
|
HAL_TIM_OC_Init(&TimMasterHandle);
|
||||||
|
|
||||||
|
NVIC_SetVector(TIM_MST_IRQ, (uint32_t)timer_irq_handler);
|
||||||
|
NVIC_EnableIRQ(TIM_MST_IRQ);
|
||||||
|
|
||||||
|
// Channel 1 for mbed timeout
|
||||||
|
HAL_TIM_OC_Start(&TimMasterHandle, TIM_CHANNEL_1);
|
||||||
|
|
||||||
|
// Channel 2 for HAL tick
|
||||||
|
HAL_TIM_OC_Start(&TimMasterHandle, TIM_CHANNEL_2);
|
||||||
|
PreviousVal = __HAL_TIM_GetCounter(&TimMasterHandle);
|
||||||
|
__HAL_TIM_SetCompare(&TimMasterHandle, TIM_CHANNEL_2, PreviousVal + HAL_TICK_DELAY);
|
||||||
|
__HAL_TIM_ENABLE_IT(&TimMasterHandle, TIM_IT_CC2);
|
||||||
|
|
||||||
|
#if 0 // For DEBUG only
|
||||||
|
__GPIOB_CLK_ENABLE();
|
||||||
|
GPIO_InitTypeDef GPIO_InitStruct;
|
||||||
|
GPIO_InitStruct.Pin = GPIO_PIN_6;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_PULLUP;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FAST;
|
||||||
|
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
return HAL_OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
|
|
@ -0,0 +1,60 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file hal_tick.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief Initialization of HAL tick
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without modification,
|
||||||
|
* are permitted provided that the following conditions are met:
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
#ifndef __HAL_TICK_H
|
||||||
|
#define __HAL_TICK_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#include "stm32f4xx.h"
|
||||||
|
#include "cmsis_nvic.h"
|
||||||
|
|
||||||
|
#define TIM_MST TIM5
|
||||||
|
#define TIM_MST_IRQ TIM5_IRQn
|
||||||
|
#define TIM_MST_RCC __TIM5_CLK_ENABLE()
|
||||||
|
|
||||||
|
#define TIM_MST_RESET_ON __TIM5_FORCE_RESET()
|
||||||
|
#define TIM_MST_RESET_OFF __TIM5_RELEASE_RESET()
|
||||||
|
|
||||||
|
#define HAL_TICK_DELAY (1000) // 1 ms
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif // __HAL_TICK_H
|
||||||
|
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,222 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f4xx.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V2.1.0
|
||||||
|
* @date 19-June-2014
|
||||||
|
* @brief CMSIS STM32F4xx Device Peripheral Access Layer Header File.
|
||||||
|
*
|
||||||
|
* The file is the unique include file that the application programmer
|
||||||
|
* is using in the C source code, usually in main.c. This file contains:
|
||||||
|
* - Configuration section that allows to select:
|
||||||
|
* - The STM32F4xx device used in the target application
|
||||||
|
* - To use or not the peripheral’s drivers in application code(i.e.
|
||||||
|
* code will be based on direct access to peripheral’s registers
|
||||||
|
* rather than drivers API), this option is controlled by
|
||||||
|
* "#define USE_HAL_DRIVER"
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without modification,
|
||||||
|
* are permitted provided that the following conditions are met:
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup CMSIS
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup stm32f4xx
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef __STM32F4xx_H
|
||||||
|
#define __STM32F4xx_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif /* __cplusplus */
|
||||||
|
|
||||||
|
/** @addtogroup Library_configuration_section
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Uncomment the line below according to the target STM32 device used in your
|
||||||
|
application
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if !defined (STM32F405xx) && !defined (STM32F415xx) && !defined (STM32F407xx) && !defined (STM32F417xx) && \
|
||||||
|
!defined (STM32F427xx) && !defined (STM32F437xx) && !defined (STM32F429xx) && !defined (STM32F439xx) && \
|
||||||
|
!defined (STM32F401xC) && !defined (STM32F401xE) && !defined (STM32F411xE)
|
||||||
|
#define STM32F405xx /*!< STM32F405RG, STM32F405VG and STM32F405ZG Devices */
|
||||||
|
/* #define STM32F415xx */ /*!< STM32F415RG, STM32F415VG and STM32F415ZG Devices */
|
||||||
|
/* #define STM32F407xx */ /*!< STM32F407VG, STM32F407VE, STM32F407ZG, STM32F407ZE, STM32F407IG and STM32F407IE Devices */
|
||||||
|
/* #define STM32F417xx */ /*!< STM32F417VG, STM32F417VE, STM32F417ZG, STM32F417ZE, STM32F417IG and STM32F417IE Devices */
|
||||||
|
/* #define STM32F427xx */ /*!< STM32F427VG, STM32F427VI, STM32F427ZG, STM32F427ZI, STM32F427IG and STM32F427II Devices */
|
||||||
|
/* #define STM32F437xx */ /*!< STM32F437VG, STM32F437VI, STM32F437ZG, STM32F437ZI, STM32F437IG and STM32F437II Devices */
|
||||||
|
/* #define STM32F429xx */ /*!< STM32F429VG, STM32F429VI, STM32F429ZG, STM32F429ZI, STM32F429BG, STM32F429BI, STM32F429NG,
|
||||||
|
STM32F439NI, STM32F429IG and STM32F429II Devices */
|
||||||
|
/* #define STM32F439xx */ /*!< STM32F439VG, STM32F439VI, STM32F439ZG, STM32F439ZI, STM32F439BG, STM32F439BI, STM32F439NG,
|
||||||
|
STM32F439NI, STM32F439IG and STM32F439II Devices */
|
||||||
|
/* #define STM32F401xC */ /*!< STM32F401CB, STM32F401CC, STM32F401RB, STM32F401RC, STM32F401VB and STM32F401VC Devices */
|
||||||
|
/* #define STM32F401xE */ /*!< STM32F401CD, STM32F401RD, STM32F401VD, STM32F401CE, STM32F401RE and STM32F401VE Devices */
|
||||||
|
/* #define STM32F411xE */ /*!< STM32F411CD, STM32F411RD, STM32F411VD, STM32F411CE, STM32F411RE and STM32F411VE Devices */
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Tip: To avoid modifying this file each time you need to switch between these
|
||||||
|
devices, you can define the device in your toolchain compiler preprocessor.
|
||||||
|
*/
|
||||||
|
#if !defined (USE_HAL_DRIVER)
|
||||||
|
/**
|
||||||
|
* @brief Comment the line below if you will not use the peripherals drivers.
|
||||||
|
In this case, these drivers will not be included and the application code will
|
||||||
|
be based on direct access to peripherals registers
|
||||||
|
*/
|
||||||
|
#define USE_HAL_DRIVER
|
||||||
|
#endif /* USE_HAL_DRIVER */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief CMSIS Device version number V2.1.0
|
||||||
|
*/
|
||||||
|
#define __STM32F4xx_CMSIS_DEVICE_VERSION_MAIN (0x02) /*!< [31:24] main version */
|
||||||
|
#define __STM32F4xx_CMSIS_DEVICE_VERSION_SUB1 (0x01) /*!< [23:16] sub1 version */
|
||||||
|
#define __STM32F4xx_CMSIS_DEVICE_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
|
||||||
|
#define __STM32F4xx_CMSIS_DEVICE_VERSION_RC (0x00) /*!< [7:0] release candidate */
|
||||||
|
#define __STM32F4xx_CMSIS_DEVICE_VERSION ((__STM32F4xx_CMSIS_DEVICE_VERSION_MAIN << 24)\
|
||||||
|
|(__STM32F4xx_CMSIS_DEVICE_VERSION_SUB1 << 16)\
|
||||||
|
|(__STM32F4xx_CMSIS_DEVICE_VERSION_SUB2 << 8 )\
|
||||||
|
|(__STM32F4xx_CMSIS_DEVICE_VERSION))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup Device_Included
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if defined(STM32F405xx)
|
||||||
|
#include "stm32f405xx.h"
|
||||||
|
#elif defined(STM32F415xx)
|
||||||
|
#include "stm32f415xx.h"
|
||||||
|
#elif defined(STM32F407xx)
|
||||||
|
#include "stm32f407xx.h"
|
||||||
|
#elif defined(STM32F417xx)
|
||||||
|
#include "stm32f417xx.h"
|
||||||
|
#elif defined(STM32F427xx)
|
||||||
|
#include "stm32f427xx.h"
|
||||||
|
#elif defined(STM32F437xx)
|
||||||
|
#include "stm32f437xx.h"
|
||||||
|
#elif defined(STM32F429xx)
|
||||||
|
#include "stm32f429xx.h"
|
||||||
|
#elif defined(STM32F439xx)
|
||||||
|
#include "stm32f439xx.h"
|
||||||
|
#elif defined(STM32F401xC)
|
||||||
|
#include "stm32f401xc.h"
|
||||||
|
#elif defined(STM32F401xE)
|
||||||
|
#include "stm32f401xe.h"
|
||||||
|
#elif defined(STM32F411xE)
|
||||||
|
#include "stm32f411xe.h"
|
||||||
|
#else
|
||||||
|
#error "Please select first the target STM32F4xx device used in your application (in stm32f4xx.h file)"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup Exported_types
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
RESET = 0,
|
||||||
|
SET = !RESET
|
||||||
|
} FlagStatus, ITStatus;
|
||||||
|
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
DISABLE = 0,
|
||||||
|
ENABLE = !DISABLE
|
||||||
|
} FunctionalState;
|
||||||
|
#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
|
||||||
|
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
ERROR = 0,
|
||||||
|
SUCCESS = !ERROR
|
||||||
|
} ErrorStatus;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
/** @addtogroup Exported_macro
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define SET_BIT(REG, BIT) ((REG) |= (BIT))
|
||||||
|
|
||||||
|
#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT))
|
||||||
|
|
||||||
|
#define READ_BIT(REG, BIT) ((REG) & (BIT))
|
||||||
|
|
||||||
|
#define CLEAR_REG(REG) ((REG) = (0x0))
|
||||||
|
|
||||||
|
#define WRITE_REG(REG, VAL) ((REG) = (VAL))
|
||||||
|
|
||||||
|
#define READ_REG(REG) ((REG))
|
||||||
|
|
||||||
|
#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
|
||||||
|
|
||||||
|
#define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL)))
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if defined (USE_HAL_DRIVER)
|
||||||
|
#include "stm32f4xx_hal.h"
|
||||||
|
#endif /* USE_HAL_DRIVER */
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif /* __cplusplus */
|
||||||
|
|
||||||
|
#endif /* __STM32F4xx_H */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
|
|
@ -0,0 +1,572 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file system_stm32f4xx.c
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V2.1.0
|
||||||
|
* @date 19-June-2014
|
||||||
|
* @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
|
||||||
|
*
|
||||||
|
* This file provides two functions and one global variable to be called from
|
||||||
|
* user application:
|
||||||
|
* - SystemInit(): This function is called at startup just after reset and
|
||||||
|
* before branch to main program. This call is made inside
|
||||||
|
* the "startup_stm32f4xx.s" file.
|
||||||
|
*
|
||||||
|
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
|
||||||
|
* by the user application to setup the SysTick
|
||||||
|
* timer or configure other parameters.
|
||||||
|
*
|
||||||
|
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
|
||||||
|
* be called whenever the core clock is changed
|
||||||
|
* during program execution.
|
||||||
|
*
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without modification,
|
||||||
|
* are permitted provided that the following conditions are met:
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup CMSIS
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup stm32f4xx_system
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32F4xx_System_Private_Includes
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
#include "stm32f4xx.h"
|
||||||
|
#include "hal_tick.h"
|
||||||
|
|
||||||
|
#if !defined (HSE_VALUE)
|
||||||
|
#define HSE_VALUE ((uint32_t)8000000) /*!< Default value of the External oscillator in Hz */
|
||||||
|
#endif /* HSE_VALUE */
|
||||||
|
|
||||||
|
#if !defined (HSI_VALUE)
|
||||||
|
#define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
|
||||||
|
#endif /* HSI_VALUE */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32F4xx_System_Private_TypesDefinitions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32F4xx_System_Private_Defines
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/************************* Miscellaneous Configuration ************************/
|
||||||
|
/*!< Uncomment the following line if you need to use external SRAM or SDRAM mounted
|
||||||
|
on STM324xG_EVAL/STM324x9I_EVAL boards as data memory */
|
||||||
|
#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
|
||||||
|
/* #define DATA_IN_ExtSRAM */
|
||||||
|
#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
|
||||||
|
|
||||||
|
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
|
||||||
|
/* #define DATA_IN_ExtSDRAM */
|
||||||
|
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
|
||||||
|
|
||||||
|
#if defined(DATA_IN_ExtSRAM) && defined(DATA_IN_ExtSDRAM)
|
||||||
|
#error "Please select DATA_IN_ExtSRAM or DATA_IN_ExtSDRAM "
|
||||||
|
#endif /* DATA_IN_ExtSRAM && DATA_IN_ExtSDRAM */
|
||||||
|
|
||||||
|
/*!< Uncomment the following line if you need to relocate your vector Table in
|
||||||
|
Internal SRAM. */
|
||||||
|
/* #define VECT_TAB_SRAM */
|
||||||
|
#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
|
||||||
|
This value must be a multiple of 0x200. */
|
||||||
|
/******************************************************************************/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32F4xx_System_Private_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32F4xx_System_Private_Variables
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/* This variable is updated in three ways:
|
||||||
|
1) by calling CMSIS function SystemCoreClockUpdate()
|
||||||
|
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
|
||||||
|
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
|
||||||
|
Note: If you use this function to configure the system clock; then there
|
||||||
|
is no need to call the 2 first functions listed above, since SystemCoreClock
|
||||||
|
variable is updated automatically.
|
||||||
|
*/
|
||||||
|
uint32_t SystemCoreClock = 48000000;
|
||||||
|
__IO const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32F4xx_System_Private_FunctionPrototypes
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
|
||||||
|
static void SystemInit_ExtMemCtl(void);
|
||||||
|
#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32F4xx_System_Private_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Setup the microcontroller system
|
||||||
|
* Initialize the FPU setting, vector table location and External memory
|
||||||
|
* configuration.
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void SystemInit(void)
|
||||||
|
{
|
||||||
|
/* FPU settings ------------------------------------------------------------*/
|
||||||
|
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
|
||||||
|
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
|
||||||
|
#endif
|
||||||
|
/* Reset the RCC clock configuration to the default reset state ------------*/
|
||||||
|
/* Set HSION bit */
|
||||||
|
RCC->CR |= (uint32_t)0x00000001;
|
||||||
|
|
||||||
|
/* Reset CFGR register */
|
||||||
|
RCC->CFGR = 0x00000000;
|
||||||
|
|
||||||
|
/* Reset HSEON, CSSON and PLLON bits */
|
||||||
|
RCC->CR &= (uint32_t)0xFEF6FFFF;
|
||||||
|
|
||||||
|
/* Reset PLLCFGR register */
|
||||||
|
RCC->PLLCFGR = 0x24003010;
|
||||||
|
|
||||||
|
/* Reset HSEBYP bit */
|
||||||
|
RCC->CR &= (uint32_t)0xFFFBFFFF;
|
||||||
|
|
||||||
|
/* Disable all interrupts */
|
||||||
|
RCC->CIR = 0x00000000;
|
||||||
|
|
||||||
|
#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
|
||||||
|
SystemInit_ExtMemCtl();
|
||||||
|
#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
|
||||||
|
|
||||||
|
/* Configure the Vector Table location add offset address ------------------*/
|
||||||
|
#ifdef VECT_TAB_SRAM
|
||||||
|
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
|
||||||
|
#else
|
||||||
|
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Configure the Cube driver */
|
||||||
|
SystemCoreClock = 48000000; // At this stage the HSI is used as system clock
|
||||||
|
HAL_Init();
|
||||||
|
|
||||||
|
/* Configure the System clock source, PLL Multiplier and Divider factors,
|
||||||
|
AHB/APBx prescalers and Flash settings */
|
||||||
|
SetSysClock();
|
||||||
|
|
||||||
|
SystemCoreClockUpdate();
|
||||||
|
|
||||||
|
/* Reset the timer to avoid issues after the RAM initialization */
|
||||||
|
TIM_MST_RESET_ON;
|
||||||
|
TIM_MST_RESET_OFF;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Update SystemCoreClock variable according to Clock Register Values.
|
||||||
|
* The SystemCoreClock variable contains the core clock (HCLK), it can
|
||||||
|
* be used by the user application to setup the SysTick timer or configure
|
||||||
|
* other parameters.
|
||||||
|
*
|
||||||
|
* @note Each time the core clock (HCLK) changes, this function must be called
|
||||||
|
* to update SystemCoreClock variable value. Otherwise, any configuration
|
||||||
|
* based on this variable will be incorrect.
|
||||||
|
*
|
||||||
|
* @note - The system frequency computed by this function is not the real
|
||||||
|
* frequency in the chip. It is calculated based on the predefined
|
||||||
|
* constant and the selected clock source:
|
||||||
|
*
|
||||||
|
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
|
||||||
|
*
|
||||||
|
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
|
||||||
|
*
|
||||||
|
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
|
||||||
|
* or HSI_VALUE(*) multiplied/divided by the PLL factors.
|
||||||
|
*
|
||||||
|
* (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value
|
||||||
|
* 16 MHz) but the real value may vary depending on the variations
|
||||||
|
* in voltage and temperature.
|
||||||
|
*
|
||||||
|
* (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (its value
|
||||||
|
* depends on the application requirements), user has to ensure that HSE_VALUE
|
||||||
|
* is same as the real frequency of the crystal used. Otherwise, this function
|
||||||
|
* may have wrong result.
|
||||||
|
*
|
||||||
|
* - The result of this function could be not correct when using fractional
|
||||||
|
* value for HSE crystal.
|
||||||
|
*
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void SystemCoreClockUpdate(void)
|
||||||
|
{
|
||||||
|
uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
|
||||||
|
|
||||||
|
/* Get SYSCLK source -------------------------------------------------------*/
|
||||||
|
tmp = RCC->CFGR & RCC_CFGR_SWS;
|
||||||
|
|
||||||
|
switch (tmp)
|
||||||
|
{
|
||||||
|
case 0x00: /* HSI used as system clock source */
|
||||||
|
SystemCoreClock = HSI_VALUE;
|
||||||
|
break;
|
||||||
|
case 0x04: /* HSE used as system clock source */
|
||||||
|
SystemCoreClock = HSE_VALUE;
|
||||||
|
break;
|
||||||
|
case 0x08: /* PLL used as system clock source */
|
||||||
|
|
||||||
|
/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
|
||||||
|
SYSCLK = PLL_VCO / PLL_P
|
||||||
|
*/
|
||||||
|
pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
|
||||||
|
pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
|
||||||
|
|
||||||
|
if (pllsource != 0)
|
||||||
|
{
|
||||||
|
/* HSE used as PLL clock source */
|
||||||
|
pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
/* HSI used as PLL clock source */
|
||||||
|
pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
|
||||||
|
}
|
||||||
|
|
||||||
|
pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2;
|
||||||
|
SystemCoreClock = pllvco/pllp;
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
SystemCoreClock = HSI_VALUE;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
/* Compute HCLK frequency --------------------------------------------------*/
|
||||||
|
/* Get HCLK prescaler */
|
||||||
|
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
|
||||||
|
/* HCLK frequency */
|
||||||
|
SystemCoreClock >>= tmp;
|
||||||
|
}
|
||||||
|
|
||||||
|
#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
|
||||||
|
/**
|
||||||
|
* @brief Setup the external memory controller.
|
||||||
|
* Called in startup_stm32f4xx.s before jump to main.
|
||||||
|
* This function configures the external memories (SRAM/SDRAM)
|
||||||
|
* This SRAM/SDRAM will be used as program data memory (including heap and stack).
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void SystemInit_ExtMemCtl(void)
|
||||||
|
{
|
||||||
|
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
|
||||||
|
#if defined (DATA_IN_ExtSDRAM)
|
||||||
|
register uint32_t tmpreg = 0, timeout = 0xFFFF;
|
||||||
|
register uint32_t index;
|
||||||
|
|
||||||
|
/* Enable GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH and GPIOI interface
|
||||||
|
clock */
|
||||||
|
RCC->AHB1ENR |= 0x000001F8;
|
||||||
|
|
||||||
|
/* Connect PDx pins to FMC Alternate function */
|
||||||
|
GPIOD->AFR[0] = 0x000000CC;
|
||||||
|
GPIOD->AFR[1] = 0xCC000CCC;
|
||||||
|
/* Configure PDx pins in Alternate function mode */
|
||||||
|
GPIOD->MODER = 0xA02A000A;
|
||||||
|
/* Configure PDx pins speed to 50 MHz */
|
||||||
|
GPIOD->OSPEEDR = 0xA02A000A;
|
||||||
|
/* Configure PDx pins Output type to push-pull */
|
||||||
|
GPIOD->OTYPER = 0x00000000;
|
||||||
|
/* No pull-up, pull-down for PDx pins */
|
||||||
|
GPIOD->PUPDR = 0x00000000;
|
||||||
|
|
||||||
|
/* Connect PEx pins to FMC Alternate function */
|
||||||
|
GPIOE->AFR[0] = 0xC00000CC;
|
||||||
|
GPIOE->AFR[1] = 0xCCCCCCCC;
|
||||||
|
/* Configure PEx pins in Alternate function mode */
|
||||||
|
GPIOE->MODER = 0xAAAA800A;
|
||||||
|
/* Configure PEx pins speed to 50 MHz */
|
||||||
|
GPIOE->OSPEEDR = 0xAAAA800A;
|
||||||
|
/* Configure PEx pins Output type to push-pull */
|
||||||
|
GPIOE->OTYPER = 0x00000000;
|
||||||
|
/* No pull-up, pull-down for PEx pins */
|
||||||
|
GPIOE->PUPDR = 0x00000000;
|
||||||
|
|
||||||
|
/* Connect PFx pins to FMC Alternate function */
|
||||||
|
GPIOF->AFR[0] = 0xCCCCCCCC;
|
||||||
|
GPIOF->AFR[1] = 0xCCCCCCCC;
|
||||||
|
/* Configure PFx pins in Alternate function mode */
|
||||||
|
GPIOF->MODER = 0xAA800AAA;
|
||||||
|
/* Configure PFx pins speed to 50 MHz */
|
||||||
|
GPIOF->OSPEEDR = 0xAA800AAA;
|
||||||
|
/* Configure PFx pins Output type to push-pull */
|
||||||
|
GPIOF->OTYPER = 0x00000000;
|
||||||
|
/* No pull-up, pull-down for PFx pins */
|
||||||
|
GPIOF->PUPDR = 0x00000000;
|
||||||
|
|
||||||
|
/* Connect PGx pins to FMC Alternate function */
|
||||||
|
GPIOG->AFR[0] = 0xCCCCCCCC;
|
||||||
|
GPIOG->AFR[1] = 0xCCCCCCCC;
|
||||||
|
/* Configure PGx pins in Alternate function mode */
|
||||||
|
GPIOG->MODER = 0xAAAAAAAA;
|
||||||
|
/* Configure PGx pins speed to 50 MHz */
|
||||||
|
GPIOG->OSPEEDR = 0xAAAAAAAA;
|
||||||
|
/* Configure PGx pins Output type to push-pull */
|
||||||
|
GPIOG->OTYPER = 0x00000000;
|
||||||
|
/* No pull-up, pull-down for PGx pins */
|
||||||
|
GPIOG->PUPDR = 0x00000000;
|
||||||
|
|
||||||
|
/* Connect PHx pins to FMC Alternate function */
|
||||||
|
GPIOH->AFR[0] = 0x00C0CC00;
|
||||||
|
GPIOH->AFR[1] = 0xCCCCCCCC;
|
||||||
|
/* Configure PHx pins in Alternate function mode */
|
||||||
|
GPIOH->MODER = 0xAAAA08A0;
|
||||||
|
/* Configure PHx pins speed to 50 MHz */
|
||||||
|
GPIOH->OSPEEDR = 0xAAAA08A0;
|
||||||
|
/* Configure PHx pins Output type to push-pull */
|
||||||
|
GPIOH->OTYPER = 0x00000000;
|
||||||
|
/* No pull-up, pull-down for PHx pins */
|
||||||
|
GPIOH->PUPDR = 0x00000000;
|
||||||
|
|
||||||
|
/* Connect PIx pins to FMC Alternate function */
|
||||||
|
GPIOI->AFR[0] = 0xCCCCCCCC;
|
||||||
|
GPIOI->AFR[1] = 0x00000CC0;
|
||||||
|
/* Configure PIx pins in Alternate function mode */
|
||||||
|
GPIOI->MODER = 0x0028AAAA;
|
||||||
|
/* Configure PIx pins speed to 50 MHz */
|
||||||
|
GPIOI->OSPEEDR = 0x0028AAAA;
|
||||||
|
/* Configure PIx pins Output type to push-pull */
|
||||||
|
GPIOI->OTYPER = 0x00000000;
|
||||||
|
/* No pull-up, pull-down for PIx pins */
|
||||||
|
GPIOI->PUPDR = 0x00000000;
|
||||||
|
|
||||||
|
/*-- FMC Configuration ------------------------------------------------------*/
|
||||||
|
/* Enable the FMC interface clock */
|
||||||
|
RCC->AHB3ENR |= 0x00000001;
|
||||||
|
|
||||||
|
/* Configure and enable SDRAM bank1 */
|
||||||
|
FMC_Bank5_6->SDCR[0] = 0x000019E0;
|
||||||
|
FMC_Bank5_6->SDTR[0] = 0x01115351;
|
||||||
|
|
||||||
|
/* SDRAM initialization sequence */
|
||||||
|
/* Clock enable command */
|
||||||
|
FMC_Bank5_6->SDCMR = 0x00000011;
|
||||||
|
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||||
|
while((tmpreg != 0) && (timeout-- > 0))
|
||||||
|
{
|
||||||
|
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Delay */
|
||||||
|
for (index = 0; index<1000; index++);
|
||||||
|
|
||||||
|
/* PALL command */
|
||||||
|
FMC_Bank5_6->SDCMR = 0x00000012;
|
||||||
|
timeout = 0xFFFF;
|
||||||
|
while((tmpreg != 0) && (timeout-- > 0))
|
||||||
|
{
|
||||||
|
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Auto refresh command */
|
||||||
|
FMC_Bank5_6->SDCMR = 0x00000073;
|
||||||
|
timeout = 0xFFFF;
|
||||||
|
while((tmpreg != 0) && (timeout-- > 0))
|
||||||
|
{
|
||||||
|
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* MRD register program */
|
||||||
|
FMC_Bank5_6->SDCMR = 0x00046014;
|
||||||
|
timeout = 0xFFFF;
|
||||||
|
while((tmpreg != 0) && (timeout-- > 0))
|
||||||
|
{
|
||||||
|
tmpreg = FMC_Bank5_6->SDSR & 0x00000020;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Set refresh count */
|
||||||
|
tmpreg = FMC_Bank5_6->SDRTR;
|
||||||
|
FMC_Bank5_6->SDRTR = (tmpreg | (0x0000027C<<1));
|
||||||
|
|
||||||
|
/* Disable write protection */
|
||||||
|
tmpreg = FMC_Bank5_6->SDCR[0];
|
||||||
|
FMC_Bank5_6->SDCR[0] = (tmpreg & 0xFFFFFDFF);
|
||||||
|
#endif /* DATA_IN_ExtSDRAM */
|
||||||
|
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
|
||||||
|
|
||||||
|
#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
|
||||||
|
#if defined(DATA_IN_ExtSRAM)
|
||||||
|
/*-- GPIOs Configuration -----------------------------------------------------*/
|
||||||
|
/* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */
|
||||||
|
RCC->AHB1ENR |= 0x00000078;
|
||||||
|
|
||||||
|
/* Connect PDx pins to FMC Alternate function */
|
||||||
|
GPIOD->AFR[0] = 0x00CCC0CC;
|
||||||
|
GPIOD->AFR[1] = 0xCCCCCCCC;
|
||||||
|
/* Configure PDx pins in Alternate function mode */
|
||||||
|
GPIOD->MODER = 0xAAAA0A8A;
|
||||||
|
/* Configure PDx pins speed to 100 MHz */
|
||||||
|
GPIOD->OSPEEDR = 0xFFFF0FCF;
|
||||||
|
/* Configure PDx pins Output type to push-pull */
|
||||||
|
GPIOD->OTYPER = 0x00000000;
|
||||||
|
/* No pull-up, pull-down for PDx pins */
|
||||||
|
GPIOD->PUPDR = 0x00000000;
|
||||||
|
|
||||||
|
/* Connect PEx pins to FMC Alternate function */
|
||||||
|
GPIOE->AFR[0] = 0xC00CC0CC;
|
||||||
|
GPIOE->AFR[1] = 0xCCCCCCCC;
|
||||||
|
/* Configure PEx pins in Alternate function mode */
|
||||||
|
GPIOE->MODER = 0xAAAA828A;
|
||||||
|
/* Configure PEx pins speed to 100 MHz */
|
||||||
|
GPIOE->OSPEEDR = 0xFFFFC3CF;
|
||||||
|
/* Configure PEx pins Output type to push-pull */
|
||||||
|
GPIOE->OTYPER = 0x00000000;
|
||||||
|
/* No pull-up, pull-down for PEx pins */
|
||||||
|
GPIOE->PUPDR = 0x00000000;
|
||||||
|
|
||||||
|
/* Connect PFx pins to FMC Alternate function */
|
||||||
|
GPIOF->AFR[0] = 0x00CCCCCC;
|
||||||
|
GPIOF->AFR[1] = 0xCCCC0000;
|
||||||
|
/* Configure PFx pins in Alternate function mode */
|
||||||
|
GPIOF->MODER = 0xAA000AAA;
|
||||||
|
/* Configure PFx pins speed to 100 MHz */
|
||||||
|
GPIOF->OSPEEDR = 0xFF000FFF;
|
||||||
|
/* Configure PFx pins Output type to push-pull */
|
||||||
|
GPIOF->OTYPER = 0x00000000;
|
||||||
|
/* No pull-up, pull-down for PFx pins */
|
||||||
|
GPIOF->PUPDR = 0x00000000;
|
||||||
|
|
||||||
|
/* Connect PGx pins to FMC Alternate function */
|
||||||
|
GPIOG->AFR[0] = 0x00CCCCCC;
|
||||||
|
GPIOG->AFR[1] = 0x000000C0;
|
||||||
|
/* Configure PGx pins in Alternate function mode */
|
||||||
|
GPIOG->MODER = 0x00085AAA;
|
||||||
|
/* Configure PGx pins speed to 100 MHz */
|
||||||
|
GPIOG->OSPEEDR = 0x000CAFFF;
|
||||||
|
/* Configure PGx pins Output type to push-pull */
|
||||||
|
GPIOG->OTYPER = 0x00000000;
|
||||||
|
/* No pull-up, pull-down for PGx pins */
|
||||||
|
GPIOG->PUPDR = 0x00000000;
|
||||||
|
|
||||||
|
/*-- FMC/FSMC Configuration --------------------------------------------------*/
|
||||||
|
/* Enable the FMC/FSMC interface clock */
|
||||||
|
RCC->AHB3ENR |= 0x00000001;
|
||||||
|
|
||||||
|
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
|
||||||
|
/* Configure and enable Bank1_SRAM2 */
|
||||||
|
FMC_Bank1->BTCR[2] = 0x00001011;
|
||||||
|
FMC_Bank1->BTCR[3] = 0x00000201;
|
||||||
|
FMC_Bank1E->BWTR[2] = 0x0fffffff;
|
||||||
|
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
|
||||||
|
|
||||||
|
#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)
|
||||||
|
/* Configure and enable Bank1_SRAM2 */
|
||||||
|
FSMC_Bank1->BTCR[2] = 0x00001011;
|
||||||
|
FSMC_Bank1->BTCR[3] = 0x00000201;
|
||||||
|
FSMC_Bank1E->BWTR[2] = 0x0FFFFFFF;
|
||||||
|
#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
|
||||||
|
|
||||||
|
#endif /* DATA_IN_ExtSRAM */
|
||||||
|
#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
|
||||||
|
}
|
||||||
|
#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Configures the System clock source, PLL Multiplier and Divider factors,
|
||||||
|
* AHB/APBx prescalers and Flash settings
|
||||||
|
* @note This function should be called only once the RCC clock configuration
|
||||||
|
* is reset to the default reset state (done in SystemInit() function).
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void SetSysClock(void)
|
||||||
|
{
|
||||||
|
RCC_ClkInitTypeDef RCC_ClkInitStruct;
|
||||||
|
RCC_OscInitTypeDef RCC_OscInitStruct;
|
||||||
|
|
||||||
|
__PWR_CLK_ENABLE();
|
||||||
|
|
||||||
|
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
|
||||||
|
|
||||||
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
||||||
|
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
||||||
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||||
|
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||||
|
RCC_OscInitStruct.PLL.PLLM = 26;
|
||||||
|
RCC_OscInitStruct.PLL.PLLN = 192;
|
||||||
|
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
|
||||||
|
RCC_OscInitStruct.PLL.PLLQ = 4;
|
||||||
|
HAL_RCC_OscConfig(&RCC_OscInitStruct);
|
||||||
|
|
||||||
|
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
|
||||||
|
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||||||
|
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
||||||
|
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
|
||||||
|
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
|
||||||
|
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1);
|
||||||
|
}
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
|
|
@ -0,0 +1,124 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file system_stm32f4xx.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @version V2.1.0
|
||||||
|
* @date 19-June-2014
|
||||||
|
* @brief CMSIS Cortex-M4 Device System Source File for STM32F4xx devices.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without modification,
|
||||||
|
* are permitted provided that the following conditions are met:
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup CMSIS
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup stm32f4xx_system
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Define to prevent recursive inclusion
|
||||||
|
*/
|
||||||
|
#ifndef __SYSTEM_STM32F4XX_H
|
||||||
|
#define __SYSTEM_STM32F4XX_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/** @addtogroup STM32F4xx_System_Includes
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
/** @addtogroup STM32F4xx_System_Exported_types
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/* This variable is updated in three ways:
|
||||||
|
1) by calling CMSIS function SystemCoreClockUpdate()
|
||||||
|
2) by calling HAL API function HAL_RCC_GetSysClockFreq()
|
||||||
|
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
|
||||||
|
Note: If you use this function to configure the system clock; then there
|
||||||
|
is no need to call the 2 first functions listed above, since SystemCoreClock
|
||||||
|
variable is updated automatically.
|
||||||
|
*/
|
||||||
|
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32F4xx_System_Exported_Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32F4xx_System_Exported_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32F4xx_System_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
extern void SystemInit(void);
|
||||||
|
extern void SystemCoreClockUpdate(void);
|
||||||
|
extern void SetSysClock(void);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /*__SYSTEM_STM32F4XX_H */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
|
|
@ -0,0 +1,91 @@
|
||||||
|
/* mbed Microcontroller Library
|
||||||
|
*******************************************************************************
|
||||||
|
* Copyright (c) 2014, STMicroelectronics
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*******************************************************************************
|
||||||
|
*/
|
||||||
|
#ifndef MBED_PERIPHERALNAMES_H
|
||||||
|
#define MBED_PERIPHERALNAMES_H
|
||||||
|
|
||||||
|
#include "cmsis.h"
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
typedef enum {
|
||||||
|
ADC_1 = (int)ADC1_BASE,
|
||||||
|
ADC_2 = (int)ADC2_BASE,
|
||||||
|
ADC_3 = (int)ADC3_BASE
|
||||||
|
} ADCName;
|
||||||
|
|
||||||
|
typedef enum {
|
||||||
|
DAC_0 = 0,
|
||||||
|
DAC_1
|
||||||
|
} DACName;
|
||||||
|
|
||||||
|
typedef enum {
|
||||||
|
UART_1 = (int)USART1_BASE,
|
||||||
|
UART_2 = (int)USART2_BASE,
|
||||||
|
UART_3 = (int)USART3_BASE,
|
||||||
|
UART_4 = (int)UART4_BASE,
|
||||||
|
UART_5 = (int)UART5_BASE,
|
||||||
|
UART_6 = (int)USART6_BASE,
|
||||||
|
} UARTName;
|
||||||
|
|
||||||
|
#define STDIO_UART_TX PA_2
|
||||||
|
#define STDIO_UART_RX PA_3
|
||||||
|
#define STDIO_UART UART_2
|
||||||
|
|
||||||
|
typedef enum {
|
||||||
|
SPI_1 = (int)SPI1_BASE,
|
||||||
|
SPI_2 = (int)SPI2_BASE,
|
||||||
|
SPI_3 = (int)SPI3_BASE
|
||||||
|
} SPIName;
|
||||||
|
|
||||||
|
typedef enum {
|
||||||
|
I2C_1 = (int)I2C1_BASE,
|
||||||
|
I2C_2 = (int)I2C2_BASE,
|
||||||
|
I2C_3 = (int)I2C3_BASE
|
||||||
|
} I2CName;
|
||||||
|
|
||||||
|
typedef enum {
|
||||||
|
PWM_1 = (int)TIM1_BASE,
|
||||||
|
PWM_2 = (int)TIM2_BASE,
|
||||||
|
PWM_3 = (int)TIM3_BASE,
|
||||||
|
PWM_4 = (int)TIM4_BASE,
|
||||||
|
PWM_5 = (int)TIM5_BASE,
|
||||||
|
PWM_8 = (int)TIM8_BASE,
|
||||||
|
PWM_9 = (int)TIM9_BASE,
|
||||||
|
PWM_10 = (int)TIM10_BASE,
|
||||||
|
PWM_11 = (int)TIM11_BASE
|
||||||
|
} PWMName;
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,157 @@
|
||||||
|
/* mbed Microcontroller Library
|
||||||
|
*******************************************************************************
|
||||||
|
* Copyright (c) 2014, STMicroelectronics
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*******************************************************************************
|
||||||
|
*/
|
||||||
|
#ifndef MBED_PINNAMES_H
|
||||||
|
#define MBED_PINNAMES_H
|
||||||
|
|
||||||
|
#include "cmsis.h"
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// See stm32f4xx_hal_gpio.h and stm32f4xx_hal_gpio_ex.h for values of MODE, PUPD and AFNUM
|
||||||
|
#define STM_PIN_DATA(MODE, PUPD, AFNUM) ((int)(((AFNUM) << 7) | ((PUPD) << 4) | ((MODE) << 0)))
|
||||||
|
#define STM_PIN_MODE(X) (((X) >> 0) & 0x0F)
|
||||||
|
#define STM_PIN_PUPD(X) (((X) >> 4) & 0x07)
|
||||||
|
#define STM_PIN_AFNUM(X) (((X) >> 7) & 0x0F)
|
||||||
|
#define STM_MODE_INPUT (0)
|
||||||
|
#define STM_MODE_OUTPUT_PP (1)
|
||||||
|
#define STM_MODE_OUTPUT_OD (2)
|
||||||
|
#define STM_MODE_AF_PP (3)
|
||||||
|
#define STM_MODE_AF_OD (4)
|
||||||
|
#define STM_MODE_ANALOG (5)
|
||||||
|
#define STM_MODE_IT_RISING (6)
|
||||||
|
#define STM_MODE_IT_FALLING (7)
|
||||||
|
#define STM_MODE_IT_RISING_FALLING (8)
|
||||||
|
#define STM_MODE_EVT_RISING (9)
|
||||||
|
#define STM_MODE_EVT_FALLING (10)
|
||||||
|
#define STM_MODE_EVT_RISING_FALLING (11)
|
||||||
|
#define STM_MODE_IT_EVT_RESET (12)
|
||||||
|
|
||||||
|
// High nibble = port number (0=A, 1=B, 2=C, 3=D, 4=E, 5=F, 6=G, 7=H)
|
||||||
|
// Low nibble = pin number
|
||||||
|
#define STM_PORT(X) (((uint32_t)(X) >> 4) & 0xF)
|
||||||
|
#define STM_PIN(X) ((uint32_t)(X) & 0xF)
|
||||||
|
|
||||||
|
typedef enum {
|
||||||
|
PIN_INPUT,
|
||||||
|
PIN_OUTPUT
|
||||||
|
} PinDirection;
|
||||||
|
|
||||||
|
typedef enum {
|
||||||
|
PA_0 = 0x00,
|
||||||
|
PA_1 = 0x01,
|
||||||
|
PA_2 = 0x02,
|
||||||
|
PA_3 = 0x03,
|
||||||
|
PA_4 = 0x04,
|
||||||
|
PA_5 = 0x05,
|
||||||
|
PA_6 = 0x06,
|
||||||
|
PA_7 = 0x07,
|
||||||
|
PA_8 = 0x08,
|
||||||
|
PA_9 = 0x09,
|
||||||
|
PA_10 = 0x0A,
|
||||||
|
PA_11 = 0x0B,
|
||||||
|
PA_12 = 0x0C,
|
||||||
|
PA_13 = 0x0D,
|
||||||
|
PA_14 = 0x0E,
|
||||||
|
PA_15 = 0x0F,
|
||||||
|
|
||||||
|
PB_0 = 0x10,
|
||||||
|
PB_1 = 0x11,
|
||||||
|
PB_2 = 0x12,
|
||||||
|
PB_3 = 0x13,
|
||||||
|
PB_4 = 0x14,
|
||||||
|
PB_5 = 0x15,
|
||||||
|
PB_6 = 0x16,
|
||||||
|
PB_7 = 0x17,
|
||||||
|
PB_8 = 0x18,
|
||||||
|
PB_9 = 0x19,
|
||||||
|
PB_10 = 0x1A,
|
||||||
|
PB_11 = 0x1B,
|
||||||
|
PB_12 = 0x1C,
|
||||||
|
PB_13 = 0x1D,
|
||||||
|
PB_14 = 0x1E,
|
||||||
|
PB_15 = 0x1F,
|
||||||
|
|
||||||
|
PC_0 = 0x20,
|
||||||
|
PC_1 = 0x21,
|
||||||
|
PC_2 = 0x22,
|
||||||
|
PC_3 = 0x23,
|
||||||
|
PC_4 = 0x24,
|
||||||
|
PC_5 = 0x25,
|
||||||
|
PC_6 = 0x26,
|
||||||
|
PC_7 = 0x27,
|
||||||
|
PC_8 = 0x28,
|
||||||
|
PC_9 = 0x29,
|
||||||
|
PC_10 = 0x2A,
|
||||||
|
PC_11 = 0x2B,
|
||||||
|
PC_12 = 0x2C,
|
||||||
|
PC_13 = 0x2D,
|
||||||
|
PC_14 = 0x2E,
|
||||||
|
PC_15 = 0x2F,
|
||||||
|
|
||||||
|
PD_2 = 0x32,
|
||||||
|
|
||||||
|
PH_0 = 0x70,
|
||||||
|
PH_1 = 0x71,
|
||||||
|
|
||||||
|
// Generic signals namings
|
||||||
|
LED1 = PA_10,
|
||||||
|
LED2 = PA_10,
|
||||||
|
LED3 = PA_10,
|
||||||
|
LED4 = PA_10,
|
||||||
|
SERIAL_TX = PA_10,
|
||||||
|
SERIAL_RX = PA_9,
|
||||||
|
I2C_SCL = PA_8,
|
||||||
|
I2C_SDA = PC_9,
|
||||||
|
SPI_MOSI = PC_12,
|
||||||
|
SPI_MISO = PC_11,
|
||||||
|
SPI_SCK = PC_10,
|
||||||
|
SPI_CS = PC_13,
|
||||||
|
PWM0 = PA_8,
|
||||||
|
PWM1 = PC_9,
|
||||||
|
|
||||||
|
// Not connected
|
||||||
|
NC = (int)0xFFFFFFFF
|
||||||
|
} PinName;
|
||||||
|
|
||||||
|
typedef enum {
|
||||||
|
PullNone = 0,
|
||||||
|
PullUp = 1,
|
||||||
|
PullDown = 2,
|
||||||
|
OpenDrain = 3,
|
||||||
|
PullDefault = PullNone
|
||||||
|
} PinMode;
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,48 @@
|
||||||
|
/* mbed Microcontroller Library
|
||||||
|
*******************************************************************************
|
||||||
|
* Copyright (c) 2014, STMicroelectronics
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*******************************************************************************
|
||||||
|
*/
|
||||||
|
#ifndef MBED_PORTNAMES_H
|
||||||
|
#define MBED_PORTNAMES_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
typedef enum {
|
||||||
|
PortA = 0,
|
||||||
|
PortB = 1,
|
||||||
|
PortC = 2,
|
||||||
|
PortD = 3,
|
||||||
|
PortH = 7
|
||||||
|
} PortName;
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,184 @@
|
||||||
|
/* mbed Microcontroller Library
|
||||||
|
* Copyright (c) 2014, STMicroelectronics
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*/
|
||||||
|
#include "mbed_assert.h"
|
||||||
|
#include "analogin_api.h"
|
||||||
|
|
||||||
|
#if DEVICE_ANALOGIN
|
||||||
|
|
||||||
|
#include "wait_api.h"
|
||||||
|
#include "cmsis.h"
|
||||||
|
#include "pinmap.h"
|
||||||
|
|
||||||
|
static const PinMap PinMap_ADC[] = {
|
||||||
|
{PA_0, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN0
|
||||||
|
{PA_1, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN1
|
||||||
|
{PA_2, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN2
|
||||||
|
{PA_3, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN3
|
||||||
|
{PA_4, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN4
|
||||||
|
{PA_5, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN5
|
||||||
|
{PA_6, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN6
|
||||||
|
{PA_7, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN7
|
||||||
|
{PB_0, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN8
|
||||||
|
{PB_1, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN9
|
||||||
|
{PC_0, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN10
|
||||||
|
{PC_1, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN11
|
||||||
|
{PC_2, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN12
|
||||||
|
{PC_3, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN13
|
||||||
|
{PC_4, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN14
|
||||||
|
{PC_5, ADC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0)}, // ADC1_IN15
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
ADC_HandleTypeDef AdcHandle;
|
||||||
|
|
||||||
|
int adc_inited = 0;
|
||||||
|
|
||||||
|
void analogin_init(analogin_t *obj, PinName pin) {
|
||||||
|
// Get the peripheral name from the pin and assign it to the object
|
||||||
|
obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
|
||||||
|
MBED_ASSERT(obj->adc != (ADCName)NC);
|
||||||
|
|
||||||
|
// Configure GPIO
|
||||||
|
pinmap_pinout(pin, PinMap_ADC);
|
||||||
|
|
||||||
|
// Save pin number for the read function
|
||||||
|
obj->pin = pin;
|
||||||
|
|
||||||
|
// The ADC initialization is done once
|
||||||
|
if (adc_inited == 0) {
|
||||||
|
adc_inited = 1;
|
||||||
|
|
||||||
|
// Enable ADC clock
|
||||||
|
__ADC1_CLK_ENABLE();
|
||||||
|
|
||||||
|
// Configure ADC
|
||||||
|
AdcHandle.Instance = (ADC_TypeDef *)(obj->adc);
|
||||||
|
AdcHandle.Init.ClockPrescaler = ADC_CLOCKPRESCALER_PCLK_DIV2;
|
||||||
|
AdcHandle.Init.Resolution = ADC_RESOLUTION12b;
|
||||||
|
AdcHandle.Init.ScanConvMode = DISABLE;
|
||||||
|
AdcHandle.Init.ContinuousConvMode = DISABLE;
|
||||||
|
AdcHandle.Init.DiscontinuousConvMode = DISABLE;
|
||||||
|
AdcHandle.Init.NbrOfDiscConversion = 0;
|
||||||
|
AdcHandle.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
|
||||||
|
AdcHandle.Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_T1_CC1;
|
||||||
|
AdcHandle.Init.DataAlign = ADC_DATAALIGN_RIGHT;
|
||||||
|
AdcHandle.Init.NbrOfConversion = 1;
|
||||||
|
AdcHandle.Init.DMAContinuousRequests = DISABLE;
|
||||||
|
AdcHandle.Init.EOCSelection = DISABLE;
|
||||||
|
HAL_ADC_Init(&AdcHandle);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline uint16_t adc_read(analogin_t *obj) {
|
||||||
|
ADC_ChannelConfTypeDef sConfig;
|
||||||
|
|
||||||
|
AdcHandle.Instance = (ADC_TypeDef *)(obj->adc);
|
||||||
|
|
||||||
|
// Configure ADC channel
|
||||||
|
sConfig.Rank = 1;
|
||||||
|
sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES;
|
||||||
|
sConfig.Offset = 0;
|
||||||
|
|
||||||
|
switch (obj->pin) {
|
||||||
|
case PA_0:
|
||||||
|
sConfig.Channel = ADC_CHANNEL_0;
|
||||||
|
break;
|
||||||
|
case PA_1:
|
||||||
|
sConfig.Channel = ADC_CHANNEL_1;
|
||||||
|
break;
|
||||||
|
case PA_2:
|
||||||
|
sConfig.Channel = ADC_CHANNEL_2;
|
||||||
|
break;
|
||||||
|
case PA_3:
|
||||||
|
sConfig.Channel = ADC_CHANNEL_3;
|
||||||
|
break;
|
||||||
|
case PA_4:
|
||||||
|
sConfig.Channel = ADC_CHANNEL_4;
|
||||||
|
break;
|
||||||
|
case PA_5:
|
||||||
|
sConfig.Channel = ADC_CHANNEL_5;
|
||||||
|
break;
|
||||||
|
case PA_6:
|
||||||
|
sConfig.Channel = ADC_CHANNEL_6;
|
||||||
|
break;
|
||||||
|
case PA_7:
|
||||||
|
sConfig.Channel = ADC_CHANNEL_7;
|
||||||
|
break;
|
||||||
|
case PB_0:
|
||||||
|
sConfig.Channel = ADC_CHANNEL_8;
|
||||||
|
break;
|
||||||
|
case PB_1:
|
||||||
|
sConfig.Channel = ADC_CHANNEL_9;
|
||||||
|
break;
|
||||||
|
case PC_0:
|
||||||
|
sConfig.Channel = ADC_CHANNEL_10;
|
||||||
|
break;
|
||||||
|
case PC_1:
|
||||||
|
sConfig.Channel = ADC_CHANNEL_11;
|
||||||
|
break;
|
||||||
|
case PC_2:
|
||||||
|
sConfig.Channel = ADC_CHANNEL_12;
|
||||||
|
break;
|
||||||
|
case PC_3:
|
||||||
|
sConfig.Channel = ADC_CHANNEL_13;
|
||||||
|
break;
|
||||||
|
case PC_4:
|
||||||
|
sConfig.Channel = ADC_CHANNEL_14;
|
||||||
|
break;
|
||||||
|
case PC_5:
|
||||||
|
sConfig.Channel = ADC_CHANNEL_15;
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
HAL_ADC_ConfigChannel(&AdcHandle, &sConfig);
|
||||||
|
|
||||||
|
HAL_ADC_Start(&AdcHandle); // Start conversion
|
||||||
|
|
||||||
|
// Wait end of conversion and get value
|
||||||
|
if (HAL_ADC_PollForConversion(&AdcHandle, 10) == HAL_OK) {
|
||||||
|
return (HAL_ADC_GetValue(&AdcHandle));
|
||||||
|
} else {
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
uint16_t analogin_read_u16(analogin_t *obj) {
|
||||||
|
uint16_t value = adc_read(obj);
|
||||||
|
// 12-bit to 16-bit conversion
|
||||||
|
value = ((value << 4) & (uint16_t)0xFFF0) | ((value >> 8) & (uint16_t)0x000F);
|
||||||
|
return value;
|
||||||
|
}
|
||||||
|
|
||||||
|
float analogin_read(analogin_t *obj) {
|
||||||
|
uint16_t value = adc_read(obj);
|
||||||
|
return (float)value * (1.0f / (float)0xFFF); // 12 bits range
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,161 @@
|
||||||
|
/* mbed Microcontroller Library
|
||||||
|
* Copyright (c) 2014, STMicroelectronics
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*/
|
||||||
|
#include "analogout_api.h"
|
||||||
|
|
||||||
|
#if DEVICE_ANALOGOUT
|
||||||
|
|
||||||
|
#include "cmsis.h"
|
||||||
|
#include "pinmap.h"
|
||||||
|
#include "mbed_error.h"
|
||||||
|
#include "stm32f4xx_hal.h"
|
||||||
|
|
||||||
|
#define RANGE_12BIT (0xFFF)
|
||||||
|
|
||||||
|
DAC_HandleTypeDef DacHandle;
|
||||||
|
static DAC_ChannelConfTypeDef sConfig;
|
||||||
|
|
||||||
|
static const PinMap PinMap_DAC[] = {
|
||||||
|
{PA_4, DAC_0, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0xFF)}, // DAC_OUT1
|
||||||
|
{PA_5, DAC_1, STM_PIN_DATA(STM_MODE_ANALOG, GPIO_NOPULL, 0xFF)}, // DAC_OUT2
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
void analogout_init(dac_t *obj, PinName pin)
|
||||||
|
{
|
||||||
|
uint32_t channel ;
|
||||||
|
HAL_StatusTypeDef status;
|
||||||
|
|
||||||
|
// Get the peripheral name (DAC_1, ...) from the pin and assign it to the object
|
||||||
|
obj->dac = (DACName)pinmap_peripheral(pin, PinMap_DAC);
|
||||||
|
|
||||||
|
if (obj->dac == (DACName)NC) {
|
||||||
|
error("DAC pin mapping failed");
|
||||||
|
}
|
||||||
|
|
||||||
|
// Configure GPIO
|
||||||
|
pinmap_pinout(pin, PinMap_DAC);
|
||||||
|
|
||||||
|
// Save the channel for the write and read functions
|
||||||
|
obj->channel = pin;
|
||||||
|
|
||||||
|
__GPIOA_CLK_ENABLE();
|
||||||
|
|
||||||
|
__DAC_CLK_ENABLE();
|
||||||
|
|
||||||
|
DacHandle.Instance = DAC;
|
||||||
|
|
||||||
|
status = HAL_DAC_Init(&DacHandle);
|
||||||
|
if ( status != HAL_OK ) {
|
||||||
|
error("HAL_DAC_Init failed");
|
||||||
|
}
|
||||||
|
|
||||||
|
sConfig.DAC_Trigger = DAC_TRIGGER_NONE;
|
||||||
|
sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
|
||||||
|
|
||||||
|
if (obj->channel == PA_4) {
|
||||||
|
channel = DAC_CHANNEL_1;
|
||||||
|
} else {
|
||||||
|
channel = DAC_CHANNEL_2;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (HAL_DAC_ConfigChannel(&DacHandle, &sConfig, channel) != HAL_OK) {
|
||||||
|
error("HAL_DAC_ConfigChannel failed");
|
||||||
|
}
|
||||||
|
|
||||||
|
if (HAL_DAC_Start(&DacHandle, channel) != HAL_OK) {
|
||||||
|
error("HAL_DAC_Start failed");
|
||||||
|
}
|
||||||
|
|
||||||
|
if (HAL_DAC_SetValue(&DacHandle, channel, DAC_ALIGN_12B_R, 0x000) != HAL_OK) {
|
||||||
|
error("HAL_DAC_SetValue failed");
|
||||||
|
}
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
void analogout_free(dac_t *obj)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline void dac_write(dac_t *obj, uint16_t value)
|
||||||
|
{
|
||||||
|
HAL_StatusTypeDef status = HAL_ERROR;
|
||||||
|
|
||||||
|
if (obj->channel == PA_4) {
|
||||||
|
status = HAL_DAC_SetValue(&DacHandle, DAC_CHANNEL_1, DAC_ALIGN_12B_R, value);
|
||||||
|
} else if (obj->channel == PA_5) {
|
||||||
|
status = HAL_DAC_SetValue(&DacHandle, DAC_CHANNEL_2, DAC_ALIGN_12B_R, value);
|
||||||
|
}
|
||||||
|
|
||||||
|
if ( status != HAL_OK ) {
|
||||||
|
error("ADC pin mapping failed");
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline int dac_read(dac_t *obj)
|
||||||
|
{
|
||||||
|
if (obj->channel == PA_4) {
|
||||||
|
return (int)HAL_DAC_GetValue(&DacHandle, DAC_CHANNEL_1);
|
||||||
|
} else if (obj->channel == PA_5) {
|
||||||
|
return (int)HAL_DAC_GetValue(&DacHandle, DAC_CHANNEL_2);
|
||||||
|
}
|
||||||
|
return 0; /* Just silented warning */
|
||||||
|
}
|
||||||
|
|
||||||
|
void analogout_write(dac_t *obj, float value)
|
||||||
|
{
|
||||||
|
if (value < 0.0f) {
|
||||||
|
dac_write(obj, 0); // Min value
|
||||||
|
} else if (value > 1.0f) {
|
||||||
|
dac_write(obj, (uint16_t)RANGE_12BIT); // Max value
|
||||||
|
} else {
|
||||||
|
dac_write(obj, (uint16_t)(value * (float)RANGE_12BIT));
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void analogout_write_u16(dac_t *obj, uint16_t value)
|
||||||
|
{
|
||||||
|
if (value > (uint16_t)RANGE_12BIT) {
|
||||||
|
value = (uint16_t)RANGE_12BIT; // Max value
|
||||||
|
}
|
||||||
|
|
||||||
|
dac_write(obj, value);
|
||||||
|
}
|
||||||
|
|
||||||
|
float analogout_read(dac_t *obj)
|
||||||
|
{
|
||||||
|
|
||||||
|
uint32_t value = dac_read(obj);
|
||||||
|
return (float)value * (1.0f / (float)RANGE_12BIT);
|
||||||
|
}
|
||||||
|
|
||||||
|
uint16_t analogout_read_u16(dac_t *obj)
|
||||||
|
{
|
||||||
|
return (uint16_t)dac_read(obj);
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif // DEVICE_ANALOGOUT
|
||||||
|
|
@ -0,0 +1,70 @@
|
||||||
|
/* mbed Microcontroller Library
|
||||||
|
*******************************************************************************
|
||||||
|
* Copyright (c) 2014, STMicroelectronics
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*******************************************************************************
|
||||||
|
*/
|
||||||
|
#ifndef MBED_DEVICE_H
|
||||||
|
#define MBED_DEVICE_H
|
||||||
|
|
||||||
|
#define DEVICE_PORTIN 1
|
||||||
|
#define DEVICE_PORTOUT 1
|
||||||
|
#define DEVICE_PORTINOUT 1
|
||||||
|
|
||||||
|
#define DEVICE_INTERRUPTIN 1
|
||||||
|
|
||||||
|
#define DEVICE_ANALOGIN 1
|
||||||
|
#define DEVICE_ANALOGOUT 1
|
||||||
|
|
||||||
|
#define DEVICE_SERIAL 1
|
||||||
|
|
||||||
|
#define DEVICE_I2C 1
|
||||||
|
#define DEVICE_I2CSLAVE 1
|
||||||
|
|
||||||
|
#define DEVICE_SPI 1
|
||||||
|
#define DEVICE_SPISLAVE 1
|
||||||
|
|
||||||
|
#define DEVICE_RTC 1
|
||||||
|
|
||||||
|
#define DEVICE_PWMOUT 1
|
||||||
|
|
||||||
|
#define DEVICE_SLEEP 1
|
||||||
|
|
||||||
|
//=======================================
|
||||||
|
|
||||||
|
#define DEVICE_SEMIHOST 0
|
||||||
|
#define DEVICE_LOCALFILESYSTEM 0
|
||||||
|
#define DEVICE_ID_LENGTH 24
|
||||||
|
|
||||||
|
#define DEVICE_DEBUG_AWARENESS 0
|
||||||
|
|
||||||
|
#define DEVICE_STDIO_MESSAGES 1
|
||||||
|
|
||||||
|
#define DEVICE_ERROR_RED 0
|
||||||
|
|
||||||
|
#include "objects.h"
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,73 @@
|
||||||
|
/* mbed Microcontroller Library
|
||||||
|
*******************************************************************************
|
||||||
|
* Copyright (c) 2014, STMicroelectronics
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*******************************************************************************
|
||||||
|
*/
|
||||||
|
#include "mbed_assert.h"
|
||||||
|
#include "gpio_api.h"
|
||||||
|
#include "pinmap.h"
|
||||||
|
#include "mbed_error.h"
|
||||||
|
|
||||||
|
extern uint32_t Set_GPIO_Clock(uint32_t port_idx);
|
||||||
|
|
||||||
|
uint32_t gpio_set(PinName pin) {
|
||||||
|
MBED_ASSERT(pin != (PinName)NC);
|
||||||
|
|
||||||
|
pin_function(pin, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
|
||||||
|
return (uint32_t)(1 << ((uint32_t)pin & 0xF)); // Return the pin mask
|
||||||
|
}
|
||||||
|
|
||||||
|
void gpio_init(gpio_t *obj, PinName pin) {
|
||||||
|
obj->pin = pin;
|
||||||
|
if (pin == (PinName)NC)
|
||||||
|
return;
|
||||||
|
|
||||||
|
uint32_t port_index = STM_PORT(pin);
|
||||||
|
|
||||||
|
// Enable GPIO clock
|
||||||
|
uint32_t gpio_add = Set_GPIO_Clock(port_index);
|
||||||
|
GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add;
|
||||||
|
|
||||||
|
// Fill GPIO object structure for future use
|
||||||
|
obj->mask = gpio_set(pin);
|
||||||
|
obj->reg_in = &gpio->IDR;
|
||||||
|
obj->reg_set = &gpio->BSRRL;
|
||||||
|
obj->reg_clr = &gpio->BSRRH;
|
||||||
|
}
|
||||||
|
|
||||||
|
void gpio_mode(gpio_t *obj, PinMode mode) {
|
||||||
|
pin_mode(obj->pin, mode);
|
||||||
|
}
|
||||||
|
|
||||||
|
void gpio_dir(gpio_t *obj, PinDirection direction) {
|
||||||
|
MBED_ASSERT(obj->pin != (PinName)NC);
|
||||||
|
if (direction == PIN_OUTPUT) {
|
||||||
|
pin_function(obj->pin, STM_PIN_DATA(STM_MODE_OUTPUT_PP, GPIO_NOPULL, 0));
|
||||||
|
} else { // PIN_INPUT
|
||||||
|
pin_function(obj->pin, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
@ -0,0 +1,260 @@
|
||||||
|
/* mbed Microcontroller Library
|
||||||
|
*******************************************************************************
|
||||||
|
* Copyright (c) 2014, STMicroelectronics
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*******************************************************************************
|
||||||
|
*/
|
||||||
|
#include <stddef.h>
|
||||||
|
#include "cmsis.h"
|
||||||
|
#include "gpio_irq_api.h"
|
||||||
|
#include "pinmap.h"
|
||||||
|
#include "mbed_error.h"
|
||||||
|
|
||||||
|
#define EDGE_NONE (0)
|
||||||
|
#define EDGE_RISE (1)
|
||||||
|
#define EDGE_FALL (2)
|
||||||
|
#define EDGE_BOTH (3)
|
||||||
|
|
||||||
|
#define CHANNEL_NUM (16)
|
||||||
|
|
||||||
|
static uint32_t channel_ids[CHANNEL_NUM] = {0};
|
||||||
|
static uint32_t channel_gpio[CHANNEL_NUM] = {0};
|
||||||
|
|
||||||
|
static gpio_irq_handler irq_handler[CHANNEL_NUM] = {NULL};
|
||||||
|
|
||||||
|
static void handle_interrupt_in(uint32_t pin_index) {
|
||||||
|
uint32_t pin = (uint32_t)(1 << pin_index);
|
||||||
|
|
||||||
|
// Clear interrupt flag
|
||||||
|
if (__HAL_GPIO_EXTI_GET_FLAG(pin) != RESET) {
|
||||||
|
GPIO_TypeDef *gpio = (GPIO_TypeDef *)(channel_gpio[pin_index]);
|
||||||
|
|
||||||
|
__HAL_GPIO_EXTI_CLEAR_FLAG(pin);
|
||||||
|
|
||||||
|
if (channel_ids[pin_index] == 0) return;
|
||||||
|
|
||||||
|
// Check which edge has generated the irq
|
||||||
|
if ((gpio->IDR & pin) == 0) {
|
||||||
|
irq_handler[pin_index](channel_ids[pin_index], IRQ_FALL);
|
||||||
|
} else {
|
||||||
|
irq_handler[pin_index](channel_ids[pin_index], IRQ_RISE);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
// The irq_index is passed to the function
|
||||||
|
// EXTI line 0
|
||||||
|
static void gpio_irq0(void) {
|
||||||
|
handle_interrupt_in(0);
|
||||||
|
}
|
||||||
|
// EXTI line 1
|
||||||
|
static void gpio_irq1(void) {
|
||||||
|
handle_interrupt_in(1);
|
||||||
|
}
|
||||||
|
// EXTI line 2
|
||||||
|
static void gpio_irq2(void) {
|
||||||
|
handle_interrupt_in(2);
|
||||||
|
}
|
||||||
|
// EXTI line 3
|
||||||
|
static void gpio_irq3(void) {
|
||||||
|
handle_interrupt_in(3);
|
||||||
|
}
|
||||||
|
// EXTI line 4
|
||||||
|
static void gpio_irq4(void) {
|
||||||
|
handle_interrupt_in(4);
|
||||||
|
}
|
||||||
|
// EXTI lines 5 to 9
|
||||||
|
static void gpio_irq5(void) {
|
||||||
|
uint8_t i;
|
||||||
|
|
||||||
|
for (i = 5; i <= 9; i++)
|
||||||
|
{
|
||||||
|
handle_interrupt_in(i);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
// EXTI lines 10 to 15
|
||||||
|
static void gpio_irq6(void) {
|
||||||
|
uint8_t i;
|
||||||
|
|
||||||
|
for (i = 10; i <= 15; i++)
|
||||||
|
{
|
||||||
|
handle_interrupt_in(i);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
extern uint32_t Set_GPIO_Clock(uint32_t port_idx);
|
||||||
|
|
||||||
|
int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) {
|
||||||
|
IRQn_Type irq_n = (IRQn_Type)0;
|
||||||
|
uint32_t vector = 0;
|
||||||
|
|
||||||
|
if (pin == NC) return -1;
|
||||||
|
|
||||||
|
uint32_t port_index = STM_PORT(pin);
|
||||||
|
uint32_t pin_index = STM_PIN(pin);
|
||||||
|
|
||||||
|
// Select irq number and interrupt routine
|
||||||
|
switch (pin_index) {
|
||||||
|
case 0:
|
||||||
|
irq_n = EXTI0_IRQn;
|
||||||
|
vector = (uint32_t)&gpio_irq0;
|
||||||
|
break;
|
||||||
|
case 1:
|
||||||
|
irq_n = EXTI1_IRQn;
|
||||||
|
vector = (uint32_t)&gpio_irq1;
|
||||||
|
break;
|
||||||
|
case 2:
|
||||||
|
irq_n = EXTI2_IRQn;
|
||||||
|
vector = (uint32_t)&gpio_irq2;
|
||||||
|
break;
|
||||||
|
case 3:
|
||||||
|
irq_n = EXTI3_IRQn;
|
||||||
|
vector = (uint32_t)&gpio_irq3;
|
||||||
|
break;
|
||||||
|
case 4:
|
||||||
|
irq_n = EXTI4_IRQn;
|
||||||
|
vector = (uint32_t)&gpio_irq4;
|
||||||
|
break;
|
||||||
|
case 5:
|
||||||
|
case 6:
|
||||||
|
case 7:
|
||||||
|
case 8:
|
||||||
|
case 9:
|
||||||
|
irq_n = EXTI9_5_IRQn;
|
||||||
|
vector = (uint32_t)&gpio_irq5;
|
||||||
|
break;
|
||||||
|
case 10:
|
||||||
|
case 11:
|
||||||
|
case 12:
|
||||||
|
case 13:
|
||||||
|
case 14:
|
||||||
|
case 15:
|
||||||
|
irq_n = EXTI15_10_IRQn;
|
||||||
|
vector = (uint32_t)&gpio_irq6;
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
error("InterruptIn error: pin not supported.\n");
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
|
||||||
|
// Enable GPIO clock
|
||||||
|
uint32_t gpio_add = Set_GPIO_Clock(port_index);
|
||||||
|
|
||||||
|
// Configure GPIO
|
||||||
|
pin_function(pin, STM_PIN_DATA(STM_MODE_IT_FALLING, GPIO_NOPULL, 0));
|
||||||
|
|
||||||
|
// Save informations for future use
|
||||||
|
obj->irq_n = irq_n;
|
||||||
|
obj->event = EDGE_NONE;
|
||||||
|
obj->pin = pin;
|
||||||
|
channel_ids[pin_index] = id;
|
||||||
|
channel_gpio[pin_index] = gpio_add;
|
||||||
|
|
||||||
|
irq_handler[pin_index] = handler;
|
||||||
|
|
||||||
|
// Enable EXTI interrupt
|
||||||
|
NVIC_SetVector(irq_n, vector);
|
||||||
|
NVIC_EnableIRQ(irq_n);
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
void gpio_irq_free(gpio_irq_t *obj) {
|
||||||
|
uint32_t pin_index = STM_PIN(obj->pin);
|
||||||
|
|
||||||
|
channel_ids[pin_index] = 0;
|
||||||
|
channel_gpio[pin_index] = 0;
|
||||||
|
// Disable EXTI line
|
||||||
|
pin_function(obj->pin, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
|
||||||
|
obj->event = EDGE_NONE;
|
||||||
|
}
|
||||||
|
|
||||||
|
void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) {
|
||||||
|
uint32_t mode = STM_MODE_INPUT;
|
||||||
|
uint32_t pull = GPIO_NOPULL;
|
||||||
|
|
||||||
|
if (enable) {
|
||||||
|
|
||||||
|
pull = GPIO_NOPULL;
|
||||||
|
|
||||||
|
if (event == IRQ_RISE) {
|
||||||
|
if ((obj->event == EDGE_FALL) || (obj->event == EDGE_BOTH)) {
|
||||||
|
mode = STM_MODE_IT_RISING_FALLING;
|
||||||
|
obj->event = EDGE_BOTH;
|
||||||
|
} else { // NONE or RISE
|
||||||
|
mode = STM_MODE_IT_RISING;
|
||||||
|
obj->event = EDGE_RISE;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
if (event == IRQ_FALL) {
|
||||||
|
if ((obj->event == EDGE_RISE) || (obj->event == EDGE_BOTH)) {
|
||||||
|
mode = STM_MODE_IT_RISING_FALLING;
|
||||||
|
obj->event = EDGE_BOTH;
|
||||||
|
} else { // NONE or FALL
|
||||||
|
mode = STM_MODE_IT_FALLING;
|
||||||
|
obj->event = EDGE_FALL;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
} else {
|
||||||
|
mode = STM_MODE_INPUT;
|
||||||
|
pull = GPIO_NOPULL;
|
||||||
|
if (event == IRQ_RISE) {
|
||||||
|
if ((obj->event == EDGE_FALL) || (obj->event == EDGE_BOTH)) {
|
||||||
|
mode = STM_MODE_IT_FALLING;
|
||||||
|
obj->event = EDGE_FALL;
|
||||||
|
} else if (obj->event == EDGE_RISE) {
|
||||||
|
mode = STM_MODE_IT_EVT_RESET;
|
||||||
|
obj->event = EDGE_NONE;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
else if (event == IRQ_FALL) {
|
||||||
|
if ((obj->event == EDGE_RISE) || (obj->event == EDGE_BOTH)) {
|
||||||
|
mode = STM_MODE_IT_RISING;
|
||||||
|
obj->event = EDGE_RISE;
|
||||||
|
} else if (obj->event == IRQ_FALL) {
|
||||||
|
mode = STM_MODE_IT_EVT_RESET;
|
||||||
|
obj->event = EDGE_NONE;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
else {
|
||||||
|
mode = STM_MODE_IT_EVT_RESET;
|
||||||
|
obj->event = EDGE_NONE;
|
||||||
|
}
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
pin_function(obj->pin, STM_PIN_DATA(mode, pull, 0));
|
||||||
|
}
|
||||||
|
|
||||||
|
void gpio_irq_enable(gpio_irq_t *obj) {
|
||||||
|
NVIC_EnableIRQ(obj->irq_n);
|
||||||
|
}
|
||||||
|
|
||||||
|
void gpio_irq_disable(gpio_irq_t *obj) {
|
||||||
|
NVIC_DisableIRQ(obj->irq_n);
|
||||||
|
obj->event = EDGE_NONE;
|
||||||
|
}
|
||||||
|
|
@ -0,0 +1,69 @@
|
||||||
|
/* mbed Microcontroller Library
|
||||||
|
*******************************************************************************
|
||||||
|
* Copyright (c) 2014, STMicroelectronics
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*******************************************************************************
|
||||||
|
*/
|
||||||
|
#ifndef MBED_GPIO_OBJECT_H
|
||||||
|
#define MBED_GPIO_OBJECT_H
|
||||||
|
|
||||||
|
#include "mbed_assert.h"
|
||||||
|
#include "cmsis.h"
|
||||||
|
#include "PortNames.h"
|
||||||
|
#include "PeripheralNames.h"
|
||||||
|
#include "PinNames.h"
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
typedef struct {
|
||||||
|
PinName pin;
|
||||||
|
uint32_t mask;
|
||||||
|
__IO uint32_t *reg_in;
|
||||||
|
__IO uint16_t *reg_set;
|
||||||
|
__IO uint16_t *reg_clr;
|
||||||
|
} gpio_t;
|
||||||
|
|
||||||
|
static inline void gpio_write(gpio_t *obj, int value) {
|
||||||
|
MBED_ASSERT(obj->pin != (PinName)NC);
|
||||||
|
if (value) {
|
||||||
|
*obj->reg_set = obj->mask;
|
||||||
|
} else {
|
||||||
|
*obj->reg_clr = obj->mask;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline int gpio_read(gpio_t *obj) {
|
||||||
|
MBED_ASSERT(obj->pin != (PinName)NC);
|
||||||
|
return ((*obj->reg_in & obj->mask) ? 1 : 0);
|
||||||
|
}
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,496 @@
|
||||||
|
/* mbed Microcontroller Library
|
||||||
|
*******************************************************************************
|
||||||
|
* Copyright (c) 2014, STMicroelectronics
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*******************************************************************************
|
||||||
|
*/
|
||||||
|
#include "mbed_assert.h"
|
||||||
|
#include "i2c_api.h"
|
||||||
|
|
||||||
|
#if DEVICE_I2C
|
||||||
|
|
||||||
|
#include "cmsis.h"
|
||||||
|
#include "pinmap.h"
|
||||||
|
|
||||||
|
/* Timeout values for flags and events waiting loops. These timeouts are
|
||||||
|
not based on accurate values, they just guarantee that the application will
|
||||||
|
not remain stuck if the I2C communication is corrupted. */
|
||||||
|
#define FLAG_TIMEOUT ((int)0x1000)
|
||||||
|
#define LONG_TIMEOUT ((int)0x8000)
|
||||||
|
|
||||||
|
static const PinMap PinMap_I2C_SDA[] = {
|
||||||
|
{PB_7, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
|
||||||
|
{PB_9, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
|
||||||
|
{PB_11, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
|
||||||
|
{PC_9, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
static const PinMap PinMap_I2C_SCL[] = {
|
||||||
|
{PA_8, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
|
||||||
|
{PB_6, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
|
||||||
|
{PB_8, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
|
||||||
|
{PB_10, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
I2C_HandleTypeDef I2cHandle;
|
||||||
|
|
||||||
|
int i2c1_inited = 0;
|
||||||
|
int i2c2_inited = 0;
|
||||||
|
int i2c3_inited = 0;
|
||||||
|
|
||||||
|
void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
|
||||||
|
// Determine the I2C to use
|
||||||
|
I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
|
||||||
|
I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
|
||||||
|
|
||||||
|
obj->i2c = (I2CName)pinmap_merge(i2c_sda, i2c_scl);
|
||||||
|
MBED_ASSERT(obj->i2c != (I2CName)NC);
|
||||||
|
|
||||||
|
// Enable I2C1 clock and pinout if not done
|
||||||
|
if ((obj->i2c == I2C_1)&& !i2c1_inited) {
|
||||||
|
i2c1_inited = 1;
|
||||||
|
__I2C1_CLK_ENABLE();
|
||||||
|
// Configure I2C pins
|
||||||
|
pinmap_pinout(sda, PinMap_I2C_SDA);
|
||||||
|
pinmap_pinout(scl, PinMap_I2C_SCL);
|
||||||
|
pin_mode(sda, OpenDrain);
|
||||||
|
pin_mode(scl, OpenDrain);
|
||||||
|
}
|
||||||
|
// Enable I2C2 clock and pinout if not done
|
||||||
|
if ((obj->i2c == I2C_2)&& !i2c2_inited) {
|
||||||
|
i2c2_inited = 1;
|
||||||
|
__I2C2_CLK_ENABLE();
|
||||||
|
// Configure I2C pins
|
||||||
|
pinmap_pinout(sda, PinMap_I2C_SDA);
|
||||||
|
pinmap_pinout(scl, PinMap_I2C_SCL);
|
||||||
|
pin_mode(sda, OpenDrain);
|
||||||
|
pin_mode(scl, OpenDrain);
|
||||||
|
}
|
||||||
|
// Enable I2C3 clock and pinout if not done
|
||||||
|
if ((obj->i2c == I2C_3)&& !i2c3_inited) {
|
||||||
|
i2c3_inited = 1;
|
||||||
|
__I2C3_CLK_ENABLE();
|
||||||
|
// Configure I2C pins
|
||||||
|
pinmap_pinout(sda, PinMap_I2C_SDA);
|
||||||
|
pinmap_pinout(scl, PinMap_I2C_SCL);
|
||||||
|
pin_mode(sda, OpenDrain);
|
||||||
|
pin_mode(scl, OpenDrain);
|
||||||
|
}
|
||||||
|
|
||||||
|
// Reset to clear pending flags if any
|
||||||
|
i2c_reset(obj);
|
||||||
|
|
||||||
|
// I2C configuration
|
||||||
|
i2c_frequency(obj, 100000); // 100 kHz per default
|
||||||
|
|
||||||
|
// I2C master by default
|
||||||
|
obj->slave = 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
void i2c_frequency(i2c_t *obj, int hz) {
|
||||||
|
MBED_ASSERT((hz != 0) && (hz <= 400000));
|
||||||
|
I2cHandle.Instance = (I2C_TypeDef *)(obj->i2c);
|
||||||
|
int timeout;
|
||||||
|
|
||||||
|
// wait before init
|
||||||
|
timeout = LONG_TIMEOUT;
|
||||||
|
while((__HAL_I2C_GET_FLAG(&I2cHandle, I2C_FLAG_BUSY)) && (timeout-- != 0));
|
||||||
|
|
||||||
|
// I2C configuration
|
||||||
|
I2cHandle.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
|
||||||
|
I2cHandle.Init.ClockSpeed = hz;
|
||||||
|
I2cHandle.Init.DualAddressMode = I2C_DUALADDRESS_DISABLED;
|
||||||
|
I2cHandle.Init.DutyCycle = I2C_DUTYCYCLE_2;
|
||||||
|
I2cHandle.Init.GeneralCallMode = I2C_GENERALCALL_DISABLED;
|
||||||
|
I2cHandle.Init.NoStretchMode = I2C_NOSTRETCH_DISABLED;
|
||||||
|
I2cHandle.Init.OwnAddress1 = 0;
|
||||||
|
I2cHandle.Init.OwnAddress2 = 0;
|
||||||
|
HAL_I2C_Init(&I2cHandle);
|
||||||
|
if (obj->slave) {
|
||||||
|
/* Enable Address Acknowledge */
|
||||||
|
I2cHandle.Instance->CR1 |= I2C_CR1_ACK;
|
||||||
|
}
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
inline int i2c_start(i2c_t *obj) {
|
||||||
|
I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
|
||||||
|
int timeout;
|
||||||
|
|
||||||
|
I2cHandle.Instance = (I2C_TypeDef *)(obj->i2c);
|
||||||
|
|
||||||
|
// Clear Acknowledge failure flag
|
||||||
|
__HAL_I2C_CLEAR_FLAG(&I2cHandle, I2C_FLAG_AF);
|
||||||
|
|
||||||
|
// Generate the START condition
|
||||||
|
i2c->CR1 |= I2C_CR1_START;
|
||||||
|
|
||||||
|
// Wait the START condition has been correctly sent
|
||||||
|
timeout = FLAG_TIMEOUT;
|
||||||
|
while (__HAL_I2C_GET_FLAG(&I2cHandle, I2C_FLAG_SB) == RESET) {
|
||||||
|
if ((timeout--) == 0) {
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
inline int i2c_stop(i2c_t *obj) {
|
||||||
|
I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
|
||||||
|
|
||||||
|
// Generate the STOP condition
|
||||||
|
i2c->CR1 |= I2C_CR1_STOP;
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
|
||||||
|
I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
|
||||||
|
I2cHandle.Instance = (I2C_TypeDef *)(obj->i2c);
|
||||||
|
int timeout;
|
||||||
|
int count;
|
||||||
|
int value;
|
||||||
|
|
||||||
|
i2c_start(obj);
|
||||||
|
|
||||||
|
// Wait until SB flag is set
|
||||||
|
timeout = FLAG_TIMEOUT;
|
||||||
|
while (__HAL_I2C_GET_FLAG(&I2cHandle, I2C_FLAG_SB) == RESET) {
|
||||||
|
timeout--;
|
||||||
|
if (timeout == 0) {
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
i2c->DR = __HAL_I2C_7BIT_ADD_READ(address);
|
||||||
|
|
||||||
|
|
||||||
|
// Wait address is acknowledged
|
||||||
|
timeout = FLAG_TIMEOUT;
|
||||||
|
while (__HAL_I2C_GET_FLAG(&I2cHandle, I2C_FLAG_ADDR) == RESET) {
|
||||||
|
timeout--;
|
||||||
|
if (timeout == 0) {
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
__HAL_I2C_CLEAR_ADDRFLAG(&I2cHandle);
|
||||||
|
|
||||||
|
// Read all bytes except last one
|
||||||
|
for (count = 0; count < (length - 1); count++) {
|
||||||
|
value = i2c_byte_read(obj, 0);
|
||||||
|
data[count] = (char)value;
|
||||||
|
}
|
||||||
|
|
||||||
|
// If not repeated start, send stop.
|
||||||
|
// Warning: must be done BEFORE the data is read.
|
||||||
|
if (stop) {
|
||||||
|
i2c_stop(obj);
|
||||||
|
}
|
||||||
|
|
||||||
|
// Read the last byte
|
||||||
|
value = i2c_byte_read(obj, 1);
|
||||||
|
data[count] = (char)value;
|
||||||
|
|
||||||
|
return length;
|
||||||
|
}
|
||||||
|
|
||||||
|
int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
|
||||||
|
I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
|
||||||
|
I2cHandle.Instance = (I2C_TypeDef *)(obj->i2c);
|
||||||
|
int timeout;
|
||||||
|
int count;
|
||||||
|
|
||||||
|
i2c_start(obj);
|
||||||
|
|
||||||
|
// Wait until SB flag is set
|
||||||
|
timeout = FLAG_TIMEOUT;
|
||||||
|
while (__HAL_I2C_GET_FLAG(&I2cHandle, I2C_FLAG_SB) == RESET) {
|
||||||
|
timeout--;
|
||||||
|
if (timeout == 0) {
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
i2c->DR = __HAL_I2C_7BIT_ADD_WRITE(address);
|
||||||
|
|
||||||
|
|
||||||
|
// Wait address is acknowledged
|
||||||
|
timeout = FLAG_TIMEOUT;
|
||||||
|
while (__HAL_I2C_GET_FLAG(&I2cHandle, I2C_FLAG_ADDR) == RESET) {
|
||||||
|
timeout--;
|
||||||
|
if (timeout == 0) {
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
__HAL_I2C_CLEAR_ADDRFLAG(&I2cHandle);
|
||||||
|
|
||||||
|
for (count = 0; count < length; count++) {
|
||||||
|
if (i2c_byte_write(obj, data[count]) != 1) {
|
||||||
|
i2c_stop(obj);
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
// If not repeated start, send stop.
|
||||||
|
if (stop) {
|
||||||
|
i2c_stop(obj);
|
||||||
|
}
|
||||||
|
|
||||||
|
return count;
|
||||||
|
}
|
||||||
|
|
||||||
|
int i2c_byte_read(i2c_t *obj, int last) {
|
||||||
|
I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
|
||||||
|
int timeout;
|
||||||
|
|
||||||
|
if (last) {
|
||||||
|
// Don't acknowledge the last byte
|
||||||
|
i2c->CR1 &= ~I2C_CR1_ACK;
|
||||||
|
} else {
|
||||||
|
// Acknowledge the byte
|
||||||
|
i2c->CR1 |= I2C_CR1_ACK;
|
||||||
|
}
|
||||||
|
|
||||||
|
// Wait until the byte is received
|
||||||
|
timeout = FLAG_TIMEOUT;
|
||||||
|
while (__HAL_I2C_GET_FLAG(&I2cHandle, I2C_FLAG_RXNE) == RESET) {
|
||||||
|
if ((timeout--) == 0) {
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
return (int)i2c->DR;
|
||||||
|
}
|
||||||
|
|
||||||
|
int i2c_byte_write(i2c_t *obj, int data) {
|
||||||
|
I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
|
||||||
|
int timeout;
|
||||||
|
|
||||||
|
i2c->DR = (uint8_t)data;
|
||||||
|
|
||||||
|
// Wait until the byte is transmitted
|
||||||
|
timeout = FLAG_TIMEOUT;
|
||||||
|
while ((__HAL_I2C_GET_FLAG(&I2cHandle, I2C_FLAG_TXE) == RESET) &&
|
||||||
|
(__HAL_I2C_GET_FLAG(&I2cHandle, I2C_FLAG_BTF) == RESET)) {
|
||||||
|
if ((timeout--) == 0) {
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
void i2c_reset(i2c_t *obj) {
|
||||||
|
int timeout;
|
||||||
|
|
||||||
|
// wait before reset
|
||||||
|
timeout = LONG_TIMEOUT;
|
||||||
|
while((__HAL_I2C_GET_FLAG(&I2cHandle, I2C_FLAG_BUSY)) && (timeout-- != 0));
|
||||||
|
|
||||||
|
if (obj->i2c == I2C_1) {
|
||||||
|
__I2C1_FORCE_RESET();
|
||||||
|
__I2C1_RELEASE_RESET();
|
||||||
|
}
|
||||||
|
if (obj->i2c == I2C_2) {
|
||||||
|
__I2C2_FORCE_RESET();
|
||||||
|
__I2C2_RELEASE_RESET();
|
||||||
|
}
|
||||||
|
if (obj->i2c == I2C_3) {
|
||||||
|
__I2C3_FORCE_RESET();
|
||||||
|
__I2C3_RELEASE_RESET();
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
#if DEVICE_I2CSLAVE
|
||||||
|
|
||||||
|
void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) {
|
||||||
|
I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
|
||||||
|
uint16_t tmpreg = 0;
|
||||||
|
|
||||||
|
// Get the old register value
|
||||||
|
tmpreg = i2c->OAR1;
|
||||||
|
// Reset address bits
|
||||||
|
tmpreg &= 0xFC00;
|
||||||
|
// Set new address
|
||||||
|
tmpreg |= (uint16_t)((uint16_t)address & (uint16_t)0x00FE); // 7-bits
|
||||||
|
// Store the new register value
|
||||||
|
i2c->OAR1 = tmpreg;
|
||||||
|
}
|
||||||
|
|
||||||
|
void i2c_slave_mode(i2c_t *obj, int enable_slave) {
|
||||||
|
I2cHandle.Instance = (I2C_TypeDef *)(obj->i2c);
|
||||||
|
if (enable_slave) {
|
||||||
|
obj->slave = 1;
|
||||||
|
/* Enable Address Acknowledge */
|
||||||
|
I2cHandle.Instance->CR1 |= I2C_CR1_ACK;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
// See I2CSlave.h
|
||||||
|
#define NoData 0 // the slave has not been addressed
|
||||||
|
#define ReadAddressed 1 // the master has requested a read from this slave (slave = transmitter)
|
||||||
|
#define WriteGeneral 2 // the master is writing to all slave
|
||||||
|
#define WriteAddressed 3 // the master is writing to this slave (slave = receiver)
|
||||||
|
|
||||||
|
int i2c_slave_receive(i2c_t *obj) {
|
||||||
|
int retValue = NoData;
|
||||||
|
|
||||||
|
if (__HAL_I2C_GET_FLAG(&I2cHandle, I2C_FLAG_BUSY) == 1) {
|
||||||
|
if (__HAL_I2C_GET_FLAG(&I2cHandle, I2C_FLAG_ADDR) == 1) {
|
||||||
|
if (__HAL_I2C_GET_FLAG(&I2cHandle, I2C_FLAG_TRA) == 1)
|
||||||
|
retValue = ReadAddressed;
|
||||||
|
else
|
||||||
|
retValue = WriteAddressed;
|
||||||
|
|
||||||
|
__HAL_I2C_CLEAR_FLAG(&I2cHandle, I2C_FLAG_ADDR);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
return (retValue);
|
||||||
|
}
|
||||||
|
|
||||||
|
int i2c_slave_read(i2c_t *obj, char *data, int length) {
|
||||||
|
uint32_t Timeout;
|
||||||
|
int size = 0;
|
||||||
|
|
||||||
|
I2cHandle.Instance = (I2C_TypeDef *)(obj->i2c);
|
||||||
|
|
||||||
|
while (length > 0) {
|
||||||
|
/* Wait until RXNE flag is set */
|
||||||
|
// Wait until the byte is received
|
||||||
|
Timeout = FLAG_TIMEOUT;
|
||||||
|
while (__HAL_I2C_GET_FLAG(&I2cHandle, I2C_FLAG_RXNE) == RESET) {
|
||||||
|
Timeout--;
|
||||||
|
if (Timeout == 0) {
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Read data from DR */
|
||||||
|
(*data++) = I2cHandle.Instance->DR;
|
||||||
|
length--;
|
||||||
|
size++;
|
||||||
|
|
||||||
|
if ((__HAL_I2C_GET_FLAG(&I2cHandle, I2C_FLAG_BTF) == SET) && (length != 0)) {
|
||||||
|
/* Read data from DR */
|
||||||
|
(*data++) = I2cHandle.Instance->DR;
|
||||||
|
length--;
|
||||||
|
size++;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Wait until STOP flag is set */
|
||||||
|
Timeout = FLAG_TIMEOUT;
|
||||||
|
while (__HAL_I2C_GET_FLAG(&I2cHandle, I2C_FLAG_STOPF) == RESET) {
|
||||||
|
Timeout--;
|
||||||
|
if (Timeout == 0) {
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Clear STOP flag */
|
||||||
|
__HAL_I2C_CLEAR_STOPFLAG(&I2cHandle);
|
||||||
|
|
||||||
|
/* Wait until BUSY flag is reset */
|
||||||
|
Timeout = FLAG_TIMEOUT;
|
||||||
|
while (__HAL_I2C_GET_FLAG(&I2cHandle, I2C_FLAG_BUSY) == SET) {
|
||||||
|
Timeout--;
|
||||||
|
if (Timeout == 0) {
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
return size;
|
||||||
|
}
|
||||||
|
|
||||||
|
int i2c_slave_write(i2c_t *obj, const char *data, int length) {
|
||||||
|
uint32_t Timeout;
|
||||||
|
int size = 0;
|
||||||
|
|
||||||
|
I2cHandle.Instance = (I2C_TypeDef *)(obj->i2c);
|
||||||
|
|
||||||
|
while (length > 0) {
|
||||||
|
/* Wait until TXE flag is set */
|
||||||
|
Timeout = FLAG_TIMEOUT;
|
||||||
|
while (__HAL_I2C_GET_FLAG(&I2cHandle, I2C_FLAG_TXE) == RESET) {
|
||||||
|
Timeout--;
|
||||||
|
if (Timeout == 0) {
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/* Write data to DR */
|
||||||
|
I2cHandle.Instance->DR = (*data++);
|
||||||
|
length--;
|
||||||
|
size++;
|
||||||
|
|
||||||
|
if ((__HAL_I2C_GET_FLAG(&I2cHandle, I2C_FLAG_BTF) == SET) && (length != 0)) {
|
||||||
|
/* Write data to DR */
|
||||||
|
I2cHandle.Instance->DR = (*data++);
|
||||||
|
length--;
|
||||||
|
size++;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Wait until AF flag is set */
|
||||||
|
Timeout = FLAG_TIMEOUT;
|
||||||
|
while (__HAL_I2C_GET_FLAG(&I2cHandle, I2C_FLAG_AF) == RESET) {
|
||||||
|
Timeout--;
|
||||||
|
if (Timeout == 0) {
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/* Clear AF flag */
|
||||||
|
__HAL_I2C_CLEAR_FLAG(&I2cHandle, I2C_FLAG_AF);
|
||||||
|
|
||||||
|
|
||||||
|
/* Wait until BUSY flag is reset */
|
||||||
|
Timeout = FLAG_TIMEOUT;
|
||||||
|
while (__HAL_I2C_GET_FLAG(&I2cHandle, I2C_FLAG_BUSY) == SET) {
|
||||||
|
Timeout--;
|
||||||
|
if (Timeout == 0) {
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
I2cHandle.State = HAL_I2C_STATE_READY;
|
||||||
|
|
||||||
|
/* Process Unlocked */
|
||||||
|
__HAL_UNLOCK(&I2cHandle);
|
||||||
|
|
||||||
|
return size;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
#endif // DEVICE_I2CSLAVE
|
||||||
|
|
||||||
|
#endif // DEVICE_I2C
|
||||||
|
|
@ -0,0 +1,36 @@
|
||||||
|
/* mbed Microcontroller Library
|
||||||
|
* Copyright (c) 2014, STMicroelectronics
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*/
|
||||||
|
#include "cmsis.h"
|
||||||
|
|
||||||
|
// This function is called after RAM initialization and before main.
|
||||||
|
void mbed_sdk_init() {
|
||||||
|
// Update the SystemCoreClock variable.
|
||||||
|
SystemCoreClockUpdate();
|
||||||
|
// Need to restart HAL driver after the RAM is initialized
|
||||||
|
HAL_Init();
|
||||||
|
}
|
||||||
|
|
@ -0,0 +1,109 @@
|
||||||
|
/* mbed Microcontroller Library
|
||||||
|
*******************************************************************************
|
||||||
|
* Copyright (c) 2014, STMicroelectronics
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*******************************************************************************
|
||||||
|
*/
|
||||||
|
#ifndef MBED_OBJECTS_H
|
||||||
|
#define MBED_OBJECTS_H
|
||||||
|
|
||||||
|
#include "cmsis.h"
|
||||||
|
#include "PortNames.h"
|
||||||
|
#include "PeripheralNames.h"
|
||||||
|
#include "PinNames.h"
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
struct gpio_irq_s {
|
||||||
|
IRQn_Type irq_n;
|
||||||
|
uint32_t event;
|
||||||
|
PinName pin;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct port_s {
|
||||||
|
PortName port;
|
||||||
|
uint32_t mask;
|
||||||
|
PinDirection direction;
|
||||||
|
__IO uint32_t *reg_in;
|
||||||
|
__IO uint32_t *reg_out;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct analogin_s {
|
||||||
|
ADCName adc;
|
||||||
|
PinName pin;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct dac_s {
|
||||||
|
DACName dac;
|
||||||
|
PinName channel;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct serial_s {
|
||||||
|
UARTName uart;
|
||||||
|
int index; // Used by irq
|
||||||
|
uint32_t baudrate;
|
||||||
|
uint32_t databits;
|
||||||
|
uint32_t stopbits;
|
||||||
|
uint32_t parity;
|
||||||
|
PinName pin_tx;
|
||||||
|
PinName pin_rx;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct spi_s {
|
||||||
|
SPIName spi;
|
||||||
|
uint32_t bits;
|
||||||
|
uint32_t cpol;
|
||||||
|
uint32_t cpha;
|
||||||
|
uint32_t mode;
|
||||||
|
uint32_t nss;
|
||||||
|
uint32_t br_presc;
|
||||||
|
PinName pin_miso;
|
||||||
|
PinName pin_mosi;
|
||||||
|
PinName pin_sclk;
|
||||||
|
PinName pin_ssel;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct i2c_s {
|
||||||
|
I2CName i2c;
|
||||||
|
uint32_t slave;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct pwmout_s {
|
||||||
|
PWMName pwm;
|
||||||
|
PinName pin;
|
||||||
|
uint32_t period;
|
||||||
|
uint32_t pulse;
|
||||||
|
};
|
||||||
|
|
||||||
|
#include "gpio_object.h"
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,138 @@
|
||||||
|
/* mbed Microcontroller Library
|
||||||
|
*******************************************************************************
|
||||||
|
* Copyright (c) 2014, STMicroelectronics
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*******************************************************************************
|
||||||
|
*/
|
||||||
|
#include "mbed_assert.h"
|
||||||
|
#include "pinmap.h"
|
||||||
|
#include "PortNames.h"
|
||||||
|
#include "mbed_error.h"
|
||||||
|
|
||||||
|
// GPIO mode look-up table
|
||||||
|
static const uint32_t gpio_mode[13] = {
|
||||||
|
0x00000000, // 0 = GPIO_MODE_INPUT
|
||||||
|
0x00000001, // 1 = GPIO_MODE_OUTPUT_PP
|
||||||
|
0x00000011, // 2 = GPIO_MODE_OUTPUT_OD
|
||||||
|
0x00000002, // 3 = GPIO_MODE_AF_PP
|
||||||
|
0x00000012, // 4 = GPIO_MODE_AF_OD
|
||||||
|
0x00000003, // 5 = GPIO_MODE_ANALOG
|
||||||
|
0x10110000, // 6 = GPIO_MODE_IT_RISING
|
||||||
|
0x10210000, // 7 = GPIO_MODE_IT_FALLING
|
||||||
|
0x10310000, // 8 = GPIO_MODE_IT_RISING_FALLING
|
||||||
|
0x10120000, // 9 = GPIO_MODE_EVT_RISING
|
||||||
|
0x10220000, // 10 = GPIO_MODE_EVT_FALLING
|
||||||
|
0x10320000, // 11 = GPIO_MODE_EVT_RISING_FALLING
|
||||||
|
0x10000000 // 12 = Reset GPIO_MODE_IT_EVT
|
||||||
|
};
|
||||||
|
|
||||||
|
// Enable GPIO clock and return GPIO base address
|
||||||
|
uint32_t Set_GPIO_Clock(uint32_t port_idx) {
|
||||||
|
uint32_t gpio_add = 0;
|
||||||
|
switch (port_idx) {
|
||||||
|
case PortA:
|
||||||
|
gpio_add = GPIOA_BASE;
|
||||||
|
__GPIOA_CLK_ENABLE();
|
||||||
|
break;
|
||||||
|
case PortB:
|
||||||
|
gpio_add = GPIOB_BASE;
|
||||||
|
__GPIOB_CLK_ENABLE();
|
||||||
|
break;
|
||||||
|
case PortC:
|
||||||
|
gpio_add = GPIOC_BASE;
|
||||||
|
__GPIOC_CLK_ENABLE();
|
||||||
|
break;
|
||||||
|
case PortD:
|
||||||
|
gpio_add = GPIOD_BASE;
|
||||||
|
__GPIOD_CLK_ENABLE();
|
||||||
|
break;
|
||||||
|
case PortH:
|
||||||
|
gpio_add = GPIOH_BASE;
|
||||||
|
__GPIOH_CLK_ENABLE();
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
error("Pinmap error: wrong port number.");
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
return gpio_add;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Configure pin (mode, speed, output type and pull-up/pull-down)
|
||||||
|
*/
|
||||||
|
void pin_function(PinName pin, int data) {
|
||||||
|
MBED_ASSERT(pin != (PinName)NC);
|
||||||
|
// Get the pin informations
|
||||||
|
uint32_t mode = STM_PIN_MODE(data);
|
||||||
|
uint32_t pupd = STM_PIN_PUPD(data);
|
||||||
|
uint32_t afnum = STM_PIN_AFNUM(data);
|
||||||
|
|
||||||
|
uint32_t port_index = STM_PORT(pin);
|
||||||
|
uint32_t pin_index = STM_PIN(pin);
|
||||||
|
|
||||||
|
// Enable GPIO clock
|
||||||
|
uint32_t gpio_add = Set_GPIO_Clock(port_index);
|
||||||
|
GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add;
|
||||||
|
|
||||||
|
// Configure GPIO
|
||||||
|
GPIO_InitTypeDef GPIO_InitStructure;
|
||||||
|
GPIO_InitStructure.Pin = (uint32_t)(1 << pin_index);
|
||||||
|
GPIO_InitStructure.Mode = gpio_mode[mode];
|
||||||
|
GPIO_InitStructure.Pull = pupd;
|
||||||
|
GPIO_InitStructure.Speed = GPIO_SPEED_HIGH;
|
||||||
|
GPIO_InitStructure.Alternate = afnum;
|
||||||
|
HAL_GPIO_Init(gpio, &GPIO_InitStructure);
|
||||||
|
|
||||||
|
// [TODO] Disconnect JTAG-DP + SW-DP signals.
|
||||||
|
// Warning: Need to reconnect under reset
|
||||||
|
//if ((pin == PA_13) || (pin == PA_14)) {
|
||||||
|
//
|
||||||
|
//}
|
||||||
|
//if ((pin == PA_15) || (pin == PB_3) || (pin == PB_4)) {
|
||||||
|
//
|
||||||
|
//}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Configure pin pull-up/pull-down
|
||||||
|
*/
|
||||||
|
void pin_mode(PinName pin, PinMode mode) {
|
||||||
|
MBED_ASSERT(pin != (PinName)NC);
|
||||||
|
uint32_t port_index = STM_PORT(pin);
|
||||||
|
uint32_t pin_index = STM_PIN(pin);
|
||||||
|
|
||||||
|
// Enable GPIO clock
|
||||||
|
uint32_t gpio_add = Set_GPIO_Clock(port_index);
|
||||||
|
GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add;
|
||||||
|
|
||||||
|
// Configure pull-up/pull-down resistors
|
||||||
|
uint32_t pupd = (uint32_t)mode;
|
||||||
|
if (pupd > 2)
|
||||||
|
pupd = 0; // Open-drain = No pull-up/No pull-down
|
||||||
|
gpio->PUPDR &= (uint32_t)(~(GPIO_PUPDR_PUPDR0 << (pin_index * 2)));
|
||||||
|
gpio->PUPDR |= (uint32_t)(pupd << (pin_index * 2));
|
||||||
|
|
||||||
|
}
|
||||||
|
|
@ -0,0 +1,97 @@
|
||||||
|
/* mbed Microcontroller Library
|
||||||
|
*******************************************************************************
|
||||||
|
* Copyright (c) 2014, STMicroelectronics
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*******************************************************************************
|
||||||
|
*/
|
||||||
|
#include "port_api.h"
|
||||||
|
#include "pinmap.h"
|
||||||
|
#include "gpio_api.h"
|
||||||
|
#include "mbed_error.h"
|
||||||
|
|
||||||
|
#if DEVICE_PORTIN || DEVICE_PORTOUT
|
||||||
|
|
||||||
|
extern uint32_t Set_GPIO_Clock(uint32_t port_idx);
|
||||||
|
|
||||||
|
// high nibble = port number (0=A, 1=B, 2=C, 3=D, 4=E, 5=F, ...)
|
||||||
|
// low nibble = pin number
|
||||||
|
PinName port_pin(PortName port, int pin_n) {
|
||||||
|
return (PinName)(pin_n + (port << 4));
|
||||||
|
}
|
||||||
|
|
||||||
|
void port_init(port_t *obj, PortName port, int mask, PinDirection dir) {
|
||||||
|
uint32_t port_index = (uint32_t)port;
|
||||||
|
|
||||||
|
// Enable GPIO clock
|
||||||
|
uint32_t gpio_add = Set_GPIO_Clock(port_index);
|
||||||
|
GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add;
|
||||||
|
|
||||||
|
// Fill PORT object structure for future use
|
||||||
|
obj->port = port;
|
||||||
|
obj->mask = mask;
|
||||||
|
obj->direction = dir;
|
||||||
|
obj->reg_in = &gpio->IDR;
|
||||||
|
obj->reg_out = &gpio->ODR;
|
||||||
|
|
||||||
|
port_dir(obj, dir);
|
||||||
|
}
|
||||||
|
|
||||||
|
void port_dir(port_t *obj, PinDirection dir) {
|
||||||
|
uint32_t i;
|
||||||
|
obj->direction = dir;
|
||||||
|
for (i = 0; i < 16; i++) { // Process all pins
|
||||||
|
if (obj->mask & (1 << i)) { // If the pin is used
|
||||||
|
if (dir == PIN_OUTPUT) {
|
||||||
|
pin_function(port_pin(obj->port, i), STM_PIN_DATA(STM_MODE_OUTPUT_PP, GPIO_NOPULL, 0));
|
||||||
|
} else { // PIN_INPUT
|
||||||
|
pin_function(port_pin(obj->port, i), STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void port_mode(port_t *obj, PinMode mode) {
|
||||||
|
uint32_t i;
|
||||||
|
for (i = 0; i < 16; i++) { // Process all pins
|
||||||
|
if (obj->mask & (1 << i)) { // If the pin is used
|
||||||
|
pin_mode(port_pin(obj->port, i), mode);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void port_write(port_t *obj, int value) {
|
||||||
|
*obj->reg_out = (*obj->reg_out & ~obj->mask) | (value & obj->mask);
|
||||||
|
}
|
||||||
|
|
||||||
|
int port_read(port_t *obj) {
|
||||||
|
if (obj->direction == PIN_OUTPUT) {
|
||||||
|
return (*obj->reg_out & obj->mask);
|
||||||
|
} else { // PIN_INPUT
|
||||||
|
return (*obj->reg_in & obj->mask);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,284 @@
|
||||||
|
/* mbed Microcontroller Library
|
||||||
|
*******************************************************************************
|
||||||
|
* Copyright (c) 2014, STMicroelectronics
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*******************************************************************************
|
||||||
|
*/
|
||||||
|
#include "pwmout_api.h"
|
||||||
|
|
||||||
|
#if DEVICE_PWMOUT
|
||||||
|
|
||||||
|
#include "cmsis.h"
|
||||||
|
#include "pinmap.h"
|
||||||
|
#include "mbed_error.h"
|
||||||
|
|
||||||
|
// TIM5 cannot be used because already used by the us_ticker
|
||||||
|
static const PinMap PinMap_PWM[] = {
|
||||||
|
{PA_0, PWM_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2)}, // TIM2_CH1
|
||||||
|
// {PA_0, PWM_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5)}, // TIM5_CH1
|
||||||
|
{PA_1, PWM_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2)}, // TIM2_CH2
|
||||||
|
// {PA_1, PWM_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5)}, // TIM5_CH2
|
||||||
|
{PA_2, PWM_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2)}, // TIM2_CH3
|
||||||
|
// {PA_2, PWM_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5)}, // TIM5_CH3
|
||||||
|
// {PA_2, PWM_9, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9)}, // TIM9_CH1
|
||||||
|
{PA_3, PWM_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2)}, // TIM2_CH4
|
||||||
|
// {PA_3, PWM_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5)}, // TIM5_CH4
|
||||||
|
// {PA_3, PWM_9, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9)}, // TIM9_CH2
|
||||||
|
{PA_5, PWM_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2)}, // TIM2_CH1
|
||||||
|
// {PA_5, PWM_8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM8)}, // TIM8_CH1N
|
||||||
|
{PA_6, PWM_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3)}, // TIM3_CH1
|
||||||
|
{PA_7, PWM_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1)}, // TIM1_CH1N
|
||||||
|
// {PA_7, PWM_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3)}, // TIM3_CH2
|
||||||
|
// {PA_7, PWM_8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8)}, // TIM8_CH1N
|
||||||
|
{PA_8, PWM_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1)}, // TIM1_CH1
|
||||||
|
{PA_9, PWM_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1)}, // TIM1_CH2
|
||||||
|
{PA_10, PWM_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1)}, // TIM1_CH3
|
||||||
|
{PA_11, PWM_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1)}, // TIM1_CH4
|
||||||
|
{PA_15, PWM_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2)}, // TIM2_CH1
|
||||||
|
|
||||||
|
{PB_0, PWM_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1)}, // TIM1_CH2N
|
||||||
|
// {PB_0, PWM_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3)}, // TIM3_CH3
|
||||||
|
// {PB_0, PWM_8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8)}, // TIM8_CH2N
|
||||||
|
{PB_1, PWM_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1)}, // TIM1_CH3N
|
||||||
|
// {PB_1, PWM_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3)}, // TIM3_CH4
|
||||||
|
// {PB_1, PWM_8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8)}, // TIM8_CH3N
|
||||||
|
{PB_3, PWM_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2)}, // TIM2_CH2
|
||||||
|
{PB_4, PWM_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3)}, // TIM3_CH1
|
||||||
|
{PB_5, PWM_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3)}, // TIM3_CH2
|
||||||
|
{PB_6, PWM_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4)}, // TIM4_CH1
|
||||||
|
{PB_7, PWM_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4)}, // TIM4_CH2
|
||||||
|
{PB_8, PWM_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4)}, // TIM4_CH3
|
||||||
|
// {PB_8, PWM_10,STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10)}, // TIM10_CH1
|
||||||
|
{PB_9, PWM_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4)}, // TIM4_CH4
|
||||||
|
// {PB_9, PWM_11,STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11)}, // TIM11_CH1
|
||||||
|
{PB_10, PWM_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2)}, // TIM2_CH3
|
||||||
|
{PB_11, PWM_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2)}, // TIM2_CH4
|
||||||
|
{PB_13, PWM_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1)}, // TIM1_CH1N
|
||||||
|
{PB_14, PWM_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1)}, // TIM1_CH2N
|
||||||
|
// {PB_14, PWM_8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8)}, // TIM8_CH2N
|
||||||
|
{PB_15, PWM_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1)}, // TIM1_CH3N
|
||||||
|
// {PB_15, PWM_8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8)}, // TIM1_CH3N
|
||||||
|
|
||||||
|
{PC_6, PWM_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3)}, // TIM3_CH1
|
||||||
|
// {PC_6, PWM_8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8)}, // TIM8_CH1
|
||||||
|
{PC_7, PWM_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3)}, // TIM3_CH2
|
||||||
|
// {PC_7, PWM_8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8)}, // TIM8_CH2
|
||||||
|
{PC_8, PWM_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3)}, // TIM3_CH3
|
||||||
|
// {PC_8, PWM_8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8)}, // TIM8_CH3
|
||||||
|
{PC_9, PWM_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3)}, // TIM3_CH4
|
||||||
|
// {PC_9, PWM_8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8)}, // TIM8_CH4
|
||||||
|
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
static TIM_HandleTypeDef TimHandle;
|
||||||
|
|
||||||
|
void pwmout_init(pwmout_t* obj, PinName pin) {
|
||||||
|
// Get the peripheral name from the pin and assign it to the object
|
||||||
|
obj->pwm = (PWMName)pinmap_peripheral(pin, PinMap_PWM);
|
||||||
|
|
||||||
|
if (obj->pwm == (PWMName)NC) {
|
||||||
|
error("PWM error: pinout mapping failed.");
|
||||||
|
}
|
||||||
|
|
||||||
|
// Enable TIM clock
|
||||||
|
if (obj->pwm == PWM_1) __TIM1_CLK_ENABLE();
|
||||||
|
if (obj->pwm == PWM_2) __TIM2_CLK_ENABLE();
|
||||||
|
if (obj->pwm == PWM_3) __TIM3_CLK_ENABLE();
|
||||||
|
if (obj->pwm == PWM_4) __TIM4_CLK_ENABLE();
|
||||||
|
if (obj->pwm == PWM_9) __TIM9_CLK_ENABLE();
|
||||||
|
if (obj->pwm == PWM_10) __TIM10_CLK_ENABLE();
|
||||||
|
if (obj->pwm == PWM_11) __TIM11_CLK_ENABLE();
|
||||||
|
|
||||||
|
// Configure GPIO
|
||||||
|
pinmap_pinout(pin, PinMap_PWM);
|
||||||
|
|
||||||
|
obj->pin = pin;
|
||||||
|
obj->period = 0;
|
||||||
|
obj->pulse = 0;
|
||||||
|
|
||||||
|
pwmout_period_us(obj, 20000); // 20 ms per default
|
||||||
|
}
|
||||||
|
|
||||||
|
void pwmout_free(pwmout_t* obj) {
|
||||||
|
// Configure GPIO
|
||||||
|
pin_function(obj->pin, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
|
||||||
|
}
|
||||||
|
|
||||||
|
void pwmout_write(pwmout_t* obj, float value) {
|
||||||
|
TIM_OC_InitTypeDef sConfig;
|
||||||
|
int channel = 0;
|
||||||
|
int complementary_channel = 0;
|
||||||
|
|
||||||
|
TimHandle.Instance = (TIM_TypeDef *)(obj->pwm);
|
||||||
|
|
||||||
|
if (value < (float)0.0) {
|
||||||
|
value = 0.0;
|
||||||
|
} else if (value > (float)1.0) {
|
||||||
|
value = 1.0;
|
||||||
|
}
|
||||||
|
|
||||||
|
obj->pulse = (uint32_t)((float)obj->period * value);
|
||||||
|
|
||||||
|
// Configure channels
|
||||||
|
sConfig.OCMode = TIM_OCMODE_PWM1;
|
||||||
|
sConfig.Pulse = obj->pulse;
|
||||||
|
sConfig.OCPolarity = TIM_OCPOLARITY_HIGH;
|
||||||
|
sConfig.OCNPolarity = TIM_OCNPOLARITY_HIGH;
|
||||||
|
sConfig.OCFastMode = TIM_OCFAST_DISABLE;
|
||||||
|
sConfig.OCIdleState = TIM_OCIDLESTATE_RESET;
|
||||||
|
sConfig.OCNIdleState = TIM_OCNIDLESTATE_RESET;
|
||||||
|
|
||||||
|
switch (obj->pin) {
|
||||||
|
|
||||||
|
// Channels 1
|
||||||
|
case PA_0:
|
||||||
|
case PA_5:
|
||||||
|
case PA_6:
|
||||||
|
case PA_8:
|
||||||
|
case PA_15:
|
||||||
|
case PB_4:
|
||||||
|
case PB_6:
|
||||||
|
case PC_6:
|
||||||
|
channel = TIM_CHANNEL_1;
|
||||||
|
break;
|
||||||
|
|
||||||
|
// Channels 1N
|
||||||
|
case PA_7:
|
||||||
|
case PB_13:
|
||||||
|
channel = TIM_CHANNEL_1;
|
||||||
|
complementary_channel = 1;
|
||||||
|
break;
|
||||||
|
|
||||||
|
// Channels 2
|
||||||
|
case PA_1:
|
||||||
|
case PA_9:
|
||||||
|
case PB_3:
|
||||||
|
case PB_5:
|
||||||
|
case PB_7:
|
||||||
|
case PC_7:
|
||||||
|
channel = TIM_CHANNEL_2;
|
||||||
|
break;
|
||||||
|
|
||||||
|
// Channels 2N
|
||||||
|
case PB_0:
|
||||||
|
case PB_14:
|
||||||
|
channel = TIM_CHANNEL_2;
|
||||||
|
complementary_channel = 1;
|
||||||
|
break;
|
||||||
|
|
||||||
|
// Channels 3
|
||||||
|
case PA_2:
|
||||||
|
case PA_10:
|
||||||
|
case PB_8:
|
||||||
|
case PB_10:
|
||||||
|
case PC_8:
|
||||||
|
channel = TIM_CHANNEL_3;
|
||||||
|
break;
|
||||||
|
|
||||||
|
// Channels 3N
|
||||||
|
case PB_1:
|
||||||
|
case PB_15:
|
||||||
|
channel = TIM_CHANNEL_3;
|
||||||
|
complementary_channel = 1;
|
||||||
|
break;
|
||||||
|
|
||||||
|
// Channels 4
|
||||||
|
case PA_3:
|
||||||
|
case PA_11:
|
||||||
|
case PB_9:
|
||||||
|
case PB_11:
|
||||||
|
case PC_9:
|
||||||
|
channel = TIM_CHANNEL_4;
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
HAL_TIM_PWM_ConfigChannel(&TimHandle, &sConfig, channel);
|
||||||
|
if (complementary_channel) {
|
||||||
|
HAL_TIMEx_PWMN_Start(&TimHandle, channel);
|
||||||
|
} else {
|
||||||
|
HAL_TIM_PWM_Start(&TimHandle, channel);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
float pwmout_read(pwmout_t* obj) {
|
||||||
|
float value = 0;
|
||||||
|
if (obj->period > 0) {
|
||||||
|
value = (float)(obj->pulse) / (float)(obj->period);
|
||||||
|
}
|
||||||
|
return ((value > (float)1.0) ? (float)(1.0) : (value));
|
||||||
|
}
|
||||||
|
|
||||||
|
void pwmout_period(pwmout_t* obj, float seconds) {
|
||||||
|
pwmout_period_us(obj, seconds * 1000000.0f);
|
||||||
|
}
|
||||||
|
|
||||||
|
void pwmout_period_ms(pwmout_t* obj, int ms) {
|
||||||
|
pwmout_period_us(obj, ms * 1000);
|
||||||
|
}
|
||||||
|
|
||||||
|
void pwmout_period_us(pwmout_t* obj, int us) {
|
||||||
|
TimHandle.Instance = (TIM_TypeDef *)(obj->pwm);
|
||||||
|
|
||||||
|
float dc = pwmout_read(obj);
|
||||||
|
|
||||||
|
__HAL_TIM_DISABLE(&TimHandle);
|
||||||
|
|
||||||
|
// Update the SystemCoreClock variable
|
||||||
|
SystemCoreClockUpdate();
|
||||||
|
|
||||||
|
TimHandle.Init.Period = us - 1;
|
||||||
|
TimHandle.Init.Prescaler = (uint16_t)(SystemCoreClock / 1000000) - 1; // 1 µs tick
|
||||||
|
TimHandle.Init.ClockDivision = 0;
|
||||||
|
TimHandle.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||||||
|
HAL_TIM_PWM_Init(&TimHandle);
|
||||||
|
|
||||||
|
// Set duty cycle again
|
||||||
|
pwmout_write(obj, dc);
|
||||||
|
|
||||||
|
// Save for future use
|
||||||
|
obj->period = us;
|
||||||
|
|
||||||
|
__HAL_TIM_ENABLE(&TimHandle);
|
||||||
|
}
|
||||||
|
|
||||||
|
void pwmout_pulsewidth(pwmout_t* obj, float seconds) {
|
||||||
|
pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
|
||||||
|
}
|
||||||
|
|
||||||
|
void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) {
|
||||||
|
pwmout_pulsewidth_us(obj, ms * 1000);
|
||||||
|
}
|
||||||
|
|
||||||
|
void pwmout_pulsewidth_us(pwmout_t* obj, int us) {
|
||||||
|
float value = (float)us / (float)obj->period;
|
||||||
|
pwmout_write(obj, value);
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,198 @@
|
||||||
|
/* mbed Microcontroller Library
|
||||||
|
*******************************************************************************
|
||||||
|
* Copyright (c) 2014, STMicroelectronics
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*******************************************************************************
|
||||||
|
*/
|
||||||
|
#include "rtc_api.h"
|
||||||
|
|
||||||
|
#if DEVICE_RTC
|
||||||
|
|
||||||
|
#include "mbed_error.h"
|
||||||
|
|
||||||
|
static int rtc_inited = 0;
|
||||||
|
|
||||||
|
static RTC_HandleTypeDef RtcHandle;
|
||||||
|
|
||||||
|
void rtc_init(void) {
|
||||||
|
RCC_OscInitTypeDef RCC_OscInitStruct;
|
||||||
|
uint32_t rtc_freq = 0;
|
||||||
|
|
||||||
|
if (rtc_inited) return;
|
||||||
|
rtc_inited = 1;
|
||||||
|
|
||||||
|
RtcHandle.Instance = RTC;
|
||||||
|
|
||||||
|
// Enable Power clock
|
||||||
|
__PWR_CLK_ENABLE();
|
||||||
|
|
||||||
|
// Enable access to Backup domain
|
||||||
|
HAL_PWR_EnableBkUpAccess();
|
||||||
|
|
||||||
|
// Reset Backup domain
|
||||||
|
__HAL_RCC_BACKUPRESET_FORCE();
|
||||||
|
__HAL_RCC_BACKUPRESET_RELEASE();
|
||||||
|
|
||||||
|
// Enable LSE Oscillator
|
||||||
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
|
||||||
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; /* Mandatory, otherwise the PLL is reconfigured! */
|
||||||
|
RCC_OscInitStruct.LSEState = RCC_LSE_ON; /* External 32.768 kHz clock on OSC_IN/OSC_OUT */
|
||||||
|
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) {
|
||||||
|
// Connect LSE to RTC
|
||||||
|
__HAL_RCC_RTC_CLKPRESCALER(RCC_RTCCLKSOURCE_LSE);
|
||||||
|
__HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSE);
|
||||||
|
rtc_freq = LSE_VALUE;
|
||||||
|
} else {
|
||||||
|
// Enable LSI clock
|
||||||
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_LSE;
|
||||||
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // Mandatory, otherwise the PLL is reconfigured!
|
||||||
|
RCC_OscInitStruct.LSEState = RCC_LSE_OFF;
|
||||||
|
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
|
||||||
|
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
|
||||||
|
error("RTC error: LSI clock initialization failed.");
|
||||||
|
}
|
||||||
|
// Connect LSI to RTC
|
||||||
|
__HAL_RCC_RTC_CLKPRESCALER(RCC_RTCCLKSOURCE_LSI);
|
||||||
|
__HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSI);
|
||||||
|
// [TODO] This value is LSI typical value. To be measured precisely using a timer input capture
|
||||||
|
rtc_freq = 32000;
|
||||||
|
}
|
||||||
|
|
||||||
|
// Enable RTC
|
||||||
|
__HAL_RCC_RTC_ENABLE();
|
||||||
|
|
||||||
|
RtcHandle.Init.HourFormat = RTC_HOURFORMAT_24;
|
||||||
|
RtcHandle.Init.AsynchPrediv = 127;
|
||||||
|
RtcHandle.Init.SynchPrediv = (rtc_freq / 128) - 1;
|
||||||
|
RtcHandle.Init.OutPut = RTC_OUTPUT_DISABLE;
|
||||||
|
RtcHandle.Init.OutPutPolarity = RTC_OUTPUT_POLARITY_HIGH;
|
||||||
|
RtcHandle.Init.OutPutType = RTC_OUTPUT_TYPE_OPENDRAIN;
|
||||||
|
|
||||||
|
if (HAL_RTC_Init(&RtcHandle) != HAL_OK) {
|
||||||
|
error("RTC error: RTC initialization failed.");
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void rtc_free(void) {
|
||||||
|
// Enable Power clock
|
||||||
|
__PWR_CLK_ENABLE();
|
||||||
|
|
||||||
|
// Enable access to Backup domain
|
||||||
|
HAL_PWR_EnableBkUpAccess();
|
||||||
|
|
||||||
|
// Reset Backup domain
|
||||||
|
__HAL_RCC_BACKUPRESET_FORCE();
|
||||||
|
__HAL_RCC_BACKUPRESET_RELEASE();
|
||||||
|
|
||||||
|
// Disable access to Backup domain
|
||||||
|
HAL_PWR_DisableBkUpAccess();
|
||||||
|
|
||||||
|
// Disable LSI and LSE clocks
|
||||||
|
RCC_OscInitTypeDef RCC_OscInitStruct;
|
||||||
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_LSE;
|
||||||
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
|
||||||
|
RCC_OscInitStruct.LSIState = RCC_LSI_OFF;
|
||||||
|
RCC_OscInitStruct.LSEState = RCC_LSE_OFF;
|
||||||
|
HAL_RCC_OscConfig(&RCC_OscInitStruct);
|
||||||
|
|
||||||
|
rtc_inited = 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
int rtc_isenabled(void) {
|
||||||
|
return rtc_inited;
|
||||||
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
RTC Registers
|
||||||
|
RTC_WeekDay 1=monday, 2=tuesday, ..., 7=sunday
|
||||||
|
RTC_Month 1=january, 2=february, ..., 12=december
|
||||||
|
RTC_Date day of the month 1-31
|
||||||
|
RTC_Year year 0-99
|
||||||
|
struct tm
|
||||||
|
tm_sec seconds after the minute 0-61
|
||||||
|
tm_min minutes after the hour 0-59
|
||||||
|
tm_hour hours since midnight 0-23
|
||||||
|
tm_mday day of the month 1-31
|
||||||
|
tm_mon months since January 0-11
|
||||||
|
tm_year years since 1900
|
||||||
|
tm_wday days since Sunday 0-6
|
||||||
|
tm_yday days since January 1 0-365
|
||||||
|
tm_isdst Daylight Saving Time flag
|
||||||
|
*/
|
||||||
|
time_t rtc_read(void) {
|
||||||
|
RTC_DateTypeDef dateStruct;
|
||||||
|
RTC_TimeTypeDef timeStruct;
|
||||||
|
struct tm timeinfo;
|
||||||
|
|
||||||
|
RtcHandle.Instance = RTC;
|
||||||
|
|
||||||
|
// Read actual date and time
|
||||||
|
// Warning: the time must be read first!
|
||||||
|
HAL_RTC_GetTime(&RtcHandle, &timeStruct, FORMAT_BIN);
|
||||||
|
HAL_RTC_GetDate(&RtcHandle, &dateStruct, FORMAT_BIN);
|
||||||
|
|
||||||
|
// Setup a tm structure based on the RTC
|
||||||
|
timeinfo.tm_wday = dateStruct.WeekDay;
|
||||||
|
timeinfo.tm_mon = dateStruct.Month - 1;
|
||||||
|
timeinfo.tm_mday = dateStruct.Date;
|
||||||
|
timeinfo.tm_year = dateStruct.Year + 100;
|
||||||
|
timeinfo.tm_hour = timeStruct.Hours;
|
||||||
|
timeinfo.tm_min = timeStruct.Minutes;
|
||||||
|
timeinfo.tm_sec = timeStruct.Seconds;
|
||||||
|
|
||||||
|
// Convert to timestamp
|
||||||
|
time_t t = mktime(&timeinfo);
|
||||||
|
|
||||||
|
return t;
|
||||||
|
}
|
||||||
|
|
||||||
|
void rtc_write(time_t t) {
|
||||||
|
RTC_DateTypeDef dateStruct;
|
||||||
|
RTC_TimeTypeDef timeStruct;
|
||||||
|
|
||||||
|
RtcHandle.Instance = RTC;
|
||||||
|
|
||||||
|
// Convert the time into a tm
|
||||||
|
struct tm *timeinfo = localtime(&t);
|
||||||
|
|
||||||
|
// Fill RTC structures
|
||||||
|
dateStruct.WeekDay = timeinfo->tm_wday;
|
||||||
|
dateStruct.Month = timeinfo->tm_mon + 1;
|
||||||
|
dateStruct.Date = timeinfo->tm_mday;
|
||||||
|
dateStruct.Year = timeinfo->tm_year - 100;
|
||||||
|
timeStruct.Hours = timeinfo->tm_hour;
|
||||||
|
timeStruct.Minutes = timeinfo->tm_min;
|
||||||
|
timeStruct.Seconds = timeinfo->tm_sec;
|
||||||
|
timeStruct.TimeFormat = RTC_HOURFORMAT12_PM;
|
||||||
|
timeStruct.DayLightSaving = RTC_DAYLIGHTSAVING_NONE;
|
||||||
|
timeStruct.StoreOperation = RTC_STOREOPERATION_RESET;
|
||||||
|
|
||||||
|
// Change the RTC current date/time
|
||||||
|
HAL_RTC_SetDate(&RtcHandle, &dateStruct, FORMAT_BIN);
|
||||||
|
HAL_RTC_SetTime(&RtcHandle, &timeStruct, FORMAT_BIN);
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,397 @@
|
||||||
|
/* mbed Microcontroller Library
|
||||||
|
*******************************************************************************
|
||||||
|
* Copyright (c) 2014, STMicroelectronics
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*******************************************************************************
|
||||||
|
*/
|
||||||
|
#include "mbed_assert.h"
|
||||||
|
#include "serial_api.h"
|
||||||
|
|
||||||
|
#if DEVICE_SERIAL
|
||||||
|
|
||||||
|
#include "cmsis.h"
|
||||||
|
#include "pinmap.h"
|
||||||
|
#include <string.h>
|
||||||
|
|
||||||
|
static const PinMap PinMap_UART_TX[] = {
|
||||||
|
{PA_0, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||||
|
{PA_2, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||||
|
{PA_9, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||||
|
{PB_6, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||||
|
{PB_10, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||||
|
{PC_6, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
|
||||||
|
{PC_10, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||||
|
{PC_12, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
static const PinMap PinMap_UART_RX[] = {
|
||||||
|
{PA_1, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||||
|
{PA_3, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||||
|
{PA_10, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||||
|
{PB_7, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||||
|
{PB_11, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||||
|
{PC_7, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)},
|
||||||
|
{PC_11, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||||
|
{PD_2, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
#define UART_NUM (6)
|
||||||
|
|
||||||
|
static uint32_t serial_irq_ids[UART_NUM] = {0};
|
||||||
|
|
||||||
|
static uart_irq_handler irq_handler;
|
||||||
|
|
||||||
|
UART_HandleTypeDef UartHandle;
|
||||||
|
|
||||||
|
int stdio_uart_inited = 0;
|
||||||
|
serial_t stdio_uart;
|
||||||
|
|
||||||
|
static void init_uart(serial_t *obj) {
|
||||||
|
UartHandle.Instance = (USART_TypeDef *)(obj->uart);
|
||||||
|
|
||||||
|
UartHandle.Init.BaudRate = obj->baudrate;
|
||||||
|
UartHandle.Init.WordLength = obj->databits;
|
||||||
|
UartHandle.Init.StopBits = obj->stopbits;
|
||||||
|
UartHandle.Init.Parity = obj->parity;
|
||||||
|
UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE;
|
||||||
|
|
||||||
|
if (obj->pin_rx == NC) {
|
||||||
|
UartHandle.Init.Mode = UART_MODE_TX;
|
||||||
|
} else if (obj->pin_tx == NC) {
|
||||||
|
UartHandle.Init.Mode = UART_MODE_RX;
|
||||||
|
} else {
|
||||||
|
UartHandle.Init.Mode = UART_MODE_TX_RX;
|
||||||
|
}
|
||||||
|
|
||||||
|
HAL_UART_Init(&UartHandle);
|
||||||
|
}
|
||||||
|
|
||||||
|
void serial_init(serial_t *obj, PinName tx, PinName rx) {
|
||||||
|
// Determine the UART to use (UART_1, UART_2, ...)
|
||||||
|
UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
|
||||||
|
UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
|
||||||
|
|
||||||
|
// Get the peripheral name (UART_1, UART_2, ...) from the pin and assign it to the object
|
||||||
|
obj->uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
|
||||||
|
MBED_ASSERT(obj->uart != (UARTName)NC);
|
||||||
|
|
||||||
|
// Enable USART clock
|
||||||
|
switch (obj->uart) {
|
||||||
|
case UART_1:
|
||||||
|
__USART1_CLK_ENABLE();
|
||||||
|
obj->index = 0;
|
||||||
|
break;
|
||||||
|
case UART_2:
|
||||||
|
__USART2_CLK_ENABLE();
|
||||||
|
obj->index = 1;
|
||||||
|
break;
|
||||||
|
case UART_3:
|
||||||
|
__USART3_CLK_ENABLE();
|
||||||
|
obj->index = 2;
|
||||||
|
break;
|
||||||
|
case UART_4:
|
||||||
|
__UART4_CLK_ENABLE();
|
||||||
|
obj->index = 3;
|
||||||
|
break;
|
||||||
|
case UART_5:
|
||||||
|
__UART5_CLK_ENABLE();
|
||||||
|
obj->index = 4;
|
||||||
|
break;
|
||||||
|
case UART_6:
|
||||||
|
__USART6_CLK_ENABLE();
|
||||||
|
obj->index = 5;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
// Configure the UART pins
|
||||||
|
pinmap_pinout(tx, PinMap_UART_TX);
|
||||||
|
pinmap_pinout(rx, PinMap_UART_RX);
|
||||||
|
if (tx != NC) {
|
||||||
|
pin_mode(tx, PullUp);
|
||||||
|
}
|
||||||
|
if (rx != NC) {
|
||||||
|
pin_mode(rx, PullUp);
|
||||||
|
}
|
||||||
|
|
||||||
|
// Configure UART
|
||||||
|
obj->baudrate = 9600;
|
||||||
|
obj->databits = UART_WORDLENGTH_8B;
|
||||||
|
obj->stopbits = UART_STOPBITS_1;
|
||||||
|
obj->parity = UART_PARITY_NONE;
|
||||||
|
|
||||||
|
obj->pin_tx = tx;
|
||||||
|
obj->pin_rx = rx;
|
||||||
|
|
||||||
|
init_uart(obj);
|
||||||
|
|
||||||
|
// For stdio management
|
||||||
|
if (obj->uart == STDIO_UART) {
|
||||||
|
stdio_uart_inited = 1;
|
||||||
|
memcpy(&stdio_uart, obj, sizeof(serial_t));
|
||||||
|
}
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
void serial_free(serial_t *obj) {
|
||||||
|
// Reset UART and disable clock
|
||||||
|
switch (obj->uart) {
|
||||||
|
case UART_1:
|
||||||
|
__USART1_FORCE_RESET();
|
||||||
|
__USART1_RELEASE_RESET();
|
||||||
|
__USART1_CLK_DISABLE();
|
||||||
|
break;
|
||||||
|
case UART_2:
|
||||||
|
__USART2_FORCE_RESET();
|
||||||
|
__USART2_RELEASE_RESET();
|
||||||
|
__USART2_CLK_DISABLE();
|
||||||
|
break;
|
||||||
|
case UART_3:
|
||||||
|
__USART3_FORCE_RESET();
|
||||||
|
__USART3_RELEASE_RESET();
|
||||||
|
__USART3_CLK_DISABLE();
|
||||||
|
break;
|
||||||
|
case UART_4:
|
||||||
|
__UART4_FORCE_RESET();
|
||||||
|
__UART4_RELEASE_RESET();
|
||||||
|
__UART4_CLK_DISABLE();
|
||||||
|
break;
|
||||||
|
case UART_5:
|
||||||
|
__UART5_FORCE_RESET();
|
||||||
|
__UART5_RELEASE_RESET();
|
||||||
|
__UART5_CLK_DISABLE();
|
||||||
|
break;
|
||||||
|
case UART_6:
|
||||||
|
__USART6_FORCE_RESET();
|
||||||
|
__USART6_RELEASE_RESET();
|
||||||
|
__USART6_CLK_DISABLE();
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
// Configure GPIOs
|
||||||
|
pin_function(obj->pin_tx, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
|
||||||
|
pin_function(obj->pin_rx, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
|
||||||
|
|
||||||
|
serial_irq_ids[obj->index] = 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
void serial_baud(serial_t *obj, int baudrate) {
|
||||||
|
obj->baudrate = baudrate;
|
||||||
|
init_uart(obj);
|
||||||
|
}
|
||||||
|
|
||||||
|
void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
|
||||||
|
if (data_bits == 9) {
|
||||||
|
obj->databits = UART_WORDLENGTH_9B;
|
||||||
|
} else {
|
||||||
|
obj->databits = UART_WORDLENGTH_8B;
|
||||||
|
}
|
||||||
|
|
||||||
|
switch (parity) {
|
||||||
|
case ParityOdd:
|
||||||
|
case ParityForced0:
|
||||||
|
obj->parity = UART_PARITY_ODD;
|
||||||
|
break;
|
||||||
|
case ParityEven:
|
||||||
|
case ParityForced1:
|
||||||
|
obj->parity = UART_PARITY_EVEN;
|
||||||
|
break;
|
||||||
|
default: // ParityNone
|
||||||
|
obj->parity = UART_PARITY_NONE;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (stop_bits == 2) {
|
||||||
|
obj->stopbits = UART_STOPBITS_2;
|
||||||
|
} else {
|
||||||
|
obj->stopbits = UART_STOPBITS_1;
|
||||||
|
}
|
||||||
|
|
||||||
|
init_uart(obj);
|
||||||
|
}
|
||||||
|
|
||||||
|
/******************************************************************************
|
||||||
|
* INTERRUPTS HANDLING
|
||||||
|
******************************************************************************/
|
||||||
|
|
||||||
|
static void uart_irq(UARTName name, int id) {
|
||||||
|
UartHandle.Instance = (USART_TypeDef *)name;
|
||||||
|
if (serial_irq_ids[id] != 0) {
|
||||||
|
if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_TC) != RESET) {
|
||||||
|
irq_handler(serial_irq_ids[id], TxIrq);
|
||||||
|
__HAL_UART_CLEAR_FLAG(&UartHandle, UART_FLAG_TC);
|
||||||
|
}
|
||||||
|
if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE) != RESET) {
|
||||||
|
irq_handler(serial_irq_ids[id], RxIrq);
|
||||||
|
__HAL_UART_CLEAR_FLAG(&UartHandle, UART_FLAG_RXNE);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
static void uart1_irq(void) {
|
||||||
|
uart_irq(UART_1, 0);
|
||||||
|
}
|
||||||
|
static void uart2_irq(void) {
|
||||||
|
uart_irq(UART_2, 1);
|
||||||
|
}
|
||||||
|
static void uart3_irq(void) {
|
||||||
|
uart_irq(UART_3, 2);
|
||||||
|
}
|
||||||
|
static void uart4_irq(void) {
|
||||||
|
uart_irq(UART_4, 3);
|
||||||
|
}
|
||||||
|
static void uart5_irq(void) {
|
||||||
|
uart_irq(UART_5, 4);
|
||||||
|
}
|
||||||
|
static void uart6_irq(void) {
|
||||||
|
uart_irq(UART_6, 5);
|
||||||
|
}
|
||||||
|
|
||||||
|
void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
|
||||||
|
irq_handler = handler;
|
||||||
|
serial_irq_ids[obj->index] = id;
|
||||||
|
}
|
||||||
|
|
||||||
|
void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
|
||||||
|
IRQn_Type irq_n = (IRQn_Type)0;
|
||||||
|
uint32_t vector = 0;
|
||||||
|
|
||||||
|
UartHandle.Instance = (USART_TypeDef *)(obj->uart);
|
||||||
|
|
||||||
|
switch (obj->uart) {
|
||||||
|
case UART_1:
|
||||||
|
irq_n = USART1_IRQn;
|
||||||
|
vector = (uint32_t)&uart1_irq;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case UART_2:
|
||||||
|
irq_n = USART2_IRQn;
|
||||||
|
vector = (uint32_t)&uart2_irq;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case UART_3:
|
||||||
|
irq_n = USART3_IRQn;
|
||||||
|
vector = (uint32_t)&uart3_irq;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case UART_4:
|
||||||
|
irq_n = UART4_IRQn;
|
||||||
|
vector = (uint32_t)&uart4_irq;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case UART_5:
|
||||||
|
irq_n = UART5_IRQn;
|
||||||
|
vector = (uint32_t)&uart5_irq;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case UART_6:
|
||||||
|
irq_n = USART6_IRQn;
|
||||||
|
vector = (uint32_t)&uart6_irq;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (enable) {
|
||||||
|
|
||||||
|
if (irq == RxIrq) {
|
||||||
|
__HAL_UART_ENABLE_IT(&UartHandle, UART_IT_RXNE);
|
||||||
|
} else { // TxIrq
|
||||||
|
__HAL_UART_ENABLE_IT(&UartHandle, UART_IT_TC);
|
||||||
|
}
|
||||||
|
|
||||||
|
NVIC_SetVector(irq_n, vector);
|
||||||
|
NVIC_EnableIRQ(irq_n);
|
||||||
|
|
||||||
|
} else { // disable
|
||||||
|
|
||||||
|
int all_disabled = 0;
|
||||||
|
|
||||||
|
if (irq == RxIrq) {
|
||||||
|
__HAL_UART_DISABLE_IT(&UartHandle, UART_IT_RXNE);
|
||||||
|
// Check if TxIrq is disabled too
|
||||||
|
if ((UartHandle.Instance->CR1 & USART_CR1_TXEIE) == 0) all_disabled = 1;
|
||||||
|
} else { // TxIrq
|
||||||
|
__HAL_UART_DISABLE_IT(&UartHandle, UART_IT_TXE);
|
||||||
|
// Check if RxIrq is disabled too
|
||||||
|
if ((UartHandle.Instance->CR1 & USART_CR1_RXNEIE) == 0) all_disabled = 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (all_disabled) NVIC_DisableIRQ(irq_n);
|
||||||
|
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/******************************************************************************
|
||||||
|
* READ/WRITE
|
||||||
|
******************************************************************************/
|
||||||
|
|
||||||
|
int serial_getc(serial_t *obj) {
|
||||||
|
USART_TypeDef *uart = (USART_TypeDef *)(obj->uart);
|
||||||
|
while (!serial_readable(obj));
|
||||||
|
return (int)(uart->DR & 0x1FF);
|
||||||
|
}
|
||||||
|
|
||||||
|
void serial_putc(serial_t *obj, int c) {
|
||||||
|
USART_TypeDef *uart = (USART_TypeDef *)(obj->uart);
|
||||||
|
while (!serial_writable(obj));
|
||||||
|
uart->DR = (uint32_t)(c & 0x1FF);
|
||||||
|
}
|
||||||
|
|
||||||
|
int serial_readable(serial_t *obj) {
|
||||||
|
int status;
|
||||||
|
UartHandle.Instance = (USART_TypeDef *)(obj->uart);
|
||||||
|
// Check if data is received
|
||||||
|
status = ((__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE) != RESET) ? 1 : 0);
|
||||||
|
return status;
|
||||||
|
}
|
||||||
|
|
||||||
|
int serial_writable(serial_t *obj) {
|
||||||
|
int status;
|
||||||
|
UartHandle.Instance = (USART_TypeDef *)(obj->uart);
|
||||||
|
// Check if data is transmitted
|
||||||
|
status = ((__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_TXE) != RESET) ? 1 : 0);
|
||||||
|
return status;
|
||||||
|
}
|
||||||
|
|
||||||
|
void serial_clear(serial_t *obj) {
|
||||||
|
UartHandle.Instance = (USART_TypeDef *)(obj->uart);
|
||||||
|
__HAL_UART_CLEAR_FLAG(&UartHandle, UART_FLAG_TXE);
|
||||||
|
__HAL_UART_CLEAR_FLAG(&UartHandle, UART_FLAG_RXNE);
|
||||||
|
}
|
||||||
|
|
||||||
|
void serial_pinout_tx(PinName tx) {
|
||||||
|
pinmap_pinout(tx, PinMap_UART_TX);
|
||||||
|
}
|
||||||
|
|
||||||
|
void serial_break_set(serial_t *obj) {
|
||||||
|
UartHandle.Instance = (USART_TypeDef *)(obj->uart);
|
||||||
|
HAL_LIN_SendBreak(&UartHandle);
|
||||||
|
}
|
||||||
|
|
||||||
|
void serial_break_clear(serial_t *obj) {
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,59 @@
|
||||||
|
/* mbed Microcontroller Library
|
||||||
|
*******************************************************************************
|
||||||
|
* Copyright (c) 2014, STMicroelectronics
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*******************************************************************************
|
||||||
|
*/
|
||||||
|
#include "sleep_api.h"
|
||||||
|
|
||||||
|
#if DEVICE_SLEEP
|
||||||
|
|
||||||
|
#include "cmsis.h"
|
||||||
|
|
||||||
|
static TIM_HandleTypeDef TimMasterHandle;
|
||||||
|
|
||||||
|
void sleep(void) {
|
||||||
|
TimMasterHandle.Instance = TIM5;
|
||||||
|
|
||||||
|
// Disable HAL tick interrupt
|
||||||
|
__HAL_TIM_DISABLE_IT(&TimMasterHandle, TIM_IT_CC2);
|
||||||
|
|
||||||
|
// Request to enter SLEEP mode
|
||||||
|
HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFI);
|
||||||
|
|
||||||
|
// Enable HAL tick interrupt
|
||||||
|
__HAL_TIM_ENABLE_IT(&TimMasterHandle, TIM_IT_CC2);
|
||||||
|
}
|
||||||
|
|
||||||
|
void deepsleep(void) {
|
||||||
|
// Request to enter STOP mode with regulator in low power mode
|
||||||
|
HAL_PWR_EnterSTOPMode(PWR_LOWPOWERREGULATOR_ON, PWR_STOPENTRY_WFI);
|
||||||
|
|
||||||
|
// After wake-up from STOP reconfigure the PLL
|
||||||
|
SetSysClock();
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,324 @@
|
||||||
|
/* mbed Microcontroller Library
|
||||||
|
*******************************************************************************
|
||||||
|
* Copyright (c) 2014, STMicroelectronics
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*******************************************************************************
|
||||||
|
*/
|
||||||
|
#include "mbed_assert.h"
|
||||||
|
#include "spi_api.h"
|
||||||
|
|
||||||
|
#if DEVICE_SPI
|
||||||
|
|
||||||
|
#include <math.h>
|
||||||
|
#include "cmsis.h"
|
||||||
|
#include "pinmap.h"
|
||||||
|
|
||||||
|
static const PinMap PinMap_SPI_MOSI[] = {
|
||||||
|
{PA_7, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||||
|
{PB_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||||
|
// {PB_5, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||||
|
{PB_15, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||||
|
{PC_3, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||||
|
{PC_12, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
static const PinMap PinMap_SPI_MISO[] = {
|
||||||
|
{PA_6, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||||
|
{PB_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||||
|
// {PB_4, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||||
|
{PB_14, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||||
|
{PC_2, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||||
|
{PC_11, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
static const PinMap PinMap_SPI_SCLK[] = {
|
||||||
|
{PA_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||||
|
{PB_3, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI1)},
|
||||||
|
// {PB_3, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||||
|
{PB_10, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||||
|
{PB_13, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI2)},
|
||||||
|
{PC_10, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_SPI3)},
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
static const PinMap PinMap_SPI_SSEL[] = {
|
||||||
|
{PA_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
|
||||||
|
// {PA_4, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)},
|
||||||
|
{PA_15, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
|
||||||
|
// {PA_15, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)},
|
||||||
|
{PB_9, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
|
||||||
|
{PB_12, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
|
||||||
|
{NC, NC, 0}
|
||||||
|
};
|
||||||
|
|
||||||
|
static SPI_HandleTypeDef SpiHandle;
|
||||||
|
|
||||||
|
static void init_spi(spi_t *obj) {
|
||||||
|
SpiHandle.Instance = (SPI_TypeDef *)(obj->spi);
|
||||||
|
|
||||||
|
__HAL_SPI_DISABLE(&SpiHandle);
|
||||||
|
|
||||||
|
SpiHandle.Init.Mode = obj->mode;
|
||||||
|
SpiHandle.Init.BaudRatePrescaler = obj->br_presc;
|
||||||
|
SpiHandle.Init.Direction = SPI_DIRECTION_2LINES;
|
||||||
|
SpiHandle.Init.CLKPhase = obj->cpha;
|
||||||
|
SpiHandle.Init.CLKPolarity = obj->cpol;
|
||||||
|
SpiHandle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLED;
|
||||||
|
SpiHandle.Init.CRCPolynomial = 7;
|
||||||
|
SpiHandle.Init.DataSize = obj->bits;
|
||||||
|
SpiHandle.Init.FirstBit = SPI_FIRSTBIT_MSB;
|
||||||
|
SpiHandle.Init.NSS = obj->nss;
|
||||||
|
SpiHandle.Init.TIMode = SPI_TIMODE_DISABLED;
|
||||||
|
|
||||||
|
HAL_SPI_Init(&SpiHandle);
|
||||||
|
|
||||||
|
__HAL_SPI_ENABLE(&SpiHandle);
|
||||||
|
}
|
||||||
|
|
||||||
|
void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
|
||||||
|
// Determine the SPI to use
|
||||||
|
SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
|
||||||
|
SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
|
||||||
|
SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
|
||||||
|
SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL);
|
||||||
|
|
||||||
|
SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
|
||||||
|
SPIName spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
|
||||||
|
|
||||||
|
obj->spi = (SPIName)pinmap_merge(spi_data, spi_cntl);
|
||||||
|
MBED_ASSERT(obj->spi != (SPIName)NC);
|
||||||
|
|
||||||
|
// Enable SPI clock
|
||||||
|
if (obj->spi == SPI_1) {
|
||||||
|
__SPI1_CLK_ENABLE();
|
||||||
|
}
|
||||||
|
if (obj->spi == SPI_2) {
|
||||||
|
__SPI2_CLK_ENABLE();
|
||||||
|
}
|
||||||
|
if (obj->spi == SPI_3) {
|
||||||
|
__SPI3_CLK_ENABLE();
|
||||||
|
}
|
||||||
|
|
||||||
|
// Configure the SPI pins
|
||||||
|
pinmap_pinout(mosi, PinMap_SPI_MOSI);
|
||||||
|
pinmap_pinout(miso, PinMap_SPI_MISO);
|
||||||
|
pinmap_pinout(sclk, PinMap_SPI_SCLK);
|
||||||
|
|
||||||
|
// Save new values
|
||||||
|
obj->bits = SPI_DATASIZE_8BIT;
|
||||||
|
obj->cpol = SPI_POLARITY_LOW;
|
||||||
|
obj->cpha = SPI_PHASE_1EDGE;
|
||||||
|
obj->br_presc = SPI_BAUDRATEPRESCALER_256;
|
||||||
|
|
||||||
|
obj->pin_miso = miso;
|
||||||
|
obj->pin_mosi = mosi;
|
||||||
|
obj->pin_sclk = sclk;
|
||||||
|
obj->pin_ssel = ssel;
|
||||||
|
|
||||||
|
if (ssel == NC) { // SW NSS Master mode
|
||||||
|
obj->mode = SPI_MODE_MASTER;
|
||||||
|
obj->nss = SPI_NSS_SOFT;
|
||||||
|
} else { // Slave
|
||||||
|
pinmap_pinout(ssel, PinMap_SPI_SSEL);
|
||||||
|
obj->mode = SPI_MODE_SLAVE;
|
||||||
|
obj->nss = SPI_NSS_HARD_INPUT;
|
||||||
|
}
|
||||||
|
|
||||||
|
init_spi(obj);
|
||||||
|
}
|
||||||
|
|
||||||
|
void spi_free(spi_t *obj) {
|
||||||
|
// Reset SPI and disable clock
|
||||||
|
if (obj->spi == SPI_1) {
|
||||||
|
__SPI1_FORCE_RESET();
|
||||||
|
__SPI1_RELEASE_RESET();
|
||||||
|
__SPI1_CLK_DISABLE();
|
||||||
|
}
|
||||||
|
|
||||||
|
if (obj->spi == SPI_2) {
|
||||||
|
__SPI2_FORCE_RESET();
|
||||||
|
__SPI2_RELEASE_RESET();
|
||||||
|
__SPI2_CLK_DISABLE();
|
||||||
|
}
|
||||||
|
|
||||||
|
if (obj->spi == SPI_3) {
|
||||||
|
__SPI3_FORCE_RESET();
|
||||||
|
__SPI3_RELEASE_RESET();
|
||||||
|
__SPI3_CLK_DISABLE();
|
||||||
|
}
|
||||||
|
|
||||||
|
// Configure GPIOs
|
||||||
|
pin_function(obj->pin_miso, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
|
||||||
|
pin_function(obj->pin_mosi, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
|
||||||
|
pin_function(obj->pin_sclk, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
|
||||||
|
pin_function(obj->pin_ssel, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
|
||||||
|
}
|
||||||
|
|
||||||
|
void spi_format(spi_t *obj, int bits, int mode, int slave) {
|
||||||
|
// Save new values
|
||||||
|
if (bits == 16) {
|
||||||
|
obj->bits = SPI_DATASIZE_16BIT;
|
||||||
|
} else {
|
||||||
|
obj->bits = SPI_DATASIZE_8BIT;
|
||||||
|
}
|
||||||
|
|
||||||
|
switch (mode) {
|
||||||
|
case 0:
|
||||||
|
obj->cpol = SPI_POLARITY_LOW;
|
||||||
|
obj->cpha = SPI_PHASE_1EDGE;
|
||||||
|
break;
|
||||||
|
case 1:
|
||||||
|
obj->cpol = SPI_POLARITY_LOW;
|
||||||
|
obj->cpha = SPI_PHASE_2EDGE;
|
||||||
|
break;
|
||||||
|
case 2:
|
||||||
|
obj->cpol = SPI_POLARITY_HIGH;
|
||||||
|
obj->cpha = SPI_PHASE_1EDGE;
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
obj->cpol = SPI_POLARITY_HIGH;
|
||||||
|
obj->cpha = SPI_PHASE_2EDGE;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (slave == 0) {
|
||||||
|
obj->mode = SPI_MODE_MASTER;
|
||||||
|
obj->nss = SPI_NSS_SOFT;
|
||||||
|
} else {
|
||||||
|
obj->mode = SPI_MODE_SLAVE;
|
||||||
|
obj->nss = SPI_NSS_HARD_INPUT;
|
||||||
|
}
|
||||||
|
|
||||||
|
init_spi(obj);
|
||||||
|
}
|
||||||
|
|
||||||
|
void spi_frequency(spi_t *obj, int hz) {
|
||||||
|
// Note: The frequencies are obtained with SPI1 clock = 48 MHz (APB2 clock)
|
||||||
|
if (obj->spi == SPI_1) {
|
||||||
|
if (hz < 375000) {
|
||||||
|
obj->br_presc = SPI_BAUDRATEPRESCALER_256; // 187.5 kHz
|
||||||
|
} else if ((hz >= 375000) && (hz < 750000)) {
|
||||||
|
obj->br_presc = SPI_BAUDRATEPRESCALER_128; // 375 kHz
|
||||||
|
} else if ((hz >= 750000) && (hz < 1500000)) {
|
||||||
|
obj->br_presc = SPI_BAUDRATEPRESCALER_64; // 0.75 MHz
|
||||||
|
} else if ((hz >= 1500000) && (hz < 3000000)) {
|
||||||
|
obj->br_presc = SPI_BAUDRATEPRESCALER_32; // 1.5 MHz
|
||||||
|
} else if ((hz >= 3000000) && (hz < 6000000)) {
|
||||||
|
obj->br_presc = SPI_BAUDRATEPRESCALER_16; // 3 MHz
|
||||||
|
} else if ((hz >= 6000000) && (hz < 12000000)) {
|
||||||
|
obj->br_presc = SPI_BAUDRATEPRESCALER_8; // 6 MHz
|
||||||
|
} else if ((hz >= 12000000) && (hz < 24000000)) {
|
||||||
|
obj->br_presc = SPI_BAUDRATEPRESCALER_4; // 12 MHz
|
||||||
|
} else { // >= 24000000
|
||||||
|
obj->br_presc = SPI_BAUDRATEPRESCALER_2; // 24 MHz
|
||||||
|
}
|
||||||
|
// Note: The frequencies are obtained with SPI2/3 clock = 48 MHz (APB1 clock)
|
||||||
|
} else if ((obj->spi == SPI_2) || (obj->spi == SPI_3)) {
|
||||||
|
if (hz < 375000) {
|
||||||
|
obj->br_presc = SPI_BAUDRATEPRESCALER_256; // 187.5 kHz
|
||||||
|
} else if ((hz >= 375000) && (hz < 750000)) {
|
||||||
|
obj->br_presc = SPI_BAUDRATEPRESCALER_128; // 375 kHz
|
||||||
|
} else if ((hz >= 750000) && (hz < 1500000)) {
|
||||||
|
obj->br_presc = SPI_BAUDRATEPRESCALER_64; // 0.75 MHz
|
||||||
|
} else if ((hz >= 1500000) && (hz < 3000000)) {
|
||||||
|
obj->br_presc = SPI_BAUDRATEPRESCALER_32; // 1.5 MHz
|
||||||
|
} else if ((hz >= 3000000) && (hz < 6000000)) {
|
||||||
|
obj->br_presc = SPI_BAUDRATEPRESCALER_16; // 3 MHz
|
||||||
|
} else if ((hz >= 6000000) && (hz < 12000000)) {
|
||||||
|
obj->br_presc = SPI_BAUDRATEPRESCALER_8; // 6 MHz
|
||||||
|
} else if ((hz >= 12000000) && (hz < 24000000)) {
|
||||||
|
obj->br_presc = SPI_BAUDRATEPRESCALER_4; // 12 MHz
|
||||||
|
} else { // >= 24000000
|
||||||
|
obj->br_presc = SPI_BAUDRATEPRESCALER_2; // 24 MHz
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
init_spi(obj);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline int ssp_readable(spi_t *obj) {
|
||||||
|
int status;
|
||||||
|
SpiHandle.Instance = (SPI_TypeDef *)(obj->spi);
|
||||||
|
// Check if data is received
|
||||||
|
status = ((__HAL_SPI_GET_FLAG(&SpiHandle, SPI_FLAG_RXNE) != RESET) ? 1 : 0);
|
||||||
|
return status;
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline int ssp_writeable(spi_t *obj) {
|
||||||
|
int status;
|
||||||
|
SpiHandle.Instance = (SPI_TypeDef *)(obj->spi);
|
||||||
|
// Check if data is transmitted
|
||||||
|
status = ((__HAL_SPI_GET_FLAG(&SpiHandle, SPI_FLAG_TXE) != RESET) ? 1 : 0);
|
||||||
|
return status;
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline void ssp_write(spi_t *obj, int value) {
|
||||||
|
SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi);
|
||||||
|
while (!ssp_writeable(obj));
|
||||||
|
spi->DR = (uint16_t)value;
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline int ssp_read(spi_t *obj) {
|
||||||
|
SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi);
|
||||||
|
while (!ssp_readable(obj));
|
||||||
|
return (int)spi->DR;
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline int ssp_busy(spi_t *obj) {
|
||||||
|
int status;
|
||||||
|
SpiHandle.Instance = (SPI_TypeDef *)(obj->spi);
|
||||||
|
status = ((__HAL_SPI_GET_FLAG(&SpiHandle, SPI_FLAG_BSY) != RESET) ? 1 : 0);
|
||||||
|
return status;
|
||||||
|
}
|
||||||
|
|
||||||
|
int spi_master_write(spi_t *obj, int value) {
|
||||||
|
ssp_write(obj, value);
|
||||||
|
return ssp_read(obj);
|
||||||
|
}
|
||||||
|
|
||||||
|
int spi_slave_receive(spi_t *obj) {
|
||||||
|
return ((ssp_readable(obj) && !ssp_busy(obj)) ? 1 : 0);
|
||||||
|
};
|
||||||
|
|
||||||
|
int spi_slave_read(spi_t *obj) {
|
||||||
|
SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi);
|
||||||
|
while (!ssp_readable(obj));
|
||||||
|
return (int)spi->DR;
|
||||||
|
}
|
||||||
|
|
||||||
|
void spi_slave_write(spi_t *obj, int value) {
|
||||||
|
SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi);
|
||||||
|
while (!ssp_writeable(obj));
|
||||||
|
spi->DR = (uint16_t)value;
|
||||||
|
}
|
||||||
|
|
||||||
|
int spi_busy(spi_t *obj) {
|
||||||
|
return ssp_busy(obj);
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,64 @@
|
||||||
|
/* mbed Microcontroller Library
|
||||||
|
* Copyright (c) 2014, STMicroelectronics
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*/
|
||||||
|
#include <stddef.h>
|
||||||
|
#include "us_ticker_api.h"
|
||||||
|
#include "PeripheralNames.h"
|
||||||
|
|
||||||
|
#define TIM_MST TIM5
|
||||||
|
|
||||||
|
static TIM_HandleTypeDef TimMasterHandle;
|
||||||
|
static int us_ticker_inited = 0;
|
||||||
|
|
||||||
|
void us_ticker_init(void) {
|
||||||
|
if (us_ticker_inited) return;
|
||||||
|
us_ticker_inited = 1;
|
||||||
|
|
||||||
|
TimMasterHandle.Instance = TIM_MST;
|
||||||
|
|
||||||
|
HAL_InitTick(0); // The passed value is not used
|
||||||
|
}
|
||||||
|
|
||||||
|
uint32_t us_ticker_read() {
|
||||||
|
if (!us_ticker_inited) us_ticker_init();
|
||||||
|
return TIM_MST->CNT;
|
||||||
|
}
|
||||||
|
|
||||||
|
void us_ticker_set_interrupt(timestamp_t timestamp) {
|
||||||
|
// Set new output compare value
|
||||||
|
__HAL_TIM_SetCompare(&TimMasterHandle, TIM_CHANNEL_1, (uint32_t)timestamp);
|
||||||
|
// Enable IT
|
||||||
|
__HAL_TIM_ENABLE_IT(&TimMasterHandle, TIM_IT_CC1);
|
||||||
|
}
|
||||||
|
|
||||||
|
void us_ticker_disable_interrupt(void) {
|
||||||
|
__HAL_TIM_DISABLE_IT(&TimMasterHandle, TIM_IT_CC1);
|
||||||
|
}
|
||||||
|
|
||||||
|
void us_ticker_clear_interrupt(void) {
|
||||||
|
__HAL_TIM_CLEAR_IT(&TimMasterHandle, TIM_IT_CC1);
|
||||||
|
}
|
||||||
|
|
@ -41,7 +41,8 @@ class IAREmbeddedWorkbench(Exporter):
|
||||||
'NUCLEO_F411RE',
|
'NUCLEO_F411RE',
|
||||||
'NUCLEO_L053R8',
|
'NUCLEO_L053R8',
|
||||||
'NUCLEO_L152RE',
|
'NUCLEO_L152RE',
|
||||||
'STM32F407'
|
'STM32F407',
|
||||||
|
'MTS_MDOT',
|
||||||
]
|
]
|
||||||
|
|
||||||
def generate(self):
|
def generate(self):
|
||||||
|
|
|
||||||
File diff suppressed because it is too large
Load Diff
|
|
@ -589,6 +589,15 @@ class DISCO_L053C8(Target):
|
||||||
self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"]
|
self.supported_toolchains = ["ARM", "uARM", "GCC_ARM"]
|
||||||
self.default_toolchain = "uARM"
|
self.default_toolchain = "uARM"
|
||||||
|
|
||||||
|
class MTS_MDOT(Target):
|
||||||
|
def __init__(self):
|
||||||
|
Target.__init__(self)
|
||||||
|
self.core = "Cortex-M4F"
|
||||||
|
self.extra_labels = ['STM', 'STM32F4', 'STM32F405RG']
|
||||||
|
self.supported_toolchains = ["IAR"]
|
||||||
|
self.is_disk_virtual = True
|
||||||
|
self.default_toolchain = "IAR"
|
||||||
|
|
||||||
|
|
||||||
### Nordic ###
|
### Nordic ###
|
||||||
|
|
||||||
|
|
@ -810,6 +819,7 @@ TARGETS = [
|
||||||
ARCH_MAX(), # STM32F407
|
ARCH_MAX(), # STM32F407
|
||||||
DISCO_F429ZI(),
|
DISCO_F429ZI(),
|
||||||
DISCO_L053C8(),
|
DISCO_L053C8(),
|
||||||
|
MTS_MDOT(),
|
||||||
|
|
||||||
### Nordic ###
|
### Nordic ###
|
||||||
NRF51822(),
|
NRF51822(),
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue