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CMSIS/RTX: Patch RTX includes to match mbed OS scheme

pull/5342/head
Bartek Szatkowski 2017-07-04 15:01:10 +01:00
parent d5933f198c
commit 5d6abd6572
9 changed files with 12 additions and 19 deletions
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3
cmsis/TARGET_CORTEX_A/irq_ctrl_gic.c
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@ -24,8 +24,7 @@
#include <stddef.h> #include <stddef.h>
#include "RTE_Components.h" #include <cmsis.h>
#include CMSIS_device_header
#include "irq_ctrl.h" #include "irq_ctrl.h"

4
rtos/TARGET_CORTEX/rtx5/RTX/Config/RTX_Config.h
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@ -27,7 +27,9 @@
#ifndef RTX_CONFIG_H_ #ifndef RTX_CONFIG_H_
#define RTX_CONFIG_H_ #define RTX_CONFIG_H_
#include "mbed_rtx_conf.h"
//-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- //-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
// <h>System Configuration // <h>System Configuration

3
rtos/TARGET_CORTEX/rtx5/RTX/Config/TARGET_CORTEX_A/handlers.c
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@ -22,9 +22,8 @@
* *
* ----------------------------------------------------------------------------- * -----------------------------------------------------------------------------
*/ */
#include "RTE_Components.h"
#include CMSIS_device_header
#include <cmsis.h>
//Fault Status Register (IFSR/DFSR) definitions //Fault Status Register (IFSR/DFSR) definitions
#define FSR_ALIGNMENT_FAULT 0x01 //DFSR only. Fault on first lookup #define FSR_ALIGNMENT_FAULT 0x01 //DFSR only. Fault on first lookup

3
rtos/TARGET_CORTEX/rtx5/RTX/Source/rtx_core_c.h
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@ -26,8 +26,7 @@
#ifndef RTX_CORE_C_H_ #ifndef RTX_CORE_C_H_
#define RTX_CORE_C_H_ #define RTX_CORE_C_H_
#include "RTE_Components.h" #include <cmsis.h>
#include CMSIS_device_header
#ifndef __ARM_ARCH_6M__ #ifndef __ARM_ARCH_6M__
#define __ARM_ARCH_6M__ 0U #define __ARM_ARCH_6M__ 0U

3
rtos/TARGET_CORTEX/rtx5/RTX/Source/rtx_core_ca.h
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@ -26,8 +26,7 @@
#ifndef RTX_CORE_CA_H_ #ifndef RTX_CORE_CA_H_
#define RTX_CORE_CA_H_ #define RTX_CORE_CA_H_
#include "RTE_Components.h" #include <cmsis.h>
#include CMSIS_device_header
#define __DOMAIN_NS 0U #define __DOMAIN_NS 0U
#define __EXCLUSIVE_ACCESS 1U #define __EXCLUSIVE_ACCESS 1U

3
rtos/TARGET_CORTEX/rtx5/RTX/Source/rtx_core_cm.h
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@ -26,8 +26,7 @@
#ifndef RTX_CORE_CM_H_ #ifndef RTX_CORE_CM_H_
#define RTX_CORE_CM_H_ #define RTX_CORE_CM_H_
#include "RTE_Components.h" #include <cmsis.h>
#include CMSIS_device_header
#ifdef RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS #ifdef RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS
#define __DOMAIN_NS 1U #define __DOMAIN_NS 1U

2
rtos/TARGET_CORTEX/rtx5/RTX/Source/rtx_evr.c
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@ -27,8 +27,6 @@
#include "cmsis_compiler.h" #include "cmsis_compiler.h"
#include "rtx_evr.h" // RTX Event Recorder definitions #include "rtx_evr.h" // RTX Event Recorder definitions
#include "RTE_Components.h"
#ifdef RTE_Compiler_EventRecorder #ifdef RTE_Compiler_EventRecorder
#include "EventRecorder.h" // Keil::Compiler:Event Recorder #include "EventRecorder.h" // Keil::Compiler:Event Recorder

3
rtos/TARGET_CORTEX/rtx5/Source/os_systick.c
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@ -24,8 +24,7 @@
#include "os_tick.h" #include "os_tick.h"
#include "RTE_Components.h" #include <cmsis.h>
#include CMSIS_device_header
#ifdef SysTick #ifdef SysTick

7
rtos/TARGET_CORTEX/rtx5/Source/os_tick_ptim.c
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@ -22,13 +22,12 @@
* limitations under the License. * limitations under the License.
*/ */
#if defined(PTIM)
#include "os_tick.h" #include "os_tick.h"
#include "irq_ctrl.h" #include "irq_ctrl.h"
#include "RTE_Components.h" #include <cmsis.h>
#include CMSIS_device_header
#if defined(PTIM)
#ifndef PTIM_IRQ_PRIORITY #ifndef PTIM_IRQ_PRIORITY
#define PTIM_IRQ_PRIORITY 0xFFU #define PTIM_IRQ_PRIORITY 0xFFU