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Merge pull request #9 from meriac/master 

Migrate existing uVisor patches
Marcus Shawcroft 2016-04-07 09:21:41 +01:00
parent f28588c3c2 6893401a05
commit 5a3416def2
54 changed files with 5424 additions and 4969 deletions
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1
core/uvisor-mbed-lib.lib Normal file
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@ -0,0 +1 @@
https://github.com/ARMmbed/uvisor-mbed-lib/#32b6df4

18
hal/common/retarget.cpp
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@ -469,8 +469,16 @@ extern "C" uint32_t __HeapLimit;
#undef errno
extern "C" int errno;
// For ARM7 only
register unsigned char * stack_ptr __asm ("sp");
// Stack pointer handling
#ifdef __ICCARM__
#define __current_sp() __get_SP()
#else
static inline unsigned int __current_sp(void)
{
register unsigned sp asm("sp");
return sp;
}
#endif /* __ICCARM__ */
// Dynamic memory allocation related syscall.
extern "C" caddr_t _sbrk(int incr) {
@ -478,12 +486,10 @@ extern "C" caddr_t _sbrk(int incr) {
unsigned char* prev_heap = heap;
unsigned char* new_heap = heap + incr;
#if defined(TARGET_ARM7)
if (new_heap >= stack_ptr) {
#elif defined(TARGET_CORTEX_A)
#if defined(TARGET_CORTEX_A)
if (new_heap >= (unsigned char*)&__HeapLimit) { /* __HeapLimit is end of heap section */
#else
if (new_heap >= (unsigned char*)__get_MSP()) {
if (new_heap >= (unsigned char*)__current_sp()) {
#endif
errno = ENOMEM;
return (caddr_t)-1;

87
hal/targets/cmsis/TARGET_Freescale/TARGET_MCU_K64F/TOOLCHAIN_GCC_ARM/K64FN1M0xxx12.ld
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@ -7,7 +7,7 @@ MEMORY
VECTORS (rx) : ORIGIN = 0x00000000, LENGTH = 0x00000400
FLASH_PROTECTION (rx) : ORIGIN = 0x00000400, LENGTH = 0x00000010
FLASH (rx) : ORIGIN = 0x00000410, LENGTH = 0x00100000 - 0x00000410
RAM (rwx) : ORIGIN = 0x1FFF0198, LENGTH = 0x00040000 - 0x00000198
RAM (rwx) : ORIGIN = 0x1FFF0200, LENGTH = 0x00040000 - 0x00000200
}
/* Linker script to place sections and symbol values. Should be used together
@ -55,8 +55,41 @@ SECTIONS
. = ALIGN(4);
} > FLASH_PROTECTION
/* Ensure that the uVisor .bss is the first section in the public SRAM. */
.uvisor.bss (NOLOAD):
{
. = ALIGN(32);
__uvisor_bss_start = .;
/* uVisor main .bss (protected) */
. = ALIGN(32);
__uvisor_bss_main_start = .;
KEEP(*(.keep.uvisor.bss.main))
. = ALIGN(32);
__uvisor_bss_main_end = .;
/* Secure boxes .bss (protected) */
. = ALIGN(32);
__uvisor_bss_boxes_start = .;
KEEP(*(.keep.uvisor.bss.boxes))
. = ALIGN(32);
__uvisor_bss_boxes_end = .;
. = ALIGN(32);
__uvisor_bss_end = .;
} > RAM
.text :
{
/* uVisor code and data */
/* Note: This is the location of the uVisor binary in flash. Make sure
* this position correspond to the FLASH_OFFSET set in the uVisor
* configuration. */
. = ALIGN(4);
__uvisor_main_start = .;
*(.uvisor.main)
__uvisor_main_end = .;
*(.text*)
KEEP(*(.init))
@ -93,10 +126,10 @@ SECTIONS
} > FLASH
__exidx_end = .;
__etext = .;
.data : AT (__etext)
.data :
{
PROVIDE( __etext = LOADADDR(.data) );
__data_start__ = .;
*(vtable)
*(.data*)
@ -126,6 +159,44 @@ SECTIONS
/* All data end */
__data_end__ = .;
} > RAM AT>FLASH
/* uVisor configuration data */
.uvisor.secure :
{
. = ALIGN(32);
__uvisor_secure_start = .;
/* Secure boxes configuration tables (protected) */
. = ALIGN(32);
__uvisor_cfgtbl_start = .;
KEEP(*(.keep.uvisor.cfgtbl))
. = ALIGN(32);
__uvisor_cfgtbl_end = .;
/* Pointers to the secure boxes configuration tables (protected) */
/* Note: Do not add any further alignment here, as we use this pointer
* table to enumerate boxes. */
__uvisor_cfgtbl_ptr_start = .;
KEEP(*(.keep.uvisor.cfgtbl_ptr_first))
KEEP(*(.keep.uvisor.cfgtbl_ptr))
__uvisor_cfgtbl_ptr_end = .;
. = ALIGN(32);
__uvisor_secure_end = .;
} >FLASH
/* Uninitialized memory section
* The C/C++ library initialization will not touch this section. Data
* written here will keep its value on reboots (assuming no power loss). */
.uninitialized (NOLOAD):
{
. = ALIGN(32);
__uninitialized_start = .;
*(.uninitialized)
KEEP(*(.keep.uninitialized))
. = ALIGN(32);
__uninitialized_end = .;
} > RAM
.bss :
@ -160,5 +231,13 @@ SECTIONS
/* Check if data + heap + stack exceeds RAM limit */
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
/* Provide physical memory boundaries for uVisor. */
__uvisor_flash_start = ORIGIN(VECTORS);
__uvisor_flash_offset = ORIGIN(FLASH);
__uvisor_flash_end = ORIGIN(FLASH) + LENGTH(FLASH);
__uvisor_sram_start = ORIGIN(RAM) - 0x200;
__uvisor_sram_offset = ORIGIN(RAM);
__uvisor_sram_end = ORIGIN(RAM) + LENGTH(RAM);
}

2
hal/targets/cmsis/TARGET_Freescale/TARGET_MCU_K64F/TOOLCHAIN_GCC_ARM/startup_MK64F12.S
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@ -229,6 +229,8 @@ disable_watchdog:
ldr r0, =SystemInit
blx r0
ldr r0, =uvisor_init
blx r0
ldr r0, =_start
bx r0
.pool

4
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/drivers/interrupt/fsl_interrupt_manager.h
View File

@ -89,7 +89,7 @@ static inline void INT_SYS_EnableIRQ(IRQn_Type irqNumber)
assert(irqNumber <= FSL_FEATURE_INTERRUPT_IRQ_MAX);
/* call core API to enable the IRQ*/
NVIC_EnableIRQ(irqNumber);
vIRQ_EnableIRQ(irqNumber);
}
/*!
@ -108,7 +108,7 @@ static inline void INT_SYS_DisableIRQ(IRQn_Type irqNumber)
assert(irqNumber <= FSL_FEATURE_INTERRUPT_IRQ_MAX);
/* call core API to disable the IRQ*/
NVIC_DisableIRQ(irqNumber);
vIRQ_DisableIRQ(irqNumber);
}
/*!

58
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/MK64F12/fsl_bitaccess.h
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@ -9,6 +9,9 @@
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** (C) COPYRIGHT 2015-2015 ARM Limited
** ALL RIGHTS RESERVED
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
@ -62,6 +65,10 @@
** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
** Update of SystemInit() and SystemCoreClockUpdate() functions.
** Module access macro module_BASES replaced by module_BASE_PTRS.
** - rev. 2.6 (2015-07-30) (ARM)
** Macros for bitband address calculation have been decoupled from the
** actual address de-referencing in BITBAND_ACCESSxx macros;
** Added fallback macros for default read/write operations
**
** ###################################################################
*/
@ -72,6 +79,51 @@
#include <stdint.h>
#include <stdlib.h>
#include "uvisor-lib/uvisor-lib.h"
/*
* Fallback macros for write/read operations
*/
#ifndef ADDRESS_READ
/* the conditional statement will be optimised away since the compiler already
* knows the sizeof(type) */
#define ADDRESS_READ(type, addr) \
(sizeof(type) == 4 ? *((volatile uint32_t *) (addr)) : \
sizeof(type) == 2 ? *((volatile uint16_t *) (addr)) : \
sizeof(type) == 1 ? *((volatile uint8_t *) (addr)) : 0)
#endif
#ifndef ADDRESS_WRITE
/* the switch statement will be optimised away since the compiler already knows
* the sizeof(type) */
#define ADDRESS_WRITE(type, addr, val) \
{ \
switch(sizeof(type)) \
{ \
case 4: \
*((volatile uint32_t *) (addr)) = (uint32_t) (val); \
break; \
case 2: \
*((volatile uint16_t *) (addr)) = (uint16_t) (val); \
break; \
case 1: \
*((volatile uint8_t *) (addr)) = (uint8_t ) (val); \
break; \
} \
}
#endif
#ifndef UNION_READ
#define UNION_READ(type, addr, fieldU, fieldB) ((*((volatile type *) (addr))).fieldB)
#endif
/*
* Macros to translate a pair of regular address and bit to their bit band alias
*/
#define BITBAND_ADDRESS(Reg,Bit) (0x42000000u + (32u*((uint32_t)(Reg) - (uint32_t)0x40000000u)) + (4u*((uint32_t)(Bit))))
#define BITBAND_ADDRESS32(Reg,Bit) ((uint32_t volatile*)BITBAND_ADDRESS(Reg,Bit))
#define BITBAND_ADDRESS16(Reg,Bit) ((uint16_t volatile*)BITBAND_ADDRESS(Reg,Bit))
#define BITBAND_ADDRESS8(Reg,Bit) ((uint8_t volatile*)BITBAND_ADDRESS(Reg,Bit))
/**
* @brief Macro to access a single bit of a 32-bit peripheral register (bit band region
@ -80,7 +132,7 @@
* @param Bit Bit number to access.
* @return Value of the targeted bit in the bit band region.
*/
#define BITBAND_ACCESS32(Reg,Bit) (*((uint32_t volatile*)(0x42000000u + (32u*((uint32_t)(Reg) - (uint32_t)0x40000000u)) + (4u*((uint32_t)(Bit))))))
#define BITBAND_ACCESS32(Reg,Bit) (*BITBAND_ADDRESS32(Reg,Bit))
/**
* @brief Macro to access a single bit of a 16-bit peripheral register (bit band region
@ -89,7 +141,7 @@
* @param Bit Bit number to access.
* @return Value of the targeted bit in the bit band region.
*/
#define BITBAND_ACCESS16(Reg,Bit) (*((uint16_t volatile*)(0x42000000u + (32u*((uint32_t)(Reg) - (uint32_t)0x40000000u)) + (4u*((uint32_t)(Bit))))))
#define BITBAND_ACCESS16(Reg,Bit) (*BITBAND_ADDRESS16(Reg,Bit))
/**
* @brief Macro to access a single bit of an 8-bit peripheral register (bit band region
@ -98,7 +150,7 @@
* @param Bit Bit number to access.
* @return Value of the targeted bit in the bit band region.
*/
#define BITBAND_ACCESS8(Reg,Bit) (*((uint8_t volatile*)(0x42000000u + (32u*((uint32_t)(Reg) - (uint32_t)0x40000000u)) + (4u*((uint32_t)(Bit))))))
#define BITBAND_ACCESS8(Reg,Bit) (*BITBAND_ADDRESS8(Reg,Bit))
/*
* Macros for single instance registers

225
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_adc.h
View File

@ -15,6 +15,9 @@
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** (C) COPYRIGHT 2015-2015 ARM Limited
** ALL RIGHTS RESERVED
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
@ -68,6 +71,10 @@
** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
** Update of SystemInit() and SystemCoreClockUpdate() functions.
** Module access macro module_BASES replaced by module_BASE_PTRS.
** - rev. 2.6 (2015-08-03) (ARM)
** All accesses to memory are replaced by equivalent macros; this allows
** memory read/write operations to be re-defined if needed (for example,
** to implement new security features
**
** ###################################################################
*/
@ -171,8 +178,8 @@ typedef union _hw_adc_sc1n
#define HW_ADC_SC1n_ADDR(x, n) ((x) + 0x0U + (0x4U * (n)))
#define HW_ADC_SC1n(x, n) (*(__IO hw_adc_sc1n_t *) HW_ADC_SC1n_ADDR(x, n))
#define HW_ADC_SC1n_RD(x, n) (HW_ADC_SC1n(x, n).U)
#define HW_ADC_SC1n_WR(x, n, v) (HW_ADC_SC1n(x, n).U = (v))
#define HW_ADC_SC1n_RD(x, n) (ADDRESS_READ(hw_adc_sc1n_t, HW_ADC_SC1n_ADDR(x, n)))
#define HW_ADC_SC1n_WR(x, n, v) (ADDRESS_WRITE(hw_adc_sc1n_t, HW_ADC_SC1n_ADDR(x, n), v))
#define HW_ADC_SC1n_SET(x, n, v) (HW_ADC_SC1n_WR(x, n, HW_ADC_SC1n_RD(x, n) | (v)))
#define HW_ADC_SC1n_CLR(x, n, v) (HW_ADC_SC1n_WR(x, n, HW_ADC_SC1n_RD(x, n) & ~(v)))
#define HW_ADC_SC1n_TOG(x, n, v) (HW_ADC_SC1n_WR(x, n, HW_ADC_SC1n_RD(x, n) ^ (v)))
@ -247,7 +254,7 @@ typedef union _hw_adc_sc1n
#define BS_ADC_SC1n_ADCH (5U) /*!< Bit field size in bits for ADC_SC1n_ADCH. */
/*! @brief Read current value of the ADC_SC1n_ADCH field. */
#define BR_ADC_SC1n_ADCH(x, n) (HW_ADC_SC1n(x, n).B.ADCH)
#define BR_ADC_SC1n_ADCH(x, n) (UNION_READ(hw_adc_sc1n_t, HW_ADC_SC1n_ADDR(x, n), U, B.ADCH))
/*! @brief Format value for bitfield ADC_SC1n_ADCH. */
#define BF_ADC_SC1n_ADCH(v) ((uint32_t)((uint32_t)(v) << BP_ADC_SC1n_ADCH) & BM_ADC_SC1n_ADCH)
@ -273,13 +280,13 @@ typedef union _hw_adc_sc1n
#define BS_ADC_SC1n_DIFF (1U) /*!< Bit field size in bits for ADC_SC1n_DIFF. */
/*! @brief Read current value of the ADC_SC1n_DIFF field. */
#define BR_ADC_SC1n_DIFF(x, n) (BITBAND_ACCESS32(HW_ADC_SC1n_ADDR(x, n), BP_ADC_SC1n_DIFF))
#define BR_ADC_SC1n_DIFF(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC1n_ADDR(x, n), BP_ADC_SC1n_DIFF)))
/*! @brief Format value for bitfield ADC_SC1n_DIFF. */
#define BF_ADC_SC1n_DIFF(v) ((uint32_t)((uint32_t)(v) << BP_ADC_SC1n_DIFF) & BM_ADC_SC1n_DIFF)
/*! @brief Set the DIFF field to a new value. */
#define BW_ADC_SC1n_DIFF(x, n, v) (BITBAND_ACCESS32(HW_ADC_SC1n_ADDR(x, n), BP_ADC_SC1n_DIFF) = (v))
#define BW_ADC_SC1n_DIFF(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC1n_ADDR(x, n), BP_ADC_SC1n_DIFF), v))
/*@}*/
/*!
@ -298,13 +305,13 @@ typedef union _hw_adc_sc1n
#define BS_ADC_SC1n_AIEN (1U) /*!< Bit field size in bits for ADC_SC1n_AIEN. */
/*! @brief Read current value of the ADC_SC1n_AIEN field. */
#define BR_ADC_SC1n_AIEN(x, n) (BITBAND_ACCESS32(HW_ADC_SC1n_ADDR(x, n), BP_ADC_SC1n_AIEN))
#define BR_ADC_SC1n_AIEN(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC1n_ADDR(x, n), BP_ADC_SC1n_AIEN)))
/*! @brief Format value for bitfield ADC_SC1n_AIEN. */
#define BF_ADC_SC1n_AIEN(v) ((uint32_t)((uint32_t)(v) << BP_ADC_SC1n_AIEN) & BM_ADC_SC1n_AIEN)
/*! @brief Set the AIEN field to a new value. */
#define BW_ADC_SC1n_AIEN(x, n, v) (BITBAND_ACCESS32(HW_ADC_SC1n_ADDR(x, n), BP_ADC_SC1n_AIEN) = (v))
#define BW_ADC_SC1n_AIEN(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC1n_ADDR(x, n), BP_ADC_SC1n_AIEN), v))
/*@}*/
/*!
@ -330,7 +337,7 @@ typedef union _hw_adc_sc1n
#define BS_ADC_SC1n_COCO (1U) /*!< Bit field size in bits for ADC_SC1n_COCO. */
/*! @brief Read current value of the ADC_SC1n_COCO field. */
#define BR_ADC_SC1n_COCO(x, n) (BITBAND_ACCESS32(HW_ADC_SC1n_ADDR(x, n), BP_ADC_SC1n_COCO))
#define BR_ADC_SC1n_COCO(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC1n_ADDR(x, n), BP_ADC_SC1n_COCO)))
/*@}*/
/*******************************************************************************
@ -366,8 +373,8 @@ typedef union _hw_adc_cfg1
#define HW_ADC_CFG1_ADDR(x) ((x) + 0x8U)
#define HW_ADC_CFG1(x) (*(__IO hw_adc_cfg1_t *) HW_ADC_CFG1_ADDR(x))
#define HW_ADC_CFG1_RD(x) (HW_ADC_CFG1(x).U)
#define HW_ADC_CFG1_WR(x, v) (HW_ADC_CFG1(x).U = (v))
#define HW_ADC_CFG1_RD(x) (ADDRESS_READ(hw_adc_cfg1_t, HW_ADC_CFG1_ADDR(x)))
#define HW_ADC_CFG1_WR(x, v) (ADDRESS_WRITE(hw_adc_cfg1_t, HW_ADC_CFG1_ADDR(x), v))
#define HW_ADC_CFG1_SET(x, v) (HW_ADC_CFG1_WR(x, HW_ADC_CFG1_RD(x) | (v)))
#define HW_ADC_CFG1_CLR(x, v) (HW_ADC_CFG1_WR(x, HW_ADC_CFG1_RD(x) & ~(v)))
#define HW_ADC_CFG1_TOG(x, v) (HW_ADC_CFG1_WR(x, HW_ADC_CFG1_RD(x) ^ (v)))
@ -400,7 +407,7 @@ typedef union _hw_adc_cfg1
#define BS_ADC_CFG1_ADICLK (2U) /*!< Bit field size in bits for ADC_CFG1_ADICLK. */
/*! @brief Read current value of the ADC_CFG1_ADICLK field. */
#define BR_ADC_CFG1_ADICLK(x) (HW_ADC_CFG1(x).B.ADICLK)
#define BR_ADC_CFG1_ADICLK(x) (UNION_READ(hw_adc_cfg1_t, HW_ADC_CFG1_ADDR(x), U, B.ADICLK))
/*! @brief Format value for bitfield ADC_CFG1_ADICLK. */
#define BF_ADC_CFG1_ADICLK(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CFG1_ADICLK) & BM_ADC_CFG1_ADICLK)
@ -430,7 +437,7 @@ typedef union _hw_adc_cfg1
#define BS_ADC_CFG1_MODE (2U) /*!< Bit field size in bits for ADC_CFG1_MODE. */
/*! @brief Read current value of the ADC_CFG1_MODE field. */
#define BR_ADC_CFG1_MODE(x) (HW_ADC_CFG1(x).B.MODE)
#define BR_ADC_CFG1_MODE(x) (UNION_READ(hw_adc_cfg1_t, HW_ADC_CFG1_ADDR(x), U, B.MODE))
/*! @brief Format value for bitfield ADC_CFG1_MODE. */
#define BF_ADC_CFG1_MODE(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CFG1_MODE) & BM_ADC_CFG1_MODE)
@ -460,13 +467,13 @@ typedef union _hw_adc_cfg1
#define BS_ADC_CFG1_ADLSMP (1U) /*!< Bit field size in bits for ADC_CFG1_ADLSMP. */
/*! @brief Read current value of the ADC_CFG1_ADLSMP field. */
#define BR_ADC_CFG1_ADLSMP(x) (BITBAND_ACCESS32(HW_ADC_CFG1_ADDR(x), BP_ADC_CFG1_ADLSMP))
#define BR_ADC_CFG1_ADLSMP(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ADC_CFG1_ADDR(x), BP_ADC_CFG1_ADLSMP)))
/*! @brief Format value for bitfield ADC_CFG1_ADLSMP. */
#define BF_ADC_CFG1_ADLSMP(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CFG1_ADLSMP) & BM_ADC_CFG1_ADLSMP)
/*! @brief Set the ADLSMP field to a new value. */
#define BW_ADC_CFG1_ADLSMP(x, v) (BITBAND_ACCESS32(HW_ADC_CFG1_ADDR(x), BP_ADC_CFG1_ADLSMP) = (v))
#define BW_ADC_CFG1_ADLSMP(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ADC_CFG1_ADDR(x), BP_ADC_CFG1_ADLSMP), v))
/*@}*/
/*!
@ -486,7 +493,7 @@ typedef union _hw_adc_cfg1
#define BS_ADC_CFG1_ADIV (2U) /*!< Bit field size in bits for ADC_CFG1_ADIV. */
/*! @brief Read current value of the ADC_CFG1_ADIV field. */
#define BR_ADC_CFG1_ADIV(x) (HW_ADC_CFG1(x).B.ADIV)
#define BR_ADC_CFG1_ADIV(x) (UNION_READ(hw_adc_cfg1_t, HW_ADC_CFG1_ADDR(x), U, B.ADIV))
/*! @brief Format value for bitfield ADC_CFG1_ADIV. */
#define BF_ADC_CFG1_ADIV(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CFG1_ADIV) & BM_ADC_CFG1_ADIV)
@ -512,13 +519,13 @@ typedef union _hw_adc_cfg1
#define BS_ADC_CFG1_ADLPC (1U) /*!< Bit field size in bits for ADC_CFG1_ADLPC. */
/*! @brief Read current value of the ADC_CFG1_ADLPC field. */
#define BR_ADC_CFG1_ADLPC(x) (BITBAND_ACCESS32(HW_ADC_CFG1_ADDR(x), BP_ADC_CFG1_ADLPC))
#define BR_ADC_CFG1_ADLPC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ADC_CFG1_ADDR(x), BP_ADC_CFG1_ADLPC)))
/*! @brief Format value for bitfield ADC_CFG1_ADLPC. */
#define BF_ADC_CFG1_ADLPC(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CFG1_ADLPC) & BM_ADC_CFG1_ADLPC)
/*! @brief Set the ADLPC field to a new value. */
#define BW_ADC_CFG1_ADLPC(x, v) (BITBAND_ACCESS32(HW_ADC_CFG1_ADDR(x), BP_ADC_CFG1_ADLPC) = (v))
#define BW_ADC_CFG1_ADLPC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ADC_CFG1_ADDR(x), BP_ADC_CFG1_ADLPC), v))
/*@}*/
/*******************************************************************************
@ -554,8 +561,8 @@ typedef union _hw_adc_cfg2
#define HW_ADC_CFG2_ADDR(x) ((x) + 0xCU)
#define HW_ADC_CFG2(x) (*(__IO hw_adc_cfg2_t *) HW_ADC_CFG2_ADDR(x))
#define HW_ADC_CFG2_RD(x) (HW_ADC_CFG2(x).U)
#define HW_ADC_CFG2_WR(x, v) (HW_ADC_CFG2(x).U = (v))
#define HW_ADC_CFG2_RD(x) (ADDRESS_READ(hw_adc_cfg2_t, HW_ADC_CFG2_ADDR(x)))
#define HW_ADC_CFG2_WR(x, v) (ADDRESS_WRITE(hw_adc_cfg2_t, HW_ADC_CFG2_ADDR(x), v))
#define HW_ADC_CFG2_SET(x, v) (HW_ADC_CFG2_WR(x, HW_ADC_CFG2_RD(x) | (v)))
#define HW_ADC_CFG2_CLR(x, v) (HW_ADC_CFG2_WR(x, HW_ADC_CFG2_RD(x) & ~(v)))
#define HW_ADC_CFG2_TOG(x, v) (HW_ADC_CFG2_WR(x, HW_ADC_CFG2_RD(x) ^ (v)))
@ -587,7 +594,7 @@ typedef union _hw_adc_cfg2
#define BS_ADC_CFG2_ADLSTS (2U) /*!< Bit field size in bits for ADC_CFG2_ADLSTS. */
/*! @brief Read current value of the ADC_CFG2_ADLSTS field. */
#define BR_ADC_CFG2_ADLSTS(x) (HW_ADC_CFG2(x).B.ADLSTS)
#define BR_ADC_CFG2_ADLSTS(x) (UNION_READ(hw_adc_cfg2_t, HW_ADC_CFG2_ADDR(x), U, B.ADLSTS))
/*! @brief Format value for bitfield ADC_CFG2_ADLSTS. */
#define BF_ADC_CFG2_ADLSTS(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CFG2_ADLSTS) & BM_ADC_CFG2_ADLSTS)
@ -614,13 +621,13 @@ typedef union _hw_adc_cfg2
#define BS_ADC_CFG2_ADHSC (1U) /*!< Bit field size in bits for ADC_CFG2_ADHSC. */
/*! @brief Read current value of the ADC_CFG2_ADHSC field. */
#define BR_ADC_CFG2_ADHSC(x) (BITBAND_ACCESS32(HW_ADC_CFG2_ADDR(x), BP_ADC_CFG2_ADHSC))
#define BR_ADC_CFG2_ADHSC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ADC_CFG2_ADDR(x), BP_ADC_CFG2_ADHSC)))
/*! @brief Format value for bitfield ADC_CFG2_ADHSC. */
#define BF_ADC_CFG2_ADHSC(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CFG2_ADHSC) & BM_ADC_CFG2_ADHSC)
/*! @brief Set the ADHSC field to a new value. */
#define BW_ADC_CFG2_ADHSC(x, v) (BITBAND_ACCESS32(HW_ADC_CFG2_ADDR(x), BP_ADC_CFG2_ADHSC) = (v))
#define BW_ADC_CFG2_ADHSC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ADC_CFG2_ADDR(x), BP_ADC_CFG2_ADHSC), v))
/*@}*/
/*!
@ -646,13 +653,13 @@ typedef union _hw_adc_cfg2
#define BS_ADC_CFG2_ADACKEN (1U) /*!< Bit field size in bits for ADC_CFG2_ADACKEN. */
/*! @brief Read current value of the ADC_CFG2_ADACKEN field. */
#define BR_ADC_CFG2_ADACKEN(x) (BITBAND_ACCESS32(HW_ADC_CFG2_ADDR(x), BP_ADC_CFG2_ADACKEN))
#define BR_ADC_CFG2_ADACKEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ADC_CFG2_ADDR(x), BP_ADC_CFG2_ADACKEN)))
/*! @brief Format value for bitfield ADC_CFG2_ADACKEN. */
#define BF_ADC_CFG2_ADACKEN(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CFG2_ADACKEN) & BM_ADC_CFG2_ADACKEN)
/*! @brief Set the ADACKEN field to a new value. */
#define BW_ADC_CFG2_ADACKEN(x, v) (BITBAND_ACCESS32(HW_ADC_CFG2_ADDR(x), BP_ADC_CFG2_ADACKEN) = (v))
#define BW_ADC_CFG2_ADACKEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ADC_CFG2_ADDR(x), BP_ADC_CFG2_ADACKEN), v))
/*@}*/
/*!
@ -670,13 +677,13 @@ typedef union _hw_adc_cfg2
#define BS_ADC_CFG2_MUXSEL (1U) /*!< Bit field size in bits for ADC_CFG2_MUXSEL. */
/*! @brief Read current value of the ADC_CFG2_MUXSEL field. */
#define BR_ADC_CFG2_MUXSEL(x) (BITBAND_ACCESS32(HW_ADC_CFG2_ADDR(x), BP_ADC_CFG2_MUXSEL))
#define BR_ADC_CFG2_MUXSEL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ADC_CFG2_ADDR(x), BP_ADC_CFG2_MUXSEL)))
/*! @brief Format value for bitfield ADC_CFG2_MUXSEL. */
#define BF_ADC_CFG2_MUXSEL(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CFG2_MUXSEL) & BM_ADC_CFG2_MUXSEL)
/*! @brief Set the MUXSEL field to a new value. */
#define BW_ADC_CFG2_MUXSEL(x, v) (BITBAND_ACCESS32(HW_ADC_CFG2_ADDR(x), BP_ADC_CFG2_MUXSEL) = (v))
#define BW_ADC_CFG2_MUXSEL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ADC_CFG2_ADDR(x), BP_ADC_CFG2_MUXSEL), v))
/*@}*/
/*******************************************************************************
@ -728,7 +735,7 @@ typedef union _hw_adc_rn
#define HW_ADC_Rn_ADDR(x, n) ((x) + 0x10U + (0x4U * (n)))
#define HW_ADC_Rn(x, n) (*(__I hw_adc_rn_t *) HW_ADC_Rn_ADDR(x, n))
#define HW_ADC_Rn_RD(x, n) (HW_ADC_Rn(x, n).U)
#define HW_ADC_Rn_RD(x, n) (ADDRESS_READ(hw_adc_rn_t, HW_ADC_Rn_ADDR(x, n)))
/*@}*/
/*
@ -744,7 +751,7 @@ typedef union _hw_adc_rn
#define BS_ADC_Rn_D (16U) /*!< Bit field size in bits for ADC_Rn_D. */
/*! @brief Read current value of the ADC_Rn_D field. */
#define BR_ADC_Rn_D(x, n) (HW_ADC_Rn(x, n).B.D)
#define BR_ADC_Rn_D(x, n) (UNION_READ(hw_adc_rn_t, HW_ADC_Rn_ADDR(x, n), U, B.D))
/*@}*/
/*******************************************************************************
@ -782,8 +789,8 @@ typedef union _hw_adc_cv1
#define HW_ADC_CV1_ADDR(x) ((x) + 0x18U)
#define HW_ADC_CV1(x) (*(__IO hw_adc_cv1_t *) HW_ADC_CV1_ADDR(x))
#define HW_ADC_CV1_RD(x) (HW_ADC_CV1(x).U)
#define HW_ADC_CV1_WR(x, v) (HW_ADC_CV1(x).U = (v))
#define HW_ADC_CV1_RD(x) (ADDRESS_READ(hw_adc_cv1_t, HW_ADC_CV1_ADDR(x)))
#define HW_ADC_CV1_WR(x, v) (ADDRESS_WRITE(hw_adc_cv1_t, HW_ADC_CV1_ADDR(x), v))
#define HW_ADC_CV1_SET(x, v) (HW_ADC_CV1_WR(x, HW_ADC_CV1_RD(x) | (v)))
#define HW_ADC_CV1_CLR(x, v) (HW_ADC_CV1_WR(x, HW_ADC_CV1_RD(x) & ~(v)))
#define HW_ADC_CV1_TOG(x, v) (HW_ADC_CV1_WR(x, HW_ADC_CV1_RD(x) ^ (v)))
@ -802,7 +809,7 @@ typedef union _hw_adc_cv1
#define BS_ADC_CV1_CV (16U) /*!< Bit field size in bits for ADC_CV1_CV. */
/*! @brief Read current value of the ADC_CV1_CV field. */
#define BR_ADC_CV1_CV(x) (HW_ADC_CV1(x).B.CV)
#define BR_ADC_CV1_CV(x) (UNION_READ(hw_adc_cv1_t, HW_ADC_CV1_ADDR(x), U, B.CV))
/*! @brief Format value for bitfield ADC_CV1_CV. */
#define BF_ADC_CV1_CV(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CV1_CV) & BM_ADC_CV1_CV)
@ -846,8 +853,8 @@ typedef union _hw_adc_cv2
#define HW_ADC_CV2_ADDR(x) ((x) + 0x1CU)
#define HW_ADC_CV2(x) (*(__IO hw_adc_cv2_t *) HW_ADC_CV2_ADDR(x))
#define HW_ADC_CV2_RD(x) (HW_ADC_CV2(x).U)
#define HW_ADC_CV2_WR(x, v) (HW_ADC_CV2(x).U = (v))
#define HW_ADC_CV2_RD(x) (ADDRESS_READ(hw_adc_cv2_t, HW_ADC_CV2_ADDR(x)))
#define HW_ADC_CV2_WR(x, v) (ADDRESS_WRITE(hw_adc_cv2_t, HW_ADC_CV2_ADDR(x), v))
#define HW_ADC_CV2_SET(x, v) (HW_ADC_CV2_WR(x, HW_ADC_CV2_RD(x) | (v)))
#define HW_ADC_CV2_CLR(x, v) (HW_ADC_CV2_WR(x, HW_ADC_CV2_RD(x) & ~(v)))
#define HW_ADC_CV2_TOG(x, v) (HW_ADC_CV2_WR(x, HW_ADC_CV2_RD(x) ^ (v)))
@ -866,7 +873,7 @@ typedef union _hw_adc_cv2
#define BS_ADC_CV2_CV (16U) /*!< Bit field size in bits for ADC_CV2_CV. */
/*! @brief Read current value of the ADC_CV2_CV field. */
#define BR_ADC_CV2_CV(x) (HW_ADC_CV2(x).B.CV)
#define BR_ADC_CV2_CV(x) (UNION_READ(hw_adc_cv2_t, HW_ADC_CV2_ADDR(x), U, B.CV))
/*! @brief Format value for bitfield ADC_CV2_CV. */
#define BF_ADC_CV2_CV(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CV2_CV) & BM_ADC_CV2_CV)
@ -911,8 +918,8 @@ typedef union _hw_adc_sc2
#define HW_ADC_SC2_ADDR(x) ((x) + 0x20U)
#define HW_ADC_SC2(x) (*(__IO hw_adc_sc2_t *) HW_ADC_SC2_ADDR(x))
#define HW_ADC_SC2_RD(x) (HW_ADC_SC2(x).U)
#define HW_ADC_SC2_WR(x, v) (HW_ADC_SC2(x).U = (v))
#define HW_ADC_SC2_RD(x) (ADDRESS_READ(hw_adc_sc2_t, HW_ADC_SC2_ADDR(x)))
#define HW_ADC_SC2_WR(x, v) (ADDRESS_WRITE(hw_adc_sc2_t, HW_ADC_SC2_ADDR(x), v))
#define HW_ADC_SC2_SET(x, v) (HW_ADC_SC2_WR(x, HW_ADC_SC2_RD(x) | (v)))
#define HW_ADC_SC2_CLR(x, v) (HW_ADC_SC2_WR(x, HW_ADC_SC2_RD(x) & ~(v)))
#define HW_ADC_SC2_TOG(x, v) (HW_ADC_SC2_WR(x, HW_ADC_SC2_RD(x) ^ (v)))
@ -943,7 +950,7 @@ typedef union _hw_adc_sc2
#define BS_ADC_SC2_REFSEL (2U) /*!< Bit field size in bits for ADC_SC2_REFSEL. */
/*! @brief Read current value of the ADC_SC2_REFSEL field. */
#define BR_ADC_SC2_REFSEL(x) (HW_ADC_SC2(x).B.REFSEL)
#define BR_ADC_SC2_REFSEL(x) (UNION_READ(hw_adc_sc2_t, HW_ADC_SC2_ADDR(x), U, B.REFSEL))
/*! @brief Format value for bitfield ADC_SC2_REFSEL. */
#define BF_ADC_SC2_REFSEL(v) ((uint32_t)((uint32_t)(v) << BP_ADC_SC2_REFSEL) & BM_ADC_SC2_REFSEL)
@ -966,13 +973,13 @@ typedef union _hw_adc_sc2
#define BS_ADC_SC2_DMAEN (1U) /*!< Bit field size in bits for ADC_SC2_DMAEN. */
/*! @brief Read current value of the ADC_SC2_DMAEN field. */
#define BR_ADC_SC2_DMAEN(x) (BITBAND_ACCESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_DMAEN))
#define BR_ADC_SC2_DMAEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_DMAEN)))
/*! @brief Format value for bitfield ADC_SC2_DMAEN. */
#define BF_ADC_SC2_DMAEN(v) ((uint32_t)((uint32_t)(v) << BP_ADC_SC2_DMAEN) & BM_ADC_SC2_DMAEN)
/*! @brief Set the DMAEN field to a new value. */
#define BW_ADC_SC2_DMAEN(x, v) (BITBAND_ACCESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_DMAEN) = (v))
#define BW_ADC_SC2_DMAEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_DMAEN), v))
/*@}*/
/*!
@ -993,13 +1000,13 @@ typedef union _hw_adc_sc2
#define BS_ADC_SC2_ACREN (1U) /*!< Bit field size in bits for ADC_SC2_ACREN. */
/*! @brief Read current value of the ADC_SC2_ACREN field. */
#define BR_ADC_SC2_ACREN(x) (BITBAND_ACCESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_ACREN))
#define BR_ADC_SC2_ACREN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_ACREN)))
/*! @brief Format value for bitfield ADC_SC2_ACREN. */
#define BF_ADC_SC2_ACREN(v) ((uint32_t)((uint32_t)(v) << BP_ADC_SC2_ACREN) & BM_ADC_SC2_ACREN)
/*! @brief Set the ACREN field to a new value. */
#define BW_ADC_SC2_ACREN(x, v) (BITBAND_ACCESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_ACREN) = (v))
#define BW_ADC_SC2_ACREN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_ACREN), v))
/*@}*/
/*!
@ -1022,13 +1029,13 @@ typedef union _hw_adc_sc2
#define BS_ADC_SC2_ACFGT (1U) /*!< Bit field size in bits for ADC_SC2_ACFGT. */
/*! @brief Read current value of the ADC_SC2_ACFGT field. */
#define BR_ADC_SC2_ACFGT(x) (BITBAND_ACCESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_ACFGT))
#define BR_ADC_SC2_ACFGT(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_ACFGT)))
/*! @brief Format value for bitfield ADC_SC2_ACFGT. */
#define BF_ADC_SC2_ACFGT(v) ((uint32_t)((uint32_t)(v) << BP_ADC_SC2_ACFGT) & BM_ADC_SC2_ACFGT)
/*! @brief Set the ACFGT field to a new value. */
#define BW_ADC_SC2_ACFGT(x, v) (BITBAND_ACCESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_ACFGT) = (v))
#define BW_ADC_SC2_ACFGT(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_ACFGT), v))
/*@}*/
/*!
@ -1046,13 +1053,13 @@ typedef union _hw_adc_sc2
#define BS_ADC_SC2_ACFE (1U) /*!< Bit field size in bits for ADC_SC2_ACFE. */
/*! @brief Read current value of the ADC_SC2_ACFE field. */
#define BR_ADC_SC2_ACFE(x) (BITBAND_ACCESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_ACFE))
#define BR_ADC_SC2_ACFE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_ACFE)))
/*! @brief Format value for bitfield ADC_SC2_ACFE. */
#define BF_ADC_SC2_ACFE(v) ((uint32_t)((uint32_t)(v) << BP_ADC_SC2_ACFE) & BM_ADC_SC2_ACFE)
/*! @brief Set the ACFE field to a new value. */
#define BW_ADC_SC2_ACFE(x, v) (BITBAND_ACCESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_ACFE) = (v))
#define BW_ADC_SC2_ACFE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_ACFE), v))
/*@}*/
/*!
@ -1074,13 +1081,13 @@ typedef union _hw_adc_sc2
#define BS_ADC_SC2_ADTRG (1U) /*!< Bit field size in bits for ADC_SC2_ADTRG. */
/*! @brief Read current value of the ADC_SC2_ADTRG field. */
#define BR_ADC_SC2_ADTRG(x) (BITBAND_ACCESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_ADTRG))
#define BR_ADC_SC2_ADTRG(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_ADTRG)))
/*! @brief Format value for bitfield ADC_SC2_ADTRG. */
#define BF_ADC_SC2_ADTRG(v) ((uint32_t)((uint32_t)(v) << BP_ADC_SC2_ADTRG) & BM_ADC_SC2_ADTRG)
/*! @brief Set the ADTRG field to a new value. */
#define BW_ADC_SC2_ADTRG(x, v) (BITBAND_ACCESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_ADTRG) = (v))
#define BW_ADC_SC2_ADTRG(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_ADTRG), v))
/*@}*/
/*!
@ -1100,7 +1107,7 @@ typedef union _hw_adc_sc2
#define BS_ADC_SC2_ADACT (1U) /*!< Bit field size in bits for ADC_SC2_ADACT. */
/*! @brief Read current value of the ADC_SC2_ADACT field. */
#define BR_ADC_SC2_ADACT(x) (BITBAND_ACCESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_ADACT))
#define BR_ADC_SC2_ADACT(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC2_ADDR(x), BP_ADC_SC2_ADACT)))
/*@}*/
/*******************************************************************************
@ -1137,8 +1144,8 @@ typedef union _hw_adc_sc3
#define HW_ADC_SC3_ADDR(x) ((x) + 0x24U)
#define HW_ADC_SC3(x) (*(__IO hw_adc_sc3_t *) HW_ADC_SC3_ADDR(x))
#define HW_ADC_SC3_RD(x) (HW_ADC_SC3(x).U)
#define HW_ADC_SC3_WR(x, v) (HW_ADC_SC3(x).U = (v))
#define HW_ADC_SC3_RD(x) (ADDRESS_READ(hw_adc_sc3_t, HW_ADC_SC3_ADDR(x)))
#define HW_ADC_SC3_WR(x, v) (ADDRESS_WRITE(hw_adc_sc3_t, HW_ADC_SC3_ADDR(x), v))
#define HW_ADC_SC3_SET(x, v) (HW_ADC_SC3_WR(x, HW_ADC_SC3_RD(x) | (v)))
#define HW_ADC_SC3_CLR(x, v) (HW_ADC_SC3_WR(x, HW_ADC_SC3_RD(x) & ~(v)))
#define HW_ADC_SC3_TOG(x, v) (HW_ADC_SC3_WR(x, HW_ADC_SC3_RD(x) ^ (v)))
@ -1166,7 +1173,7 @@ typedef union _hw_adc_sc3
#define BS_ADC_SC3_AVGS (2U) /*!< Bit field size in bits for ADC_SC3_AVGS. */
/*! @brief Read current value of the ADC_SC3_AVGS field. */
#define BR_ADC_SC3_AVGS(x) (HW_ADC_SC3(x).B.AVGS)
#define BR_ADC_SC3_AVGS(x) (UNION_READ(hw_adc_sc3_t, HW_ADC_SC3_ADDR(x), U, B.AVGS))
/*! @brief Format value for bitfield ADC_SC3_AVGS. */
#define BF_ADC_SC3_AVGS(v) ((uint32_t)((uint32_t)(v) << BP_ADC_SC3_AVGS) & BM_ADC_SC3_AVGS)
@ -1190,13 +1197,13 @@ typedef union _hw_adc_sc3
#define BS_ADC_SC3_AVGE (1U) /*!< Bit field size in bits for ADC_SC3_AVGE. */
/*! @brief Read current value of the ADC_SC3_AVGE field. */
#define BR_ADC_SC3_AVGE(x) (BITBAND_ACCESS32(HW_ADC_SC3_ADDR(x), BP_ADC_SC3_AVGE))
#define BR_ADC_SC3_AVGE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC3_ADDR(x), BP_ADC_SC3_AVGE)))
/*! @brief Format value for bitfield ADC_SC3_AVGE. */
#define BF_ADC_SC3_AVGE(v) ((uint32_t)((uint32_t)(v) << BP_ADC_SC3_AVGE) & BM_ADC_SC3_AVGE)
/*! @brief Set the AVGE field to a new value. */
#define BW_ADC_SC3_AVGE(x, v) (BITBAND_ACCESS32(HW_ADC_SC3_ADDR(x), BP_ADC_SC3_AVGE) = (v))
#define BW_ADC_SC3_AVGE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC3_ADDR(x), BP_ADC_SC3_AVGE), v))
/*@}*/
/*!
@ -1216,13 +1223,13 @@ typedef union _hw_adc_sc3
#define BS_ADC_SC3_ADCO (1U) /*!< Bit field size in bits for ADC_SC3_ADCO. */
/*! @brief Read current value of the ADC_SC3_ADCO field. */
#define BR_ADC_SC3_ADCO(x) (BITBAND_ACCESS32(HW_ADC_SC3_ADDR(x), BP_ADC_SC3_ADCO))
#define BR_ADC_SC3_ADCO(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC3_ADDR(x), BP_ADC_SC3_ADCO)))
/*! @brief Format value for bitfield ADC_SC3_ADCO. */
#define BF_ADC_SC3_ADCO(v) ((uint32_t)((uint32_t)(v) << BP_ADC_SC3_ADCO) & BM_ADC_SC3_ADCO)
/*! @brief Set the ADCO field to a new value. */
#define BW_ADC_SC3_ADCO(x, v) (BITBAND_ACCESS32(HW_ADC_SC3_ADDR(x), BP_ADC_SC3_ADCO) = (v))
#define BW_ADC_SC3_ADCO(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC3_ADDR(x), BP_ADC_SC3_ADCO), v))
/*@}*/
/*!
@ -1242,7 +1249,7 @@ typedef union _hw_adc_sc3
#define BS_ADC_SC3_CALF (1U) /*!< Bit field size in bits for ADC_SC3_CALF. */
/*! @brief Read current value of the ADC_SC3_CALF field. */
#define BR_ADC_SC3_CALF(x) (BITBAND_ACCESS32(HW_ADC_SC3_ADDR(x), BP_ADC_SC3_CALF))
#define BR_ADC_SC3_CALF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC3_ADDR(x), BP_ADC_SC3_CALF)))
/*@}*/
/*!
@ -1261,13 +1268,13 @@ typedef union _hw_adc_sc3
#define BS_ADC_SC3_CAL (1U) /*!< Bit field size in bits for ADC_SC3_CAL. */
/*! @brief Read current value of the ADC_SC3_CAL field. */
#define BR_ADC_SC3_CAL(x) (BITBAND_ACCESS32(HW_ADC_SC3_ADDR(x), BP_ADC_SC3_CAL))
#define BR_ADC_SC3_CAL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC3_ADDR(x), BP_ADC_SC3_CAL)))
/*! @brief Format value for bitfield ADC_SC3_CAL. */
#define BF_ADC_SC3_CAL(v) ((uint32_t)((uint32_t)(v) << BP_ADC_SC3_CAL) & BM_ADC_SC3_CAL)
/*! @brief Set the CAL field to a new value. */
#define BW_ADC_SC3_CAL(x, v) (BITBAND_ACCESS32(HW_ADC_SC3_ADDR(x), BP_ADC_SC3_CAL) = (v))
#define BW_ADC_SC3_CAL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_ADC_SC3_ADDR(x), BP_ADC_SC3_CAL), v))
/*@}*/
/*******************************************************************************
@ -1303,8 +1310,8 @@ typedef union _hw_adc_ofs
#define HW_ADC_OFS_ADDR(x) ((x) + 0x28U)
#define HW_ADC_OFS(x) (*(__IO hw_adc_ofs_t *) HW_ADC_OFS_ADDR(x))
#define HW_ADC_OFS_RD(x) (HW_ADC_OFS(x).U)
#define HW_ADC_OFS_WR(x, v) (HW_ADC_OFS(x).U = (v))
#define HW_ADC_OFS_RD(x) (ADDRESS_READ(hw_adc_ofs_t, HW_ADC_OFS_ADDR(x)))
#define HW_ADC_OFS_WR(x, v) (ADDRESS_WRITE(hw_adc_ofs_t, HW_ADC_OFS_ADDR(x), v))
#define HW_ADC_OFS_SET(x, v) (HW_ADC_OFS_WR(x, HW_ADC_OFS_RD(x) | (v)))
#define HW_ADC_OFS_CLR(x, v) (HW_ADC_OFS_WR(x, HW_ADC_OFS_RD(x) & ~(v)))
#define HW_ADC_OFS_TOG(x, v) (HW_ADC_OFS_WR(x, HW_ADC_OFS_RD(x) ^ (v)))
@ -1323,7 +1330,7 @@ typedef union _hw_adc_ofs
#define BS_ADC_OFS_OFS (16U) /*!< Bit field size in bits for ADC_OFS_OFS. */
/*! @brief Read current value of the ADC_OFS_OFS field. */
#define BR_ADC_OFS_OFS(x) (HW_ADC_OFS(x).B.OFS)
#define BR_ADC_OFS_OFS(x) (UNION_READ(hw_adc_ofs_t, HW_ADC_OFS_ADDR(x), U, B.OFS))
/*! @brief Format value for bitfield ADC_OFS_OFS. */
#define BF_ADC_OFS_OFS(v) ((uint32_t)((uint32_t)(v) << BP_ADC_OFS_OFS) & BM_ADC_OFS_OFS)
@ -1365,8 +1372,8 @@ typedef union _hw_adc_pg
#define HW_ADC_PG_ADDR(x) ((x) + 0x2CU)
#define HW_ADC_PG(x) (*(__IO hw_adc_pg_t *) HW_ADC_PG_ADDR(x))
#define HW_ADC_PG_RD(x) (HW_ADC_PG(x).U)
#define HW_ADC_PG_WR(x, v) (HW_ADC_PG(x).U = (v))
#define HW_ADC_PG_RD(x) (ADDRESS_READ(hw_adc_pg_t, HW_ADC_PG_ADDR(x)))
#define HW_ADC_PG_WR(x, v) (ADDRESS_WRITE(hw_adc_pg_t, HW_ADC_PG_ADDR(x), v))
#define HW_ADC_PG_SET(x, v) (HW_ADC_PG_WR(x, HW_ADC_PG_RD(x) | (v)))
#define HW_ADC_PG_CLR(x, v) (HW_ADC_PG_WR(x, HW_ADC_PG_RD(x) & ~(v)))
#define HW_ADC_PG_TOG(x, v) (HW_ADC_PG_WR(x, HW_ADC_PG_RD(x) ^ (v)))
@ -1385,7 +1392,7 @@ typedef union _hw_adc_pg
#define BS_ADC_PG_PG (16U) /*!< Bit field size in bits for ADC_PG_PG. */
/*! @brief Read current value of the ADC_PG_PG field. */
#define BR_ADC_PG_PG(x) (HW_ADC_PG(x).B.PG)
#define BR_ADC_PG_PG(x) (UNION_READ(hw_adc_pg_t, HW_ADC_PG_ADDR(x), U, B.PG))
/*! @brief Format value for bitfield ADC_PG_PG. */
#define BF_ADC_PG_PG(v) ((uint32_t)((uint32_t)(v) << BP_ADC_PG_PG) & BM_ADC_PG_PG)
@ -1427,8 +1434,8 @@ typedef union _hw_adc_mg
#define HW_ADC_MG_ADDR(x) ((x) + 0x30U)
#define HW_ADC_MG(x) (*(__IO hw_adc_mg_t *) HW_ADC_MG_ADDR(x))
#define HW_ADC_MG_RD(x) (HW_ADC_MG(x).U)
#define HW_ADC_MG_WR(x, v) (HW_ADC_MG(x).U = (v))
#define HW_ADC_MG_RD(x) (ADDRESS_READ(hw_adc_mg_t, HW_ADC_MG_ADDR(x)))
#define HW_ADC_MG_WR(x, v) (ADDRESS_WRITE(hw_adc_mg_t, HW_ADC_MG_ADDR(x), v))
#define HW_ADC_MG_SET(x, v) (HW_ADC_MG_WR(x, HW_ADC_MG_RD(x) | (v)))
#define HW_ADC_MG_CLR(x, v) (HW_ADC_MG_WR(x, HW_ADC_MG_RD(x) & ~(v)))
#define HW_ADC_MG_TOG(x, v) (HW_ADC_MG_WR(x, HW_ADC_MG_RD(x) ^ (v)))
@ -1447,7 +1454,7 @@ typedef union _hw_adc_mg
#define BS_ADC_MG_MG (16U) /*!< Bit field size in bits for ADC_MG_MG. */
/*! @brief Read current value of the ADC_MG_MG field. */
#define BR_ADC_MG_MG(x) (HW_ADC_MG(x).B.MG)
#define BR_ADC_MG_MG(x) (UNION_READ(hw_adc_mg_t, HW_ADC_MG_ADDR(x), U, B.MG))
/*! @brief Format value for bitfield ADC_MG_MG. */
#define BF_ADC_MG_MG(v) ((uint32_t)((uint32_t)(v) << BP_ADC_MG_MG) & BM_ADC_MG_MG)
@ -1490,8 +1497,8 @@ typedef union _hw_adc_clpd
#define HW_ADC_CLPD_ADDR(x) ((x) + 0x34U)
#define HW_ADC_CLPD(x) (*(__IO hw_adc_clpd_t *) HW_ADC_CLPD_ADDR(x))
#define HW_ADC_CLPD_RD(x) (HW_ADC_CLPD(x).U)
#define HW_ADC_CLPD_WR(x, v) (HW_ADC_CLPD(x).U = (v))
#define HW_ADC_CLPD_RD(x) (ADDRESS_READ(hw_adc_clpd_t, HW_ADC_CLPD_ADDR(x)))
#define HW_ADC_CLPD_WR(x, v) (ADDRESS_WRITE(hw_adc_clpd_t, HW_ADC_CLPD_ADDR(x), v))
#define HW_ADC_CLPD_SET(x, v) (HW_ADC_CLPD_WR(x, HW_ADC_CLPD_RD(x) | (v)))
#define HW_ADC_CLPD_CLR(x, v) (HW_ADC_CLPD_WR(x, HW_ADC_CLPD_RD(x) & ~(v)))
#define HW_ADC_CLPD_TOG(x, v) (HW_ADC_CLPD_WR(x, HW_ADC_CLPD_RD(x) ^ (v)))
@ -1512,7 +1519,7 @@ typedef union _hw_adc_clpd
#define BS_ADC_CLPD_CLPD (6U) /*!< Bit field size in bits for ADC_CLPD_CLPD. */
/*! @brief Read current value of the ADC_CLPD_CLPD field. */
#define BR_ADC_CLPD_CLPD(x) (HW_ADC_CLPD(x).B.CLPD)
#define BR_ADC_CLPD_CLPD(x) (UNION_READ(hw_adc_clpd_t, HW_ADC_CLPD_ADDR(x), U, B.CLPD))
/*! @brief Format value for bitfield ADC_CLPD_CLPD. */
#define BF_ADC_CLPD_CLPD(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CLPD_CLPD) & BM_ADC_CLPD_CLPD)
@ -1549,8 +1556,8 @@ typedef union _hw_adc_clps
#define HW_ADC_CLPS_ADDR(x) ((x) + 0x38U)
#define HW_ADC_CLPS(x) (*(__IO hw_adc_clps_t *) HW_ADC_CLPS_ADDR(x))
#define HW_ADC_CLPS_RD(x) (HW_ADC_CLPS(x).U)
#define HW_ADC_CLPS_WR(x, v) (HW_ADC_CLPS(x).U = (v))
#define HW_ADC_CLPS_RD(x) (ADDRESS_READ(hw_adc_clps_t, HW_ADC_CLPS_ADDR(x)))
#define HW_ADC_CLPS_WR(x, v) (ADDRESS_WRITE(hw_adc_clps_t, HW_ADC_CLPS_ADDR(x), v))
#define HW_ADC_CLPS_SET(x, v) (HW_ADC_CLPS_WR(x, HW_ADC_CLPS_RD(x) | (v)))
#define HW_ADC_CLPS_CLR(x, v) (HW_ADC_CLPS_WR(x, HW_ADC_CLPS_RD(x) & ~(v)))
#define HW_ADC_CLPS_TOG(x, v) (HW_ADC_CLPS_WR(x, HW_ADC_CLPS_RD(x) ^ (v)))
@ -1571,7 +1578,7 @@ typedef union _hw_adc_clps
#define BS_ADC_CLPS_CLPS (6U) /*!< Bit field size in bits for ADC_CLPS_CLPS. */
/*! @brief Read current value of the ADC_CLPS_CLPS field. */
#define BR_ADC_CLPS_CLPS(x) (HW_ADC_CLPS(x).B.CLPS)
#define BR_ADC_CLPS_CLPS(x) (UNION_READ(hw_adc_clps_t, HW_ADC_CLPS_ADDR(x), U, B.CLPS))
/*! @brief Format value for bitfield ADC_CLPS_CLPS. */
#define BF_ADC_CLPS_CLPS(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CLPS_CLPS) & BM_ADC_CLPS_CLPS)
@ -1608,8 +1615,8 @@ typedef union _hw_adc_clp4
#define HW_ADC_CLP4_ADDR(x) ((x) + 0x3CU)
#define HW_ADC_CLP4(x) (*(__IO hw_adc_clp4_t *) HW_ADC_CLP4_ADDR(x))
#define HW_ADC_CLP4_RD(x) (HW_ADC_CLP4(x).U)
#define HW_ADC_CLP4_WR(x, v) (HW_ADC_CLP4(x).U = (v))
#define HW_ADC_CLP4_RD(x) (ADDRESS_READ(hw_adc_clp4_t, HW_ADC_CLP4_ADDR(x)))
#define HW_ADC_CLP4_WR(x, v) (ADDRESS_WRITE(hw_adc_clp4_t, HW_ADC_CLP4_ADDR(x), v))
#define HW_ADC_CLP4_SET(x, v) (HW_ADC_CLP4_WR(x, HW_ADC_CLP4_RD(x) | (v)))
#define HW_ADC_CLP4_CLR(x, v) (HW_ADC_CLP4_WR(x, HW_ADC_CLP4_RD(x) & ~(v)))
#define HW_ADC_CLP4_TOG(x, v) (HW_ADC_CLP4_WR(x, HW_ADC_CLP4_RD(x) ^ (v)))
@ -1630,7 +1637,7 @@ typedef union _hw_adc_clp4
#define BS_ADC_CLP4_CLP4 (10U) /*!< Bit field size in bits for ADC_CLP4_CLP4. */
/*! @brief Read current value of the ADC_CLP4_CLP4 field. */
#define BR_ADC_CLP4_CLP4(x) (HW_ADC_CLP4(x).B.CLP4)
#define BR_ADC_CLP4_CLP4(x) (UNION_READ(hw_adc_clp4_t, HW_ADC_CLP4_ADDR(x), U, B.CLP4))
/*! @brief Format value for bitfield ADC_CLP4_CLP4. */
#define BF_ADC_CLP4_CLP4(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CLP4_CLP4) & BM_ADC_CLP4_CLP4)
@ -1667,8 +1674,8 @@ typedef union _hw_adc_clp3
#define HW_ADC_CLP3_ADDR(x) ((x) + 0x40U)
#define HW_ADC_CLP3(x) (*(__IO hw_adc_clp3_t *) HW_ADC_CLP3_ADDR(x))
#define HW_ADC_CLP3_RD(x) (HW_ADC_CLP3(x).U)
#define HW_ADC_CLP3_WR(x, v) (HW_ADC_CLP3(x).U = (v))
#define HW_ADC_CLP3_RD(x) (ADDRESS_READ(hw_adc_clp3_t, HW_ADC_CLP3_ADDR(x)))
#define HW_ADC_CLP3_WR(x, v) (ADDRESS_WRITE(hw_adc_clp3_t, HW_ADC_CLP3_ADDR(x), v))
#define HW_ADC_CLP3_SET(x, v) (HW_ADC_CLP3_WR(x, HW_ADC_CLP3_RD(x) | (v)))
#define HW_ADC_CLP3_CLR(x, v) (HW_ADC_CLP3_WR(x, HW_ADC_CLP3_RD(x) & ~(v)))
#define HW_ADC_CLP3_TOG(x, v) (HW_ADC_CLP3_WR(x, HW_ADC_CLP3_RD(x) ^ (v)))
@ -1689,7 +1696,7 @@ typedef union _hw_adc_clp3
#define BS_ADC_CLP3_CLP3 (9U) /*!< Bit field size in bits for ADC_CLP3_CLP3. */
/*! @brief Read current value of the ADC_CLP3_CLP3 field. */
#define BR_ADC_CLP3_CLP3(x) (HW_ADC_CLP3(x).B.CLP3)
#define BR_ADC_CLP3_CLP3(x) (UNION_READ(hw_adc_clp3_t, HW_ADC_CLP3_ADDR(x), U, B.CLP3))
/*! @brief Format value for bitfield ADC_CLP3_CLP3. */
#define BF_ADC_CLP3_CLP3(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CLP3_CLP3) & BM_ADC_CLP3_CLP3)
@ -1726,8 +1733,8 @@ typedef union _hw_adc_clp2
#define HW_ADC_CLP2_ADDR(x) ((x) + 0x44U)
#define HW_ADC_CLP2(x) (*(__IO hw_adc_clp2_t *) HW_ADC_CLP2_ADDR(x))
#define HW_ADC_CLP2_RD(x) (HW_ADC_CLP2(x).U)
#define HW_ADC_CLP2_WR(x, v) (HW_ADC_CLP2(x).U = (v))
#define HW_ADC_CLP2_RD(x) (ADDRESS_READ(hw_adc_clp2_t, HW_ADC_CLP2_ADDR(x)))
#define HW_ADC_CLP2_WR(x, v) (ADDRESS_WRITE(hw_adc_clp2_t, HW_ADC_CLP2_ADDR(x), v))
#define HW_ADC_CLP2_SET(x, v) (HW_ADC_CLP2_WR(x, HW_ADC_CLP2_RD(x) | (v)))
#define HW_ADC_CLP2_CLR(x, v) (HW_ADC_CLP2_WR(x, HW_ADC_CLP2_RD(x) & ~(v)))
#define HW_ADC_CLP2_TOG(x, v) (HW_ADC_CLP2_WR(x, HW_ADC_CLP2_RD(x) ^ (v)))
@ -1748,7 +1755,7 @@ typedef union _hw_adc_clp2
#define BS_ADC_CLP2_CLP2 (8U) /*!< Bit field size in bits for ADC_CLP2_CLP2. */
/*! @brief Read current value of the ADC_CLP2_CLP2 field. */
#define BR_ADC_CLP2_CLP2(x) (HW_ADC_CLP2(x).B.CLP2)
#define BR_ADC_CLP2_CLP2(x) (UNION_READ(hw_adc_clp2_t, HW_ADC_CLP2_ADDR(x), U, B.CLP2))
/*! @brief Format value for bitfield ADC_CLP2_CLP2. */
#define BF_ADC_CLP2_CLP2(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CLP2_CLP2) & BM_ADC_CLP2_CLP2)
@ -1785,8 +1792,8 @@ typedef union _hw_adc_clp1
#define HW_ADC_CLP1_ADDR(x) ((x) + 0x48U)
#define HW_ADC_CLP1(x) (*(__IO hw_adc_clp1_t *) HW_ADC_CLP1_ADDR(x))
#define HW_ADC_CLP1_RD(x) (HW_ADC_CLP1(x).U)
#define HW_ADC_CLP1_WR(x, v) (HW_ADC_CLP1(x).U = (v))
#define HW_ADC_CLP1_RD(x) (ADDRESS_READ(hw_adc_clp1_t, HW_ADC_CLP1_ADDR(x)))
#define HW_ADC_CLP1_WR(x, v) (ADDRESS_WRITE(hw_adc_clp1_t, HW_ADC_CLP1_ADDR(x), v))
#define HW_ADC_CLP1_SET(x, v) (HW_ADC_CLP1_WR(x, HW_ADC_CLP1_RD(x) | (v)))
#define HW_ADC_CLP1_CLR(x, v) (HW_ADC_CLP1_WR(x, HW_ADC_CLP1_RD(x) & ~(v)))
#define HW_ADC_CLP1_TOG(x, v) (HW_ADC_CLP1_WR(x, HW_ADC_CLP1_RD(x) ^ (v)))
@ -1807,7 +1814,7 @@ typedef union _hw_adc_clp1
#define BS_ADC_CLP1_CLP1 (7U) /*!< Bit field size in bits for ADC_CLP1_CLP1. */
/*! @brief Read current value of the ADC_CLP1_CLP1 field. */
#define BR_ADC_CLP1_CLP1(x) (HW_ADC_CLP1(x).B.CLP1)
#define BR_ADC_CLP1_CLP1(x) (UNION_READ(hw_adc_clp1_t, HW_ADC_CLP1_ADDR(x), U, B.CLP1))
/*! @brief Format value for bitfield ADC_CLP1_CLP1. */
#define BF_ADC_CLP1_CLP1(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CLP1_CLP1) & BM_ADC_CLP1_CLP1)
@ -1844,8 +1851,8 @@ typedef union _hw_adc_clp0
#define HW_ADC_CLP0_ADDR(x) ((x) + 0x4CU)
#define HW_ADC_CLP0(x) (*(__IO hw_adc_clp0_t *) HW_ADC_CLP0_ADDR(x))
#define HW_ADC_CLP0_RD(x) (HW_ADC_CLP0(x).U)
#define HW_ADC_CLP0_WR(x, v) (HW_ADC_CLP0(x).U = (v))
#define HW_ADC_CLP0_RD(x) (ADDRESS_READ(hw_adc_clp0_t, HW_ADC_CLP0_ADDR(x)))
#define HW_ADC_CLP0_WR(x, v) (ADDRESS_WRITE(hw_adc_clp0_t, HW_ADC_CLP0_ADDR(x), v))
#define HW_ADC_CLP0_SET(x, v) (HW_ADC_CLP0_WR(x, HW_ADC_CLP0_RD(x) | (v)))
#define HW_ADC_CLP0_CLR(x, v) (HW_ADC_CLP0_WR(x, HW_ADC_CLP0_RD(x) & ~(v)))
#define HW_ADC_CLP0_TOG(x, v) (HW_ADC_CLP0_WR(x, HW_ADC_CLP0_RD(x) ^ (v)))
@ -1866,7 +1873,7 @@ typedef union _hw_adc_clp0
#define BS_ADC_CLP0_CLP0 (6U) /*!< Bit field size in bits for ADC_CLP0_CLP0. */
/*! @brief Read current value of the ADC_CLP0_CLP0 field. */
#define BR_ADC_CLP0_CLP0(x) (HW_ADC_CLP0(x).B.CLP0)
#define BR_ADC_CLP0_CLP0(x) (UNION_READ(hw_adc_clp0_t, HW_ADC_CLP0_ADDR(x), U, B.CLP0))
/*! @brief Format value for bitfield ADC_CLP0_CLP0. */
#define BF_ADC_CLP0_CLP0(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CLP0_CLP0) & BM_ADC_CLP0_CLP0)
@ -1909,8 +1916,8 @@ typedef union _hw_adc_clmd
#define HW_ADC_CLMD_ADDR(x) ((x) + 0x54U)
#define HW_ADC_CLMD(x) (*(__IO hw_adc_clmd_t *) HW_ADC_CLMD_ADDR(x))
#define HW_ADC_CLMD_RD(x) (HW_ADC_CLMD(x).U)
#define HW_ADC_CLMD_WR(x, v) (HW_ADC_CLMD(x).U = (v))
#define HW_ADC_CLMD_RD(x) (ADDRESS_READ(hw_adc_clmd_t, HW_ADC_CLMD_ADDR(x)))
#define HW_ADC_CLMD_WR(x, v) (ADDRESS_WRITE(hw_adc_clmd_t, HW_ADC_CLMD_ADDR(x), v))
#define HW_ADC_CLMD_SET(x, v) (HW_ADC_CLMD_WR(x, HW_ADC_CLMD_RD(x) | (v)))
#define HW_ADC_CLMD_CLR(x, v) (HW_ADC_CLMD_WR(x, HW_ADC_CLMD_RD(x) & ~(v)))
#define HW_ADC_CLMD_TOG(x, v) (HW_ADC_CLMD_WR(x, HW_ADC_CLMD_RD(x) ^ (v)))
@ -1931,7 +1938,7 @@ typedef union _hw_adc_clmd
#define BS_ADC_CLMD_CLMD (6U) /*!< Bit field size in bits for ADC_CLMD_CLMD. */
/*! @brief Read current value of the ADC_CLMD_CLMD field. */
#define BR_ADC_CLMD_CLMD(x) (HW_ADC_CLMD(x).B.CLMD)
#define BR_ADC_CLMD_CLMD(x) (UNION_READ(hw_adc_clmd_t, HW_ADC_CLMD_ADDR(x), U, B.CLMD))
/*! @brief Format value for bitfield ADC_CLMD_CLMD. */
#define BF_ADC_CLMD_CLMD(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CLMD_CLMD) & BM_ADC_CLMD_CLMD)
@ -1968,8 +1975,8 @@ typedef union _hw_adc_clms
#define HW_ADC_CLMS_ADDR(x) ((x) + 0x58U)
#define HW_ADC_CLMS(x) (*(__IO hw_adc_clms_t *) HW_ADC_CLMS_ADDR(x))
#define HW_ADC_CLMS_RD(x) (HW_ADC_CLMS(x).U)
#define HW_ADC_CLMS_WR(x, v) (HW_ADC_CLMS(x).U = (v))
#define HW_ADC_CLMS_RD(x) (ADDRESS_READ(hw_adc_clms_t, HW_ADC_CLMS_ADDR(x)))
#define HW_ADC_CLMS_WR(x, v) (ADDRESS_WRITE(hw_adc_clms_t, HW_ADC_CLMS_ADDR(x), v))
#define HW_ADC_CLMS_SET(x, v) (HW_ADC_CLMS_WR(x, HW_ADC_CLMS_RD(x) | (v)))
#define HW_ADC_CLMS_CLR(x, v) (HW_ADC_CLMS_WR(x, HW_ADC_CLMS_RD(x) & ~(v)))
#define HW_ADC_CLMS_TOG(x, v) (HW_ADC_CLMS_WR(x, HW_ADC_CLMS_RD(x) ^ (v)))
@ -1990,7 +1997,7 @@ typedef union _hw_adc_clms
#define BS_ADC_CLMS_CLMS (6U) /*!< Bit field size in bits for ADC_CLMS_CLMS. */
/*! @brief Read current value of the ADC_CLMS_CLMS field. */
#define BR_ADC_CLMS_CLMS(x) (HW_ADC_CLMS(x).B.CLMS)
#define BR_ADC_CLMS_CLMS(x) (UNION_READ(hw_adc_clms_t, HW_ADC_CLMS_ADDR(x), U, B.CLMS))
/*! @brief Format value for bitfield ADC_CLMS_CLMS. */
#define BF_ADC_CLMS_CLMS(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CLMS_CLMS) & BM_ADC_CLMS_CLMS)
@ -2027,8 +2034,8 @@ typedef union _hw_adc_clm4
#define HW_ADC_CLM4_ADDR(x) ((x) + 0x5CU)
#define HW_ADC_CLM4(x) (*(__IO hw_adc_clm4_t *) HW_ADC_CLM4_ADDR(x))
#define HW_ADC_CLM4_RD(x) (HW_ADC_CLM4(x).U)
#define HW_ADC_CLM4_WR(x, v) (HW_ADC_CLM4(x).U = (v))
#define HW_ADC_CLM4_RD(x) (ADDRESS_READ(hw_adc_clm4_t, HW_ADC_CLM4_ADDR(x)))
#define HW_ADC_CLM4_WR(x, v) (ADDRESS_WRITE(hw_adc_clm4_t, HW_ADC_CLM4_ADDR(x), v))
#define HW_ADC_CLM4_SET(x, v) (HW_ADC_CLM4_WR(x, HW_ADC_CLM4_RD(x) | (v)))
#define HW_ADC_CLM4_CLR(x, v) (HW_ADC_CLM4_WR(x, HW_ADC_CLM4_RD(x) & ~(v)))
#define HW_ADC_CLM4_TOG(x, v) (HW_ADC_CLM4_WR(x, HW_ADC_CLM4_RD(x) ^ (v)))
@ -2049,7 +2056,7 @@ typedef union _hw_adc_clm4
#define BS_ADC_CLM4_CLM4 (10U) /*!< Bit field size in bits for ADC_CLM4_CLM4. */
/*! @brief Read current value of the ADC_CLM4_CLM4 field. */
#define BR_ADC_CLM4_CLM4(x) (HW_ADC_CLM4(x).B.CLM4)
#define BR_ADC_CLM4_CLM4(x) (UNION_READ(hw_adc_clm4_t, HW_ADC_CLM4_ADDR(x), U, B.CLM4))
/*! @brief Format value for bitfield ADC_CLM4_CLM4. */
#define BF_ADC_CLM4_CLM4(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CLM4_CLM4) & BM_ADC_CLM4_CLM4)
@ -2086,8 +2093,8 @@ typedef union _hw_adc_clm3
#define HW_ADC_CLM3_ADDR(x) ((x) + 0x60U)
#define HW_ADC_CLM3(x) (*(__IO hw_adc_clm3_t *) HW_ADC_CLM3_ADDR(x))
#define HW_ADC_CLM3_RD(x) (HW_ADC_CLM3(x).U)
#define HW_ADC_CLM3_WR(x, v) (HW_ADC_CLM3(x).U = (v))
#define HW_ADC_CLM3_RD(x) (ADDRESS_READ(hw_adc_clm3_t, HW_ADC_CLM3_ADDR(x)))
#define HW_ADC_CLM3_WR(x, v) (ADDRESS_WRITE(hw_adc_clm3_t, HW_ADC_CLM3_ADDR(x), v))
#define HW_ADC_CLM3_SET(x, v) (HW_ADC_CLM3_WR(x, HW_ADC_CLM3_RD(x) | (v)))
#define HW_ADC_CLM3_CLR(x, v) (HW_ADC_CLM3_WR(x, HW_ADC_CLM3_RD(x) & ~(v)))
#define HW_ADC_CLM3_TOG(x, v) (HW_ADC_CLM3_WR(x, HW_ADC_CLM3_RD(x) ^ (v)))
@ -2108,7 +2115,7 @@ typedef union _hw_adc_clm3
#define BS_ADC_CLM3_CLM3 (9U) /*!< Bit field size in bits for ADC_CLM3_CLM3. */
/*! @brief Read current value of the ADC_CLM3_CLM3 field. */
#define BR_ADC_CLM3_CLM3(x) (HW_ADC_CLM3(x).B.CLM3)
#define BR_ADC_CLM3_CLM3(x) (UNION_READ(hw_adc_clm3_t, HW_ADC_CLM3_ADDR(x), U, B.CLM3))
/*! @brief Format value for bitfield ADC_CLM3_CLM3. */
#define BF_ADC_CLM3_CLM3(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CLM3_CLM3) & BM_ADC_CLM3_CLM3)
@ -2145,8 +2152,8 @@ typedef union _hw_adc_clm2
#define HW_ADC_CLM2_ADDR(x) ((x) + 0x64U)
#define HW_ADC_CLM2(x) (*(__IO hw_adc_clm2_t *) HW_ADC_CLM2_ADDR(x))
#define HW_ADC_CLM2_RD(x) (HW_ADC_CLM2(x).U)
#define HW_ADC_CLM2_WR(x, v) (HW_ADC_CLM2(x).U = (v))
#define HW_ADC_CLM2_RD(x) (ADDRESS_READ(hw_adc_clm2_t, HW_ADC_CLM2_ADDR(x)))
#define HW_ADC_CLM2_WR(x, v) (ADDRESS_WRITE(hw_adc_clm2_t, HW_ADC_CLM2_ADDR(x), v))
#define HW_ADC_CLM2_SET(x, v) (HW_ADC_CLM2_WR(x, HW_ADC_CLM2_RD(x) | (v)))
#define HW_ADC_CLM2_CLR(x, v) (HW_ADC_CLM2_WR(x, HW_ADC_CLM2_RD(x) & ~(v)))
#define HW_ADC_CLM2_TOG(x, v) (HW_ADC_CLM2_WR(x, HW_ADC_CLM2_RD(x) ^ (v)))
@ -2167,7 +2174,7 @@ typedef union _hw_adc_clm2
#define BS_ADC_CLM2_CLM2 (8U) /*!< Bit field size in bits for ADC_CLM2_CLM2. */
/*! @brief Read current value of the ADC_CLM2_CLM2 field. */
#define BR_ADC_CLM2_CLM2(x) (HW_ADC_CLM2(x).B.CLM2)
#define BR_ADC_CLM2_CLM2(x) (UNION_READ(hw_adc_clm2_t, HW_ADC_CLM2_ADDR(x), U, B.CLM2))
/*! @brief Format value for bitfield ADC_CLM2_CLM2. */
#define BF_ADC_CLM2_CLM2(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CLM2_CLM2) & BM_ADC_CLM2_CLM2)
@ -2204,8 +2211,8 @@ typedef union _hw_adc_clm1
#define HW_ADC_CLM1_ADDR(x) ((x) + 0x68U)
#define HW_ADC_CLM1(x) (*(__IO hw_adc_clm1_t *) HW_ADC_CLM1_ADDR(x))
#define HW_ADC_CLM1_RD(x) (HW_ADC_CLM1(x).U)
#define HW_ADC_CLM1_WR(x, v) (HW_ADC_CLM1(x).U = (v))
#define HW_ADC_CLM1_RD(x) (ADDRESS_READ(hw_adc_clm1_t, HW_ADC_CLM1_ADDR(x)))
#define HW_ADC_CLM1_WR(x, v) (ADDRESS_WRITE(hw_adc_clm1_t, HW_ADC_CLM1_ADDR(x), v))
#define HW_ADC_CLM1_SET(x, v) (HW_ADC_CLM1_WR(x, HW_ADC_CLM1_RD(x) | (v)))
#define HW_ADC_CLM1_CLR(x, v) (HW_ADC_CLM1_WR(x, HW_ADC_CLM1_RD(x) & ~(v)))
#define HW_ADC_CLM1_TOG(x, v) (HW_ADC_CLM1_WR(x, HW_ADC_CLM1_RD(x) ^ (v)))
@ -2226,7 +2233,7 @@ typedef union _hw_adc_clm1
#define BS_ADC_CLM1_CLM1 (7U) /*!< Bit field size in bits for ADC_CLM1_CLM1. */
/*! @brief Read current value of the ADC_CLM1_CLM1 field. */
#define BR_ADC_CLM1_CLM1(x) (HW_ADC_CLM1(x).B.CLM1)
#define BR_ADC_CLM1_CLM1(x) (UNION_READ(hw_adc_clm1_t, HW_ADC_CLM1_ADDR(x), U, B.CLM1))
/*! @brief Format value for bitfield ADC_CLM1_CLM1. */
#define BF_ADC_CLM1_CLM1(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CLM1_CLM1) & BM_ADC_CLM1_CLM1)
@ -2263,8 +2270,8 @@ typedef union _hw_adc_clm0
#define HW_ADC_CLM0_ADDR(x) ((x) + 0x6CU)
#define HW_ADC_CLM0(x) (*(__IO hw_adc_clm0_t *) HW_ADC_CLM0_ADDR(x))
#define HW_ADC_CLM0_RD(x) (HW_ADC_CLM0(x).U)
#define HW_ADC_CLM0_WR(x, v) (HW_ADC_CLM0(x).U = (v))
#define HW_ADC_CLM0_RD(x) (ADDRESS_READ(hw_adc_clm0_t, HW_ADC_CLM0_ADDR(x)))
#define HW_ADC_CLM0_WR(x, v) (ADDRESS_WRITE(hw_adc_clm0_t, HW_ADC_CLM0_ADDR(x), v))
#define HW_ADC_CLM0_SET(x, v) (HW_ADC_CLM0_WR(x, HW_ADC_CLM0_RD(x) | (v)))
#define HW_ADC_CLM0_CLR(x, v) (HW_ADC_CLM0_WR(x, HW_ADC_CLM0_RD(x) & ~(v)))
#define HW_ADC_CLM0_TOG(x, v) (HW_ADC_CLM0_WR(x, HW_ADC_CLM0_RD(x) ^ (v)))
@ -2285,7 +2292,7 @@ typedef union _hw_adc_clm0
#define BS_ADC_CLM0_CLM0 (6U) /*!< Bit field size in bits for ADC_CLM0_CLM0. */
/*! @brief Read current value of the ADC_CLM0_CLM0 field. */
#define BR_ADC_CLM0_CLM0(x) (HW_ADC_CLM0(x).B.CLM0)
#define BR_ADC_CLM0_CLM0(x) (UNION_READ(hw_adc_clm0_t, HW_ADC_CLM0_ADDR(x), U, B.CLM0))
/*! @brief Format value for bitfield ADC_CLM0_CLM0. */
#define BF_ADC_CLM0_CLM0(v) ((uint32_t)((uint32_t)(v) << BP_ADC_CLM0_CLM0) & BM_ADC_CLM0_CLM0)

1711
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_aips.h
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77
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_axbs.h
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@ -15,6 +15,9 @@
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** (C) COPYRIGHT 2015-2015 ARM Limited
** ALL RIGHTS RESERVED
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
@ -68,6 +71,10 @@
** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
** Update of SystemInit() and SystemCoreClockUpdate() functions.
** Module access macro module_BASES replaced by module_BASE_PTRS.
** - rev. 2.6 (2015-08-03) (ARM)
** All accesses to memory are replaced by equivalent macros; this allows
** memory read/write operations to be re-defined if needed (for example,
** to implement new security features
**
** ###################################################################
*/
@ -162,8 +169,8 @@ typedef union _hw_axbs_prsn
#define HW_AXBS_PRSn_ADDR(x, n) ((x) + 0x0U + (0x100U * (n)))
#define HW_AXBS_PRSn(x, n) (*(__IO hw_axbs_prsn_t *) HW_AXBS_PRSn_ADDR(x, n))
#define HW_AXBS_PRSn_RD(x, n) (HW_AXBS_PRSn(x, n).U)
#define HW_AXBS_PRSn_WR(x, n, v) (HW_AXBS_PRSn(x, n).U = (v))
#define HW_AXBS_PRSn_RD(x, n) (ADDRESS_READ(hw_axbs_prsn_t, HW_AXBS_PRSn_ADDR(x, n)))
#define HW_AXBS_PRSn_WR(x, n, v) (ADDRESS_WRITE(hw_axbs_prsn_t, HW_AXBS_PRSn_ADDR(x, n), v))
#define HW_AXBS_PRSn_SET(x, n, v) (HW_AXBS_PRSn_WR(x, n, HW_AXBS_PRSn_RD(x, n) | (v)))
#define HW_AXBS_PRSn_CLR(x, n, v) (HW_AXBS_PRSn_WR(x, n, HW_AXBS_PRSn_RD(x, n) & ~(v)))
#define HW_AXBS_PRSn_TOG(x, n, v) (HW_AXBS_PRSn_WR(x, n, HW_AXBS_PRSn_RD(x, n) ^ (v)))
@ -194,7 +201,7 @@ typedef union _hw_axbs_prsn
#define BS_AXBS_PRSn_M0 (3U) /*!< Bit field size in bits for AXBS_PRSn_M0. */
/*! @brief Read current value of the AXBS_PRSn_M0 field. */
#define BR_AXBS_PRSn_M0(x, n) (HW_AXBS_PRSn(x, n).B.M0)
#define BR_AXBS_PRSn_M0(x, n) (UNION_READ(hw_axbs_prsn_t, HW_AXBS_PRSn_ADDR(x, n), U, B.M0))
/*! @brief Format value for bitfield AXBS_PRSn_M0. */
#define BF_AXBS_PRSn_M0(v) ((uint32_t)((uint32_t)(v) << BP_AXBS_PRSn_M0) & BM_AXBS_PRSn_M0)
@ -224,7 +231,7 @@ typedef union _hw_axbs_prsn
#define BS_AXBS_PRSn_M1 (3U) /*!< Bit field size in bits for AXBS_PRSn_M1. */
/*! @brief Read current value of the AXBS_PRSn_M1 field. */
#define BR_AXBS_PRSn_M1(x, n) (HW_AXBS_PRSn(x, n).B.M1)
#define BR_AXBS_PRSn_M1(x, n) (UNION_READ(hw_axbs_prsn_t, HW_AXBS_PRSn_ADDR(x, n), U, B.M1))
/*! @brief Format value for bitfield AXBS_PRSn_M1. */
#define BF_AXBS_PRSn_M1(v) ((uint32_t)((uint32_t)(v) << BP_AXBS_PRSn_M1) & BM_AXBS_PRSn_M1)
@ -254,7 +261,7 @@ typedef union _hw_axbs_prsn
#define BS_AXBS_PRSn_M2 (3U) /*!< Bit field size in bits for AXBS_PRSn_M2. */
/*! @brief Read current value of the AXBS_PRSn_M2 field. */
#define BR_AXBS_PRSn_M2(x, n) (HW_AXBS_PRSn(x, n).B.M2)
#define BR_AXBS_PRSn_M2(x, n) (UNION_READ(hw_axbs_prsn_t, HW_AXBS_PRSn_ADDR(x, n), U, B.M2))
/*! @brief Format value for bitfield AXBS_PRSn_M2. */
#define BF_AXBS_PRSn_M2(v) ((uint32_t)((uint32_t)(v) << BP_AXBS_PRSn_M2) & BM_AXBS_PRSn_M2)
@ -284,7 +291,7 @@ typedef union _hw_axbs_prsn
#define BS_AXBS_PRSn_M3 (3U) /*!< Bit field size in bits for AXBS_PRSn_M3. */
/*! @brief Read current value of the AXBS_PRSn_M3 field. */
#define BR_AXBS_PRSn_M3(x, n) (HW_AXBS_PRSn(x, n).B.M3)
#define BR_AXBS_PRSn_M3(x, n) (UNION_READ(hw_axbs_prsn_t, HW_AXBS_PRSn_ADDR(x, n), U, B.M3))
/*! @brief Format value for bitfield AXBS_PRSn_M3. */
#define BF_AXBS_PRSn_M3(v) ((uint32_t)((uint32_t)(v) << BP_AXBS_PRSn_M3) & BM_AXBS_PRSn_M3)
@ -314,7 +321,7 @@ typedef union _hw_axbs_prsn
#define BS_AXBS_PRSn_M4 (3U) /*!< Bit field size in bits for AXBS_PRSn_M4. */
/*! @brief Read current value of the AXBS_PRSn_M4 field. */
#define BR_AXBS_PRSn_M4(x, n) (HW_AXBS_PRSn(x, n).B.M4)
#define BR_AXBS_PRSn_M4(x, n) (UNION_READ(hw_axbs_prsn_t, HW_AXBS_PRSn_ADDR(x, n), U, B.M4))
/*! @brief Format value for bitfield AXBS_PRSn_M4. */
#define BF_AXBS_PRSn_M4(v) ((uint32_t)((uint32_t)(v) << BP_AXBS_PRSn_M4) & BM_AXBS_PRSn_M4)
@ -344,7 +351,7 @@ typedef union _hw_axbs_prsn
#define BS_AXBS_PRSn_M5 (3U) /*!< Bit field size in bits for AXBS_PRSn_M5. */
/*! @brief Read current value of the AXBS_PRSn_M5 field. */
#define BR_AXBS_PRSn_M5(x, n) (HW_AXBS_PRSn(x, n).B.M5)
#define BR_AXBS_PRSn_M5(x, n) (UNION_READ(hw_axbs_prsn_t, HW_AXBS_PRSn_ADDR(x, n), U, B.M5))
/*! @brief Format value for bitfield AXBS_PRSn_M5. */
#define BF_AXBS_PRSn_M5(v) ((uint32_t)((uint32_t)(v) << BP_AXBS_PRSn_M5) & BM_AXBS_PRSn_M5)
@ -390,8 +397,8 @@ typedef union _hw_axbs_crsn
#define HW_AXBS_CRSn_ADDR(x, n) ((x) + 0x10U + (0x100U * (n)))
#define HW_AXBS_CRSn(x, n) (*(__IO hw_axbs_crsn_t *) HW_AXBS_CRSn_ADDR(x, n))
#define HW_AXBS_CRSn_RD(x, n) (HW_AXBS_CRSn(x, n).U)
#define HW_AXBS_CRSn_WR(x, n, v) (HW_AXBS_CRSn(x, n).U = (v))
#define HW_AXBS_CRSn_RD(x, n) (ADDRESS_READ(hw_axbs_crsn_t, HW_AXBS_CRSn_ADDR(x, n)))
#define HW_AXBS_CRSn_WR(x, n, v) (ADDRESS_WRITE(hw_axbs_crsn_t, HW_AXBS_CRSn_ADDR(x, n), v))
#define HW_AXBS_CRSn_SET(x, n, v) (HW_AXBS_CRSn_WR(x, n, HW_AXBS_CRSn_RD(x, n) | (v)))
#define HW_AXBS_CRSn_CLR(x, n, v) (HW_AXBS_CRSn_WR(x, n, HW_AXBS_CRSn_RD(x, n) & ~(v)))
#define HW_AXBS_CRSn_TOG(x, n, v) (HW_AXBS_CRSn_WR(x, n, HW_AXBS_CRSn_RD(x, n) ^ (v)))
@ -424,7 +431,7 @@ typedef union _hw_axbs_crsn
#define BS_AXBS_CRSn_PARK (3U) /*!< Bit field size in bits for AXBS_CRSn_PARK. */
/*! @brief Read current value of the AXBS_CRSn_PARK field. */
#define BR_AXBS_CRSn_PARK(x, n) (HW_AXBS_CRSn(x, n).B.PARK)
#define BR_AXBS_CRSn_PARK(x, n) (UNION_READ(hw_axbs_crsn_t, HW_AXBS_CRSn_ADDR(x, n), U, B.PARK))
/*! @brief Format value for bitfield AXBS_CRSn_PARK. */
#define BF_AXBS_CRSn_PARK(v) ((uint32_t)((uint32_t)(v) << BP_AXBS_CRSn_PARK) & BM_AXBS_CRSn_PARK)
@ -456,7 +463,7 @@ typedef union _hw_axbs_crsn
#define BS_AXBS_CRSn_PCTL (2U) /*!< Bit field size in bits for AXBS_CRSn_PCTL. */
/*! @brief Read current value of the AXBS_CRSn_PCTL field. */
#define BR_AXBS_CRSn_PCTL(x, n) (HW_AXBS_CRSn(x, n).B.PCTL)
#define BR_AXBS_CRSn_PCTL(x, n) (UNION_READ(hw_axbs_crsn_t, HW_AXBS_CRSn_ADDR(x, n), U, B.PCTL))
/*! @brief Format value for bitfield AXBS_CRSn_PCTL. */
#define BF_AXBS_CRSn_PCTL(v) ((uint32_t)((uint32_t)(v) << BP_AXBS_CRSn_PCTL) & BM_AXBS_CRSn_PCTL)
@ -482,7 +489,7 @@ typedef union _hw_axbs_crsn
#define BS_AXBS_CRSn_ARB (2U) /*!< Bit field size in bits for AXBS_CRSn_ARB. */
/*! @brief Read current value of the AXBS_CRSn_ARB field. */
#define BR_AXBS_CRSn_ARB(x, n) (HW_AXBS_CRSn(x, n).B.ARB)
#define BR_AXBS_CRSn_ARB(x, n) (UNION_READ(hw_axbs_crsn_t, HW_AXBS_CRSn_ADDR(x, n), U, B.ARB))
/*! @brief Format value for bitfield AXBS_CRSn_ARB. */
#define BF_AXBS_CRSn_ARB(v) ((uint32_t)((uint32_t)(v) << BP_AXBS_CRSn_ARB) & BM_AXBS_CRSn_ARB)
@ -510,13 +517,13 @@ typedef union _hw_axbs_crsn
#define BS_AXBS_CRSn_HLP (1U) /*!< Bit field size in bits for AXBS_CRSn_HLP. */
/*! @brief Read current value of the AXBS_CRSn_HLP field. */
#define BR_AXBS_CRSn_HLP(x, n) (BITBAND_ACCESS32(HW_AXBS_CRSn_ADDR(x, n), BP_AXBS_CRSn_HLP))
#define BR_AXBS_CRSn_HLP(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AXBS_CRSn_ADDR(x, n), BP_AXBS_CRSn_HLP)))
/*! @brief Format value for bitfield AXBS_CRSn_HLP. */
#define BF_AXBS_CRSn_HLP(v) ((uint32_t)((uint32_t)(v) << BP_AXBS_CRSn_HLP) & BM_AXBS_CRSn_HLP)
/*! @brief Set the HLP field to a new value. */
#define BW_AXBS_CRSn_HLP(x, n, v) (BITBAND_ACCESS32(HW_AXBS_CRSn_ADDR(x, n), BP_AXBS_CRSn_HLP) = (v))
#define BW_AXBS_CRSn_HLP(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AXBS_CRSn_ADDR(x, n), BP_AXBS_CRSn_HLP), v))
/*@}*/
/*!
@ -537,13 +544,13 @@ typedef union _hw_axbs_crsn
#define BS_AXBS_CRSn_RO (1U) /*!< Bit field size in bits for AXBS_CRSn_RO. */
/*! @brief Read current value of the AXBS_CRSn_RO field. */
#define BR_AXBS_CRSn_RO(x, n) (BITBAND_ACCESS32(HW_AXBS_CRSn_ADDR(x, n), BP_AXBS_CRSn_RO))
#define BR_AXBS_CRSn_RO(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_AXBS_CRSn_ADDR(x, n), BP_AXBS_CRSn_RO)))
/*! @brief Format value for bitfield AXBS_CRSn_RO. */
#define BF_AXBS_CRSn_RO(v) ((uint32_t)((uint32_t)(v) << BP_AXBS_CRSn_RO) & BM_AXBS_CRSn_RO)
/*! @brief Set the RO field to a new value. */
#define BW_AXBS_CRSn_RO(x, n, v) (BITBAND_ACCESS32(HW_AXBS_CRSn_ADDR(x, n), BP_AXBS_CRSn_RO) = (v))
#define BW_AXBS_CRSn_RO(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_AXBS_CRSn_ADDR(x, n), BP_AXBS_CRSn_RO), v))
/*@}*/
/*******************************************************************************
@ -577,8 +584,8 @@ typedef union _hw_axbs_mgpcr0
#define HW_AXBS_MGPCR0_ADDR(x) ((x) + 0x800U)
#define HW_AXBS_MGPCR0(x) (*(__IO hw_axbs_mgpcr0_t *) HW_AXBS_MGPCR0_ADDR(x))
#define HW_AXBS_MGPCR0_RD(x) (HW_AXBS_MGPCR0(x).U)
#define HW_AXBS_MGPCR0_WR(x, v) (HW_AXBS_MGPCR0(x).U = (v))
#define HW_AXBS_MGPCR0_RD(x) (ADDRESS_READ(hw_axbs_mgpcr0_t, HW_AXBS_MGPCR0_ADDR(x)))
#define HW_AXBS_MGPCR0_WR(x, v) (ADDRESS_WRITE(hw_axbs_mgpcr0_t, HW_AXBS_MGPCR0_ADDR(x), v))
#define HW_AXBS_MGPCR0_SET(x, v) (HW_AXBS_MGPCR0_WR(x, HW_AXBS_MGPCR0_RD(x) | (v)))
#define HW_AXBS_MGPCR0_CLR(x, v) (HW_AXBS_MGPCR0_WR(x, HW_AXBS_MGPCR0_RD(x) & ~(v)))
#define HW_AXBS_MGPCR0_TOG(x, v) (HW_AXBS_MGPCR0_WR(x, HW_AXBS_MGPCR0_RD(x) ^ (v)))
@ -611,7 +618,7 @@ typedef union _hw_axbs_mgpcr0
#define BS_AXBS_MGPCR0_AULB (3U) /*!< Bit field size in bits for AXBS_MGPCR0_AULB. */
/*! @brief Read current value of the AXBS_MGPCR0_AULB field. */
#define BR_AXBS_MGPCR0_AULB(x) (HW_AXBS_MGPCR0(x).B.AULB)
#define BR_AXBS_MGPCR0_AULB(x) (UNION_READ(hw_axbs_mgpcr0_t, HW_AXBS_MGPCR0_ADDR(x), U, B.AULB))
/*! @brief Format value for bitfield AXBS_MGPCR0_AULB. */
#define BF_AXBS_MGPCR0_AULB(v) ((uint32_t)((uint32_t)(v) << BP_AXBS_MGPCR0_AULB) & BM_AXBS_MGPCR0_AULB)
@ -651,8 +658,8 @@ typedef union _hw_axbs_mgpcr1
#define HW_AXBS_MGPCR1_ADDR(x) ((x) + 0x900U)
#define HW_AXBS_MGPCR1(x) (*(__IO hw_axbs_mgpcr1_t *) HW_AXBS_MGPCR1_ADDR(x))
#define HW_AXBS_MGPCR1_RD(x) (HW_AXBS_MGPCR1(x).U)
#define HW_AXBS_MGPCR1_WR(x, v) (HW_AXBS_MGPCR1(x).U = (v))
#define HW_AXBS_MGPCR1_RD(x) (ADDRESS_READ(hw_axbs_mgpcr1_t, HW_AXBS_MGPCR1_ADDR(x)))
#define HW_AXBS_MGPCR1_WR(x, v) (ADDRESS_WRITE(hw_axbs_mgpcr1_t, HW_AXBS_MGPCR1_ADDR(x), v))
#define HW_AXBS_MGPCR1_SET(x, v) (HW_AXBS_MGPCR1_WR(x, HW_AXBS_MGPCR1_RD(x) | (v)))
#define HW_AXBS_MGPCR1_CLR(x, v) (HW_AXBS_MGPCR1_WR(x, HW_AXBS_MGPCR1_RD(x) & ~(v)))
#define HW_AXBS_MGPCR1_TOG(x, v) (HW_AXBS_MGPCR1_WR(x, HW_AXBS_MGPCR1_RD(x) ^ (v)))
@ -685,7 +692,7 @@ typedef union _hw_axbs_mgpcr1
#define BS_AXBS_MGPCR1_AULB (3U) /*!< Bit field size in bits for AXBS_MGPCR1_AULB. */
/*! @brief Read current value of the AXBS_MGPCR1_AULB field. */
#define BR_AXBS_MGPCR1_AULB(x) (HW_AXBS_MGPCR1(x).B.AULB)
#define BR_AXBS_MGPCR1_AULB(x) (UNION_READ(hw_axbs_mgpcr1_t, HW_AXBS_MGPCR1_ADDR(x), U, B.AULB))
/*! @brief Format value for bitfield AXBS_MGPCR1_AULB. */
#define BF_AXBS_MGPCR1_AULB(v) ((uint32_t)((uint32_t)(v) << BP_AXBS_MGPCR1_AULB) & BM_AXBS_MGPCR1_AULB)
@ -725,8 +732,8 @@ typedef union _hw_axbs_mgpcr2
#define HW_AXBS_MGPCR2_ADDR(x) ((x) + 0xA00U)
#define HW_AXBS_MGPCR2(x) (*(__IO hw_axbs_mgpcr2_t *) HW_AXBS_MGPCR2_ADDR(x))
#define HW_AXBS_MGPCR2_RD(x) (HW_AXBS_MGPCR2(x).U)
#define HW_AXBS_MGPCR2_WR(x, v) (HW_AXBS_MGPCR2(x).U = (v))
#define HW_AXBS_MGPCR2_RD(x) (ADDRESS_READ(hw_axbs_mgpcr2_t, HW_AXBS_MGPCR2_ADDR(x)))
#define HW_AXBS_MGPCR2_WR(x, v) (ADDRESS_WRITE(hw_axbs_mgpcr2_t, HW_AXBS_MGPCR2_ADDR(x), v))
#define HW_AXBS_MGPCR2_SET(x, v) (HW_AXBS_MGPCR2_WR(x, HW_AXBS_MGPCR2_RD(x) | (v)))
#define HW_AXBS_MGPCR2_CLR(x, v) (HW_AXBS_MGPCR2_WR(x, HW_AXBS_MGPCR2_RD(x) & ~(v)))
#define HW_AXBS_MGPCR2_TOG(x, v) (HW_AXBS_MGPCR2_WR(x, HW_AXBS_MGPCR2_RD(x) ^ (v)))
@ -759,7 +766,7 @@ typedef union _hw_axbs_mgpcr2
#define BS_AXBS_MGPCR2_AULB (3U) /*!< Bit field size in bits for AXBS_MGPCR2_AULB. */
/*! @brief Read current value of the AXBS_MGPCR2_AULB field. */
#define BR_AXBS_MGPCR2_AULB(x) (HW_AXBS_MGPCR2(x).B.AULB)
#define BR_AXBS_MGPCR2_AULB(x) (UNION_READ(hw_axbs_mgpcr2_t, HW_AXBS_MGPCR2_ADDR(x), U, B.AULB))
/*! @brief Format value for bitfield AXBS_MGPCR2_AULB. */
#define BF_AXBS_MGPCR2_AULB(v) ((uint32_t)((uint32_t)(v) << BP_AXBS_MGPCR2_AULB) & BM_AXBS_MGPCR2_AULB)
@ -799,8 +806,8 @@ typedef union _hw_axbs_mgpcr3
#define HW_AXBS_MGPCR3_ADDR(x) ((x) + 0xB00U)
#define HW_AXBS_MGPCR3(x) (*(__IO hw_axbs_mgpcr3_t *) HW_AXBS_MGPCR3_ADDR(x))
#define HW_AXBS_MGPCR3_RD(x) (HW_AXBS_MGPCR3(x).U)
#define HW_AXBS_MGPCR3_WR(x, v) (HW_AXBS_MGPCR3(x).U = (v))
#define HW_AXBS_MGPCR3_RD(x) (ADDRESS_READ(hw_axbs_mgpcr3_t, HW_AXBS_MGPCR3_ADDR(x)))
#define HW_AXBS_MGPCR3_WR(x, v) (ADDRESS_WRITE(hw_axbs_mgpcr3_t, HW_AXBS_MGPCR3_ADDR(x), v))
#define HW_AXBS_MGPCR3_SET(x, v) (HW_AXBS_MGPCR3_WR(x, HW_AXBS_MGPCR3_RD(x) | (v)))
#define HW_AXBS_MGPCR3_CLR(x, v) (HW_AXBS_MGPCR3_WR(x, HW_AXBS_MGPCR3_RD(x) & ~(v)))
#define HW_AXBS_MGPCR3_TOG(x, v) (HW_AXBS_MGPCR3_WR(x, HW_AXBS_MGPCR3_RD(x) ^ (v)))
@ -833,7 +840,7 @@ typedef union _hw_axbs_mgpcr3
#define BS_AXBS_MGPCR3_AULB (3U) /*!< Bit field size in bits for AXBS_MGPCR3_AULB. */
/*! @brief Read current value of the AXBS_MGPCR3_AULB field. */
#define BR_AXBS_MGPCR3_AULB(x) (HW_AXBS_MGPCR3(x).B.AULB)
#define BR_AXBS_MGPCR3_AULB(x) (UNION_READ(hw_axbs_mgpcr3_t, HW_AXBS_MGPCR3_ADDR(x), U, B.AULB))
/*! @brief Format value for bitfield AXBS_MGPCR3_AULB. */
#define BF_AXBS_MGPCR3_AULB(v) ((uint32_t)((uint32_t)(v) << BP_AXBS_MGPCR3_AULB) & BM_AXBS_MGPCR3_AULB)
@ -873,8 +880,8 @@ typedef union _hw_axbs_mgpcr4
#define HW_AXBS_MGPCR4_ADDR(x) ((x) + 0xC00U)
#define HW_AXBS_MGPCR4(x) (*(__IO hw_axbs_mgpcr4_t *) HW_AXBS_MGPCR4_ADDR(x))
#define HW_AXBS_MGPCR4_RD(x) (HW_AXBS_MGPCR4(x).U)
#define HW_AXBS_MGPCR4_WR(x, v) (HW_AXBS_MGPCR4(x).U = (v))
#define HW_AXBS_MGPCR4_RD(x) (ADDRESS_READ(hw_axbs_mgpcr4_t, HW_AXBS_MGPCR4_ADDR(x)))
#define HW_AXBS_MGPCR4_WR(x, v) (ADDRESS_WRITE(hw_axbs_mgpcr4_t, HW_AXBS_MGPCR4_ADDR(x), v))
#define HW_AXBS_MGPCR4_SET(x, v) (HW_AXBS_MGPCR4_WR(x, HW_AXBS_MGPCR4_RD(x) | (v)))
#define HW_AXBS_MGPCR4_CLR(x, v) (HW_AXBS_MGPCR4_WR(x, HW_AXBS_MGPCR4_RD(x) & ~(v)))
#define HW_AXBS_MGPCR4_TOG(x, v) (HW_AXBS_MGPCR4_WR(x, HW_AXBS_MGPCR4_RD(x) ^ (v)))
@ -907,7 +914,7 @@ typedef union _hw_axbs_mgpcr4
#define BS_AXBS_MGPCR4_AULB (3U) /*!< Bit field size in bits for AXBS_MGPCR4_AULB. */
/*! @brief Read current value of the AXBS_MGPCR4_AULB field. */
#define BR_AXBS_MGPCR4_AULB(x) (HW_AXBS_MGPCR4(x).B.AULB)
#define BR_AXBS_MGPCR4_AULB(x) (UNION_READ(hw_axbs_mgpcr4_t, HW_AXBS_MGPCR4_ADDR(x), U, B.AULB))
/*! @brief Format value for bitfield AXBS_MGPCR4_AULB. */
#define BF_AXBS_MGPCR4_AULB(v) ((uint32_t)((uint32_t)(v) << BP_AXBS_MGPCR4_AULB) & BM_AXBS_MGPCR4_AULB)
@ -947,8 +954,8 @@ typedef union _hw_axbs_mgpcr5
#define HW_AXBS_MGPCR5_ADDR(x) ((x) + 0xD00U)
#define HW_AXBS_MGPCR5(x) (*(__IO hw_axbs_mgpcr5_t *) HW_AXBS_MGPCR5_ADDR(x))
#define HW_AXBS_MGPCR5_RD(x) (HW_AXBS_MGPCR5(x).U)
#define HW_AXBS_MGPCR5_WR(x, v) (HW_AXBS_MGPCR5(x).U = (v))
#define HW_AXBS_MGPCR5_RD(x) (ADDRESS_READ(hw_axbs_mgpcr5_t, HW_AXBS_MGPCR5_ADDR(x)))
#define HW_AXBS_MGPCR5_WR(x, v) (ADDRESS_WRITE(hw_axbs_mgpcr5_t, HW_AXBS_MGPCR5_ADDR(x), v))
#define HW_AXBS_MGPCR5_SET(x, v) (HW_AXBS_MGPCR5_WR(x, HW_AXBS_MGPCR5_RD(x) | (v)))
#define HW_AXBS_MGPCR5_CLR(x, v) (HW_AXBS_MGPCR5_WR(x, HW_AXBS_MGPCR5_RD(x) & ~(v)))
#define HW_AXBS_MGPCR5_TOG(x, v) (HW_AXBS_MGPCR5_WR(x, HW_AXBS_MGPCR5_RD(x) ^ (v)))
@ -981,7 +988,7 @@ typedef union _hw_axbs_mgpcr5
#define BS_AXBS_MGPCR5_AULB (3U) /*!< Bit field size in bits for AXBS_MGPCR5_AULB. */
/*! @brief Read current value of the AXBS_MGPCR5_AULB field. */
#define BR_AXBS_MGPCR5_AULB(x) (HW_AXBS_MGPCR5(x).B.AULB)
#define BR_AXBS_MGPCR5_AULB(x) (UNION_READ(hw_axbs_mgpcr5_t, HW_AXBS_MGPCR5_ADDR(x), U, B.AULB))
/*! @brief Format value for bitfield AXBS_MGPCR5_AULB. */
#define BF_AXBS_MGPCR5_AULB(v) ((uint32_t)((uint32_t)(v) << BP_AXBS_MGPCR5_AULB) & BM_AXBS_MGPCR5_AULB)

345
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_can.h
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File diff suppressed because it is too large Load Diff

221
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_cau.h
View File

@ -15,6 +15,9 @@
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** (C) COPYRIGHT 2015-2015 ARM Limited
** ALL RIGHTS RESERVED
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
@ -68,6 +71,10 @@
** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
** Update of SystemInit() and SystemCoreClockUpdate() functions.
** Module access macro module_BASES replaced by module_BASE_PTRS.
** - rev. 2.6 (2015-08-03) (ARM)
** All accesses to memory are replaced by equivalent macros; this allows
** memory read/write operations to be re-defined if needed (for example,
** to implement new security features
**
** ###################################################################
*/
@ -224,7 +231,7 @@ typedef union _hw_cau_direct0
#define HW_CAU_DIRECT0_ADDR(x) ((x) + 0x0U)
#define HW_CAU_DIRECT0(x) (*(__O hw_cau_direct0_t *) HW_CAU_DIRECT0_ADDR(x))
#define HW_CAU_DIRECT0_WR(x, v) (HW_CAU_DIRECT0(x).U = (v))
#define HW_CAU_DIRECT0_WR(x, v) (ADDRESS_WRITE(hw_cau_direct0_t, HW_CAU_DIRECT0_ADDR(x), v))
/*@}*/
/*
@ -268,7 +275,7 @@ typedef union _hw_cau_direct1
#define HW_CAU_DIRECT1_ADDR(x) ((x) + 0x4U)
#define HW_CAU_DIRECT1(x) (*(__O hw_cau_direct1_t *) HW_CAU_DIRECT1_ADDR(x))
#define HW_CAU_DIRECT1_WR(x, v) (HW_CAU_DIRECT1(x).U = (v))
#define HW_CAU_DIRECT1_WR(x, v) (ADDRESS_WRITE(hw_cau_direct1_t, HW_CAU_DIRECT1_ADDR(x), v))
/*@}*/
/*
@ -312,7 +319,7 @@ typedef union _hw_cau_direct2
#define HW_CAU_DIRECT2_ADDR(x) ((x) + 0x8U)
#define HW_CAU_DIRECT2(x) (*(__O hw_cau_direct2_t *) HW_CAU_DIRECT2_ADDR(x))
#define HW_CAU_DIRECT2_WR(x, v) (HW_CAU_DIRECT2(x).U = (v))
#define HW_CAU_DIRECT2_WR(x, v) (ADDRESS_WRITE(hw_cau_direct2_t, HW_CAU_DIRECT2_ADDR(x), v))
/*@}*/
/*
@ -356,7 +363,7 @@ typedef union _hw_cau_direct3
#define HW_CAU_DIRECT3_ADDR(x) ((x) + 0xCU)
#define HW_CAU_DIRECT3(x) (*(__O hw_cau_direct3_t *) HW_CAU_DIRECT3_ADDR(x))
#define HW_CAU_DIRECT3_WR(x, v) (HW_CAU_DIRECT3(x).U = (v))
#define HW_CAU_DIRECT3_WR(x, v) (ADDRESS_WRITE(hw_cau_direct3_t, HW_CAU_DIRECT3_ADDR(x), v))
/*@}*/
/*
@ -400,7 +407,7 @@ typedef union _hw_cau_direct4
#define HW_CAU_DIRECT4_ADDR(x) ((x) + 0x10U)
#define HW_CAU_DIRECT4(x) (*(__O hw_cau_direct4_t *) HW_CAU_DIRECT4_ADDR(x))
#define HW_CAU_DIRECT4_WR(x, v) (HW_CAU_DIRECT4(x).U = (v))
#define HW_CAU_DIRECT4_WR(x, v) (ADDRESS_WRITE(hw_cau_direct4_t, HW_CAU_DIRECT4_ADDR(x), v))
/*@}*/
/*
@ -444,7 +451,7 @@ typedef union _hw_cau_direct5
#define HW_CAU_DIRECT5_ADDR(x) ((x) + 0x14U)
#define HW_CAU_DIRECT5(x) (*(__O hw_cau_direct5_t *) HW_CAU_DIRECT5_ADDR(x))
#define HW_CAU_DIRECT5_WR(x, v) (HW_CAU_DIRECT5(x).U = (v))
#define HW_CAU_DIRECT5_WR(x, v) (ADDRESS_WRITE(hw_cau_direct5_t, HW_CAU_DIRECT5_ADDR(x), v))
/*@}*/
/*
@ -488,7 +495,7 @@ typedef union _hw_cau_direct6
#define HW_CAU_DIRECT6_ADDR(x) ((x) + 0x18U)
#define HW_CAU_DIRECT6(x) (*(__O hw_cau_direct6_t *) HW_CAU_DIRECT6_ADDR(x))
#define HW_CAU_DIRECT6_WR(x, v) (HW_CAU_DIRECT6(x).U = (v))
#define HW_CAU_DIRECT6_WR(x, v) (ADDRESS_WRITE(hw_cau_direct6_t, HW_CAU_DIRECT6_ADDR(x), v))
/*@}*/
/*
@ -532,7 +539,7 @@ typedef union _hw_cau_direct7
#define HW_CAU_DIRECT7_ADDR(x) ((x) + 0x1CU)
#define HW_CAU_DIRECT7(x) (*(__O hw_cau_direct7_t *) HW_CAU_DIRECT7_ADDR(x))
#define HW_CAU_DIRECT7_WR(x, v) (HW_CAU_DIRECT7(x).U = (v))
#define HW_CAU_DIRECT7_WR(x, v) (ADDRESS_WRITE(hw_cau_direct7_t, HW_CAU_DIRECT7_ADDR(x), v))
/*@}*/
/*
@ -576,7 +583,7 @@ typedef union _hw_cau_direct8
#define HW_CAU_DIRECT8_ADDR(x) ((x) + 0x20U)
#define HW_CAU_DIRECT8(x) (*(__O hw_cau_direct8_t *) HW_CAU_DIRECT8_ADDR(x))
#define HW_CAU_DIRECT8_WR(x, v) (HW_CAU_DIRECT8(x).U = (v))
#define HW_CAU_DIRECT8_WR(x, v) (ADDRESS_WRITE(hw_cau_direct8_t, HW_CAU_DIRECT8_ADDR(x), v))
/*@}*/
/*
@ -620,7 +627,7 @@ typedef union _hw_cau_direct9
#define HW_CAU_DIRECT9_ADDR(x) ((x) + 0x24U)
#define HW_CAU_DIRECT9(x) (*(__O hw_cau_direct9_t *) HW_CAU_DIRECT9_ADDR(x))
#define HW_CAU_DIRECT9_WR(x, v) (HW_CAU_DIRECT9(x).U = (v))
#define HW_CAU_DIRECT9_WR(x, v) (ADDRESS_WRITE(hw_cau_direct9_t, HW_CAU_DIRECT9_ADDR(x), v))
/*@}*/
/*
@ -664,7 +671,7 @@ typedef union _hw_cau_direct10
#define HW_CAU_DIRECT10_ADDR(x) ((x) + 0x28U)
#define HW_CAU_DIRECT10(x) (*(__O hw_cau_direct10_t *) HW_CAU_DIRECT10_ADDR(x))
#define HW_CAU_DIRECT10_WR(x, v) (HW_CAU_DIRECT10(x).U = (v))
#define HW_CAU_DIRECT10_WR(x, v) (ADDRESS_WRITE(hw_cau_direct10_t, HW_CAU_DIRECT10_ADDR(x), v))
/*@}*/
/*
@ -708,7 +715,7 @@ typedef union _hw_cau_direct11
#define HW_CAU_DIRECT11_ADDR(x) ((x) + 0x2CU)
#define HW_CAU_DIRECT11(x) (*(__O hw_cau_direct11_t *) HW_CAU_DIRECT11_ADDR(x))
#define HW_CAU_DIRECT11_WR(x, v) (HW_CAU_DIRECT11(x).U = (v))
#define HW_CAU_DIRECT11_WR(x, v) (ADDRESS_WRITE(hw_cau_direct11_t, HW_CAU_DIRECT11_ADDR(x), v))
/*@}*/
/*
@ -752,7 +759,7 @@ typedef union _hw_cau_direct12
#define HW_CAU_DIRECT12_ADDR(x) ((x) + 0x30U)
#define HW_CAU_DIRECT12(x) (*(__O hw_cau_direct12_t *) HW_CAU_DIRECT12_ADDR(x))
#define HW_CAU_DIRECT12_WR(x, v) (HW_CAU_DIRECT12(x).U = (v))
#define HW_CAU_DIRECT12_WR(x, v) (ADDRESS_WRITE(hw_cau_direct12_t, HW_CAU_DIRECT12_ADDR(x), v))
/*@}*/
/*
@ -796,7 +803,7 @@ typedef union _hw_cau_direct13
#define HW_CAU_DIRECT13_ADDR(x) ((x) + 0x34U)
#define HW_CAU_DIRECT13(x) (*(__O hw_cau_direct13_t *) HW_CAU_DIRECT13_ADDR(x))
#define HW_CAU_DIRECT13_WR(x, v) (HW_CAU_DIRECT13(x).U = (v))
#define HW_CAU_DIRECT13_WR(x, v) (ADDRESS_WRITE(hw_cau_direct13_t, HW_CAU_DIRECT13_ADDR(x), v))
/*@}*/
/*
@ -840,7 +847,7 @@ typedef union _hw_cau_direct14
#define HW_CAU_DIRECT14_ADDR(x) ((x) + 0x38U)
#define HW_CAU_DIRECT14(x) (*(__O hw_cau_direct14_t *) HW_CAU_DIRECT14_ADDR(x))
#define HW_CAU_DIRECT14_WR(x, v) (HW_CAU_DIRECT14(x).U = (v))
#define HW_CAU_DIRECT14_WR(x, v) (ADDRESS_WRITE(hw_cau_direct14_t, HW_CAU_DIRECT14_ADDR(x), v))
/*@}*/
/*
@ -884,7 +891,7 @@ typedef union _hw_cau_direct15
#define HW_CAU_DIRECT15_ADDR(x) ((x) + 0x3CU)
#define HW_CAU_DIRECT15(x) (*(__O hw_cau_direct15_t *) HW_CAU_DIRECT15_ADDR(x))
#define HW_CAU_DIRECT15_WR(x, v) (HW_CAU_DIRECT15(x).U = (v))
#define HW_CAU_DIRECT15_WR(x, v) (ADDRESS_WRITE(hw_cau_direct15_t, HW_CAU_DIRECT15_ADDR(x), v))
/*@}*/
/*
@ -931,7 +938,7 @@ typedef union _hw_cau_ldr_casr
#define HW_CAU_LDR_CASR_ADDR(x) ((x) + 0x840U)
#define HW_CAU_LDR_CASR(x) (*(__O hw_cau_ldr_casr_t *) HW_CAU_LDR_CASR_ADDR(x))
#define HW_CAU_LDR_CASR_WR(x, v) (HW_CAU_LDR_CASR(x).U = (v))
#define HW_CAU_LDR_CASR_WR(x, v) (ADDRESS_WRITE(hw_cau_ldr_casr_t, HW_CAU_LDR_CASR_ADDR(x), v))
/*@}*/
/*
@ -1012,7 +1019,7 @@ typedef union _hw_cau_ldr_caa
#define HW_CAU_LDR_CAA_ADDR(x) ((x) + 0x844U)
#define HW_CAU_LDR_CAA(x) (*(__O hw_cau_ldr_caa_t *) HW_CAU_LDR_CAA_ADDR(x))
#define HW_CAU_LDR_CAA_WR(x, v) (HW_CAU_LDR_CAA(x).U = (v))
#define HW_CAU_LDR_CAA_WR(x, v) (ADDRESS_WRITE(hw_cau_ldr_caa_t, HW_CAU_LDR_CAA_ADDR(x), v))
/*@}*/
/*
@ -1056,7 +1063,7 @@ typedef union _hw_cau_ldr_ca0
#define HW_CAU_LDR_CA0_ADDR(x) ((x) + 0x848U)
#define HW_CAU_LDR_CA0(x) (*(__O hw_cau_ldr_ca0_t *) HW_CAU_LDR_CA0_ADDR(x))
#define HW_CAU_LDR_CA0_WR(x, v) (HW_CAU_LDR_CA0(x).U = (v))
#define HW_CAU_LDR_CA0_WR(x, v) (ADDRESS_WRITE(hw_cau_ldr_ca0_t, HW_CAU_LDR_CA0_ADDR(x), v))
/*@}*/
/*
@ -1100,7 +1107,7 @@ typedef union _hw_cau_ldr_ca1
#define HW_CAU_LDR_CA1_ADDR(x) ((x) + 0x84CU)
#define HW_CAU_LDR_CA1(x) (*(__O hw_cau_ldr_ca1_t *) HW_CAU_LDR_CA1_ADDR(x))
#define HW_CAU_LDR_CA1_WR(x, v) (HW_CAU_LDR_CA1(x).U = (v))
#define HW_CAU_LDR_CA1_WR(x, v) (ADDRESS_WRITE(hw_cau_ldr_ca1_t, HW_CAU_LDR_CA1_ADDR(x), v))
/*@}*/
/*
@ -1144,7 +1151,7 @@ typedef union _hw_cau_ldr_ca2
#define HW_CAU_LDR_CA2_ADDR(x) ((x) + 0x850U)
#define HW_CAU_LDR_CA2(x) (*(__O hw_cau_ldr_ca2_t *) HW_CAU_LDR_CA2_ADDR(x))
#define HW_CAU_LDR_CA2_WR(x, v) (HW_CAU_LDR_CA2(x).U = (v))
#define HW_CAU_LDR_CA2_WR(x, v) (ADDRESS_WRITE(hw_cau_ldr_ca2_t, HW_CAU_LDR_CA2_ADDR(x), v))
/*@}*/
/*
@ -1188,7 +1195,7 @@ typedef union _hw_cau_ldr_ca3
#define HW_CAU_LDR_CA3_ADDR(x) ((x) + 0x854U)
#define HW_CAU_LDR_CA3(x) (*(__O hw_cau_ldr_ca3_t *) HW_CAU_LDR_CA3_ADDR(x))
#define HW_CAU_LDR_CA3_WR(x, v) (HW_CAU_LDR_CA3(x).U = (v))
#define HW_CAU_LDR_CA3_WR(x, v) (ADDRESS_WRITE(hw_cau_ldr_ca3_t, HW_CAU_LDR_CA3_ADDR(x), v))
/*@}*/
/*
@ -1232,7 +1239,7 @@ typedef union _hw_cau_ldr_ca4
#define HW_CAU_LDR_CA4_ADDR(x) ((x) + 0x858U)
#define HW_CAU_LDR_CA4(x) (*(__O hw_cau_ldr_ca4_t *) HW_CAU_LDR_CA4_ADDR(x))
#define HW_CAU_LDR_CA4_WR(x, v) (HW_CAU_LDR_CA4(x).U = (v))
#define HW_CAU_LDR_CA4_WR(x, v) (ADDRESS_WRITE(hw_cau_ldr_ca4_t, HW_CAU_LDR_CA4_ADDR(x), v))
/*@}*/
/*
@ -1276,7 +1283,7 @@ typedef union _hw_cau_ldr_ca5
#define HW_CAU_LDR_CA5_ADDR(x) ((x) + 0x85CU)
#define HW_CAU_LDR_CA5(x) (*(__O hw_cau_ldr_ca5_t *) HW_CAU_LDR_CA5_ADDR(x))
#define HW_CAU_LDR_CA5_WR(x, v) (HW_CAU_LDR_CA5(x).U = (v))
#define HW_CAU_LDR_CA5_WR(x, v) (ADDRESS_WRITE(hw_cau_ldr_ca5_t, HW_CAU_LDR_CA5_ADDR(x), v))
/*@}*/
/*
@ -1320,7 +1327,7 @@ typedef union _hw_cau_ldr_ca6
#define HW_CAU_LDR_CA6_ADDR(x) ((x) + 0x860U)
#define HW_CAU_LDR_CA6(x) (*(__O hw_cau_ldr_ca6_t *) HW_CAU_LDR_CA6_ADDR(x))
#define HW_CAU_LDR_CA6_WR(x, v) (HW_CAU_LDR_CA6(x).U = (v))
#define HW_CAU_LDR_CA6_WR(x, v) (ADDRESS_WRITE(hw_cau_ldr_ca6_t, HW_CAU_LDR_CA6_ADDR(x), v))
/*@}*/
/*
@ -1364,7 +1371,7 @@ typedef union _hw_cau_ldr_ca7
#define HW_CAU_LDR_CA7_ADDR(x) ((x) + 0x864U)
#define HW_CAU_LDR_CA7(x) (*(__O hw_cau_ldr_ca7_t *) HW_CAU_LDR_CA7_ADDR(x))
#define HW_CAU_LDR_CA7_WR(x, v) (HW_CAU_LDR_CA7(x).U = (v))
#define HW_CAU_LDR_CA7_WR(x, v) (ADDRESS_WRITE(hw_cau_ldr_ca7_t, HW_CAU_LDR_CA7_ADDR(x), v))
/*@}*/
/*
@ -1408,7 +1415,7 @@ typedef union _hw_cau_ldr_ca8
#define HW_CAU_LDR_CA8_ADDR(x) ((x) + 0x868U)
#define HW_CAU_LDR_CA8(x) (*(__O hw_cau_ldr_ca8_t *) HW_CAU_LDR_CA8_ADDR(x))
#define HW_CAU_LDR_CA8_WR(x, v) (HW_CAU_LDR_CA8(x).U = (v))
#define HW_CAU_LDR_CA8_WR(x, v) (ADDRESS_WRITE(hw_cau_ldr_ca8_t, HW_CAU_LDR_CA8_ADDR(x), v))
/*@}*/
/*
@ -1455,7 +1462,7 @@ typedef union _hw_cau_str_casr
#define HW_CAU_STR_CASR_ADDR(x) ((x) + 0x880U)
#define HW_CAU_STR_CASR(x) (*(__I hw_cau_str_casr_t *) HW_CAU_STR_CASR_ADDR(x))
#define HW_CAU_STR_CASR_RD(x) (HW_CAU_STR_CASR(x).U)
#define HW_CAU_STR_CASR_RD(x) (ADDRESS_READ(hw_cau_str_casr_t, HW_CAU_STR_CASR_ADDR(x)))
/*@}*/
/*
@ -1475,7 +1482,7 @@ typedef union _hw_cau_str_casr
#define BS_CAU_STR_CASR_IC (1U) /*!< Bit field size in bits for CAU_STR_CASR_IC. */
/*! @brief Read current value of the CAU_STR_CASR_IC field. */
#define BR_CAU_STR_CASR_IC(x) (HW_CAU_STR_CASR(x).B.IC)
#define BR_CAU_STR_CASR_IC(x) (UNION_READ(hw_cau_str_casr_t, HW_CAU_STR_CASR_ADDR(x), U, B.IC))
/*@}*/
/*!
@ -1491,7 +1498,7 @@ typedef union _hw_cau_str_casr
#define BS_CAU_STR_CASR_DPE (1U) /*!< Bit field size in bits for CAU_STR_CASR_DPE. */
/*! @brief Read current value of the CAU_STR_CASR_DPE field. */
#define BR_CAU_STR_CASR_DPE(x) (HW_CAU_STR_CASR(x).B.DPE)
#define BR_CAU_STR_CASR_DPE(x) (UNION_READ(hw_cau_str_casr_t, HW_CAU_STR_CASR_ADDR(x), U, B.DPE))
/*@}*/
/*!
@ -1508,7 +1515,7 @@ typedef union _hw_cau_str_casr
#define BS_CAU_STR_CASR_VER (4U) /*!< Bit field size in bits for CAU_STR_CASR_VER. */
/*! @brief Read current value of the CAU_STR_CASR_VER field. */
#define BR_CAU_STR_CASR_VER(x) (HW_CAU_STR_CASR(x).B.VER)
#define BR_CAU_STR_CASR_VER(x) (UNION_READ(hw_cau_str_casr_t, HW_CAU_STR_CASR_ADDR(x), U, B.VER))
/*@}*/
/*******************************************************************************
@ -1536,7 +1543,7 @@ typedef union _hw_cau_str_caa
#define HW_CAU_STR_CAA_ADDR(x) ((x) + 0x884U)
#define HW_CAU_STR_CAA(x) (*(__I hw_cau_str_caa_t *) HW_CAU_STR_CAA_ADDR(x))
#define HW_CAU_STR_CAA_RD(x) (HW_CAU_STR_CAA(x).U)
#define HW_CAU_STR_CAA_RD(x) (ADDRESS_READ(hw_cau_str_caa_t, HW_CAU_STR_CAA_ADDR(x)))
/*@}*/
/*
@ -1580,7 +1587,7 @@ typedef union _hw_cau_str_ca0
#define HW_CAU_STR_CA0_ADDR(x) ((x) + 0x888U)
#define HW_CAU_STR_CA0(x) (*(__I hw_cau_str_ca0_t *) HW_CAU_STR_CA0_ADDR(x))
#define HW_CAU_STR_CA0_RD(x) (HW_CAU_STR_CA0(x).U)
#define HW_CAU_STR_CA0_RD(x) (ADDRESS_READ(hw_cau_str_ca0_t, HW_CAU_STR_CA0_ADDR(x)))
/*@}*/
/*
@ -1624,7 +1631,7 @@ typedef union _hw_cau_str_ca1
#define HW_CAU_STR_CA1_ADDR(x) ((x) + 0x88CU)
#define HW_CAU_STR_CA1(x) (*(__I hw_cau_str_ca1_t *) HW_CAU_STR_CA1_ADDR(x))
#define HW_CAU_STR_CA1_RD(x) (HW_CAU_STR_CA1(x).U)
#define HW_CAU_STR_CA1_RD(x) (ADDRESS_READ(hw_cau_str_ca1_t, HW_CAU_STR_CA1_ADDR(x)))
/*@}*/
/*
@ -1668,7 +1675,7 @@ typedef union _hw_cau_str_ca2
#define HW_CAU_STR_CA2_ADDR(x) ((x) + 0x890U)
#define HW_CAU_STR_CA2(x) (*(__I hw_cau_str_ca2_t *) HW_CAU_STR_CA2_ADDR(x))
#define HW_CAU_STR_CA2_RD(x) (HW_CAU_STR_CA2(x).U)
#define HW_CAU_STR_CA2_RD(x) (ADDRESS_READ(hw_cau_str_ca2_t, HW_CAU_STR_CA2_ADDR(x)))
/*@}*/
/*
@ -1712,7 +1719,7 @@ typedef union _hw_cau_str_ca3
#define HW_CAU_STR_CA3_ADDR(x) ((x) + 0x894U)
#define HW_CAU_STR_CA3(x) (*(__I hw_cau_str_ca3_t *) HW_CAU_STR_CA3_ADDR(x))
#define HW_CAU_STR_CA3_RD(x) (HW_CAU_STR_CA3(x).U)
#define HW_CAU_STR_CA3_RD(x) (ADDRESS_READ(hw_cau_str_ca3_t, HW_CAU_STR_CA3_ADDR(x)))
/*@}*/
/*
@ -1756,7 +1763,7 @@ typedef union _hw_cau_str_ca4
#define HW_CAU_STR_CA4_ADDR(x) ((x) + 0x898U)
#define HW_CAU_STR_CA4(x) (*(__I hw_cau_str_ca4_t *) HW_CAU_STR_CA4_ADDR(x))
#define HW_CAU_STR_CA4_RD(x) (HW_CAU_STR_CA4(x).U)
#define HW_CAU_STR_CA4_RD(x) (ADDRESS_READ(hw_cau_str_ca4_t, HW_CAU_STR_CA4_ADDR(x)))
/*@}*/
/*
@ -1800,7 +1807,7 @@ typedef union _hw_cau_str_ca5
#define HW_CAU_STR_CA5_ADDR(x) ((x) + 0x89CU)
#define HW_CAU_STR_CA5(x) (*(__I hw_cau_str_ca5_t *) HW_CAU_STR_CA5_ADDR(x))
#define HW_CAU_STR_CA5_RD(x) (HW_CAU_STR_CA5(x).U)
#define HW_CAU_STR_CA5_RD(x) (ADDRESS_READ(hw_cau_str_ca5_t, HW_CAU_STR_CA5_ADDR(x)))
/*@}*/
/*
@ -1844,7 +1851,7 @@ typedef union _hw_cau_str_ca6
#define HW_CAU_STR_CA6_ADDR(x) ((x) + 0x8A0U)
#define HW_CAU_STR_CA6(x) (*(__I hw_cau_str_ca6_t *) HW_CAU_STR_CA6_ADDR(x))
#define HW_CAU_STR_CA6_RD(x) (HW_CAU_STR_CA6(x).U)
#define HW_CAU_STR_CA6_RD(x) (ADDRESS_READ(hw_cau_str_ca6_t, HW_CAU_STR_CA6_ADDR(x)))
/*@}*/
/*
@ -1888,7 +1895,7 @@ typedef union _hw_cau_str_ca7
#define HW_CAU_STR_CA7_ADDR(x) ((x) + 0x8A4U)
#define HW_CAU_STR_CA7(x) (*(__I hw_cau_str_ca7_t *) HW_CAU_STR_CA7_ADDR(x))
#define HW_CAU_STR_CA7_RD(x) (HW_CAU_STR_CA7(x).U)
#define HW_CAU_STR_CA7_RD(x) (ADDRESS_READ(hw_cau_str_ca7_t, HW_CAU_STR_CA7_ADDR(x)))
/*@}*/
/*
@ -1932,7 +1939,7 @@ typedef union _hw_cau_str_ca8
#define HW_CAU_STR_CA8_ADDR(x) ((x) + 0x8A8U)
#define HW_CAU_STR_CA8(x) (*(__I hw_cau_str_ca8_t *) HW_CAU_STR_CA8_ADDR(x))
#define HW_CAU_STR_CA8_RD(x) (HW_CAU_STR_CA8(x).U)
#define HW_CAU_STR_CA8_RD(x) (ADDRESS_READ(hw_cau_str_ca8_t, HW_CAU_STR_CA8_ADDR(x)))
/*@}*/
/*
@ -1979,7 +1986,7 @@ typedef union _hw_cau_adr_casr
#define HW_CAU_ADR_CASR_ADDR(x) ((x) + 0x8C0U)
#define HW_CAU_ADR_CASR(x) (*(__O hw_cau_adr_casr_t *) HW_CAU_ADR_CASR_ADDR(x))
#define HW_CAU_ADR_CASR_WR(x, v) (HW_CAU_ADR_CASR(x).U = (v))
#define HW_CAU_ADR_CASR_WR(x, v) (ADDRESS_WRITE(hw_cau_adr_casr_t, HW_CAU_ADR_CASR_ADDR(x), v))
/*@}*/
/*
@ -2060,7 +2067,7 @@ typedef union _hw_cau_adr_caa
#define HW_CAU_ADR_CAA_ADDR(x) ((x) + 0x8C4U)
#define HW_CAU_ADR_CAA(x) (*(__O hw_cau_adr_caa_t *) HW_CAU_ADR_CAA_ADDR(x))
#define HW_CAU_ADR_CAA_WR(x, v) (HW_CAU_ADR_CAA(x).U = (v))
#define HW_CAU_ADR_CAA_WR(x, v) (ADDRESS_WRITE(hw_cau_adr_caa_t, HW_CAU_ADR_CAA_ADDR(x), v))
/*@}*/
/*
@ -2104,7 +2111,7 @@ typedef union _hw_cau_adr_ca0
#define HW_CAU_ADR_CA0_ADDR(x) ((x) + 0x8C8U)
#define HW_CAU_ADR_CA0(x) (*(__O hw_cau_adr_ca0_t *) HW_CAU_ADR_CA0_ADDR(x))
#define HW_CAU_ADR_CA0_WR(x, v) (HW_CAU_ADR_CA0(x).U = (v))
#define HW_CAU_ADR_CA0_WR(x, v) (ADDRESS_WRITE(hw_cau_adr_ca0_t, HW_CAU_ADR_CA0_ADDR(x), v))
/*@}*/
/*
@ -2148,7 +2155,7 @@ typedef union _hw_cau_adr_ca1
#define HW_CAU_ADR_CA1_ADDR(x) ((x) + 0x8CCU)
#define HW_CAU_ADR_CA1(x) (*(__O hw_cau_adr_ca1_t *) HW_CAU_ADR_CA1_ADDR(x))
#define HW_CAU_ADR_CA1_WR(x, v) (HW_CAU_ADR_CA1(x).U = (v))
#define HW_CAU_ADR_CA1_WR(x, v) (ADDRESS_WRITE(hw_cau_adr_ca1_t, HW_CAU_ADR_CA1_ADDR(x), v))
/*@}*/
/*
@ -2192,7 +2199,7 @@ typedef union _hw_cau_adr_ca2
#define HW_CAU_ADR_CA2_ADDR(x) ((x) + 0x8D0U)
#define HW_CAU_ADR_CA2(x) (*(__O hw_cau_adr_ca2_t *) HW_CAU_ADR_CA2_ADDR(x))
#define HW_CAU_ADR_CA2_WR(x, v) (HW_CAU_ADR_CA2(x).U = (v))
#define HW_CAU_ADR_CA2_WR(x, v) (ADDRESS_WRITE(hw_cau_adr_ca2_t, HW_CAU_ADR_CA2_ADDR(x), v))
/*@}*/
/*
@ -2236,7 +2243,7 @@ typedef union _hw_cau_adr_ca3
#define HW_CAU_ADR_CA3_ADDR(x) ((x) + 0x8D4U)
#define HW_CAU_ADR_CA3(x) (*(__O hw_cau_adr_ca3_t *) HW_CAU_ADR_CA3_ADDR(x))
#define HW_CAU_ADR_CA3_WR(x, v) (HW_CAU_ADR_CA3(x).U = (v))
#define HW_CAU_ADR_CA3_WR(x, v) (ADDRESS_WRITE(hw_cau_adr_ca3_t, HW_CAU_ADR_CA3_ADDR(x), v))
/*@}*/
/*
@ -2280,7 +2287,7 @@ typedef union _hw_cau_adr_ca4
#define HW_CAU_ADR_CA4_ADDR(x) ((x) + 0x8D8U)
#define HW_CAU_ADR_CA4(x) (*(__O hw_cau_adr_ca4_t *) HW_CAU_ADR_CA4_ADDR(x))
#define HW_CAU_ADR_CA4_WR(x, v) (HW_CAU_ADR_CA4(x).U = (v))
#define HW_CAU_ADR_CA4_WR(x, v) (ADDRESS_WRITE(hw_cau_adr_ca4_t, HW_CAU_ADR_CA4_ADDR(x), v))
/*@}*/
/*
@ -2324,7 +2331,7 @@ typedef union _hw_cau_adr_ca5
#define HW_CAU_ADR_CA5_ADDR(x) ((x) + 0x8DCU)
#define HW_CAU_ADR_CA5(x) (*(__O hw_cau_adr_ca5_t *) HW_CAU_ADR_CA5_ADDR(x))
#define HW_CAU_ADR_CA5_WR(x, v) (HW_CAU_ADR_CA5(x).U = (v))
#define HW_CAU_ADR_CA5_WR(x, v) (ADDRESS_WRITE(hw_cau_adr_ca5_t, HW_CAU_ADR_CA5_ADDR(x), v))
/*@}*/
/*
@ -2368,7 +2375,7 @@ typedef union _hw_cau_adr_ca6
#define HW_CAU_ADR_CA6_ADDR(x) ((x) + 0x8E0U)
#define HW_CAU_ADR_CA6(x) (*(__O hw_cau_adr_ca6_t *) HW_CAU_ADR_CA6_ADDR(x))
#define HW_CAU_ADR_CA6_WR(x, v) (HW_CAU_ADR_CA6(x).U = (v))
#define HW_CAU_ADR_CA6_WR(x, v) (ADDRESS_WRITE(hw_cau_adr_ca6_t, HW_CAU_ADR_CA6_ADDR(x), v))
/*@}*/
/*
@ -2412,7 +2419,7 @@ typedef union _hw_cau_adr_ca7
#define HW_CAU_ADR_CA7_ADDR(x) ((x) + 0x8E4U)
#define HW_CAU_ADR_CA7(x) (*(__O hw_cau_adr_ca7_t *) HW_CAU_ADR_CA7_ADDR(x))
#define HW_CAU_ADR_CA7_WR(x, v) (HW_CAU_ADR_CA7(x).U = (v))
#define HW_CAU_ADR_CA7_WR(x, v) (ADDRESS_WRITE(hw_cau_adr_ca7_t, HW_CAU_ADR_CA7_ADDR(x), v))
/*@}*/
/*
@ -2456,7 +2463,7 @@ typedef union _hw_cau_adr_ca8
#define HW_CAU_ADR_CA8_ADDR(x) ((x) + 0x8E8U)
#define HW_CAU_ADR_CA8(x) (*(__O hw_cau_adr_ca8_t *) HW_CAU_ADR_CA8_ADDR(x))
#define HW_CAU_ADR_CA8_WR(x, v) (HW_CAU_ADR_CA8(x).U = (v))
#define HW_CAU_ADR_CA8_WR(x, v) (ADDRESS_WRITE(hw_cau_adr_ca8_t, HW_CAU_ADR_CA8_ADDR(x), v))
/*@}*/
/*
@ -2503,7 +2510,7 @@ typedef union _hw_cau_radr_casr
#define HW_CAU_RADR_CASR_ADDR(x) ((x) + 0x900U)
#define HW_CAU_RADR_CASR(x) (*(__O hw_cau_radr_casr_t *) HW_CAU_RADR_CASR_ADDR(x))
#define HW_CAU_RADR_CASR_WR(x, v) (HW_CAU_RADR_CASR(x).U = (v))
#define HW_CAU_RADR_CASR_WR(x, v) (ADDRESS_WRITE(hw_cau_radr_casr_t, HW_CAU_RADR_CASR_ADDR(x), v))
/*@}*/
/*
@ -2584,7 +2591,7 @@ typedef union _hw_cau_radr_caa
#define HW_CAU_RADR_CAA_ADDR(x) ((x) + 0x904U)
#define HW_CAU_RADR_CAA(x) (*(__O hw_cau_radr_caa_t *) HW_CAU_RADR_CAA_ADDR(x))
#define HW_CAU_RADR_CAA_WR(x, v) (HW_CAU_RADR_CAA(x).U = (v))
#define HW_CAU_RADR_CAA_WR(x, v) (ADDRESS_WRITE(hw_cau_radr_caa_t, HW_CAU_RADR_CAA_ADDR(x), v))
/*@}*/
/*
@ -2628,7 +2635,7 @@ typedef union _hw_cau_radr_ca0
#define HW_CAU_RADR_CA0_ADDR(x) ((x) + 0x908U)
#define HW_CAU_RADR_CA0(x) (*(__O hw_cau_radr_ca0_t *) HW_CAU_RADR_CA0_ADDR(x))
#define HW_CAU_RADR_CA0_WR(x, v) (HW_CAU_RADR_CA0(x).U = (v))
#define HW_CAU_RADR_CA0_WR(x, v) (ADDRESS_WRITE(hw_cau_radr_ca0_t, HW_CAU_RADR_CA0_ADDR(x), v))
/*@}*/
/*
@ -2672,7 +2679,7 @@ typedef union _hw_cau_radr_ca1
#define HW_CAU_RADR_CA1_ADDR(x) ((x) + 0x90CU)
#define HW_CAU_RADR_CA1(x) (*(__O hw_cau_radr_ca1_t *) HW_CAU_RADR_CA1_ADDR(x))
#define HW_CAU_RADR_CA1_WR(x, v) (HW_CAU_RADR_CA1(x).U = (v))
#define HW_CAU_RADR_CA1_WR(x, v) (ADDRESS_WRITE(hw_cau_radr_ca1_t, HW_CAU_RADR_CA1_ADDR(x), v))
/*@}*/
/*
@ -2716,7 +2723,7 @@ typedef union _hw_cau_radr_ca2
#define HW_CAU_RADR_CA2_ADDR(x) ((x) + 0x910U)
#define HW_CAU_RADR_CA2(x) (*(__O hw_cau_radr_ca2_t *) HW_CAU_RADR_CA2_ADDR(x))
#define HW_CAU_RADR_CA2_WR(x, v) (HW_CAU_RADR_CA2(x).U = (v))
#define HW_CAU_RADR_CA2_WR(x, v) (ADDRESS_WRITE(hw_cau_radr_ca2_t, HW_CAU_RADR_CA2_ADDR(x), v))
/*@}*/
/*
@ -2760,7 +2767,7 @@ typedef union _hw_cau_radr_ca3
#define HW_CAU_RADR_CA3_ADDR(x) ((x) + 0x914U)
#define HW_CAU_RADR_CA3(x) (*(__O hw_cau_radr_ca3_t *) HW_CAU_RADR_CA3_ADDR(x))
#define HW_CAU_RADR_CA3_WR(x, v) (HW_CAU_RADR_CA3(x).U = (v))
#define HW_CAU_RADR_CA3_WR(x, v) (ADDRESS_WRITE(hw_cau_radr_ca3_t, HW_CAU_RADR_CA3_ADDR(x), v))
/*@}*/
/*
@ -2804,7 +2811,7 @@ typedef union _hw_cau_radr_ca4
#define HW_CAU_RADR_CA4_ADDR(x) ((x) + 0x918U)
#define HW_CAU_RADR_CA4(x) (*(__O hw_cau_radr_ca4_t *) HW_CAU_RADR_CA4_ADDR(x))
#define HW_CAU_RADR_CA4_WR(x, v) (HW_CAU_RADR_CA4(x).U = (v))
#define HW_CAU_RADR_CA4_WR(x, v) (ADDRESS_WRITE(hw_cau_radr_ca4_t, HW_CAU_RADR_CA4_ADDR(x), v))
/*@}*/
/*
@ -2848,7 +2855,7 @@ typedef union _hw_cau_radr_ca5
#define HW_CAU_RADR_CA5_ADDR(x) ((x) + 0x91CU)
#define HW_CAU_RADR_CA5(x) (*(__O hw_cau_radr_ca5_t *) HW_CAU_RADR_CA5_ADDR(x))
#define HW_CAU_RADR_CA5_WR(x, v) (HW_CAU_RADR_CA5(x).U = (v))
#define HW_CAU_RADR_CA5_WR(x, v) (ADDRESS_WRITE(hw_cau_radr_ca5_t, HW_CAU_RADR_CA5_ADDR(x), v))
/*@}*/
/*
@ -2892,7 +2899,7 @@ typedef union _hw_cau_radr_ca6
#define HW_CAU_RADR_CA6_ADDR(x) ((x) + 0x920U)
#define HW_CAU_RADR_CA6(x) (*(__O hw_cau_radr_ca6_t *) HW_CAU_RADR_CA6_ADDR(x))
#define HW_CAU_RADR_CA6_WR(x, v) (HW_CAU_RADR_CA6(x).U = (v))
#define HW_CAU_RADR_CA6_WR(x, v) (ADDRESS_WRITE(hw_cau_radr_ca6_t, HW_CAU_RADR_CA6_ADDR(x), v))
/*@}*/
/*
@ -2936,7 +2943,7 @@ typedef union _hw_cau_radr_ca7
#define HW_CAU_RADR_CA7_ADDR(x) ((x) + 0x924U)
#define HW_CAU_RADR_CA7(x) (*(__O hw_cau_radr_ca7_t *) HW_CAU_RADR_CA7_ADDR(x))
#define HW_CAU_RADR_CA7_WR(x, v) (HW_CAU_RADR_CA7(x).U = (v))
#define HW_CAU_RADR_CA7_WR(x, v) (ADDRESS_WRITE(hw_cau_radr_ca7_t, HW_CAU_RADR_CA7_ADDR(x), v))
/*@}*/
/*
@ -2980,7 +2987,7 @@ typedef union _hw_cau_radr_ca8
#define HW_CAU_RADR_CA8_ADDR(x) ((x) + 0x928U)
#define HW_CAU_RADR_CA8(x) (*(__O hw_cau_radr_ca8_t *) HW_CAU_RADR_CA8_ADDR(x))
#define HW_CAU_RADR_CA8_WR(x, v) (HW_CAU_RADR_CA8(x).U = (v))
#define HW_CAU_RADR_CA8_WR(x, v) (ADDRESS_WRITE(hw_cau_radr_ca8_t, HW_CAU_RADR_CA8_ADDR(x), v))
/*@}*/
/*
@ -3027,7 +3034,7 @@ typedef union _hw_cau_xor_casr
#define HW_CAU_XOR_CASR_ADDR(x) ((x) + 0x980U)
#define HW_CAU_XOR_CASR(x) (*(__O hw_cau_xor_casr_t *) HW_CAU_XOR_CASR_ADDR(x))
#define HW_CAU_XOR_CASR_WR(x, v) (HW_CAU_XOR_CASR(x).U = (v))
#define HW_CAU_XOR_CASR_WR(x, v) (ADDRESS_WRITE(hw_cau_xor_casr_t, HW_CAU_XOR_CASR_ADDR(x), v))
/*@}*/
/*
@ -3108,7 +3115,7 @@ typedef union _hw_cau_xor_caa
#define HW_CAU_XOR_CAA_ADDR(x) ((x) + 0x984U)
#define HW_CAU_XOR_CAA(x) (*(__O hw_cau_xor_caa_t *) HW_CAU_XOR_CAA_ADDR(x))
#define HW_CAU_XOR_CAA_WR(x, v) (HW_CAU_XOR_CAA(x).U = (v))
#define HW_CAU_XOR_CAA_WR(x, v) (ADDRESS_WRITE(hw_cau_xor_caa_t, HW_CAU_XOR_CAA_ADDR(x), v))
/*@}*/
/*
@ -3152,7 +3159,7 @@ typedef union _hw_cau_xor_ca0
#define HW_CAU_XOR_CA0_ADDR(x) ((x) + 0x988U)
#define HW_CAU_XOR_CA0(x) (*(__O hw_cau_xor_ca0_t *) HW_CAU_XOR_CA0_ADDR(x))
#define HW_CAU_XOR_CA0_WR(x, v) (HW_CAU_XOR_CA0(x).U = (v))
#define HW_CAU_XOR_CA0_WR(x, v) (ADDRESS_WRITE(hw_cau_xor_ca0_t, HW_CAU_XOR_CA0_ADDR(x), v))
/*@}*/
/*
@ -3196,7 +3203,7 @@ typedef union _hw_cau_xor_ca1
#define HW_CAU_XOR_CA1_ADDR(x) ((x) + 0x98CU)
#define HW_CAU_XOR_CA1(x) (*(__O hw_cau_xor_ca1_t *) HW_CAU_XOR_CA1_ADDR(x))
#define HW_CAU_XOR_CA1_WR(x, v) (HW_CAU_XOR_CA1(x).U = (v))
#define HW_CAU_XOR_CA1_WR(x, v) (ADDRESS_WRITE(hw_cau_xor_ca1_t, HW_CAU_XOR_CA1_ADDR(x), v))
/*@}*/
/*
@ -3240,7 +3247,7 @@ typedef union _hw_cau_xor_ca2
#define HW_CAU_XOR_CA2_ADDR(x) ((x) + 0x990U)
#define HW_CAU_XOR_CA2(x) (*(__O hw_cau_xor_ca2_t *) HW_CAU_XOR_CA2_ADDR(x))
#define HW_CAU_XOR_CA2_WR(x, v) (HW_CAU_XOR_CA2(x).U = (v))
#define HW_CAU_XOR_CA2_WR(x, v) (ADDRESS_WRITE(hw_cau_xor_ca2_t, HW_CAU_XOR_CA2_ADDR(x), v))
/*@}*/
/*
@ -3284,7 +3291,7 @@ typedef union _hw_cau_xor_ca3
#define HW_CAU_XOR_CA3_ADDR(x) ((x) + 0x994U)
#define HW_CAU_XOR_CA3(x) (*(__O hw_cau_xor_ca3_t *) HW_CAU_XOR_CA3_ADDR(x))
#define HW_CAU_XOR_CA3_WR(x, v) (HW_CAU_XOR_CA3(x).U = (v))
#define HW_CAU_XOR_CA3_WR(x, v) (ADDRESS_WRITE(hw_cau_xor_ca3_t, HW_CAU_XOR_CA3_ADDR(x), v))
/*@}*/
/*
@ -3328,7 +3335,7 @@ typedef union _hw_cau_xor_ca4
#define HW_CAU_XOR_CA4_ADDR(x) ((x) + 0x998U)
#define HW_CAU_XOR_CA4(x) (*(__O hw_cau_xor_ca4_t *) HW_CAU_XOR_CA4_ADDR(x))
#define HW_CAU_XOR_CA4_WR(x, v) (HW_CAU_XOR_CA4(x).U = (v))
#define HW_CAU_XOR_CA4_WR(x, v) (ADDRESS_WRITE(hw_cau_xor_ca4_t, HW_CAU_XOR_CA4_ADDR(x), v))
/*@}*/
/*
@ -3372,7 +3379,7 @@ typedef union _hw_cau_xor_ca5
#define HW_CAU_XOR_CA5_ADDR(x) ((x) + 0x99CU)
#define HW_CAU_XOR_CA5(x) (*(__O hw_cau_xor_ca5_t *) HW_CAU_XOR_CA5_ADDR(x))
#define HW_CAU_XOR_CA5_WR(x, v) (HW_CAU_XOR_CA5(x).U = (v))
#define HW_CAU_XOR_CA5_WR(x, v) (ADDRESS_WRITE(hw_cau_xor_ca5_t, HW_CAU_XOR_CA5_ADDR(x), v))
/*@}*/
/*
@ -3416,7 +3423,7 @@ typedef union _hw_cau_xor_ca6
#define HW_CAU_XOR_CA6_ADDR(x) ((x) + 0x9A0U)
#define HW_CAU_XOR_CA6(x) (*(__O hw_cau_xor_ca6_t *) HW_CAU_XOR_CA6_ADDR(x))
#define HW_CAU_XOR_CA6_WR(x, v) (HW_CAU_XOR_CA6(x).U = (v))
#define HW_CAU_XOR_CA6_WR(x, v) (ADDRESS_WRITE(hw_cau_xor_ca6_t, HW_CAU_XOR_CA6_ADDR(x), v))
/*@}*/
/*
@ -3460,7 +3467,7 @@ typedef union _hw_cau_xor_ca7
#define HW_CAU_XOR_CA7_ADDR(x) ((x) + 0x9A4U)
#define HW_CAU_XOR_CA7(x) (*(__O hw_cau_xor_ca7_t *) HW_CAU_XOR_CA7_ADDR(x))
#define HW_CAU_XOR_CA7_WR(x, v) (HW_CAU_XOR_CA7(x).U = (v))
#define HW_CAU_XOR_CA7_WR(x, v) (ADDRESS_WRITE(hw_cau_xor_ca7_t, HW_CAU_XOR_CA7_ADDR(x), v))
/*@}*/
/*
@ -3504,7 +3511,7 @@ typedef union _hw_cau_xor_ca8
#define HW_CAU_XOR_CA8_ADDR(x) ((x) + 0x9A8U)
#define HW_CAU_XOR_CA8(x) (*(__O hw_cau_xor_ca8_t *) HW_CAU_XOR_CA8_ADDR(x))
#define HW_CAU_XOR_CA8_WR(x, v) (HW_CAU_XOR_CA8(x).U = (v))
#define HW_CAU_XOR_CA8_WR(x, v) (ADDRESS_WRITE(hw_cau_xor_ca8_t, HW_CAU_XOR_CA8_ADDR(x), v))
/*@}*/
/*
@ -3551,7 +3558,7 @@ typedef union _hw_cau_rotl_casr
#define HW_CAU_ROTL_CASR_ADDR(x) ((x) + 0x9C0U)
#define HW_CAU_ROTL_CASR(x) (*(__O hw_cau_rotl_casr_t *) HW_CAU_ROTL_CASR_ADDR(x))
#define HW_CAU_ROTL_CASR_WR(x, v) (HW_CAU_ROTL_CASR(x).U = (v))
#define HW_CAU_ROTL_CASR_WR(x, v) (ADDRESS_WRITE(hw_cau_rotl_casr_t, HW_CAU_ROTL_CASR_ADDR(x), v))
/*@}*/
/*
@ -3632,7 +3639,7 @@ typedef union _hw_cau_rotl_caa
#define HW_CAU_ROTL_CAA_ADDR(x) ((x) + 0x9C4U)
#define HW_CAU_ROTL_CAA(x) (*(__O hw_cau_rotl_caa_t *) HW_CAU_ROTL_CAA_ADDR(x))
#define HW_CAU_ROTL_CAA_WR(x, v) (HW_CAU_ROTL_CAA(x).U = (v))
#define HW_CAU_ROTL_CAA_WR(x, v) (ADDRESS_WRITE(hw_cau_rotl_caa_t, HW_CAU_ROTL_CAA_ADDR(x), v))
/*@}*/
/*
@ -3676,7 +3683,7 @@ typedef union _hw_cau_rotl_ca0
#define HW_CAU_ROTL_CA0_ADDR(x) ((x) + 0x9C8U)
#define HW_CAU_ROTL_CA0(x) (*(__O hw_cau_rotl_ca0_t *) HW_CAU_ROTL_CA0_ADDR(x))
#define HW_CAU_ROTL_CA0_WR(x, v) (HW_CAU_ROTL_CA0(x).U = (v))
#define HW_CAU_ROTL_CA0_WR(x, v) (ADDRESS_WRITE(hw_cau_rotl_ca0_t, HW_CAU_ROTL_CA0_ADDR(x), v))
/*@}*/
/*
@ -3720,7 +3727,7 @@ typedef union _hw_cau_rotl_ca1
#define HW_CAU_ROTL_CA1_ADDR(x) ((x) + 0x9CCU)
#define HW_CAU_ROTL_CA1(x) (*(__O hw_cau_rotl_ca1_t *) HW_CAU_ROTL_CA1_ADDR(x))
#define HW_CAU_ROTL_CA1_WR(x, v) (HW_CAU_ROTL_CA1(x).U = (v))
#define HW_CAU_ROTL_CA1_WR(x, v) (ADDRESS_WRITE(hw_cau_rotl_ca1_t, HW_CAU_ROTL_CA1_ADDR(x), v))
/*@}*/
/*
@ -3764,7 +3771,7 @@ typedef union _hw_cau_rotl_ca2
#define HW_CAU_ROTL_CA2_ADDR(x) ((x) + 0x9D0U)
#define HW_CAU_ROTL_CA2(x) (*(__O hw_cau_rotl_ca2_t *) HW_CAU_ROTL_CA2_ADDR(x))
#define HW_CAU_ROTL_CA2_WR(x, v) (HW_CAU_ROTL_CA2(x).U = (v))
#define HW_CAU_ROTL_CA2_WR(x, v) (ADDRESS_WRITE(hw_cau_rotl_ca2_t, HW_CAU_ROTL_CA2_ADDR(x), v))
/*@}*/
/*
@ -3808,7 +3815,7 @@ typedef union _hw_cau_rotl_ca3
#define HW_CAU_ROTL_CA3_ADDR(x) ((x) + 0x9D4U)
#define HW_CAU_ROTL_CA3(x) (*(__O hw_cau_rotl_ca3_t *) HW_CAU_ROTL_CA3_ADDR(x))
#define HW_CAU_ROTL_CA3_WR(x, v) (HW_CAU_ROTL_CA3(x).U = (v))
#define HW_CAU_ROTL_CA3_WR(x, v) (ADDRESS_WRITE(hw_cau_rotl_ca3_t, HW_CAU_ROTL_CA3_ADDR(x), v))
/*@}*/
/*
@ -3852,7 +3859,7 @@ typedef union _hw_cau_rotl_ca4
#define HW_CAU_ROTL_CA4_ADDR(x) ((x) + 0x9D8U)
#define HW_CAU_ROTL_CA4(x) (*(__O hw_cau_rotl_ca4_t *) HW_CAU_ROTL_CA4_ADDR(x))
#define HW_CAU_ROTL_CA4_WR(x, v) (HW_CAU_ROTL_CA4(x).U = (v))
#define HW_CAU_ROTL_CA4_WR(x, v) (ADDRESS_WRITE(hw_cau_rotl_ca4_t, HW_CAU_ROTL_CA4_ADDR(x), v))
/*@}*/
/*
@ -3896,7 +3903,7 @@ typedef union _hw_cau_rotl_ca5
#define HW_CAU_ROTL_CA5_ADDR(x) ((x) + 0x9DCU)
#define HW_CAU_ROTL_CA5(x) (*(__O hw_cau_rotl_ca5_t *) HW_CAU_ROTL_CA5_ADDR(x))
#define HW_CAU_ROTL_CA5_WR(x, v) (HW_CAU_ROTL_CA5(x).U = (v))
#define HW_CAU_ROTL_CA5_WR(x, v) (ADDRESS_WRITE(hw_cau_rotl_ca5_t, HW_CAU_ROTL_CA5_ADDR(x), v))
/*@}*/
/*
@ -3940,7 +3947,7 @@ typedef union _hw_cau_rotl_ca6
#define HW_CAU_ROTL_CA6_ADDR(x) ((x) + 0x9E0U)
#define HW_CAU_ROTL_CA6(x) (*(__O hw_cau_rotl_ca6_t *) HW_CAU_ROTL_CA6_ADDR(x))
#define HW_CAU_ROTL_CA6_WR(x, v) (HW_CAU_ROTL_CA6(x).U = (v))
#define HW_CAU_ROTL_CA6_WR(x, v) (ADDRESS_WRITE(hw_cau_rotl_ca6_t, HW_CAU_ROTL_CA6_ADDR(x), v))
/*@}*/
/*
@ -3984,7 +3991,7 @@ typedef union _hw_cau_rotl_ca7
#define HW_CAU_ROTL_CA7_ADDR(x) ((x) + 0x9E4U)
#define HW_CAU_ROTL_CA7(x) (*(__O hw_cau_rotl_ca7_t *) HW_CAU_ROTL_CA7_ADDR(x))
#define HW_CAU_ROTL_CA7_WR(x, v) (HW_CAU_ROTL_CA7(x).U = (v))
#define HW_CAU_ROTL_CA7_WR(x, v) (ADDRESS_WRITE(hw_cau_rotl_ca7_t, HW_CAU_ROTL_CA7_ADDR(x), v))
/*@}*/
/*
@ -4028,7 +4035,7 @@ typedef union _hw_cau_rotl_ca8
#define HW_CAU_ROTL_CA8_ADDR(x) ((x) + 0x9E8U)
#define HW_CAU_ROTL_CA8(x) (*(__O hw_cau_rotl_ca8_t *) HW_CAU_ROTL_CA8_ADDR(x))
#define HW_CAU_ROTL_CA8_WR(x, v) (HW_CAU_ROTL_CA8(x).U = (v))
#define HW_CAU_ROTL_CA8_WR(x, v) (ADDRESS_WRITE(hw_cau_rotl_ca8_t, HW_CAU_ROTL_CA8_ADDR(x), v))
/*@}*/
/*
@ -4075,7 +4082,7 @@ typedef union _hw_cau_aesc_casr
#define HW_CAU_AESC_CASR_ADDR(x) ((x) + 0xB00U)
#define HW_CAU_AESC_CASR(x) (*(__O hw_cau_aesc_casr_t *) HW_CAU_AESC_CASR_ADDR(x))
#define HW_CAU_AESC_CASR_WR(x, v) (HW_CAU_AESC_CASR(x).U = (v))
#define HW_CAU_AESC_CASR_WR(x, v) (ADDRESS_WRITE(hw_cau_aesc_casr_t, HW_CAU_AESC_CASR_ADDR(x), v))
/*@}*/
/*
@ -4156,7 +4163,7 @@ typedef union _hw_cau_aesc_caa
#define HW_CAU_AESC_CAA_ADDR(x) ((x) + 0xB04U)
#define HW_CAU_AESC_CAA(x) (*(__O hw_cau_aesc_caa_t *) HW_CAU_AESC_CAA_ADDR(x))
#define HW_CAU_AESC_CAA_WR(x, v) (HW_CAU_AESC_CAA(x).U = (v))
#define HW_CAU_AESC_CAA_WR(x, v) (ADDRESS_WRITE(hw_cau_aesc_caa_t, HW_CAU_AESC_CAA_ADDR(x), v))
/*@}*/
/*
@ -4200,7 +4207,7 @@ typedef union _hw_cau_aesc_ca0
#define HW_CAU_AESC_CA0_ADDR(x) ((x) + 0xB08U)
#define HW_CAU_AESC_CA0(x) (*(__O hw_cau_aesc_ca0_t *) HW_CAU_AESC_CA0_ADDR(x))
#define HW_CAU_AESC_CA0_WR(x, v) (HW_CAU_AESC_CA0(x).U = (v))
#define HW_CAU_AESC_CA0_WR(x, v) (ADDRESS_WRITE(hw_cau_aesc_ca0_t, HW_CAU_AESC_CA0_ADDR(x), v))
/*@}*/
/*
@ -4244,7 +4251,7 @@ typedef union _hw_cau_aesc_ca1
#define HW_CAU_AESC_CA1_ADDR(x) ((x) + 0xB0CU)
#define HW_CAU_AESC_CA1(x) (*(__O hw_cau_aesc_ca1_t *) HW_CAU_AESC_CA1_ADDR(x))
#define HW_CAU_AESC_CA1_WR(x, v) (HW_CAU_AESC_CA1(x).U = (v))
#define HW_CAU_AESC_CA1_WR(x, v) (ADDRESS_WRITE(hw_cau_aesc_ca1_t, HW_CAU_AESC_CA1_ADDR(x), v))
/*@}*/
/*
@ -4288,7 +4295,7 @@ typedef union _hw_cau_aesc_ca2
#define HW_CAU_AESC_CA2_ADDR(x) ((x) + 0xB10U)
#define HW_CAU_AESC_CA2(x) (*(__O hw_cau_aesc_ca2_t *) HW_CAU_AESC_CA2_ADDR(x))
#define HW_CAU_AESC_CA2_WR(x, v) (HW_CAU_AESC_CA2(x).U = (v))
#define HW_CAU_AESC_CA2_WR(x, v) (ADDRESS_WRITE(hw_cau_aesc_ca2_t, HW_CAU_AESC_CA2_ADDR(x), v))
/*@}*/
/*
@ -4332,7 +4339,7 @@ typedef union _hw_cau_aesc_ca3
#define HW_CAU_AESC_CA3_ADDR(x) ((x) + 0xB14U)
#define HW_CAU_AESC_CA3(x) (*(__O hw_cau_aesc_ca3_t *) HW_CAU_AESC_CA3_ADDR(x))
#define HW_CAU_AESC_CA3_WR(x, v) (HW_CAU_AESC_CA3(x).U = (v))
#define HW_CAU_AESC_CA3_WR(x, v) (ADDRESS_WRITE(hw_cau_aesc_ca3_t, HW_CAU_AESC_CA3_ADDR(x), v))
/*@}*/
/*
@ -4376,7 +4383,7 @@ typedef union _hw_cau_aesc_ca4
#define HW_CAU_AESC_CA4_ADDR(x) ((x) + 0xB18U)
#define HW_CAU_AESC_CA4(x) (*(__O hw_cau_aesc_ca4_t *) HW_CAU_AESC_CA4_ADDR(x))
#define HW_CAU_AESC_CA4_WR(x, v) (HW_CAU_AESC_CA4(x).U = (v))
#define HW_CAU_AESC_CA4_WR(x, v) (ADDRESS_WRITE(hw_cau_aesc_ca4_t, HW_CAU_AESC_CA4_ADDR(x), v))
/*@}*/
/*
@ -4420,7 +4427,7 @@ typedef union _hw_cau_aesc_ca5
#define HW_CAU_AESC_CA5_ADDR(x) ((x) + 0xB1CU)
#define HW_CAU_AESC_CA5(x) (*(__O hw_cau_aesc_ca5_t *) HW_CAU_AESC_CA5_ADDR(x))
#define HW_CAU_AESC_CA5_WR(x, v) (HW_CAU_AESC_CA5(x).U = (v))
#define HW_CAU_AESC_CA5_WR(x, v) (ADDRESS_WRITE(hw_cau_aesc_ca5_t, HW_CAU_AESC_CA5_ADDR(x), v))
/*@}*/
/*
@ -4464,7 +4471,7 @@ typedef union _hw_cau_aesc_ca6
#define HW_CAU_AESC_CA6_ADDR(x) ((x) + 0xB20U)
#define HW_CAU_AESC_CA6(x) (*(__O hw_cau_aesc_ca6_t *) HW_CAU_AESC_CA6_ADDR(x))
#define HW_CAU_AESC_CA6_WR(x, v) (HW_CAU_AESC_CA6(x).U = (v))
#define HW_CAU_AESC_CA6_WR(x, v) (ADDRESS_WRITE(hw_cau_aesc_ca6_t, HW_CAU_AESC_CA6_ADDR(x), v))
/*@}*/
/*
@ -4508,7 +4515,7 @@ typedef union _hw_cau_aesc_ca7
#define HW_CAU_AESC_CA7_ADDR(x) ((x) + 0xB24U)
#define HW_CAU_AESC_CA7(x) (*(__O hw_cau_aesc_ca7_t *) HW_CAU_AESC_CA7_ADDR(x))
#define HW_CAU_AESC_CA7_WR(x, v) (HW_CAU_AESC_CA7(x).U = (v))
#define HW_CAU_AESC_CA7_WR(x, v) (ADDRESS_WRITE(hw_cau_aesc_ca7_t, HW_CAU_AESC_CA7_ADDR(x), v))
/*@}*/
/*
@ -4552,7 +4559,7 @@ typedef union _hw_cau_aesc_ca8
#define HW_CAU_AESC_CA8_ADDR(x) ((x) + 0xB28U)
#define HW_CAU_AESC_CA8(x) (*(__O hw_cau_aesc_ca8_t *) HW_CAU_AESC_CA8_ADDR(x))
#define HW_CAU_AESC_CA8_WR(x, v) (HW_CAU_AESC_CA8(x).U = (v))
#define HW_CAU_AESC_CA8_WR(x, v) (ADDRESS_WRITE(hw_cau_aesc_ca8_t, HW_CAU_AESC_CA8_ADDR(x), v))
/*@}*/
/*
@ -4599,7 +4606,7 @@ typedef union _hw_cau_aesic_casr
#define HW_CAU_AESIC_CASR_ADDR(x) ((x) + 0xB40U)
#define HW_CAU_AESIC_CASR(x) (*(__O hw_cau_aesic_casr_t *) HW_CAU_AESIC_CASR_ADDR(x))
#define HW_CAU_AESIC_CASR_WR(x, v) (HW_CAU_AESIC_CASR(x).U = (v))
#define HW_CAU_AESIC_CASR_WR(x, v) (ADDRESS_WRITE(hw_cau_aesic_casr_t, HW_CAU_AESIC_CASR_ADDR(x), v))
/*@}*/
/*
@ -4680,7 +4687,7 @@ typedef union _hw_cau_aesic_caa
#define HW_CAU_AESIC_CAA_ADDR(x) ((x) + 0xB44U)
#define HW_CAU_AESIC_CAA(x) (*(__O hw_cau_aesic_caa_t *) HW_CAU_AESIC_CAA_ADDR(x))
#define HW_CAU_AESIC_CAA_WR(x, v) (HW_CAU_AESIC_CAA(x).U = (v))
#define HW_CAU_AESIC_CAA_WR(x, v) (ADDRESS_WRITE(hw_cau_aesic_caa_t, HW_CAU_AESIC_CAA_ADDR(x), v))
/*@}*/
/*
@ -4724,7 +4731,7 @@ typedef union _hw_cau_aesic_ca0
#define HW_CAU_AESIC_CA0_ADDR(x) ((x) + 0xB48U)
#define HW_CAU_AESIC_CA0(x) (*(__O hw_cau_aesic_ca0_t *) HW_CAU_AESIC_CA0_ADDR(x))
#define HW_CAU_AESIC_CA0_WR(x, v) (HW_CAU_AESIC_CA0(x).U = (v))
#define HW_CAU_AESIC_CA0_WR(x, v) (ADDRESS_WRITE(hw_cau_aesic_ca0_t, HW_CAU_AESIC_CA0_ADDR(x), v))
/*@}*/
/*
@ -4768,7 +4775,7 @@ typedef union _hw_cau_aesic_ca1
#define HW_CAU_AESIC_CA1_ADDR(x) ((x) + 0xB4CU)
#define HW_CAU_AESIC_CA1(x) (*(__O hw_cau_aesic_ca1_t *) HW_CAU_AESIC_CA1_ADDR(x))
#define HW_CAU_AESIC_CA1_WR(x, v) (HW_CAU_AESIC_CA1(x).U = (v))
#define HW_CAU_AESIC_CA1_WR(x, v) (ADDRESS_WRITE(hw_cau_aesic_ca1_t, HW_CAU_AESIC_CA1_ADDR(x), v))
/*@}*/
/*
@ -4812,7 +4819,7 @@ typedef union _hw_cau_aesic_ca2
#define HW_CAU_AESIC_CA2_ADDR(x) ((x) + 0xB50U)
#define HW_CAU_AESIC_CA2(x) (*(__O hw_cau_aesic_ca2_t *) HW_CAU_AESIC_CA2_ADDR(x))
#define HW_CAU_AESIC_CA2_WR(x, v) (HW_CAU_AESIC_CA2(x).U = (v))
#define HW_CAU_AESIC_CA2_WR(x, v) (ADDRESS_WRITE(hw_cau_aesic_ca2_t, HW_CAU_AESIC_CA2_ADDR(x), v))
/*@}*/
/*
@ -4856,7 +4863,7 @@ typedef union _hw_cau_aesic_ca3
#define HW_CAU_AESIC_CA3_ADDR(x) ((x) + 0xB54U)
#define HW_CAU_AESIC_CA3(x) (*(__O hw_cau_aesic_ca3_t *) HW_CAU_AESIC_CA3_ADDR(x))
#define HW_CAU_AESIC_CA3_WR(x, v) (HW_CAU_AESIC_CA3(x).U = (v))
#define HW_CAU_AESIC_CA3_WR(x, v) (ADDRESS_WRITE(hw_cau_aesic_ca3_t, HW_CAU_AESIC_CA3_ADDR(x), v))
/*@}*/
/*
@ -4900,7 +4907,7 @@ typedef union _hw_cau_aesic_ca4
#define HW_CAU_AESIC_CA4_ADDR(x) ((x) + 0xB58U)
#define HW_CAU_AESIC_CA4(x) (*(__O hw_cau_aesic_ca4_t *) HW_CAU_AESIC_CA4_ADDR(x))
#define HW_CAU_AESIC_CA4_WR(x, v) (HW_CAU_AESIC_CA4(x).U = (v))
#define HW_CAU_AESIC_CA4_WR(x, v) (ADDRESS_WRITE(hw_cau_aesic_ca4_t, HW_CAU_AESIC_CA4_ADDR(x), v))
/*@}*/
/*
@ -4944,7 +4951,7 @@ typedef union _hw_cau_aesic_ca5
#define HW_CAU_AESIC_CA5_ADDR(x) ((x) + 0xB5CU)
#define HW_CAU_AESIC_CA5(x) (*(__O hw_cau_aesic_ca5_t *) HW_CAU_AESIC_CA5_ADDR(x))
#define HW_CAU_AESIC_CA5_WR(x, v) (HW_CAU_AESIC_CA5(x).U = (v))
#define HW_CAU_AESIC_CA5_WR(x, v) (ADDRESS_WRITE(hw_cau_aesic_ca5_t, HW_CAU_AESIC_CA5_ADDR(x), v))
/*@}*/
/*
@ -4988,7 +4995,7 @@ typedef union _hw_cau_aesic_ca6
#define HW_CAU_AESIC_CA6_ADDR(x) ((x) + 0xB60U)
#define HW_CAU_AESIC_CA6(x) (*(__O hw_cau_aesic_ca6_t *) HW_CAU_AESIC_CA6_ADDR(x))
#define HW_CAU_AESIC_CA6_WR(x, v) (HW_CAU_AESIC_CA6(x).U = (v))
#define HW_CAU_AESIC_CA6_WR(x, v) (ADDRESS_WRITE(hw_cau_aesic_ca6_t, HW_CAU_AESIC_CA6_ADDR(x), v))
/*@}*/
/*
@ -5032,7 +5039,7 @@ typedef union _hw_cau_aesic_ca7
#define HW_CAU_AESIC_CA7_ADDR(x) ((x) + 0xB64U)
#define HW_CAU_AESIC_CA7(x) (*(__O hw_cau_aesic_ca7_t *) HW_CAU_AESIC_CA7_ADDR(x))
#define HW_CAU_AESIC_CA7_WR(x, v) (HW_CAU_AESIC_CA7(x).U = (v))
#define HW_CAU_AESIC_CA7_WR(x, v) (ADDRESS_WRITE(hw_cau_aesic_ca7_t, HW_CAU_AESIC_CA7_ADDR(x), v))
/*@}*/
/*
@ -5076,7 +5083,7 @@ typedef union _hw_cau_aesic_ca8
#define HW_CAU_AESIC_CA8_ADDR(x) ((x) + 0xB68U)
#define HW_CAU_AESIC_CA8(x) (*(__O hw_cau_aesic_ca8_t *) HW_CAU_AESIC_CA8_ADDR(x))
#define HW_CAU_AESIC_CA8_WR(x, v) (HW_CAU_AESIC_CA8(x).U = (v))
#define HW_CAU_AESIC_CA8_WR(x, v) (ADDRESS_WRITE(hw_cau_aesic_ca8_t, HW_CAU_AESIC_CA8_ADDR(x), v))
/*@}*/
/*

103
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_cmp.h
View File

@ -15,6 +15,9 @@
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** (C) COPYRIGHT 2015-2015 ARM Limited
** ALL RIGHTS RESERVED
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
@ -68,6 +71,10 @@
** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
** Update of SystemInit() and SystemCoreClockUpdate() functions.
** Module access macro module_BASES replaced by module_BASE_PTRS.
** - rev. 2.6 (2015-08-03) (ARM)
** All accesses to memory are replaced by equivalent macros; this allows
** memory read/write operations to be re-defined if needed (for example,
** to implement new security features
**
** ###################################################################
*/
@ -133,8 +140,8 @@ typedef union _hw_cmp_cr0
#define HW_CMP_CR0_ADDR(x) ((x) + 0x0U)
#define HW_CMP_CR0(x) (*(__IO hw_cmp_cr0_t *) HW_CMP_CR0_ADDR(x))
#define HW_CMP_CR0_RD(x) (HW_CMP_CR0(x).U)
#define HW_CMP_CR0_WR(x, v) (HW_CMP_CR0(x).U = (v))
#define HW_CMP_CR0_RD(x) (ADDRESS_READ(hw_cmp_cr0_t, HW_CMP_CR0_ADDR(x)))
#define HW_CMP_CR0_WR(x, v) (ADDRESS_WRITE(hw_cmp_cr0_t, HW_CMP_CR0_ADDR(x), v))
#define HW_CMP_CR0_SET(x, v) (HW_CMP_CR0_WR(x, HW_CMP_CR0_RD(x) | (v)))
#define HW_CMP_CR0_CLR(x, v) (HW_CMP_CR0_WR(x, HW_CMP_CR0_RD(x) & ~(v)))
#define HW_CMP_CR0_TOG(x, v) (HW_CMP_CR0_WR(x, HW_CMP_CR0_RD(x) ^ (v)))
@ -163,7 +170,7 @@ typedef union _hw_cmp_cr0
#define BS_CMP_CR0_HYSTCTR (2U) /*!< Bit field size in bits for CMP_CR0_HYSTCTR. */
/*! @brief Read current value of the CMP_CR0_HYSTCTR field. */
#define BR_CMP_CR0_HYSTCTR(x) (HW_CMP_CR0(x).B.HYSTCTR)
#define BR_CMP_CR0_HYSTCTR(x) (UNION_READ(hw_cmp_cr0_t, HW_CMP_CR0_ADDR(x), U, B.HYSTCTR))
/*! @brief Format value for bitfield CMP_CR0_HYSTCTR. */
#define BF_CMP_CR0_HYSTCTR(v) ((uint8_t)((uint8_t)(v) << BP_CMP_CR0_HYSTCTR) & BM_CMP_CR0_HYSTCTR)
@ -197,7 +204,7 @@ typedef union _hw_cmp_cr0
#define BS_CMP_CR0_FILTER_CNT (3U) /*!< Bit field size in bits for CMP_CR0_FILTER_CNT. */
/*! @brief Read current value of the CMP_CR0_FILTER_CNT field. */
#define BR_CMP_CR0_FILTER_CNT(x) (HW_CMP_CR0(x).B.FILTER_CNT)
#define BR_CMP_CR0_FILTER_CNT(x) (UNION_READ(hw_cmp_cr0_t, HW_CMP_CR0_ADDR(x), U, B.FILTER_CNT))
/*! @brief Format value for bitfield CMP_CR0_FILTER_CNT. */
#define BF_CMP_CR0_FILTER_CNT(v) ((uint8_t)((uint8_t)(v) << BP_CMP_CR0_FILTER_CNT) & BM_CMP_CR0_FILTER_CNT)
@ -238,8 +245,8 @@ typedef union _hw_cmp_cr1
#define HW_CMP_CR1_ADDR(x) ((x) + 0x1U)
#define HW_CMP_CR1(x) (*(__IO hw_cmp_cr1_t *) HW_CMP_CR1_ADDR(x))
#define HW_CMP_CR1_RD(x) (HW_CMP_CR1(x).U)
#define HW_CMP_CR1_WR(x, v) (HW_CMP_CR1(x).U = (v))
#define HW_CMP_CR1_RD(x) (ADDRESS_READ(hw_cmp_cr1_t, HW_CMP_CR1_ADDR(x)))
#define HW_CMP_CR1_WR(x, v) (ADDRESS_WRITE(hw_cmp_cr1_t, HW_CMP_CR1_ADDR(x), v))
#define HW_CMP_CR1_SET(x, v) (HW_CMP_CR1_WR(x, HW_CMP_CR1_RD(x) | (v)))
#define HW_CMP_CR1_CLR(x, v) (HW_CMP_CR1_WR(x, HW_CMP_CR1_RD(x) & ~(v)))
#define HW_CMP_CR1_TOG(x, v) (HW_CMP_CR1_WR(x, HW_CMP_CR1_RD(x) ^ (v)))
@ -267,13 +274,13 @@ typedef union _hw_cmp_cr1
#define BS_CMP_CR1_EN (1U) /*!< Bit field size in bits for CMP_CR1_EN. */
/*! @brief Read current value of the CMP_CR1_EN field. */
#define BR_CMP_CR1_EN(x) (BITBAND_ACCESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_EN))
#define BR_CMP_CR1_EN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_EN)))
/*! @brief Format value for bitfield CMP_CR1_EN. */
#define BF_CMP_CR1_EN(v) ((uint8_t)((uint8_t)(v) << BP_CMP_CR1_EN) & BM_CMP_CR1_EN)
/*! @brief Set the EN field to a new value. */
#define BW_CMP_CR1_EN(x, v) (BITBAND_ACCESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_EN) = (v))
#define BW_CMP_CR1_EN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_EN), v))
/*@}*/
/*!
@ -293,13 +300,13 @@ typedef union _hw_cmp_cr1
#define BS_CMP_CR1_OPE (1U) /*!< Bit field size in bits for CMP_CR1_OPE. */
/*! @brief Read current value of the CMP_CR1_OPE field. */
#define BR_CMP_CR1_OPE(x) (BITBAND_ACCESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_OPE))
#define BR_CMP_CR1_OPE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_OPE)))
/*! @brief Format value for bitfield CMP_CR1_OPE. */
#define BF_CMP_CR1_OPE(v) ((uint8_t)((uint8_t)(v) << BP_CMP_CR1_OPE) & BM_CMP_CR1_OPE)
/*! @brief Set the OPE field to a new value. */
#define BW_CMP_CR1_OPE(x, v) (BITBAND_ACCESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_OPE) = (v))
#define BW_CMP_CR1_OPE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_OPE), v))
/*@}*/
/*!
@ -315,13 +322,13 @@ typedef union _hw_cmp_cr1
#define BS_CMP_CR1_COS (1U) /*!< Bit field size in bits for CMP_CR1_COS. */
/*! @brief Read current value of the CMP_CR1_COS field. */
#define BR_CMP_CR1_COS(x) (BITBAND_ACCESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_COS))
#define BR_CMP_CR1_COS(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_COS)))
/*! @brief Format value for bitfield CMP_CR1_COS. */
#define BF_CMP_CR1_COS(v) ((uint8_t)((uint8_t)(v) << BP_CMP_CR1_COS) & BM_CMP_CR1_COS)
/*! @brief Set the COS field to a new value. */
#define BW_CMP_CR1_COS(x, v) (BITBAND_ACCESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_COS) = (v))
#define BW_CMP_CR1_COS(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_COS), v))
/*@}*/
/*!
@ -341,13 +348,13 @@ typedef union _hw_cmp_cr1
#define BS_CMP_CR1_INV (1U) /*!< Bit field size in bits for CMP_CR1_INV. */
/*! @brief Read current value of the CMP_CR1_INV field. */
#define BR_CMP_CR1_INV(x) (BITBAND_ACCESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_INV))
#define BR_CMP_CR1_INV(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_INV)))
/*! @brief Format value for bitfield CMP_CR1_INV. */
#define BF_CMP_CR1_INV(v) ((uint8_t)((uint8_t)(v) << BP_CMP_CR1_INV) & BM_CMP_CR1_INV)
/*! @brief Set the INV field to a new value. */
#define BW_CMP_CR1_INV(x, v) (BITBAND_ACCESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_INV) = (v))
#define BW_CMP_CR1_INV(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_INV), v))
/*@}*/
/*!
@ -367,13 +374,13 @@ typedef union _hw_cmp_cr1
#define BS_CMP_CR1_PMODE (1U) /*!< Bit field size in bits for CMP_CR1_PMODE. */
/*! @brief Read current value of the CMP_CR1_PMODE field. */
#define BR_CMP_CR1_PMODE(x) (BITBAND_ACCESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_PMODE))
#define BR_CMP_CR1_PMODE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_PMODE)))
/*! @brief Format value for bitfield CMP_CR1_PMODE. */
#define BF_CMP_CR1_PMODE(v) ((uint8_t)((uint8_t)(v) << BP_CMP_CR1_PMODE) & BM_CMP_CR1_PMODE)
/*! @brief Set the PMODE field to a new value. */
#define BW_CMP_CR1_PMODE(x, v) (BITBAND_ACCESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_PMODE) = (v))
#define BW_CMP_CR1_PMODE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_PMODE), v))
/*@}*/
/*!
@ -394,13 +401,13 @@ typedef union _hw_cmp_cr1
#define BS_CMP_CR1_WE (1U) /*!< Bit field size in bits for CMP_CR1_WE. */
/*! @brief Read current value of the CMP_CR1_WE field. */
#define BR_CMP_CR1_WE(x) (BITBAND_ACCESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_WE))
#define BR_CMP_CR1_WE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_WE)))
/*! @brief Format value for bitfield CMP_CR1_WE. */
#define BF_CMP_CR1_WE(v) ((uint8_t)((uint8_t)(v) << BP_CMP_CR1_WE) & BM_CMP_CR1_WE)
/*! @brief Set the WE field to a new value. */
#define BW_CMP_CR1_WE(x, v) (BITBAND_ACCESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_WE) = (v))
#define BW_CMP_CR1_WE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_WE), v))
/*@}*/
/*!
@ -421,13 +428,13 @@ typedef union _hw_cmp_cr1
#define BS_CMP_CR1_SE (1U) /*!< Bit field size in bits for CMP_CR1_SE. */
/*! @brief Read current value of the CMP_CR1_SE field. */
#define BR_CMP_CR1_SE(x) (BITBAND_ACCESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_SE))
#define BR_CMP_CR1_SE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_SE)))
/*! @brief Format value for bitfield CMP_CR1_SE. */
#define BF_CMP_CR1_SE(v) ((uint8_t)((uint8_t)(v) << BP_CMP_CR1_SE) & BM_CMP_CR1_SE)
/*! @brief Set the SE field to a new value. */
#define BW_CMP_CR1_SE(x, v) (BITBAND_ACCESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_SE) = (v))
#define BW_CMP_CR1_SE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMP_CR1_ADDR(x), BP_CMP_CR1_SE), v))
/*@}*/
/*******************************************************************************
@ -455,8 +462,8 @@ typedef union _hw_cmp_fpr
#define HW_CMP_FPR_ADDR(x) ((x) + 0x2U)
#define HW_CMP_FPR(x) (*(__IO hw_cmp_fpr_t *) HW_CMP_FPR_ADDR(x))
#define HW_CMP_FPR_RD(x) (HW_CMP_FPR(x).U)
#define HW_CMP_FPR_WR(x, v) (HW_CMP_FPR(x).U = (v))
#define HW_CMP_FPR_RD(x) (ADDRESS_READ(hw_cmp_fpr_t, HW_CMP_FPR_ADDR(x)))
#define HW_CMP_FPR_WR(x, v) (ADDRESS_WRITE(hw_cmp_fpr_t, HW_CMP_FPR_ADDR(x), v))
#define HW_CMP_FPR_SET(x, v) (HW_CMP_FPR_WR(x, HW_CMP_FPR_RD(x) | (v)))
#define HW_CMP_FPR_CLR(x, v) (HW_CMP_FPR_WR(x, HW_CMP_FPR_RD(x) & ~(v)))
#define HW_CMP_FPR_TOG(x, v) (HW_CMP_FPR_WR(x, HW_CMP_FPR_RD(x) ^ (v)))
@ -523,8 +530,8 @@ typedef union _hw_cmp_scr
#define HW_CMP_SCR_ADDR(x) ((x) + 0x3U)
#define HW_CMP_SCR(x) (*(__IO hw_cmp_scr_t *) HW_CMP_SCR_ADDR(x))
#define HW_CMP_SCR_RD(x) (HW_CMP_SCR(x).U)
#define HW_CMP_SCR_WR(x, v) (HW_CMP_SCR(x).U = (v))
#define HW_CMP_SCR_RD(x) (ADDRESS_READ(hw_cmp_scr_t, HW_CMP_SCR_ADDR(x)))
#define HW_CMP_SCR_WR(x, v) (ADDRESS_WRITE(hw_cmp_scr_t, HW_CMP_SCR_ADDR(x), v))
#define HW_CMP_SCR_SET(x, v) (HW_CMP_SCR_WR(x, HW_CMP_SCR_RD(x) | (v)))
#define HW_CMP_SCR_CLR(x, v) (HW_CMP_SCR_WR(x, HW_CMP_SCR_RD(x) & ~(v)))
#define HW_CMP_SCR_TOG(x, v) (HW_CMP_SCR_WR(x, HW_CMP_SCR_RD(x) ^ (v)))
@ -547,7 +554,7 @@ typedef union _hw_cmp_scr
#define BS_CMP_SCR_COUT (1U) /*!< Bit field size in bits for CMP_SCR_COUT. */
/*! @brief Read current value of the CMP_SCR_COUT field. */
#define BR_CMP_SCR_COUT(x) (BITBAND_ACCESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_COUT))
#define BR_CMP_SCR_COUT(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_COUT)))
/*@}*/
/*!
@ -567,13 +574,13 @@ typedef union _hw_cmp_scr
#define BS_CMP_SCR_CFF (1U) /*!< Bit field size in bits for CMP_SCR_CFF. */
/*! @brief Read current value of the CMP_SCR_CFF field. */
#define BR_CMP_SCR_CFF(x) (BITBAND_ACCESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_CFF))
#define BR_CMP_SCR_CFF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_CFF)))
/*! @brief Format value for bitfield CMP_SCR_CFF. */
#define BF_CMP_SCR_CFF(v) ((uint8_t)((uint8_t)(v) << BP_CMP_SCR_CFF) & BM_CMP_SCR_CFF)
/*! @brief Set the CFF field to a new value. */
#define BW_CMP_SCR_CFF(x, v) (BITBAND_ACCESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_CFF) = (v))
#define BW_CMP_SCR_CFF(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_CFF), v))
/*@}*/
/*!
@ -593,13 +600,13 @@ typedef union _hw_cmp_scr
#define BS_CMP_SCR_CFR (1U) /*!< Bit field size in bits for CMP_SCR_CFR. */
/*! @brief Read current value of the CMP_SCR_CFR field. */
#define BR_CMP_SCR_CFR(x) (BITBAND_ACCESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_CFR))
#define BR_CMP_SCR_CFR(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_CFR)))
/*! @brief Format value for bitfield CMP_SCR_CFR. */
#define BF_CMP_SCR_CFR(v) ((uint8_t)((uint8_t)(v) << BP_CMP_SCR_CFR) & BM_CMP_SCR_CFR)
/*! @brief Set the CFR field to a new value. */
#define BW_CMP_SCR_CFR(x, v) (BITBAND_ACCESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_CFR) = (v))
#define BW_CMP_SCR_CFR(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_CFR), v))
/*@}*/
/*!
@ -618,13 +625,13 @@ typedef union _hw_cmp_scr
#define BS_CMP_SCR_IEF (1U) /*!< Bit field size in bits for CMP_SCR_IEF. */
/*! @brief Read current value of the CMP_SCR_IEF field. */
#define BR_CMP_SCR_IEF(x) (BITBAND_ACCESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_IEF))
#define BR_CMP_SCR_IEF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_IEF)))
/*! @brief Format value for bitfield CMP_SCR_IEF. */
#define BF_CMP_SCR_IEF(v) ((uint8_t)((uint8_t)(v) << BP_CMP_SCR_IEF) & BM_CMP_SCR_IEF)
/*! @brief Set the IEF field to a new value. */
#define BW_CMP_SCR_IEF(x, v) (BITBAND_ACCESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_IEF) = (v))
#define BW_CMP_SCR_IEF(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_IEF), v))
/*@}*/
/*!
@ -643,13 +650,13 @@ typedef union _hw_cmp_scr
#define BS_CMP_SCR_IER (1U) /*!< Bit field size in bits for CMP_SCR_IER. */
/*! @brief Read current value of the CMP_SCR_IER field. */
#define BR_CMP_SCR_IER(x) (BITBAND_ACCESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_IER))
#define BR_CMP_SCR_IER(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_IER)))
/*! @brief Format value for bitfield CMP_SCR_IER. */
#define BF_CMP_SCR_IER(v) ((uint8_t)((uint8_t)(v) << BP_CMP_SCR_IER) & BM_CMP_SCR_IER)
/*! @brief Set the IER field to a new value. */
#define BW_CMP_SCR_IER(x, v) (BITBAND_ACCESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_IER) = (v))
#define BW_CMP_SCR_IER(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_IER), v))
/*@}*/
/*!
@ -668,13 +675,13 @@ typedef union _hw_cmp_scr
#define BS_CMP_SCR_DMAEN (1U) /*!< Bit field size in bits for CMP_SCR_DMAEN. */
/*! @brief Read current value of the CMP_SCR_DMAEN field. */
#define BR_CMP_SCR_DMAEN(x) (BITBAND_ACCESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_DMAEN))
#define BR_CMP_SCR_DMAEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_DMAEN)))
/*! @brief Format value for bitfield CMP_SCR_DMAEN. */
#define BF_CMP_SCR_DMAEN(v) ((uint8_t)((uint8_t)(v) << BP_CMP_SCR_DMAEN) & BM_CMP_SCR_DMAEN)
/*! @brief Set the DMAEN field to a new value. */
#define BW_CMP_SCR_DMAEN(x, v) (BITBAND_ACCESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_DMAEN) = (v))
#define BW_CMP_SCR_DMAEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMP_SCR_ADDR(x), BP_CMP_SCR_DMAEN), v))
/*@}*/
/*******************************************************************************
@ -704,8 +711,8 @@ typedef union _hw_cmp_daccr
#define HW_CMP_DACCR_ADDR(x) ((x) + 0x4U)
#define HW_CMP_DACCR(x) (*(__IO hw_cmp_daccr_t *) HW_CMP_DACCR_ADDR(x))
#define HW_CMP_DACCR_RD(x) (HW_CMP_DACCR(x).U)
#define HW_CMP_DACCR_WR(x, v) (HW_CMP_DACCR(x).U = (v))
#define HW_CMP_DACCR_RD(x) (ADDRESS_READ(hw_cmp_daccr_t, HW_CMP_DACCR_ADDR(x)))
#define HW_CMP_DACCR_WR(x, v) (ADDRESS_WRITE(hw_cmp_daccr_t, HW_CMP_DACCR_ADDR(x), v))
#define HW_CMP_DACCR_SET(x, v) (HW_CMP_DACCR_WR(x, HW_CMP_DACCR_RD(x) | (v)))
#define HW_CMP_DACCR_CLR(x, v) (HW_CMP_DACCR_WR(x, HW_CMP_DACCR_RD(x) & ~(v)))
#define HW_CMP_DACCR_TOG(x, v) (HW_CMP_DACCR_WR(x, HW_CMP_DACCR_RD(x) ^ (v)))
@ -727,7 +734,7 @@ typedef union _hw_cmp_daccr
#define BS_CMP_DACCR_VOSEL (6U) /*!< Bit field size in bits for CMP_DACCR_VOSEL. */
/*! @brief Read current value of the CMP_DACCR_VOSEL field. */
#define BR_CMP_DACCR_VOSEL(x) (HW_CMP_DACCR(x).B.VOSEL)
#define BR_CMP_DACCR_VOSEL(x) (UNION_READ(hw_cmp_daccr_t, HW_CMP_DACCR_ADDR(x), U, B.VOSEL))
/*! @brief Format value for bitfield CMP_DACCR_VOSEL. */
#define BF_CMP_DACCR_VOSEL(v) ((uint8_t)((uint8_t)(v) << BP_CMP_DACCR_VOSEL) & BM_CMP_DACCR_VOSEL)
@ -749,13 +756,13 @@ typedef union _hw_cmp_daccr
#define BS_CMP_DACCR_VRSEL (1U) /*!< Bit field size in bits for CMP_DACCR_VRSEL. */
/*! @brief Read current value of the CMP_DACCR_VRSEL field. */
#define BR_CMP_DACCR_VRSEL(x) (BITBAND_ACCESS8(HW_CMP_DACCR_ADDR(x), BP_CMP_DACCR_VRSEL))
#define BR_CMP_DACCR_VRSEL(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMP_DACCR_ADDR(x), BP_CMP_DACCR_VRSEL)))
/*! @brief Format value for bitfield CMP_DACCR_VRSEL. */
#define BF_CMP_DACCR_VRSEL(v) ((uint8_t)((uint8_t)(v) << BP_CMP_DACCR_VRSEL) & BM_CMP_DACCR_VRSEL)
/*! @brief Set the VRSEL field to a new value. */
#define BW_CMP_DACCR_VRSEL(x, v) (BITBAND_ACCESS8(HW_CMP_DACCR_ADDR(x), BP_CMP_DACCR_VRSEL) = (v))
#define BW_CMP_DACCR_VRSEL(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMP_DACCR_ADDR(x), BP_CMP_DACCR_VRSEL), v))
/*@}*/
/*!
@ -774,13 +781,13 @@ typedef union _hw_cmp_daccr
#define BS_CMP_DACCR_DACEN (1U) /*!< Bit field size in bits for CMP_DACCR_DACEN. */
/*! @brief Read current value of the CMP_DACCR_DACEN field. */
#define BR_CMP_DACCR_DACEN(x) (BITBAND_ACCESS8(HW_CMP_DACCR_ADDR(x), BP_CMP_DACCR_DACEN))
#define BR_CMP_DACCR_DACEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMP_DACCR_ADDR(x), BP_CMP_DACCR_DACEN)))
/*! @brief Format value for bitfield CMP_DACCR_DACEN. */
#define BF_CMP_DACCR_DACEN(v) ((uint8_t)((uint8_t)(v) << BP_CMP_DACCR_DACEN) & BM_CMP_DACCR_DACEN)
/*! @brief Set the DACEN field to a new value. */
#define BW_CMP_DACCR_DACEN(x, v) (BITBAND_ACCESS8(HW_CMP_DACCR_ADDR(x), BP_CMP_DACCR_DACEN) = (v))
#define BW_CMP_DACCR_DACEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMP_DACCR_ADDR(x), BP_CMP_DACCR_DACEN), v))
/*@}*/
/*******************************************************************************
@ -811,8 +818,8 @@ typedef union _hw_cmp_muxcr
#define HW_CMP_MUXCR_ADDR(x) ((x) + 0x5U)
#define HW_CMP_MUXCR(x) (*(__IO hw_cmp_muxcr_t *) HW_CMP_MUXCR_ADDR(x))
#define HW_CMP_MUXCR_RD(x) (HW_CMP_MUXCR(x).U)
#define HW_CMP_MUXCR_WR(x, v) (HW_CMP_MUXCR(x).U = (v))
#define HW_CMP_MUXCR_RD(x) (ADDRESS_READ(hw_cmp_muxcr_t, HW_CMP_MUXCR_ADDR(x)))
#define HW_CMP_MUXCR_WR(x, v) (ADDRESS_WRITE(hw_cmp_muxcr_t, HW_CMP_MUXCR_ADDR(x), v))
#define HW_CMP_MUXCR_SET(x, v) (HW_CMP_MUXCR_WR(x, HW_CMP_MUXCR_RD(x) | (v)))
#define HW_CMP_MUXCR_CLR(x, v) (HW_CMP_MUXCR_WR(x, HW_CMP_MUXCR_RD(x) & ~(v)))
#define HW_CMP_MUXCR_TOG(x, v) (HW_CMP_MUXCR_WR(x, HW_CMP_MUXCR_RD(x) ^ (v)))
@ -846,7 +853,7 @@ typedef union _hw_cmp_muxcr
#define BS_CMP_MUXCR_MSEL (3U) /*!< Bit field size in bits for CMP_MUXCR_MSEL. */
/*! @brief Read current value of the CMP_MUXCR_MSEL field. */
#define BR_CMP_MUXCR_MSEL(x) (HW_CMP_MUXCR(x).B.MSEL)
#define BR_CMP_MUXCR_MSEL(x) (UNION_READ(hw_cmp_muxcr_t, HW_CMP_MUXCR_ADDR(x), U, B.MSEL))
/*! @brief Format value for bitfield CMP_MUXCR_MSEL. */
#define BF_CMP_MUXCR_MSEL(v) ((uint8_t)((uint8_t)(v) << BP_CMP_MUXCR_MSEL) & BM_CMP_MUXCR_MSEL)
@ -879,7 +886,7 @@ typedef union _hw_cmp_muxcr
#define BS_CMP_MUXCR_PSEL (3U) /*!< Bit field size in bits for CMP_MUXCR_PSEL. */
/*! @brief Read current value of the CMP_MUXCR_PSEL field. */
#define BR_CMP_MUXCR_PSEL(x) (HW_CMP_MUXCR(x).B.PSEL)
#define BR_CMP_MUXCR_PSEL(x) (UNION_READ(hw_cmp_muxcr_t, HW_CMP_MUXCR_ADDR(x), U, B.PSEL))
/*! @brief Format value for bitfield CMP_MUXCR_PSEL. */
#define BF_CMP_MUXCR_PSEL(v) ((uint8_t)((uint8_t)(v) << BP_CMP_MUXCR_PSEL) & BM_CMP_MUXCR_PSEL)
@ -905,13 +912,13 @@ typedef union _hw_cmp_muxcr
#define BS_CMP_MUXCR_PSTM (1U) /*!< Bit field size in bits for CMP_MUXCR_PSTM. */
/*! @brief Read current value of the CMP_MUXCR_PSTM field. */
#define BR_CMP_MUXCR_PSTM(x) (BITBAND_ACCESS8(HW_CMP_MUXCR_ADDR(x), BP_CMP_MUXCR_PSTM))
#define BR_CMP_MUXCR_PSTM(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMP_MUXCR_ADDR(x), BP_CMP_MUXCR_PSTM)))
/*! @brief Format value for bitfield CMP_MUXCR_PSTM. */
#define BF_CMP_MUXCR_PSTM(v) ((uint8_t)((uint8_t)(v) << BP_CMP_MUXCR_PSTM) & BM_CMP_MUXCR_PSTM)
/*! @brief Set the PSTM field to a new value. */
#define BW_CMP_MUXCR_PSTM(x, v) (BITBAND_ACCESS8(HW_CMP_MUXCR_ADDR(x), BP_CMP_MUXCR_PSTM) = (v))
#define BW_CMP_MUXCR_PSTM(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMP_MUXCR_ADDR(x), BP_CMP_MUXCR_PSTM), v))
/*@}*/
/*******************************************************************************

97
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_cmt.h
View File

@ -15,6 +15,9 @@
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** (C) COPYRIGHT 2015-2015 ARM Limited
** ALL RIGHTS RESERVED
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
@ -68,6 +71,10 @@
** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
** Update of SystemInit() and SystemCoreClockUpdate() functions.
** Module access macro module_BASES replaced by module_BASE_PTRS.
** - rev. 2.6 (2015-08-03) (ARM)
** All accesses to memory are replaced by equivalent macros; this allows
** memory read/write operations to be re-defined if needed (for example,
** to implement new security features
**
** ###################################################################
*/
@ -135,8 +142,8 @@ typedef union _hw_cmt_cgh1
#define HW_CMT_CGH1_ADDR(x) ((x) + 0x0U)
#define HW_CMT_CGH1(x) (*(__IO hw_cmt_cgh1_t *) HW_CMT_CGH1_ADDR(x))
#define HW_CMT_CGH1_RD(x) (HW_CMT_CGH1(x).U)
#define HW_CMT_CGH1_WR(x, v) (HW_CMT_CGH1(x).U = (v))
#define HW_CMT_CGH1_RD(x) (ADDRESS_READ(hw_cmt_cgh1_t, HW_CMT_CGH1_ADDR(x)))
#define HW_CMT_CGH1_WR(x, v) (ADDRESS_WRITE(hw_cmt_cgh1_t, HW_CMT_CGH1_ADDR(x), v))
#define HW_CMT_CGH1_SET(x, v) (HW_CMT_CGH1_WR(x, HW_CMT_CGH1_RD(x) | (v)))
#define HW_CMT_CGH1_CLR(x, v) (HW_CMT_CGH1_WR(x, HW_CMT_CGH1_RD(x) & ~(v)))
#define HW_CMT_CGH1_TOG(x, v) (HW_CMT_CGH1_WR(x, HW_CMT_CGH1_RD(x) ^ (v)))
@ -199,8 +206,8 @@ typedef union _hw_cmt_cgl1
#define HW_CMT_CGL1_ADDR(x) ((x) + 0x1U)
#define HW_CMT_CGL1(x) (*(__IO hw_cmt_cgl1_t *) HW_CMT_CGL1_ADDR(x))
#define HW_CMT_CGL1_RD(x) (HW_CMT_CGL1(x).U)
#define HW_CMT_CGL1_WR(x, v) (HW_CMT_CGL1(x).U = (v))
#define HW_CMT_CGL1_RD(x) (ADDRESS_READ(hw_cmt_cgl1_t, HW_CMT_CGL1_ADDR(x)))
#define HW_CMT_CGL1_WR(x, v) (ADDRESS_WRITE(hw_cmt_cgl1_t, HW_CMT_CGL1_ADDR(x), v))
#define HW_CMT_CGL1_SET(x, v) (HW_CMT_CGL1_WR(x, HW_CMT_CGL1_RD(x) | (v)))
#define HW_CMT_CGL1_CLR(x, v) (HW_CMT_CGL1_WR(x, HW_CMT_CGL1_RD(x) & ~(v)))
#define HW_CMT_CGL1_TOG(x, v) (HW_CMT_CGL1_WR(x, HW_CMT_CGL1_RD(x) ^ (v)))
@ -263,8 +270,8 @@ typedef union _hw_cmt_cgh2
#define HW_CMT_CGH2_ADDR(x) ((x) + 0x2U)
#define HW_CMT_CGH2(x) (*(__IO hw_cmt_cgh2_t *) HW_CMT_CGH2_ADDR(x))
#define HW_CMT_CGH2_RD(x) (HW_CMT_CGH2(x).U)
#define HW_CMT_CGH2_WR(x, v) (HW_CMT_CGH2(x).U = (v))
#define HW_CMT_CGH2_RD(x) (ADDRESS_READ(hw_cmt_cgh2_t, HW_CMT_CGH2_ADDR(x)))
#define HW_CMT_CGH2_WR(x, v) (ADDRESS_WRITE(hw_cmt_cgh2_t, HW_CMT_CGH2_ADDR(x), v))
#define HW_CMT_CGH2_SET(x, v) (HW_CMT_CGH2_WR(x, HW_CMT_CGH2_RD(x) | (v)))
#define HW_CMT_CGH2_CLR(x, v) (HW_CMT_CGH2_WR(x, HW_CMT_CGH2_RD(x) & ~(v)))
#define HW_CMT_CGH2_TOG(x, v) (HW_CMT_CGH2_WR(x, HW_CMT_CGH2_RD(x) ^ (v)))
@ -327,8 +334,8 @@ typedef union _hw_cmt_cgl2
#define HW_CMT_CGL2_ADDR(x) ((x) + 0x3U)
#define HW_CMT_CGL2(x) (*(__IO hw_cmt_cgl2_t *) HW_CMT_CGL2_ADDR(x))
#define HW_CMT_CGL2_RD(x) (HW_CMT_CGL2(x).U)
#define HW_CMT_CGL2_WR(x, v) (HW_CMT_CGL2(x).U = (v))
#define HW_CMT_CGL2_RD(x) (ADDRESS_READ(hw_cmt_cgl2_t, HW_CMT_CGL2_ADDR(x)))
#define HW_CMT_CGL2_WR(x, v) (ADDRESS_WRITE(hw_cmt_cgl2_t, HW_CMT_CGL2_ADDR(x), v))
#define HW_CMT_CGL2_SET(x, v) (HW_CMT_CGL2_WR(x, HW_CMT_CGL2_RD(x) | (v)))
#define HW_CMT_CGL2_CLR(x, v) (HW_CMT_CGL2_WR(x, HW_CMT_CGL2_RD(x) & ~(v)))
#define HW_CMT_CGL2_TOG(x, v) (HW_CMT_CGL2_WR(x, HW_CMT_CGL2_RD(x) ^ (v)))
@ -393,8 +400,8 @@ typedef union _hw_cmt_oc
#define HW_CMT_OC_ADDR(x) ((x) + 0x4U)
#define HW_CMT_OC(x) (*(__IO hw_cmt_oc_t *) HW_CMT_OC_ADDR(x))
#define HW_CMT_OC_RD(x) (HW_CMT_OC(x).U)
#define HW_CMT_OC_WR(x, v) (HW_CMT_OC(x).U = (v))
#define HW_CMT_OC_RD(x) (ADDRESS_READ(hw_cmt_oc_t, HW_CMT_OC_ADDR(x)))
#define HW_CMT_OC_WR(x, v) (ADDRESS_WRITE(hw_cmt_oc_t, HW_CMT_OC_ADDR(x), v))
#define HW_CMT_OC_SET(x, v) (HW_CMT_OC_WR(x, HW_CMT_OC_RD(x) | (v)))
#define HW_CMT_OC_CLR(x, v) (HW_CMT_OC_WR(x, HW_CMT_OC_RD(x) & ~(v)))
#define HW_CMT_OC_TOG(x, v) (HW_CMT_OC_WR(x, HW_CMT_OC_RD(x) ^ (v)))
@ -424,13 +431,13 @@ typedef union _hw_cmt_oc
#define BS_CMT_OC_IROPEN (1U) /*!< Bit field size in bits for CMT_OC_IROPEN. */
/*! @brief Read current value of the CMT_OC_IROPEN field. */
#define BR_CMT_OC_IROPEN(x) (BITBAND_ACCESS8(HW_CMT_OC_ADDR(x), BP_CMT_OC_IROPEN))
#define BR_CMT_OC_IROPEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMT_OC_ADDR(x), BP_CMT_OC_IROPEN)))
/*! @brief Format value for bitfield CMT_OC_IROPEN. */
#define BF_CMT_OC_IROPEN(v) ((uint8_t)((uint8_t)(v) << BP_CMT_OC_IROPEN) & BM_CMT_OC_IROPEN)
/*! @brief Set the IROPEN field to a new value. */
#define BW_CMT_OC_IROPEN(x, v) (BITBAND_ACCESS8(HW_CMT_OC_ADDR(x), BP_CMT_OC_IROPEN) = (v))
#define BW_CMT_OC_IROPEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMT_OC_ADDR(x), BP_CMT_OC_IROPEN), v))
/*@}*/
/*!
@ -448,13 +455,13 @@ typedef union _hw_cmt_oc
#define BS_CMT_OC_CMTPOL (1U) /*!< Bit field size in bits for CMT_OC_CMTPOL. */
/*! @brief Read current value of the CMT_OC_CMTPOL field. */
#define BR_CMT_OC_CMTPOL(x) (BITBAND_ACCESS8(HW_CMT_OC_ADDR(x), BP_CMT_OC_CMTPOL))
#define BR_CMT_OC_CMTPOL(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMT_OC_ADDR(x), BP_CMT_OC_CMTPOL)))
/*! @brief Format value for bitfield CMT_OC_CMTPOL. */
#define BF_CMT_OC_CMTPOL(v) ((uint8_t)((uint8_t)(v) << BP_CMT_OC_CMTPOL) & BM_CMT_OC_CMTPOL)
/*! @brief Set the CMTPOL field to a new value. */
#define BW_CMT_OC_CMTPOL(x, v) (BITBAND_ACCESS8(HW_CMT_OC_ADDR(x), BP_CMT_OC_CMTPOL) = (v))
#define BW_CMT_OC_CMTPOL(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMT_OC_ADDR(x), BP_CMT_OC_CMTPOL), v))
/*@}*/
/*!
@ -469,13 +476,13 @@ typedef union _hw_cmt_oc
#define BS_CMT_OC_IROL (1U) /*!< Bit field size in bits for CMT_OC_IROL. */
/*! @brief Read current value of the CMT_OC_IROL field. */
#define BR_CMT_OC_IROL(x) (BITBAND_ACCESS8(HW_CMT_OC_ADDR(x), BP_CMT_OC_IROL))
#define BR_CMT_OC_IROL(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMT_OC_ADDR(x), BP_CMT_OC_IROL)))
/*! @brief Format value for bitfield CMT_OC_IROL. */
#define BF_CMT_OC_IROL(v) ((uint8_t)((uint8_t)(v) << BP_CMT_OC_IROL) & BM_CMT_OC_IROL)
/*! @brief Set the IROL field to a new value. */
#define BW_CMT_OC_IROL(x, v) (BITBAND_ACCESS8(HW_CMT_OC_ADDR(x), BP_CMT_OC_IROL) = (v))
#define BW_CMT_OC_IROL(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMT_OC_ADDR(x), BP_CMT_OC_IROL), v))
/*@}*/
/*******************************************************************************
@ -514,8 +521,8 @@ typedef union _hw_cmt_msc
#define HW_CMT_MSC_ADDR(x) ((x) + 0x5U)
#define HW_CMT_MSC(x) (*(__IO hw_cmt_msc_t *) HW_CMT_MSC_ADDR(x))
#define HW_CMT_MSC_RD(x) (HW_CMT_MSC(x).U)
#define HW_CMT_MSC_WR(x, v) (HW_CMT_MSC(x).U = (v))
#define HW_CMT_MSC_RD(x) (ADDRESS_READ(hw_cmt_msc_t, HW_CMT_MSC_ADDR(x)))
#define HW_CMT_MSC_WR(x, v) (ADDRESS_WRITE(hw_cmt_msc_t, HW_CMT_MSC_ADDR(x), v))
#define HW_CMT_MSC_SET(x, v) (HW_CMT_MSC_WR(x, HW_CMT_MSC_RD(x) | (v)))
#define HW_CMT_MSC_CLR(x, v) (HW_CMT_MSC_WR(x, HW_CMT_MSC_RD(x) & ~(v)))
#define HW_CMT_MSC_TOG(x, v) (HW_CMT_MSC_WR(x, HW_CMT_MSC_RD(x) ^ (v)))
@ -546,13 +553,13 @@ typedef union _hw_cmt_msc
#define BS_CMT_MSC_MCGEN (1U) /*!< Bit field size in bits for CMT_MSC_MCGEN. */
/*! @brief Read current value of the CMT_MSC_MCGEN field. */
#define BR_CMT_MSC_MCGEN(x) (BITBAND_ACCESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_MCGEN))
#define BR_CMT_MSC_MCGEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_MCGEN)))
/*! @brief Format value for bitfield CMT_MSC_MCGEN. */
#define BF_CMT_MSC_MCGEN(v) ((uint8_t)((uint8_t)(v) << BP_CMT_MSC_MCGEN) & BM_CMT_MSC_MCGEN)
/*! @brief Set the MCGEN field to a new value. */
#define BW_CMT_MSC_MCGEN(x, v) (BITBAND_ACCESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_MCGEN) = (v))
#define BW_CMT_MSC_MCGEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_MCGEN), v))
/*@}*/
/*!
@ -570,13 +577,13 @@ typedef union _hw_cmt_msc
#define BS_CMT_MSC_EOCIE (1U) /*!< Bit field size in bits for CMT_MSC_EOCIE. */
/*! @brief Read current value of the CMT_MSC_EOCIE field. */
#define BR_CMT_MSC_EOCIE(x) (BITBAND_ACCESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_EOCIE))
#define BR_CMT_MSC_EOCIE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_EOCIE)))
/*! @brief Format value for bitfield CMT_MSC_EOCIE. */
#define BF_CMT_MSC_EOCIE(v) ((uint8_t)((uint8_t)(v) << BP_CMT_MSC_EOCIE) & BM_CMT_MSC_EOCIE)
/*! @brief Set the EOCIE field to a new value. */
#define BW_CMT_MSC_EOCIE(x, v) (BITBAND_ACCESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_EOCIE) = (v))
#define BW_CMT_MSC_EOCIE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_EOCIE), v))
/*@}*/
/*!
@ -594,13 +601,13 @@ typedef union _hw_cmt_msc
#define BS_CMT_MSC_FSK (1U) /*!< Bit field size in bits for CMT_MSC_FSK. */
/*! @brief Read current value of the CMT_MSC_FSK field. */
#define BR_CMT_MSC_FSK(x) (BITBAND_ACCESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_FSK))
#define BR_CMT_MSC_FSK(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_FSK)))
/*! @brief Format value for bitfield CMT_MSC_FSK. */
#define BF_CMT_MSC_FSK(v) ((uint8_t)((uint8_t)(v) << BP_CMT_MSC_FSK) & BM_CMT_MSC_FSK)
/*! @brief Set the FSK field to a new value. */
#define BW_CMT_MSC_FSK(x, v) (BITBAND_ACCESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_FSK) = (v))
#define BW_CMT_MSC_FSK(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_FSK), v))
/*@}*/
/*!
@ -623,13 +630,13 @@ typedef union _hw_cmt_msc
#define BS_CMT_MSC_BASE (1U) /*!< Bit field size in bits for CMT_MSC_BASE. */
/*! @brief Read current value of the CMT_MSC_BASE field. */
#define BR_CMT_MSC_BASE(x) (BITBAND_ACCESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_BASE))
#define BR_CMT_MSC_BASE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_BASE)))
/*! @brief Format value for bitfield CMT_MSC_BASE. */
#define BF_CMT_MSC_BASE(v) ((uint8_t)((uint8_t)(v) << BP_CMT_MSC_BASE) & BM_CMT_MSC_BASE)
/*! @brief Set the BASE field to a new value. */
#define BW_CMT_MSC_BASE(x, v) (BITBAND_ACCESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_BASE) = (v))
#define BW_CMT_MSC_BASE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_BASE), v))
/*@}*/
/*!
@ -647,13 +654,13 @@ typedef union _hw_cmt_msc
#define BS_CMT_MSC_EXSPC (1U) /*!< Bit field size in bits for CMT_MSC_EXSPC. */
/*! @brief Read current value of the CMT_MSC_EXSPC field. */
#define BR_CMT_MSC_EXSPC(x) (BITBAND_ACCESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_EXSPC))
#define BR_CMT_MSC_EXSPC(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_EXSPC)))
/*! @brief Format value for bitfield CMT_MSC_EXSPC. */
#define BF_CMT_MSC_EXSPC(v) ((uint8_t)((uint8_t)(v) << BP_CMT_MSC_EXSPC) & BM_CMT_MSC_EXSPC)
/*! @brief Set the EXSPC field to a new value. */
#define BW_CMT_MSC_EXSPC(x, v) (BITBAND_ACCESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_EXSPC) = (v))
#define BW_CMT_MSC_EXSPC(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_EXSPC), v))
/*@}*/
/*!
@ -675,7 +682,7 @@ typedef union _hw_cmt_msc
#define BS_CMT_MSC_CMTDIV (2U) /*!< Bit field size in bits for CMT_MSC_CMTDIV. */
/*! @brief Read current value of the CMT_MSC_CMTDIV field. */
#define BR_CMT_MSC_CMTDIV(x) (HW_CMT_MSC(x).B.CMTDIV)
#define BR_CMT_MSC_CMTDIV(x) (UNION_READ(hw_cmt_msc_t, HW_CMT_MSC_ADDR(x), U, B.CMTDIV))
/*! @brief Format value for bitfield CMT_MSC_CMTDIV. */
#define BF_CMT_MSC_CMTDIV(v) ((uint8_t)((uint8_t)(v) << BP_CMT_MSC_CMTDIV) & BM_CMT_MSC_CMTDIV)
@ -706,7 +713,7 @@ typedef union _hw_cmt_msc
#define BS_CMT_MSC_EOCF (1U) /*!< Bit field size in bits for CMT_MSC_EOCF. */
/*! @brief Read current value of the CMT_MSC_EOCF field. */
#define BR_CMT_MSC_EOCF(x) (BITBAND_ACCESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_EOCF))
#define BR_CMT_MSC_EOCF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMT_MSC_ADDR(x), BP_CMT_MSC_EOCF)))
/*@}*/
/*******************************************************************************
@ -737,8 +744,8 @@ typedef union _hw_cmt_cmd1
#define HW_CMT_CMD1_ADDR(x) ((x) + 0x6U)
#define HW_CMT_CMD1(x) (*(__IO hw_cmt_cmd1_t *) HW_CMT_CMD1_ADDR(x))
#define HW_CMT_CMD1_RD(x) (HW_CMT_CMD1(x).U)
#define HW_CMT_CMD1_WR(x, v) (HW_CMT_CMD1(x).U = (v))
#define HW_CMT_CMD1_RD(x) (ADDRESS_READ(hw_cmt_cmd1_t, HW_CMT_CMD1_ADDR(x)))
#define HW_CMT_CMD1_WR(x, v) (ADDRESS_WRITE(hw_cmt_cmd1_t, HW_CMT_CMD1_ADDR(x), v))
#define HW_CMT_CMD1_SET(x, v) (HW_CMT_CMD1_WR(x, HW_CMT_CMD1_RD(x) | (v)))
#define HW_CMT_CMD1_CLR(x, v) (HW_CMT_CMD1_WR(x, HW_CMT_CMD1_RD(x) & ~(v)))
#define HW_CMT_CMD1_TOG(x, v) (HW_CMT_CMD1_WR(x, HW_CMT_CMD1_RD(x) ^ (v)))
@ -796,8 +803,8 @@ typedef union _hw_cmt_cmd2
#define HW_CMT_CMD2_ADDR(x) ((x) + 0x7U)
#define HW_CMT_CMD2(x) (*(__IO hw_cmt_cmd2_t *) HW_CMT_CMD2_ADDR(x))
#define HW_CMT_CMD2_RD(x) (HW_CMT_CMD2(x).U)
#define HW_CMT_CMD2_WR(x, v) (HW_CMT_CMD2(x).U = (v))
#define HW_CMT_CMD2_RD(x) (ADDRESS_READ(hw_cmt_cmd2_t, HW_CMT_CMD2_ADDR(x)))
#define HW_CMT_CMD2_WR(x, v) (ADDRESS_WRITE(hw_cmt_cmd2_t, HW_CMT_CMD2_ADDR(x), v))
#define HW_CMT_CMD2_SET(x, v) (HW_CMT_CMD2_WR(x, HW_CMT_CMD2_RD(x) | (v)))
#define HW_CMT_CMD2_CLR(x, v) (HW_CMT_CMD2_WR(x, HW_CMT_CMD2_RD(x) & ~(v)))
#define HW_CMT_CMD2_TOG(x, v) (HW_CMT_CMD2_WR(x, HW_CMT_CMD2_RD(x) ^ (v)))
@ -855,8 +862,8 @@ typedef union _hw_cmt_cmd3
#define HW_CMT_CMD3_ADDR(x) ((x) + 0x8U)
#define HW_CMT_CMD3(x) (*(__IO hw_cmt_cmd3_t *) HW_CMT_CMD3_ADDR(x))
#define HW_CMT_CMD3_RD(x) (HW_CMT_CMD3(x).U)
#define HW_CMT_CMD3_WR(x, v) (HW_CMT_CMD3(x).U = (v))
#define HW_CMT_CMD3_RD(x) (ADDRESS_READ(hw_cmt_cmd3_t, HW_CMT_CMD3_ADDR(x)))
#define HW_CMT_CMD3_WR(x, v) (ADDRESS_WRITE(hw_cmt_cmd3_t, HW_CMT_CMD3_ADDR(x), v))
#define HW_CMT_CMD3_SET(x, v) (HW_CMT_CMD3_WR(x, HW_CMT_CMD3_RD(x) | (v)))
#define HW_CMT_CMD3_CLR(x, v) (HW_CMT_CMD3_WR(x, HW_CMT_CMD3_RD(x) & ~(v)))
#define HW_CMT_CMD3_TOG(x, v) (HW_CMT_CMD3_WR(x, HW_CMT_CMD3_RD(x) ^ (v)))
@ -914,8 +921,8 @@ typedef union _hw_cmt_cmd4
#define HW_CMT_CMD4_ADDR(x) ((x) + 0x9U)
#define HW_CMT_CMD4(x) (*(__IO hw_cmt_cmd4_t *) HW_CMT_CMD4_ADDR(x))
#define HW_CMT_CMD4_RD(x) (HW_CMT_CMD4(x).U)
#define HW_CMT_CMD4_WR(x, v) (HW_CMT_CMD4(x).U = (v))
#define HW_CMT_CMD4_RD(x) (ADDRESS_READ(hw_cmt_cmd4_t, HW_CMT_CMD4_ADDR(x)))
#define HW_CMT_CMD4_WR(x, v) (ADDRESS_WRITE(hw_cmt_cmd4_t, HW_CMT_CMD4_ADDR(x), v))
#define HW_CMT_CMD4_SET(x, v) (HW_CMT_CMD4_WR(x, HW_CMT_CMD4_RD(x) | (v)))
#define HW_CMT_CMD4_CLR(x, v) (HW_CMT_CMD4_WR(x, HW_CMT_CMD4_RD(x) & ~(v)))
#define HW_CMT_CMD4_TOG(x, v) (HW_CMT_CMD4_WR(x, HW_CMT_CMD4_RD(x) ^ (v)))
@ -973,8 +980,8 @@ typedef union _hw_cmt_pps
#define HW_CMT_PPS_ADDR(x) ((x) + 0xAU)
#define HW_CMT_PPS(x) (*(__IO hw_cmt_pps_t *) HW_CMT_PPS_ADDR(x))
#define HW_CMT_PPS_RD(x) (HW_CMT_PPS(x).U)
#define HW_CMT_PPS_WR(x, v) (HW_CMT_PPS(x).U = (v))
#define HW_CMT_PPS_RD(x) (ADDRESS_READ(hw_cmt_pps_t, HW_CMT_PPS_ADDR(x)))
#define HW_CMT_PPS_WR(x, v) (ADDRESS_WRITE(hw_cmt_pps_t, HW_CMT_PPS_ADDR(x), v))
#define HW_CMT_PPS_SET(x, v) (HW_CMT_PPS_WR(x, HW_CMT_PPS_RD(x) | (v)))
#define HW_CMT_PPS_CLR(x, v) (HW_CMT_PPS_WR(x, HW_CMT_PPS_RD(x) & ~(v)))
#define HW_CMT_PPS_TOG(x, v) (HW_CMT_PPS_WR(x, HW_CMT_PPS_RD(x) ^ (v)))
@ -1014,7 +1021,7 @@ typedef union _hw_cmt_pps
#define BS_CMT_PPS_PPSDIV (4U) /*!< Bit field size in bits for CMT_PPS_PPSDIV. */
/*! @brief Read current value of the CMT_PPS_PPSDIV field. */
#define BR_CMT_PPS_PPSDIV(x) (HW_CMT_PPS(x).B.PPSDIV)
#define BR_CMT_PPS_PPSDIV(x) (UNION_READ(hw_cmt_pps_t, HW_CMT_PPS_ADDR(x), U, B.PPSDIV))
/*! @brief Format value for bitfield CMT_PPS_PPSDIV. */
#define BF_CMT_PPS_PPSDIV(v) ((uint8_t)((uint8_t)(v) << BP_CMT_PPS_PPSDIV) & BM_CMT_PPS_PPSDIV)
@ -1051,8 +1058,8 @@ typedef union _hw_cmt_dma
#define HW_CMT_DMA_ADDR(x) ((x) + 0xBU)
#define HW_CMT_DMA(x) (*(__IO hw_cmt_dma_t *) HW_CMT_DMA_ADDR(x))
#define HW_CMT_DMA_RD(x) (HW_CMT_DMA(x).U)
#define HW_CMT_DMA_WR(x, v) (HW_CMT_DMA(x).U = (v))
#define HW_CMT_DMA_RD(x) (ADDRESS_READ(hw_cmt_dma_t, HW_CMT_DMA_ADDR(x)))
#define HW_CMT_DMA_WR(x, v) (ADDRESS_WRITE(hw_cmt_dma_t, HW_CMT_DMA_ADDR(x), v))
#define HW_CMT_DMA_SET(x, v) (HW_CMT_DMA_WR(x, HW_CMT_DMA_RD(x) | (v)))
#define HW_CMT_DMA_CLR(x, v) (HW_CMT_DMA_WR(x, HW_CMT_DMA_RD(x) & ~(v)))
#define HW_CMT_DMA_TOG(x, v) (HW_CMT_DMA_WR(x, HW_CMT_DMA_RD(x) ^ (v)))
@ -1077,13 +1084,13 @@ typedef union _hw_cmt_dma
#define BS_CMT_DMA_DMA (1U) /*!< Bit field size in bits for CMT_DMA_DMA. */
/*! @brief Read current value of the CMT_DMA_DMA field. */
#define BR_CMT_DMA_DMA(x) (BITBAND_ACCESS8(HW_CMT_DMA_ADDR(x), BP_CMT_DMA_DMA))
#define BR_CMT_DMA_DMA(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CMT_DMA_ADDR(x), BP_CMT_DMA_DMA)))
/*! @brief Format value for bitfield CMT_DMA_DMA. */
#define BF_CMT_DMA_DMA(v) ((uint8_t)((uint8_t)(v) << BP_CMT_DMA_DMA) & BM_CMT_DMA_DMA)
/*! @brief Set the DMA field to a new value. */
#define BW_CMT_DMA_DMA(x, v) (BITBAND_ACCESS8(HW_CMT_DMA_ADDR(x), BP_CMT_DMA_DMA) = (v))
#define BW_CMT_DMA_DMA(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CMT_DMA_ADDR(x), BP_CMT_DMA_DMA), v))
/*@}*/
/*******************************************************************************

115
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_crc.h
View File

@ -15,6 +15,9 @@
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** (C) COPYRIGHT 2015-2015 ARM Limited
** ALL RIGHTS RESERVED
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
@ -68,6 +71,10 @@
** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
** Update of SystemInit() and SystemCoreClockUpdate() functions.
** Module access macro module_BASES replaced by module_BASE_PTRS.
** - rev. 2.6 (2015-08-03) (ARM)
** All accesses to memory are replaced by equivalent macros; this allows
** memory read/write operations to be re-defined if needed (for example,
** to implement new security features
**
** ###################################################################
*/
@ -137,8 +144,8 @@ typedef union _hw_crc_datal
#define HW_CRC_DATAL_ADDR(x) ((x) + 0x0U)
#define HW_CRC_DATAL(x) (*(__IO hw_crc_datal_t *) HW_CRC_DATAL_ADDR(x))
#define HW_CRC_DATAL_RD(x) (HW_CRC_DATAL(x).U)
#define HW_CRC_DATAL_WR(x, v) (HW_CRC_DATAL(x).U = (v))
#define HW_CRC_DATAL_RD(x) (ADDRESS_READ(hw_crc_datal_t, HW_CRC_DATAL_ADDR(x)))
#define HW_CRC_DATAL_WR(x, v) (ADDRESS_WRITE(hw_crc_datal_t, HW_CRC_DATAL_ADDR(x), v))
#define HW_CRC_DATAL_SET(x, v) (HW_CRC_DATAL_WR(x, HW_CRC_DATAL_RD(x) | (v)))
#define HW_CRC_DATAL_CLR(x, v) (HW_CRC_DATAL_WR(x, HW_CRC_DATAL_RD(x) & ~(v)))
#define HW_CRC_DATAL_TOG(x, v) (HW_CRC_DATAL_WR(x, HW_CRC_DATAL_RD(x) ^ (v)))
@ -191,8 +198,8 @@ typedef union _hw_crc_datah
#define HW_CRC_DATAH_ADDR(x) ((x) + 0x2U)
#define HW_CRC_DATAH(x) (*(__IO hw_crc_datah_t *) HW_CRC_DATAH_ADDR(x))
#define HW_CRC_DATAH_RD(x) (HW_CRC_DATAH(x).U)
#define HW_CRC_DATAH_WR(x, v) (HW_CRC_DATAH(x).U = (v))
#define HW_CRC_DATAH_RD(x) (ADDRESS_READ(hw_crc_datah_t, HW_CRC_DATAH_ADDR(x)))
#define HW_CRC_DATAH_WR(x, v) (ADDRESS_WRITE(hw_crc_datah_t, HW_CRC_DATAH_ADDR(x), v))
#define HW_CRC_DATAH_SET(x, v) (HW_CRC_DATAH_WR(x, HW_CRC_DATAH_RD(x) | (v)))
#define HW_CRC_DATAH_CLR(x, v) (HW_CRC_DATAH_WR(x, HW_CRC_DATAH_RD(x) & ~(v)))
#define HW_CRC_DATAH_TOG(x, v) (HW_CRC_DATAH_WR(x, HW_CRC_DATAH_RD(x) ^ (v)))
@ -245,8 +252,8 @@ typedef union _hw_crc_datall
#define HW_CRC_DATALL_ADDR(x) ((x) + 0x0U)
#define HW_CRC_DATALL(x) (*(__IO hw_crc_datall_t *) HW_CRC_DATALL_ADDR(x))
#define HW_CRC_DATALL_RD(x) (HW_CRC_DATALL(x).U)
#define HW_CRC_DATALL_WR(x, v) (HW_CRC_DATALL(x).U = (v))
#define HW_CRC_DATALL_RD(x) (ADDRESS_READ(hw_crc_datall_t, HW_CRC_DATALL_ADDR(x)))
#define HW_CRC_DATALL_WR(x, v) (ADDRESS_WRITE(hw_crc_datall_t, HW_CRC_DATALL_ADDR(x), v))
#define HW_CRC_DATALL_SET(x, v) (HW_CRC_DATALL_WR(x, HW_CRC_DATALL_RD(x) | (v)))
#define HW_CRC_DATALL_CLR(x, v) (HW_CRC_DATALL_WR(x, HW_CRC_DATALL_RD(x) & ~(v)))
#define HW_CRC_DATALL_TOG(x, v) (HW_CRC_DATALL_WR(x, HW_CRC_DATALL_RD(x) ^ (v)))
@ -299,8 +306,8 @@ typedef union _hw_crc_datalu
#define HW_CRC_DATALU_ADDR(x) ((x) + 0x1U)
#define HW_CRC_DATALU(x) (*(__IO hw_crc_datalu_t *) HW_CRC_DATALU_ADDR(x))
#define HW_CRC_DATALU_RD(x) (HW_CRC_DATALU(x).U)
#define HW_CRC_DATALU_WR(x, v) (HW_CRC_DATALU(x).U = (v))
#define HW_CRC_DATALU_RD(x) (ADDRESS_READ(hw_crc_datalu_t, HW_CRC_DATALU_ADDR(x)))
#define HW_CRC_DATALU_WR(x, v) (ADDRESS_WRITE(hw_crc_datalu_t, HW_CRC_DATALU_ADDR(x), v))
#define HW_CRC_DATALU_SET(x, v) (HW_CRC_DATALU_WR(x, HW_CRC_DATALU_RD(x) | (v)))
#define HW_CRC_DATALU_CLR(x, v) (HW_CRC_DATALU_WR(x, HW_CRC_DATALU_RD(x) & ~(v)))
#define HW_CRC_DATALU_TOG(x, v) (HW_CRC_DATALU_WR(x, HW_CRC_DATALU_RD(x) ^ (v)))
@ -353,8 +360,8 @@ typedef union _hw_crc_datahl
#define HW_CRC_DATAHL_ADDR(x) ((x) + 0x2U)
#define HW_CRC_DATAHL(x) (*(__IO hw_crc_datahl_t *) HW_CRC_DATAHL_ADDR(x))
#define HW_CRC_DATAHL_RD(x) (HW_CRC_DATAHL(x).U)
#define HW_CRC_DATAHL_WR(x, v) (HW_CRC_DATAHL(x).U = (v))
#define HW_CRC_DATAHL_RD(x) (ADDRESS_READ(hw_crc_datahl_t, HW_CRC_DATAHL_ADDR(x)))
#define HW_CRC_DATAHL_WR(x, v) (ADDRESS_WRITE(hw_crc_datahl_t, HW_CRC_DATAHL_ADDR(x), v))
#define HW_CRC_DATAHL_SET(x, v) (HW_CRC_DATAHL_WR(x, HW_CRC_DATAHL_RD(x) | (v)))
#define HW_CRC_DATAHL_CLR(x, v) (HW_CRC_DATAHL_WR(x, HW_CRC_DATAHL_RD(x) & ~(v)))
#define HW_CRC_DATAHL_TOG(x, v) (HW_CRC_DATAHL_WR(x, HW_CRC_DATAHL_RD(x) ^ (v)))
@ -407,8 +414,8 @@ typedef union _hw_crc_datahu
#define HW_CRC_DATAHU_ADDR(x) ((x) + 0x3U)
#define HW_CRC_DATAHU(x) (*(__IO hw_crc_datahu_t *) HW_CRC_DATAHU_ADDR(x))
#define HW_CRC_DATAHU_RD(x) (HW_CRC_DATAHU(x).U)
#define HW_CRC_DATAHU_WR(x, v) (HW_CRC_DATAHU(x).U = (v))
#define HW_CRC_DATAHU_RD(x) (ADDRESS_READ(hw_crc_datahu_t, HW_CRC_DATAHU_ADDR(x)))
#define HW_CRC_DATAHU_WR(x, v) (ADDRESS_WRITE(hw_crc_datahu_t, HW_CRC_DATAHU_ADDR(x), v))
#define HW_CRC_DATAHU_SET(x, v) (HW_CRC_DATAHU_WR(x, HW_CRC_DATAHU_RD(x) | (v)))
#define HW_CRC_DATAHU_CLR(x, v) (HW_CRC_DATAHU_WR(x, HW_CRC_DATAHU_RD(x) & ~(v)))
#define HW_CRC_DATAHU_TOG(x, v) (HW_CRC_DATAHU_WR(x, HW_CRC_DATAHU_RD(x) ^ (v)))
@ -477,8 +484,8 @@ typedef union _hw_crc_data
#define HW_CRC_DATA_ADDR(x) ((x) + 0x0U)
#define HW_CRC_DATA(x) (*(__IO hw_crc_data_t *) HW_CRC_DATA_ADDR(x))
#define HW_CRC_DATA_RD(x) (HW_CRC_DATA(x).U)
#define HW_CRC_DATA_WR(x, v) (HW_CRC_DATA(x).U = (v))
#define HW_CRC_DATA_RD(x) (ADDRESS_READ(hw_crc_data_t, HW_CRC_DATA_ADDR(x)))
#define HW_CRC_DATA_WR(x, v) (ADDRESS_WRITE(hw_crc_data_t, HW_CRC_DATA_ADDR(x), v))
#define HW_CRC_DATA_SET(x, v) (HW_CRC_DATA_WR(x, HW_CRC_DATA_RD(x) | (v)))
#define HW_CRC_DATA_CLR(x, v) (HW_CRC_DATA_WR(x, HW_CRC_DATA_RD(x) & ~(v)))
#define HW_CRC_DATA_TOG(x, v) (HW_CRC_DATA_WR(x, HW_CRC_DATA_RD(x) ^ (v)))
@ -501,7 +508,7 @@ typedef union _hw_crc_data
#define BS_CRC_DATA_LL (8U) /*!< Bit field size in bits for CRC_DATA_LL. */
/*! @brief Read current value of the CRC_DATA_LL field. */
#define BR_CRC_DATA_LL(x) (HW_CRC_DATA(x).B.LL)
#define BR_CRC_DATA_LL(x) (UNION_READ(hw_crc_data_t, HW_CRC_DATA_ADDR(x), U, B.LL))
/*! @brief Format value for bitfield CRC_DATA_LL. */
#define BF_CRC_DATA_LL(v) ((uint32_t)((uint32_t)(v) << BP_CRC_DATA_LL) & BM_CRC_DATA_LL)
@ -523,7 +530,7 @@ typedef union _hw_crc_data
#define BS_CRC_DATA_LU (8U) /*!< Bit field size in bits for CRC_DATA_LU. */
/*! @brief Read current value of the CRC_DATA_LU field. */
#define BR_CRC_DATA_LU(x) (HW_CRC_DATA(x).B.LU)
#define BR_CRC_DATA_LU(x) (UNION_READ(hw_crc_data_t, HW_CRC_DATA_ADDR(x), U, B.LU))
/*! @brief Format value for bitfield CRC_DATA_LU. */
#define BF_CRC_DATA_LU(v) ((uint32_t)((uint32_t)(v) << BP_CRC_DATA_LU) & BM_CRC_DATA_LU)
@ -547,7 +554,7 @@ typedef union _hw_crc_data
#define BS_CRC_DATA_HL (8U) /*!< Bit field size in bits for CRC_DATA_HL. */
/*! @brief Read current value of the CRC_DATA_HL field. */
#define BR_CRC_DATA_HL(x) (HW_CRC_DATA(x).B.HL)
#define BR_CRC_DATA_HL(x) (UNION_READ(hw_crc_data_t, HW_CRC_DATA_ADDR(x), U, B.HL))
/*! @brief Format value for bitfield CRC_DATA_HL. */
#define BF_CRC_DATA_HL(v) ((uint32_t)((uint32_t)(v) << BP_CRC_DATA_HL) & BM_CRC_DATA_HL)
@ -571,7 +578,7 @@ typedef union _hw_crc_data
#define BS_CRC_DATA_HU (8U) /*!< Bit field size in bits for CRC_DATA_HU. */
/*! @brief Read current value of the CRC_DATA_HU field. */
#define BR_CRC_DATA_HU(x) (HW_CRC_DATA(x).B.HU)
#define BR_CRC_DATA_HU(x) (UNION_READ(hw_crc_data_t, HW_CRC_DATA_ADDR(x), U, B.HU))
/*! @brief Format value for bitfield CRC_DATA_HU. */
#define BF_CRC_DATA_HU(v) ((uint32_t)((uint32_t)(v) << BP_CRC_DATA_HU) & BM_CRC_DATA_HU)
@ -612,8 +619,8 @@ typedef union _hw_crc_gpoly
#define HW_CRC_GPOLY_ADDR(x) ((x) + 0x4U)
#define HW_CRC_GPOLY(x) (*(__IO hw_crc_gpoly_t *) HW_CRC_GPOLY_ADDR(x))
#define HW_CRC_GPOLY_RD(x) (HW_CRC_GPOLY(x).U)
#define HW_CRC_GPOLY_WR(x, v) (HW_CRC_GPOLY(x).U = (v))
#define HW_CRC_GPOLY_RD(x) (ADDRESS_READ(hw_crc_gpoly_t, HW_CRC_GPOLY_ADDR(x)))
#define HW_CRC_GPOLY_WR(x, v) (ADDRESS_WRITE(hw_crc_gpoly_t, HW_CRC_GPOLY_ADDR(x), v))
#define HW_CRC_GPOLY_SET(x, v) (HW_CRC_GPOLY_WR(x, HW_CRC_GPOLY_RD(x) | (v)))
#define HW_CRC_GPOLY_CLR(x, v) (HW_CRC_GPOLY_WR(x, HW_CRC_GPOLY_RD(x) & ~(v)))
#define HW_CRC_GPOLY_TOG(x, v) (HW_CRC_GPOLY_WR(x, HW_CRC_GPOLY_RD(x) ^ (v)))
@ -634,7 +641,7 @@ typedef union _hw_crc_gpoly
#define BS_CRC_GPOLY_LOW (16U) /*!< Bit field size in bits for CRC_GPOLY_LOW. */
/*! @brief Read current value of the CRC_GPOLY_LOW field. */
#define BR_CRC_GPOLY_LOW(x) (HW_CRC_GPOLY(x).B.LOW)
#define BR_CRC_GPOLY_LOW(x) (UNION_READ(hw_crc_gpoly_t, HW_CRC_GPOLY_ADDR(x), U, B.LOW))
/*! @brief Format value for bitfield CRC_GPOLY_LOW. */
#define BF_CRC_GPOLY_LOW(v) ((uint32_t)((uint32_t)(v) << BP_CRC_GPOLY_LOW) & BM_CRC_GPOLY_LOW)
@ -655,7 +662,7 @@ typedef union _hw_crc_gpoly
#define BS_CRC_GPOLY_HIGH (16U) /*!< Bit field size in bits for CRC_GPOLY_HIGH. */
/*! @brief Read current value of the CRC_GPOLY_HIGH field. */
#define BR_CRC_GPOLY_HIGH(x) (HW_CRC_GPOLY(x).B.HIGH)
#define BR_CRC_GPOLY_HIGH(x) (UNION_READ(hw_crc_gpoly_t, HW_CRC_GPOLY_ADDR(x), U, B.HIGH))
/*! @brief Format value for bitfield CRC_GPOLY_HIGH. */
#define BF_CRC_GPOLY_HIGH(v) ((uint32_t)((uint32_t)(v) << BP_CRC_GPOLY_HIGH) & BM_CRC_GPOLY_HIGH)
@ -689,8 +696,8 @@ typedef union _hw_crc_gpolyl
#define HW_CRC_GPOLYL_ADDR(x) ((x) + 0x4U)
#define HW_CRC_GPOLYL(x) (*(__IO hw_crc_gpolyl_t *) HW_CRC_GPOLYL_ADDR(x))
#define HW_CRC_GPOLYL_RD(x) (HW_CRC_GPOLYL(x).U)
#define HW_CRC_GPOLYL_WR(x, v) (HW_CRC_GPOLYL(x).U = (v))
#define HW_CRC_GPOLYL_RD(x) (ADDRESS_READ(hw_crc_gpolyl_t, HW_CRC_GPOLYL_ADDR(x)))
#define HW_CRC_GPOLYL_WR(x, v) (ADDRESS_WRITE(hw_crc_gpolyl_t, HW_CRC_GPOLYL_ADDR(x), v))
#define HW_CRC_GPOLYL_SET(x, v) (HW_CRC_GPOLYL_WR(x, HW_CRC_GPOLYL_RD(x) | (v)))
#define HW_CRC_GPOLYL_CLR(x, v) (HW_CRC_GPOLYL_WR(x, HW_CRC_GPOLYL_RD(x) & ~(v)))
#define HW_CRC_GPOLYL_TOG(x, v) (HW_CRC_GPOLYL_WR(x, HW_CRC_GPOLYL_RD(x) ^ (v)))
@ -743,8 +750,8 @@ typedef union _hw_crc_gpolyh
#define HW_CRC_GPOLYH_ADDR(x) ((x) + 0x6U)
#define HW_CRC_GPOLYH(x) (*(__IO hw_crc_gpolyh_t *) HW_CRC_GPOLYH_ADDR(x))
#define HW_CRC_GPOLYH_RD(x) (HW_CRC_GPOLYH(x).U)
#define HW_CRC_GPOLYH_WR(x, v) (HW_CRC_GPOLYH(x).U = (v))
#define HW_CRC_GPOLYH_RD(x) (ADDRESS_READ(hw_crc_gpolyh_t, HW_CRC_GPOLYH_ADDR(x)))
#define HW_CRC_GPOLYH_WR(x, v) (ADDRESS_WRITE(hw_crc_gpolyh_t, HW_CRC_GPOLYH_ADDR(x), v))
#define HW_CRC_GPOLYH_SET(x, v) (HW_CRC_GPOLYH_WR(x, HW_CRC_GPOLYH_RD(x) | (v)))
#define HW_CRC_GPOLYH_CLR(x, v) (HW_CRC_GPOLYH_WR(x, HW_CRC_GPOLYH_RD(x) & ~(v)))
#define HW_CRC_GPOLYH_TOG(x, v) (HW_CRC_GPOLYH_WR(x, HW_CRC_GPOLYH_RD(x) ^ (v)))
@ -797,8 +804,8 @@ typedef union _hw_crc_gpolyll
#define HW_CRC_GPOLYLL_ADDR(x) ((x) + 0x4U)
#define HW_CRC_GPOLYLL(x) (*(__IO hw_crc_gpolyll_t *) HW_CRC_GPOLYLL_ADDR(x))
#define HW_CRC_GPOLYLL_RD(x) (HW_CRC_GPOLYLL(x).U)
#define HW_CRC_GPOLYLL_WR(x, v) (HW_CRC_GPOLYLL(x).U = (v))
#define HW_CRC_GPOLYLL_RD(x) (ADDRESS_READ(hw_crc_gpolyll_t, HW_CRC_GPOLYLL_ADDR(x)))
#define HW_CRC_GPOLYLL_WR(x, v) (ADDRESS_WRITE(hw_crc_gpolyll_t, HW_CRC_GPOLYLL_ADDR(x), v))
#define HW_CRC_GPOLYLL_SET(x, v) (HW_CRC_GPOLYLL_WR(x, HW_CRC_GPOLYLL_RD(x) | (v)))
#define HW_CRC_GPOLYLL_CLR(x, v) (HW_CRC_GPOLYLL_WR(x, HW_CRC_GPOLYLL_RD(x) & ~(v)))
#define HW_CRC_GPOLYLL_TOG(x, v) (HW_CRC_GPOLYLL_WR(x, HW_CRC_GPOLYLL_RD(x) ^ (v)))
@ -851,8 +858,8 @@ typedef union _hw_crc_gpolylu
#define HW_CRC_GPOLYLU_ADDR(x) ((x) + 0x5U)
#define HW_CRC_GPOLYLU(x) (*(__IO hw_crc_gpolylu_t *) HW_CRC_GPOLYLU_ADDR(x))
#define HW_CRC_GPOLYLU_RD(x) (HW_CRC_GPOLYLU(x).U)
#define HW_CRC_GPOLYLU_WR(x, v) (HW_CRC_GPOLYLU(x).U = (v))
#define HW_CRC_GPOLYLU_RD(x) (ADDRESS_READ(hw_crc_gpolylu_t, HW_CRC_GPOLYLU_ADDR(x)))
#define HW_CRC_GPOLYLU_WR(x, v) (ADDRESS_WRITE(hw_crc_gpolylu_t, HW_CRC_GPOLYLU_ADDR(x), v))
#define HW_CRC_GPOLYLU_SET(x, v) (HW_CRC_GPOLYLU_WR(x, HW_CRC_GPOLYLU_RD(x) | (v)))
#define HW_CRC_GPOLYLU_CLR(x, v) (HW_CRC_GPOLYLU_WR(x, HW_CRC_GPOLYLU_RD(x) & ~(v)))
#define HW_CRC_GPOLYLU_TOG(x, v) (HW_CRC_GPOLYLU_WR(x, HW_CRC_GPOLYLU_RD(x) ^ (v)))
@ -905,8 +912,8 @@ typedef union _hw_crc_gpolyhl
#define HW_CRC_GPOLYHL_ADDR(x) ((x) + 0x6U)
#define HW_CRC_GPOLYHL(x) (*(__IO hw_crc_gpolyhl_t *) HW_CRC_GPOLYHL_ADDR(x))
#define HW_CRC_GPOLYHL_RD(x) (HW_CRC_GPOLYHL(x).U)
#define HW_CRC_GPOLYHL_WR(x, v) (HW_CRC_GPOLYHL(x).U = (v))
#define HW_CRC_GPOLYHL_RD(x) (ADDRESS_READ(hw_crc_gpolyhl_t, HW_CRC_GPOLYHL_ADDR(x)))
#define HW_CRC_GPOLYHL_WR(x, v) (ADDRESS_WRITE(hw_crc_gpolyhl_t, HW_CRC_GPOLYHL_ADDR(x), v))
#define HW_CRC_GPOLYHL_SET(x, v) (HW_CRC_GPOLYHL_WR(x, HW_CRC_GPOLYHL_RD(x) | (v)))
#define HW_CRC_GPOLYHL_CLR(x, v) (HW_CRC_GPOLYHL_WR(x, HW_CRC_GPOLYHL_RD(x) & ~(v)))
#define HW_CRC_GPOLYHL_TOG(x, v) (HW_CRC_GPOLYHL_WR(x, HW_CRC_GPOLYHL_RD(x) ^ (v)))
@ -959,8 +966,8 @@ typedef union _hw_crc_gpolyhu
#define HW_CRC_GPOLYHU_ADDR(x) ((x) + 0x7U)
#define HW_CRC_GPOLYHU(x) (*(__IO hw_crc_gpolyhu_t *) HW_CRC_GPOLYHU_ADDR(x))
#define HW_CRC_GPOLYHU_RD(x) (HW_CRC_GPOLYHU(x).U)
#define HW_CRC_GPOLYHU_WR(x, v) (HW_CRC_GPOLYHU(x).U = (v))
#define HW_CRC_GPOLYHU_RD(x) (ADDRESS_READ(hw_crc_gpolyhu_t, HW_CRC_GPOLYHU_ADDR(x)))
#define HW_CRC_GPOLYHU_WR(x, v) (ADDRESS_WRITE(hw_crc_gpolyhu_t, HW_CRC_GPOLYHU_ADDR(x), v))
#define HW_CRC_GPOLYHU_SET(x, v) (HW_CRC_GPOLYHU_WR(x, HW_CRC_GPOLYHU_RD(x) | (v)))
#define HW_CRC_GPOLYHU_CLR(x, v) (HW_CRC_GPOLYHU_WR(x, HW_CRC_GPOLYHU_RD(x) & ~(v)))
#define HW_CRC_GPOLYHU_TOG(x, v) (HW_CRC_GPOLYHU_WR(x, HW_CRC_GPOLYHU_RD(x) ^ (v)))
@ -1024,8 +1031,8 @@ typedef union _hw_crc_ctrl
#define HW_CRC_CTRL_ADDR(x) ((x) + 0x8U)
#define HW_CRC_CTRL(x) (*(__IO hw_crc_ctrl_t *) HW_CRC_CTRL_ADDR(x))
#define HW_CRC_CTRL_RD(x) (HW_CRC_CTRL(x).U)
#define HW_CRC_CTRL_WR(x, v) (HW_CRC_CTRL(x).U = (v))
#define HW_CRC_CTRL_RD(x) (ADDRESS_READ(hw_crc_ctrl_t, HW_CRC_CTRL_ADDR(x)))
#define HW_CRC_CTRL_WR(x, v) (ADDRESS_WRITE(hw_crc_ctrl_t, HW_CRC_CTRL_ADDR(x), v))
#define HW_CRC_CTRL_SET(x, v) (HW_CRC_CTRL_WR(x, HW_CRC_CTRL_RD(x) | (v)))
#define HW_CRC_CTRL_CLR(x, v) (HW_CRC_CTRL_WR(x, HW_CRC_CTRL_RD(x) & ~(v)))
#define HW_CRC_CTRL_TOG(x, v) (HW_CRC_CTRL_WR(x, HW_CRC_CTRL_RD(x) ^ (v)))
@ -1050,13 +1057,13 @@ typedef union _hw_crc_ctrl
#define BS_CRC_CTRL_TCRC (1U) /*!< Bit field size in bits for CRC_CTRL_TCRC. */
/*! @brief Read current value of the CRC_CTRL_TCRC field. */
#define BR_CRC_CTRL_TCRC(x) (BITBAND_ACCESS32(HW_CRC_CTRL_ADDR(x), BP_CRC_CTRL_TCRC))
#define BR_CRC_CTRL_TCRC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CRC_CTRL_ADDR(x), BP_CRC_CTRL_TCRC)))
/*! @brief Format value for bitfield CRC_CTRL_TCRC. */
#define BF_CRC_CTRL_TCRC(v) ((uint32_t)((uint32_t)(v) << BP_CRC_CTRL_TCRC) & BM_CRC_CTRL_TCRC)
/*! @brief Set the TCRC field to a new value. */
#define BW_CRC_CTRL_TCRC(x, v) (BITBAND_ACCESS32(HW_CRC_CTRL_ADDR(x), BP_CRC_CTRL_TCRC) = (v))
#define BW_CRC_CTRL_TCRC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CRC_CTRL_ADDR(x), BP_CRC_CTRL_TCRC), v))
/*@}*/
/*!
@ -1076,13 +1083,13 @@ typedef union _hw_crc_ctrl
#define BS_CRC_CTRL_WAS (1U) /*!< Bit field size in bits for CRC_CTRL_WAS. */
/*! @brief Read current value of the CRC_CTRL_WAS field. */
#define BR_CRC_CTRL_WAS(x) (BITBAND_ACCESS32(HW_CRC_CTRL_ADDR(x), BP_CRC_CTRL_WAS))
#define BR_CRC_CTRL_WAS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CRC_CTRL_ADDR(x), BP_CRC_CTRL_WAS)))
/*! @brief Format value for bitfield CRC_CTRL_WAS. */
#define BF_CRC_CTRL_WAS(v) ((uint32_t)((uint32_t)(v) << BP_CRC_CTRL_WAS) & BM_CRC_CTRL_WAS)
/*! @brief Set the WAS field to a new value. */
#define BW_CRC_CTRL_WAS(x, v) (BITBAND_ACCESS32(HW_CRC_CTRL_ADDR(x), BP_CRC_CTRL_WAS) = (v))
#define BW_CRC_CTRL_WAS(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CRC_CTRL_ADDR(x), BP_CRC_CTRL_WAS), v))
/*@}*/
/*!
@ -1101,13 +1108,13 @@ typedef union _hw_crc_ctrl
#define BS_CRC_CTRL_FXOR (1U) /*!< Bit field size in bits for CRC_CTRL_FXOR. */
/*! @brief Read current value of the CRC_CTRL_FXOR field. */
#define BR_CRC_CTRL_FXOR(x) (BITBAND_ACCESS32(HW_CRC_CTRL_ADDR(x), BP_CRC_CTRL_FXOR))
#define BR_CRC_CTRL_FXOR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_CRC_CTRL_ADDR(x), BP_CRC_CTRL_FXOR)))
/*! @brief Format value for bitfield CRC_CTRL_FXOR. */
#define BF_CRC_CTRL_FXOR(v) ((uint32_t)((uint32_t)(v) << BP_CRC_CTRL_FXOR) & BM_CRC_CTRL_FXOR)
/*! @brief Set the FXOR field to a new value. */
#define BW_CRC_CTRL_FXOR(x, v) (BITBAND_ACCESS32(HW_CRC_CTRL_ADDR(x), BP_CRC_CTRL_FXOR) = (v))
#define BW_CRC_CTRL_FXOR(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_CRC_CTRL_ADDR(x), BP_CRC_CTRL_FXOR), v))
/*@}*/
/*!
@ -1129,7 +1136,7 @@ typedef union _hw_crc_ctrl
#define BS_CRC_CTRL_TOTR (2U) /*!< Bit field size in bits for CRC_CTRL_TOTR. */
/*! @brief Read current value of the CRC_CTRL_TOTR field. */
#define BR_CRC_CTRL_TOTR(x) (HW_CRC_CTRL(x).B.TOTR)
#define BR_CRC_CTRL_TOTR(x) (UNION_READ(hw_crc_ctrl_t, HW_CRC_CTRL_ADDR(x), U, B.TOTR))
/*! @brief Format value for bitfield CRC_CTRL_TOTR. */
#define BF_CRC_CTRL_TOTR(v) ((uint32_t)((uint32_t)(v) << BP_CRC_CTRL_TOTR) & BM_CRC_CTRL_TOTR)
@ -1157,7 +1164,7 @@ typedef union _hw_crc_ctrl
#define BS_CRC_CTRL_TOT (2U) /*!< Bit field size in bits for CRC_CTRL_TOT. */
/*! @brief Read current value of the CRC_CTRL_TOT field. */
#define BR_CRC_CTRL_TOT(x) (HW_CRC_CTRL(x).B.TOT)
#define BR_CRC_CTRL_TOT(x) (UNION_READ(hw_crc_ctrl_t, HW_CRC_CTRL_ADDR(x), U, B.TOT))
/*! @brief Format value for bitfield CRC_CTRL_TOT. */
#define BF_CRC_CTRL_TOT(v) ((uint32_t)((uint32_t)(v) << BP_CRC_CTRL_TOT) & BM_CRC_CTRL_TOT)
@ -1195,8 +1202,8 @@ typedef union _hw_crc_ctrlhu
#define HW_CRC_CTRLHU_ADDR(x) ((x) + 0xBU)
#define HW_CRC_CTRLHU(x) (*(__IO hw_crc_ctrlhu_t *) HW_CRC_CTRLHU_ADDR(x))
#define HW_CRC_CTRLHU_RD(x) (HW_CRC_CTRLHU(x).U)
#define HW_CRC_CTRLHU_WR(x, v) (HW_CRC_CTRLHU(x).U = (v))
#define HW_CRC_CTRLHU_RD(x) (ADDRESS_READ(hw_crc_ctrlhu_t, HW_CRC_CTRLHU_ADDR(x)))
#define HW_CRC_CTRLHU_WR(x, v) (ADDRESS_WRITE(hw_crc_ctrlhu_t, HW_CRC_CTRLHU_ADDR(x), v))
#define HW_CRC_CTRLHU_SET(x, v) (HW_CRC_CTRLHU_WR(x, HW_CRC_CTRLHU_RD(x) | (v)))
#define HW_CRC_CTRLHU_CLR(x, v) (HW_CRC_CTRLHU_WR(x, HW_CRC_CTRLHU_RD(x) & ~(v)))
#define HW_CRC_CTRLHU_TOG(x, v) (HW_CRC_CTRLHU_WR(x, HW_CRC_CTRLHU_RD(x) ^ (v)))
@ -1219,13 +1226,13 @@ typedef union _hw_crc_ctrlhu
#define BS_CRC_CTRLHU_TCRC (1U) /*!< Bit field size in bits for CRC_CTRLHU_TCRC. */
/*! @brief Read current value of the CRC_CTRLHU_TCRC field. */
#define BR_CRC_CTRLHU_TCRC(x) (BITBAND_ACCESS8(HW_CRC_CTRLHU_ADDR(x), BP_CRC_CTRLHU_TCRC))
#define BR_CRC_CTRLHU_TCRC(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CRC_CTRLHU_ADDR(x), BP_CRC_CTRLHU_TCRC)))
/*! @brief Format value for bitfield CRC_CTRLHU_TCRC. */
#define BF_CRC_CTRLHU_TCRC(v) ((uint8_t)((uint8_t)(v) << BP_CRC_CTRLHU_TCRC) & BM_CRC_CTRLHU_TCRC)
/*! @brief Set the TCRC field to a new value. */
#define BW_CRC_CTRLHU_TCRC(x, v) (BITBAND_ACCESS8(HW_CRC_CTRLHU_ADDR(x), BP_CRC_CTRLHU_TCRC) = (v))
#define BW_CRC_CTRLHU_TCRC(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CRC_CTRLHU_ADDR(x), BP_CRC_CTRLHU_TCRC), v))
/*@}*/
/*!
@ -1241,13 +1248,13 @@ typedef union _hw_crc_ctrlhu
#define BS_CRC_CTRLHU_WAS (1U) /*!< Bit field size in bits for CRC_CTRLHU_WAS. */
/*! @brief Read current value of the CRC_CTRLHU_WAS field. */
#define BR_CRC_CTRLHU_WAS(x) (BITBAND_ACCESS8(HW_CRC_CTRLHU_ADDR(x), BP_CRC_CTRLHU_WAS))
#define BR_CRC_CTRLHU_WAS(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CRC_CTRLHU_ADDR(x), BP_CRC_CTRLHU_WAS)))
/*! @brief Format value for bitfield CRC_CTRLHU_WAS. */
#define BF_CRC_CTRLHU_WAS(v) ((uint8_t)((uint8_t)(v) << BP_CRC_CTRLHU_WAS) & BM_CRC_CTRLHU_WAS)
/*! @brief Set the WAS field to a new value. */
#define BW_CRC_CTRLHU_WAS(x, v) (BITBAND_ACCESS8(HW_CRC_CTRLHU_ADDR(x), BP_CRC_CTRLHU_WAS) = (v))
#define BW_CRC_CTRLHU_WAS(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CRC_CTRLHU_ADDR(x), BP_CRC_CTRLHU_WAS), v))
/*@}*/
/*!
@ -1263,13 +1270,13 @@ typedef union _hw_crc_ctrlhu
#define BS_CRC_CTRLHU_FXOR (1U) /*!< Bit field size in bits for CRC_CTRLHU_FXOR. */
/*! @brief Read current value of the CRC_CTRLHU_FXOR field. */
#define BR_CRC_CTRLHU_FXOR(x) (BITBAND_ACCESS8(HW_CRC_CTRLHU_ADDR(x), BP_CRC_CTRLHU_FXOR))
#define BR_CRC_CTRLHU_FXOR(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_CRC_CTRLHU_ADDR(x), BP_CRC_CTRLHU_FXOR)))
/*! @brief Format value for bitfield CRC_CTRLHU_FXOR. */
#define BF_CRC_CTRLHU_FXOR(v) ((uint8_t)((uint8_t)(v) << BP_CRC_CTRLHU_FXOR) & BM_CRC_CTRLHU_FXOR)
/*! @brief Set the FXOR field to a new value. */
#define BW_CRC_CTRLHU_FXOR(x, v) (BITBAND_ACCESS8(HW_CRC_CTRLHU_ADDR(x), BP_CRC_CTRLHU_FXOR) = (v))
#define BW_CRC_CTRLHU_FXOR(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_CRC_CTRLHU_ADDR(x), BP_CRC_CTRLHU_FXOR), v))
/*@}*/
/*!
@ -1287,7 +1294,7 @@ typedef union _hw_crc_ctrlhu
#define BS_CRC_CTRLHU_TOTR (2U) /*!< Bit field size in bits for CRC_CTRLHU_TOTR. */
/*! @brief Read current value of the CRC_CTRLHU_TOTR field. */
#define BR_CRC_CTRLHU_TOTR(x) (HW_CRC_CTRLHU(x).B.TOTR)
#define BR_CRC_CTRLHU_TOTR(x) (UNION_READ(hw_crc_ctrlhu_t, HW_CRC_CTRLHU_ADDR(x), U, B.TOTR))
/*! @brief Format value for bitfield CRC_CTRLHU_TOTR. */
#define BF_CRC_CTRLHU_TOTR(v) ((uint8_t)((uint8_t)(v) << BP_CRC_CTRLHU_TOTR) & BM_CRC_CTRLHU_TOTR)
@ -1311,7 +1318,7 @@ typedef union _hw_crc_ctrlhu
#define BS_CRC_CTRLHU_TOT (2U) /*!< Bit field size in bits for CRC_CTRLHU_TOT. */
/*! @brief Read current value of the CRC_CTRLHU_TOT field. */
#define BR_CRC_CTRLHU_TOT(x) (HW_CRC_CTRLHU(x).B.TOT)
#define BR_CRC_CTRLHU_TOT(x) (UNION_READ(hw_crc_ctrlhu_t, HW_CRC_CTRLHU_ADDR(x), U, B.TOT))
/*! @brief Format value for bitfield CRC_CTRLHU_TOT. */
#define BF_CRC_CTRLHU_TOT(v) ((uint8_t)((uint8_t)(v) << BP_CRC_CTRLHU_TOT) & BM_CRC_CTRLHU_TOT)

91
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_dac.h
View File

@ -15,6 +15,9 @@
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** (C) COPYRIGHT 2015-2015 ARM Limited
** ALL RIGHTS RESERVED
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
@ -68,6 +71,10 @@
** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
** Update of SystemInit() and SystemCoreClockUpdate() functions.
** Module access macro module_BASES replaced by module_BASE_PTRS.
** - rev. 2.6 (2015-08-03) (ARM)
** All accesses to memory are replaced by equivalent macros; this allows
** memory read/write operations to be re-defined if needed (for example,
** to implement new security features
**
** ###################################################################
*/
@ -130,8 +137,8 @@ typedef union _hw_dac_datnl
#define HW_DAC_DATnL_ADDR(x, n) ((x) + 0x0U + (0x2U * (n)))
#define HW_DAC_DATnL(x, n) (*(__IO hw_dac_datnl_t *) HW_DAC_DATnL_ADDR(x, n))
#define HW_DAC_DATnL_RD(x, n) (HW_DAC_DATnL(x, n).U)
#define HW_DAC_DATnL_WR(x, n, v) (HW_DAC_DATnL(x, n).U = (v))
#define HW_DAC_DATnL_RD(x, n) (ADDRESS_READ(hw_dac_datnl_t, HW_DAC_DATnL_ADDR(x, n)))
#define HW_DAC_DATnL_WR(x, n, v) (ADDRESS_WRITE(hw_dac_datnl_t, HW_DAC_DATnL_ADDR(x, n), v))
#define HW_DAC_DATnL_SET(x, n, v) (HW_DAC_DATnL_WR(x, n, HW_DAC_DATnL_RD(x, n) | (v)))
#define HW_DAC_DATnL_CLR(x, n, v) (HW_DAC_DATnL_WR(x, n, HW_DAC_DATnL_RD(x, n) & ~(v)))
#define HW_DAC_DATnL_TOG(x, n, v) (HW_DAC_DATnL_WR(x, n, HW_DAC_DATnL_RD(x, n) ^ (v)))
@ -190,8 +197,8 @@ typedef union _hw_dac_datnh
#define HW_DAC_DATnH_ADDR(x, n) ((x) + 0x1U + (0x2U * (n)))
#define HW_DAC_DATnH(x, n) (*(__IO hw_dac_datnh_t *) HW_DAC_DATnH_ADDR(x, n))
#define HW_DAC_DATnH_RD(x, n) (HW_DAC_DATnH(x, n).U)
#define HW_DAC_DATnH_WR(x, n, v) (HW_DAC_DATnH(x, n).U = (v))
#define HW_DAC_DATnH_RD(x, n) (ADDRESS_READ(hw_dac_datnh_t, HW_DAC_DATnH_ADDR(x, n)))
#define HW_DAC_DATnH_WR(x, n, v) (ADDRESS_WRITE(hw_dac_datnh_t, HW_DAC_DATnH_ADDR(x, n), v))
#define HW_DAC_DATnH_SET(x, n, v) (HW_DAC_DATnH_WR(x, n, HW_DAC_DATnH_RD(x, n) | (v)))
#define HW_DAC_DATnH_CLR(x, n, v) (HW_DAC_DATnH_WR(x, n, HW_DAC_DATnH_RD(x, n) & ~(v)))
#define HW_DAC_DATnH_TOG(x, n, v) (HW_DAC_DATnH_WR(x, n, HW_DAC_DATnH_RD(x, n) ^ (v)))
@ -214,7 +221,7 @@ typedef union _hw_dac_datnh
#define BS_DAC_DATnH_DATA1 (4U) /*!< Bit field size in bits for DAC_DATnH_DATA1. */
/*! @brief Read current value of the DAC_DATnH_DATA1 field. */
#define BR_DAC_DATnH_DATA1(x, n) (HW_DAC_DATnH(x, n).B.DATA1)
#define BR_DAC_DATnH_DATA1(x, n) (UNION_READ(hw_dac_datnh_t, HW_DAC_DATnH_ADDR(x, n), U, B.DATA1))
/*! @brief Format value for bitfield DAC_DATnH_DATA1. */
#define BF_DAC_DATnH_DATA1(v) ((uint8_t)((uint8_t)(v) << BP_DAC_DATnH_DATA1) & BM_DAC_DATnH_DATA1)
@ -259,8 +266,8 @@ typedef union _hw_dac_sr
#define HW_DAC_SR_ADDR(x) ((x) + 0x20U)
#define HW_DAC_SR(x) (*(__IO hw_dac_sr_t *) HW_DAC_SR_ADDR(x))
#define HW_DAC_SR_RD(x) (HW_DAC_SR(x).U)
#define HW_DAC_SR_WR(x, v) (HW_DAC_SR(x).U = (v))
#define HW_DAC_SR_RD(x) (ADDRESS_READ(hw_dac_sr_t, HW_DAC_SR_ADDR(x)))
#define HW_DAC_SR_WR(x, v) (ADDRESS_WRITE(hw_dac_sr_t, HW_DAC_SR_ADDR(x), v))
#define HW_DAC_SR_SET(x, v) (HW_DAC_SR_WR(x, HW_DAC_SR_RD(x) | (v)))
#define HW_DAC_SR_CLR(x, v) (HW_DAC_SR_WR(x, HW_DAC_SR_RD(x) & ~(v)))
#define HW_DAC_SR_TOG(x, v) (HW_DAC_SR_WR(x, HW_DAC_SR_RD(x) ^ (v)))
@ -283,13 +290,13 @@ typedef union _hw_dac_sr
#define BS_DAC_SR_DACBFRPBF (1U) /*!< Bit field size in bits for DAC_SR_DACBFRPBF. */
/*! @brief Read current value of the DAC_SR_DACBFRPBF field. */
#define BR_DAC_SR_DACBFRPBF(x) (BITBAND_ACCESS8(HW_DAC_SR_ADDR(x), BP_DAC_SR_DACBFRPBF))
#define BR_DAC_SR_DACBFRPBF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_DAC_SR_ADDR(x), BP_DAC_SR_DACBFRPBF)))
/*! @brief Format value for bitfield DAC_SR_DACBFRPBF. */
#define BF_DAC_SR_DACBFRPBF(v) ((uint8_t)((uint8_t)(v) << BP_DAC_SR_DACBFRPBF) & BM_DAC_SR_DACBFRPBF)
/*! @brief Set the DACBFRPBF field to a new value. */
#define BW_DAC_SR_DACBFRPBF(x, v) (BITBAND_ACCESS8(HW_DAC_SR_ADDR(x), BP_DAC_SR_DACBFRPBF) = (v))
#define BW_DAC_SR_DACBFRPBF(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DAC_SR_ADDR(x), BP_DAC_SR_DACBFRPBF), v))
/*@}*/
/*!
@ -305,13 +312,13 @@ typedef union _hw_dac_sr
#define BS_DAC_SR_DACBFRPTF (1U) /*!< Bit field size in bits for DAC_SR_DACBFRPTF. */
/*! @brief Read current value of the DAC_SR_DACBFRPTF field. */
#define BR_DAC_SR_DACBFRPTF(x) (BITBAND_ACCESS8(HW_DAC_SR_ADDR(x), BP_DAC_SR_DACBFRPTF))
#define BR_DAC_SR_DACBFRPTF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_DAC_SR_ADDR(x), BP_DAC_SR_DACBFRPTF)))
/*! @brief Format value for bitfield DAC_SR_DACBFRPTF. */
#define BF_DAC_SR_DACBFRPTF(v) ((uint8_t)((uint8_t)(v) << BP_DAC_SR_DACBFRPTF) & BM_DAC_SR_DACBFRPTF)
/*! @brief Set the DACBFRPTF field to a new value. */
#define BW_DAC_SR_DACBFRPTF(x, v) (BITBAND_ACCESS8(HW_DAC_SR_ADDR(x), BP_DAC_SR_DACBFRPTF) = (v))
#define BW_DAC_SR_DACBFRPTF(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DAC_SR_ADDR(x), BP_DAC_SR_DACBFRPTF), v))
/*@}*/
/*!
@ -327,13 +334,13 @@ typedef union _hw_dac_sr
#define BS_DAC_SR_DACBFWMF (1U) /*!< Bit field size in bits for DAC_SR_DACBFWMF. */
/*! @brief Read current value of the DAC_SR_DACBFWMF field. */
#define BR_DAC_SR_DACBFWMF(x) (BITBAND_ACCESS8(HW_DAC_SR_ADDR(x), BP_DAC_SR_DACBFWMF))
#define BR_DAC_SR_DACBFWMF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_DAC_SR_ADDR(x), BP_DAC_SR_DACBFWMF)))
/*! @brief Format value for bitfield DAC_SR_DACBFWMF. */
#define BF_DAC_SR_DACBFWMF(v) ((uint8_t)((uint8_t)(v) << BP_DAC_SR_DACBFWMF) & BM_DAC_SR_DACBFWMF)
/*! @brief Set the DACBFWMF field to a new value. */
#define BW_DAC_SR_DACBFWMF(x, v) (BITBAND_ACCESS8(HW_DAC_SR_ADDR(x), BP_DAC_SR_DACBFWMF) = (v))
#define BW_DAC_SR_DACBFWMF(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DAC_SR_ADDR(x), BP_DAC_SR_DACBFWMF), v))
/*@}*/
/*******************************************************************************
@ -373,8 +380,8 @@ typedef union _hw_dac_c0
#define HW_DAC_C0_ADDR(x) ((x) + 0x21U)
#define HW_DAC_C0(x) (*(__IO hw_dac_c0_t *) HW_DAC_C0_ADDR(x))
#define HW_DAC_C0_RD(x) (HW_DAC_C0(x).U)
#define HW_DAC_C0_WR(x, v) (HW_DAC_C0(x).U = (v))
#define HW_DAC_C0_RD(x) (ADDRESS_READ(hw_dac_c0_t, HW_DAC_C0_ADDR(x)))
#define HW_DAC_C0_WR(x, v) (ADDRESS_WRITE(hw_dac_c0_t, HW_DAC_C0_ADDR(x), v))
#define HW_DAC_C0_SET(x, v) (HW_DAC_C0_WR(x, HW_DAC_C0_RD(x) | (v)))
#define HW_DAC_C0_CLR(x, v) (HW_DAC_C0_WR(x, HW_DAC_C0_RD(x) & ~(v)))
#define HW_DAC_C0_TOG(x, v) (HW_DAC_C0_WR(x, HW_DAC_C0_RD(x) ^ (v)))
@ -397,13 +404,13 @@ typedef union _hw_dac_c0
#define BS_DAC_C0_DACBBIEN (1U) /*!< Bit field size in bits for DAC_C0_DACBBIEN. */
/*! @brief Read current value of the DAC_C0_DACBBIEN field. */
#define BR_DAC_C0_DACBBIEN(x) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACBBIEN))
#define BR_DAC_C0_DACBBIEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACBBIEN)))
/*! @brief Format value for bitfield DAC_C0_DACBBIEN. */
#define BF_DAC_C0_DACBBIEN(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C0_DACBBIEN) & BM_DAC_C0_DACBBIEN)
/*! @brief Set the DACBBIEN field to a new value. */
#define BW_DAC_C0_DACBBIEN(x, v) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACBBIEN) = (v))
#define BW_DAC_C0_DACBBIEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACBBIEN), v))
/*@}*/
/*!
@ -419,13 +426,13 @@ typedef union _hw_dac_c0
#define BS_DAC_C0_DACBTIEN (1U) /*!< Bit field size in bits for DAC_C0_DACBTIEN. */
/*! @brief Read current value of the DAC_C0_DACBTIEN field. */
#define BR_DAC_C0_DACBTIEN(x) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACBTIEN))
#define BR_DAC_C0_DACBTIEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACBTIEN)))
/*! @brief Format value for bitfield DAC_C0_DACBTIEN. */
#define BF_DAC_C0_DACBTIEN(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C0_DACBTIEN) & BM_DAC_C0_DACBTIEN)
/*! @brief Set the DACBTIEN field to a new value. */
#define BW_DAC_C0_DACBTIEN(x, v) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACBTIEN) = (v))
#define BW_DAC_C0_DACBTIEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACBTIEN), v))
/*@}*/
/*!
@ -441,13 +448,13 @@ typedef union _hw_dac_c0
#define BS_DAC_C0_DACBWIEN (1U) /*!< Bit field size in bits for DAC_C0_DACBWIEN. */
/*! @brief Read current value of the DAC_C0_DACBWIEN field. */
#define BR_DAC_C0_DACBWIEN(x) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACBWIEN))
#define BR_DAC_C0_DACBWIEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACBWIEN)))
/*! @brief Format value for bitfield DAC_C0_DACBWIEN. */
#define BF_DAC_C0_DACBWIEN(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C0_DACBWIEN) & BM_DAC_C0_DACBWIEN)
/*! @brief Set the DACBWIEN field to a new value. */
#define BW_DAC_C0_DACBWIEN(x, v) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACBWIEN) = (v))
#define BW_DAC_C0_DACBWIEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACBWIEN), v))
/*@}*/
/*!
@ -466,13 +473,13 @@ typedef union _hw_dac_c0
#define BS_DAC_C0_LPEN (1U) /*!< Bit field size in bits for DAC_C0_LPEN. */
/*! @brief Read current value of the DAC_C0_LPEN field. */
#define BR_DAC_C0_LPEN(x) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_LPEN))
#define BR_DAC_C0_LPEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_LPEN)))
/*! @brief Format value for bitfield DAC_C0_LPEN. */
#define BF_DAC_C0_LPEN(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C0_LPEN) & BM_DAC_C0_LPEN)
/*! @brief Set the LPEN field to a new value. */
#define BW_DAC_C0_LPEN(x, v) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_LPEN) = (v))
#define BW_DAC_C0_LPEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_LPEN), v))
/*@}*/
/*!
@ -495,7 +502,7 @@ typedef union _hw_dac_c0
#define BF_DAC_C0_DACSWTRG(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C0_DACSWTRG) & BM_DAC_C0_DACSWTRG)
/*! @brief Set the DACSWTRG field to a new value. */
#define BW_DAC_C0_DACSWTRG(x, v) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACSWTRG) = (v))
#define BW_DAC_C0_DACSWTRG(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACSWTRG), v))
/*@}*/
/*!
@ -511,13 +518,13 @@ typedef union _hw_dac_c0
#define BS_DAC_C0_DACTRGSEL (1U) /*!< Bit field size in bits for DAC_C0_DACTRGSEL. */
/*! @brief Read current value of the DAC_C0_DACTRGSEL field. */
#define BR_DAC_C0_DACTRGSEL(x) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACTRGSEL))
#define BR_DAC_C0_DACTRGSEL(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACTRGSEL)))
/*! @brief Format value for bitfield DAC_C0_DACTRGSEL. */
#define BF_DAC_C0_DACTRGSEL(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C0_DACTRGSEL) & BM_DAC_C0_DACTRGSEL)
/*! @brief Set the DACTRGSEL field to a new value. */
#define BW_DAC_C0_DACTRGSEL(x, v) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACTRGSEL) = (v))
#define BW_DAC_C0_DACTRGSEL(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACTRGSEL), v))
/*@}*/
/*!
@ -533,13 +540,13 @@ typedef union _hw_dac_c0
#define BS_DAC_C0_DACRFS (1U) /*!< Bit field size in bits for DAC_C0_DACRFS. */
/*! @brief Read current value of the DAC_C0_DACRFS field. */
#define BR_DAC_C0_DACRFS(x) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACRFS))
#define BR_DAC_C0_DACRFS(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACRFS)))
/*! @brief Format value for bitfield DAC_C0_DACRFS. */
#define BF_DAC_C0_DACRFS(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C0_DACRFS) & BM_DAC_C0_DACRFS)
/*! @brief Set the DACRFS field to a new value. */
#define BW_DAC_C0_DACRFS(x, v) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACRFS) = (v))
#define BW_DAC_C0_DACRFS(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACRFS), v))
/*@}*/
/*!
@ -557,13 +564,13 @@ typedef union _hw_dac_c0
#define BS_DAC_C0_DACEN (1U) /*!< Bit field size in bits for DAC_C0_DACEN. */
/*! @brief Read current value of the DAC_C0_DACEN field. */
#define BR_DAC_C0_DACEN(x) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACEN))
#define BR_DAC_C0_DACEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACEN)))
/*! @brief Format value for bitfield DAC_C0_DACEN. */
#define BF_DAC_C0_DACEN(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C0_DACEN) & BM_DAC_C0_DACEN)
/*! @brief Set the DACEN field to a new value. */
#define BW_DAC_C0_DACEN(x, v) (BITBAND_ACCESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACEN) = (v))
#define BW_DAC_C0_DACEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DAC_C0_ADDR(x), BP_DAC_C0_DACEN), v))
/*@}*/
/*******************************************************************************
@ -597,8 +604,8 @@ typedef union _hw_dac_c1
#define HW_DAC_C1_ADDR(x) ((x) + 0x22U)
#define HW_DAC_C1(x) (*(__IO hw_dac_c1_t *) HW_DAC_C1_ADDR(x))
#define HW_DAC_C1_RD(x) (HW_DAC_C1(x).U)
#define HW_DAC_C1_WR(x, v) (HW_DAC_C1(x).U = (v))
#define HW_DAC_C1_RD(x) (ADDRESS_READ(hw_dac_c1_t, HW_DAC_C1_ADDR(x)))
#define HW_DAC_C1_WR(x, v) (ADDRESS_WRITE(hw_dac_c1_t, HW_DAC_C1_ADDR(x), v))
#define HW_DAC_C1_SET(x, v) (HW_DAC_C1_WR(x, HW_DAC_C1_RD(x) | (v)))
#define HW_DAC_C1_CLR(x, v) (HW_DAC_C1_WR(x, HW_DAC_C1_RD(x) & ~(v)))
#define HW_DAC_C1_TOG(x, v) (HW_DAC_C1_WR(x, HW_DAC_C1_RD(x) ^ (v)))
@ -624,13 +631,13 @@ typedef union _hw_dac_c1
#define BS_DAC_C1_DACBFEN (1U) /*!< Bit field size in bits for DAC_C1_DACBFEN. */
/*! @brief Read current value of the DAC_C1_DACBFEN field. */
#define BR_DAC_C1_DACBFEN(x) (BITBAND_ACCESS8(HW_DAC_C1_ADDR(x), BP_DAC_C1_DACBFEN))
#define BR_DAC_C1_DACBFEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_DAC_C1_ADDR(x), BP_DAC_C1_DACBFEN)))
/*! @brief Format value for bitfield DAC_C1_DACBFEN. */
#define BF_DAC_C1_DACBFEN(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C1_DACBFEN) & BM_DAC_C1_DACBFEN)
/*! @brief Set the DACBFEN field to a new value. */
#define BW_DAC_C1_DACBFEN(x, v) (BITBAND_ACCESS8(HW_DAC_C1_ADDR(x), BP_DAC_C1_DACBFEN) = (v))
#define BW_DAC_C1_DACBFEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DAC_C1_ADDR(x), BP_DAC_C1_DACBFEN), v))
/*@}*/
/*!
@ -648,7 +655,7 @@ typedef union _hw_dac_c1
#define BS_DAC_C1_DACBFMD (2U) /*!< Bit field size in bits for DAC_C1_DACBFMD. */
/*! @brief Read current value of the DAC_C1_DACBFMD field. */
#define BR_DAC_C1_DACBFMD(x) (HW_DAC_C1(x).B.DACBFMD)
#define BR_DAC_C1_DACBFMD(x) (UNION_READ(hw_dac_c1_t, HW_DAC_C1_ADDR(x), U, B.DACBFMD))
/*! @brief Format value for bitfield DAC_C1_DACBFMD. */
#define BF_DAC_C1_DACBFMD(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C1_DACBFMD) & BM_DAC_C1_DACBFMD)
@ -677,7 +684,7 @@ typedef union _hw_dac_c1
#define BS_DAC_C1_DACBFWM (2U) /*!< Bit field size in bits for DAC_C1_DACBFWM. */
/*! @brief Read current value of the DAC_C1_DACBFWM field. */
#define BR_DAC_C1_DACBFWM(x) (HW_DAC_C1(x).B.DACBFWM)
#define BR_DAC_C1_DACBFWM(x) (UNION_READ(hw_dac_c1_t, HW_DAC_C1_ADDR(x), U, B.DACBFWM))
/*! @brief Format value for bitfield DAC_C1_DACBFWM. */
#define BF_DAC_C1_DACBFWM(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C1_DACBFWM) & BM_DAC_C1_DACBFWM)
@ -701,13 +708,13 @@ typedef union _hw_dac_c1
#define BS_DAC_C1_DMAEN (1U) /*!< Bit field size in bits for DAC_C1_DMAEN. */
/*! @brief Read current value of the DAC_C1_DMAEN field. */
#define BR_DAC_C1_DMAEN(x) (BITBAND_ACCESS8(HW_DAC_C1_ADDR(x), BP_DAC_C1_DMAEN))
#define BR_DAC_C1_DMAEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_DAC_C1_ADDR(x), BP_DAC_C1_DMAEN)))
/*! @brief Format value for bitfield DAC_C1_DMAEN. */
#define BF_DAC_C1_DMAEN(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C1_DMAEN) & BM_DAC_C1_DMAEN)
/*! @brief Set the DMAEN field to a new value. */
#define BW_DAC_C1_DMAEN(x, v) (BITBAND_ACCESS8(HW_DAC_C1_ADDR(x), BP_DAC_C1_DMAEN) = (v))
#define BW_DAC_C1_DMAEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DAC_C1_ADDR(x), BP_DAC_C1_DMAEN), v))
/*@}*/
/*******************************************************************************
@ -736,8 +743,8 @@ typedef union _hw_dac_c2
#define HW_DAC_C2_ADDR(x) ((x) + 0x23U)
#define HW_DAC_C2(x) (*(__IO hw_dac_c2_t *) HW_DAC_C2_ADDR(x))
#define HW_DAC_C2_RD(x) (HW_DAC_C2(x).U)
#define HW_DAC_C2_WR(x, v) (HW_DAC_C2(x).U = (v))
#define HW_DAC_C2_RD(x) (ADDRESS_READ(hw_dac_c2_t, HW_DAC_C2_ADDR(x)))
#define HW_DAC_C2_WR(x, v) (ADDRESS_WRITE(hw_dac_c2_t, HW_DAC_C2_ADDR(x), v))
#define HW_DAC_C2_SET(x, v) (HW_DAC_C2_WR(x, HW_DAC_C2_RD(x) | (v)))
#define HW_DAC_C2_CLR(x, v) (HW_DAC_C2_WR(x, HW_DAC_C2_RD(x) & ~(v)))
#define HW_DAC_C2_TOG(x, v) (HW_DAC_C2_WR(x, HW_DAC_C2_RD(x) ^ (v)))
@ -759,7 +766,7 @@ typedef union _hw_dac_c2
#define BS_DAC_C2_DACBFUP (4U) /*!< Bit field size in bits for DAC_C2_DACBFUP. */
/*! @brief Read current value of the DAC_C2_DACBFUP field. */
#define BR_DAC_C2_DACBFUP(x) (HW_DAC_C2(x).B.DACBFUP)
#define BR_DAC_C2_DACBFUP(x) (UNION_READ(hw_dac_c2_t, HW_DAC_C2_ADDR(x), U, B.DACBFUP))
/*! @brief Format value for bitfield DAC_C2_DACBFUP. */
#define BF_DAC_C2_DACBFUP(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C2_DACBFUP) & BM_DAC_C2_DACBFUP)
@ -779,7 +786,7 @@ typedef union _hw_dac_c2
#define BS_DAC_C2_DACBFRP (4U) /*!< Bit field size in bits for DAC_C2_DACBFRP. */
/*! @brief Read current value of the DAC_C2_DACBFRP field. */
#define BR_DAC_C2_DACBFRP(x) (HW_DAC_C2(x).B.DACBFRP)
#define BR_DAC_C2_DACBFRP(x) (UNION_READ(hw_dac_c2_t, HW_DAC_C2_ADDR(x), U, B.DACBFRP))
/*! @brief Format value for bitfield DAC_C2_DACBFRP. */
#define BF_DAC_C2_DACBFRP(v) ((uint8_t)((uint8_t)(v) << BP_DAC_C2_DACBFRP) & BM_DAC_C2_DACBFRP)

607
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_dma.h
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21
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_dmamux.h
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@ -15,6 +15,9 @@
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** (C) COPYRIGHT 2015-2015 ARM Limited
** ALL RIGHTS RESERVED
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
@ -68,6 +71,10 @@
** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
** Update of SystemInit() and SystemCoreClockUpdate() functions.
** Module access macro module_BASES replaced by module_BASE_PTRS.
** - rev. 2.6 (2015-08-03) (ARM)
** All accesses to memory are replaced by equivalent macros; this allows
** memory read/write operations to be re-defined if needed (for example,
** to implement new security features
**
** ###################################################################
*/
@ -132,8 +139,8 @@ typedef union _hw_dmamux_chcfgn
#define HW_DMAMUX_CHCFGn_ADDR(x, n) ((x) + 0x0U + (0x1U * (n)))
#define HW_DMAMUX_CHCFGn(x, n) (*(__IO hw_dmamux_chcfgn_t *) HW_DMAMUX_CHCFGn_ADDR(x, n))
#define HW_DMAMUX_CHCFGn_RD(x, n) (HW_DMAMUX_CHCFGn(x, n).U)
#define HW_DMAMUX_CHCFGn_WR(x, n, v) (HW_DMAMUX_CHCFGn(x, n).U = (v))
#define HW_DMAMUX_CHCFGn_RD(x, n) (ADDRESS_READ(hw_dmamux_chcfgn_t, HW_DMAMUX_CHCFGn_ADDR(x, n)))
#define HW_DMAMUX_CHCFGn_WR(x, n, v) (ADDRESS_WRITE(hw_dmamux_chcfgn_t, HW_DMAMUX_CHCFGn_ADDR(x, n), v))
#define HW_DMAMUX_CHCFGn_SET(x, n, v) (HW_DMAMUX_CHCFGn_WR(x, n, HW_DMAMUX_CHCFGn_RD(x, n) | (v)))
#define HW_DMAMUX_CHCFGn_CLR(x, n, v) (HW_DMAMUX_CHCFGn_WR(x, n, HW_DMAMUX_CHCFGn_RD(x, n) & ~(v)))
#define HW_DMAMUX_CHCFGn_TOG(x, n, v) (HW_DMAMUX_CHCFGn_WR(x, n, HW_DMAMUX_CHCFGn_RD(x, n) ^ (v)))
@ -156,7 +163,7 @@ typedef union _hw_dmamux_chcfgn
#define BS_DMAMUX_CHCFGn_SOURCE (6U) /*!< Bit field size in bits for DMAMUX_CHCFGn_SOURCE. */
/*! @brief Read current value of the DMAMUX_CHCFGn_SOURCE field. */
#define BR_DMAMUX_CHCFGn_SOURCE(x, n) (HW_DMAMUX_CHCFGn(x, n).B.SOURCE)
#define BR_DMAMUX_CHCFGn_SOURCE(x, n) (UNION_READ(hw_dmamux_chcfgn_t, HW_DMAMUX_CHCFGn_ADDR(x, n), U, B.SOURCE))
/*! @brief Format value for bitfield DMAMUX_CHCFGn_SOURCE. */
#define BF_DMAMUX_CHCFGn_SOURCE(v) ((uint8_t)((uint8_t)(v) << BP_DMAMUX_CHCFGn_SOURCE) & BM_DMAMUX_CHCFGn_SOURCE)
@ -183,13 +190,13 @@ typedef union _hw_dmamux_chcfgn
#define BS_DMAMUX_CHCFGn_TRIG (1U) /*!< Bit field size in bits for DMAMUX_CHCFGn_TRIG. */
/*! @brief Read current value of the DMAMUX_CHCFGn_TRIG field. */
#define BR_DMAMUX_CHCFGn_TRIG(x, n) (BITBAND_ACCESS8(HW_DMAMUX_CHCFGn_ADDR(x, n), BP_DMAMUX_CHCFGn_TRIG))
#define BR_DMAMUX_CHCFGn_TRIG(x, n) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_DMAMUX_CHCFGn_ADDR(x, n), BP_DMAMUX_CHCFGn_TRIG)))
/*! @brief Format value for bitfield DMAMUX_CHCFGn_TRIG. */
#define BF_DMAMUX_CHCFGn_TRIG(v) ((uint8_t)((uint8_t)(v) << BP_DMAMUX_CHCFGn_TRIG) & BM_DMAMUX_CHCFGn_TRIG)
/*! @brief Set the TRIG field to a new value. */
#define BW_DMAMUX_CHCFGn_TRIG(x, n, v) (BITBAND_ACCESS8(HW_DMAMUX_CHCFGn_ADDR(x, n), BP_DMAMUX_CHCFGn_TRIG) = (v))
#define BW_DMAMUX_CHCFGn_TRIG(x, n, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DMAMUX_CHCFGn_ADDR(x, n), BP_DMAMUX_CHCFGn_TRIG), v))
/*@}*/
/*!
@ -209,13 +216,13 @@ typedef union _hw_dmamux_chcfgn
#define BS_DMAMUX_CHCFGn_ENBL (1U) /*!< Bit field size in bits for DMAMUX_CHCFGn_ENBL. */
/*! @brief Read current value of the DMAMUX_CHCFGn_ENBL field. */
#define BR_DMAMUX_CHCFGn_ENBL(x, n) (BITBAND_ACCESS8(HW_DMAMUX_CHCFGn_ADDR(x, n), BP_DMAMUX_CHCFGn_ENBL))
#define BR_DMAMUX_CHCFGn_ENBL(x, n) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_DMAMUX_CHCFGn_ADDR(x, n), BP_DMAMUX_CHCFGn_ENBL)))
/*! @brief Format value for bitfield DMAMUX_CHCFGn_ENBL. */
#define BF_DMAMUX_CHCFGn_ENBL(v) ((uint8_t)((uint8_t)(v) << BP_DMAMUX_CHCFGn_ENBL) & BM_DMAMUX_CHCFGn_ENBL)
/*! @brief Set the ENBL field to a new value. */
#define BW_DMAMUX_CHCFGn_ENBL(x, n, v) (BITBAND_ACCESS8(HW_DMAMUX_CHCFGn_ADDR(x, n), BP_DMAMUX_CHCFGn_ENBL) = (v))
#define BW_DMAMUX_CHCFGn_ENBL(x, n, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_DMAMUX_CHCFGn_ADDR(x, n), BP_DMAMUX_CHCFGn_ENBL), v))
/*@}*/
/*******************************************************************************

783
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_enet.h
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39
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_ewm.h
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@ -15,6 +15,9 @@
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** (C) COPYRIGHT 2015-2015 ARM Limited
** ALL RIGHTS RESERVED
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
@ -68,6 +71,10 @@
** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
** Update of SystemInit() and SystemCoreClockUpdate() functions.
** Module access macro module_BASES replaced by module_BASE_PTRS.
** - rev. 2.6 (2015-08-03) (ARM)
** All accesses to memory are replaced by equivalent macros; this allows
** memory read/write operations to be re-defined if needed (for example,
** to implement new security features
**
** ###################################################################
*/
@ -132,8 +139,8 @@ typedef union _hw_ewm_ctrl
#define HW_EWM_CTRL_ADDR(x) ((x) + 0x0U)
#define HW_EWM_CTRL(x) (*(__IO hw_ewm_ctrl_t *) HW_EWM_CTRL_ADDR(x))
#define HW_EWM_CTRL_RD(x) (HW_EWM_CTRL(x).U)
#define HW_EWM_CTRL_WR(x, v) (HW_EWM_CTRL(x).U = (v))
#define HW_EWM_CTRL_RD(x) (ADDRESS_READ(hw_ewm_ctrl_t, HW_EWM_CTRL_ADDR(x)))
#define HW_EWM_CTRL_WR(x, v) (ADDRESS_WRITE(hw_ewm_ctrl_t, HW_EWM_CTRL_ADDR(x), v))
#define HW_EWM_CTRL_SET(x, v) (HW_EWM_CTRL_WR(x, HW_EWM_CTRL_RD(x) | (v)))
#define HW_EWM_CTRL_CLR(x, v) (HW_EWM_CTRL_WR(x, HW_EWM_CTRL_RD(x) & ~(v)))
#define HW_EWM_CTRL_TOG(x, v) (HW_EWM_CTRL_WR(x, HW_EWM_CTRL_RD(x) ^ (v)))
@ -157,13 +164,13 @@ typedef union _hw_ewm_ctrl
#define BS_EWM_CTRL_EWMEN (1U) /*!< Bit field size in bits for EWM_CTRL_EWMEN. */
/*! @brief Read current value of the EWM_CTRL_EWMEN field. */
#define BR_EWM_CTRL_EWMEN(x) (BITBAND_ACCESS8(HW_EWM_CTRL_ADDR(x), BP_EWM_CTRL_EWMEN))
#define BR_EWM_CTRL_EWMEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_EWM_CTRL_ADDR(x), BP_EWM_CTRL_EWMEN)))
/*! @brief Format value for bitfield EWM_CTRL_EWMEN. */
#define BF_EWM_CTRL_EWMEN(v) ((uint8_t)((uint8_t)(v) << BP_EWM_CTRL_EWMEN) & BM_EWM_CTRL_EWMEN)
/*! @brief Set the EWMEN field to a new value. */
#define BW_EWM_CTRL_EWMEN(x, v) (BITBAND_ACCESS8(HW_EWM_CTRL_ADDR(x), BP_EWM_CTRL_EWMEN) = (v))
#define BW_EWM_CTRL_EWMEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_EWM_CTRL_ADDR(x), BP_EWM_CTRL_EWMEN), v))
/*@}*/
/*!
@ -178,13 +185,13 @@ typedef union _hw_ewm_ctrl
#define BS_EWM_CTRL_ASSIN (1U) /*!< Bit field size in bits for EWM_CTRL_ASSIN. */
/*! @brief Read current value of the EWM_CTRL_ASSIN field. */
#define BR_EWM_CTRL_ASSIN(x) (BITBAND_ACCESS8(HW_EWM_CTRL_ADDR(x), BP_EWM_CTRL_ASSIN))
#define BR_EWM_CTRL_ASSIN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_EWM_CTRL_ADDR(x), BP_EWM_CTRL_ASSIN)))
/*! @brief Format value for bitfield EWM_CTRL_ASSIN. */
#define BF_EWM_CTRL_ASSIN(v) ((uint8_t)((uint8_t)(v) << BP_EWM_CTRL_ASSIN) & BM_EWM_CTRL_ASSIN)
/*! @brief Set the ASSIN field to a new value. */
#define BW_EWM_CTRL_ASSIN(x, v) (BITBAND_ACCESS8(HW_EWM_CTRL_ADDR(x), BP_EWM_CTRL_ASSIN) = (v))
#define BW_EWM_CTRL_ASSIN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_EWM_CTRL_ADDR(x), BP_EWM_CTRL_ASSIN), v))
/*@}*/
/*!
@ -198,13 +205,13 @@ typedef union _hw_ewm_ctrl
#define BS_EWM_CTRL_INEN (1U) /*!< Bit field size in bits for EWM_CTRL_INEN. */
/*! @brief Read current value of the EWM_CTRL_INEN field. */
#define BR_EWM_CTRL_INEN(x) (BITBAND_ACCESS8(HW_EWM_CTRL_ADDR(x), BP_EWM_CTRL_INEN))
#define BR_EWM_CTRL_INEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_EWM_CTRL_ADDR(x), BP_EWM_CTRL_INEN)))
/*! @brief Format value for bitfield EWM_CTRL_INEN. */
#define BF_EWM_CTRL_INEN(v) ((uint8_t)((uint8_t)(v) << BP_EWM_CTRL_INEN) & BM_EWM_CTRL_INEN)
/*! @brief Set the INEN field to a new value. */
#define BW_EWM_CTRL_INEN(x, v) (BITBAND_ACCESS8(HW_EWM_CTRL_ADDR(x), BP_EWM_CTRL_INEN) = (v))
#define BW_EWM_CTRL_INEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_EWM_CTRL_ADDR(x), BP_EWM_CTRL_INEN), v))
/*@}*/
/*!
@ -219,13 +226,13 @@ typedef union _hw_ewm_ctrl
#define BS_EWM_CTRL_INTEN (1U) /*!< Bit field size in bits for EWM_CTRL_INTEN. */
/*! @brief Read current value of the EWM_CTRL_INTEN field. */
#define BR_EWM_CTRL_INTEN(x) (BITBAND_ACCESS8(HW_EWM_CTRL_ADDR(x), BP_EWM_CTRL_INTEN))
#define BR_EWM_CTRL_INTEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_EWM_CTRL_ADDR(x), BP_EWM_CTRL_INTEN)))
/*! @brief Format value for bitfield EWM_CTRL_INTEN. */
#define BF_EWM_CTRL_INTEN(v) ((uint8_t)((uint8_t)(v) << BP_EWM_CTRL_INTEN) & BM_EWM_CTRL_INTEN)
/*! @brief Set the INTEN field to a new value. */
#define BW_EWM_CTRL_INTEN(x, v) (BITBAND_ACCESS8(HW_EWM_CTRL_ADDR(x), BP_EWM_CTRL_INTEN) = (v))
#define BW_EWM_CTRL_INTEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_EWM_CTRL_ADDR(x), BP_EWM_CTRL_INTEN), v))
/*@}*/
/*******************************************************************************
@ -256,8 +263,8 @@ typedef union _hw_ewm_serv
#define HW_EWM_SERV_ADDR(x) ((x) + 0x1U)
#define HW_EWM_SERV(x) (*(__O hw_ewm_serv_t *) HW_EWM_SERV_ADDR(x))
#define HW_EWM_SERV_RD(x) (HW_EWM_SERV(x).U)
#define HW_EWM_SERV_WR(x, v) (HW_EWM_SERV(x).U = (v))
#define HW_EWM_SERV_RD(x) (ADDRESS_READ(hw_ewm_serv_t, HW_EWM_SERV_ADDR(x)))
#define HW_EWM_SERV_WR(x, v) (ADDRESS_WRITE(hw_ewm_serv_t, HW_EWM_SERV_ADDR(x), v))
/*@}*/
/*
@ -316,8 +323,8 @@ typedef union _hw_ewm_cmpl
#define HW_EWM_CMPL_ADDR(x) ((x) + 0x2U)
#define HW_EWM_CMPL(x) (*(__IO hw_ewm_cmpl_t *) HW_EWM_CMPL_ADDR(x))
#define HW_EWM_CMPL_RD(x) (HW_EWM_CMPL(x).U)
#define HW_EWM_CMPL_WR(x, v) (HW_EWM_CMPL(x).U = (v))
#define HW_EWM_CMPL_RD(x) (ADDRESS_READ(hw_ewm_cmpl_t, HW_EWM_CMPL_ADDR(x)))
#define HW_EWM_CMPL_WR(x, v) (ADDRESS_WRITE(hw_ewm_cmpl_t, HW_EWM_CMPL_ADDR(x), v))
#define HW_EWM_CMPL_SET(x, v) (HW_EWM_CMPL_WR(x, HW_EWM_CMPL_RD(x) | (v)))
#define HW_EWM_CMPL_CLR(x, v) (HW_EWM_CMPL_WR(x, HW_EWM_CMPL_RD(x) & ~(v)))
#define HW_EWM_CMPL_TOG(x, v) (HW_EWM_CMPL_WR(x, HW_EWM_CMPL_RD(x) ^ (v)))
@ -381,8 +388,8 @@ typedef union _hw_ewm_cmph
#define HW_EWM_CMPH_ADDR(x) ((x) + 0x3U)
#define HW_EWM_CMPH(x) (*(__IO hw_ewm_cmph_t *) HW_EWM_CMPH_ADDR(x))
#define HW_EWM_CMPH_RD(x) (HW_EWM_CMPH(x).U)
#define HW_EWM_CMPH_WR(x, v) (HW_EWM_CMPH(x).U = (v))
#define HW_EWM_CMPH_RD(x) (ADDRESS_READ(hw_ewm_cmph_t, HW_EWM_CMPH_ADDR(x)))
#define HW_EWM_CMPH_WR(x, v) (ADDRESS_WRITE(hw_ewm_cmph_t, HW_EWM_CMPH_ADDR(x), v))
#define HW_EWM_CMPH_SET(x, v) (HW_EWM_CMPH_WR(x, HW_EWM_CMPH_RD(x) | (v)))
#define HW_EWM_CMPH_CLR(x, v) (HW_EWM_CMPH_WR(x, HW_EWM_CMPH_RD(x) & ~(v)))
#define HW_EWM_CMPH_TOG(x, v) (HW_EWM_CMPH_WR(x, HW_EWM_CMPH_RD(x) ^ (v)))

85
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_fb.h
View File

@ -15,6 +15,9 @@
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** (C) COPYRIGHT 2015-2015 ARM Limited
** ALL RIGHTS RESERVED
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
@ -68,6 +71,10 @@
** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
** Update of SystemInit() and SystemCoreClockUpdate() functions.
** Module access macro module_BASES replaced by module_BASE_PTRS.
** - rev. 2.6 (2015-08-03) (ARM)
** All accesses to memory are replaced by equivalent macros; this allows
** memory read/write operations to be re-defined if needed (for example,
** to implement new security features
**
** ###################################################################
*/
@ -129,8 +136,8 @@ typedef union _hw_fb_csarn
#define HW_FB_CSARn_ADDR(x, n) ((x) + 0x0U + (0xCU * (n)))
#define HW_FB_CSARn(x, n) (*(__IO hw_fb_csarn_t *) HW_FB_CSARn_ADDR(x, n))
#define HW_FB_CSARn_RD(x, n) (HW_FB_CSARn(x, n).U)
#define HW_FB_CSARn_WR(x, n, v) (HW_FB_CSARn(x, n).U = (v))
#define HW_FB_CSARn_RD(x, n) (ADDRESS_READ(hw_fb_csarn_t, HW_FB_CSARn_ADDR(x, n)))
#define HW_FB_CSARn_WR(x, n, v) (ADDRESS_WRITE(hw_fb_csarn_t, HW_FB_CSARn_ADDR(x, n), v))
#define HW_FB_CSARn_SET(x, n, v) (HW_FB_CSARn_WR(x, n, HW_FB_CSARn_RD(x, n) | (v)))
#define HW_FB_CSARn_CLR(x, n, v) (HW_FB_CSARn_WR(x, n, HW_FB_CSARn_RD(x, n) & ~(v)))
#define HW_FB_CSARn_TOG(x, n, v) (HW_FB_CSARn_WR(x, n, HW_FB_CSARn_RD(x, n) ^ (v)))
@ -157,7 +164,7 @@ typedef union _hw_fb_csarn
#define BS_FB_CSARn_BA (16U) /*!< Bit field size in bits for FB_CSARn_BA. */
/*! @brief Read current value of the FB_CSARn_BA field. */
#define BR_FB_CSARn_BA(x, n) (HW_FB_CSARn(x, n).B.BA)
#define BR_FB_CSARn_BA(x, n) (UNION_READ(hw_fb_csarn_t, HW_FB_CSARn_ADDR(x, n), U, B.BA))
/*! @brief Format value for bitfield FB_CSARn_BA. */
#define BF_FB_CSARn_BA(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSARn_BA) & BM_FB_CSARn_BA)
@ -199,8 +206,8 @@ typedef union _hw_fb_csmrn
#define HW_FB_CSMRn_ADDR(x, n) ((x) + 0x4U + (0xCU * (n)))
#define HW_FB_CSMRn(x, n) (*(__IO hw_fb_csmrn_t *) HW_FB_CSMRn_ADDR(x, n))
#define HW_FB_CSMRn_RD(x, n) (HW_FB_CSMRn(x, n).U)
#define HW_FB_CSMRn_WR(x, n, v) (HW_FB_CSMRn(x, n).U = (v))
#define HW_FB_CSMRn_RD(x, n) (ADDRESS_READ(hw_fb_csmrn_t, HW_FB_CSMRn_ADDR(x, n)))
#define HW_FB_CSMRn_WR(x, n, v) (ADDRESS_WRITE(hw_fb_csmrn_t, HW_FB_CSMRn_ADDR(x, n), v))
#define HW_FB_CSMRn_SET(x, n, v) (HW_FB_CSMRn_WR(x, n, HW_FB_CSMRn_RD(x, n) | (v)))
#define HW_FB_CSMRn_CLR(x, n, v) (HW_FB_CSMRn_WR(x, n, HW_FB_CSMRn_RD(x, n) & ~(v)))
#define HW_FB_CSMRn_TOG(x, n, v) (HW_FB_CSMRn_WR(x, n, HW_FB_CSMRn_RD(x, n) ^ (v)))
@ -230,13 +237,13 @@ typedef union _hw_fb_csmrn
#define BS_FB_CSMRn_V (1U) /*!< Bit field size in bits for FB_CSMRn_V. */
/*! @brief Read current value of the FB_CSMRn_V field. */
#define BR_FB_CSMRn_V(x, n) (BITBAND_ACCESS32(HW_FB_CSMRn_ADDR(x, n), BP_FB_CSMRn_V))
#define BR_FB_CSMRn_V(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FB_CSMRn_ADDR(x, n), BP_FB_CSMRn_V)))
/*! @brief Format value for bitfield FB_CSMRn_V. */
#define BF_FB_CSMRn_V(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSMRn_V) & BM_FB_CSMRn_V)
/*! @brief Set the V field to a new value. */
#define BW_FB_CSMRn_V(x, n, v) (BITBAND_ACCESS32(HW_FB_CSMRn_ADDR(x, n), BP_FB_CSMRn_V) = (v))
#define BW_FB_CSMRn_V(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FB_CSMRn_ADDR(x, n), BP_FB_CSMRn_V), v))
/*@}*/
/*!
@ -256,13 +263,13 @@ typedef union _hw_fb_csmrn
#define BS_FB_CSMRn_WP (1U) /*!< Bit field size in bits for FB_CSMRn_WP. */
/*! @brief Read current value of the FB_CSMRn_WP field. */
#define BR_FB_CSMRn_WP(x, n) (BITBAND_ACCESS32(HW_FB_CSMRn_ADDR(x, n), BP_FB_CSMRn_WP))
#define BR_FB_CSMRn_WP(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FB_CSMRn_ADDR(x, n), BP_FB_CSMRn_WP)))
/*! @brief Format value for bitfield FB_CSMRn_WP. */
#define BF_FB_CSMRn_WP(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSMRn_WP) & BM_FB_CSMRn_WP)
/*! @brief Set the WP field to a new value. */
#define BW_FB_CSMRn_WP(x, n, v) (BITBAND_ACCESS32(HW_FB_CSMRn_ADDR(x, n), BP_FB_CSMRn_WP) = (v))
#define BW_FB_CSMRn_WP(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FB_CSMRn_ADDR(x, n), BP_FB_CSMRn_WP), v))
/*@}*/
/*!
@ -281,7 +288,7 @@ typedef union _hw_fb_csmrn
#define BS_FB_CSMRn_BAM (16U) /*!< Bit field size in bits for FB_CSMRn_BAM. */
/*! @brief Read current value of the FB_CSMRn_BAM field. */
#define BR_FB_CSMRn_BAM(x, n) (HW_FB_CSMRn(x, n).B.BAM)
#define BR_FB_CSMRn_BAM(x, n) (UNION_READ(hw_fb_csmrn_t, HW_FB_CSMRn_ADDR(x, n), U, B.BAM))
/*! @brief Format value for bitfield FB_CSMRn_BAM. */
#define BF_FB_CSMRn_BAM(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSMRn_BAM) & BM_FB_CSMRn_BAM)
@ -337,8 +344,8 @@ typedef union _hw_fb_cscrn
#define HW_FB_CSCRn_ADDR(x, n) ((x) + 0x8U + (0xCU * (n)))
#define HW_FB_CSCRn(x, n) (*(__IO hw_fb_cscrn_t *) HW_FB_CSCRn_ADDR(x, n))
#define HW_FB_CSCRn_RD(x, n) (HW_FB_CSCRn(x, n).U)
#define HW_FB_CSCRn_WR(x, n, v) (HW_FB_CSCRn(x, n).U = (v))
#define HW_FB_CSCRn_RD(x, n) (ADDRESS_READ(hw_fb_cscrn_t, HW_FB_CSCRn_ADDR(x, n)))
#define HW_FB_CSCRn_WR(x, n, v) (ADDRESS_WRITE(hw_fb_cscrn_t, HW_FB_CSCRn_ADDR(x, n), v))
#define HW_FB_CSCRn_SET(x, n, v) (HW_FB_CSCRn_WR(x, n, HW_FB_CSCRn_RD(x, n) | (v)))
#define HW_FB_CSCRn_CLR(x, n, v) (HW_FB_CSCRn_WR(x, n, HW_FB_CSCRn_RD(x, n) & ~(v)))
#define HW_FB_CSCRn_TOG(x, n, v) (HW_FB_CSCRn_WR(x, n, HW_FB_CSCRn_RD(x, n) ^ (v)))
@ -368,13 +375,13 @@ typedef union _hw_fb_cscrn
#define BS_FB_CSCRn_BSTW (1U) /*!< Bit field size in bits for FB_CSCRn_BSTW. */
/*! @brief Read current value of the FB_CSCRn_BSTW field. */
#define BR_FB_CSCRn_BSTW(x, n) (BITBAND_ACCESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_BSTW))
#define BR_FB_CSCRn_BSTW(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_BSTW)))
/*! @brief Format value for bitfield FB_CSCRn_BSTW. */
#define BF_FB_CSCRn_BSTW(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSCRn_BSTW) & BM_FB_CSCRn_BSTW)
/*! @brief Set the BSTW field to a new value. */
#define BW_FB_CSCRn_BSTW(x, n, v) (BITBAND_ACCESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_BSTW) = (v))
#define BW_FB_CSCRn_BSTW(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_BSTW), v))
/*@}*/
/*!
@ -397,13 +404,13 @@ typedef union _hw_fb_cscrn
#define BS_FB_CSCRn_BSTR (1U) /*!< Bit field size in bits for FB_CSCRn_BSTR. */
/*! @brief Read current value of the FB_CSCRn_BSTR field. */
#define BR_FB_CSCRn_BSTR(x, n) (BITBAND_ACCESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_BSTR))
#define BR_FB_CSCRn_BSTR(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_BSTR)))
/*! @brief Format value for bitfield FB_CSCRn_BSTR. */
#define BF_FB_CSCRn_BSTR(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSCRn_BSTR) & BM_FB_CSCRn_BSTR)
/*! @brief Set the BSTR field to a new value. */
#define BW_FB_CSCRn_BSTR(x, n, v) (BITBAND_ACCESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_BSTR) = (v))
#define BW_FB_CSCRn_BSTR(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_BSTR), v))
/*@}*/
/*!
@ -424,13 +431,13 @@ typedef union _hw_fb_cscrn
#define BS_FB_CSCRn_BEM (1U) /*!< Bit field size in bits for FB_CSCRn_BEM. */
/*! @brief Read current value of the FB_CSCRn_BEM field. */
#define BR_FB_CSCRn_BEM(x, n) (BITBAND_ACCESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_BEM))
#define BR_FB_CSCRn_BEM(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_BEM)))
/*! @brief Format value for bitfield FB_CSCRn_BEM. */
#define BF_FB_CSCRn_BEM(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSCRn_BEM) & BM_FB_CSCRn_BEM)
/*! @brief Set the BEM field to a new value. */
#define BW_FB_CSCRn_BEM(x, n, v) (BITBAND_ACCESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_BEM) = (v))
#define BW_FB_CSCRn_BEM(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_BEM), v))
/*@}*/
/*!
@ -451,7 +458,7 @@ typedef union _hw_fb_cscrn
#define BS_FB_CSCRn_PS (2U) /*!< Bit field size in bits for FB_CSCRn_PS. */
/*! @brief Read current value of the FB_CSCRn_PS field. */
#define BR_FB_CSCRn_PS(x, n) (HW_FB_CSCRn(x, n).B.PS)
#define BR_FB_CSCRn_PS(x, n) (UNION_READ(hw_fb_cscrn_t, HW_FB_CSCRn_ADDR(x, n), U, B.PS))
/*! @brief Format value for bitfield FB_CSCRn_PS. */
#define BF_FB_CSCRn_PS(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSCRn_PS) & BM_FB_CSCRn_PS)
@ -480,13 +487,13 @@ typedef union _hw_fb_cscrn
#define BS_FB_CSCRn_AA (1U) /*!< Bit field size in bits for FB_CSCRn_AA. */
/*! @brief Read current value of the FB_CSCRn_AA field. */
#define BR_FB_CSCRn_AA(x, n) (BITBAND_ACCESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_AA))
#define BR_FB_CSCRn_AA(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_AA)))
/*! @brief Format value for bitfield FB_CSCRn_AA. */
#define BF_FB_CSCRn_AA(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSCRn_AA) & BM_FB_CSCRn_AA)
/*! @brief Set the AA field to a new value. */
#define BW_FB_CSCRn_AA(x, n, v) (BITBAND_ACCESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_AA) = (v))
#define BW_FB_CSCRn_AA(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_AA), v))
/*@}*/
/*!
@ -505,13 +512,13 @@ typedef union _hw_fb_cscrn
#define BS_FB_CSCRn_BLS (1U) /*!< Bit field size in bits for FB_CSCRn_BLS. */
/*! @brief Read current value of the FB_CSCRn_BLS field. */
#define BR_FB_CSCRn_BLS(x, n) (BITBAND_ACCESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_BLS))
#define BR_FB_CSCRn_BLS(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_BLS)))
/*! @brief Format value for bitfield FB_CSCRn_BLS. */
#define BF_FB_CSCRn_BLS(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSCRn_BLS) & BM_FB_CSCRn_BLS)
/*! @brief Set the BLS field to a new value. */
#define BW_FB_CSCRn_BLS(x, n, v) (BITBAND_ACCESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_BLS) = (v))
#define BW_FB_CSCRn_BLS(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_BLS), v))
/*@}*/
/*!
@ -527,7 +534,7 @@ typedef union _hw_fb_cscrn
#define BS_FB_CSCRn_WS (6U) /*!< Bit field size in bits for FB_CSCRn_WS. */
/*! @brief Read current value of the FB_CSCRn_WS field. */
#define BR_FB_CSCRn_WS(x, n) (HW_FB_CSCRn(x, n).B.WS)
#define BR_FB_CSCRn_WS(x, n) (UNION_READ(hw_fb_cscrn_t, HW_FB_CSCRn_ADDR(x, n), U, B.WS))
/*! @brief Format value for bitfield FB_CSCRn_WS. */
#define BF_FB_CSCRn_WS(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSCRn_WS) & BM_FB_CSCRn_WS)
@ -557,7 +564,7 @@ typedef union _hw_fb_cscrn
#define BS_FB_CSCRn_WRAH (2U) /*!< Bit field size in bits for FB_CSCRn_WRAH. */
/*! @brief Read current value of the FB_CSCRn_WRAH field. */
#define BR_FB_CSCRn_WRAH(x, n) (HW_FB_CSCRn(x, n).B.WRAH)
#define BR_FB_CSCRn_WRAH(x, n) (UNION_READ(hw_fb_cscrn_t, HW_FB_CSCRn_ADDR(x, n), U, B.WRAH))
/*! @brief Format value for bitfield FB_CSCRn_WRAH. */
#define BF_FB_CSCRn_WRAH(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSCRn_WRAH) & BM_FB_CSCRn_WRAH)
@ -588,7 +595,7 @@ typedef union _hw_fb_cscrn
#define BS_FB_CSCRn_RDAH (2U) /*!< Bit field size in bits for FB_CSCRn_RDAH. */
/*! @brief Read current value of the FB_CSCRn_RDAH field. */
#define BR_FB_CSCRn_RDAH(x, n) (HW_FB_CSCRn(x, n).B.RDAH)
#define BR_FB_CSCRn_RDAH(x, n) (UNION_READ(hw_fb_cscrn_t, HW_FB_CSCRn_ADDR(x, n), U, B.RDAH))
/*! @brief Format value for bitfield FB_CSCRn_RDAH. */
#define BF_FB_CSCRn_RDAH(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSCRn_RDAH) & BM_FB_CSCRn_RDAH)
@ -619,7 +626,7 @@ typedef union _hw_fb_cscrn
#define BS_FB_CSCRn_ASET (2U) /*!< Bit field size in bits for FB_CSCRn_ASET. */
/*! @brief Read current value of the FB_CSCRn_ASET field. */
#define BR_FB_CSCRn_ASET(x, n) (HW_FB_CSCRn(x, n).B.ASET)
#define BR_FB_CSCRn_ASET(x, n) (UNION_READ(hw_fb_cscrn_t, HW_FB_CSCRn_ADDR(x, n), U, B.ASET))
/*! @brief Format value for bitfield FB_CSCRn_ASET. */
#define BF_FB_CSCRn_ASET(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSCRn_ASET) & BM_FB_CSCRn_ASET)
@ -645,13 +652,13 @@ typedef union _hw_fb_cscrn
#define BS_FB_CSCRn_EXTS (1U) /*!< Bit field size in bits for FB_CSCRn_EXTS. */
/*! @brief Read current value of the FB_CSCRn_EXTS field. */
#define BR_FB_CSCRn_EXTS(x, n) (BITBAND_ACCESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_EXTS))
#define BR_FB_CSCRn_EXTS(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_EXTS)))
/*! @brief Format value for bitfield FB_CSCRn_EXTS. */
#define BF_FB_CSCRn_EXTS(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSCRn_EXTS) & BM_FB_CSCRn_EXTS)
/*! @brief Set the EXTS field to a new value. */
#define BW_FB_CSCRn_EXTS(x, n, v) (BITBAND_ACCESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_EXTS) = (v))
#define BW_FB_CSCRn_EXTS(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_EXTS), v))
/*@}*/
/*!
@ -670,13 +677,13 @@ typedef union _hw_fb_cscrn
#define BS_FB_CSCRn_SWSEN (1U) /*!< Bit field size in bits for FB_CSCRn_SWSEN. */
/*! @brief Read current value of the FB_CSCRn_SWSEN field. */
#define BR_FB_CSCRn_SWSEN(x, n) (BITBAND_ACCESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_SWSEN))
#define BR_FB_CSCRn_SWSEN(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_SWSEN)))
/*! @brief Format value for bitfield FB_CSCRn_SWSEN. */
#define BF_FB_CSCRn_SWSEN(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSCRn_SWSEN) & BM_FB_CSCRn_SWSEN)
/*! @brief Set the SWSEN field to a new value. */
#define BW_FB_CSCRn_SWSEN(x, n, v) (BITBAND_ACCESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_SWSEN) = (v))
#define BW_FB_CSCRn_SWSEN(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FB_CSCRn_ADDR(x, n), BP_FB_CSCRn_SWSEN), v))
/*@}*/
/*!
@ -692,7 +699,7 @@ typedef union _hw_fb_cscrn
#define BS_FB_CSCRn_SWS (6U) /*!< Bit field size in bits for FB_CSCRn_SWS. */
/*! @brief Read current value of the FB_CSCRn_SWS field. */
#define BR_FB_CSCRn_SWS(x, n) (HW_FB_CSCRn(x, n).B.SWS)
#define BR_FB_CSCRn_SWS(x, n) (UNION_READ(hw_fb_cscrn_t, HW_FB_CSCRn_ADDR(x, n), U, B.SWS))
/*! @brief Format value for bitfield FB_CSCRn_SWS. */
#define BF_FB_CSCRn_SWS(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSCRn_SWS) & BM_FB_CSCRn_SWS)
@ -740,8 +747,8 @@ typedef union _hw_fb_cspmcr
#define HW_FB_CSPMCR_ADDR(x) ((x) + 0x60U)
#define HW_FB_CSPMCR(x) (*(__IO hw_fb_cspmcr_t *) HW_FB_CSPMCR_ADDR(x))
#define HW_FB_CSPMCR_RD(x) (HW_FB_CSPMCR(x).U)
#define HW_FB_CSPMCR_WR(x, v) (HW_FB_CSPMCR(x).U = (v))
#define HW_FB_CSPMCR_RD(x) (ADDRESS_READ(hw_fb_cspmcr_t, HW_FB_CSPMCR_ADDR(x)))
#define HW_FB_CSPMCR_WR(x, v) (ADDRESS_WRITE(hw_fb_cspmcr_t, HW_FB_CSPMCR_ADDR(x), v))
#define HW_FB_CSPMCR_SET(x, v) (HW_FB_CSPMCR_WR(x, HW_FB_CSPMCR_RD(x) | (v)))
#define HW_FB_CSPMCR_CLR(x, v) (HW_FB_CSPMCR_WR(x, HW_FB_CSPMCR_RD(x) & ~(v)))
#define HW_FB_CSPMCR_TOG(x, v) (HW_FB_CSPMCR_WR(x, HW_FB_CSPMCR_RD(x) ^ (v)))
@ -769,7 +776,7 @@ typedef union _hw_fb_cspmcr
#define BS_FB_CSPMCR_GROUP5 (4U) /*!< Bit field size in bits for FB_CSPMCR_GROUP5. */
/*! @brief Read current value of the FB_CSPMCR_GROUP5 field. */
#define BR_FB_CSPMCR_GROUP5(x) (HW_FB_CSPMCR(x).B.GROUP5)
#define BR_FB_CSPMCR_GROUP5(x) (UNION_READ(hw_fb_cspmcr_t, HW_FB_CSPMCR_ADDR(x), U, B.GROUP5))
/*! @brief Format value for bitfield FB_CSPMCR_GROUP5. */
#define BF_FB_CSPMCR_GROUP5(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSPMCR_GROUP5) & BM_FB_CSPMCR_GROUP5)
@ -794,7 +801,7 @@ typedef union _hw_fb_cspmcr
#define BS_FB_CSPMCR_GROUP4 (4U) /*!< Bit field size in bits for FB_CSPMCR_GROUP4. */
/*! @brief Read current value of the FB_CSPMCR_GROUP4 field. */
#define BR_FB_CSPMCR_GROUP4(x) (HW_FB_CSPMCR(x).B.GROUP4)
#define BR_FB_CSPMCR_GROUP4(x) (UNION_READ(hw_fb_cspmcr_t, HW_FB_CSPMCR_ADDR(x), U, B.GROUP4))
/*! @brief Format value for bitfield FB_CSPMCR_GROUP4. */
#define BF_FB_CSPMCR_GROUP4(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSPMCR_GROUP4) & BM_FB_CSPMCR_GROUP4)
@ -819,7 +826,7 @@ typedef union _hw_fb_cspmcr
#define BS_FB_CSPMCR_GROUP3 (4U) /*!< Bit field size in bits for FB_CSPMCR_GROUP3. */
/*! @brief Read current value of the FB_CSPMCR_GROUP3 field. */
#define BR_FB_CSPMCR_GROUP3(x) (HW_FB_CSPMCR(x).B.GROUP3)
#define BR_FB_CSPMCR_GROUP3(x) (UNION_READ(hw_fb_cspmcr_t, HW_FB_CSPMCR_ADDR(x), U, B.GROUP3))
/*! @brief Format value for bitfield FB_CSPMCR_GROUP3. */
#define BF_FB_CSPMCR_GROUP3(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSPMCR_GROUP3) & BM_FB_CSPMCR_GROUP3)
@ -844,7 +851,7 @@ typedef union _hw_fb_cspmcr
#define BS_FB_CSPMCR_GROUP2 (4U) /*!< Bit field size in bits for FB_CSPMCR_GROUP2. */
/*! @brief Read current value of the FB_CSPMCR_GROUP2 field. */
#define BR_FB_CSPMCR_GROUP2(x) (HW_FB_CSPMCR(x).B.GROUP2)
#define BR_FB_CSPMCR_GROUP2(x) (UNION_READ(hw_fb_cspmcr_t, HW_FB_CSPMCR_ADDR(x), U, B.GROUP2))
/*! @brief Format value for bitfield FB_CSPMCR_GROUP2. */
#define BF_FB_CSPMCR_GROUP2(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSPMCR_GROUP2) & BM_FB_CSPMCR_GROUP2)
@ -869,7 +876,7 @@ typedef union _hw_fb_cspmcr
#define BS_FB_CSPMCR_GROUP1 (4U) /*!< Bit field size in bits for FB_CSPMCR_GROUP1. */
/*! @brief Read current value of the FB_CSPMCR_GROUP1 field. */
#define BR_FB_CSPMCR_GROUP1(x) (HW_FB_CSPMCR(x).B.GROUP1)
#define BR_FB_CSPMCR_GROUP1(x) (UNION_READ(hw_fb_cspmcr_t, HW_FB_CSPMCR_ADDR(x), U, B.GROUP1))
/*! @brief Format value for bitfield FB_CSPMCR_GROUP1. */
#define BF_FB_CSPMCR_GROUP1(v) ((uint32_t)((uint32_t)(v) << BP_FB_CSPMCR_GROUP1) & BM_FB_CSPMCR_GROUP1)

193
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_fmc.h
View File

@ -15,6 +15,9 @@
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** (C) COPYRIGHT 2015-2015 ARM Limited
** ALL RIGHTS RESERVED
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
@ -68,6 +71,10 @@
** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
** Update of SystemInit() and SystemCoreClockUpdate() functions.
** Module access macro module_BASES replaced by module_BASE_PTRS.
** - rev. 2.6 (2015-08-03) (ARM)
** All accesses to memory are replaced by equivalent macros; this allows
** memory read/write operations to be re-defined if needed (for example,
** to implement new security features
**
** ###################################################################
*/
@ -151,8 +158,8 @@ typedef union _hw_fmc_pfapr
#define HW_FMC_PFAPR_ADDR(x) ((x) + 0x0U)
#define HW_FMC_PFAPR(x) (*(__IO hw_fmc_pfapr_t *) HW_FMC_PFAPR_ADDR(x))
#define HW_FMC_PFAPR_RD(x) (HW_FMC_PFAPR(x).U)
#define HW_FMC_PFAPR_WR(x, v) (HW_FMC_PFAPR(x).U = (v))
#define HW_FMC_PFAPR_RD(x) (ADDRESS_READ(hw_fmc_pfapr_t, HW_FMC_PFAPR_ADDR(x)))
#define HW_FMC_PFAPR_WR(x, v) (ADDRESS_WRITE(hw_fmc_pfapr_t, HW_FMC_PFAPR_ADDR(x), v))
#define HW_FMC_PFAPR_SET(x, v) (HW_FMC_PFAPR_WR(x, HW_FMC_PFAPR_RD(x) | (v)))
#define HW_FMC_PFAPR_CLR(x, v) (HW_FMC_PFAPR_WR(x, HW_FMC_PFAPR_RD(x) & ~(v)))
#define HW_FMC_PFAPR_TOG(x, v) (HW_FMC_PFAPR_WR(x, HW_FMC_PFAPR_RD(x) ^ (v)))
@ -180,7 +187,7 @@ typedef union _hw_fmc_pfapr
#define BS_FMC_PFAPR_M0AP (2U) /*!< Bit field size in bits for FMC_PFAPR_M0AP. */
/*! @brief Read current value of the FMC_PFAPR_M0AP field. */
#define BR_FMC_PFAPR_M0AP(x) (HW_FMC_PFAPR(x).B.M0AP)
#define BR_FMC_PFAPR_M0AP(x) (UNION_READ(hw_fmc_pfapr_t, HW_FMC_PFAPR_ADDR(x), U, B.M0AP))
/*! @brief Format value for bitfield FMC_PFAPR_M0AP. */
#define BF_FMC_PFAPR_M0AP(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFAPR_M0AP) & BM_FMC_PFAPR_M0AP)
@ -207,7 +214,7 @@ typedef union _hw_fmc_pfapr
#define BS_FMC_PFAPR_M1AP (2U) /*!< Bit field size in bits for FMC_PFAPR_M1AP. */
/*! @brief Read current value of the FMC_PFAPR_M1AP field. */
#define BR_FMC_PFAPR_M1AP(x) (HW_FMC_PFAPR(x).B.M1AP)
#define BR_FMC_PFAPR_M1AP(x) (UNION_READ(hw_fmc_pfapr_t, HW_FMC_PFAPR_ADDR(x), U, B.M1AP))
/*! @brief Format value for bitfield FMC_PFAPR_M1AP. */
#define BF_FMC_PFAPR_M1AP(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFAPR_M1AP) & BM_FMC_PFAPR_M1AP)
@ -234,7 +241,7 @@ typedef union _hw_fmc_pfapr
#define BS_FMC_PFAPR_M2AP (2U) /*!< Bit field size in bits for FMC_PFAPR_M2AP. */
/*! @brief Read current value of the FMC_PFAPR_M2AP field. */
#define BR_FMC_PFAPR_M2AP(x) (HW_FMC_PFAPR(x).B.M2AP)
#define BR_FMC_PFAPR_M2AP(x) (UNION_READ(hw_fmc_pfapr_t, HW_FMC_PFAPR_ADDR(x), U, B.M2AP))
/*! @brief Format value for bitfield FMC_PFAPR_M2AP. */
#define BF_FMC_PFAPR_M2AP(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFAPR_M2AP) & BM_FMC_PFAPR_M2AP)
@ -261,7 +268,7 @@ typedef union _hw_fmc_pfapr
#define BS_FMC_PFAPR_M3AP (2U) /*!< Bit field size in bits for FMC_PFAPR_M3AP. */
/*! @brief Read current value of the FMC_PFAPR_M3AP field. */
#define BR_FMC_PFAPR_M3AP(x) (HW_FMC_PFAPR(x).B.M3AP)
#define BR_FMC_PFAPR_M3AP(x) (UNION_READ(hw_fmc_pfapr_t, HW_FMC_PFAPR_ADDR(x), U, B.M3AP))
/*! @brief Format value for bitfield FMC_PFAPR_M3AP. */
#define BF_FMC_PFAPR_M3AP(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFAPR_M3AP) & BM_FMC_PFAPR_M3AP)
@ -288,7 +295,7 @@ typedef union _hw_fmc_pfapr
#define BS_FMC_PFAPR_M4AP (2U) /*!< Bit field size in bits for FMC_PFAPR_M4AP. */
/*! @brief Read current value of the FMC_PFAPR_M4AP field. */
#define BR_FMC_PFAPR_M4AP(x) (HW_FMC_PFAPR(x).B.M4AP)
#define BR_FMC_PFAPR_M4AP(x) (UNION_READ(hw_fmc_pfapr_t, HW_FMC_PFAPR_ADDR(x), U, B.M4AP))
/*! @brief Format value for bitfield FMC_PFAPR_M4AP. */
#define BF_FMC_PFAPR_M4AP(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFAPR_M4AP) & BM_FMC_PFAPR_M4AP)
@ -315,7 +322,7 @@ typedef union _hw_fmc_pfapr
#define BS_FMC_PFAPR_M5AP (2U) /*!< Bit field size in bits for FMC_PFAPR_M5AP. */
/*! @brief Read current value of the FMC_PFAPR_M5AP field. */
#define BR_FMC_PFAPR_M5AP(x) (HW_FMC_PFAPR(x).B.M5AP)
#define BR_FMC_PFAPR_M5AP(x) (UNION_READ(hw_fmc_pfapr_t, HW_FMC_PFAPR_ADDR(x), U, B.M5AP))
/*! @brief Format value for bitfield FMC_PFAPR_M5AP. */
#define BF_FMC_PFAPR_M5AP(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFAPR_M5AP) & BM_FMC_PFAPR_M5AP)
@ -342,7 +349,7 @@ typedef union _hw_fmc_pfapr
#define BS_FMC_PFAPR_M6AP (2U) /*!< Bit field size in bits for FMC_PFAPR_M6AP. */
/*! @brief Read current value of the FMC_PFAPR_M6AP field. */
#define BR_FMC_PFAPR_M6AP(x) (HW_FMC_PFAPR(x).B.M6AP)
#define BR_FMC_PFAPR_M6AP(x) (UNION_READ(hw_fmc_pfapr_t, HW_FMC_PFAPR_ADDR(x), U, B.M6AP))
/*! @brief Format value for bitfield FMC_PFAPR_M6AP. */
#define BF_FMC_PFAPR_M6AP(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFAPR_M6AP) & BM_FMC_PFAPR_M6AP)
@ -369,7 +376,7 @@ typedef union _hw_fmc_pfapr
#define BS_FMC_PFAPR_M7AP (2U) /*!< Bit field size in bits for FMC_PFAPR_M7AP. */
/*! @brief Read current value of the FMC_PFAPR_M7AP field. */
#define BR_FMC_PFAPR_M7AP(x) (HW_FMC_PFAPR(x).B.M7AP)
#define BR_FMC_PFAPR_M7AP(x) (UNION_READ(hw_fmc_pfapr_t, HW_FMC_PFAPR_ADDR(x), U, B.M7AP))
/*! @brief Format value for bitfield FMC_PFAPR_M7AP. */
#define BF_FMC_PFAPR_M7AP(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFAPR_M7AP) & BM_FMC_PFAPR_M7AP)
@ -395,13 +402,13 @@ typedef union _hw_fmc_pfapr
#define BS_FMC_PFAPR_M0PFD (1U) /*!< Bit field size in bits for FMC_PFAPR_M0PFD. */
/*! @brief Read current value of the FMC_PFAPR_M0PFD field. */
#define BR_FMC_PFAPR_M0PFD(x) (BITBAND_ACCESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M0PFD))
#define BR_FMC_PFAPR_M0PFD(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M0PFD)))
/*! @brief Format value for bitfield FMC_PFAPR_M0PFD. */
#define BF_FMC_PFAPR_M0PFD(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFAPR_M0PFD) & BM_FMC_PFAPR_M0PFD)
/*! @brief Set the M0PFD field to a new value. */
#define BW_FMC_PFAPR_M0PFD(x, v) (BITBAND_ACCESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M0PFD) = (v))
#define BW_FMC_PFAPR_M0PFD(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M0PFD), v))
/*@}*/
/*!
@ -421,13 +428,13 @@ typedef union _hw_fmc_pfapr
#define BS_FMC_PFAPR_M1PFD (1U) /*!< Bit field size in bits for FMC_PFAPR_M1PFD. */
/*! @brief Read current value of the FMC_PFAPR_M1PFD field. */
#define BR_FMC_PFAPR_M1PFD(x) (BITBAND_ACCESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M1PFD))
#define BR_FMC_PFAPR_M1PFD(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M1PFD)))
/*! @brief Format value for bitfield FMC_PFAPR_M1PFD. */
#define BF_FMC_PFAPR_M1PFD(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFAPR_M1PFD) & BM_FMC_PFAPR_M1PFD)
/*! @brief Set the M1PFD field to a new value. */
#define BW_FMC_PFAPR_M1PFD(x, v) (BITBAND_ACCESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M1PFD) = (v))
#define BW_FMC_PFAPR_M1PFD(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M1PFD), v))
/*@}*/
/*!
@ -447,13 +454,13 @@ typedef union _hw_fmc_pfapr
#define BS_FMC_PFAPR_M2PFD (1U) /*!< Bit field size in bits for FMC_PFAPR_M2PFD. */
/*! @brief Read current value of the FMC_PFAPR_M2PFD field. */
#define BR_FMC_PFAPR_M2PFD(x) (BITBAND_ACCESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M2PFD))
#define BR_FMC_PFAPR_M2PFD(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M2PFD)))
/*! @brief Format value for bitfield FMC_PFAPR_M2PFD. */
#define BF_FMC_PFAPR_M2PFD(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFAPR_M2PFD) & BM_FMC_PFAPR_M2PFD)
/*! @brief Set the M2PFD field to a new value. */
#define BW_FMC_PFAPR_M2PFD(x, v) (BITBAND_ACCESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M2PFD) = (v))
#define BW_FMC_PFAPR_M2PFD(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M2PFD), v))
/*@}*/
/*!
@ -473,13 +480,13 @@ typedef union _hw_fmc_pfapr
#define BS_FMC_PFAPR_M3PFD (1U) /*!< Bit field size in bits for FMC_PFAPR_M3PFD. */
/*! @brief Read current value of the FMC_PFAPR_M3PFD field. */
#define BR_FMC_PFAPR_M3PFD(x) (BITBAND_ACCESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M3PFD))
#define BR_FMC_PFAPR_M3PFD(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M3PFD)))
/*! @brief Format value for bitfield FMC_PFAPR_M3PFD. */
#define BF_FMC_PFAPR_M3PFD(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFAPR_M3PFD) & BM_FMC_PFAPR_M3PFD)
/*! @brief Set the M3PFD field to a new value. */
#define BW_FMC_PFAPR_M3PFD(x, v) (BITBAND_ACCESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M3PFD) = (v))
#define BW_FMC_PFAPR_M3PFD(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M3PFD), v))
/*@}*/
/*!
@ -499,13 +506,13 @@ typedef union _hw_fmc_pfapr
#define BS_FMC_PFAPR_M4PFD (1U) /*!< Bit field size in bits for FMC_PFAPR_M4PFD. */
/*! @brief Read current value of the FMC_PFAPR_M4PFD field. */
#define BR_FMC_PFAPR_M4PFD(x) (BITBAND_ACCESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M4PFD))
#define BR_FMC_PFAPR_M4PFD(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M4PFD)))
/*! @brief Format value for bitfield FMC_PFAPR_M4PFD. */
#define BF_FMC_PFAPR_M4PFD(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFAPR_M4PFD) & BM_FMC_PFAPR_M4PFD)
/*! @brief Set the M4PFD field to a new value. */
#define BW_FMC_PFAPR_M4PFD(x, v) (BITBAND_ACCESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M4PFD) = (v))
#define BW_FMC_PFAPR_M4PFD(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M4PFD), v))
/*@}*/
/*!
@ -525,13 +532,13 @@ typedef union _hw_fmc_pfapr
#define BS_FMC_PFAPR_M5PFD (1U) /*!< Bit field size in bits for FMC_PFAPR_M5PFD. */
/*! @brief Read current value of the FMC_PFAPR_M5PFD field. */
#define BR_FMC_PFAPR_M5PFD(x) (BITBAND_ACCESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M5PFD))
#define BR_FMC_PFAPR_M5PFD(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M5PFD)))
/*! @brief Format value for bitfield FMC_PFAPR_M5PFD. */
#define BF_FMC_PFAPR_M5PFD(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFAPR_M5PFD) & BM_FMC_PFAPR_M5PFD)
/*! @brief Set the M5PFD field to a new value. */
#define BW_FMC_PFAPR_M5PFD(x, v) (BITBAND_ACCESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M5PFD) = (v))
#define BW_FMC_PFAPR_M5PFD(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M5PFD), v))
/*@}*/
/*!
@ -551,13 +558,13 @@ typedef union _hw_fmc_pfapr
#define BS_FMC_PFAPR_M6PFD (1U) /*!< Bit field size in bits for FMC_PFAPR_M6PFD. */
/*! @brief Read current value of the FMC_PFAPR_M6PFD field. */
#define BR_FMC_PFAPR_M6PFD(x) (BITBAND_ACCESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M6PFD))
#define BR_FMC_PFAPR_M6PFD(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M6PFD)))
/*! @brief Format value for bitfield FMC_PFAPR_M6PFD. */
#define BF_FMC_PFAPR_M6PFD(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFAPR_M6PFD) & BM_FMC_PFAPR_M6PFD)
/*! @brief Set the M6PFD field to a new value. */
#define BW_FMC_PFAPR_M6PFD(x, v) (BITBAND_ACCESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M6PFD) = (v))
#define BW_FMC_PFAPR_M6PFD(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M6PFD), v))
/*@}*/
/*!
@ -577,13 +584,13 @@ typedef union _hw_fmc_pfapr
#define BS_FMC_PFAPR_M7PFD (1U) /*!< Bit field size in bits for FMC_PFAPR_M7PFD. */
/*! @brief Read current value of the FMC_PFAPR_M7PFD field. */
#define BR_FMC_PFAPR_M7PFD(x) (BITBAND_ACCESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M7PFD))
#define BR_FMC_PFAPR_M7PFD(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M7PFD)))
/*! @brief Format value for bitfield FMC_PFAPR_M7PFD. */
#define BF_FMC_PFAPR_M7PFD(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFAPR_M7PFD) & BM_FMC_PFAPR_M7PFD)
/*! @brief Set the M7PFD field to a new value. */
#define BW_FMC_PFAPR_M7PFD(x, v) (BITBAND_ACCESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M7PFD) = (v))
#define BW_FMC_PFAPR_M7PFD(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFAPR_ADDR(x), BP_FMC_PFAPR_M7PFD), v))
/*@}*/
/*******************************************************************************
@ -623,8 +630,8 @@ typedef union _hw_fmc_pfb0cr
#define HW_FMC_PFB0CR_ADDR(x) ((x) + 0x4U)
#define HW_FMC_PFB0CR(x) (*(__IO hw_fmc_pfb0cr_t *) HW_FMC_PFB0CR_ADDR(x))
#define HW_FMC_PFB0CR_RD(x) (HW_FMC_PFB0CR(x).U)
#define HW_FMC_PFB0CR_WR(x, v) (HW_FMC_PFB0CR(x).U = (v))
#define HW_FMC_PFB0CR_RD(x) (ADDRESS_READ(hw_fmc_pfb0cr_t, HW_FMC_PFB0CR_ADDR(x)))
#define HW_FMC_PFB0CR_WR(x, v) (ADDRESS_WRITE(hw_fmc_pfb0cr_t, HW_FMC_PFB0CR_ADDR(x), v))
#define HW_FMC_PFB0CR_SET(x, v) (HW_FMC_PFB0CR_WR(x, HW_FMC_PFB0CR_RD(x) | (v)))
#define HW_FMC_PFB0CR_CLR(x, v) (HW_FMC_PFB0CR_WR(x, HW_FMC_PFB0CR_RD(x) & ~(v)))
#define HW_FMC_PFB0CR_TOG(x, v) (HW_FMC_PFB0CR_WR(x, HW_FMC_PFB0CR_RD(x) ^ (v)))
@ -651,13 +658,13 @@ typedef union _hw_fmc_pfb0cr
#define BS_FMC_PFB0CR_B0SEBE (1U) /*!< Bit field size in bits for FMC_PFB0CR_B0SEBE. */
/*! @brief Read current value of the FMC_PFB0CR_B0SEBE field. */
#define BR_FMC_PFB0CR_B0SEBE(x) (BITBAND_ACCESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_B0SEBE))
#define BR_FMC_PFB0CR_B0SEBE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_B0SEBE)))
/*! @brief Format value for bitfield FMC_PFB0CR_B0SEBE. */
#define BF_FMC_PFB0CR_B0SEBE(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFB0CR_B0SEBE) & BM_FMC_PFB0CR_B0SEBE)
/*! @brief Set the B0SEBE field to a new value. */
#define BW_FMC_PFB0CR_B0SEBE(x, v) (BITBAND_ACCESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_B0SEBE) = (v))
#define BW_FMC_PFB0CR_B0SEBE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_B0SEBE), v))
/*@}*/
/*!
@ -676,13 +683,13 @@ typedef union _hw_fmc_pfb0cr
#define BS_FMC_PFB0CR_B0IPE (1U) /*!< Bit field size in bits for FMC_PFB0CR_B0IPE. */
/*! @brief Read current value of the FMC_PFB0CR_B0IPE field. */
#define BR_FMC_PFB0CR_B0IPE(x) (BITBAND_ACCESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_B0IPE))
#define BR_FMC_PFB0CR_B0IPE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_B0IPE)))
/*! @brief Format value for bitfield FMC_PFB0CR_B0IPE. */
#define BF_FMC_PFB0CR_B0IPE(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFB0CR_B0IPE) & BM_FMC_PFB0CR_B0IPE)
/*! @brief Set the B0IPE field to a new value. */
#define BW_FMC_PFB0CR_B0IPE(x, v) (BITBAND_ACCESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_B0IPE) = (v))
#define BW_FMC_PFB0CR_B0IPE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_B0IPE), v))
/*@}*/
/*!
@ -701,13 +708,13 @@ typedef union _hw_fmc_pfb0cr
#define BS_FMC_PFB0CR_B0DPE (1U) /*!< Bit field size in bits for FMC_PFB0CR_B0DPE. */
/*! @brief Read current value of the FMC_PFB0CR_B0DPE field. */
#define BR_FMC_PFB0CR_B0DPE(x) (BITBAND_ACCESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_B0DPE))
#define BR_FMC_PFB0CR_B0DPE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_B0DPE)))
/*! @brief Format value for bitfield FMC_PFB0CR_B0DPE. */
#define BF_FMC_PFB0CR_B0DPE(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFB0CR_B0DPE) & BM_FMC_PFB0CR_B0DPE)
/*! @brief Set the B0DPE field to a new value. */
#define BW_FMC_PFB0CR_B0DPE(x, v) (BITBAND_ACCESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_B0DPE) = (v))
#define BW_FMC_PFB0CR_B0DPE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_B0DPE), v))
/*@}*/
/*!
@ -725,13 +732,13 @@ typedef union _hw_fmc_pfb0cr
#define BS_FMC_PFB0CR_B0ICE (1U) /*!< Bit field size in bits for FMC_PFB0CR_B0ICE. */
/*! @brief Read current value of the FMC_PFB0CR_B0ICE field. */
#define BR_FMC_PFB0CR_B0ICE(x) (BITBAND_ACCESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_B0ICE))
#define BR_FMC_PFB0CR_B0ICE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_B0ICE)))
/*! @brief Format value for bitfield FMC_PFB0CR_B0ICE. */
#define BF_FMC_PFB0CR_B0ICE(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFB0CR_B0ICE) & BM_FMC_PFB0CR_B0ICE)
/*! @brief Set the B0ICE field to a new value. */
#define BW_FMC_PFB0CR_B0ICE(x, v) (BITBAND_ACCESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_B0ICE) = (v))
#define BW_FMC_PFB0CR_B0ICE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_B0ICE), v))
/*@}*/
/*!
@ -749,13 +756,13 @@ typedef union _hw_fmc_pfb0cr
#define BS_FMC_PFB0CR_B0DCE (1U) /*!< Bit field size in bits for FMC_PFB0CR_B0DCE. */
/*! @brief Read current value of the FMC_PFB0CR_B0DCE field. */
#define BR_FMC_PFB0CR_B0DCE(x) (BITBAND_ACCESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_B0DCE))
#define BR_FMC_PFB0CR_B0DCE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_B0DCE)))
/*! @brief Format value for bitfield FMC_PFB0CR_B0DCE. */
#define BF_FMC_PFB0CR_B0DCE(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFB0CR_B0DCE) & BM_FMC_PFB0CR_B0DCE)
/*! @brief Set the B0DCE field to a new value. */
#define BW_FMC_PFB0CR_B0DCE(x, v) (BITBAND_ACCESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_B0DCE) = (v))
#define BW_FMC_PFB0CR_B0DCE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_B0DCE), v))
/*@}*/
/*!
@ -777,7 +784,7 @@ typedef union _hw_fmc_pfb0cr
#define BS_FMC_PFB0CR_CRC (3U) /*!< Bit field size in bits for FMC_PFB0CR_CRC. */
/*! @brief Read current value of the FMC_PFB0CR_CRC field. */
#define BR_FMC_PFB0CR_CRC(x) (HW_FMC_PFB0CR(x).B.CRC)
#define BR_FMC_PFB0CR_CRC(x) (UNION_READ(hw_fmc_pfb0cr_t, HW_FMC_PFB0CR_ADDR(x), U, B.CRC))
/*! @brief Format value for bitfield FMC_PFB0CR_CRC. */
#define BF_FMC_PFB0CR_CRC(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFB0CR_CRC) & BM_FMC_PFB0CR_CRC)
@ -803,7 +810,7 @@ typedef union _hw_fmc_pfb0cr
#define BS_FMC_PFB0CR_B0MW (2U) /*!< Bit field size in bits for FMC_PFB0CR_B0MW. */
/*! @brief Read current value of the FMC_PFB0CR_B0MW field. */
#define BR_FMC_PFB0CR_B0MW(x) (HW_FMC_PFB0CR(x).B.B0MW)
#define BR_FMC_PFB0CR_B0MW(x) (UNION_READ(hw_fmc_pfb0cr_t, HW_FMC_PFB0CR_ADDR(x), U, B.B0MW))
/*@}*/
/*!
@ -827,7 +834,7 @@ typedef union _hw_fmc_pfb0cr
#define BF_FMC_PFB0CR_S_B_INV(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFB0CR_S_B_INV) & BM_FMC_PFB0CR_S_B_INV)
/*! @brief Set the S_B_INV field to a new value. */
#define BW_FMC_PFB0CR_S_B_INV(x, v) (BITBAND_ACCESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_S_B_INV) = (v))
#define BW_FMC_PFB0CR_S_B_INV(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB0CR_ADDR(x), BP_FMC_PFB0CR_S_B_INV), v))
/*@}*/
/*!
@ -877,7 +884,7 @@ typedef union _hw_fmc_pfb0cr
#define BS_FMC_PFB0CR_CLCK_WAY (4U) /*!< Bit field size in bits for FMC_PFB0CR_CLCK_WAY. */
/*! @brief Read current value of the FMC_PFB0CR_CLCK_WAY field. */
#define BR_FMC_PFB0CR_CLCK_WAY(x) (HW_FMC_PFB0CR(x).B.CLCK_WAY)
#define BR_FMC_PFB0CR_CLCK_WAY(x) (UNION_READ(hw_fmc_pfb0cr_t, HW_FMC_PFB0CR_ADDR(x), U, B.CLCK_WAY))
/*! @brief Format value for bitfield FMC_PFB0CR_CLCK_WAY. */
#define BF_FMC_PFB0CR_CLCK_WAY(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFB0CR_CLCK_WAY) & BM_FMC_PFB0CR_CLCK_WAY)
@ -902,7 +909,7 @@ typedef union _hw_fmc_pfb0cr
#define BS_FMC_PFB0CR_B0RWSC (4U) /*!< Bit field size in bits for FMC_PFB0CR_B0RWSC. */
/*! @brief Read current value of the FMC_PFB0CR_B0RWSC field. */
#define BR_FMC_PFB0CR_B0RWSC(x) (HW_FMC_PFB0CR(x).B.B0RWSC)
#define BR_FMC_PFB0CR_B0RWSC(x) (UNION_READ(hw_fmc_pfb0cr_t, HW_FMC_PFB0CR_ADDR(x), U, B.B0RWSC))
/*@}*/
/*******************************************************************************
@ -941,8 +948,8 @@ typedef union _hw_fmc_pfb1cr
#define HW_FMC_PFB1CR_ADDR(x) ((x) + 0x8U)
#define HW_FMC_PFB1CR(x) (*(__IO hw_fmc_pfb1cr_t *) HW_FMC_PFB1CR_ADDR(x))
#define HW_FMC_PFB1CR_RD(x) (HW_FMC_PFB1CR(x).U)
#define HW_FMC_PFB1CR_WR(x, v) (HW_FMC_PFB1CR(x).U = (v))
#define HW_FMC_PFB1CR_RD(x) (ADDRESS_READ(hw_fmc_pfb1cr_t, HW_FMC_PFB1CR_ADDR(x)))
#define HW_FMC_PFB1CR_WR(x, v) (ADDRESS_WRITE(hw_fmc_pfb1cr_t, HW_FMC_PFB1CR_ADDR(x), v))
#define HW_FMC_PFB1CR_SET(x, v) (HW_FMC_PFB1CR_WR(x, HW_FMC_PFB1CR_RD(x) | (v)))
#define HW_FMC_PFB1CR_CLR(x, v) (HW_FMC_PFB1CR_WR(x, HW_FMC_PFB1CR_RD(x) & ~(v)))
#define HW_FMC_PFB1CR_TOG(x, v) (HW_FMC_PFB1CR_WR(x, HW_FMC_PFB1CR_RD(x) ^ (v)))
@ -969,13 +976,13 @@ typedef union _hw_fmc_pfb1cr
#define BS_FMC_PFB1CR_B1SEBE (1U) /*!< Bit field size in bits for FMC_PFB1CR_B1SEBE. */
/*! @brief Read current value of the FMC_PFB1CR_B1SEBE field. */
#define BR_FMC_PFB1CR_B1SEBE(x) (BITBAND_ACCESS32(HW_FMC_PFB1CR_ADDR(x), BP_FMC_PFB1CR_B1SEBE))
#define BR_FMC_PFB1CR_B1SEBE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB1CR_ADDR(x), BP_FMC_PFB1CR_B1SEBE)))
/*! @brief Format value for bitfield FMC_PFB1CR_B1SEBE. */
#define BF_FMC_PFB1CR_B1SEBE(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFB1CR_B1SEBE) & BM_FMC_PFB1CR_B1SEBE)
/*! @brief Set the B1SEBE field to a new value. */
#define BW_FMC_PFB1CR_B1SEBE(x, v) (BITBAND_ACCESS32(HW_FMC_PFB1CR_ADDR(x), BP_FMC_PFB1CR_B1SEBE) = (v))
#define BW_FMC_PFB1CR_B1SEBE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB1CR_ADDR(x), BP_FMC_PFB1CR_B1SEBE), v))
/*@}*/
/*!
@ -994,13 +1001,13 @@ typedef union _hw_fmc_pfb1cr
#define BS_FMC_PFB1CR_B1IPE (1U) /*!< Bit field size in bits for FMC_PFB1CR_B1IPE. */
/*! @brief Read current value of the FMC_PFB1CR_B1IPE field. */
#define BR_FMC_PFB1CR_B1IPE(x) (BITBAND_ACCESS32(HW_FMC_PFB1CR_ADDR(x), BP_FMC_PFB1CR_B1IPE))
#define BR_FMC_PFB1CR_B1IPE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB1CR_ADDR(x), BP_FMC_PFB1CR_B1IPE)))
/*! @brief Format value for bitfield FMC_PFB1CR_B1IPE. */
#define BF_FMC_PFB1CR_B1IPE(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFB1CR_B1IPE) & BM_FMC_PFB1CR_B1IPE)
/*! @brief Set the B1IPE field to a new value. */
#define BW_FMC_PFB1CR_B1IPE(x, v) (BITBAND_ACCESS32(HW_FMC_PFB1CR_ADDR(x), BP_FMC_PFB1CR_B1IPE) = (v))
#define BW_FMC_PFB1CR_B1IPE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB1CR_ADDR(x), BP_FMC_PFB1CR_B1IPE), v))
/*@}*/
/*!
@ -1019,13 +1026,13 @@ typedef union _hw_fmc_pfb1cr
#define BS_FMC_PFB1CR_B1DPE (1U) /*!< Bit field size in bits for FMC_PFB1CR_B1DPE. */
/*! @brief Read current value of the FMC_PFB1CR_B1DPE field. */
#define BR_FMC_PFB1CR_B1DPE(x) (BITBAND_ACCESS32(HW_FMC_PFB1CR_ADDR(x), BP_FMC_PFB1CR_B1DPE))
#define BR_FMC_PFB1CR_B1DPE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB1CR_ADDR(x), BP_FMC_PFB1CR_B1DPE)))
/*! @brief Format value for bitfield FMC_PFB1CR_B1DPE. */
#define BF_FMC_PFB1CR_B1DPE(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFB1CR_B1DPE) & BM_FMC_PFB1CR_B1DPE)
/*! @brief Set the B1DPE field to a new value. */
#define BW_FMC_PFB1CR_B1DPE(x, v) (BITBAND_ACCESS32(HW_FMC_PFB1CR_ADDR(x), BP_FMC_PFB1CR_B1DPE) = (v))
#define BW_FMC_PFB1CR_B1DPE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB1CR_ADDR(x), BP_FMC_PFB1CR_B1DPE), v))
/*@}*/
/*!
@ -1043,13 +1050,13 @@ typedef union _hw_fmc_pfb1cr
#define BS_FMC_PFB1CR_B1ICE (1U) /*!< Bit field size in bits for FMC_PFB1CR_B1ICE. */
/*! @brief Read current value of the FMC_PFB1CR_B1ICE field. */
#define BR_FMC_PFB1CR_B1ICE(x) (BITBAND_ACCESS32(HW_FMC_PFB1CR_ADDR(x), BP_FMC_PFB1CR_B1ICE))
#define BR_FMC_PFB1CR_B1ICE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB1CR_ADDR(x), BP_FMC_PFB1CR_B1ICE)))
/*! @brief Format value for bitfield FMC_PFB1CR_B1ICE. */
#define BF_FMC_PFB1CR_B1ICE(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFB1CR_B1ICE) & BM_FMC_PFB1CR_B1ICE)
/*! @brief Set the B1ICE field to a new value. */
#define BW_FMC_PFB1CR_B1ICE(x, v) (BITBAND_ACCESS32(HW_FMC_PFB1CR_ADDR(x), BP_FMC_PFB1CR_B1ICE) = (v))
#define BW_FMC_PFB1CR_B1ICE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB1CR_ADDR(x), BP_FMC_PFB1CR_B1ICE), v))
/*@}*/
/*!
@ -1067,13 +1074,13 @@ typedef union _hw_fmc_pfb1cr
#define BS_FMC_PFB1CR_B1DCE (1U) /*!< Bit field size in bits for FMC_PFB1CR_B1DCE. */
/*! @brief Read current value of the FMC_PFB1CR_B1DCE field. */
#define BR_FMC_PFB1CR_B1DCE(x) (BITBAND_ACCESS32(HW_FMC_PFB1CR_ADDR(x), BP_FMC_PFB1CR_B1DCE))
#define BR_FMC_PFB1CR_B1DCE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB1CR_ADDR(x), BP_FMC_PFB1CR_B1DCE)))
/*! @brief Format value for bitfield FMC_PFB1CR_B1DCE. */
#define BF_FMC_PFB1CR_B1DCE(v) ((uint32_t)((uint32_t)(v) << BP_FMC_PFB1CR_B1DCE) & BM_FMC_PFB1CR_B1DCE)
/*! @brief Set the B1DCE field to a new value. */
#define BW_FMC_PFB1CR_B1DCE(x, v) (BITBAND_ACCESS32(HW_FMC_PFB1CR_ADDR(x), BP_FMC_PFB1CR_B1DCE) = (v))
#define BW_FMC_PFB1CR_B1DCE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_PFB1CR_ADDR(x), BP_FMC_PFB1CR_B1DCE), v))
/*@}*/
/*!
@ -1093,7 +1100,7 @@ typedef union _hw_fmc_pfb1cr
#define BS_FMC_PFB1CR_B1MW (2U) /*!< Bit field size in bits for FMC_PFB1CR_B1MW. */
/*! @brief Read current value of the FMC_PFB1CR_B1MW field. */
#define BR_FMC_PFB1CR_B1MW(x) (HW_FMC_PFB1CR(x).B.B1MW)
#define BR_FMC_PFB1CR_B1MW(x) (UNION_READ(hw_fmc_pfb1cr_t, HW_FMC_PFB1CR_ADDR(x), U, B.B1MW))
/*@}*/
/*!
@ -1112,7 +1119,7 @@ typedef union _hw_fmc_pfb1cr
#define BS_FMC_PFB1CR_B1RWSC (4U) /*!< Bit field size in bits for FMC_PFB1CR_B1RWSC. */
/*! @brief Read current value of the FMC_PFB1CR_B1RWSC field. */
#define BR_FMC_PFB1CR_B1RWSC(x) (HW_FMC_PFB1CR(x).B.B1RWSC)
#define BR_FMC_PFB1CR_B1RWSC(x) (UNION_READ(hw_fmc_pfb1cr_t, HW_FMC_PFB1CR_ADDR(x), U, B.B1RWSC))
/*@}*/
/*******************************************************************************
@ -1150,8 +1157,8 @@ typedef union _hw_fmc_tagvdw0sn
#define HW_FMC_TAGVDW0Sn_ADDR(x, n) ((x) + 0x100U + (0x4U * (n)))
#define HW_FMC_TAGVDW0Sn(x, n) (*(__IO hw_fmc_tagvdw0sn_t *) HW_FMC_TAGVDW0Sn_ADDR(x, n))
#define HW_FMC_TAGVDW0Sn_RD(x, n) (HW_FMC_TAGVDW0Sn(x, n).U)
#define HW_FMC_TAGVDW0Sn_WR(x, n, v) (HW_FMC_TAGVDW0Sn(x, n).U = (v))
#define HW_FMC_TAGVDW0Sn_RD(x, n) (ADDRESS_READ(hw_fmc_tagvdw0sn_t, HW_FMC_TAGVDW0Sn_ADDR(x, n)))
#define HW_FMC_TAGVDW0Sn_WR(x, n, v) (ADDRESS_WRITE(hw_fmc_tagvdw0sn_t, HW_FMC_TAGVDW0Sn_ADDR(x, n), v))
#define HW_FMC_TAGVDW0Sn_SET(x, n, v) (HW_FMC_TAGVDW0Sn_WR(x, n, HW_FMC_TAGVDW0Sn_RD(x, n) | (v)))
#define HW_FMC_TAGVDW0Sn_CLR(x, n, v) (HW_FMC_TAGVDW0Sn_WR(x, n, HW_FMC_TAGVDW0Sn_RD(x, n) & ~(v)))
#define HW_FMC_TAGVDW0Sn_TOG(x, n, v) (HW_FMC_TAGVDW0Sn_WR(x, n, HW_FMC_TAGVDW0Sn_RD(x, n) ^ (v)))
@ -1170,13 +1177,13 @@ typedef union _hw_fmc_tagvdw0sn
#define BS_FMC_TAGVDW0Sn_valid (1U) /*!< Bit field size in bits for FMC_TAGVDW0Sn_valid. */
/*! @brief Read current value of the FMC_TAGVDW0Sn_valid field. */
#define BR_FMC_TAGVDW0Sn_valid(x, n) (BITBAND_ACCESS32(HW_FMC_TAGVDW0Sn_ADDR(x, n), BP_FMC_TAGVDW0Sn_valid))
#define BR_FMC_TAGVDW0Sn_valid(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_TAGVDW0Sn_ADDR(x, n), BP_FMC_TAGVDW0Sn_valid)))
/*! @brief Format value for bitfield FMC_TAGVDW0Sn_valid. */
#define BF_FMC_TAGVDW0Sn_valid(v) ((uint32_t)((uint32_t)(v) << BP_FMC_TAGVDW0Sn_valid) & BM_FMC_TAGVDW0Sn_valid)
/*! @brief Set the valid field to a new value. */
#define BW_FMC_TAGVDW0Sn_valid(x, n, v) (BITBAND_ACCESS32(HW_FMC_TAGVDW0Sn_ADDR(x, n), BP_FMC_TAGVDW0Sn_valid) = (v))
#define BW_FMC_TAGVDW0Sn_valid(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_TAGVDW0Sn_ADDR(x, n), BP_FMC_TAGVDW0Sn_valid), v))
/*@}*/
/*!
@ -1188,7 +1195,7 @@ typedef union _hw_fmc_tagvdw0sn
#define BS_FMC_TAGVDW0Sn_tag (14U) /*!< Bit field size in bits for FMC_TAGVDW0Sn_tag. */
/*! @brief Read current value of the FMC_TAGVDW0Sn_tag field. */
#define BR_FMC_TAGVDW0Sn_tag(x, n) (HW_FMC_TAGVDW0Sn(x, n).B.tag)
#define BR_FMC_TAGVDW0Sn_tag(x, n) (UNION_READ(hw_fmc_tagvdw0sn_t, HW_FMC_TAGVDW0Sn_ADDR(x, n), U, B.tag))
/*! @brief Format value for bitfield FMC_TAGVDW0Sn_tag. */
#define BF_FMC_TAGVDW0Sn_tag(v) ((uint32_t)((uint32_t)(v) << BP_FMC_TAGVDW0Sn_tag) & BM_FMC_TAGVDW0Sn_tag)
@ -1232,8 +1239,8 @@ typedef union _hw_fmc_tagvdw1sn
#define HW_FMC_TAGVDW1Sn_ADDR(x, n) ((x) + 0x110U + (0x4U * (n)))
#define HW_FMC_TAGVDW1Sn(x, n) (*(__IO hw_fmc_tagvdw1sn_t *) HW_FMC_TAGVDW1Sn_ADDR(x, n))
#define HW_FMC_TAGVDW1Sn_RD(x, n) (HW_FMC_TAGVDW1Sn(x, n).U)
#define HW_FMC_TAGVDW1Sn_WR(x, n, v) (HW_FMC_TAGVDW1Sn(x, n).U = (v))
#define HW_FMC_TAGVDW1Sn_RD(x, n) (ADDRESS_READ(hw_fmc_tagvdw1sn_t, HW_FMC_TAGVDW1Sn_ADDR(x, n)))
#define HW_FMC_TAGVDW1Sn_WR(x, n, v) (ADDRESS_WRITE(hw_fmc_tagvdw1sn_t, HW_FMC_TAGVDW1Sn_ADDR(x, n), v))
#define HW_FMC_TAGVDW1Sn_SET(x, n, v) (HW_FMC_TAGVDW1Sn_WR(x, n, HW_FMC_TAGVDW1Sn_RD(x, n) | (v)))
#define HW_FMC_TAGVDW1Sn_CLR(x, n, v) (HW_FMC_TAGVDW1Sn_WR(x, n, HW_FMC_TAGVDW1Sn_RD(x, n) & ~(v)))
#define HW_FMC_TAGVDW1Sn_TOG(x, n, v) (HW_FMC_TAGVDW1Sn_WR(x, n, HW_FMC_TAGVDW1Sn_RD(x, n) ^ (v)))
@ -1252,13 +1259,13 @@ typedef union _hw_fmc_tagvdw1sn
#define BS_FMC_TAGVDW1Sn_valid (1U) /*!< Bit field size in bits for FMC_TAGVDW1Sn_valid. */
/*! @brief Read current value of the FMC_TAGVDW1Sn_valid field. */
#define BR_FMC_TAGVDW1Sn_valid(x, n) (BITBAND_ACCESS32(HW_FMC_TAGVDW1Sn_ADDR(x, n), BP_FMC_TAGVDW1Sn_valid))
#define BR_FMC_TAGVDW1Sn_valid(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_TAGVDW1Sn_ADDR(x, n), BP_FMC_TAGVDW1Sn_valid)))
/*! @brief Format value for bitfield FMC_TAGVDW1Sn_valid. */
#define BF_FMC_TAGVDW1Sn_valid(v) ((uint32_t)((uint32_t)(v) << BP_FMC_TAGVDW1Sn_valid) & BM_FMC_TAGVDW1Sn_valid)
/*! @brief Set the valid field to a new value. */
#define BW_FMC_TAGVDW1Sn_valid(x, n, v) (BITBAND_ACCESS32(HW_FMC_TAGVDW1Sn_ADDR(x, n), BP_FMC_TAGVDW1Sn_valid) = (v))
#define BW_FMC_TAGVDW1Sn_valid(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_TAGVDW1Sn_ADDR(x, n), BP_FMC_TAGVDW1Sn_valid), v))
/*@}*/
/*!
@ -1270,7 +1277,7 @@ typedef union _hw_fmc_tagvdw1sn
#define BS_FMC_TAGVDW1Sn_tag (14U) /*!< Bit field size in bits for FMC_TAGVDW1Sn_tag. */
/*! @brief Read current value of the FMC_TAGVDW1Sn_tag field. */
#define BR_FMC_TAGVDW1Sn_tag(x, n) (HW_FMC_TAGVDW1Sn(x, n).B.tag)
#define BR_FMC_TAGVDW1Sn_tag(x, n) (UNION_READ(hw_fmc_tagvdw1sn_t, HW_FMC_TAGVDW1Sn_ADDR(x, n), U, B.tag))
/*! @brief Format value for bitfield FMC_TAGVDW1Sn_tag. */
#define BF_FMC_TAGVDW1Sn_tag(v) ((uint32_t)((uint32_t)(v) << BP_FMC_TAGVDW1Sn_tag) & BM_FMC_TAGVDW1Sn_tag)
@ -1314,8 +1321,8 @@ typedef union _hw_fmc_tagvdw2sn
#define HW_FMC_TAGVDW2Sn_ADDR(x, n) ((x) + 0x120U + (0x4U * (n)))
#define HW_FMC_TAGVDW2Sn(x, n) (*(__IO hw_fmc_tagvdw2sn_t *) HW_FMC_TAGVDW2Sn_ADDR(x, n))
#define HW_FMC_TAGVDW2Sn_RD(x, n) (HW_FMC_TAGVDW2Sn(x, n).U)
#define HW_FMC_TAGVDW2Sn_WR(x, n, v) (HW_FMC_TAGVDW2Sn(x, n).U = (v))
#define HW_FMC_TAGVDW2Sn_RD(x, n) (ADDRESS_READ(hw_fmc_tagvdw2sn_t, HW_FMC_TAGVDW2Sn_ADDR(x, n)))
#define HW_FMC_TAGVDW2Sn_WR(x, n, v) (ADDRESS_WRITE(hw_fmc_tagvdw2sn_t, HW_FMC_TAGVDW2Sn_ADDR(x, n), v))
#define HW_FMC_TAGVDW2Sn_SET(x, n, v) (HW_FMC_TAGVDW2Sn_WR(x, n, HW_FMC_TAGVDW2Sn_RD(x, n) | (v)))
#define HW_FMC_TAGVDW2Sn_CLR(x, n, v) (HW_FMC_TAGVDW2Sn_WR(x, n, HW_FMC_TAGVDW2Sn_RD(x, n) & ~(v)))
#define HW_FMC_TAGVDW2Sn_TOG(x, n, v) (HW_FMC_TAGVDW2Sn_WR(x, n, HW_FMC_TAGVDW2Sn_RD(x, n) ^ (v)))
@ -1334,13 +1341,13 @@ typedef union _hw_fmc_tagvdw2sn
#define BS_FMC_TAGVDW2Sn_valid (1U) /*!< Bit field size in bits for FMC_TAGVDW2Sn_valid. */
/*! @brief Read current value of the FMC_TAGVDW2Sn_valid field. */
#define BR_FMC_TAGVDW2Sn_valid(x, n) (BITBAND_ACCESS32(HW_FMC_TAGVDW2Sn_ADDR(x, n), BP_FMC_TAGVDW2Sn_valid))
#define BR_FMC_TAGVDW2Sn_valid(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_TAGVDW2Sn_ADDR(x, n), BP_FMC_TAGVDW2Sn_valid)))
/*! @brief Format value for bitfield FMC_TAGVDW2Sn_valid. */
#define BF_FMC_TAGVDW2Sn_valid(v) ((uint32_t)((uint32_t)(v) << BP_FMC_TAGVDW2Sn_valid) & BM_FMC_TAGVDW2Sn_valid)
/*! @brief Set the valid field to a new value. */
#define BW_FMC_TAGVDW2Sn_valid(x, n, v) (BITBAND_ACCESS32(HW_FMC_TAGVDW2Sn_ADDR(x, n), BP_FMC_TAGVDW2Sn_valid) = (v))
#define BW_FMC_TAGVDW2Sn_valid(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_TAGVDW2Sn_ADDR(x, n), BP_FMC_TAGVDW2Sn_valid), v))
/*@}*/
/*!
@ -1352,7 +1359,7 @@ typedef union _hw_fmc_tagvdw2sn
#define BS_FMC_TAGVDW2Sn_tag (14U) /*!< Bit field size in bits for FMC_TAGVDW2Sn_tag. */
/*! @brief Read current value of the FMC_TAGVDW2Sn_tag field. */
#define BR_FMC_TAGVDW2Sn_tag(x, n) (HW_FMC_TAGVDW2Sn(x, n).B.tag)
#define BR_FMC_TAGVDW2Sn_tag(x, n) (UNION_READ(hw_fmc_tagvdw2sn_t, HW_FMC_TAGVDW2Sn_ADDR(x, n), U, B.tag))
/*! @brief Format value for bitfield FMC_TAGVDW2Sn_tag. */
#define BF_FMC_TAGVDW2Sn_tag(v) ((uint32_t)((uint32_t)(v) << BP_FMC_TAGVDW2Sn_tag) & BM_FMC_TAGVDW2Sn_tag)
@ -1396,8 +1403,8 @@ typedef union _hw_fmc_tagvdw3sn
#define HW_FMC_TAGVDW3Sn_ADDR(x, n) ((x) + 0x130U + (0x4U * (n)))
#define HW_FMC_TAGVDW3Sn(x, n) (*(__IO hw_fmc_tagvdw3sn_t *) HW_FMC_TAGVDW3Sn_ADDR(x, n))
#define HW_FMC_TAGVDW3Sn_RD(x, n) (HW_FMC_TAGVDW3Sn(x, n).U)
#define HW_FMC_TAGVDW3Sn_WR(x, n, v) (HW_FMC_TAGVDW3Sn(x, n).U = (v))
#define HW_FMC_TAGVDW3Sn_RD(x, n) (ADDRESS_READ(hw_fmc_tagvdw3sn_t, HW_FMC_TAGVDW3Sn_ADDR(x, n)))
#define HW_FMC_TAGVDW3Sn_WR(x, n, v) (ADDRESS_WRITE(hw_fmc_tagvdw3sn_t, HW_FMC_TAGVDW3Sn_ADDR(x, n), v))
#define HW_FMC_TAGVDW3Sn_SET(x, n, v) (HW_FMC_TAGVDW3Sn_WR(x, n, HW_FMC_TAGVDW3Sn_RD(x, n) | (v)))
#define HW_FMC_TAGVDW3Sn_CLR(x, n, v) (HW_FMC_TAGVDW3Sn_WR(x, n, HW_FMC_TAGVDW3Sn_RD(x, n) & ~(v)))
#define HW_FMC_TAGVDW3Sn_TOG(x, n, v) (HW_FMC_TAGVDW3Sn_WR(x, n, HW_FMC_TAGVDW3Sn_RD(x, n) ^ (v)))
@ -1416,13 +1423,13 @@ typedef union _hw_fmc_tagvdw3sn
#define BS_FMC_TAGVDW3Sn_valid (1U) /*!< Bit field size in bits for FMC_TAGVDW3Sn_valid. */
/*! @brief Read current value of the FMC_TAGVDW3Sn_valid field. */
#define BR_FMC_TAGVDW3Sn_valid(x, n) (BITBAND_ACCESS32(HW_FMC_TAGVDW3Sn_ADDR(x, n), BP_FMC_TAGVDW3Sn_valid))
#define BR_FMC_TAGVDW3Sn_valid(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_FMC_TAGVDW3Sn_ADDR(x, n), BP_FMC_TAGVDW3Sn_valid)))
/*! @brief Format value for bitfield FMC_TAGVDW3Sn_valid. */
#define BF_FMC_TAGVDW3Sn_valid(v) ((uint32_t)((uint32_t)(v) << BP_FMC_TAGVDW3Sn_valid) & BM_FMC_TAGVDW3Sn_valid)
/*! @brief Set the valid field to a new value. */
#define BW_FMC_TAGVDW3Sn_valid(x, n, v) (BITBAND_ACCESS32(HW_FMC_TAGVDW3Sn_ADDR(x, n), BP_FMC_TAGVDW3Sn_valid) = (v))
#define BW_FMC_TAGVDW3Sn_valid(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_FMC_TAGVDW3Sn_ADDR(x, n), BP_FMC_TAGVDW3Sn_valid), v))
/*@}*/
/*!
@ -1434,7 +1441,7 @@ typedef union _hw_fmc_tagvdw3sn
#define BS_FMC_TAGVDW3Sn_tag (14U) /*!< Bit field size in bits for FMC_TAGVDW3Sn_tag. */
/*! @brief Read current value of the FMC_TAGVDW3Sn_tag field. */
#define BR_FMC_TAGVDW3Sn_tag(x, n) (HW_FMC_TAGVDW3Sn(x, n).B.tag)
#define BR_FMC_TAGVDW3Sn_tag(x, n) (UNION_READ(hw_fmc_tagvdw3sn_t, HW_FMC_TAGVDW3Sn_ADDR(x, n), U, B.tag))
/*! @brief Format value for bitfield FMC_TAGVDW3Sn_tag. */
#define BF_FMC_TAGVDW3Sn_tag(v) ((uint32_t)((uint32_t)(v) << BP_FMC_TAGVDW3Sn_tag) & BM_FMC_TAGVDW3Sn_tag)
@ -1476,8 +1483,8 @@ typedef union _hw_fmc_dataw0snu
#define HW_FMC_DATAW0SnU_ADDR(x, n) ((x) + 0x200U + (0x8U * (n)))
#define HW_FMC_DATAW0SnU(x, n) (*(__IO hw_fmc_dataw0snu_t *) HW_FMC_DATAW0SnU_ADDR(x, n))
#define HW_FMC_DATAW0SnU_RD(x, n) (HW_FMC_DATAW0SnU(x, n).U)
#define HW_FMC_DATAW0SnU_WR(x, n, v) (HW_FMC_DATAW0SnU(x, n).U = (v))
#define HW_FMC_DATAW0SnU_RD(x, n) (ADDRESS_READ(hw_fmc_dataw0snu_t, HW_FMC_DATAW0SnU_ADDR(x, n)))
#define HW_FMC_DATAW0SnU_WR(x, n, v) (ADDRESS_WRITE(hw_fmc_dataw0snu_t, HW_FMC_DATAW0SnU_ADDR(x, n), v))
#define HW_FMC_DATAW0SnU_SET(x, n, v) (HW_FMC_DATAW0SnU_WR(x, n, HW_FMC_DATAW0SnU_RD(x, n) | (v)))
#define HW_FMC_DATAW0SnU_CLR(x, n, v) (HW_FMC_DATAW0SnU_WR(x, n, HW_FMC_DATAW0SnU_RD(x, n) & ~(v)))
#define HW_FMC_DATAW0SnU_TOG(x, n, v) (HW_FMC_DATAW0SnU_WR(x, n, HW_FMC_DATAW0SnU_RD(x, n) ^ (v)))
@ -1537,8 +1544,8 @@ typedef union _hw_fmc_dataw0snl
#define HW_FMC_DATAW0SnL_ADDR(x, n) ((x) + 0x204U + (0x8U * (n)))
#define HW_FMC_DATAW0SnL(x, n) (*(__IO hw_fmc_dataw0snl_t *) HW_FMC_DATAW0SnL_ADDR(x, n))
#define HW_FMC_DATAW0SnL_RD(x, n) (HW_FMC_DATAW0SnL(x, n).U)
#define HW_FMC_DATAW0SnL_WR(x, n, v) (HW_FMC_DATAW0SnL(x, n).U = (v))
#define HW_FMC_DATAW0SnL_RD(x, n) (ADDRESS_READ(hw_fmc_dataw0snl_t, HW_FMC_DATAW0SnL_ADDR(x, n)))
#define HW_FMC_DATAW0SnL_WR(x, n, v) (ADDRESS_WRITE(hw_fmc_dataw0snl_t, HW_FMC_DATAW0SnL_ADDR(x, n), v))
#define HW_FMC_DATAW0SnL_SET(x, n, v) (HW_FMC_DATAW0SnL_WR(x, n, HW_FMC_DATAW0SnL_RD(x, n) | (v)))
#define HW_FMC_DATAW0SnL_CLR(x, n, v) (HW_FMC_DATAW0SnL_WR(x, n, HW_FMC_DATAW0SnL_RD(x, n) & ~(v)))
#define HW_FMC_DATAW0SnL_TOG(x, n, v) (HW_FMC_DATAW0SnL_WR(x, n, HW_FMC_DATAW0SnL_RD(x, n) ^ (v)))
@ -1599,8 +1606,8 @@ typedef union _hw_fmc_dataw1snu
#define HW_FMC_DATAW1SnU_ADDR(x, n) ((x) + 0x220U + (0x8U * (n)))
#define HW_FMC_DATAW1SnU(x, n) (*(__IO hw_fmc_dataw1snu_t *) HW_FMC_DATAW1SnU_ADDR(x, n))
#define HW_FMC_DATAW1SnU_RD(x, n) (HW_FMC_DATAW1SnU(x, n).U)
#define HW_FMC_DATAW1SnU_WR(x, n, v) (HW_FMC_DATAW1SnU(x, n).U = (v))
#define HW_FMC_DATAW1SnU_RD(x, n) (ADDRESS_READ(hw_fmc_dataw1snu_t, HW_FMC_DATAW1SnU_ADDR(x, n)))
#define HW_FMC_DATAW1SnU_WR(x, n, v) (ADDRESS_WRITE(hw_fmc_dataw1snu_t, HW_FMC_DATAW1SnU_ADDR(x, n), v))
#define HW_FMC_DATAW1SnU_SET(x, n, v) (HW_FMC_DATAW1SnU_WR(x, n, HW_FMC_DATAW1SnU_RD(x, n) | (v)))
#define HW_FMC_DATAW1SnU_CLR(x, n, v) (HW_FMC_DATAW1SnU_WR(x, n, HW_FMC_DATAW1SnU_RD(x, n) & ~(v)))
#define HW_FMC_DATAW1SnU_TOG(x, n, v) (HW_FMC_DATAW1SnU_WR(x, n, HW_FMC_DATAW1SnU_RD(x, n) ^ (v)))
@ -1660,8 +1667,8 @@ typedef union _hw_fmc_dataw1snl
#define HW_FMC_DATAW1SnL_ADDR(x, n) ((x) + 0x224U + (0x8U * (n)))
#define HW_FMC_DATAW1SnL(x, n) (*(__IO hw_fmc_dataw1snl_t *) HW_FMC_DATAW1SnL_ADDR(x, n))
#define HW_FMC_DATAW1SnL_RD(x, n) (HW_FMC_DATAW1SnL(x, n).U)
#define HW_FMC_DATAW1SnL_WR(x, n, v) (HW_FMC_DATAW1SnL(x, n).U = (v))
#define HW_FMC_DATAW1SnL_RD(x, n) (ADDRESS_READ(hw_fmc_dataw1snl_t, HW_FMC_DATAW1SnL_ADDR(x, n)))
#define HW_FMC_DATAW1SnL_WR(x, n, v) (ADDRESS_WRITE(hw_fmc_dataw1snl_t, HW_FMC_DATAW1SnL_ADDR(x, n), v))
#define HW_FMC_DATAW1SnL_SET(x, n, v) (HW_FMC_DATAW1SnL_WR(x, n, HW_FMC_DATAW1SnL_RD(x, n) | (v)))
#define HW_FMC_DATAW1SnL_CLR(x, n, v) (HW_FMC_DATAW1SnL_WR(x, n, HW_FMC_DATAW1SnL_RD(x, n) & ~(v)))
#define HW_FMC_DATAW1SnL_TOG(x, n, v) (HW_FMC_DATAW1SnL_WR(x, n, HW_FMC_DATAW1SnL_RD(x, n) ^ (v)))
@ -1722,8 +1729,8 @@ typedef union _hw_fmc_dataw2snu
#define HW_FMC_DATAW2SnU_ADDR(x, n) ((x) + 0x240U + (0x8U * (n)))
#define HW_FMC_DATAW2SnU(x, n) (*(__IO hw_fmc_dataw2snu_t *) HW_FMC_DATAW2SnU_ADDR(x, n))
#define HW_FMC_DATAW2SnU_RD(x, n) (HW_FMC_DATAW2SnU(x, n).U)
#define HW_FMC_DATAW2SnU_WR(x, n, v) (HW_FMC_DATAW2SnU(x, n).U = (v))
#define HW_FMC_DATAW2SnU_RD(x, n) (ADDRESS_READ(hw_fmc_dataw2snu_t, HW_FMC_DATAW2SnU_ADDR(x, n)))
#define HW_FMC_DATAW2SnU_WR(x, n, v) (ADDRESS_WRITE(hw_fmc_dataw2snu_t, HW_FMC_DATAW2SnU_ADDR(x, n), v))
#define HW_FMC_DATAW2SnU_SET(x, n, v) (HW_FMC_DATAW2SnU_WR(x, n, HW_FMC_DATAW2SnU_RD(x, n) | (v)))
#define HW_FMC_DATAW2SnU_CLR(x, n, v) (HW_FMC_DATAW2SnU_WR(x, n, HW_FMC_DATAW2SnU_RD(x, n) & ~(v)))
#define HW_FMC_DATAW2SnU_TOG(x, n, v) (HW_FMC_DATAW2SnU_WR(x, n, HW_FMC_DATAW2SnU_RD(x, n) ^ (v)))
@ -1783,8 +1790,8 @@ typedef union _hw_fmc_dataw2snl
#define HW_FMC_DATAW2SnL_ADDR(x, n) ((x) + 0x244U + (0x8U * (n)))
#define HW_FMC_DATAW2SnL(x, n) (*(__IO hw_fmc_dataw2snl_t *) HW_FMC_DATAW2SnL_ADDR(x, n))
#define HW_FMC_DATAW2SnL_RD(x, n) (HW_FMC_DATAW2SnL(x, n).U)
#define HW_FMC_DATAW2SnL_WR(x, n, v) (HW_FMC_DATAW2SnL(x, n).U = (v))
#define HW_FMC_DATAW2SnL_RD(x, n) (ADDRESS_READ(hw_fmc_dataw2snl_t, HW_FMC_DATAW2SnL_ADDR(x, n)))
#define HW_FMC_DATAW2SnL_WR(x, n, v) (ADDRESS_WRITE(hw_fmc_dataw2snl_t, HW_FMC_DATAW2SnL_ADDR(x, n), v))
#define HW_FMC_DATAW2SnL_SET(x, n, v) (HW_FMC_DATAW2SnL_WR(x, n, HW_FMC_DATAW2SnL_RD(x, n) | (v)))
#define HW_FMC_DATAW2SnL_CLR(x, n, v) (HW_FMC_DATAW2SnL_WR(x, n, HW_FMC_DATAW2SnL_RD(x, n) & ~(v)))
#define HW_FMC_DATAW2SnL_TOG(x, n, v) (HW_FMC_DATAW2SnL_WR(x, n, HW_FMC_DATAW2SnL_RD(x, n) ^ (v)))
@ -1845,8 +1852,8 @@ typedef union _hw_fmc_dataw3snu
#define HW_FMC_DATAW3SnU_ADDR(x, n) ((x) + 0x260U + (0x8U * (n)))
#define HW_FMC_DATAW3SnU(x, n) (*(__IO hw_fmc_dataw3snu_t *) HW_FMC_DATAW3SnU_ADDR(x, n))
#define HW_FMC_DATAW3SnU_RD(x, n) (HW_FMC_DATAW3SnU(x, n).U)
#define HW_FMC_DATAW3SnU_WR(x, n, v) (HW_FMC_DATAW3SnU(x, n).U = (v))
#define HW_FMC_DATAW3SnU_RD(x, n) (ADDRESS_READ(hw_fmc_dataw3snu_t, HW_FMC_DATAW3SnU_ADDR(x, n)))
#define HW_FMC_DATAW3SnU_WR(x, n, v) (ADDRESS_WRITE(hw_fmc_dataw3snu_t, HW_FMC_DATAW3SnU_ADDR(x, n), v))
#define HW_FMC_DATAW3SnU_SET(x, n, v) (HW_FMC_DATAW3SnU_WR(x, n, HW_FMC_DATAW3SnU_RD(x, n) | (v)))
#define HW_FMC_DATAW3SnU_CLR(x, n, v) (HW_FMC_DATAW3SnU_WR(x, n, HW_FMC_DATAW3SnU_RD(x, n) & ~(v)))
#define HW_FMC_DATAW3SnU_TOG(x, n, v) (HW_FMC_DATAW3SnU_WR(x, n, HW_FMC_DATAW3SnU_RD(x, n) ^ (v)))
@ -1906,8 +1913,8 @@ typedef union _hw_fmc_dataw3snl
#define HW_FMC_DATAW3SnL_ADDR(x, n) ((x) + 0x264U + (0x8U * (n)))
#define HW_FMC_DATAW3SnL(x, n) (*(__IO hw_fmc_dataw3snl_t *) HW_FMC_DATAW3SnL_ADDR(x, n))
#define HW_FMC_DATAW3SnL_RD(x, n) (HW_FMC_DATAW3SnL(x, n).U)
#define HW_FMC_DATAW3SnL_WR(x, n, v) (HW_FMC_DATAW3SnL(x, n).U = (v))
#define HW_FMC_DATAW3SnL_RD(x, n) (ADDRESS_READ(hw_fmc_dataw3snl_t, HW_FMC_DATAW3SnL_ADDR(x, n)))
#define HW_FMC_DATAW3SnL_WR(x, n, v) (ADDRESS_WRITE(hw_fmc_dataw3snl_t, HW_FMC_DATAW3SnL_ADDR(x, n), v))
#define HW_FMC_DATAW3SnL_SET(x, n, v) (HW_FMC_DATAW3SnL_WR(x, n, HW_FMC_DATAW3SnL_RD(x, n) | (v)))
#define HW_FMC_DATAW3SnL_CLR(x, n, v) (HW_FMC_DATAW3SnL_WR(x, n, HW_FMC_DATAW3SnL_RD(x, n) & ~(v)))
#define HW_FMC_DATAW3SnL_TOG(x, n, v) (HW_FMC_DATAW3SnL_WR(x, n, HW_FMC_DATAW3SnL_RD(x, n) ^ (v)))

139
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_ftfe.h
View File

@ -15,6 +15,9 @@
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** (C) COPYRIGHT 2015-2015 ARM Limited
** ALL RIGHTS RESERVED
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
@ -68,6 +71,10 @@
** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
** Update of SystemInit() and SystemCoreClockUpdate() functions.
** Module access macro module_BASES replaced by module_BASE_PTRS.
** - rev. 2.6 (2015-08-03) (ARM)
** All accesses to memory are replaced by equivalent macros; this allows
** memory read/write operations to be re-defined if needed (for example,
** to implement new security features
**
** ###################################################################
*/
@ -155,8 +162,8 @@ typedef union _hw_ftfe_fstat
#define HW_FTFE_FSTAT_ADDR(x) ((x) + 0x0U)
#define HW_FTFE_FSTAT(x) (*(__IO hw_ftfe_fstat_t *) HW_FTFE_FSTAT_ADDR(x))
#define HW_FTFE_FSTAT_RD(x) (HW_FTFE_FSTAT(x).U)
#define HW_FTFE_FSTAT_WR(x, v) (HW_FTFE_FSTAT(x).U = (v))
#define HW_FTFE_FSTAT_RD(x) (ADDRESS_READ(hw_ftfe_fstat_t, HW_FTFE_FSTAT_ADDR(x)))
#define HW_FTFE_FSTAT_WR(x, v) (ADDRESS_WRITE(hw_ftfe_fstat_t, HW_FTFE_FSTAT_ADDR(x), v))
#define HW_FTFE_FSTAT_SET(x, v) (HW_FTFE_FSTAT_WR(x, HW_FTFE_FSTAT_RD(x) | (v)))
#define HW_FTFE_FSTAT_CLR(x, v) (HW_FTFE_FSTAT_WR(x, HW_FTFE_FSTAT_RD(x) & ~(v)))
#define HW_FTFE_FSTAT_TOG(x, v) (HW_FTFE_FSTAT_WR(x, HW_FTFE_FSTAT_RD(x) ^ (v)))
@ -183,7 +190,7 @@ typedef union _hw_ftfe_fstat
#define BS_FTFE_FSTAT_MGSTAT0 (1U) /*!< Bit field size in bits for FTFE_FSTAT_MGSTAT0. */
/*! @brief Read current value of the FTFE_FSTAT_MGSTAT0 field. */
#define BR_FTFE_FSTAT_MGSTAT0(x) (BITBAND_ACCESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_MGSTAT0))
#define BR_FTFE_FSTAT_MGSTAT0(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_MGSTAT0)))
/*@}*/
/*!
@ -206,13 +213,13 @@ typedef union _hw_ftfe_fstat
#define BS_FTFE_FSTAT_FPVIOL (1U) /*!< Bit field size in bits for FTFE_FSTAT_FPVIOL. */
/*! @brief Read current value of the FTFE_FSTAT_FPVIOL field. */
#define BR_FTFE_FSTAT_FPVIOL(x) (BITBAND_ACCESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_FPVIOL))
#define BR_FTFE_FSTAT_FPVIOL(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_FPVIOL)))
/*! @brief Format value for bitfield FTFE_FSTAT_FPVIOL. */
#define BF_FTFE_FSTAT_FPVIOL(v) ((uint8_t)((uint8_t)(v) << BP_FTFE_FSTAT_FPVIOL) & BM_FTFE_FSTAT_FPVIOL)
/*! @brief Set the FPVIOL field to a new value. */
#define BW_FTFE_FSTAT_FPVIOL(x, v) (BITBAND_ACCESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_FPVIOL) = (v))
#define BW_FTFE_FSTAT_FPVIOL(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_FPVIOL), v))
/*@}*/
/*!
@ -234,13 +241,13 @@ typedef union _hw_ftfe_fstat
#define BS_FTFE_FSTAT_ACCERR (1U) /*!< Bit field size in bits for FTFE_FSTAT_ACCERR. */
/*! @brief Read current value of the FTFE_FSTAT_ACCERR field. */
#define BR_FTFE_FSTAT_ACCERR(x) (BITBAND_ACCESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_ACCERR))
#define BR_FTFE_FSTAT_ACCERR(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_ACCERR)))
/*! @brief Format value for bitfield FTFE_FSTAT_ACCERR. */
#define BF_FTFE_FSTAT_ACCERR(v) ((uint8_t)((uint8_t)(v) << BP_FTFE_FSTAT_ACCERR) & BM_FTFE_FSTAT_ACCERR)
/*! @brief Set the ACCERR field to a new value. */
#define BW_FTFE_FSTAT_ACCERR(x, v) (BITBAND_ACCESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_ACCERR) = (v))
#define BW_FTFE_FSTAT_ACCERR(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_ACCERR), v))
/*@}*/
/*!
@ -262,13 +269,13 @@ typedef union _hw_ftfe_fstat
#define BS_FTFE_FSTAT_RDCOLERR (1U) /*!< Bit field size in bits for FTFE_FSTAT_RDCOLERR. */
/*! @brief Read current value of the FTFE_FSTAT_RDCOLERR field. */
#define BR_FTFE_FSTAT_RDCOLERR(x) (BITBAND_ACCESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_RDCOLERR))
#define BR_FTFE_FSTAT_RDCOLERR(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_RDCOLERR)))
/*! @brief Format value for bitfield FTFE_FSTAT_RDCOLERR. */
#define BF_FTFE_FSTAT_RDCOLERR(v) ((uint8_t)((uint8_t)(v) << BP_FTFE_FSTAT_RDCOLERR) & BM_FTFE_FSTAT_RDCOLERR)
/*! @brief Set the RDCOLERR field to a new value. */
#define BW_FTFE_FSTAT_RDCOLERR(x, v) (BITBAND_ACCESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_RDCOLERR) = (v))
#define BW_FTFE_FSTAT_RDCOLERR(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_RDCOLERR), v))
/*@}*/
/*!
@ -294,13 +301,13 @@ typedef union _hw_ftfe_fstat
#define BS_FTFE_FSTAT_CCIF (1U) /*!< Bit field size in bits for FTFE_FSTAT_CCIF. */
/*! @brief Read current value of the FTFE_FSTAT_CCIF field. */
#define BR_FTFE_FSTAT_CCIF(x) (BITBAND_ACCESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_CCIF))
#define BR_FTFE_FSTAT_CCIF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_CCIF)))
/*! @brief Format value for bitfield FTFE_FSTAT_CCIF. */
#define BF_FTFE_FSTAT_CCIF(v) ((uint8_t)((uint8_t)(v) << BP_FTFE_FSTAT_CCIF) & BM_FTFE_FSTAT_CCIF)
/*! @brief Set the CCIF field to a new value. */
#define BW_FTFE_FSTAT_CCIF(x, v) (BITBAND_ACCESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_CCIF) = (v))
#define BW_FTFE_FSTAT_CCIF(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_FTFE_FSTAT_ADDR(x), BP_FTFE_FSTAT_CCIF), v))
/*@}*/
/*******************************************************************************
@ -342,8 +349,8 @@ typedef union _hw_ftfe_fcnfg
#define HW_FTFE_FCNFG_ADDR(x) ((x) + 0x1U)
#define HW_FTFE_FCNFG(x) (*(__IO hw_ftfe_fcnfg_t *) HW_FTFE_FCNFG_ADDR(x))
#define HW_FTFE_FCNFG_RD(x) (HW_FTFE_FCNFG(x).U)
#define HW_FTFE_FCNFG_WR(x, v) (HW_FTFE_FCNFG(x).U = (v))
#define HW_FTFE_FCNFG_RD(x) (ADDRESS_READ(hw_ftfe_fcnfg_t, HW_FTFE_FCNFG_ADDR(x)))
#define HW_FTFE_FCNFG_WR(x, v) (ADDRESS_WRITE(hw_ftfe_fcnfg_t, HW_FTFE_FCNFG_ADDR(x), v))
#define HW_FTFE_FCNFG_SET(x, v) (HW_FTFE_FCNFG_WR(x, HW_FTFE_FCNFG_RD(x) | (v)))
#define HW_FTFE_FCNFG_CLR(x, v) (HW_FTFE_FCNFG_WR(x, HW_FTFE_FCNFG_RD(x) & ~(v)))
#define HW_FTFE_FCNFG_TOG(x, v) (HW_FTFE_FCNFG_WR(x, HW_FTFE_FCNFG_RD(x) ^ (v)))
@ -375,7 +382,7 @@ typedef union _hw_ftfe_fcnfg
#define BS_FTFE_FCNFG_EEERDY (1U) /*!< Bit field size in bits for FTFE_FCNFG_EEERDY. */
/*! @brief Read current value of the FTFE_FCNFG_EEERDY field. */
#define BR_FTFE_FCNFG_EEERDY(x) (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_EEERDY))
#define BR_FTFE_FCNFG_EEERDY(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_EEERDY)))
/*@}*/
/*!
@ -405,7 +412,7 @@ typedef union _hw_ftfe_fcnfg
#define BS_FTFE_FCNFG_RAMRDY (1U) /*!< Bit field size in bits for FTFE_FCNFG_RAMRDY. */
/*! @brief Read current value of the FTFE_FCNFG_RAMRDY field. */
#define BR_FTFE_FCNFG_RAMRDY(x) (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_RAMRDY))
#define BR_FTFE_FCNFG_RAMRDY(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_RAMRDY)))
/*@}*/
/*!
@ -424,7 +431,7 @@ typedef union _hw_ftfe_fcnfg
#define BS_FTFE_FCNFG_PFLSH (1U) /*!< Bit field size in bits for FTFE_FCNFG_PFLSH. */
/*! @brief Read current value of the FTFE_FCNFG_PFLSH field. */
#define BR_FTFE_FCNFG_PFLSH(x) (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_PFLSH))
#define BR_FTFE_FCNFG_PFLSH(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_PFLSH)))
/*@}*/
/*!
@ -447,7 +454,7 @@ typedef union _hw_ftfe_fcnfg
#define BS_FTFE_FCNFG_SWAP (1U) /*!< Bit field size in bits for FTFE_FCNFG_SWAP. */
/*! @brief Read current value of the FTFE_FCNFG_SWAP field. */
#define BR_FTFE_FCNFG_SWAP(x) (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_SWAP))
#define BR_FTFE_FCNFG_SWAP(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_SWAP)))
/*@}*/
/*!
@ -466,13 +473,13 @@ typedef union _hw_ftfe_fcnfg
#define BS_FTFE_FCNFG_ERSSUSP (1U) /*!< Bit field size in bits for FTFE_FCNFG_ERSSUSP. */
/*! @brief Read current value of the FTFE_FCNFG_ERSSUSP field. */
#define BR_FTFE_FCNFG_ERSSUSP(x) (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_ERSSUSP))
#define BR_FTFE_FCNFG_ERSSUSP(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_ERSSUSP)))
/*! @brief Format value for bitfield FTFE_FCNFG_ERSSUSP. */
#define BF_FTFE_FCNFG_ERSSUSP(v) ((uint8_t)((uint8_t)(v) << BP_FTFE_FCNFG_ERSSUSP) & BM_FTFE_FCNFG_ERSSUSP)
/*! @brief Set the ERSSUSP field to a new value. */
#define BW_FTFE_FCNFG_ERSSUSP(x, v) (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_ERSSUSP) = (v))
#define BW_FTFE_FCNFG_ERSSUSP(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_ERSSUSP), v))
/*@}*/
/*!
@ -498,7 +505,7 @@ typedef union _hw_ftfe_fcnfg
#define BS_FTFE_FCNFG_ERSAREQ (1U) /*!< Bit field size in bits for FTFE_FCNFG_ERSAREQ. */
/*! @brief Read current value of the FTFE_FCNFG_ERSAREQ field. */
#define BR_FTFE_FCNFG_ERSAREQ(x) (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_ERSAREQ))
#define BR_FTFE_FCNFG_ERSAREQ(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_ERSAREQ)))
/*@}*/
/*!
@ -519,13 +526,13 @@ typedef union _hw_ftfe_fcnfg
#define BS_FTFE_FCNFG_RDCOLLIE (1U) /*!< Bit field size in bits for FTFE_FCNFG_RDCOLLIE. */
/*! @brief Read current value of the FTFE_FCNFG_RDCOLLIE field. */
#define BR_FTFE_FCNFG_RDCOLLIE(x) (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_RDCOLLIE))
#define BR_FTFE_FCNFG_RDCOLLIE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_RDCOLLIE)))
/*! @brief Format value for bitfield FTFE_FCNFG_RDCOLLIE. */
#define BF_FTFE_FCNFG_RDCOLLIE(v) ((uint8_t)((uint8_t)(v) << BP_FTFE_FCNFG_RDCOLLIE) & BM_FTFE_FCNFG_RDCOLLIE)
/*! @brief Set the RDCOLLIE field to a new value. */
#define BW_FTFE_FCNFG_RDCOLLIE(x, v) (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_RDCOLLIE) = (v))
#define BW_FTFE_FCNFG_RDCOLLIE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_RDCOLLIE), v))
/*@}*/
/*!
@ -544,13 +551,13 @@ typedef union _hw_ftfe_fcnfg
#define BS_FTFE_FCNFG_CCIE (1U) /*!< Bit field size in bits for FTFE_FCNFG_CCIE. */
/*! @brief Read current value of the FTFE_FCNFG_CCIE field. */
#define BR_FTFE_FCNFG_CCIE(x) (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_CCIE))
#define BR_FTFE_FCNFG_CCIE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_CCIE)))
/*! @brief Format value for bitfield FTFE_FCNFG_CCIE. */
#define BF_FTFE_FCNFG_CCIE(v) ((uint8_t)((uint8_t)(v) << BP_FTFE_FCNFG_CCIE) & BM_FTFE_FCNFG_CCIE)
/*! @brief Set the CCIE field to a new value. */
#define BW_FTFE_FCNFG_CCIE(x, v) (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_CCIE) = (v))
#define BW_FTFE_FCNFG_CCIE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_FTFE_FCNFG_ADDR(x), BP_FTFE_FCNFG_CCIE), v))
/*@}*/
/*******************************************************************************
@ -588,7 +595,7 @@ typedef union _hw_ftfe_fsec
#define HW_FTFE_FSEC_ADDR(x) ((x) + 0x2U)
#define HW_FTFE_FSEC(x) (*(__I hw_ftfe_fsec_t *) HW_FTFE_FSEC_ADDR(x))
#define HW_FTFE_FSEC_RD(x) (HW_FTFE_FSEC(x).U)
#define HW_FTFE_FSEC_RD(x) (ADDRESS_READ(hw_ftfe_fsec_t, HW_FTFE_FSEC_ADDR(x)))
/*@}*/
/*
@ -616,7 +623,7 @@ typedef union _hw_ftfe_fsec
#define BS_FTFE_FSEC_SEC (2U) /*!< Bit field size in bits for FTFE_FSEC_SEC. */
/*! @brief Read current value of the FTFE_FSEC_SEC field. */
#define BR_FTFE_FSEC_SEC(x) (HW_FTFE_FSEC(x).B.SEC)
#define BR_FTFE_FSEC_SEC(x) (UNION_READ(hw_ftfe_fsec_t, HW_FTFE_FSEC_ADDR(x), U, B.SEC))
/*@}*/
/*!
@ -644,7 +651,7 @@ typedef union _hw_ftfe_fsec
#define BS_FTFE_FSEC_FSLACC (2U) /*!< Bit field size in bits for FTFE_FSEC_FSLACC. */
/*! @brief Read current value of the FTFE_FSEC_FSLACC field. */
#define BR_FTFE_FSEC_FSLACC(x) (HW_FTFE_FSEC(x).B.FSLACC)
#define BR_FTFE_FSEC_FSLACC(x) (UNION_READ(hw_ftfe_fsec_t, HW_FTFE_FSEC_ADDR(x), U, B.FSLACC))
/*@}*/
/*!
@ -667,7 +674,7 @@ typedef union _hw_ftfe_fsec
#define BS_FTFE_FSEC_MEEN (2U) /*!< Bit field size in bits for FTFE_FSEC_MEEN. */
/*! @brief Read current value of the FTFE_FSEC_MEEN field. */
#define BR_FTFE_FSEC_MEEN(x) (HW_FTFE_FSEC(x).B.MEEN)
#define BR_FTFE_FSEC_MEEN(x) (UNION_READ(hw_ftfe_fsec_t, HW_FTFE_FSEC_ADDR(x), U, B.MEEN))
/*@}*/
/*!
@ -688,7 +695,7 @@ typedef union _hw_ftfe_fsec
#define BS_FTFE_FSEC_KEYEN (2U) /*!< Bit field size in bits for FTFE_FSEC_KEYEN. */
/*! @brief Read current value of the FTFE_FSEC_KEYEN field. */
#define BR_FTFE_FSEC_KEYEN(x) (HW_FTFE_FSEC(x).B.KEYEN)
#define BR_FTFE_FSEC_KEYEN(x) (UNION_READ(hw_ftfe_fsec_t, HW_FTFE_FSEC_ADDR(x), U, B.KEYEN))
/*@}*/
/*******************************************************************************
@ -724,7 +731,7 @@ typedef union _hw_ftfe_fopt
#define HW_FTFE_FOPT_ADDR(x) ((x) + 0x3U)
#define HW_FTFE_FOPT(x) (*(__I hw_ftfe_fopt_t *) HW_FTFE_FOPT_ADDR(x))
#define HW_FTFE_FOPT_RD(x) (HW_FTFE_FOPT(x).U)
#define HW_FTFE_FOPT_RD(x) (ADDRESS_READ(hw_ftfe_fopt_t, HW_FTFE_FOPT_ADDR(x)))
/*@}*/
/*
@ -775,8 +782,8 @@ typedef union _hw_ftfe_fccob3
#define HW_FTFE_FCCOB3_ADDR(x) ((x) + 0x4U)
#define HW_FTFE_FCCOB3(x) (*(__IO hw_ftfe_fccob3_t *) HW_FTFE_FCCOB3_ADDR(x))
#define HW_FTFE_FCCOB3_RD(x) (HW_FTFE_FCCOB3(x).U)
#define HW_FTFE_FCCOB3_WR(x, v) (HW_FTFE_FCCOB3(x).U = (v))
#define HW_FTFE_FCCOB3_RD(x) (ADDRESS_READ(hw_ftfe_fccob3_t, HW_FTFE_FCCOB3_ADDR(x)))
#define HW_FTFE_FCCOB3_WR(x, v) (ADDRESS_WRITE(hw_ftfe_fccob3_t, HW_FTFE_FCCOB3_ADDR(x), v))
#define HW_FTFE_FCCOB3_SET(x, v) (HW_FTFE_FCCOB3_WR(x, HW_FTFE_FCCOB3_RD(x) | (v)))
#define HW_FTFE_FCCOB3_CLR(x, v) (HW_FTFE_FCCOB3_WR(x, HW_FTFE_FCCOB3_RD(x) & ~(v)))
#define HW_FTFE_FCCOB3_TOG(x, v) (HW_FTFE_FCCOB3_WR(x, HW_FTFE_FCCOB3_RD(x) ^ (v)))
@ -860,8 +867,8 @@ typedef union _hw_ftfe_fccob2
#define HW_FTFE_FCCOB2_ADDR(x) ((x) + 0x5U)
#define HW_FTFE_FCCOB2(x) (*(__IO hw_ftfe_fccob2_t *) HW_FTFE_FCCOB2_ADDR(x))
#define HW_FTFE_FCCOB2_RD(x) (HW_FTFE_FCCOB2(x).U)
#define HW_FTFE_FCCOB2_WR(x, v) (HW_FTFE_FCCOB2(x).U = (v))
#define HW_FTFE_FCCOB2_RD(x) (ADDRESS_READ(hw_ftfe_fccob2_t, HW_FTFE_FCCOB2_ADDR(x)))
#define HW_FTFE_FCCOB2_WR(x, v) (ADDRESS_WRITE(hw_ftfe_fccob2_t, HW_FTFE_FCCOB2_ADDR(x), v))
#define HW_FTFE_FCCOB2_SET(x, v) (HW_FTFE_FCCOB2_WR(x, HW_FTFE_FCCOB2_RD(x) | (v)))
#define HW_FTFE_FCCOB2_CLR(x, v) (HW_FTFE_FCCOB2_WR(x, HW_FTFE_FCCOB2_RD(x) & ~(v)))
#define HW_FTFE_FCCOB2_TOG(x, v) (HW_FTFE_FCCOB2_WR(x, HW_FTFE_FCCOB2_RD(x) ^ (v)))
@ -945,8 +952,8 @@ typedef union _hw_ftfe_fccob1
#define HW_FTFE_FCCOB1_ADDR(x) ((x) + 0x6U)
#define HW_FTFE_FCCOB1(x) (*(__IO hw_ftfe_fccob1_t *) HW_FTFE_FCCOB1_ADDR(x))
#define HW_FTFE_FCCOB1_RD(x) (HW_FTFE_FCCOB1(x).U)
#define HW_FTFE_FCCOB1_WR(x, v) (HW_FTFE_FCCOB1(x).U = (v))
#define HW_FTFE_FCCOB1_RD(x) (ADDRESS_READ(hw_ftfe_fccob1_t, HW_FTFE_FCCOB1_ADDR(x)))
#define HW_FTFE_FCCOB1_WR(x, v) (ADDRESS_WRITE(hw_ftfe_fccob1_t, HW_FTFE_FCCOB1_ADDR(x), v))
#define HW_FTFE_FCCOB1_SET(x, v) (HW_FTFE_FCCOB1_WR(x, HW_FTFE_FCCOB1_RD(x) | (v)))
#define HW_FTFE_FCCOB1_CLR(x, v) (HW_FTFE_FCCOB1_WR(x, HW_FTFE_FCCOB1_RD(x) & ~(v)))
#define HW_FTFE_FCCOB1_TOG(x, v) (HW_FTFE_FCCOB1_WR(x, HW_FTFE_FCCOB1_RD(x) ^ (v)))
@ -1030,8 +1037,8 @@ typedef union _hw_ftfe_fccob0
#define HW_FTFE_FCCOB0_ADDR(x) ((x) + 0x7U)
#define HW_FTFE_FCCOB0(x) (*(__IO hw_ftfe_fccob0_t *) HW_FTFE_FCCOB0_ADDR(x))
#define HW_FTFE_FCCOB0_RD(x) (HW_FTFE_FCCOB0(x).U)
#define HW_FTFE_FCCOB0_WR(x, v) (HW_FTFE_FCCOB0(x).U = (v))
#define HW_FTFE_FCCOB0_RD(x) (ADDRESS_READ(hw_ftfe_fccob0_t, HW_FTFE_FCCOB0_ADDR(x)))
#define HW_FTFE_FCCOB0_WR(x, v) (ADDRESS_WRITE(hw_ftfe_fccob0_t, HW_FTFE_FCCOB0_ADDR(x), v))
#define HW_FTFE_FCCOB0_SET(x, v) (HW_FTFE_FCCOB0_WR(x, HW_FTFE_FCCOB0_RD(x) | (v)))
#define HW_FTFE_FCCOB0_CLR(x, v) (HW_FTFE_FCCOB0_WR(x, HW_FTFE_FCCOB0_RD(x) & ~(v)))
#define HW_FTFE_FCCOB0_TOG(x, v) (HW_FTFE_FCCOB0_WR(x, HW_FTFE_FCCOB0_RD(x) ^ (v)))
@ -1115,8 +1122,8 @@ typedef union _hw_ftfe_fccob7
#define HW_FTFE_FCCOB7_ADDR(x) ((x) + 0x8U)
#define HW_FTFE_FCCOB7(x) (*(__IO hw_ftfe_fccob7_t *) HW_FTFE_FCCOB7_ADDR(x))
#define HW_FTFE_FCCOB7_RD(x) (HW_FTFE_FCCOB7(x).U)
#define HW_FTFE_FCCOB7_WR(x, v) (HW_FTFE_FCCOB7(x).U = (v))
#define HW_FTFE_FCCOB7_RD(x) (ADDRESS_READ(hw_ftfe_fccob7_t, HW_FTFE_FCCOB7_ADDR(x)))
#define HW_FTFE_FCCOB7_WR(x, v) (ADDRESS_WRITE(hw_ftfe_fccob7_t, HW_FTFE_FCCOB7_ADDR(x), v))
#define HW_FTFE_FCCOB7_SET(x, v) (HW_FTFE_FCCOB7_WR(x, HW_FTFE_FCCOB7_RD(x) | (v)))
#define HW_FTFE_FCCOB7_CLR(x, v) (HW_FTFE_FCCOB7_WR(x, HW_FTFE_FCCOB7_RD(x) & ~(v)))
#define HW_FTFE_FCCOB7_TOG(x, v) (HW_FTFE_FCCOB7_WR(x, HW_FTFE_FCCOB7_RD(x) ^ (v)))
@ -1200,8 +1207,8 @@ typedef union _hw_ftfe_fccob6
#define HW_FTFE_FCCOB6_ADDR(x) ((x) + 0x9U)
#define HW_FTFE_FCCOB6(x) (*(__IO hw_ftfe_fccob6_t *) HW_FTFE_FCCOB6_ADDR(x))
#define HW_FTFE_FCCOB6_RD(x) (HW_FTFE_FCCOB6(x).U)
#define HW_FTFE_FCCOB6_WR(x, v) (HW_FTFE_FCCOB6(x).U = (v))
#define HW_FTFE_FCCOB6_RD(x) (ADDRESS_READ(hw_ftfe_fccob6_t, HW_FTFE_FCCOB6_ADDR(x)))
#define HW_FTFE_FCCOB6_WR(x, v) (ADDRESS_WRITE(hw_ftfe_fccob6_t, HW_FTFE_FCCOB6_ADDR(x), v))
#define HW_FTFE_FCCOB6_SET(x, v) (HW_FTFE_FCCOB6_WR(x, HW_FTFE_FCCOB6_RD(x) | (v)))
#define HW_FTFE_FCCOB6_CLR(x, v) (HW_FTFE_FCCOB6_WR(x, HW_FTFE_FCCOB6_RD(x) & ~(v)))
#define HW_FTFE_FCCOB6_TOG(x, v) (HW_FTFE_FCCOB6_WR(x, HW_FTFE_FCCOB6_RD(x) ^ (v)))
@ -1285,8 +1292,8 @@ typedef union _hw_ftfe_fccob5
#define HW_FTFE_FCCOB5_ADDR(x) ((x) + 0xAU)
#define HW_FTFE_FCCOB5(x) (*(__IO hw_ftfe_fccob5_t *) HW_FTFE_FCCOB5_ADDR(x))
#define HW_FTFE_FCCOB5_RD(x) (HW_FTFE_FCCOB5(x).U)
#define HW_FTFE_FCCOB5_WR(x, v) (HW_FTFE_FCCOB5(x).U = (v))
#define HW_FTFE_FCCOB5_RD(x) (ADDRESS_READ(hw_ftfe_fccob5_t, HW_FTFE_FCCOB5_ADDR(x)))
#define HW_FTFE_FCCOB5_WR(x, v) (ADDRESS_WRITE(hw_ftfe_fccob5_t, HW_FTFE_FCCOB5_ADDR(x), v))
#define HW_FTFE_FCCOB5_SET(x, v) (HW_FTFE_FCCOB5_WR(x, HW_FTFE_FCCOB5_RD(x) | (v)))
#define HW_FTFE_FCCOB5_CLR(x, v) (HW_FTFE_FCCOB5_WR(x, HW_FTFE_FCCOB5_RD(x) & ~(v)))
#define HW_FTFE_FCCOB5_TOG(x, v) (HW_FTFE_FCCOB5_WR(x, HW_FTFE_FCCOB5_RD(x) ^ (v)))
@ -1370,8 +1377,8 @@ typedef union _hw_ftfe_fccob4
#define HW_FTFE_FCCOB4_ADDR(x) ((x) + 0xBU)
#define HW_FTFE_FCCOB4(x) (*(__IO hw_ftfe_fccob4_t *) HW_FTFE_FCCOB4_ADDR(x))
#define HW_FTFE_FCCOB4_RD(x) (HW_FTFE_FCCOB4(x).U)
#define HW_FTFE_FCCOB4_WR(x, v) (HW_FTFE_FCCOB4(x).U = (v))
#define HW_FTFE_FCCOB4_RD(x) (ADDRESS_READ(hw_ftfe_fccob4_t, HW_FTFE_FCCOB4_ADDR(x)))
#define HW_FTFE_FCCOB4_WR(x, v) (ADDRESS_WRITE(hw_ftfe_fccob4_t, HW_FTFE_FCCOB4_ADDR(x), v))
#define HW_FTFE_FCCOB4_SET(x, v) (HW_FTFE_FCCOB4_WR(x, HW_FTFE_FCCOB4_RD(x) | (v)))
#define HW_FTFE_FCCOB4_CLR(x, v) (HW_FTFE_FCCOB4_WR(x, HW_FTFE_FCCOB4_RD(x) & ~(v)))
#define HW_FTFE_FCCOB4_TOG(x, v) (HW_FTFE_FCCOB4_WR(x, HW_FTFE_FCCOB4_RD(x) ^ (v)))
@ -1455,8 +1462,8 @@ typedef union _hw_ftfe_fccobb
#define HW_FTFE_FCCOBB_ADDR(x) ((x) + 0xCU)
#define HW_FTFE_FCCOBB(x) (*(__IO hw_ftfe_fccobb_t *) HW_FTFE_FCCOBB_ADDR(x))
#define HW_FTFE_FCCOBB_RD(x) (HW_FTFE_FCCOBB(x).U)
#define HW_FTFE_FCCOBB_WR(x, v) (HW_FTFE_FCCOBB(x).U = (v))
#define HW_FTFE_FCCOBB_RD(x) (ADDRESS_READ(hw_ftfe_fccobb_t, HW_FTFE_FCCOBB_ADDR(x)))
#define HW_FTFE_FCCOBB_WR(x, v) (ADDRESS_WRITE(hw_ftfe_fccobb_t, HW_FTFE_FCCOBB_ADDR(x), v))
#define HW_FTFE_FCCOBB_SET(x, v) (HW_FTFE_FCCOBB_WR(x, HW_FTFE_FCCOBB_RD(x) | (v)))
#define HW_FTFE_FCCOBB_CLR(x, v) (HW_FTFE_FCCOBB_WR(x, HW_FTFE_FCCOBB_RD(x) & ~(v)))
#define HW_FTFE_FCCOBB_TOG(x, v) (HW_FTFE_FCCOBB_WR(x, HW_FTFE_FCCOBB_RD(x) ^ (v)))
@ -1540,8 +1547,8 @@ typedef union _hw_ftfe_fccoba
#define HW_FTFE_FCCOBA_ADDR(x) ((x) + 0xDU)
#define HW_FTFE_FCCOBA(x) (*(__IO hw_ftfe_fccoba_t *) HW_FTFE_FCCOBA_ADDR(x))
#define HW_FTFE_FCCOBA_RD(x) (HW_FTFE_FCCOBA(x).U)
#define HW_FTFE_FCCOBA_WR(x, v) (HW_FTFE_FCCOBA(x).U = (v))
#define HW_FTFE_FCCOBA_RD(x) (ADDRESS_READ(hw_ftfe_fccoba_t, HW_FTFE_FCCOBA_ADDR(x)))
#define HW_FTFE_FCCOBA_WR(x, v) (ADDRESS_WRITE(hw_ftfe_fccoba_t, HW_FTFE_FCCOBA_ADDR(x), v))
#define HW_FTFE_FCCOBA_SET(x, v) (HW_FTFE_FCCOBA_WR(x, HW_FTFE_FCCOBA_RD(x) | (v)))
#define HW_FTFE_FCCOBA_CLR(x, v) (HW_FTFE_FCCOBA_WR(x, HW_FTFE_FCCOBA_RD(x) & ~(v)))
#define HW_FTFE_FCCOBA_TOG(x, v) (HW_FTFE_FCCOBA_WR(x, HW_FTFE_FCCOBA_RD(x) ^ (v)))
@ -1625,8 +1632,8 @@ typedef union _hw_ftfe_fccob9
#define HW_FTFE_FCCOB9_ADDR(x) ((x) + 0xEU)
#define HW_FTFE_FCCOB9(x) (*(__IO hw_ftfe_fccob9_t *) HW_FTFE_FCCOB9_ADDR(x))
#define HW_FTFE_FCCOB9_RD(x) (HW_FTFE_FCCOB9(x).U)
#define HW_FTFE_FCCOB9_WR(x, v) (HW_FTFE_FCCOB9(x).U = (v))
#define HW_FTFE_FCCOB9_RD(x) (ADDRESS_READ(hw_ftfe_fccob9_t, HW_FTFE_FCCOB9_ADDR(x)))
#define HW_FTFE_FCCOB9_WR(x, v) (ADDRESS_WRITE(hw_ftfe_fccob9_t, HW_FTFE_FCCOB9_ADDR(x), v))
#define HW_FTFE_FCCOB9_SET(x, v) (HW_FTFE_FCCOB9_WR(x, HW_FTFE_FCCOB9_RD(x) | (v)))
#define HW_FTFE_FCCOB9_CLR(x, v) (HW_FTFE_FCCOB9_WR(x, HW_FTFE_FCCOB9_RD(x) & ~(v)))
#define HW_FTFE_FCCOB9_TOG(x, v) (HW_FTFE_FCCOB9_WR(x, HW_FTFE_FCCOB9_RD(x) ^ (v)))
@ -1710,8 +1717,8 @@ typedef union _hw_ftfe_fccob8
#define HW_FTFE_FCCOB8_ADDR(x) ((x) + 0xFU)
#define HW_FTFE_FCCOB8(x) (*(__IO hw_ftfe_fccob8_t *) HW_FTFE_FCCOB8_ADDR(x))
#define HW_FTFE_FCCOB8_RD(x) (HW_FTFE_FCCOB8(x).U)
#define HW_FTFE_FCCOB8_WR(x, v) (HW_FTFE_FCCOB8(x).U = (v))
#define HW_FTFE_FCCOB8_RD(x) (ADDRESS_READ(hw_ftfe_fccob8_t, HW_FTFE_FCCOB8_ADDR(x)))
#define HW_FTFE_FCCOB8_WR(x, v) (ADDRESS_WRITE(hw_ftfe_fccob8_t, HW_FTFE_FCCOB8_ADDR(x), v))
#define HW_FTFE_FCCOB8_SET(x, v) (HW_FTFE_FCCOB8_WR(x, HW_FTFE_FCCOB8_RD(x) | (v)))
#define HW_FTFE_FCCOB8_CLR(x, v) (HW_FTFE_FCCOB8_WR(x, HW_FTFE_FCCOB8_RD(x) & ~(v)))
#define HW_FTFE_FCCOB8_TOG(x, v) (HW_FTFE_FCCOB8_WR(x, HW_FTFE_FCCOB8_RD(x) ^ (v)))
@ -1806,8 +1813,8 @@ typedef union _hw_ftfe_fprot3
#define HW_FTFE_FPROT3_ADDR(x) ((x) + 0x10U)
#define HW_FTFE_FPROT3(x) (*(__IO hw_ftfe_fprot3_t *) HW_FTFE_FPROT3_ADDR(x))
#define HW_FTFE_FPROT3_RD(x) (HW_FTFE_FPROT3(x).U)
#define HW_FTFE_FPROT3_WR(x, v) (HW_FTFE_FPROT3(x).U = (v))
#define HW_FTFE_FPROT3_RD(x) (ADDRESS_READ(hw_ftfe_fprot3_t, HW_FTFE_FPROT3_ADDR(x)))
#define HW_FTFE_FPROT3_WR(x, v) (ADDRESS_WRITE(hw_ftfe_fprot3_t, HW_FTFE_FPROT3_ADDR(x), v))
#define HW_FTFE_FPROT3_SET(x, v) (HW_FTFE_FPROT3_WR(x, HW_FTFE_FPROT3_RD(x) | (v)))
#define HW_FTFE_FPROT3_CLR(x, v) (HW_FTFE_FPROT3_WR(x, HW_FTFE_FPROT3_RD(x) & ~(v)))
#define HW_FTFE_FPROT3_TOG(x, v) (HW_FTFE_FPROT3_WR(x, HW_FTFE_FPROT3_RD(x) ^ (v)))
@ -1894,8 +1901,8 @@ typedef union _hw_ftfe_fprot2
#define HW_FTFE_FPROT2_ADDR(x) ((x) + 0x11U)
#define HW_FTFE_FPROT2(x) (*(__IO hw_ftfe_fprot2_t *) HW_FTFE_FPROT2_ADDR(x))
#define HW_FTFE_FPROT2_RD(x) (HW_FTFE_FPROT2(x).U)
#define HW_FTFE_FPROT2_WR(x, v) (HW_FTFE_FPROT2(x).U = (v))
#define HW_FTFE_FPROT2_RD(x) (ADDRESS_READ(hw_ftfe_fprot2_t, HW_FTFE_FPROT2_ADDR(x)))
#define HW_FTFE_FPROT2_WR(x, v) (ADDRESS_WRITE(hw_ftfe_fprot2_t, HW_FTFE_FPROT2_ADDR(x), v))
#define HW_FTFE_FPROT2_SET(x, v) (HW_FTFE_FPROT2_WR(x, HW_FTFE_FPROT2_RD(x) | (v)))
#define HW_FTFE_FPROT2_CLR(x, v) (HW_FTFE_FPROT2_WR(x, HW_FTFE_FPROT2_RD(x) & ~(v)))
#define HW_FTFE_FPROT2_TOG(x, v) (HW_FTFE_FPROT2_WR(x, HW_FTFE_FPROT2_RD(x) ^ (v)))
@ -1982,8 +1989,8 @@ typedef union _hw_ftfe_fprot1
#define HW_FTFE_FPROT1_ADDR(x) ((x) + 0x12U)
#define HW_FTFE_FPROT1(x) (*(__IO hw_ftfe_fprot1_t *) HW_FTFE_FPROT1_ADDR(x))
#define HW_FTFE_FPROT1_RD(x) (HW_FTFE_FPROT1(x).U)
#define HW_FTFE_FPROT1_WR(x, v) (HW_FTFE_FPROT1(x).U = (v))
#define HW_FTFE_FPROT1_RD(x) (ADDRESS_READ(hw_ftfe_fprot1_t, HW_FTFE_FPROT1_ADDR(x)))
#define HW_FTFE_FPROT1_WR(x, v) (ADDRESS_WRITE(hw_ftfe_fprot1_t, HW_FTFE_FPROT1_ADDR(x), v))
#define HW_FTFE_FPROT1_SET(x, v) (HW_FTFE_FPROT1_WR(x, HW_FTFE_FPROT1_RD(x) | (v)))
#define HW_FTFE_FPROT1_CLR(x, v) (HW_FTFE_FPROT1_WR(x, HW_FTFE_FPROT1_RD(x) & ~(v)))
#define HW_FTFE_FPROT1_TOG(x, v) (HW_FTFE_FPROT1_WR(x, HW_FTFE_FPROT1_RD(x) ^ (v)))
@ -2070,8 +2077,8 @@ typedef union _hw_ftfe_fprot0
#define HW_FTFE_FPROT0_ADDR(x) ((x) + 0x13U)
#define HW_FTFE_FPROT0(x) (*(__IO hw_ftfe_fprot0_t *) HW_FTFE_FPROT0_ADDR(x))
#define HW_FTFE_FPROT0_RD(x) (HW_FTFE_FPROT0(x).U)
#define HW_FTFE_FPROT0_WR(x, v) (HW_FTFE_FPROT0(x).U = (v))
#define HW_FTFE_FPROT0_RD(x) (ADDRESS_READ(hw_ftfe_fprot0_t, HW_FTFE_FPROT0_ADDR(x)))
#define HW_FTFE_FPROT0_WR(x, v) (ADDRESS_WRITE(hw_ftfe_fprot0_t, HW_FTFE_FPROT0_ADDR(x), v))
#define HW_FTFE_FPROT0_SET(x, v) (HW_FTFE_FPROT0_WR(x, HW_FTFE_FPROT0_RD(x) | (v)))
#define HW_FTFE_FPROT0_CLR(x, v) (HW_FTFE_FPROT0_WR(x, HW_FTFE_FPROT0_RD(x) & ~(v)))
#define HW_FTFE_FPROT0_TOG(x, v) (HW_FTFE_FPROT0_WR(x, HW_FTFE_FPROT0_RD(x) ^ (v)))
@ -2149,8 +2156,8 @@ typedef union _hw_ftfe_feprot
#define HW_FTFE_FEPROT_ADDR(x) ((x) + 0x16U)
#define HW_FTFE_FEPROT(x) (*(__IO hw_ftfe_feprot_t *) HW_FTFE_FEPROT_ADDR(x))
#define HW_FTFE_FEPROT_RD(x) (HW_FTFE_FEPROT(x).U)
#define HW_FTFE_FEPROT_WR(x, v) (HW_FTFE_FEPROT(x).U = (v))
#define HW_FTFE_FEPROT_RD(x) (ADDRESS_READ(hw_ftfe_feprot_t, HW_FTFE_FEPROT_ADDR(x)))
#define HW_FTFE_FEPROT_WR(x, v) (ADDRESS_WRITE(hw_ftfe_feprot_t, HW_FTFE_FEPROT_ADDR(x), v))
#define HW_FTFE_FEPROT_SET(x, v) (HW_FTFE_FEPROT_WR(x, HW_FTFE_FEPROT_RD(x) | (v)))
#define HW_FTFE_FEPROT_CLR(x, v) (HW_FTFE_FEPROT_WR(x, HW_FTFE_FEPROT_RD(x) & ~(v)))
#define HW_FTFE_FEPROT_TOG(x, v) (HW_FTFE_FEPROT_WR(x, HW_FTFE_FEPROT_RD(x) ^ (v)))
@ -2239,8 +2246,8 @@ typedef union _hw_ftfe_fdprot
#define HW_FTFE_FDPROT_ADDR(x) ((x) + 0x17U)
#define HW_FTFE_FDPROT(x) (*(__IO hw_ftfe_fdprot_t *) HW_FTFE_FDPROT_ADDR(x))
#define HW_FTFE_FDPROT_RD(x) (HW_FTFE_FDPROT(x).U)
#define HW_FTFE_FDPROT_WR(x, v) (HW_FTFE_FDPROT(x).U = (v))
#define HW_FTFE_FDPROT_RD(x) (ADDRESS_READ(hw_ftfe_fdprot_t, HW_FTFE_FDPROT_ADDR(x)))
#define HW_FTFE_FDPROT_WR(x, v) (ADDRESS_WRITE(hw_ftfe_fdprot_t, HW_FTFE_FDPROT_ADDR(x), v))
#define HW_FTFE_FDPROT_SET(x, v) (HW_FTFE_FDPROT_WR(x, HW_FTFE_FDPROT_RD(x) | (v)))
#define HW_FTFE_FDPROT_CLR(x, v) (HW_FTFE_FDPROT_WR(x, HW_FTFE_FDPROT_RD(x) & ~(v)))
#define HW_FTFE_FDPROT_TOG(x, v) (HW_FTFE_FDPROT_WR(x, HW_FTFE_FDPROT_RD(x) ^ (v)))

793
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_ftm.h
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File diff suppressed because it is too large Load Diff

29
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_gpio.h
View File

@ -15,6 +15,9 @@
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** (C) COPYRIGHT 2015-2015 ARM Limited
** ALL RIGHTS RESERVED
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
@ -68,6 +71,10 @@
** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
** Update of SystemInit() and SystemCoreClockUpdate() functions.
** Module access macro module_BASES replaced by module_BASE_PTRS.
** - rev. 2.6 (2015-08-03) (ARM)
** All accesses to memory are replaced by equivalent macros; this allows
** memory read/write operations to be re-defined if needed (for example,
** to implement new security features
**
** ###################################################################
*/
@ -136,8 +143,8 @@ typedef union _hw_gpio_pdor
#define HW_GPIO_PDOR_ADDR(x) ((x) + 0x0U)
#define HW_GPIO_PDOR(x) (*(__IO hw_gpio_pdor_t *) HW_GPIO_PDOR_ADDR(x))
#define HW_GPIO_PDOR_RD(x) (HW_GPIO_PDOR(x).U)
#define HW_GPIO_PDOR_WR(x, v) (HW_GPIO_PDOR(x).U = (v))
#define HW_GPIO_PDOR_RD(x) (ADDRESS_READ(hw_gpio_pdor_t, HW_GPIO_PDOR_ADDR(x)))
#define HW_GPIO_PDOR_WR(x, v) (ADDRESS_WRITE(hw_gpio_pdor_t, HW_GPIO_PDOR_ADDR(x), v))
#define HW_GPIO_PDOR_SET(x, v) (HW_GPIO_PDOR_WR(x, HW_GPIO_PDOR_RD(x) | (v)))
#define HW_GPIO_PDOR_CLR(x, v) (HW_GPIO_PDOR_WR(x, HW_GPIO_PDOR_RD(x) & ~(v)))
#define HW_GPIO_PDOR_TOG(x, v) (HW_GPIO_PDOR_WR(x, HW_GPIO_PDOR_RD(x) ^ (v)))
@ -200,8 +207,8 @@ typedef union _hw_gpio_psor
#define HW_GPIO_PSOR_ADDR(x) ((x) + 0x4U)
#define HW_GPIO_PSOR(x) (*(__O hw_gpio_psor_t *) HW_GPIO_PSOR_ADDR(x))
#define HW_GPIO_PSOR_RD(x) (HW_GPIO_PSOR(x).U)
#define HW_GPIO_PSOR_WR(x, v) (HW_GPIO_PSOR(x).U = (v))
#define HW_GPIO_PSOR_RD(x) (ADDRESS_READ(hw_gpio_psor_t, HW_GPIO_PSOR_ADDR(x)))
#define HW_GPIO_PSOR_WR(x, v) (ADDRESS_WRITE(hw_gpio_psor_t, HW_GPIO_PSOR_ADDR(x), v))
/*@}*/
/*
@ -257,8 +264,8 @@ typedef union _hw_gpio_pcor
#define HW_GPIO_PCOR_ADDR(x) ((x) + 0x8U)
#define HW_GPIO_PCOR(x) (*(__O hw_gpio_pcor_t *) HW_GPIO_PCOR_ADDR(x))
#define HW_GPIO_PCOR_RD(x) (HW_GPIO_PCOR(x).U)
#define HW_GPIO_PCOR_WR(x, v) (HW_GPIO_PCOR(x).U = (v))
#define HW_GPIO_PCOR_RD(x) (ADDRESS_READ(hw_gpio_pcor_t, HW_GPIO_PCOR_ADDR(x)))
#define HW_GPIO_PCOR_WR(x, v) (ADDRESS_WRITE(hw_gpio_pcor_t, HW_GPIO_PCOR_ADDR(x), v))
/*@}*/
/*
@ -312,8 +319,8 @@ typedef union _hw_gpio_ptor
#define HW_GPIO_PTOR_ADDR(x) ((x) + 0xCU)
#define HW_GPIO_PTOR(x) (*(__O hw_gpio_ptor_t *) HW_GPIO_PTOR_ADDR(x))
#define HW_GPIO_PTOR_RD(x) (HW_GPIO_PTOR(x).U)
#define HW_GPIO_PTOR_WR(x, v) (HW_GPIO_PTOR(x).U = (v))
#define HW_GPIO_PTOR_RD(x) (ADDRESS_READ(hw_gpio_ptor_t, HW_GPIO_PTOR_ADDR(x)))
#define HW_GPIO_PTOR_WR(x, v) (ADDRESS_WRITE(hw_gpio_ptor_t, HW_GPIO_PTOR_ADDR(x), v))
/*@}*/
/*
@ -372,7 +379,7 @@ typedef union _hw_gpio_pdir
#define HW_GPIO_PDIR_ADDR(x) ((x) + 0x10U)
#define HW_GPIO_PDIR(x) (*(__I hw_gpio_pdir_t *) HW_GPIO_PDIR_ADDR(x))
#define HW_GPIO_PDIR_RD(x) (HW_GPIO_PDIR(x).U)
#define HW_GPIO_PDIR_RD(x) (ADDRESS_READ(hw_gpio_pdir_t, HW_GPIO_PDIR_ADDR(x)))
/*@}*/
/*
@ -427,8 +434,8 @@ typedef union _hw_gpio_pddr
#define HW_GPIO_PDDR_ADDR(x) ((x) + 0x14U)
#define HW_GPIO_PDDR(x) (*(__IO hw_gpio_pddr_t *) HW_GPIO_PDDR_ADDR(x))
#define HW_GPIO_PDDR_RD(x) (HW_GPIO_PDDR(x).U)
#define HW_GPIO_PDDR_WR(x, v) (HW_GPIO_PDDR(x).U = (v))
#define HW_GPIO_PDDR_RD(x) (ADDRESS_READ(hw_gpio_pddr_t, HW_GPIO_PDDR_ADDR(x)))
#define HW_GPIO_PDDR_WR(x, v) (ADDRESS_WRITE(hw_gpio_pddr_t, HW_GPIO_PDDR_ADDR(x), v))
#define HW_GPIO_PDDR_SET(x, v) (HW_GPIO_PDDR_WR(x, HW_GPIO_PDDR_RD(x) | (v)))
#define HW_GPIO_PDDR_CLR(x, v) (HW_GPIO_PDDR_WR(x, HW_GPIO_PDDR_RD(x) & ~(v)))
#define HW_GPIO_PDDR_TOG(x, v) (HW_GPIO_PDDR_WR(x, HW_GPIO_PDDR_RD(x) ^ (v)))

189
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_i2c.h
View File

@ -15,6 +15,9 @@
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** (C) COPYRIGHT 2015-2015 ARM Limited
** ALL RIGHTS RESERVED
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
@ -68,6 +71,10 @@
** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
** Update of SystemInit() and SystemCoreClockUpdate() functions.
** Module access macro module_BASES replaced by module_BASE_PTRS.
** - rev. 2.6 (2015-08-03) (ARM)
** All accesses to memory are replaced by equivalent macros; this allows
** memory read/write operations to be re-defined if needed (for example,
** to implement new security features
**
** ###################################################################
*/
@ -138,8 +145,8 @@ typedef union _hw_i2c_a1
#define HW_I2C_A1_ADDR(x) ((x) + 0x0U)
#define HW_I2C_A1(x) (*(__IO hw_i2c_a1_t *) HW_I2C_A1_ADDR(x))
#define HW_I2C_A1_RD(x) (HW_I2C_A1(x).U)
#define HW_I2C_A1_WR(x, v) (HW_I2C_A1(x).U = (v))
#define HW_I2C_A1_RD(x) (ADDRESS_READ(hw_i2c_a1_t, HW_I2C_A1_ADDR(x)))
#define HW_I2C_A1_WR(x, v) (ADDRESS_WRITE(hw_i2c_a1_t, HW_I2C_A1_ADDR(x), v))
#define HW_I2C_A1_SET(x, v) (HW_I2C_A1_WR(x, HW_I2C_A1_RD(x) | (v)))
#define HW_I2C_A1_CLR(x, v) (HW_I2C_A1_WR(x, HW_I2C_A1_RD(x) & ~(v)))
#define HW_I2C_A1_TOG(x, v) (HW_I2C_A1_WR(x, HW_I2C_A1_RD(x) ^ (v)))
@ -162,7 +169,7 @@ typedef union _hw_i2c_a1
#define BS_I2C_A1_AD (7U) /*!< Bit field size in bits for I2C_A1_AD. */
/*! @brief Read current value of the I2C_A1_AD field. */
#define BR_I2C_A1_AD(x) (HW_I2C_A1(x).B.AD)
#define BR_I2C_A1_AD(x) (UNION_READ(hw_i2c_a1_t, HW_I2C_A1_ADDR(x), U, B.AD))
/*! @brief Format value for bitfield I2C_A1_AD. */
#define BF_I2C_A1_AD(v) ((uint8_t)((uint8_t)(v) << BP_I2C_A1_AD) & BM_I2C_A1_AD)
@ -197,8 +204,8 @@ typedef union _hw_i2c_f
#define HW_I2C_F_ADDR(x) ((x) + 0x1U)
#define HW_I2C_F(x) (*(__IO hw_i2c_f_t *) HW_I2C_F_ADDR(x))
#define HW_I2C_F_RD(x) (HW_I2C_F(x).U)
#define HW_I2C_F_WR(x, v) (HW_I2C_F(x).U = (v))
#define HW_I2C_F_RD(x) (ADDRESS_READ(hw_i2c_f_t, HW_I2C_F_ADDR(x)))
#define HW_I2C_F_WR(x, v) (ADDRESS_WRITE(hw_i2c_f_t, HW_I2C_F_ADDR(x), v))
#define HW_I2C_F_SET(x, v) (HW_I2C_F_WR(x, HW_I2C_F_RD(x) | (v)))
#define HW_I2C_F_CLR(x, v) (HW_I2C_F_WR(x, HW_I2C_F_RD(x) & ~(v)))
#define HW_I2C_F_TOG(x, v) (HW_I2C_F_WR(x, HW_I2C_F_RD(x) ^ (v)))
@ -237,7 +244,7 @@ typedef union _hw_i2c_f
#define BS_I2C_F_ICR (6U) /*!< Bit field size in bits for I2C_F_ICR. */
/*! @brief Read current value of the I2C_F_ICR field. */
#define BR_I2C_F_ICR(x) (HW_I2C_F(x).B.ICR)
#define BR_I2C_F_ICR(x) (UNION_READ(hw_i2c_f_t, HW_I2C_F_ADDR(x), U, B.ICR))
/*! @brief Format value for bitfield I2C_F_ICR. */
#define BF_I2C_F_ICR(v) ((uint8_t)((uint8_t)(v) << BP_I2C_F_ICR) & BM_I2C_F_ICR)
@ -264,7 +271,7 @@ typedef union _hw_i2c_f
#define BS_I2C_F_MULT (2U) /*!< Bit field size in bits for I2C_F_MULT. */
/*! @brief Read current value of the I2C_F_MULT field. */
#define BR_I2C_F_MULT(x) (HW_I2C_F(x).B.MULT)
#define BR_I2C_F_MULT(x) (UNION_READ(hw_i2c_f_t, HW_I2C_F_ADDR(x), U, B.MULT))
/*! @brief Format value for bitfield I2C_F_MULT. */
#define BF_I2C_F_MULT(v) ((uint8_t)((uint8_t)(v) << BP_I2C_F_MULT) & BM_I2C_F_MULT)
@ -305,8 +312,8 @@ typedef union _hw_i2c_c1
#define HW_I2C_C1_ADDR(x) ((x) + 0x2U)
#define HW_I2C_C1(x) (*(__IO hw_i2c_c1_t *) HW_I2C_C1_ADDR(x))
#define HW_I2C_C1_RD(x) (HW_I2C_C1(x).U)
#define HW_I2C_C1_WR(x, v) (HW_I2C_C1(x).U = (v))
#define HW_I2C_C1_RD(x) (ADDRESS_READ(hw_i2c_c1_t, HW_I2C_C1_ADDR(x)))
#define HW_I2C_C1_WR(x, v) (ADDRESS_WRITE(hw_i2c_c1_t, HW_I2C_C1_ADDR(x), v))
#define HW_I2C_C1_SET(x, v) (HW_I2C_C1_WR(x, HW_I2C_C1_RD(x) | (v)))
#define HW_I2C_C1_CLR(x, v) (HW_I2C_C1_WR(x, HW_I2C_C1_RD(x) & ~(v)))
#define HW_I2C_C1_TOG(x, v) (HW_I2C_C1_WR(x, HW_I2C_C1_RD(x) ^ (v)))
@ -340,13 +347,13 @@ typedef union _hw_i2c_c1
#define BS_I2C_C1_DMAEN (1U) /*!< Bit field size in bits for I2C_C1_DMAEN. */
/*! @brief Read current value of the I2C_C1_DMAEN field. */
#define BR_I2C_C1_DMAEN(x) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_DMAEN))
#define BR_I2C_C1_DMAEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_DMAEN)))
/*! @brief Format value for bitfield I2C_C1_DMAEN. */
#define BF_I2C_C1_DMAEN(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C1_DMAEN) & BM_I2C_C1_DMAEN)
/*! @brief Set the DMAEN field to a new value. */
#define BW_I2C_C1_DMAEN(x, v) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_DMAEN) = (v))
#define BW_I2C_C1_DMAEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_DMAEN), v))
/*@}*/
/*!
@ -366,13 +373,13 @@ typedef union _hw_i2c_c1
#define BS_I2C_C1_WUEN (1U) /*!< Bit field size in bits for I2C_C1_WUEN. */
/*! @brief Read current value of the I2C_C1_WUEN field. */
#define BR_I2C_C1_WUEN(x) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_WUEN))
#define BR_I2C_C1_WUEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_WUEN)))
/*! @brief Format value for bitfield I2C_C1_WUEN. */
#define BF_I2C_C1_WUEN(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C1_WUEN) & BM_I2C_C1_WUEN)
/*! @brief Set the WUEN field to a new value. */
#define BW_I2C_C1_WUEN(x, v) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_WUEN) = (v))
#define BW_I2C_C1_WUEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_WUEN), v))
/*@}*/
/*!
@ -391,7 +398,7 @@ typedef union _hw_i2c_c1
#define BF_I2C_C1_RSTA(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C1_RSTA) & BM_I2C_C1_RSTA)
/*! @brief Set the RSTA field to a new value. */
#define BW_I2C_C1_RSTA(x, v) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_RSTA) = (v))
#define BW_I2C_C1_RSTA(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_RSTA), v))
/*@}*/
/*!
@ -414,13 +421,13 @@ typedef union _hw_i2c_c1
#define BS_I2C_C1_TXAK (1U) /*!< Bit field size in bits for I2C_C1_TXAK. */
/*! @brief Read current value of the I2C_C1_TXAK field. */
#define BR_I2C_C1_TXAK(x) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_TXAK))
#define BR_I2C_C1_TXAK(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_TXAK)))
/*! @brief Format value for bitfield I2C_C1_TXAK. */
#define BF_I2C_C1_TXAK(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C1_TXAK) & BM_I2C_C1_TXAK)
/*! @brief Set the TXAK field to a new value. */
#define BW_I2C_C1_TXAK(x, v) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_TXAK) = (v))
#define BW_I2C_C1_TXAK(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_TXAK), v))
/*@}*/
/*!
@ -441,13 +448,13 @@ typedef union _hw_i2c_c1
#define BS_I2C_C1_TX (1U) /*!< Bit field size in bits for I2C_C1_TX. */
/*! @brief Read current value of the I2C_C1_TX field. */
#define BR_I2C_C1_TX(x) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_TX))
#define BR_I2C_C1_TX(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_TX)))
/*! @brief Format value for bitfield I2C_C1_TX. */
#define BF_I2C_C1_TX(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C1_TX) & BM_I2C_C1_TX)
/*! @brief Set the TX field to a new value. */
#define BW_I2C_C1_TX(x, v) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_TX) = (v))
#define BW_I2C_C1_TX(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_TX), v))
/*@}*/
/*!
@ -467,13 +474,13 @@ typedef union _hw_i2c_c1
#define BS_I2C_C1_MST (1U) /*!< Bit field size in bits for I2C_C1_MST. */
/*! @brief Read current value of the I2C_C1_MST field. */
#define BR_I2C_C1_MST(x) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_MST))
#define BR_I2C_C1_MST(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_MST)))
/*! @brief Format value for bitfield I2C_C1_MST. */
#define BF_I2C_C1_MST(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C1_MST) & BM_I2C_C1_MST)
/*! @brief Set the MST field to a new value. */
#define BW_I2C_C1_MST(x, v) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_MST) = (v))
#define BW_I2C_C1_MST(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_MST), v))
/*@}*/
/*!
@ -491,13 +498,13 @@ typedef union _hw_i2c_c1
#define BS_I2C_C1_IICIE (1U) /*!< Bit field size in bits for I2C_C1_IICIE. */
/*! @brief Read current value of the I2C_C1_IICIE field. */
#define BR_I2C_C1_IICIE(x) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_IICIE))
#define BR_I2C_C1_IICIE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_IICIE)))
/*! @brief Format value for bitfield I2C_C1_IICIE. */
#define BF_I2C_C1_IICIE(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C1_IICIE) & BM_I2C_C1_IICIE)
/*! @brief Set the IICIE field to a new value. */
#define BW_I2C_C1_IICIE(x, v) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_IICIE) = (v))
#define BW_I2C_C1_IICIE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_IICIE), v))
/*@}*/
/*!
@ -515,13 +522,13 @@ typedef union _hw_i2c_c1
#define BS_I2C_C1_IICEN (1U) /*!< Bit field size in bits for I2C_C1_IICEN. */
/*! @brief Read current value of the I2C_C1_IICEN field. */
#define BR_I2C_C1_IICEN(x) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_IICEN))
#define BR_I2C_C1_IICEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_IICEN)))
/*! @brief Format value for bitfield I2C_C1_IICEN. */
#define BF_I2C_C1_IICEN(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C1_IICEN) & BM_I2C_C1_IICEN)
/*! @brief Set the IICEN field to a new value. */
#define BW_I2C_C1_IICEN(x, v) (BITBAND_ACCESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_IICEN) = (v))
#define BW_I2C_C1_IICEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_C1_ADDR(x), BP_I2C_C1_IICEN), v))
/*@}*/
/*******************************************************************************
@ -556,8 +563,8 @@ typedef union _hw_i2c_s
#define HW_I2C_S_ADDR(x) ((x) + 0x3U)
#define HW_I2C_S(x) (*(__IO hw_i2c_s_t *) HW_I2C_S_ADDR(x))
#define HW_I2C_S_RD(x) (HW_I2C_S(x).U)
#define HW_I2C_S_WR(x, v) (HW_I2C_S(x).U = (v))
#define HW_I2C_S_RD(x) (ADDRESS_READ(hw_i2c_s_t, HW_I2C_S_ADDR(x)))
#define HW_I2C_S_WR(x, v) (ADDRESS_WRITE(hw_i2c_s_t, HW_I2C_S_ADDR(x), v))
#define HW_I2C_S_SET(x, v) (HW_I2C_S_WR(x, HW_I2C_S_RD(x) | (v)))
#define HW_I2C_S_CLR(x, v) (HW_I2C_S_WR(x, HW_I2C_S_RD(x) & ~(v)))
#define HW_I2C_S_TOG(x, v) (HW_I2C_S_WR(x, HW_I2C_S_RD(x) ^ (v)))
@ -581,7 +588,7 @@ typedef union _hw_i2c_s
#define BS_I2C_S_RXAK (1U) /*!< Bit field size in bits for I2C_S_RXAK. */
/*! @brief Read current value of the I2C_S_RXAK field. */
#define BR_I2C_S_RXAK(x) (BITBAND_ACCESS8(HW_I2C_S_ADDR(x), BP_I2C_S_RXAK))
#define BR_I2C_S_RXAK(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_S_ADDR(x), BP_I2C_S_RXAK)))
/*@}*/
/*!
@ -612,13 +619,13 @@ typedef union _hw_i2c_s
#define BS_I2C_S_IICIF (1U) /*!< Bit field size in bits for I2C_S_IICIF. */
/*! @brief Read current value of the I2C_S_IICIF field. */
#define BR_I2C_S_IICIF(x) (BITBAND_ACCESS8(HW_I2C_S_ADDR(x), BP_I2C_S_IICIF))
#define BR_I2C_S_IICIF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_S_ADDR(x), BP_I2C_S_IICIF)))
/*! @brief Format value for bitfield I2C_S_IICIF. */
#define BF_I2C_S_IICIF(v) ((uint8_t)((uint8_t)(v) << BP_I2C_S_IICIF) & BM_I2C_S_IICIF)
/*! @brief Set the IICIF field to a new value. */
#define BW_I2C_S_IICIF(x, v) (BITBAND_ACCESS8(HW_I2C_S_ADDR(x), BP_I2C_S_IICIF) = (v))
#define BW_I2C_S_IICIF(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_S_ADDR(x), BP_I2C_S_IICIF), v))
/*@}*/
/*!
@ -637,7 +644,7 @@ typedef union _hw_i2c_s
#define BS_I2C_S_SRW (1U) /*!< Bit field size in bits for I2C_S_SRW. */
/*! @brief Read current value of the I2C_S_SRW field. */
#define BR_I2C_S_SRW(x) (BITBAND_ACCESS8(HW_I2C_S_ADDR(x), BP_I2C_S_SRW))
#define BR_I2C_S_SRW(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_S_ADDR(x), BP_I2C_S_SRW)))
/*@}*/
/*!
@ -659,13 +666,13 @@ typedef union _hw_i2c_s
#define BS_I2C_S_RAM (1U) /*!< Bit field size in bits for I2C_S_RAM. */
/*! @brief Read current value of the I2C_S_RAM field. */
#define BR_I2C_S_RAM(x) (BITBAND_ACCESS8(HW_I2C_S_ADDR(x), BP_I2C_S_RAM))
#define BR_I2C_S_RAM(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_S_ADDR(x), BP_I2C_S_RAM)))
/*! @brief Format value for bitfield I2C_S_RAM. */
#define BF_I2C_S_RAM(v) ((uint8_t)((uint8_t)(v) << BP_I2C_S_RAM) & BM_I2C_S_RAM)
/*! @brief Set the RAM field to a new value. */
#define BW_I2C_S_RAM(x, v) (BITBAND_ACCESS8(HW_I2C_S_ADDR(x), BP_I2C_S_RAM) = (v))
#define BW_I2C_S_RAM(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_S_ADDR(x), BP_I2C_S_RAM), v))
/*@}*/
/*!
@ -684,13 +691,13 @@ typedef union _hw_i2c_s
#define BS_I2C_S_ARBL (1U) /*!< Bit field size in bits for I2C_S_ARBL. */
/*! @brief Read current value of the I2C_S_ARBL field. */
#define BR_I2C_S_ARBL(x) (BITBAND_ACCESS8(HW_I2C_S_ADDR(x), BP_I2C_S_ARBL))
#define BR_I2C_S_ARBL(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_S_ADDR(x), BP_I2C_S_ARBL)))
/*! @brief Format value for bitfield I2C_S_ARBL. */
#define BF_I2C_S_ARBL(v) ((uint8_t)((uint8_t)(v) << BP_I2C_S_ARBL) & BM_I2C_S_ARBL)
/*! @brief Set the ARBL field to a new value. */
#define BW_I2C_S_ARBL(x, v) (BITBAND_ACCESS8(HW_I2C_S_ADDR(x), BP_I2C_S_ARBL) = (v))
#define BW_I2C_S_ARBL(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_S_ADDR(x), BP_I2C_S_ARBL), v))
/*@}*/
/*!
@ -710,7 +717,7 @@ typedef union _hw_i2c_s
#define BS_I2C_S_BUSY (1U) /*!< Bit field size in bits for I2C_S_BUSY. */
/*! @brief Read current value of the I2C_S_BUSY field. */
#define BR_I2C_S_BUSY(x) (BITBAND_ACCESS8(HW_I2C_S_ADDR(x), BP_I2C_S_BUSY))
#define BR_I2C_S_BUSY(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_S_ADDR(x), BP_I2C_S_BUSY)))
/*@}*/
/*!
@ -737,13 +744,13 @@ typedef union _hw_i2c_s
#define BS_I2C_S_IAAS (1U) /*!< Bit field size in bits for I2C_S_IAAS. */
/*! @brief Read current value of the I2C_S_IAAS field. */
#define BR_I2C_S_IAAS(x) (BITBAND_ACCESS8(HW_I2C_S_ADDR(x), BP_I2C_S_IAAS))
#define BR_I2C_S_IAAS(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_S_ADDR(x), BP_I2C_S_IAAS)))
/*! @brief Format value for bitfield I2C_S_IAAS. */
#define BF_I2C_S_IAAS(v) ((uint8_t)((uint8_t)(v) << BP_I2C_S_IAAS) & BM_I2C_S_IAAS)
/*! @brief Set the IAAS field to a new value. */
#define BW_I2C_S_IAAS(x, v) (BITBAND_ACCESS8(HW_I2C_S_ADDR(x), BP_I2C_S_IAAS) = (v))
#define BW_I2C_S_IAAS(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_S_ADDR(x), BP_I2C_S_IAAS), v))
/*@}*/
/*!
@ -764,7 +771,7 @@ typedef union _hw_i2c_s
#define BS_I2C_S_TCF (1U) /*!< Bit field size in bits for I2C_S_TCF. */
/*! @brief Read current value of the I2C_S_TCF field. */
#define BR_I2C_S_TCF(x) (BITBAND_ACCESS8(HW_I2C_S_ADDR(x), BP_I2C_S_TCF))
#define BR_I2C_S_TCF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_S_ADDR(x), BP_I2C_S_TCF)))
/*@}*/
/*******************************************************************************
@ -792,8 +799,8 @@ typedef union _hw_i2c_d
#define HW_I2C_D_ADDR(x) ((x) + 0x4U)
#define HW_I2C_D(x) (*(__IO hw_i2c_d_t *) HW_I2C_D_ADDR(x))
#define HW_I2C_D_RD(x) (HW_I2C_D(x).U)
#define HW_I2C_D_WR(x, v) (HW_I2C_D(x).U = (v))
#define HW_I2C_D_RD(x) (ADDRESS_READ(hw_i2c_d_t, HW_I2C_D_ADDR(x)))
#define HW_I2C_D_WR(x, v) (ADDRESS_WRITE(hw_i2c_d_t, HW_I2C_D_ADDR(x), v))
#define HW_I2C_D_SET(x, v) (HW_I2C_D_WR(x, HW_I2C_D_RD(x) | (v)))
#define HW_I2C_D_CLR(x, v) (HW_I2C_D_WR(x, HW_I2C_D_RD(x) & ~(v)))
#define HW_I2C_D_TOG(x, v) (HW_I2C_D_WR(x, HW_I2C_D_RD(x) ^ (v)))
@ -870,8 +877,8 @@ typedef union _hw_i2c_c2
#define HW_I2C_C2_ADDR(x) ((x) + 0x5U)
#define HW_I2C_C2(x) (*(__IO hw_i2c_c2_t *) HW_I2C_C2_ADDR(x))
#define HW_I2C_C2_RD(x) (HW_I2C_C2(x).U)
#define HW_I2C_C2_WR(x, v) (HW_I2C_C2(x).U = (v))
#define HW_I2C_C2_RD(x) (ADDRESS_READ(hw_i2c_c2_t, HW_I2C_C2_ADDR(x)))
#define HW_I2C_C2_WR(x, v) (ADDRESS_WRITE(hw_i2c_c2_t, HW_I2C_C2_ADDR(x), v))
#define HW_I2C_C2_SET(x, v) (HW_I2C_C2_WR(x, HW_I2C_C2_RD(x) | (v)))
#define HW_I2C_C2_CLR(x, v) (HW_I2C_C2_WR(x, HW_I2C_C2_RD(x) & ~(v)))
#define HW_I2C_C2_TOG(x, v) (HW_I2C_C2_WR(x, HW_I2C_C2_RD(x) ^ (v)))
@ -893,7 +900,7 @@ typedef union _hw_i2c_c2
#define BS_I2C_C2_AD (3U) /*!< Bit field size in bits for I2C_C2_AD. */
/*! @brief Read current value of the I2C_C2_AD field. */
#define BR_I2C_C2_AD(x) (HW_I2C_C2(x).B.AD)
#define BR_I2C_C2_AD(x) (UNION_READ(hw_i2c_c2_t, HW_I2C_C2_ADDR(x), U, B.AD))
/*! @brief Format value for bitfield I2C_C2_AD. */
#define BF_I2C_C2_AD(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C2_AD) & BM_I2C_C2_AD)
@ -922,13 +929,13 @@ typedef union _hw_i2c_c2
#define BS_I2C_C2_RMEN (1U) /*!< Bit field size in bits for I2C_C2_RMEN. */
/*! @brief Read current value of the I2C_C2_RMEN field. */
#define BR_I2C_C2_RMEN(x) (BITBAND_ACCESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_RMEN))
#define BR_I2C_C2_RMEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_RMEN)))
/*! @brief Format value for bitfield I2C_C2_RMEN. */
#define BF_I2C_C2_RMEN(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C2_RMEN) & BM_I2C_C2_RMEN)
/*! @brief Set the RMEN field to a new value. */
#define BW_I2C_C2_RMEN(x, v) (BITBAND_ACCESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_RMEN) = (v))
#define BW_I2C_C2_RMEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_RMEN), v))
/*@}*/
/*!
@ -950,13 +957,13 @@ typedef union _hw_i2c_c2
#define BS_I2C_C2_SBRC (1U) /*!< Bit field size in bits for I2C_C2_SBRC. */
/*! @brief Read current value of the I2C_C2_SBRC field. */
#define BR_I2C_C2_SBRC(x) (BITBAND_ACCESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_SBRC))
#define BR_I2C_C2_SBRC(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_SBRC)))
/*! @brief Format value for bitfield I2C_C2_SBRC. */
#define BF_I2C_C2_SBRC(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C2_SBRC) & BM_I2C_C2_SBRC)
/*! @brief Set the SBRC field to a new value. */
#define BW_I2C_C2_SBRC(x, v) (BITBAND_ACCESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_SBRC) = (v))
#define BW_I2C_C2_SBRC(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_SBRC), v))
/*@}*/
/*!
@ -974,13 +981,13 @@ typedef union _hw_i2c_c2
#define BS_I2C_C2_HDRS (1U) /*!< Bit field size in bits for I2C_C2_HDRS. */
/*! @brief Read current value of the I2C_C2_HDRS field. */
#define BR_I2C_C2_HDRS(x) (BITBAND_ACCESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_HDRS))
#define BR_I2C_C2_HDRS(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_HDRS)))
/*! @brief Format value for bitfield I2C_C2_HDRS. */
#define BF_I2C_C2_HDRS(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C2_HDRS) & BM_I2C_C2_HDRS)
/*! @brief Set the HDRS field to a new value. */
#define BW_I2C_C2_HDRS(x, v) (BITBAND_ACCESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_HDRS) = (v))
#define BW_I2C_C2_HDRS(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_HDRS), v))
/*@}*/
/*!
@ -998,13 +1005,13 @@ typedef union _hw_i2c_c2
#define BS_I2C_C2_ADEXT (1U) /*!< Bit field size in bits for I2C_C2_ADEXT. */
/*! @brief Read current value of the I2C_C2_ADEXT field. */
#define BR_I2C_C2_ADEXT(x) (BITBAND_ACCESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_ADEXT))
#define BR_I2C_C2_ADEXT(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_ADEXT)))
/*! @brief Format value for bitfield I2C_C2_ADEXT. */
#define BF_I2C_C2_ADEXT(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C2_ADEXT) & BM_I2C_C2_ADEXT)
/*! @brief Set the ADEXT field to a new value. */
#define BW_I2C_C2_ADEXT(x, v) (BITBAND_ACCESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_ADEXT) = (v))
#define BW_I2C_C2_ADEXT(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_ADEXT), v))
/*@}*/
/*!
@ -1022,13 +1029,13 @@ typedef union _hw_i2c_c2
#define BS_I2C_C2_GCAEN (1U) /*!< Bit field size in bits for I2C_C2_GCAEN. */
/*! @brief Read current value of the I2C_C2_GCAEN field. */
#define BR_I2C_C2_GCAEN(x) (BITBAND_ACCESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_GCAEN))
#define BR_I2C_C2_GCAEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_GCAEN)))
/*! @brief Format value for bitfield I2C_C2_GCAEN. */
#define BF_I2C_C2_GCAEN(v) ((uint8_t)((uint8_t)(v) << BP_I2C_C2_GCAEN) & BM_I2C_C2_GCAEN)
/*! @brief Set the GCAEN field to a new value. */
#define BW_I2C_C2_GCAEN(x, v) (BITBAND_ACCESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_GCAEN) = (v))
#define BW_I2C_C2_GCAEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_C2_ADDR(x), BP_I2C_C2_GCAEN), v))
/*@}*/
/*******************************************************************************
@ -1060,8 +1067,8 @@ typedef union _hw_i2c_flt
#define HW_I2C_FLT_ADDR(x) ((x) + 0x6U)
#define HW_I2C_FLT(x) (*(__IO hw_i2c_flt_t *) HW_I2C_FLT_ADDR(x))
#define HW_I2C_FLT_RD(x) (HW_I2C_FLT(x).U)
#define HW_I2C_FLT_WR(x, v) (HW_I2C_FLT(x).U = (v))
#define HW_I2C_FLT_RD(x) (ADDRESS_READ(hw_i2c_flt_t, HW_I2C_FLT_ADDR(x)))
#define HW_I2C_FLT_WR(x, v) (ADDRESS_WRITE(hw_i2c_flt_t, HW_I2C_FLT_ADDR(x), v))
#define HW_I2C_FLT_SET(x, v) (HW_I2C_FLT_WR(x, HW_I2C_FLT_RD(x) | (v)))
#define HW_I2C_FLT_CLR(x, v) (HW_I2C_FLT_WR(x, HW_I2C_FLT_RD(x) & ~(v)))
#define HW_I2C_FLT_TOG(x, v) (HW_I2C_FLT_WR(x, HW_I2C_FLT_RD(x) ^ (v)))
@ -1087,7 +1094,7 @@ typedef union _hw_i2c_flt
#define BS_I2C_FLT_FLT (4U) /*!< Bit field size in bits for I2C_FLT_FLT. */
/*! @brief Read current value of the I2C_FLT_FLT field. */
#define BR_I2C_FLT_FLT(x) (HW_I2C_FLT(x).B.FLT)
#define BR_I2C_FLT_FLT(x) (UNION_READ(hw_i2c_flt_t, HW_I2C_FLT_ADDR(x), U, B.FLT))
/*! @brief Format value for bitfield I2C_FLT_FLT. */
#define BF_I2C_FLT_FLT(v) ((uint8_t)((uint8_t)(v) << BP_I2C_FLT_FLT) & BM_I2C_FLT_FLT)
@ -1112,13 +1119,13 @@ typedef union _hw_i2c_flt
#define BS_I2C_FLT_STARTF (1U) /*!< Bit field size in bits for I2C_FLT_STARTF. */
/*! @brief Read current value of the I2C_FLT_STARTF field. */
#define BR_I2C_FLT_STARTF(x) (BITBAND_ACCESS8(HW_I2C_FLT_ADDR(x), BP_I2C_FLT_STARTF))
#define BR_I2C_FLT_STARTF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_FLT_ADDR(x), BP_I2C_FLT_STARTF)))
/*! @brief Format value for bitfield I2C_FLT_STARTF. */
#define BF_I2C_FLT_STARTF(v) ((uint8_t)((uint8_t)(v) << BP_I2C_FLT_STARTF) & BM_I2C_FLT_STARTF)
/*! @brief Set the STARTF field to a new value. */
#define BW_I2C_FLT_STARTF(x, v) (BITBAND_ACCESS8(HW_I2C_FLT_ADDR(x), BP_I2C_FLT_STARTF) = (v))
#define BW_I2C_FLT_STARTF(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_FLT_ADDR(x), BP_I2C_FLT_STARTF), v))
/*@}*/
/*!
@ -1140,13 +1147,13 @@ typedef union _hw_i2c_flt
#define BS_I2C_FLT_SSIE (1U) /*!< Bit field size in bits for I2C_FLT_SSIE. */
/*! @brief Read current value of the I2C_FLT_SSIE field. */
#define BR_I2C_FLT_SSIE(x) (BITBAND_ACCESS8(HW_I2C_FLT_ADDR(x), BP_I2C_FLT_SSIE))
#define BR_I2C_FLT_SSIE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_FLT_ADDR(x), BP_I2C_FLT_SSIE)))
/*! @brief Format value for bitfield I2C_FLT_SSIE. */
#define BF_I2C_FLT_SSIE(v) ((uint8_t)((uint8_t)(v) << BP_I2C_FLT_SSIE) & BM_I2C_FLT_SSIE)
/*! @brief Set the SSIE field to a new value. */
#define BW_I2C_FLT_SSIE(x, v) (BITBAND_ACCESS8(HW_I2C_FLT_ADDR(x), BP_I2C_FLT_SSIE) = (v))
#define BW_I2C_FLT_SSIE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_FLT_ADDR(x), BP_I2C_FLT_SSIE), v))
/*@}*/
/*!
@ -1165,13 +1172,13 @@ typedef union _hw_i2c_flt
#define BS_I2C_FLT_STOPF (1U) /*!< Bit field size in bits for I2C_FLT_STOPF. */
/*! @brief Read current value of the I2C_FLT_STOPF field. */
#define BR_I2C_FLT_STOPF(x) (BITBAND_ACCESS8(HW_I2C_FLT_ADDR(x), BP_I2C_FLT_STOPF))
#define BR_I2C_FLT_STOPF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_FLT_ADDR(x), BP_I2C_FLT_STOPF)))
/*! @brief Format value for bitfield I2C_FLT_STOPF. */
#define BF_I2C_FLT_STOPF(v) ((uint8_t)((uint8_t)(v) << BP_I2C_FLT_STOPF) & BM_I2C_FLT_STOPF)
/*! @brief Set the STOPF field to a new value. */
#define BW_I2C_FLT_STOPF(x, v) (BITBAND_ACCESS8(HW_I2C_FLT_ADDR(x), BP_I2C_FLT_STOPF) = (v))
#define BW_I2C_FLT_STOPF(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_FLT_ADDR(x), BP_I2C_FLT_STOPF), v))
/*@}*/
/*!
@ -1206,13 +1213,13 @@ typedef union _hw_i2c_flt
#define BS_I2C_FLT_SHEN (1U) /*!< Bit field size in bits for I2C_FLT_SHEN. */
/*! @brief Read current value of the I2C_FLT_SHEN field. */
#define BR_I2C_FLT_SHEN(x) (BITBAND_ACCESS8(HW_I2C_FLT_ADDR(x), BP_I2C_FLT_SHEN))
#define BR_I2C_FLT_SHEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_FLT_ADDR(x), BP_I2C_FLT_SHEN)))
/*! @brief Format value for bitfield I2C_FLT_SHEN. */
#define BF_I2C_FLT_SHEN(v) ((uint8_t)((uint8_t)(v) << BP_I2C_FLT_SHEN) & BM_I2C_FLT_SHEN)
/*! @brief Set the SHEN field to a new value. */
#define BW_I2C_FLT_SHEN(x, v) (BITBAND_ACCESS8(HW_I2C_FLT_ADDR(x), BP_I2C_FLT_SHEN) = (v))
#define BW_I2C_FLT_SHEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_FLT_ADDR(x), BP_I2C_FLT_SHEN), v))
/*@}*/
/*******************************************************************************
@ -1241,8 +1248,8 @@ typedef union _hw_i2c_ra
#define HW_I2C_RA_ADDR(x) ((x) + 0x7U)
#define HW_I2C_RA(x) (*(__IO hw_i2c_ra_t *) HW_I2C_RA_ADDR(x))
#define HW_I2C_RA_RD(x) (HW_I2C_RA(x).U)
#define HW_I2C_RA_WR(x, v) (HW_I2C_RA(x).U = (v))
#define HW_I2C_RA_RD(x) (ADDRESS_READ(hw_i2c_ra_t, HW_I2C_RA_ADDR(x)))
#define HW_I2C_RA_WR(x, v) (ADDRESS_WRITE(hw_i2c_ra_t, HW_I2C_RA_ADDR(x), v))
#define HW_I2C_RA_SET(x, v) (HW_I2C_RA_WR(x, HW_I2C_RA_RD(x) | (v)))
#define HW_I2C_RA_CLR(x, v) (HW_I2C_RA_WR(x, HW_I2C_RA_RD(x) & ~(v)))
#define HW_I2C_RA_TOG(x, v) (HW_I2C_RA_WR(x, HW_I2C_RA_RD(x) ^ (v)))
@ -1266,7 +1273,7 @@ typedef union _hw_i2c_ra
#define BS_I2C_RA_RAD (7U) /*!< Bit field size in bits for I2C_RA_RAD. */
/*! @brief Read current value of the I2C_RA_RAD field. */
#define BR_I2C_RA_RAD(x) (HW_I2C_RA(x).B.RAD)
#define BR_I2C_RA_RAD(x) (UNION_READ(hw_i2c_ra_t, HW_I2C_RA_ADDR(x), U, B.RAD))
/*! @brief Format value for bitfield I2C_RA_RAD. */
#define BF_I2C_RA_RAD(v) ((uint8_t)((uint8_t)(v) << BP_I2C_RA_RAD) & BM_I2C_RA_RAD)
@ -1315,8 +1322,8 @@ typedef union _hw_i2c_smb
#define HW_I2C_SMB_ADDR(x) ((x) + 0x8U)
#define HW_I2C_SMB(x) (*(__IO hw_i2c_smb_t *) HW_I2C_SMB_ADDR(x))
#define HW_I2C_SMB_RD(x) (HW_I2C_SMB(x).U)
#define HW_I2C_SMB_WR(x, v) (HW_I2C_SMB(x).U = (v))
#define HW_I2C_SMB_RD(x) (ADDRESS_READ(hw_i2c_smb_t, HW_I2C_SMB_ADDR(x)))
#define HW_I2C_SMB_WR(x, v) (ADDRESS_WRITE(hw_i2c_smb_t, HW_I2C_SMB_ADDR(x), v))
#define HW_I2C_SMB_SET(x, v) (HW_I2C_SMB_WR(x, HW_I2C_SMB_RD(x) | (v)))
#define HW_I2C_SMB_CLR(x, v) (HW_I2C_SMB_WR(x, HW_I2C_SMB_RD(x) & ~(v)))
#define HW_I2C_SMB_TOG(x, v) (HW_I2C_SMB_WR(x, HW_I2C_SMB_RD(x) ^ (v)))
@ -1341,13 +1348,13 @@ typedef union _hw_i2c_smb
#define BS_I2C_SMB_SHTF2IE (1U) /*!< Bit field size in bits for I2C_SMB_SHTF2IE. */
/*! @brief Read current value of the I2C_SMB_SHTF2IE field. */
#define BR_I2C_SMB_SHTF2IE(x) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SHTF2IE))
#define BR_I2C_SMB_SHTF2IE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SHTF2IE)))
/*! @brief Format value for bitfield I2C_SMB_SHTF2IE. */
#define BF_I2C_SMB_SHTF2IE(v) ((uint8_t)((uint8_t)(v) << BP_I2C_SMB_SHTF2IE) & BM_I2C_SMB_SHTF2IE)
/*! @brief Set the SHTF2IE field to a new value. */
#define BW_I2C_SMB_SHTF2IE(x, v) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SHTF2IE) = (v))
#define BW_I2C_SMB_SHTF2IE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SHTF2IE), v))
/*@}*/
/*!
@ -1366,13 +1373,13 @@ typedef union _hw_i2c_smb
#define BS_I2C_SMB_SHTF2 (1U) /*!< Bit field size in bits for I2C_SMB_SHTF2. */
/*! @brief Read current value of the I2C_SMB_SHTF2 field. */
#define BR_I2C_SMB_SHTF2(x) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SHTF2))
#define BR_I2C_SMB_SHTF2(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SHTF2)))
/*! @brief Format value for bitfield I2C_SMB_SHTF2. */
#define BF_I2C_SMB_SHTF2(v) ((uint8_t)((uint8_t)(v) << BP_I2C_SMB_SHTF2) & BM_I2C_SMB_SHTF2)
/*! @brief Set the SHTF2 field to a new value. */
#define BW_I2C_SMB_SHTF2(x, v) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SHTF2) = (v))
#define BW_I2C_SMB_SHTF2(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SHTF2), v))
/*@}*/
/*!
@ -1391,7 +1398,7 @@ typedef union _hw_i2c_smb
#define BS_I2C_SMB_SHTF1 (1U) /*!< Bit field size in bits for I2C_SMB_SHTF1. */
/*! @brief Read current value of the I2C_SMB_SHTF1 field. */
#define BR_I2C_SMB_SHTF1(x) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SHTF1))
#define BR_I2C_SMB_SHTF1(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SHTF1)))
/*@}*/
/*!
@ -1412,13 +1419,13 @@ typedef union _hw_i2c_smb
#define BS_I2C_SMB_SLTF (1U) /*!< Bit field size in bits for I2C_SMB_SLTF. */
/*! @brief Read current value of the I2C_SMB_SLTF field. */
#define BR_I2C_SMB_SLTF(x) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SLTF))
#define BR_I2C_SMB_SLTF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SLTF)))
/*! @brief Format value for bitfield I2C_SMB_SLTF. */
#define BF_I2C_SMB_SLTF(v) ((uint8_t)((uint8_t)(v) << BP_I2C_SMB_SLTF) & BM_I2C_SMB_SLTF)
/*! @brief Set the SLTF field to a new value. */
#define BW_I2C_SMB_SLTF(x, v) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SLTF) = (v))
#define BW_I2C_SMB_SLTF(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SLTF), v))
/*@}*/
/*!
@ -1436,13 +1443,13 @@ typedef union _hw_i2c_smb
#define BS_I2C_SMB_TCKSEL (1U) /*!< Bit field size in bits for I2C_SMB_TCKSEL. */
/*! @brief Read current value of the I2C_SMB_TCKSEL field. */
#define BR_I2C_SMB_TCKSEL(x) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_TCKSEL))
#define BR_I2C_SMB_TCKSEL(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_TCKSEL)))
/*! @brief Format value for bitfield I2C_SMB_TCKSEL. */
#define BF_I2C_SMB_TCKSEL(v) ((uint8_t)((uint8_t)(v) << BP_I2C_SMB_TCKSEL) & BM_I2C_SMB_TCKSEL)
/*! @brief Set the TCKSEL field to a new value. */
#define BW_I2C_SMB_TCKSEL(x, v) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_TCKSEL) = (v))
#define BW_I2C_SMB_TCKSEL(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_TCKSEL), v))
/*@}*/
/*!
@ -1460,13 +1467,13 @@ typedef union _hw_i2c_smb
#define BS_I2C_SMB_SIICAEN (1U) /*!< Bit field size in bits for I2C_SMB_SIICAEN. */
/*! @brief Read current value of the I2C_SMB_SIICAEN field. */
#define BR_I2C_SMB_SIICAEN(x) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SIICAEN))
#define BR_I2C_SMB_SIICAEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SIICAEN)))
/*! @brief Format value for bitfield I2C_SMB_SIICAEN. */
#define BF_I2C_SMB_SIICAEN(v) ((uint8_t)((uint8_t)(v) << BP_I2C_SMB_SIICAEN) & BM_I2C_SMB_SIICAEN)
/*! @brief Set the SIICAEN field to a new value. */
#define BW_I2C_SMB_SIICAEN(x, v) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SIICAEN) = (v))
#define BW_I2C_SMB_SIICAEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_SIICAEN), v))
/*@}*/
/*!
@ -1487,13 +1494,13 @@ typedef union _hw_i2c_smb
#define BS_I2C_SMB_ALERTEN (1U) /*!< Bit field size in bits for I2C_SMB_ALERTEN. */
/*! @brief Read current value of the I2C_SMB_ALERTEN field. */
#define BR_I2C_SMB_ALERTEN(x) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_ALERTEN))
#define BR_I2C_SMB_ALERTEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_ALERTEN)))
/*! @brief Format value for bitfield I2C_SMB_ALERTEN. */
#define BF_I2C_SMB_ALERTEN(v) ((uint8_t)((uint8_t)(v) << BP_I2C_SMB_ALERTEN) & BM_I2C_SMB_ALERTEN)
/*! @brief Set the ALERTEN field to a new value. */
#define BW_I2C_SMB_ALERTEN(x, v) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_ALERTEN) = (v))
#define BW_I2C_SMB_ALERTEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_ALERTEN), v))
/*@}*/
/*!
@ -1513,13 +1520,13 @@ typedef union _hw_i2c_smb
#define BS_I2C_SMB_FACK (1U) /*!< Bit field size in bits for I2C_SMB_FACK. */
/*! @brief Read current value of the I2C_SMB_FACK field. */
#define BR_I2C_SMB_FACK(x) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_FACK))
#define BR_I2C_SMB_FACK(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_FACK)))
/*! @brief Format value for bitfield I2C_SMB_FACK. */
#define BF_I2C_SMB_FACK(v) ((uint8_t)((uint8_t)(v) << BP_I2C_SMB_FACK) & BM_I2C_SMB_FACK)
/*! @brief Set the FACK field to a new value. */
#define BW_I2C_SMB_FACK(x, v) (BITBAND_ACCESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_FACK) = (v))
#define BW_I2C_SMB_FACK(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_I2C_SMB_ADDR(x), BP_I2C_SMB_FACK), v))
/*@}*/
/*******************************************************************************
@ -1548,8 +1555,8 @@ typedef union _hw_i2c_a2
#define HW_I2C_A2_ADDR(x) ((x) + 0x9U)
#define HW_I2C_A2(x) (*(__IO hw_i2c_a2_t *) HW_I2C_A2_ADDR(x))
#define HW_I2C_A2_RD(x) (HW_I2C_A2(x).U)
#define HW_I2C_A2_WR(x, v) (HW_I2C_A2(x).U = (v))
#define HW_I2C_A2_RD(x) (ADDRESS_READ(hw_i2c_a2_t, HW_I2C_A2_ADDR(x)))
#define HW_I2C_A2_WR(x, v) (ADDRESS_WRITE(hw_i2c_a2_t, HW_I2C_A2_ADDR(x), v))
#define HW_I2C_A2_SET(x, v) (HW_I2C_A2_WR(x, HW_I2C_A2_RD(x) | (v)))
#define HW_I2C_A2_CLR(x, v) (HW_I2C_A2_WR(x, HW_I2C_A2_RD(x) & ~(v)))
#define HW_I2C_A2_TOG(x, v) (HW_I2C_A2_WR(x, HW_I2C_A2_RD(x) ^ (v)))
@ -1571,7 +1578,7 @@ typedef union _hw_i2c_a2
#define BS_I2C_A2_SAD (7U) /*!< Bit field size in bits for I2C_A2_SAD. */
/*! @brief Read current value of the I2C_A2_SAD field. */
#define BR_I2C_A2_SAD(x) (HW_I2C_A2(x).B.SAD)
#define BR_I2C_A2_SAD(x) (UNION_READ(hw_i2c_a2_t, HW_I2C_A2_ADDR(x), U, B.SAD))
/*! @brief Format value for bitfield I2C_A2_SAD. */
#define BF_I2C_A2_SAD(v) ((uint8_t)((uint8_t)(v) << BP_I2C_A2_SAD) & BM_I2C_A2_SAD)
@ -1605,8 +1612,8 @@ typedef union _hw_i2c_slth
#define HW_I2C_SLTH_ADDR(x) ((x) + 0xAU)
#define HW_I2C_SLTH(x) (*(__IO hw_i2c_slth_t *) HW_I2C_SLTH_ADDR(x))
#define HW_I2C_SLTH_RD(x) (HW_I2C_SLTH(x).U)
#define HW_I2C_SLTH_WR(x, v) (HW_I2C_SLTH(x).U = (v))
#define HW_I2C_SLTH_RD(x) (ADDRESS_READ(hw_i2c_slth_t, HW_I2C_SLTH_ADDR(x)))
#define HW_I2C_SLTH_WR(x, v) (ADDRESS_WRITE(hw_i2c_slth_t, HW_I2C_SLTH_ADDR(x), v))
#define HW_I2C_SLTH_SET(x, v) (HW_I2C_SLTH_WR(x, HW_I2C_SLTH_RD(x) | (v)))
#define HW_I2C_SLTH_CLR(x, v) (HW_I2C_SLTH_WR(x, HW_I2C_SLTH_RD(x) & ~(v)))
#define HW_I2C_SLTH_TOG(x, v) (HW_I2C_SLTH_WR(x, HW_I2C_SLTH_RD(x) ^ (v)))
@ -1662,8 +1669,8 @@ typedef union _hw_i2c_sltl
#define HW_I2C_SLTL_ADDR(x) ((x) + 0xBU)
#define HW_I2C_SLTL(x) (*(__IO hw_i2c_sltl_t *) HW_I2C_SLTL_ADDR(x))
#define HW_I2C_SLTL_RD(x) (HW_I2C_SLTL(x).U)
#define HW_I2C_SLTL_WR(x, v) (HW_I2C_SLTL(x).U = (v))
#define HW_I2C_SLTL_RD(x) (ADDRESS_READ(hw_i2c_sltl_t, HW_I2C_SLTL_ADDR(x)))
#define HW_I2C_SLTL_WR(x, v) (ADDRESS_WRITE(hw_i2c_sltl_t, HW_I2C_SLTL_ADDR(x), v))
#define HW_I2C_SLTL_SET(x, v) (HW_I2C_SLTL_WR(x, HW_I2C_SLTL_RD(x) | (v)))
#define HW_I2C_SLTL_CLR(x, v) (HW_I2C_SLTL_WR(x, HW_I2C_SLTL_RD(x) & ~(v)))
#define HW_I2C_SLTL_TOG(x, v) (HW_I2C_SLTL_WR(x, HW_I2C_SLTL_RD(x) ^ (v)))

341
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_i2s.h
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217
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_llwu.h
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@ -15,6 +15,9 @@
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** (C) COPYRIGHT 2015-2015 ARM Limited
** ALL RIGHTS RESERVED
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
@ -68,6 +71,10 @@
** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
** Update of SystemInit() and SystemCoreClockUpdate() functions.
** Module access macro module_BASES replaced by module_BASE_PTRS.
** - rev. 2.6 (2015-08-03) (ARM)
** All accesses to memory are replaced by equivalent macros; this allows
** memory read/write operations to be re-defined if needed (for example,
** to implement new security features
**
** ###################################################################
*/
@ -142,8 +149,8 @@ typedef union _hw_llwu_pe1
#define HW_LLWU_PE1_ADDR(x) ((x) + 0x0U)
#define HW_LLWU_PE1(x) (*(__IO hw_llwu_pe1_t *) HW_LLWU_PE1_ADDR(x))
#define HW_LLWU_PE1_RD(x) (HW_LLWU_PE1(x).U)
#define HW_LLWU_PE1_WR(x, v) (HW_LLWU_PE1(x).U = (v))
#define HW_LLWU_PE1_RD(x) (ADDRESS_READ(hw_llwu_pe1_t, HW_LLWU_PE1_ADDR(x)))
#define HW_LLWU_PE1_WR(x, v) (ADDRESS_WRITE(hw_llwu_pe1_t, HW_LLWU_PE1_ADDR(x), v))
#define HW_LLWU_PE1_SET(x, v) (HW_LLWU_PE1_WR(x, HW_LLWU_PE1_RD(x) | (v)))
#define HW_LLWU_PE1_CLR(x, v) (HW_LLWU_PE1_WR(x, HW_LLWU_PE1_RD(x) & ~(v)))
#define HW_LLWU_PE1_TOG(x, v) (HW_LLWU_PE1_WR(x, HW_LLWU_PE1_RD(x) ^ (v)))
@ -170,7 +177,7 @@ typedef union _hw_llwu_pe1
#define BS_LLWU_PE1_WUPE0 (2U) /*!< Bit field size in bits for LLWU_PE1_WUPE0. */
/*! @brief Read current value of the LLWU_PE1_WUPE0 field. */
#define BR_LLWU_PE1_WUPE0(x) (HW_LLWU_PE1(x).B.WUPE0)
#define BR_LLWU_PE1_WUPE0(x) (UNION_READ(hw_llwu_pe1_t, HW_LLWU_PE1_ADDR(x), U, B.WUPE0))
/*! @brief Format value for bitfield LLWU_PE1_WUPE0. */
#define BF_LLWU_PE1_WUPE0(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_PE1_WUPE0) & BM_LLWU_PE1_WUPE0)
@ -196,7 +203,7 @@ typedef union _hw_llwu_pe1
#define BS_LLWU_PE1_WUPE1 (2U) /*!< Bit field size in bits for LLWU_PE1_WUPE1. */
/*! @brief Read current value of the LLWU_PE1_WUPE1 field. */
#define BR_LLWU_PE1_WUPE1(x) (HW_LLWU_PE1(x).B.WUPE1)
#define BR_LLWU_PE1_WUPE1(x) (UNION_READ(hw_llwu_pe1_t, HW_LLWU_PE1_ADDR(x), U, B.WUPE1))
/*! @brief Format value for bitfield LLWU_PE1_WUPE1. */
#define BF_LLWU_PE1_WUPE1(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_PE1_WUPE1) & BM_LLWU_PE1_WUPE1)
@ -222,7 +229,7 @@ typedef union _hw_llwu_pe1
#define BS_LLWU_PE1_WUPE2 (2U) /*!< Bit field size in bits for LLWU_PE1_WUPE2. */
/*! @brief Read current value of the LLWU_PE1_WUPE2 field. */
#define BR_LLWU_PE1_WUPE2(x) (HW_LLWU_PE1(x).B.WUPE2)
#define BR_LLWU_PE1_WUPE2(x) (UNION_READ(hw_llwu_pe1_t, HW_LLWU_PE1_ADDR(x), U, B.WUPE2))
/*! @brief Format value for bitfield LLWU_PE1_WUPE2. */
#define BF_LLWU_PE1_WUPE2(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_PE1_WUPE2) & BM_LLWU_PE1_WUPE2)
@ -248,7 +255,7 @@ typedef union _hw_llwu_pe1
#define BS_LLWU_PE1_WUPE3 (2U) /*!< Bit field size in bits for LLWU_PE1_WUPE3. */
/*! @brief Read current value of the LLWU_PE1_WUPE3 field. */
#define BR_LLWU_PE1_WUPE3(x) (HW_LLWU_PE1(x).B.WUPE3)
#define BR_LLWU_PE1_WUPE3(x) (UNION_READ(hw_llwu_pe1_t, HW_LLWU_PE1_ADDR(x), U, B.WUPE3))
/*! @brief Format value for bitfield LLWU_PE1_WUPE3. */
#define BF_LLWU_PE1_WUPE3(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_PE1_WUPE3) & BM_LLWU_PE1_WUPE3)
@ -293,8 +300,8 @@ typedef union _hw_llwu_pe2
#define HW_LLWU_PE2_ADDR(x) ((x) + 0x1U)
#define HW_LLWU_PE2(x) (*(__IO hw_llwu_pe2_t *) HW_LLWU_PE2_ADDR(x))
#define HW_LLWU_PE2_RD(x) (HW_LLWU_PE2(x).U)
#define HW_LLWU_PE2_WR(x, v) (HW_LLWU_PE2(x).U = (v))
#define HW_LLWU_PE2_RD(x) (ADDRESS_READ(hw_llwu_pe2_t, HW_LLWU_PE2_ADDR(x)))
#define HW_LLWU_PE2_WR(x, v) (ADDRESS_WRITE(hw_llwu_pe2_t, HW_LLWU_PE2_ADDR(x), v))
#define HW_LLWU_PE2_SET(x, v) (HW_LLWU_PE2_WR(x, HW_LLWU_PE2_RD(x) | (v)))
#define HW_LLWU_PE2_CLR(x, v) (HW_LLWU_PE2_WR(x, HW_LLWU_PE2_RD(x) & ~(v)))
#define HW_LLWU_PE2_TOG(x, v) (HW_LLWU_PE2_WR(x, HW_LLWU_PE2_RD(x) ^ (v)))
@ -321,7 +328,7 @@ typedef union _hw_llwu_pe2
#define BS_LLWU_PE2_WUPE4 (2U) /*!< Bit field size in bits for LLWU_PE2_WUPE4. */
/*! @brief Read current value of the LLWU_PE2_WUPE4 field. */
#define BR_LLWU_PE2_WUPE4(x) (HW_LLWU_PE2(x).B.WUPE4)
#define BR_LLWU_PE2_WUPE4(x) (UNION_READ(hw_llwu_pe2_t, HW_LLWU_PE2_ADDR(x), U, B.WUPE4))
/*! @brief Format value for bitfield LLWU_PE2_WUPE4. */
#define BF_LLWU_PE2_WUPE4(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_PE2_WUPE4) & BM_LLWU_PE2_WUPE4)
@ -347,7 +354,7 @@ typedef union _hw_llwu_pe2
#define BS_LLWU_PE2_WUPE5 (2U) /*!< Bit field size in bits for LLWU_PE2_WUPE5. */
/*! @brief Read current value of the LLWU_PE2_WUPE5 field. */
#define BR_LLWU_PE2_WUPE5(x) (HW_LLWU_PE2(x).B.WUPE5)
#define BR_LLWU_PE2_WUPE5(x) (UNION_READ(hw_llwu_pe2_t, HW_LLWU_PE2_ADDR(x), U, B.WUPE5))
/*! @brief Format value for bitfield LLWU_PE2_WUPE5. */
#define BF_LLWU_PE2_WUPE5(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_PE2_WUPE5) & BM_LLWU_PE2_WUPE5)
@ -373,7 +380,7 @@ typedef union _hw_llwu_pe2
#define BS_LLWU_PE2_WUPE6 (2U) /*!< Bit field size in bits for LLWU_PE2_WUPE6. */
/*! @brief Read current value of the LLWU_PE2_WUPE6 field. */
#define BR_LLWU_PE2_WUPE6(x) (HW_LLWU_PE2(x).B.WUPE6)
#define BR_LLWU_PE2_WUPE6(x) (UNION_READ(hw_llwu_pe2_t, HW_LLWU_PE2_ADDR(x), U, B.WUPE6))
/*! @brief Format value for bitfield LLWU_PE2_WUPE6. */
#define BF_LLWU_PE2_WUPE6(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_PE2_WUPE6) & BM_LLWU_PE2_WUPE6)
@ -399,7 +406,7 @@ typedef union _hw_llwu_pe2
#define BS_LLWU_PE2_WUPE7 (2U) /*!< Bit field size in bits for LLWU_PE2_WUPE7. */
/*! @brief Read current value of the LLWU_PE2_WUPE7 field. */
#define BR_LLWU_PE2_WUPE7(x) (HW_LLWU_PE2(x).B.WUPE7)
#define BR_LLWU_PE2_WUPE7(x) (UNION_READ(hw_llwu_pe2_t, HW_LLWU_PE2_ADDR(x), U, B.WUPE7))
/*! @brief Format value for bitfield LLWU_PE2_WUPE7. */
#define BF_LLWU_PE2_WUPE7(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_PE2_WUPE7) & BM_LLWU_PE2_WUPE7)
@ -444,8 +451,8 @@ typedef union _hw_llwu_pe3
#define HW_LLWU_PE3_ADDR(x) ((x) + 0x2U)
#define HW_LLWU_PE3(x) (*(__IO hw_llwu_pe3_t *) HW_LLWU_PE3_ADDR(x))
#define HW_LLWU_PE3_RD(x) (HW_LLWU_PE3(x).U)
#define HW_LLWU_PE3_WR(x, v) (HW_LLWU_PE3(x).U = (v))
#define HW_LLWU_PE3_RD(x) (ADDRESS_READ(hw_llwu_pe3_t, HW_LLWU_PE3_ADDR(x)))
#define HW_LLWU_PE3_WR(x, v) (ADDRESS_WRITE(hw_llwu_pe3_t, HW_LLWU_PE3_ADDR(x), v))
#define HW_LLWU_PE3_SET(x, v) (HW_LLWU_PE3_WR(x, HW_LLWU_PE3_RD(x) | (v)))
#define HW_LLWU_PE3_CLR(x, v) (HW_LLWU_PE3_WR(x, HW_LLWU_PE3_RD(x) & ~(v)))
#define HW_LLWU_PE3_TOG(x, v) (HW_LLWU_PE3_WR(x, HW_LLWU_PE3_RD(x) ^ (v)))
@ -472,7 +479,7 @@ typedef union _hw_llwu_pe3
#define BS_LLWU_PE3_WUPE8 (2U) /*!< Bit field size in bits for LLWU_PE3_WUPE8. */
/*! @brief Read current value of the LLWU_PE3_WUPE8 field. */
#define BR_LLWU_PE3_WUPE8(x) (HW_LLWU_PE3(x).B.WUPE8)
#define BR_LLWU_PE3_WUPE8(x) (UNION_READ(hw_llwu_pe3_t, HW_LLWU_PE3_ADDR(x), U, B.WUPE8))
/*! @brief Format value for bitfield LLWU_PE3_WUPE8. */
#define BF_LLWU_PE3_WUPE8(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_PE3_WUPE8) & BM_LLWU_PE3_WUPE8)
@ -498,7 +505,7 @@ typedef union _hw_llwu_pe3
#define BS_LLWU_PE3_WUPE9 (2U) /*!< Bit field size in bits for LLWU_PE3_WUPE9. */
/*! @brief Read current value of the LLWU_PE3_WUPE9 field. */
#define BR_LLWU_PE3_WUPE9(x) (HW_LLWU_PE3(x).B.WUPE9)
#define BR_LLWU_PE3_WUPE9(x) (UNION_READ(hw_llwu_pe3_t, HW_LLWU_PE3_ADDR(x), U, B.WUPE9))
/*! @brief Format value for bitfield LLWU_PE3_WUPE9. */
#define BF_LLWU_PE3_WUPE9(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_PE3_WUPE9) & BM_LLWU_PE3_WUPE9)
@ -524,7 +531,7 @@ typedef union _hw_llwu_pe3
#define BS_LLWU_PE3_WUPE10 (2U) /*!< Bit field size in bits for LLWU_PE3_WUPE10. */
/*! @brief Read current value of the LLWU_PE3_WUPE10 field. */
#define BR_LLWU_PE3_WUPE10(x) (HW_LLWU_PE3(x).B.WUPE10)
#define BR_LLWU_PE3_WUPE10(x) (UNION_READ(hw_llwu_pe3_t, HW_LLWU_PE3_ADDR(x), U, B.WUPE10))
/*! @brief Format value for bitfield LLWU_PE3_WUPE10. */
#define BF_LLWU_PE3_WUPE10(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_PE3_WUPE10) & BM_LLWU_PE3_WUPE10)
@ -550,7 +557,7 @@ typedef union _hw_llwu_pe3
#define BS_LLWU_PE3_WUPE11 (2U) /*!< Bit field size in bits for LLWU_PE3_WUPE11. */
/*! @brief Read current value of the LLWU_PE3_WUPE11 field. */
#define BR_LLWU_PE3_WUPE11(x) (HW_LLWU_PE3(x).B.WUPE11)
#define BR_LLWU_PE3_WUPE11(x) (UNION_READ(hw_llwu_pe3_t, HW_LLWU_PE3_ADDR(x), U, B.WUPE11))
/*! @brief Format value for bitfield LLWU_PE3_WUPE11. */
#define BF_LLWU_PE3_WUPE11(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_PE3_WUPE11) & BM_LLWU_PE3_WUPE11)
@ -595,8 +602,8 @@ typedef union _hw_llwu_pe4
#define HW_LLWU_PE4_ADDR(x) ((x) + 0x3U)
#define HW_LLWU_PE4(x) (*(__IO hw_llwu_pe4_t *) HW_LLWU_PE4_ADDR(x))
#define HW_LLWU_PE4_RD(x) (HW_LLWU_PE4(x).U)
#define HW_LLWU_PE4_WR(x, v) (HW_LLWU_PE4(x).U = (v))
#define HW_LLWU_PE4_RD(x) (ADDRESS_READ(hw_llwu_pe4_t, HW_LLWU_PE4_ADDR(x)))
#define HW_LLWU_PE4_WR(x, v) (ADDRESS_WRITE(hw_llwu_pe4_t, HW_LLWU_PE4_ADDR(x), v))
#define HW_LLWU_PE4_SET(x, v) (HW_LLWU_PE4_WR(x, HW_LLWU_PE4_RD(x) | (v)))
#define HW_LLWU_PE4_CLR(x, v) (HW_LLWU_PE4_WR(x, HW_LLWU_PE4_RD(x) & ~(v)))
#define HW_LLWU_PE4_TOG(x, v) (HW_LLWU_PE4_WR(x, HW_LLWU_PE4_RD(x) ^ (v)))
@ -623,7 +630,7 @@ typedef union _hw_llwu_pe4
#define BS_LLWU_PE4_WUPE12 (2U) /*!< Bit field size in bits for LLWU_PE4_WUPE12. */
/*! @brief Read current value of the LLWU_PE4_WUPE12 field. */
#define BR_LLWU_PE4_WUPE12(x) (HW_LLWU_PE4(x).B.WUPE12)
#define BR_LLWU_PE4_WUPE12(x) (UNION_READ(hw_llwu_pe4_t, HW_LLWU_PE4_ADDR(x), U, B.WUPE12))
/*! @brief Format value for bitfield LLWU_PE4_WUPE12. */
#define BF_LLWU_PE4_WUPE12(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_PE4_WUPE12) & BM_LLWU_PE4_WUPE12)
@ -649,7 +656,7 @@ typedef union _hw_llwu_pe4
#define BS_LLWU_PE4_WUPE13 (2U) /*!< Bit field size in bits for LLWU_PE4_WUPE13. */
/*! @brief Read current value of the LLWU_PE4_WUPE13 field. */
#define BR_LLWU_PE4_WUPE13(x) (HW_LLWU_PE4(x).B.WUPE13)
#define BR_LLWU_PE4_WUPE13(x) (UNION_READ(hw_llwu_pe4_t, HW_LLWU_PE4_ADDR(x), U, B.WUPE13))
/*! @brief Format value for bitfield LLWU_PE4_WUPE13. */
#define BF_LLWU_PE4_WUPE13(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_PE4_WUPE13) & BM_LLWU_PE4_WUPE13)
@ -675,7 +682,7 @@ typedef union _hw_llwu_pe4
#define BS_LLWU_PE4_WUPE14 (2U) /*!< Bit field size in bits for LLWU_PE4_WUPE14. */
/*! @brief Read current value of the LLWU_PE4_WUPE14 field. */
#define BR_LLWU_PE4_WUPE14(x) (HW_LLWU_PE4(x).B.WUPE14)
#define BR_LLWU_PE4_WUPE14(x) (UNION_READ(hw_llwu_pe4_t, HW_LLWU_PE4_ADDR(x), U, B.WUPE14))
/*! @brief Format value for bitfield LLWU_PE4_WUPE14. */
#define BF_LLWU_PE4_WUPE14(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_PE4_WUPE14) & BM_LLWU_PE4_WUPE14)
@ -701,7 +708,7 @@ typedef union _hw_llwu_pe4
#define BS_LLWU_PE4_WUPE15 (2U) /*!< Bit field size in bits for LLWU_PE4_WUPE15. */
/*! @brief Read current value of the LLWU_PE4_WUPE15 field. */
#define BR_LLWU_PE4_WUPE15(x) (HW_LLWU_PE4(x).B.WUPE15)
#define BR_LLWU_PE4_WUPE15(x) (UNION_READ(hw_llwu_pe4_t, HW_LLWU_PE4_ADDR(x), U, B.WUPE15))
/*! @brief Format value for bitfield LLWU_PE4_WUPE15. */
#define BF_LLWU_PE4_WUPE15(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_PE4_WUPE15) & BM_LLWU_PE4_WUPE15)
@ -750,8 +757,8 @@ typedef union _hw_llwu_me
#define HW_LLWU_ME_ADDR(x) ((x) + 0x4U)
#define HW_LLWU_ME(x) (*(__IO hw_llwu_me_t *) HW_LLWU_ME_ADDR(x))
#define HW_LLWU_ME_RD(x) (HW_LLWU_ME(x).U)
#define HW_LLWU_ME_WR(x, v) (HW_LLWU_ME(x).U = (v))
#define HW_LLWU_ME_RD(x) (ADDRESS_READ(hw_llwu_me_t, HW_LLWU_ME_ADDR(x)))
#define HW_LLWU_ME_WR(x, v) (ADDRESS_WRITE(hw_llwu_me_t, HW_LLWU_ME_ADDR(x), v))
#define HW_LLWU_ME_SET(x, v) (HW_LLWU_ME_WR(x, HW_LLWU_ME_RD(x) | (v)))
#define HW_LLWU_ME_CLR(x, v) (HW_LLWU_ME_WR(x, HW_LLWU_ME_RD(x) & ~(v)))
#define HW_LLWU_ME_TOG(x, v) (HW_LLWU_ME_WR(x, HW_LLWU_ME_RD(x) ^ (v)))
@ -776,13 +783,13 @@ typedef union _hw_llwu_me
#define BS_LLWU_ME_WUME0 (1U) /*!< Bit field size in bits for LLWU_ME_WUME0. */
/*! @brief Read current value of the LLWU_ME_WUME0 field. */
#define BR_LLWU_ME_WUME0(x) (BITBAND_ACCESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME0))
#define BR_LLWU_ME_WUME0(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME0)))
/*! @brief Format value for bitfield LLWU_ME_WUME0. */
#define BF_LLWU_ME_WUME0(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_ME_WUME0) & BM_LLWU_ME_WUME0)
/*! @brief Set the WUME0 field to a new value. */
#define BW_LLWU_ME_WUME0(x, v) (BITBAND_ACCESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME0) = (v))
#define BW_LLWU_ME_WUME0(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME0), v))
/*@}*/
/*!
@ -800,13 +807,13 @@ typedef union _hw_llwu_me
#define BS_LLWU_ME_WUME1 (1U) /*!< Bit field size in bits for LLWU_ME_WUME1. */
/*! @brief Read current value of the LLWU_ME_WUME1 field. */
#define BR_LLWU_ME_WUME1(x) (BITBAND_ACCESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME1))
#define BR_LLWU_ME_WUME1(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME1)))
/*! @brief Format value for bitfield LLWU_ME_WUME1. */
#define BF_LLWU_ME_WUME1(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_ME_WUME1) & BM_LLWU_ME_WUME1)
/*! @brief Set the WUME1 field to a new value. */
#define BW_LLWU_ME_WUME1(x, v) (BITBAND_ACCESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME1) = (v))
#define BW_LLWU_ME_WUME1(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME1), v))
/*@}*/
/*!
@ -824,13 +831,13 @@ typedef union _hw_llwu_me
#define BS_LLWU_ME_WUME2 (1U) /*!< Bit field size in bits for LLWU_ME_WUME2. */
/*! @brief Read current value of the LLWU_ME_WUME2 field. */
#define BR_LLWU_ME_WUME2(x) (BITBAND_ACCESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME2))
#define BR_LLWU_ME_WUME2(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME2)))
/*! @brief Format value for bitfield LLWU_ME_WUME2. */
#define BF_LLWU_ME_WUME2(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_ME_WUME2) & BM_LLWU_ME_WUME2)
/*! @brief Set the WUME2 field to a new value. */
#define BW_LLWU_ME_WUME2(x, v) (BITBAND_ACCESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME2) = (v))
#define BW_LLWU_ME_WUME2(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME2), v))
/*@}*/
/*!
@ -848,13 +855,13 @@ typedef union _hw_llwu_me
#define BS_LLWU_ME_WUME3 (1U) /*!< Bit field size in bits for LLWU_ME_WUME3. */
/*! @brief Read current value of the LLWU_ME_WUME3 field. */
#define BR_LLWU_ME_WUME3(x) (BITBAND_ACCESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME3))
#define BR_LLWU_ME_WUME3(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME3)))
/*! @brief Format value for bitfield LLWU_ME_WUME3. */
#define BF_LLWU_ME_WUME3(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_ME_WUME3) & BM_LLWU_ME_WUME3)
/*! @brief Set the WUME3 field to a new value. */
#define BW_LLWU_ME_WUME3(x, v) (BITBAND_ACCESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME3) = (v))
#define BW_LLWU_ME_WUME3(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME3), v))
/*@}*/
/*!
@ -872,13 +879,13 @@ typedef union _hw_llwu_me
#define BS_LLWU_ME_WUME4 (1U) /*!< Bit field size in bits for LLWU_ME_WUME4. */
/*! @brief Read current value of the LLWU_ME_WUME4 field. */
#define BR_LLWU_ME_WUME4(x) (BITBAND_ACCESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME4))
#define BR_LLWU_ME_WUME4(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME4)))
/*! @brief Format value for bitfield LLWU_ME_WUME4. */
#define BF_LLWU_ME_WUME4(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_ME_WUME4) & BM_LLWU_ME_WUME4)
/*! @brief Set the WUME4 field to a new value. */
#define BW_LLWU_ME_WUME4(x, v) (BITBAND_ACCESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME4) = (v))
#define BW_LLWU_ME_WUME4(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME4), v))
/*@}*/
/*!
@ -896,13 +903,13 @@ typedef union _hw_llwu_me
#define BS_LLWU_ME_WUME5 (1U) /*!< Bit field size in bits for LLWU_ME_WUME5. */
/*! @brief Read current value of the LLWU_ME_WUME5 field. */
#define BR_LLWU_ME_WUME5(x) (BITBAND_ACCESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME5))
#define BR_LLWU_ME_WUME5(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME5)))
/*! @brief Format value for bitfield LLWU_ME_WUME5. */
#define BF_LLWU_ME_WUME5(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_ME_WUME5) & BM_LLWU_ME_WUME5)
/*! @brief Set the WUME5 field to a new value. */
#define BW_LLWU_ME_WUME5(x, v) (BITBAND_ACCESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME5) = (v))
#define BW_LLWU_ME_WUME5(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME5), v))
/*@}*/
/*!
@ -920,13 +927,13 @@ typedef union _hw_llwu_me
#define BS_LLWU_ME_WUME6 (1U) /*!< Bit field size in bits for LLWU_ME_WUME6. */
/*! @brief Read current value of the LLWU_ME_WUME6 field. */
#define BR_LLWU_ME_WUME6(x) (BITBAND_ACCESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME6))
#define BR_LLWU_ME_WUME6(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME6)))
/*! @brief Format value for bitfield LLWU_ME_WUME6. */
#define BF_LLWU_ME_WUME6(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_ME_WUME6) & BM_LLWU_ME_WUME6)
/*! @brief Set the WUME6 field to a new value. */
#define BW_LLWU_ME_WUME6(x, v) (BITBAND_ACCESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME6) = (v))
#define BW_LLWU_ME_WUME6(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME6), v))
/*@}*/
/*!
@ -944,13 +951,13 @@ typedef union _hw_llwu_me
#define BS_LLWU_ME_WUME7 (1U) /*!< Bit field size in bits for LLWU_ME_WUME7. */
/*! @brief Read current value of the LLWU_ME_WUME7 field. */
#define BR_LLWU_ME_WUME7(x) (BITBAND_ACCESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME7))
#define BR_LLWU_ME_WUME7(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME7)))
/*! @brief Format value for bitfield LLWU_ME_WUME7. */
#define BF_LLWU_ME_WUME7(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_ME_WUME7) & BM_LLWU_ME_WUME7)
/*! @brief Set the WUME7 field to a new value. */
#define BW_LLWU_ME_WUME7(x, v) (BITBAND_ACCESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME7) = (v))
#define BW_LLWU_ME_WUME7(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_ME_ADDR(x), BP_LLWU_ME_WUME7), v))
/*@}*/
/*******************************************************************************
@ -997,8 +1004,8 @@ typedef union _hw_llwu_f1
#define HW_LLWU_F1_ADDR(x) ((x) + 0x5U)
#define HW_LLWU_F1(x) (*(__IO hw_llwu_f1_t *) HW_LLWU_F1_ADDR(x))
#define HW_LLWU_F1_RD(x) (HW_LLWU_F1(x).U)
#define HW_LLWU_F1_WR(x, v) (HW_LLWU_F1(x).U = (v))
#define HW_LLWU_F1_RD(x) (ADDRESS_READ(hw_llwu_f1_t, HW_LLWU_F1_ADDR(x)))
#define HW_LLWU_F1_WR(x, v) (ADDRESS_WRITE(hw_llwu_f1_t, HW_LLWU_F1_ADDR(x), v))
#define HW_LLWU_F1_SET(x, v) (HW_LLWU_F1_WR(x, HW_LLWU_F1_RD(x) | (v)))
#define HW_LLWU_F1_CLR(x, v) (HW_LLWU_F1_WR(x, HW_LLWU_F1_RD(x) & ~(v)))
#define HW_LLWU_F1_TOG(x, v) (HW_LLWU_F1_WR(x, HW_LLWU_F1_RD(x) ^ (v)))
@ -1024,13 +1031,13 @@ typedef union _hw_llwu_f1
#define BS_LLWU_F1_WUF0 (1U) /*!< Bit field size in bits for LLWU_F1_WUF0. */
/*! @brief Read current value of the LLWU_F1_WUF0 field. */
#define BR_LLWU_F1_WUF0(x) (BITBAND_ACCESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF0))
#define BR_LLWU_F1_WUF0(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF0)))
/*! @brief Format value for bitfield LLWU_F1_WUF0. */
#define BF_LLWU_F1_WUF0(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_F1_WUF0) & BM_LLWU_F1_WUF0)
/*! @brief Set the WUF0 field to a new value. */
#define BW_LLWU_F1_WUF0(x, v) (BITBAND_ACCESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF0) = (v))
#define BW_LLWU_F1_WUF0(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF0), v))
/*@}*/
/*!
@ -1049,13 +1056,13 @@ typedef union _hw_llwu_f1
#define BS_LLWU_F1_WUF1 (1U) /*!< Bit field size in bits for LLWU_F1_WUF1. */
/*! @brief Read current value of the LLWU_F1_WUF1 field. */
#define BR_LLWU_F1_WUF1(x) (BITBAND_ACCESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF1))
#define BR_LLWU_F1_WUF1(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF1)))
/*! @brief Format value for bitfield LLWU_F1_WUF1. */
#define BF_LLWU_F1_WUF1(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_F1_WUF1) & BM_LLWU_F1_WUF1)
/*! @brief Set the WUF1 field to a new value. */
#define BW_LLWU_F1_WUF1(x, v) (BITBAND_ACCESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF1) = (v))
#define BW_LLWU_F1_WUF1(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF1), v))
/*@}*/
/*!
@ -1074,13 +1081,13 @@ typedef union _hw_llwu_f1
#define BS_LLWU_F1_WUF2 (1U) /*!< Bit field size in bits for LLWU_F1_WUF2. */
/*! @brief Read current value of the LLWU_F1_WUF2 field. */
#define BR_LLWU_F1_WUF2(x) (BITBAND_ACCESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF2))
#define BR_LLWU_F1_WUF2(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF2)))
/*! @brief Format value for bitfield LLWU_F1_WUF2. */
#define BF_LLWU_F1_WUF2(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_F1_WUF2) & BM_LLWU_F1_WUF2)
/*! @brief Set the WUF2 field to a new value. */
#define BW_LLWU_F1_WUF2(x, v) (BITBAND_ACCESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF2) = (v))
#define BW_LLWU_F1_WUF2(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF2), v))
/*@}*/
/*!
@ -1099,13 +1106,13 @@ typedef union _hw_llwu_f1
#define BS_LLWU_F1_WUF3 (1U) /*!< Bit field size in bits for LLWU_F1_WUF3. */
/*! @brief Read current value of the LLWU_F1_WUF3 field. */
#define BR_LLWU_F1_WUF3(x) (BITBAND_ACCESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF3))
#define BR_LLWU_F1_WUF3(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF3)))
/*! @brief Format value for bitfield LLWU_F1_WUF3. */
#define BF_LLWU_F1_WUF3(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_F1_WUF3) & BM_LLWU_F1_WUF3)
/*! @brief Set the WUF3 field to a new value. */
#define BW_LLWU_F1_WUF3(x, v) (BITBAND_ACCESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF3) = (v))
#define BW_LLWU_F1_WUF3(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF3), v))
/*@}*/
/*!
@ -1124,13 +1131,13 @@ typedef union _hw_llwu_f1
#define BS_LLWU_F1_WUF4 (1U) /*!< Bit field size in bits for LLWU_F1_WUF4. */
/*! @brief Read current value of the LLWU_F1_WUF4 field. */
#define BR_LLWU_F1_WUF4(x) (BITBAND_ACCESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF4))
#define BR_LLWU_F1_WUF4(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF4)))
/*! @brief Format value for bitfield LLWU_F1_WUF4. */
#define BF_LLWU_F1_WUF4(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_F1_WUF4) & BM_LLWU_F1_WUF4)
/*! @brief Set the WUF4 field to a new value. */
#define BW_LLWU_F1_WUF4(x, v) (BITBAND_ACCESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF4) = (v))
#define BW_LLWU_F1_WUF4(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF4), v))
/*@}*/
/*!
@ -1149,13 +1156,13 @@ typedef union _hw_llwu_f1
#define BS_LLWU_F1_WUF5 (1U) /*!< Bit field size in bits for LLWU_F1_WUF5. */
/*! @brief Read current value of the LLWU_F1_WUF5 field. */
#define BR_LLWU_F1_WUF5(x) (BITBAND_ACCESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF5))
#define BR_LLWU_F1_WUF5(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF5)))
/*! @brief Format value for bitfield LLWU_F1_WUF5. */
#define BF_LLWU_F1_WUF5(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_F1_WUF5) & BM_LLWU_F1_WUF5)
/*! @brief Set the WUF5 field to a new value. */
#define BW_LLWU_F1_WUF5(x, v) (BITBAND_ACCESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF5) = (v))
#define BW_LLWU_F1_WUF5(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF5), v))
/*@}*/
/*!
@ -1174,13 +1181,13 @@ typedef union _hw_llwu_f1
#define BS_LLWU_F1_WUF6 (1U) /*!< Bit field size in bits for LLWU_F1_WUF6. */
/*! @brief Read current value of the LLWU_F1_WUF6 field. */
#define BR_LLWU_F1_WUF6(x) (BITBAND_ACCESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF6))
#define BR_LLWU_F1_WUF6(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF6)))
/*! @brief Format value for bitfield LLWU_F1_WUF6. */
#define BF_LLWU_F1_WUF6(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_F1_WUF6) & BM_LLWU_F1_WUF6)
/*! @brief Set the WUF6 field to a new value. */
#define BW_LLWU_F1_WUF6(x, v) (BITBAND_ACCESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF6) = (v))
#define BW_LLWU_F1_WUF6(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF6), v))
/*@}*/
/*!
@ -1199,13 +1206,13 @@ typedef union _hw_llwu_f1
#define BS_LLWU_F1_WUF7 (1U) /*!< Bit field size in bits for LLWU_F1_WUF7. */
/*! @brief Read current value of the LLWU_F1_WUF7 field. */
#define BR_LLWU_F1_WUF7(x) (BITBAND_ACCESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF7))
#define BR_LLWU_F1_WUF7(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF7)))
/*! @brief Format value for bitfield LLWU_F1_WUF7. */
#define BF_LLWU_F1_WUF7(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_F1_WUF7) & BM_LLWU_F1_WUF7)
/*! @brief Set the WUF7 field to a new value. */
#define BW_LLWU_F1_WUF7(x, v) (BITBAND_ACCESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF7) = (v))
#define BW_LLWU_F1_WUF7(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F1_ADDR(x), BP_LLWU_F1_WUF7), v))
/*@}*/
/*******************************************************************************
@ -1252,8 +1259,8 @@ typedef union _hw_llwu_f2
#define HW_LLWU_F2_ADDR(x) ((x) + 0x6U)
#define HW_LLWU_F2(x) (*(__IO hw_llwu_f2_t *) HW_LLWU_F2_ADDR(x))
#define HW_LLWU_F2_RD(x) (HW_LLWU_F2(x).U)
#define HW_LLWU_F2_WR(x, v) (HW_LLWU_F2(x).U = (v))
#define HW_LLWU_F2_RD(x) (ADDRESS_READ(hw_llwu_f2_t, HW_LLWU_F2_ADDR(x)))
#define HW_LLWU_F2_WR(x, v) (ADDRESS_WRITE(hw_llwu_f2_t, HW_LLWU_F2_ADDR(x), v))
#define HW_LLWU_F2_SET(x, v) (HW_LLWU_F2_WR(x, HW_LLWU_F2_RD(x) | (v)))
#define HW_LLWU_F2_CLR(x, v) (HW_LLWU_F2_WR(x, HW_LLWU_F2_RD(x) & ~(v)))
#define HW_LLWU_F2_TOG(x, v) (HW_LLWU_F2_WR(x, HW_LLWU_F2_RD(x) ^ (v)))
@ -1279,13 +1286,13 @@ typedef union _hw_llwu_f2
#define BS_LLWU_F2_WUF8 (1U) /*!< Bit field size in bits for LLWU_F2_WUF8. */
/*! @brief Read current value of the LLWU_F2_WUF8 field. */
#define BR_LLWU_F2_WUF8(x) (BITBAND_ACCESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF8))
#define BR_LLWU_F2_WUF8(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF8)))
/*! @brief Format value for bitfield LLWU_F2_WUF8. */
#define BF_LLWU_F2_WUF8(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_F2_WUF8) & BM_LLWU_F2_WUF8)
/*! @brief Set the WUF8 field to a new value. */
#define BW_LLWU_F2_WUF8(x, v) (BITBAND_ACCESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF8) = (v))
#define BW_LLWU_F2_WUF8(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF8), v))
/*@}*/
/*!
@ -1304,13 +1311,13 @@ typedef union _hw_llwu_f2
#define BS_LLWU_F2_WUF9 (1U) /*!< Bit field size in bits for LLWU_F2_WUF9. */
/*! @brief Read current value of the LLWU_F2_WUF9 field. */
#define BR_LLWU_F2_WUF9(x) (BITBAND_ACCESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF9))
#define BR_LLWU_F2_WUF9(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF9)))
/*! @brief Format value for bitfield LLWU_F2_WUF9. */
#define BF_LLWU_F2_WUF9(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_F2_WUF9) & BM_LLWU_F2_WUF9)
/*! @brief Set the WUF9 field to a new value. */
#define BW_LLWU_F2_WUF9(x, v) (BITBAND_ACCESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF9) = (v))
#define BW_LLWU_F2_WUF9(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF9), v))
/*@}*/
/*!
@ -1329,13 +1336,13 @@ typedef union _hw_llwu_f2
#define BS_LLWU_F2_WUF10 (1U) /*!< Bit field size in bits for LLWU_F2_WUF10. */
/*! @brief Read current value of the LLWU_F2_WUF10 field. */
#define BR_LLWU_F2_WUF10(x) (BITBAND_ACCESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF10))
#define BR_LLWU_F2_WUF10(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF10)))
/*! @brief Format value for bitfield LLWU_F2_WUF10. */
#define BF_LLWU_F2_WUF10(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_F2_WUF10) & BM_LLWU_F2_WUF10)
/*! @brief Set the WUF10 field to a new value. */
#define BW_LLWU_F2_WUF10(x, v) (BITBAND_ACCESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF10) = (v))
#define BW_LLWU_F2_WUF10(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF10), v))
/*@}*/
/*!
@ -1354,13 +1361,13 @@ typedef union _hw_llwu_f2
#define BS_LLWU_F2_WUF11 (1U) /*!< Bit field size in bits for LLWU_F2_WUF11. */
/*! @brief Read current value of the LLWU_F2_WUF11 field. */
#define BR_LLWU_F2_WUF11(x) (BITBAND_ACCESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF11))
#define BR_LLWU_F2_WUF11(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF11)))
/*! @brief Format value for bitfield LLWU_F2_WUF11. */
#define BF_LLWU_F2_WUF11(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_F2_WUF11) & BM_LLWU_F2_WUF11)
/*! @brief Set the WUF11 field to a new value. */
#define BW_LLWU_F2_WUF11(x, v) (BITBAND_ACCESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF11) = (v))
#define BW_LLWU_F2_WUF11(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF11), v))
/*@}*/
/*!
@ -1379,13 +1386,13 @@ typedef union _hw_llwu_f2
#define BS_LLWU_F2_WUF12 (1U) /*!< Bit field size in bits for LLWU_F2_WUF12. */
/*! @brief Read current value of the LLWU_F2_WUF12 field. */
#define BR_LLWU_F2_WUF12(x) (BITBAND_ACCESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF12))
#define BR_LLWU_F2_WUF12(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF12)))
/*! @brief Format value for bitfield LLWU_F2_WUF12. */
#define BF_LLWU_F2_WUF12(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_F2_WUF12) & BM_LLWU_F2_WUF12)
/*! @brief Set the WUF12 field to a new value. */
#define BW_LLWU_F2_WUF12(x, v) (BITBAND_ACCESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF12) = (v))
#define BW_LLWU_F2_WUF12(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF12), v))
/*@}*/
/*!
@ -1404,13 +1411,13 @@ typedef union _hw_llwu_f2
#define BS_LLWU_F2_WUF13 (1U) /*!< Bit field size in bits for LLWU_F2_WUF13. */
/*! @brief Read current value of the LLWU_F2_WUF13 field. */
#define BR_LLWU_F2_WUF13(x) (BITBAND_ACCESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF13))
#define BR_LLWU_F2_WUF13(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF13)))
/*! @brief Format value for bitfield LLWU_F2_WUF13. */
#define BF_LLWU_F2_WUF13(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_F2_WUF13) & BM_LLWU_F2_WUF13)
/*! @brief Set the WUF13 field to a new value. */
#define BW_LLWU_F2_WUF13(x, v) (BITBAND_ACCESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF13) = (v))
#define BW_LLWU_F2_WUF13(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF13), v))
/*@}*/
/*!
@ -1429,13 +1436,13 @@ typedef union _hw_llwu_f2
#define BS_LLWU_F2_WUF14 (1U) /*!< Bit field size in bits for LLWU_F2_WUF14. */
/*! @brief Read current value of the LLWU_F2_WUF14 field. */
#define BR_LLWU_F2_WUF14(x) (BITBAND_ACCESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF14))
#define BR_LLWU_F2_WUF14(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF14)))
/*! @brief Format value for bitfield LLWU_F2_WUF14. */
#define BF_LLWU_F2_WUF14(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_F2_WUF14) & BM_LLWU_F2_WUF14)
/*! @brief Set the WUF14 field to a new value. */
#define BW_LLWU_F2_WUF14(x, v) (BITBAND_ACCESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF14) = (v))
#define BW_LLWU_F2_WUF14(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF14), v))
/*@}*/
/*!
@ -1454,13 +1461,13 @@ typedef union _hw_llwu_f2
#define BS_LLWU_F2_WUF15 (1U) /*!< Bit field size in bits for LLWU_F2_WUF15. */
/*! @brief Read current value of the LLWU_F2_WUF15 field. */
#define BR_LLWU_F2_WUF15(x) (BITBAND_ACCESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF15))
#define BR_LLWU_F2_WUF15(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF15)))
/*! @brief Format value for bitfield LLWU_F2_WUF15. */
#define BF_LLWU_F2_WUF15(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_F2_WUF15) & BM_LLWU_F2_WUF15)
/*! @brief Set the WUF15 field to a new value. */
#define BW_LLWU_F2_WUF15(x, v) (BITBAND_ACCESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF15) = (v))
#define BW_LLWU_F2_WUF15(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F2_ADDR(x), BP_LLWU_F2_WUF15), v))
/*@}*/
/*******************************************************************************
@ -1509,7 +1516,7 @@ typedef union _hw_llwu_f3
#define HW_LLWU_F3_ADDR(x) ((x) + 0x7U)
#define HW_LLWU_F3(x) (*(__I hw_llwu_f3_t *) HW_LLWU_F3_ADDR(x))
#define HW_LLWU_F3_RD(x) (HW_LLWU_F3(x).U)
#define HW_LLWU_F3_RD(x) (ADDRESS_READ(hw_llwu_f3_t, HW_LLWU_F3_ADDR(x)))
/*@}*/
/*
@ -1533,7 +1540,7 @@ typedef union _hw_llwu_f3
#define BS_LLWU_F3_MWUF0 (1U) /*!< Bit field size in bits for LLWU_F3_MWUF0. */
/*! @brief Read current value of the LLWU_F3_MWUF0 field. */
#define BR_LLWU_F3_MWUF0(x) (BITBAND_ACCESS8(HW_LLWU_F3_ADDR(x), BP_LLWU_F3_MWUF0))
#define BR_LLWU_F3_MWUF0(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F3_ADDR(x), BP_LLWU_F3_MWUF0)))
/*@}*/
/*!
@ -1553,7 +1560,7 @@ typedef union _hw_llwu_f3
#define BS_LLWU_F3_MWUF1 (1U) /*!< Bit field size in bits for LLWU_F3_MWUF1. */
/*! @brief Read current value of the LLWU_F3_MWUF1 field. */
#define BR_LLWU_F3_MWUF1(x) (BITBAND_ACCESS8(HW_LLWU_F3_ADDR(x), BP_LLWU_F3_MWUF1))
#define BR_LLWU_F3_MWUF1(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F3_ADDR(x), BP_LLWU_F3_MWUF1)))
/*@}*/
/*!
@ -1573,7 +1580,7 @@ typedef union _hw_llwu_f3
#define BS_LLWU_F3_MWUF2 (1U) /*!< Bit field size in bits for LLWU_F3_MWUF2. */
/*! @brief Read current value of the LLWU_F3_MWUF2 field. */
#define BR_LLWU_F3_MWUF2(x) (BITBAND_ACCESS8(HW_LLWU_F3_ADDR(x), BP_LLWU_F3_MWUF2))
#define BR_LLWU_F3_MWUF2(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F3_ADDR(x), BP_LLWU_F3_MWUF2)))
/*@}*/
/*!
@ -1593,7 +1600,7 @@ typedef union _hw_llwu_f3
#define BS_LLWU_F3_MWUF3 (1U) /*!< Bit field size in bits for LLWU_F3_MWUF3. */
/*! @brief Read current value of the LLWU_F3_MWUF3 field. */
#define BR_LLWU_F3_MWUF3(x) (BITBAND_ACCESS8(HW_LLWU_F3_ADDR(x), BP_LLWU_F3_MWUF3))
#define BR_LLWU_F3_MWUF3(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F3_ADDR(x), BP_LLWU_F3_MWUF3)))
/*@}*/
/*!
@ -1613,7 +1620,7 @@ typedef union _hw_llwu_f3
#define BS_LLWU_F3_MWUF4 (1U) /*!< Bit field size in bits for LLWU_F3_MWUF4. */
/*! @brief Read current value of the LLWU_F3_MWUF4 field. */
#define BR_LLWU_F3_MWUF4(x) (BITBAND_ACCESS8(HW_LLWU_F3_ADDR(x), BP_LLWU_F3_MWUF4))
#define BR_LLWU_F3_MWUF4(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F3_ADDR(x), BP_LLWU_F3_MWUF4)))
/*@}*/
/*!
@ -1633,7 +1640,7 @@ typedef union _hw_llwu_f3
#define BS_LLWU_F3_MWUF5 (1U) /*!< Bit field size in bits for LLWU_F3_MWUF5. */
/*! @brief Read current value of the LLWU_F3_MWUF5 field. */
#define BR_LLWU_F3_MWUF5(x) (BITBAND_ACCESS8(HW_LLWU_F3_ADDR(x), BP_LLWU_F3_MWUF5))
#define BR_LLWU_F3_MWUF5(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F3_ADDR(x), BP_LLWU_F3_MWUF5)))
/*@}*/
/*!
@ -1653,7 +1660,7 @@ typedef union _hw_llwu_f3
#define BS_LLWU_F3_MWUF6 (1U) /*!< Bit field size in bits for LLWU_F3_MWUF6. */
/*! @brief Read current value of the LLWU_F3_MWUF6 field. */
#define BR_LLWU_F3_MWUF6(x) (BITBAND_ACCESS8(HW_LLWU_F3_ADDR(x), BP_LLWU_F3_MWUF6))
#define BR_LLWU_F3_MWUF6(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F3_ADDR(x), BP_LLWU_F3_MWUF6)))
/*@}*/
/*!
@ -1673,7 +1680,7 @@ typedef union _hw_llwu_f3
#define BS_LLWU_F3_MWUF7 (1U) /*!< Bit field size in bits for LLWU_F3_MWUF7. */
/*! @brief Read current value of the LLWU_F3_MWUF7 field. */
#define BR_LLWU_F3_MWUF7(x) (BITBAND_ACCESS8(HW_LLWU_F3_ADDR(x), BP_LLWU_F3_MWUF7))
#define BR_LLWU_F3_MWUF7(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_F3_ADDR(x), BP_LLWU_F3_MWUF7)))
/*@}*/
/*******************************************************************************
@ -1712,8 +1719,8 @@ typedef union _hw_llwu_filt1
#define HW_LLWU_FILT1_ADDR(x) ((x) + 0x8U)
#define HW_LLWU_FILT1(x) (*(__IO hw_llwu_filt1_t *) HW_LLWU_FILT1_ADDR(x))
#define HW_LLWU_FILT1_RD(x) (HW_LLWU_FILT1(x).U)
#define HW_LLWU_FILT1_WR(x, v) (HW_LLWU_FILT1(x).U = (v))
#define HW_LLWU_FILT1_RD(x) (ADDRESS_READ(hw_llwu_filt1_t, HW_LLWU_FILT1_ADDR(x)))
#define HW_LLWU_FILT1_WR(x, v) (ADDRESS_WRITE(hw_llwu_filt1_t, HW_LLWU_FILT1_ADDR(x), v))
#define HW_LLWU_FILT1_SET(x, v) (HW_LLWU_FILT1_WR(x, HW_LLWU_FILT1_RD(x) | (v)))
#define HW_LLWU_FILT1_CLR(x, v) (HW_LLWU_FILT1_WR(x, HW_LLWU_FILT1_RD(x) & ~(v)))
#define HW_LLWU_FILT1_TOG(x, v) (HW_LLWU_FILT1_WR(x, HW_LLWU_FILT1_RD(x) ^ (v)))
@ -1738,7 +1745,7 @@ typedef union _hw_llwu_filt1
#define BS_LLWU_FILT1_FILTSEL (4U) /*!< Bit field size in bits for LLWU_FILT1_FILTSEL. */
/*! @brief Read current value of the LLWU_FILT1_FILTSEL field. */
#define BR_LLWU_FILT1_FILTSEL(x) (HW_LLWU_FILT1(x).B.FILTSEL)
#define BR_LLWU_FILT1_FILTSEL(x) (UNION_READ(hw_llwu_filt1_t, HW_LLWU_FILT1_ADDR(x), U, B.FILTSEL))
/*! @brief Format value for bitfield LLWU_FILT1_FILTSEL. */
#define BF_LLWU_FILT1_FILTSEL(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_FILT1_FILTSEL) & BM_LLWU_FILT1_FILTSEL)
@ -1764,7 +1771,7 @@ typedef union _hw_llwu_filt1
#define BS_LLWU_FILT1_FILTE (2U) /*!< Bit field size in bits for LLWU_FILT1_FILTE. */
/*! @brief Read current value of the LLWU_FILT1_FILTE field. */
#define BR_LLWU_FILT1_FILTE(x) (HW_LLWU_FILT1(x).B.FILTE)
#define BR_LLWU_FILT1_FILTE(x) (UNION_READ(hw_llwu_filt1_t, HW_LLWU_FILT1_ADDR(x), U, B.FILTE))
/*! @brief Format value for bitfield LLWU_FILT1_FILTE. */
#define BF_LLWU_FILT1_FILTE(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_FILT1_FILTE) & BM_LLWU_FILT1_FILTE)
@ -1790,13 +1797,13 @@ typedef union _hw_llwu_filt1
#define BS_LLWU_FILT1_FILTF (1U) /*!< Bit field size in bits for LLWU_FILT1_FILTF. */
/*! @brief Read current value of the LLWU_FILT1_FILTF field. */
#define BR_LLWU_FILT1_FILTF(x) (BITBAND_ACCESS8(HW_LLWU_FILT1_ADDR(x), BP_LLWU_FILT1_FILTF))
#define BR_LLWU_FILT1_FILTF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_FILT1_ADDR(x), BP_LLWU_FILT1_FILTF)))
/*! @brief Format value for bitfield LLWU_FILT1_FILTF. */
#define BF_LLWU_FILT1_FILTF(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_FILT1_FILTF) & BM_LLWU_FILT1_FILTF)
/*! @brief Set the FILTF field to a new value. */
#define BW_LLWU_FILT1_FILTF(x, v) (BITBAND_ACCESS8(HW_LLWU_FILT1_ADDR(x), BP_LLWU_FILT1_FILTF) = (v))
#define BW_LLWU_FILT1_FILTF(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_FILT1_ADDR(x), BP_LLWU_FILT1_FILTF), v))
/*@}*/
/*******************************************************************************
@ -1835,8 +1842,8 @@ typedef union _hw_llwu_filt2
#define HW_LLWU_FILT2_ADDR(x) ((x) + 0x9U)
#define HW_LLWU_FILT2(x) (*(__IO hw_llwu_filt2_t *) HW_LLWU_FILT2_ADDR(x))
#define HW_LLWU_FILT2_RD(x) (HW_LLWU_FILT2(x).U)
#define HW_LLWU_FILT2_WR(x, v) (HW_LLWU_FILT2(x).U = (v))
#define HW_LLWU_FILT2_RD(x) (ADDRESS_READ(hw_llwu_filt2_t, HW_LLWU_FILT2_ADDR(x)))
#define HW_LLWU_FILT2_WR(x, v) (ADDRESS_WRITE(hw_llwu_filt2_t, HW_LLWU_FILT2_ADDR(x), v))
#define HW_LLWU_FILT2_SET(x, v) (HW_LLWU_FILT2_WR(x, HW_LLWU_FILT2_RD(x) | (v)))
#define HW_LLWU_FILT2_CLR(x, v) (HW_LLWU_FILT2_WR(x, HW_LLWU_FILT2_RD(x) & ~(v)))
#define HW_LLWU_FILT2_TOG(x, v) (HW_LLWU_FILT2_WR(x, HW_LLWU_FILT2_RD(x) ^ (v)))
@ -1861,7 +1868,7 @@ typedef union _hw_llwu_filt2
#define BS_LLWU_FILT2_FILTSEL (4U) /*!< Bit field size in bits for LLWU_FILT2_FILTSEL. */
/*! @brief Read current value of the LLWU_FILT2_FILTSEL field. */
#define BR_LLWU_FILT2_FILTSEL(x) (HW_LLWU_FILT2(x).B.FILTSEL)
#define BR_LLWU_FILT2_FILTSEL(x) (UNION_READ(hw_llwu_filt2_t, HW_LLWU_FILT2_ADDR(x), U, B.FILTSEL))
/*! @brief Format value for bitfield LLWU_FILT2_FILTSEL. */
#define BF_LLWU_FILT2_FILTSEL(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_FILT2_FILTSEL) & BM_LLWU_FILT2_FILTSEL)
@ -1887,7 +1894,7 @@ typedef union _hw_llwu_filt2
#define BS_LLWU_FILT2_FILTE (2U) /*!< Bit field size in bits for LLWU_FILT2_FILTE. */
/*! @brief Read current value of the LLWU_FILT2_FILTE field. */
#define BR_LLWU_FILT2_FILTE(x) (HW_LLWU_FILT2(x).B.FILTE)
#define BR_LLWU_FILT2_FILTE(x) (UNION_READ(hw_llwu_filt2_t, HW_LLWU_FILT2_ADDR(x), U, B.FILTE))
/*! @brief Format value for bitfield LLWU_FILT2_FILTE. */
#define BF_LLWU_FILT2_FILTE(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_FILT2_FILTE) & BM_LLWU_FILT2_FILTE)
@ -1913,13 +1920,13 @@ typedef union _hw_llwu_filt2
#define BS_LLWU_FILT2_FILTF (1U) /*!< Bit field size in bits for LLWU_FILT2_FILTF. */
/*! @brief Read current value of the LLWU_FILT2_FILTF field. */
#define BR_LLWU_FILT2_FILTF(x) (BITBAND_ACCESS8(HW_LLWU_FILT2_ADDR(x), BP_LLWU_FILT2_FILTF))
#define BR_LLWU_FILT2_FILTF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_FILT2_ADDR(x), BP_LLWU_FILT2_FILTF)))
/*! @brief Format value for bitfield LLWU_FILT2_FILTF. */
#define BF_LLWU_FILT2_FILTF(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_FILT2_FILTF) & BM_LLWU_FILT2_FILTF)
/*! @brief Set the FILTF field to a new value. */
#define BW_LLWU_FILT2_FILTF(x, v) (BITBAND_ACCESS8(HW_LLWU_FILT2_ADDR(x), BP_LLWU_FILT2_FILTF) = (v))
#define BW_LLWU_FILT2_FILTF(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_FILT2_ADDR(x), BP_LLWU_FILT2_FILTF), v))
/*@}*/
/*******************************************************************************
@ -1957,8 +1964,8 @@ typedef union _hw_llwu_rst
#define HW_LLWU_RST_ADDR(x) ((x) + 0xAU)
#define HW_LLWU_RST(x) (*(__IO hw_llwu_rst_t *) HW_LLWU_RST_ADDR(x))
#define HW_LLWU_RST_RD(x) (HW_LLWU_RST(x).U)
#define HW_LLWU_RST_WR(x, v) (HW_LLWU_RST(x).U = (v))
#define HW_LLWU_RST_RD(x) (ADDRESS_READ(hw_llwu_rst_t, HW_LLWU_RST_ADDR(x)))
#define HW_LLWU_RST_WR(x, v) (ADDRESS_WRITE(hw_llwu_rst_t, HW_LLWU_RST_ADDR(x), v))
#define HW_LLWU_RST_SET(x, v) (HW_LLWU_RST_WR(x, HW_LLWU_RST_RD(x) | (v)))
#define HW_LLWU_RST_CLR(x, v) (HW_LLWU_RST_WR(x, HW_LLWU_RST_RD(x) & ~(v)))
#define HW_LLWU_RST_TOG(x, v) (HW_LLWU_RST_WR(x, HW_LLWU_RST_RD(x) ^ (v)))
@ -1984,13 +1991,13 @@ typedef union _hw_llwu_rst
#define BS_LLWU_RST_RSTFILT (1U) /*!< Bit field size in bits for LLWU_RST_RSTFILT. */
/*! @brief Read current value of the LLWU_RST_RSTFILT field. */
#define BR_LLWU_RST_RSTFILT(x) (BITBAND_ACCESS8(HW_LLWU_RST_ADDR(x), BP_LLWU_RST_RSTFILT))
#define BR_LLWU_RST_RSTFILT(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_RST_ADDR(x), BP_LLWU_RST_RSTFILT)))
/*! @brief Format value for bitfield LLWU_RST_RSTFILT. */
#define BF_LLWU_RST_RSTFILT(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_RST_RSTFILT) & BM_LLWU_RST_RSTFILT)
/*! @brief Set the RSTFILT field to a new value. */
#define BW_LLWU_RST_RSTFILT(x, v) (BITBAND_ACCESS8(HW_LLWU_RST_ADDR(x), BP_LLWU_RST_RSTFILT) = (v))
#define BW_LLWU_RST_RSTFILT(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_RST_ADDR(x), BP_LLWU_RST_RSTFILT), v))
/*@}*/
/*!
@ -2010,13 +2017,13 @@ typedef union _hw_llwu_rst
#define BS_LLWU_RST_LLRSTE (1U) /*!< Bit field size in bits for LLWU_RST_LLRSTE. */
/*! @brief Read current value of the LLWU_RST_LLRSTE field. */
#define BR_LLWU_RST_LLRSTE(x) (BITBAND_ACCESS8(HW_LLWU_RST_ADDR(x), BP_LLWU_RST_LLRSTE))
#define BR_LLWU_RST_LLRSTE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_LLWU_RST_ADDR(x), BP_LLWU_RST_LLRSTE)))
/*! @brief Format value for bitfield LLWU_RST_LLRSTE. */
#define BF_LLWU_RST_LLRSTE(v) ((uint8_t)((uint8_t)(v) << BP_LLWU_RST_LLRSTE) & BM_LLWU_RST_LLRSTE)
/*! @brief Set the LLRSTE field to a new value. */
#define BW_LLWU_RST_LLRSTE(x, v) (BITBAND_ACCESS8(HW_LLWU_RST_ADDR(x), BP_LLWU_RST_LLRSTE) = (v))
#define BW_LLWU_RST_LLRSTE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_LLWU_RST_ADDR(x), BP_LLWU_RST_LLRSTE), v))
/*@}*/
/*******************************************************************************

61
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_lptmr.h
View File

@ -15,6 +15,9 @@
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** (C) COPYRIGHT 2015-2015 ARM Limited
** ALL RIGHTS RESERVED
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
@ -68,6 +71,10 @@
** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
** Update of SystemInit() and SystemCoreClockUpdate() functions.
** Module access macro module_BASES replaced by module_BASE_PTRS.
** - rev. 2.6 (2015-08-03) (ARM)
** All accesses to memory are replaced by equivalent macros; this allows
** memory read/write operations to be re-defined if needed (for example,
** to implement new security features
**
** ###################################################################
*/
@ -131,8 +138,8 @@ typedef union _hw_lptmr_csr
#define HW_LPTMR_CSR_ADDR(x) ((x) + 0x0U)
#define HW_LPTMR_CSR(x) (*(__IO hw_lptmr_csr_t *) HW_LPTMR_CSR_ADDR(x))
#define HW_LPTMR_CSR_RD(x) (HW_LPTMR_CSR(x).U)
#define HW_LPTMR_CSR_WR(x, v) (HW_LPTMR_CSR(x).U = (v))
#define HW_LPTMR_CSR_RD(x) (ADDRESS_READ(hw_lptmr_csr_t, HW_LPTMR_CSR_ADDR(x)))
#define HW_LPTMR_CSR_WR(x, v) (ADDRESS_WRITE(hw_lptmr_csr_t, HW_LPTMR_CSR_ADDR(x), v))
#define HW_LPTMR_CSR_SET(x, v) (HW_LPTMR_CSR_WR(x, HW_LPTMR_CSR_RD(x) | (v)))
#define HW_LPTMR_CSR_CLR(x, v) (HW_LPTMR_CSR_WR(x, HW_LPTMR_CSR_RD(x) & ~(v)))
#define HW_LPTMR_CSR_TOG(x, v) (HW_LPTMR_CSR_WR(x, HW_LPTMR_CSR_RD(x) ^ (v)))
@ -159,13 +166,13 @@ typedef union _hw_lptmr_csr
#define BS_LPTMR_CSR_TEN (1U) /*!< Bit field size in bits for LPTMR_CSR_TEN. */
/*! @brief Read current value of the LPTMR_CSR_TEN field. */
#define BR_LPTMR_CSR_TEN(x) (BITBAND_ACCESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TEN))
#define BR_LPTMR_CSR_TEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TEN)))
/*! @brief Format value for bitfield LPTMR_CSR_TEN. */
#define BF_LPTMR_CSR_TEN(v) ((uint32_t)((uint32_t)(v) << BP_LPTMR_CSR_TEN) & BM_LPTMR_CSR_TEN)
/*! @brief Set the TEN field to a new value. */
#define BW_LPTMR_CSR_TEN(x, v) (BITBAND_ACCESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TEN) = (v))
#define BW_LPTMR_CSR_TEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TEN), v))
/*@}*/
/*!
@ -184,13 +191,13 @@ typedef union _hw_lptmr_csr
#define BS_LPTMR_CSR_TMS (1U) /*!< Bit field size in bits for LPTMR_CSR_TMS. */
/*! @brief Read current value of the LPTMR_CSR_TMS field. */
#define BR_LPTMR_CSR_TMS(x) (BITBAND_ACCESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TMS))
#define BR_LPTMR_CSR_TMS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TMS)))
/*! @brief Format value for bitfield LPTMR_CSR_TMS. */
#define BF_LPTMR_CSR_TMS(v) ((uint32_t)((uint32_t)(v) << BP_LPTMR_CSR_TMS) & BM_LPTMR_CSR_TMS)
/*! @brief Set the TMS field to a new value. */
#define BW_LPTMR_CSR_TMS(x, v) (BITBAND_ACCESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TMS) = (v))
#define BW_LPTMR_CSR_TMS(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TMS), v))
/*@}*/
/*!
@ -210,13 +217,13 @@ typedef union _hw_lptmr_csr
#define BS_LPTMR_CSR_TFC (1U) /*!< Bit field size in bits for LPTMR_CSR_TFC. */
/*! @brief Read current value of the LPTMR_CSR_TFC field. */
#define BR_LPTMR_CSR_TFC(x) (BITBAND_ACCESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TFC))
#define BR_LPTMR_CSR_TFC(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TFC)))
/*! @brief Format value for bitfield LPTMR_CSR_TFC. */
#define BF_LPTMR_CSR_TFC(v) ((uint32_t)((uint32_t)(v) << BP_LPTMR_CSR_TFC) & BM_LPTMR_CSR_TFC)
/*! @brief Set the TFC field to a new value. */
#define BW_LPTMR_CSR_TFC(x, v) (BITBAND_ACCESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TFC) = (v))
#define BW_LPTMR_CSR_TFC(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TFC), v))
/*@}*/
/*!
@ -237,13 +244,13 @@ typedef union _hw_lptmr_csr
#define BS_LPTMR_CSR_TPP (1U) /*!< Bit field size in bits for LPTMR_CSR_TPP. */
/*! @brief Read current value of the LPTMR_CSR_TPP field. */
#define BR_LPTMR_CSR_TPP(x) (BITBAND_ACCESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TPP))
#define BR_LPTMR_CSR_TPP(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TPP)))
/*! @brief Format value for bitfield LPTMR_CSR_TPP. */
#define BF_LPTMR_CSR_TPP(v) ((uint32_t)((uint32_t)(v) << BP_LPTMR_CSR_TPP) & BM_LPTMR_CSR_TPP)
/*! @brief Set the TPP field to a new value. */
#define BW_LPTMR_CSR_TPP(x, v) (BITBAND_ACCESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TPP) = (v))
#define BW_LPTMR_CSR_TPP(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TPP), v))
/*@}*/
/*!
@ -266,7 +273,7 @@ typedef union _hw_lptmr_csr
#define BS_LPTMR_CSR_TPS (2U) /*!< Bit field size in bits for LPTMR_CSR_TPS. */
/*! @brief Read current value of the LPTMR_CSR_TPS field. */
#define BR_LPTMR_CSR_TPS(x) (HW_LPTMR_CSR(x).B.TPS)
#define BR_LPTMR_CSR_TPS(x) (UNION_READ(hw_lptmr_csr_t, HW_LPTMR_CSR_ADDR(x), U, B.TPS))
/*! @brief Format value for bitfield LPTMR_CSR_TPS. */
#define BF_LPTMR_CSR_TPS(v) ((uint32_t)((uint32_t)(v) << BP_LPTMR_CSR_TPS) & BM_LPTMR_CSR_TPS)
@ -290,13 +297,13 @@ typedef union _hw_lptmr_csr
#define BS_LPTMR_CSR_TIE (1U) /*!< Bit field size in bits for LPTMR_CSR_TIE. */
/*! @brief Read current value of the LPTMR_CSR_TIE field. */
#define BR_LPTMR_CSR_TIE(x) (BITBAND_ACCESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TIE))
#define BR_LPTMR_CSR_TIE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TIE)))
/*! @brief Format value for bitfield LPTMR_CSR_TIE. */
#define BF_LPTMR_CSR_TIE(v) ((uint32_t)((uint32_t)(v) << BP_LPTMR_CSR_TIE) & BM_LPTMR_CSR_TIE)
/*! @brief Set the TIE field to a new value. */
#define BW_LPTMR_CSR_TIE(x, v) (BITBAND_ACCESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TIE) = (v))
#define BW_LPTMR_CSR_TIE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TIE), v))
/*@}*/
/*!
@ -315,13 +322,13 @@ typedef union _hw_lptmr_csr
#define BS_LPTMR_CSR_TCF (1U) /*!< Bit field size in bits for LPTMR_CSR_TCF. */
/*! @brief Read current value of the LPTMR_CSR_TCF field. */
#define BR_LPTMR_CSR_TCF(x) (BITBAND_ACCESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TCF))
#define BR_LPTMR_CSR_TCF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TCF)))
/*! @brief Format value for bitfield LPTMR_CSR_TCF. */
#define BF_LPTMR_CSR_TCF(v) ((uint32_t)((uint32_t)(v) << BP_LPTMR_CSR_TCF) & BM_LPTMR_CSR_TCF)
/*! @brief Set the TCF field to a new value. */
#define BW_LPTMR_CSR_TCF(x, v) (BITBAND_ACCESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TCF) = (v))
#define BW_LPTMR_CSR_TCF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_LPTMR_CSR_ADDR(x), BP_LPTMR_CSR_TCF), v))
/*@}*/
/*******************************************************************************
@ -352,8 +359,8 @@ typedef union _hw_lptmr_psr
#define HW_LPTMR_PSR_ADDR(x) ((x) + 0x4U)
#define HW_LPTMR_PSR(x) (*(__IO hw_lptmr_psr_t *) HW_LPTMR_PSR_ADDR(x))
#define HW_LPTMR_PSR_RD(x) (HW_LPTMR_PSR(x).U)
#define HW_LPTMR_PSR_WR(x, v) (HW_LPTMR_PSR(x).U = (v))
#define HW_LPTMR_PSR_RD(x) (ADDRESS_READ(hw_lptmr_psr_t, HW_LPTMR_PSR_ADDR(x)))
#define HW_LPTMR_PSR_WR(x, v) (ADDRESS_WRITE(hw_lptmr_psr_t, HW_LPTMR_PSR_ADDR(x), v))
#define HW_LPTMR_PSR_SET(x, v) (HW_LPTMR_PSR_WR(x, HW_LPTMR_PSR_RD(x) | (v)))
#define HW_LPTMR_PSR_CLR(x, v) (HW_LPTMR_PSR_WR(x, HW_LPTMR_PSR_RD(x) & ~(v)))
#define HW_LPTMR_PSR_TOG(x, v) (HW_LPTMR_PSR_WR(x, HW_LPTMR_PSR_RD(x) ^ (v)))
@ -383,7 +390,7 @@ typedef union _hw_lptmr_psr
#define BS_LPTMR_PSR_PCS (2U) /*!< Bit field size in bits for LPTMR_PSR_PCS. */
/*! @brief Read current value of the LPTMR_PSR_PCS field. */
#define BR_LPTMR_PSR_PCS(x) (HW_LPTMR_PSR(x).B.PCS)
#define BR_LPTMR_PSR_PCS(x) (UNION_READ(hw_lptmr_psr_t, HW_LPTMR_PSR_ADDR(x), U, B.PCS))
/*! @brief Format value for bitfield LPTMR_PSR_PCS. */
#define BF_LPTMR_PSR_PCS(v) ((uint32_t)((uint32_t)(v) << BP_LPTMR_PSR_PCS) & BM_LPTMR_PSR_PCS)
@ -410,13 +417,13 @@ typedef union _hw_lptmr_psr
#define BS_LPTMR_PSR_PBYP (1U) /*!< Bit field size in bits for LPTMR_PSR_PBYP. */
/*! @brief Read current value of the LPTMR_PSR_PBYP field. */
#define BR_LPTMR_PSR_PBYP(x) (BITBAND_ACCESS32(HW_LPTMR_PSR_ADDR(x), BP_LPTMR_PSR_PBYP))
#define BR_LPTMR_PSR_PBYP(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_LPTMR_PSR_ADDR(x), BP_LPTMR_PSR_PBYP)))
/*! @brief Format value for bitfield LPTMR_PSR_PBYP. */
#define BF_LPTMR_PSR_PBYP(v) ((uint32_t)((uint32_t)(v) << BP_LPTMR_PSR_PBYP) & BM_LPTMR_PSR_PBYP)
/*! @brief Set the PBYP field to a new value. */
#define BW_LPTMR_PSR_PBYP(x, v) (BITBAND_ACCESS32(HW_LPTMR_PSR_ADDR(x), BP_LPTMR_PSR_PBYP) = (v))
#define BW_LPTMR_PSR_PBYP(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_LPTMR_PSR_ADDR(x), BP_LPTMR_PSR_PBYP), v))
/*@}*/
/*!
@ -466,7 +473,7 @@ typedef union _hw_lptmr_psr
#define BS_LPTMR_PSR_PRESCALE (4U) /*!< Bit field size in bits for LPTMR_PSR_PRESCALE. */
/*! @brief Read current value of the LPTMR_PSR_PRESCALE field. */
#define BR_LPTMR_PSR_PRESCALE(x) (HW_LPTMR_PSR(x).B.PRESCALE)
#define BR_LPTMR_PSR_PRESCALE(x) (UNION_READ(hw_lptmr_psr_t, HW_LPTMR_PSR_ADDR(x), U, B.PRESCALE))
/*! @brief Format value for bitfield LPTMR_PSR_PRESCALE. */
#define BF_LPTMR_PSR_PRESCALE(v) ((uint32_t)((uint32_t)(v) << BP_LPTMR_PSR_PRESCALE) & BM_LPTMR_PSR_PRESCALE)
@ -501,8 +508,8 @@ typedef union _hw_lptmr_cmr
#define HW_LPTMR_CMR_ADDR(x) ((x) + 0x8U)
#define HW_LPTMR_CMR(x) (*(__IO hw_lptmr_cmr_t *) HW_LPTMR_CMR_ADDR(x))
#define HW_LPTMR_CMR_RD(x) (HW_LPTMR_CMR(x).U)
#define HW_LPTMR_CMR_WR(x, v) (HW_LPTMR_CMR(x).U = (v))
#define HW_LPTMR_CMR_RD(x) (ADDRESS_READ(hw_lptmr_cmr_t, HW_LPTMR_CMR_ADDR(x)))
#define HW_LPTMR_CMR_WR(x, v) (ADDRESS_WRITE(hw_lptmr_cmr_t, HW_LPTMR_CMR_ADDR(x), v))
#define HW_LPTMR_CMR_SET(x, v) (HW_LPTMR_CMR_WR(x, HW_LPTMR_CMR_RD(x) | (v)))
#define HW_LPTMR_CMR_CLR(x, v) (HW_LPTMR_CMR_WR(x, HW_LPTMR_CMR_RD(x) & ~(v)))
#define HW_LPTMR_CMR_TOG(x, v) (HW_LPTMR_CMR_WR(x, HW_LPTMR_CMR_RD(x) ^ (v)))
@ -527,7 +534,7 @@ typedef union _hw_lptmr_cmr
#define BS_LPTMR_CMR_COMPARE (16U) /*!< Bit field size in bits for LPTMR_CMR_COMPARE. */
/*! @brief Read current value of the LPTMR_CMR_COMPARE field. */
#define BR_LPTMR_CMR_COMPARE(x) (HW_LPTMR_CMR(x).B.COMPARE)
#define BR_LPTMR_CMR_COMPARE(x) (UNION_READ(hw_lptmr_cmr_t, HW_LPTMR_CMR_ADDR(x), U, B.COMPARE))
/*! @brief Format value for bitfield LPTMR_CMR_COMPARE. */
#define BF_LPTMR_CMR_COMPARE(v) ((uint32_t)((uint32_t)(v) << BP_LPTMR_CMR_COMPARE) & BM_LPTMR_CMR_COMPARE)
@ -562,8 +569,8 @@ typedef union _hw_lptmr_cnr
#define HW_LPTMR_CNR_ADDR(x) ((x) + 0xCU)
#define HW_LPTMR_CNR(x) (*(__IO hw_lptmr_cnr_t *) HW_LPTMR_CNR_ADDR(x))
#define HW_LPTMR_CNR_RD(x) (HW_LPTMR_CNR(x).U)
#define HW_LPTMR_CNR_WR(x, v) (HW_LPTMR_CNR(x).U = (v))
#define HW_LPTMR_CNR_RD(x) (ADDRESS_READ(hw_lptmr_cnr_t, HW_LPTMR_CNR_ADDR(x)))
#define HW_LPTMR_CNR_WR(x, v) (ADDRESS_WRITE(hw_lptmr_cnr_t, HW_LPTMR_CNR_ADDR(x), v))
#define HW_LPTMR_CNR_SET(x, v) (HW_LPTMR_CNR_WR(x, HW_LPTMR_CNR_RD(x) | (v)))
#define HW_LPTMR_CNR_CLR(x, v) (HW_LPTMR_CNR_WR(x, HW_LPTMR_CNR_RD(x) & ~(v)))
#define HW_LPTMR_CNR_TOG(x, v) (HW_LPTMR_CNR_WR(x, HW_LPTMR_CNR_RD(x) ^ (v)))
@ -582,7 +589,7 @@ typedef union _hw_lptmr_cnr
#define BS_LPTMR_CNR_COUNTER (16U) /*!< Bit field size in bits for LPTMR_CNR_COUNTER. */
/*! @brief Read current value of the LPTMR_CNR_COUNTER field. */
#define BR_LPTMR_CNR_COUNTER(x) (HW_LPTMR_CNR(x).B.COUNTER)
#define BR_LPTMR_CNR_COUNTER(x) (UNION_READ(hw_lptmr_cnr_t, HW_LPTMR_CNR_ADDR(x), U, B.COUNTER))
/*! @brief Format value for bitfield LPTMR_CNR_COUNTER. */
#define BF_LPTMR_CNR_COUNTER(v) ((uint32_t)((uint32_t)(v) << BP_LPTMR_CNR_COUNTER) & BM_LPTMR_CNR_COUNTER)

189
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_mcg.h
View File

@ -15,6 +15,9 @@
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** (C) COPYRIGHT 2015-2015 ARM Limited
** ALL RIGHTS RESERVED
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
@ -68,6 +71,10 @@
** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
** Update of SystemInit() and SystemCoreClockUpdate() functions.
** Module access macro module_BASES replaced by module_BASE_PTRS.
** - rev. 2.6 (2015-08-03) (ARM)
** All accesses to memory are replaced by equivalent macros; this allows
** memory read/write operations to be re-defined if needed (for example,
** to implement new security features
**
** ###################################################################
*/
@ -136,8 +143,8 @@ typedef union _hw_mcg_c1
#define HW_MCG_C1_ADDR(x) ((x) + 0x0U)
#define HW_MCG_C1(x) (*(__IO hw_mcg_c1_t *) HW_MCG_C1_ADDR(x))
#define HW_MCG_C1_RD(x) (HW_MCG_C1(x).U)
#define HW_MCG_C1_WR(x, v) (HW_MCG_C1(x).U = (v))
#define HW_MCG_C1_RD(x) (ADDRESS_READ(hw_mcg_c1_t, HW_MCG_C1_ADDR(x)))
#define HW_MCG_C1_WR(x, v) (ADDRESS_WRITE(hw_mcg_c1_t, HW_MCG_C1_ADDR(x), v))
#define HW_MCG_C1_SET(x, v) (HW_MCG_C1_WR(x, HW_MCG_C1_RD(x) | (v)))
#define HW_MCG_C1_CLR(x, v) (HW_MCG_C1_WR(x, HW_MCG_C1_RD(x) & ~(v)))
#define HW_MCG_C1_TOG(x, v) (HW_MCG_C1_WR(x, HW_MCG_C1_RD(x) ^ (v)))
@ -164,13 +171,13 @@ typedef union _hw_mcg_c1
#define BS_MCG_C1_IREFSTEN (1U) /*!< Bit field size in bits for MCG_C1_IREFSTEN. */
/*! @brief Read current value of the MCG_C1_IREFSTEN field. */
#define BR_MCG_C1_IREFSTEN(x) (BITBAND_ACCESS8(HW_MCG_C1_ADDR(x), BP_MCG_C1_IREFSTEN))
#define BR_MCG_C1_IREFSTEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_C1_ADDR(x), BP_MCG_C1_IREFSTEN)))
/*! @brief Format value for bitfield MCG_C1_IREFSTEN. */
#define BF_MCG_C1_IREFSTEN(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C1_IREFSTEN) & BM_MCG_C1_IREFSTEN)
/*! @brief Set the IREFSTEN field to a new value. */
#define BW_MCG_C1_IREFSTEN(x, v) (BITBAND_ACCESS8(HW_MCG_C1_ADDR(x), BP_MCG_C1_IREFSTEN) = (v))
#define BW_MCG_C1_IREFSTEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_C1_ADDR(x), BP_MCG_C1_IREFSTEN), v))
/*@}*/
/*!
@ -188,13 +195,13 @@ typedef union _hw_mcg_c1
#define BS_MCG_C1_IRCLKEN (1U) /*!< Bit field size in bits for MCG_C1_IRCLKEN. */
/*! @brief Read current value of the MCG_C1_IRCLKEN field. */
#define BR_MCG_C1_IRCLKEN(x) (BITBAND_ACCESS8(HW_MCG_C1_ADDR(x), BP_MCG_C1_IRCLKEN))
#define BR_MCG_C1_IRCLKEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_C1_ADDR(x), BP_MCG_C1_IRCLKEN)))
/*! @brief Format value for bitfield MCG_C1_IRCLKEN. */
#define BF_MCG_C1_IRCLKEN(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C1_IRCLKEN) & BM_MCG_C1_IRCLKEN)
/*! @brief Set the IRCLKEN field to a new value. */
#define BW_MCG_C1_IRCLKEN(x, v) (BITBAND_ACCESS8(HW_MCG_C1_ADDR(x), BP_MCG_C1_IRCLKEN) = (v))
#define BW_MCG_C1_IRCLKEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_C1_ADDR(x), BP_MCG_C1_IRCLKEN), v))
/*@}*/
/*!
@ -212,13 +219,13 @@ typedef union _hw_mcg_c1
#define BS_MCG_C1_IREFS (1U) /*!< Bit field size in bits for MCG_C1_IREFS. */
/*! @brief Read current value of the MCG_C1_IREFS field. */
#define BR_MCG_C1_IREFS(x) (BITBAND_ACCESS8(HW_MCG_C1_ADDR(x), BP_MCG_C1_IREFS))
#define BR_MCG_C1_IREFS(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_C1_ADDR(x), BP_MCG_C1_IREFS)))
/*! @brief Format value for bitfield MCG_C1_IREFS. */
#define BF_MCG_C1_IREFS(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C1_IREFS) & BM_MCG_C1_IREFS)
/*! @brief Set the IREFS field to a new value. */
#define BW_MCG_C1_IREFS(x, v) (BITBAND_ACCESS8(HW_MCG_C1_ADDR(x), BP_MCG_C1_IREFS) = (v))
#define BW_MCG_C1_IREFS(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_C1_ADDR(x), BP_MCG_C1_IREFS), v))
/*@}*/
/*!
@ -254,7 +261,7 @@ typedef union _hw_mcg_c1
#define BS_MCG_C1_FRDIV (3U) /*!< Bit field size in bits for MCG_C1_FRDIV. */
/*! @brief Read current value of the MCG_C1_FRDIV field. */
#define BR_MCG_C1_FRDIV(x) (HW_MCG_C1(x).B.FRDIV)
#define BR_MCG_C1_FRDIV(x) (UNION_READ(hw_mcg_c1_t, HW_MCG_C1_ADDR(x), U, B.FRDIV))
/*! @brief Format value for bitfield MCG_C1_FRDIV. */
#define BF_MCG_C1_FRDIV(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C1_FRDIV) & BM_MCG_C1_FRDIV)
@ -281,7 +288,7 @@ typedef union _hw_mcg_c1
#define BS_MCG_C1_CLKS (2U) /*!< Bit field size in bits for MCG_C1_CLKS. */
/*! @brief Read current value of the MCG_C1_CLKS field. */
#define BR_MCG_C1_CLKS(x) (HW_MCG_C1(x).B.CLKS)
#define BR_MCG_C1_CLKS(x) (UNION_READ(hw_mcg_c1_t, HW_MCG_C1_ADDR(x), U, B.CLKS))
/*! @brief Format value for bitfield MCG_C1_CLKS. */
#define BF_MCG_C1_CLKS(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C1_CLKS) & BM_MCG_C1_CLKS)
@ -322,8 +329,8 @@ typedef union _hw_mcg_c2
#define HW_MCG_C2_ADDR(x) ((x) + 0x1U)
#define HW_MCG_C2(x) (*(__IO hw_mcg_c2_t *) HW_MCG_C2_ADDR(x))
#define HW_MCG_C2_RD(x) (HW_MCG_C2(x).U)
#define HW_MCG_C2_WR(x, v) (HW_MCG_C2(x).U = (v))
#define HW_MCG_C2_RD(x) (ADDRESS_READ(hw_mcg_c2_t, HW_MCG_C2_ADDR(x)))
#define HW_MCG_C2_WR(x, v) (ADDRESS_WRITE(hw_mcg_c2_t, HW_MCG_C2_ADDR(x), v))
#define HW_MCG_C2_SET(x, v) (HW_MCG_C2_WR(x, HW_MCG_C2_RD(x) | (v)))
#define HW_MCG_C2_CLR(x, v) (HW_MCG_C2_WR(x, HW_MCG_C2_RD(x) & ~(v)))
#define HW_MCG_C2_TOG(x, v) (HW_MCG_C2_WR(x, HW_MCG_C2_RD(x) ^ (v)))
@ -348,13 +355,13 @@ typedef union _hw_mcg_c2
#define BS_MCG_C2_IRCS (1U) /*!< Bit field size in bits for MCG_C2_IRCS. */
/*! @brief Read current value of the MCG_C2_IRCS field. */
#define BR_MCG_C2_IRCS(x) (BITBAND_ACCESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_IRCS))
#define BR_MCG_C2_IRCS(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_IRCS)))
/*! @brief Format value for bitfield MCG_C2_IRCS. */
#define BF_MCG_C2_IRCS(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C2_IRCS) & BM_MCG_C2_IRCS)
/*! @brief Set the IRCS field to a new value. */
#define BW_MCG_C2_IRCS(x, v) (BITBAND_ACCESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_IRCS) = (v))
#define BW_MCG_C2_IRCS(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_IRCS), v))
/*@}*/
/*!
@ -375,13 +382,13 @@ typedef union _hw_mcg_c2
#define BS_MCG_C2_LP (1U) /*!< Bit field size in bits for MCG_C2_LP. */
/*! @brief Read current value of the MCG_C2_LP field. */
#define BR_MCG_C2_LP(x) (BITBAND_ACCESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_LP))
#define BR_MCG_C2_LP(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_LP)))
/*! @brief Format value for bitfield MCG_C2_LP. */
#define BF_MCG_C2_LP(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C2_LP) & BM_MCG_C2_LP)
/*! @brief Set the LP field to a new value. */
#define BW_MCG_C2_LP(x, v) (BITBAND_ACCESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_LP) = (v))
#define BW_MCG_C2_LP(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_LP), v))
/*@}*/
/*!
@ -400,13 +407,13 @@ typedef union _hw_mcg_c2
#define BS_MCG_C2_EREFS (1U) /*!< Bit field size in bits for MCG_C2_EREFS. */
/*! @brief Read current value of the MCG_C2_EREFS field. */
#define BR_MCG_C2_EREFS(x) (BITBAND_ACCESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_EREFS))
#define BR_MCG_C2_EREFS(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_EREFS)))
/*! @brief Format value for bitfield MCG_C2_EREFS. */
#define BF_MCG_C2_EREFS(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C2_EREFS) & BM_MCG_C2_EREFS)
/*! @brief Set the EREFS field to a new value. */
#define BW_MCG_C2_EREFS(x, v) (BITBAND_ACCESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_EREFS) = (v))
#define BW_MCG_C2_EREFS(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_EREFS), v))
/*@}*/
/*!
@ -425,13 +432,13 @@ typedef union _hw_mcg_c2
#define BS_MCG_C2_HGO (1U) /*!< Bit field size in bits for MCG_C2_HGO. */
/*! @brief Read current value of the MCG_C2_HGO field. */
#define BR_MCG_C2_HGO(x) (BITBAND_ACCESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_HGO))
#define BR_MCG_C2_HGO(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_HGO)))
/*! @brief Format value for bitfield MCG_C2_HGO. */
#define BF_MCG_C2_HGO(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C2_HGO) & BM_MCG_C2_HGO)
/*! @brief Set the HGO field to a new value. */
#define BW_MCG_C2_HGO(x, v) (BITBAND_ACCESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_HGO) = (v))
#define BW_MCG_C2_HGO(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_HGO), v))
/*@}*/
/*!
@ -451,7 +458,7 @@ typedef union _hw_mcg_c2
#define BS_MCG_C2_RANGE (2U) /*!< Bit field size in bits for MCG_C2_RANGE. */
/*! @brief Read current value of the MCG_C2_RANGE field. */
#define BR_MCG_C2_RANGE(x) (HW_MCG_C2(x).B.RANGE)
#define BR_MCG_C2_RANGE(x) (UNION_READ(hw_mcg_c2_t, HW_MCG_C2_ADDR(x), U, B.RANGE))
/*! @brief Format value for bitfield MCG_C2_RANGE. */
#define BF_MCG_C2_RANGE(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C2_RANGE) & BM_MCG_C2_RANGE)
@ -475,13 +482,13 @@ typedef union _hw_mcg_c2
#define BS_MCG_C2_FCFTRIM (1U) /*!< Bit field size in bits for MCG_C2_FCFTRIM. */
/*! @brief Read current value of the MCG_C2_FCFTRIM field. */
#define BR_MCG_C2_FCFTRIM(x) (BITBAND_ACCESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_FCFTRIM))
#define BR_MCG_C2_FCFTRIM(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_FCFTRIM)))
/*! @brief Format value for bitfield MCG_C2_FCFTRIM. */
#define BF_MCG_C2_FCFTRIM(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C2_FCFTRIM) & BM_MCG_C2_FCFTRIM)
/*! @brief Set the FCFTRIM field to a new value. */
#define BW_MCG_C2_FCFTRIM(x, v) (BITBAND_ACCESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_FCFTRIM) = (v))
#define BW_MCG_C2_FCFTRIM(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_FCFTRIM), v))
/*@}*/
/*!
@ -502,13 +509,13 @@ typedef union _hw_mcg_c2
#define BS_MCG_C2_LOCRE0 (1U) /*!< Bit field size in bits for MCG_C2_LOCRE0. */
/*! @brief Read current value of the MCG_C2_LOCRE0 field. */
#define BR_MCG_C2_LOCRE0(x) (BITBAND_ACCESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_LOCRE0))
#define BR_MCG_C2_LOCRE0(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_LOCRE0)))
/*! @brief Format value for bitfield MCG_C2_LOCRE0. */
#define BF_MCG_C2_LOCRE0(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C2_LOCRE0) & BM_MCG_C2_LOCRE0)
/*! @brief Set the LOCRE0 field to a new value. */
#define BW_MCG_C2_LOCRE0(x, v) (BITBAND_ACCESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_LOCRE0) = (v))
#define BW_MCG_C2_LOCRE0(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_C2_ADDR(x), BP_MCG_C2_LOCRE0), v))
/*@}*/
/*******************************************************************************
@ -537,8 +544,8 @@ typedef union _hw_mcg_c3
#define HW_MCG_C3_ADDR(x) ((x) + 0x2U)
#define HW_MCG_C3(x) (*(__IO hw_mcg_c3_t *) HW_MCG_C3_ADDR(x))
#define HW_MCG_C3_RD(x) (HW_MCG_C3(x).U)
#define HW_MCG_C3_WR(x, v) (HW_MCG_C3(x).U = (v))
#define HW_MCG_C3_RD(x) (ADDRESS_READ(hw_mcg_c3_t, HW_MCG_C3_ADDR(x)))
#define HW_MCG_C3_WR(x, v) (ADDRESS_WRITE(hw_mcg_c3_t, HW_MCG_C3_ADDR(x), v))
#define HW_MCG_C3_SET(x, v) (HW_MCG_C3_WR(x, HW_MCG_C3_RD(x) | (v)))
#define HW_MCG_C3_CLR(x, v) (HW_MCG_C3_WR(x, HW_MCG_C3_RD(x) & ~(v)))
#define HW_MCG_C3_TOG(x, v) (HW_MCG_C3_WR(x, HW_MCG_C3_RD(x) ^ (v)))
@ -609,8 +616,8 @@ typedef union _hw_mcg_c4
#define HW_MCG_C4_ADDR(x) ((x) + 0x3U)
#define HW_MCG_C4(x) (*(__IO hw_mcg_c4_t *) HW_MCG_C4_ADDR(x))
#define HW_MCG_C4_RD(x) (HW_MCG_C4(x).U)
#define HW_MCG_C4_WR(x, v) (HW_MCG_C4(x).U = (v))
#define HW_MCG_C4_RD(x) (ADDRESS_READ(hw_mcg_c4_t, HW_MCG_C4_ADDR(x)))
#define HW_MCG_C4_WR(x, v) (ADDRESS_WRITE(hw_mcg_c4_t, HW_MCG_C4_ADDR(x), v))
#define HW_MCG_C4_SET(x, v) (HW_MCG_C4_WR(x, HW_MCG_C4_RD(x) | (v)))
#define HW_MCG_C4_CLR(x, v) (HW_MCG_C4_WR(x, HW_MCG_C4_RD(x) & ~(v)))
#define HW_MCG_C4_TOG(x, v) (HW_MCG_C4_WR(x, HW_MCG_C4_RD(x) ^ (v)))
@ -636,13 +643,13 @@ typedef union _hw_mcg_c4
#define BS_MCG_C4_SCFTRIM (1U) /*!< Bit field size in bits for MCG_C4_SCFTRIM. */
/*! @brief Read current value of the MCG_C4_SCFTRIM field. */
#define BR_MCG_C4_SCFTRIM(x) (BITBAND_ACCESS8(HW_MCG_C4_ADDR(x), BP_MCG_C4_SCFTRIM))
#define BR_MCG_C4_SCFTRIM(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_C4_ADDR(x), BP_MCG_C4_SCFTRIM)))
/*! @brief Format value for bitfield MCG_C4_SCFTRIM. */
#define BF_MCG_C4_SCFTRIM(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C4_SCFTRIM) & BM_MCG_C4_SCFTRIM)
/*! @brief Set the SCFTRIM field to a new value. */
#define BW_MCG_C4_SCFTRIM(x, v) (BITBAND_ACCESS8(HW_MCG_C4_ADDR(x), BP_MCG_C4_SCFTRIM) = (v))
#define BW_MCG_C4_SCFTRIM(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_C4_ADDR(x), BP_MCG_C4_SCFTRIM), v))
/*@}*/
/*!
@ -662,7 +669,7 @@ typedef union _hw_mcg_c4
#define BS_MCG_C4_FCTRIM (4U) /*!< Bit field size in bits for MCG_C4_FCTRIM. */
/*! @brief Read current value of the MCG_C4_FCTRIM field. */
#define BR_MCG_C4_FCTRIM(x) (HW_MCG_C4(x).B.FCTRIM)
#define BR_MCG_C4_FCTRIM(x) (UNION_READ(hw_mcg_c4_t, HW_MCG_C4_ADDR(x), U, B.FCTRIM))
/*! @brief Format value for bitfield MCG_C4_FCTRIM. */
#define BF_MCG_C4_FCTRIM(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C4_FCTRIM) & BM_MCG_C4_FCTRIM)
@ -692,7 +699,7 @@ typedef union _hw_mcg_c4
#define BS_MCG_C4_DRST_DRS (2U) /*!< Bit field size in bits for MCG_C4_DRST_DRS. */
/*! @brief Read current value of the MCG_C4_DRST_DRS field. */
#define BR_MCG_C4_DRST_DRS(x) (HW_MCG_C4(x).B.DRST_DRS)
#define BR_MCG_C4_DRST_DRS(x) (UNION_READ(hw_mcg_c4_t, HW_MCG_C4_ADDR(x), U, B.DRST_DRS))
/*! @brief Format value for bitfield MCG_C4_DRST_DRS. */
#define BF_MCG_C4_DRST_DRS(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C4_DRST_DRS) & BM_MCG_C4_DRST_DRS)
@ -723,13 +730,13 @@ typedef union _hw_mcg_c4
#define BS_MCG_C4_DMX32 (1U) /*!< Bit field size in bits for MCG_C4_DMX32. */
/*! @brief Read current value of the MCG_C4_DMX32 field. */
#define BR_MCG_C4_DMX32(x) (BITBAND_ACCESS8(HW_MCG_C4_ADDR(x), BP_MCG_C4_DMX32))
#define BR_MCG_C4_DMX32(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_C4_ADDR(x), BP_MCG_C4_DMX32)))
/*! @brief Format value for bitfield MCG_C4_DMX32. */
#define BF_MCG_C4_DMX32(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C4_DMX32) & BM_MCG_C4_DMX32)
/*! @brief Set the DMX32 field to a new value. */
#define BW_MCG_C4_DMX32(x, v) (BITBAND_ACCESS8(HW_MCG_C4_ADDR(x), BP_MCG_C4_DMX32) = (v))
#define BW_MCG_C4_DMX32(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_C4_ADDR(x), BP_MCG_C4_DMX32), v))
/*@}*/
/*******************************************************************************
@ -760,8 +767,8 @@ typedef union _hw_mcg_c5
#define HW_MCG_C5_ADDR(x) ((x) + 0x4U)
#define HW_MCG_C5(x) (*(__IO hw_mcg_c5_t *) HW_MCG_C5_ADDR(x))
#define HW_MCG_C5_RD(x) (HW_MCG_C5(x).U)
#define HW_MCG_C5_WR(x, v) (HW_MCG_C5(x).U = (v))
#define HW_MCG_C5_RD(x) (ADDRESS_READ(hw_mcg_c5_t, HW_MCG_C5_ADDR(x)))
#define HW_MCG_C5_WR(x, v) (ADDRESS_WRITE(hw_mcg_c5_t, HW_MCG_C5_ADDR(x), v))
#define HW_MCG_C5_SET(x, v) (HW_MCG_C5_WR(x, HW_MCG_C5_RD(x) | (v)))
#define HW_MCG_C5_CLR(x, v) (HW_MCG_C5_WR(x, HW_MCG_C5_RD(x) & ~(v)))
#define HW_MCG_C5_TOG(x, v) (HW_MCG_C5_WR(x, HW_MCG_C5_RD(x) ^ (v)))
@ -791,7 +798,7 @@ typedef union _hw_mcg_c5
#define BS_MCG_C5_PRDIV0 (5U) /*!< Bit field size in bits for MCG_C5_PRDIV0. */
/*! @brief Read current value of the MCG_C5_PRDIV0 field. */
#define BR_MCG_C5_PRDIV0(x) (HW_MCG_C5(x).B.PRDIV0)
#define BR_MCG_C5_PRDIV0(x) (UNION_READ(hw_mcg_c5_t, HW_MCG_C5_ADDR(x), U, B.PRDIV0))
/*! @brief Format value for bitfield MCG_C5_PRDIV0. */
#define BF_MCG_C5_PRDIV0(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C5_PRDIV0) & BM_MCG_C5_PRDIV0)
@ -817,13 +824,13 @@ typedef union _hw_mcg_c5
#define BS_MCG_C5_PLLSTEN0 (1U) /*!< Bit field size in bits for MCG_C5_PLLSTEN0. */
/*! @brief Read current value of the MCG_C5_PLLSTEN0 field. */
#define BR_MCG_C5_PLLSTEN0(x) (BITBAND_ACCESS8(HW_MCG_C5_ADDR(x), BP_MCG_C5_PLLSTEN0))
#define BR_MCG_C5_PLLSTEN0(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_C5_ADDR(x), BP_MCG_C5_PLLSTEN0)))
/*! @brief Format value for bitfield MCG_C5_PLLSTEN0. */
#define BF_MCG_C5_PLLSTEN0(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C5_PLLSTEN0) & BM_MCG_C5_PLLSTEN0)
/*! @brief Set the PLLSTEN0 field to a new value. */
#define BW_MCG_C5_PLLSTEN0(x, v) (BITBAND_ACCESS8(HW_MCG_C5_ADDR(x), BP_MCG_C5_PLLSTEN0) = (v))
#define BW_MCG_C5_PLLSTEN0(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_C5_ADDR(x), BP_MCG_C5_PLLSTEN0), v))
/*@}*/
/*!
@ -847,13 +854,13 @@ typedef union _hw_mcg_c5
#define BS_MCG_C5_PLLCLKEN0 (1U) /*!< Bit field size in bits for MCG_C5_PLLCLKEN0. */
/*! @brief Read current value of the MCG_C5_PLLCLKEN0 field. */
#define BR_MCG_C5_PLLCLKEN0(x) (BITBAND_ACCESS8(HW_MCG_C5_ADDR(x), BP_MCG_C5_PLLCLKEN0))
#define BR_MCG_C5_PLLCLKEN0(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_C5_ADDR(x), BP_MCG_C5_PLLCLKEN0)))
/*! @brief Format value for bitfield MCG_C5_PLLCLKEN0. */
#define BF_MCG_C5_PLLCLKEN0(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C5_PLLCLKEN0) & BM_MCG_C5_PLLCLKEN0)
/*! @brief Set the PLLCLKEN0 field to a new value. */
#define BW_MCG_C5_PLLCLKEN0(x, v) (BITBAND_ACCESS8(HW_MCG_C5_ADDR(x), BP_MCG_C5_PLLCLKEN0) = (v))
#define BW_MCG_C5_PLLCLKEN0(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_C5_ADDR(x), BP_MCG_C5_PLLCLKEN0), v))
/*@}*/
/*******************************************************************************
@ -884,8 +891,8 @@ typedef union _hw_mcg_c6
#define HW_MCG_C6_ADDR(x) ((x) + 0x5U)
#define HW_MCG_C6(x) (*(__IO hw_mcg_c6_t *) HW_MCG_C6_ADDR(x))
#define HW_MCG_C6_RD(x) (HW_MCG_C6(x).U)
#define HW_MCG_C6_WR(x, v) (HW_MCG_C6(x).U = (v))
#define HW_MCG_C6_RD(x) (ADDRESS_READ(hw_mcg_c6_t, HW_MCG_C6_ADDR(x)))
#define HW_MCG_C6_WR(x, v) (ADDRESS_WRITE(hw_mcg_c6_t, HW_MCG_C6_ADDR(x), v))
#define HW_MCG_C6_SET(x, v) (HW_MCG_C6_WR(x, HW_MCG_C6_RD(x) | (v)))
#define HW_MCG_C6_CLR(x, v) (HW_MCG_C6_WR(x, HW_MCG_C6_RD(x) & ~(v)))
#define HW_MCG_C6_TOG(x, v) (HW_MCG_C6_WR(x, HW_MCG_C6_RD(x) ^ (v)))
@ -914,7 +921,7 @@ typedef union _hw_mcg_c6
#define BS_MCG_C6_VDIV0 (5U) /*!< Bit field size in bits for MCG_C6_VDIV0. */
/*! @brief Read current value of the MCG_C6_VDIV0 field. */
#define BR_MCG_C6_VDIV0(x) (HW_MCG_C6(x).B.VDIV0)
#define BR_MCG_C6_VDIV0(x) (UNION_READ(hw_mcg_c6_t, HW_MCG_C6_ADDR(x), U, B.VDIV0))
/*! @brief Format value for bitfield MCG_C6_VDIV0. */
#define BF_MCG_C6_VDIV0(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C6_VDIV0) & BM_MCG_C6_VDIV0)
@ -946,13 +953,13 @@ typedef union _hw_mcg_c6
#define BS_MCG_C6_CME0 (1U) /*!< Bit field size in bits for MCG_C6_CME0. */
/*! @brief Read current value of the MCG_C6_CME0 field. */
#define BR_MCG_C6_CME0(x) (BITBAND_ACCESS8(HW_MCG_C6_ADDR(x), BP_MCG_C6_CME0))
#define BR_MCG_C6_CME0(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_C6_ADDR(x), BP_MCG_C6_CME0)))
/*! @brief Format value for bitfield MCG_C6_CME0. */
#define BF_MCG_C6_CME0(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C6_CME0) & BM_MCG_C6_CME0)
/*! @brief Set the CME0 field to a new value. */
#define BW_MCG_C6_CME0(x, v) (BITBAND_ACCESS8(HW_MCG_C6_ADDR(x), BP_MCG_C6_CME0) = (v))
#define BW_MCG_C6_CME0(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_C6_ADDR(x), BP_MCG_C6_CME0), v))
/*@}*/
/*!
@ -974,13 +981,13 @@ typedef union _hw_mcg_c6
#define BS_MCG_C6_PLLS (1U) /*!< Bit field size in bits for MCG_C6_PLLS. */
/*! @brief Read current value of the MCG_C6_PLLS field. */
#define BR_MCG_C6_PLLS(x) (BITBAND_ACCESS8(HW_MCG_C6_ADDR(x), BP_MCG_C6_PLLS))
#define BR_MCG_C6_PLLS(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_C6_ADDR(x), BP_MCG_C6_PLLS)))
/*! @brief Format value for bitfield MCG_C6_PLLS. */
#define BF_MCG_C6_PLLS(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C6_PLLS) & BM_MCG_C6_PLLS)
/*! @brief Set the PLLS field to a new value. */
#define BW_MCG_C6_PLLS(x, v) (BITBAND_ACCESS8(HW_MCG_C6_ADDR(x), BP_MCG_C6_PLLS) = (v))
#define BW_MCG_C6_PLLS(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_C6_ADDR(x), BP_MCG_C6_PLLS), v))
/*@}*/
/*!
@ -999,13 +1006,13 @@ typedef union _hw_mcg_c6
#define BS_MCG_C6_LOLIE0 (1U) /*!< Bit field size in bits for MCG_C6_LOLIE0. */
/*! @brief Read current value of the MCG_C6_LOLIE0 field. */
#define BR_MCG_C6_LOLIE0(x) (BITBAND_ACCESS8(HW_MCG_C6_ADDR(x), BP_MCG_C6_LOLIE0))
#define BR_MCG_C6_LOLIE0(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_C6_ADDR(x), BP_MCG_C6_LOLIE0)))
/*! @brief Format value for bitfield MCG_C6_LOLIE0. */
#define BF_MCG_C6_LOLIE0(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C6_LOLIE0) & BM_MCG_C6_LOLIE0)
/*! @brief Set the LOLIE0 field to a new value. */
#define BW_MCG_C6_LOLIE0(x, v) (BITBAND_ACCESS8(HW_MCG_C6_ADDR(x), BP_MCG_C6_LOLIE0) = (v))
#define BW_MCG_C6_LOLIE0(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_C6_ADDR(x), BP_MCG_C6_LOLIE0), v))
/*@}*/
/*******************************************************************************
@ -1039,8 +1046,8 @@ typedef union _hw_mcg_s
#define HW_MCG_S_ADDR(x) ((x) + 0x6U)
#define HW_MCG_S(x) (*(__IO hw_mcg_s_t *) HW_MCG_S_ADDR(x))
#define HW_MCG_S_RD(x) (HW_MCG_S(x).U)
#define HW_MCG_S_WR(x, v) (HW_MCG_S(x).U = (v))
#define HW_MCG_S_RD(x) (ADDRESS_READ(hw_mcg_s_t, HW_MCG_S_ADDR(x)))
#define HW_MCG_S_WR(x, v) (ADDRESS_WRITE(hw_mcg_s_t, HW_MCG_S_ADDR(x), v))
#define HW_MCG_S_SET(x, v) (HW_MCG_S_WR(x, HW_MCG_S_RD(x) | (v)))
#define HW_MCG_S_CLR(x, v) (HW_MCG_S_WR(x, HW_MCG_S_RD(x) & ~(v)))
#define HW_MCG_S_TOG(x, v) (HW_MCG_S_WR(x, HW_MCG_S_RD(x) ^ (v)))
@ -1070,7 +1077,7 @@ typedef union _hw_mcg_s
#define BS_MCG_S_IRCST (1U) /*!< Bit field size in bits for MCG_S_IRCST. */
/*! @brief Read current value of the MCG_S_IRCST field. */
#define BR_MCG_S_IRCST(x) (BITBAND_ACCESS8(HW_MCG_S_ADDR(x), BP_MCG_S_IRCST))
#define BR_MCG_S_IRCST(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_S_ADDR(x), BP_MCG_S_IRCST)))
/*@}*/
/*!
@ -1087,7 +1094,7 @@ typedef union _hw_mcg_s
#define BS_MCG_S_OSCINIT0 (1U) /*!< Bit field size in bits for MCG_S_OSCINIT0. */
/*! @brief Read current value of the MCG_S_OSCINIT0 field. */
#define BR_MCG_S_OSCINIT0(x) (BITBAND_ACCESS8(HW_MCG_S_ADDR(x), BP_MCG_S_OSCINIT0))
#define BR_MCG_S_OSCINIT0(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_S_ADDR(x), BP_MCG_S_OSCINIT0)))
/*@}*/
/*!
@ -1109,7 +1116,7 @@ typedef union _hw_mcg_s
#define BS_MCG_S_CLKST (2U) /*!< Bit field size in bits for MCG_S_CLKST. */
/*! @brief Read current value of the MCG_S_CLKST field. */
#define BR_MCG_S_CLKST(x) (HW_MCG_S(x).B.CLKST)
#define BR_MCG_S_CLKST(x) (UNION_READ(hw_mcg_s_t, HW_MCG_S_ADDR(x), U, B.CLKST))
/*@}*/
/*!
@ -1129,7 +1136,7 @@ typedef union _hw_mcg_s
#define BS_MCG_S_IREFST (1U) /*!< Bit field size in bits for MCG_S_IREFST. */
/*! @brief Read current value of the MCG_S_IREFST field. */
#define BR_MCG_S_IREFST(x) (BITBAND_ACCESS8(HW_MCG_S_ADDR(x), BP_MCG_S_IREFST))
#define BR_MCG_S_IREFST(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_S_ADDR(x), BP_MCG_S_IREFST)))
/*@}*/
/*!
@ -1149,7 +1156,7 @@ typedef union _hw_mcg_s
#define BS_MCG_S_PLLST (1U) /*!< Bit field size in bits for MCG_S_PLLST. */
/*! @brief Read current value of the MCG_S_PLLST field. */
#define BR_MCG_S_PLLST(x) (BITBAND_ACCESS8(HW_MCG_S_ADDR(x), BP_MCG_S_PLLST))
#define BR_MCG_S_PLLST(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_S_ADDR(x), BP_MCG_S_PLLST)))
/*@}*/
/*!
@ -1179,7 +1186,7 @@ typedef union _hw_mcg_s
#define BS_MCG_S_LOCK0 (1U) /*!< Bit field size in bits for MCG_S_LOCK0. */
/*! @brief Read current value of the MCG_S_LOCK0 field. */
#define BR_MCG_S_LOCK0(x) (BITBAND_ACCESS8(HW_MCG_S_ADDR(x), BP_MCG_S_LOCK0))
#define BR_MCG_S_LOCK0(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_S_ADDR(x), BP_MCG_S_LOCK0)))
/*@}*/
/*!
@ -1202,13 +1209,13 @@ typedef union _hw_mcg_s
#define BS_MCG_S_LOLS0 (1U) /*!< Bit field size in bits for MCG_S_LOLS0. */
/*! @brief Read current value of the MCG_S_LOLS0 field. */
#define BR_MCG_S_LOLS0(x) (BITBAND_ACCESS8(HW_MCG_S_ADDR(x), BP_MCG_S_LOLS0))
#define BR_MCG_S_LOLS0(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_S_ADDR(x), BP_MCG_S_LOLS0)))
/*! @brief Format value for bitfield MCG_S_LOLS0. */
#define BF_MCG_S_LOLS0(v) ((uint8_t)((uint8_t)(v) << BP_MCG_S_LOLS0) & BM_MCG_S_LOLS0)
/*! @brief Set the LOLS0 field to a new value. */
#define BW_MCG_S_LOLS0(x, v) (BITBAND_ACCESS8(HW_MCG_S_ADDR(x), BP_MCG_S_LOLS0) = (v))
#define BW_MCG_S_LOLS0(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_S_ADDR(x), BP_MCG_S_LOLS0), v))
/*@}*/
/*******************************************************************************
@ -1242,8 +1249,8 @@ typedef union _hw_mcg_sc
#define HW_MCG_SC_ADDR(x) ((x) + 0x8U)
#define HW_MCG_SC(x) (*(__IO hw_mcg_sc_t *) HW_MCG_SC_ADDR(x))
#define HW_MCG_SC_RD(x) (HW_MCG_SC(x).U)
#define HW_MCG_SC_WR(x, v) (HW_MCG_SC(x).U = (v))
#define HW_MCG_SC_RD(x) (ADDRESS_READ(hw_mcg_sc_t, HW_MCG_SC_ADDR(x)))
#define HW_MCG_SC_WR(x, v) (ADDRESS_WRITE(hw_mcg_sc_t, HW_MCG_SC_ADDR(x), v))
#define HW_MCG_SC_SET(x, v) (HW_MCG_SC_WR(x, HW_MCG_SC_RD(x) | (v)))
#define HW_MCG_SC_CLR(x, v) (HW_MCG_SC_WR(x, HW_MCG_SC_RD(x) & ~(v)))
#define HW_MCG_SC_TOG(x, v) (HW_MCG_SC_WR(x, HW_MCG_SC_RD(x) ^ (v)))
@ -1270,13 +1277,13 @@ typedef union _hw_mcg_sc
#define BS_MCG_SC_LOCS0 (1U) /*!< Bit field size in bits for MCG_SC_LOCS0. */
/*! @brief Read current value of the MCG_SC_LOCS0 field. */
#define BR_MCG_SC_LOCS0(x) (BITBAND_ACCESS8(HW_MCG_SC_ADDR(x), BP_MCG_SC_LOCS0))
#define BR_MCG_SC_LOCS0(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_SC_ADDR(x), BP_MCG_SC_LOCS0)))
/*! @brief Format value for bitfield MCG_SC_LOCS0. */
#define BF_MCG_SC_LOCS0(v) ((uint8_t)((uint8_t)(v) << BP_MCG_SC_LOCS0) & BM_MCG_SC_LOCS0)
/*! @brief Set the LOCS0 field to a new value. */
#define BW_MCG_SC_LOCS0(x, v) (BITBAND_ACCESS8(HW_MCG_SC_ADDR(x), BP_MCG_SC_LOCS0) = (v))
#define BW_MCG_SC_LOCS0(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_SC_ADDR(x), BP_MCG_SC_LOCS0), v))
/*@}*/
/*!
@ -1302,7 +1309,7 @@ typedef union _hw_mcg_sc
#define BS_MCG_SC_FCRDIV (3U) /*!< Bit field size in bits for MCG_SC_FCRDIV. */
/*! @brief Read current value of the MCG_SC_FCRDIV field. */
#define BR_MCG_SC_FCRDIV(x) (HW_MCG_SC(x).B.FCRDIV)
#define BR_MCG_SC_FCRDIV(x) (UNION_READ(hw_mcg_sc_t, HW_MCG_SC_ADDR(x), U, B.FCRDIV))
/*! @brief Format value for bitfield MCG_SC_FCRDIV. */
#define BF_MCG_SC_FCRDIV(v) ((uint8_t)((uint8_t)(v) << BP_MCG_SC_FCRDIV) & BM_MCG_SC_FCRDIV)
@ -1332,13 +1339,13 @@ typedef union _hw_mcg_sc
#define BS_MCG_SC_FLTPRSRV (1U) /*!< Bit field size in bits for MCG_SC_FLTPRSRV. */
/*! @brief Read current value of the MCG_SC_FLTPRSRV field. */
#define BR_MCG_SC_FLTPRSRV(x) (BITBAND_ACCESS8(HW_MCG_SC_ADDR(x), BP_MCG_SC_FLTPRSRV))
#define BR_MCG_SC_FLTPRSRV(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_SC_ADDR(x), BP_MCG_SC_FLTPRSRV)))
/*! @brief Format value for bitfield MCG_SC_FLTPRSRV. */
#define BF_MCG_SC_FLTPRSRV(v) ((uint8_t)((uint8_t)(v) << BP_MCG_SC_FLTPRSRV) & BM_MCG_SC_FLTPRSRV)
/*! @brief Set the FLTPRSRV field to a new value. */
#define BW_MCG_SC_FLTPRSRV(x, v) (BITBAND_ACCESS8(HW_MCG_SC_ADDR(x), BP_MCG_SC_FLTPRSRV) = (v))
#define BW_MCG_SC_FLTPRSRV(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_SC_ADDR(x), BP_MCG_SC_FLTPRSRV), v))
/*@}*/
/*!
@ -1359,13 +1366,13 @@ typedef union _hw_mcg_sc
#define BS_MCG_SC_ATMF (1U) /*!< Bit field size in bits for MCG_SC_ATMF. */
/*! @brief Read current value of the MCG_SC_ATMF field. */
#define BR_MCG_SC_ATMF(x) (BITBAND_ACCESS8(HW_MCG_SC_ADDR(x), BP_MCG_SC_ATMF))
#define BR_MCG_SC_ATMF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_SC_ADDR(x), BP_MCG_SC_ATMF)))
/*! @brief Format value for bitfield MCG_SC_ATMF. */
#define BF_MCG_SC_ATMF(v) ((uint8_t)((uint8_t)(v) << BP_MCG_SC_ATMF) & BM_MCG_SC_ATMF)
/*! @brief Set the ATMF field to a new value. */
#define BW_MCG_SC_ATMF(x, v) (BITBAND_ACCESS8(HW_MCG_SC_ADDR(x), BP_MCG_SC_ATMF) = (v))
#define BW_MCG_SC_ATMF(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_SC_ADDR(x), BP_MCG_SC_ATMF), v))
/*@}*/
/*!
@ -1383,13 +1390,13 @@ typedef union _hw_mcg_sc
#define BS_MCG_SC_ATMS (1U) /*!< Bit field size in bits for MCG_SC_ATMS. */
/*! @brief Read current value of the MCG_SC_ATMS field. */
#define BR_MCG_SC_ATMS(x) (BITBAND_ACCESS8(HW_MCG_SC_ADDR(x), BP_MCG_SC_ATMS))
#define BR_MCG_SC_ATMS(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_SC_ADDR(x), BP_MCG_SC_ATMS)))
/*! @brief Format value for bitfield MCG_SC_ATMS. */
#define BF_MCG_SC_ATMS(v) ((uint8_t)((uint8_t)(v) << BP_MCG_SC_ATMS) & BM_MCG_SC_ATMS)
/*! @brief Set the ATMS field to a new value. */
#define BW_MCG_SC_ATMS(x, v) (BITBAND_ACCESS8(HW_MCG_SC_ADDR(x), BP_MCG_SC_ATMS) = (v))
#define BW_MCG_SC_ATMS(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_SC_ADDR(x), BP_MCG_SC_ATMS), v))
/*@}*/
/*!
@ -1411,13 +1418,13 @@ typedef union _hw_mcg_sc
#define BS_MCG_SC_ATME (1U) /*!< Bit field size in bits for MCG_SC_ATME. */
/*! @brief Read current value of the MCG_SC_ATME field. */
#define BR_MCG_SC_ATME(x) (BITBAND_ACCESS8(HW_MCG_SC_ADDR(x), BP_MCG_SC_ATME))
#define BR_MCG_SC_ATME(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_SC_ADDR(x), BP_MCG_SC_ATME)))
/*! @brief Format value for bitfield MCG_SC_ATME. */
#define BF_MCG_SC_ATME(v) ((uint8_t)((uint8_t)(v) << BP_MCG_SC_ATME) & BM_MCG_SC_ATME)
/*! @brief Set the ATME field to a new value. */
#define BW_MCG_SC_ATME(x, v) (BITBAND_ACCESS8(HW_MCG_SC_ADDR(x), BP_MCG_SC_ATME) = (v))
#define BW_MCG_SC_ATME(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_SC_ADDR(x), BP_MCG_SC_ATME), v))
/*@}*/
/*******************************************************************************
@ -1445,8 +1452,8 @@ typedef union _hw_mcg_atcvh
#define HW_MCG_ATCVH_ADDR(x) ((x) + 0xAU)
#define HW_MCG_ATCVH(x) (*(__IO hw_mcg_atcvh_t *) HW_MCG_ATCVH_ADDR(x))
#define HW_MCG_ATCVH_RD(x) (HW_MCG_ATCVH(x).U)
#define HW_MCG_ATCVH_WR(x, v) (HW_MCG_ATCVH(x).U = (v))
#define HW_MCG_ATCVH_RD(x) (ADDRESS_READ(hw_mcg_atcvh_t, HW_MCG_ATCVH_ADDR(x)))
#define HW_MCG_ATCVH_WR(x, v) (ADDRESS_WRITE(hw_mcg_atcvh_t, HW_MCG_ATCVH_ADDR(x), v))
#define HW_MCG_ATCVH_SET(x, v) (HW_MCG_ATCVH_WR(x, HW_MCG_ATCVH_RD(x) | (v)))
#define HW_MCG_ATCVH_CLR(x, v) (HW_MCG_ATCVH_WR(x, HW_MCG_ATCVH_RD(x) & ~(v)))
#define HW_MCG_ATCVH_TOG(x, v) (HW_MCG_ATCVH_WR(x, HW_MCG_ATCVH_RD(x) ^ (v)))
@ -1502,8 +1509,8 @@ typedef union _hw_mcg_atcvl
#define HW_MCG_ATCVL_ADDR(x) ((x) + 0xBU)
#define HW_MCG_ATCVL(x) (*(__IO hw_mcg_atcvl_t *) HW_MCG_ATCVL_ADDR(x))
#define HW_MCG_ATCVL_RD(x) (HW_MCG_ATCVL(x).U)
#define HW_MCG_ATCVL_WR(x, v) (HW_MCG_ATCVL(x).U = (v))
#define HW_MCG_ATCVL_RD(x) (ADDRESS_READ(hw_mcg_atcvl_t, HW_MCG_ATCVL_ADDR(x)))
#define HW_MCG_ATCVL_WR(x, v) (ADDRESS_WRITE(hw_mcg_atcvl_t, HW_MCG_ATCVL_ADDR(x), v))
#define HW_MCG_ATCVL_SET(x, v) (HW_MCG_ATCVL_WR(x, HW_MCG_ATCVL_RD(x) | (v)))
#define HW_MCG_ATCVL_CLR(x, v) (HW_MCG_ATCVL_WR(x, HW_MCG_ATCVL_RD(x) & ~(v)))
#define HW_MCG_ATCVL_TOG(x, v) (HW_MCG_ATCVL_WR(x, HW_MCG_ATCVL_RD(x) ^ (v)))
@ -1560,8 +1567,8 @@ typedef union _hw_mcg_c7
#define HW_MCG_C7_ADDR(x) ((x) + 0xCU)
#define HW_MCG_C7(x) (*(__IO hw_mcg_c7_t *) HW_MCG_C7_ADDR(x))
#define HW_MCG_C7_RD(x) (HW_MCG_C7(x).U)
#define HW_MCG_C7_WR(x, v) (HW_MCG_C7(x).U = (v))
#define HW_MCG_C7_RD(x) (ADDRESS_READ(hw_mcg_c7_t, HW_MCG_C7_ADDR(x)))
#define HW_MCG_C7_WR(x, v) (ADDRESS_WRITE(hw_mcg_c7_t, HW_MCG_C7_ADDR(x), v))
#define HW_MCG_C7_SET(x, v) (HW_MCG_C7_WR(x, HW_MCG_C7_RD(x) | (v)))
#define HW_MCG_C7_CLR(x, v) (HW_MCG_C7_WR(x, HW_MCG_C7_RD(x) & ~(v)))
#define HW_MCG_C7_TOG(x, v) (HW_MCG_C7_WR(x, HW_MCG_C7_RD(x) ^ (v)))
@ -1588,7 +1595,7 @@ typedef union _hw_mcg_c7
#define BS_MCG_C7_OSCSEL (2U) /*!< Bit field size in bits for MCG_C7_OSCSEL. */
/*! @brief Read current value of the MCG_C7_OSCSEL field. */
#define BR_MCG_C7_OSCSEL(x) (HW_MCG_C7(x).B.OSCSEL)
#define BR_MCG_C7_OSCSEL(x) (UNION_READ(hw_mcg_c7_t, HW_MCG_C7_ADDR(x), U, B.OSCSEL))
/*! @brief Format value for bitfield MCG_C7_OSCSEL. */
#define BF_MCG_C7_OSCSEL(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C7_OSCSEL) & BM_MCG_C7_OSCSEL)
@ -1626,8 +1633,8 @@ typedef union _hw_mcg_c8
#define HW_MCG_C8_ADDR(x) ((x) + 0xDU)
#define HW_MCG_C8(x) (*(__IO hw_mcg_c8_t *) HW_MCG_C8_ADDR(x))
#define HW_MCG_C8_RD(x) (HW_MCG_C8(x).U)
#define HW_MCG_C8_WR(x, v) (HW_MCG_C8(x).U = (v))
#define HW_MCG_C8_RD(x) (ADDRESS_READ(hw_mcg_c8_t, HW_MCG_C8_ADDR(x)))
#define HW_MCG_C8_WR(x, v) (ADDRESS_WRITE(hw_mcg_c8_t, HW_MCG_C8_ADDR(x), v))
#define HW_MCG_C8_SET(x, v) (HW_MCG_C8_WR(x, HW_MCG_C8_RD(x) | (v)))
#define HW_MCG_C8_CLR(x, v) (HW_MCG_C8_WR(x, HW_MCG_C8_RD(x) & ~(v)))
#define HW_MCG_C8_TOG(x, v) (HW_MCG_C8_WR(x, HW_MCG_C8_RD(x) ^ (v)))
@ -1653,13 +1660,13 @@ typedef union _hw_mcg_c8
#define BS_MCG_C8_LOCS1 (1U) /*!< Bit field size in bits for MCG_C8_LOCS1. */
/*! @brief Read current value of the MCG_C8_LOCS1 field. */
#define BR_MCG_C8_LOCS1(x) (BITBAND_ACCESS8(HW_MCG_C8_ADDR(x), BP_MCG_C8_LOCS1))
#define BR_MCG_C8_LOCS1(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_C8_ADDR(x), BP_MCG_C8_LOCS1)))
/*! @brief Format value for bitfield MCG_C8_LOCS1. */
#define BF_MCG_C8_LOCS1(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C8_LOCS1) & BM_MCG_C8_LOCS1)
/*! @brief Set the LOCS1 field to a new value. */
#define BW_MCG_C8_LOCS1(x, v) (BITBAND_ACCESS8(HW_MCG_C8_ADDR(x), BP_MCG_C8_LOCS1) = (v))
#define BW_MCG_C8_LOCS1(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_C8_ADDR(x), BP_MCG_C8_LOCS1), v))
/*@}*/
/*!
@ -1684,13 +1691,13 @@ typedef union _hw_mcg_c8
#define BS_MCG_C8_CME1 (1U) /*!< Bit field size in bits for MCG_C8_CME1. */
/*! @brief Read current value of the MCG_C8_CME1 field. */
#define BR_MCG_C8_CME1(x) (BITBAND_ACCESS8(HW_MCG_C8_ADDR(x), BP_MCG_C8_CME1))
#define BR_MCG_C8_CME1(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_C8_ADDR(x), BP_MCG_C8_CME1)))
/*! @brief Format value for bitfield MCG_C8_CME1. */
#define BF_MCG_C8_CME1(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C8_CME1) & BM_MCG_C8_CME1)
/*! @brief Set the CME1 field to a new value. */
#define BW_MCG_C8_CME1(x, v) (BITBAND_ACCESS8(HW_MCG_C8_ADDR(x), BP_MCG_C8_CME1) = (v))
#define BW_MCG_C8_CME1(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_C8_ADDR(x), BP_MCG_C8_CME1), v))
/*@}*/
/*!
@ -1711,13 +1718,13 @@ typedef union _hw_mcg_c8
#define BS_MCG_C8_LOLRE (1U) /*!< Bit field size in bits for MCG_C8_LOLRE. */
/*! @brief Read current value of the MCG_C8_LOLRE field. */
#define BR_MCG_C8_LOLRE(x) (BITBAND_ACCESS8(HW_MCG_C8_ADDR(x), BP_MCG_C8_LOLRE))
#define BR_MCG_C8_LOLRE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_C8_ADDR(x), BP_MCG_C8_LOLRE)))
/*! @brief Format value for bitfield MCG_C8_LOLRE. */
#define BF_MCG_C8_LOLRE(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C8_LOLRE) & BM_MCG_C8_LOLRE)
/*! @brief Set the LOLRE field to a new value. */
#define BW_MCG_C8_LOLRE(x, v) (BITBAND_ACCESS8(HW_MCG_C8_ADDR(x), BP_MCG_C8_LOLRE) = (v))
#define BW_MCG_C8_LOLRE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_C8_ADDR(x), BP_MCG_C8_LOLRE), v))
/*@}*/
/*!
@ -1737,13 +1744,13 @@ typedef union _hw_mcg_c8
#define BS_MCG_C8_LOCRE1 (1U) /*!< Bit field size in bits for MCG_C8_LOCRE1. */
/*! @brief Read current value of the MCG_C8_LOCRE1 field. */
#define BR_MCG_C8_LOCRE1(x) (BITBAND_ACCESS8(HW_MCG_C8_ADDR(x), BP_MCG_C8_LOCRE1))
#define BR_MCG_C8_LOCRE1(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_MCG_C8_ADDR(x), BP_MCG_C8_LOCRE1)))
/*! @brief Format value for bitfield MCG_C8_LOCRE1. */
#define BF_MCG_C8_LOCRE1(v) ((uint8_t)((uint8_t)(v) << BP_MCG_C8_LOCRE1) & BM_MCG_C8_LOCRE1)
/*! @brief Set the LOCRE1 field to a new value. */
#define BW_MCG_C8_LOCRE1(x, v) (BITBAND_ACCESS8(HW_MCG_C8_ADDR(x), BP_MCG_C8_LOCRE1) = (v))
#define BW_MCG_C8_LOCRE1(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_MCG_C8_ADDR(x), BP_MCG_C8_LOCRE1), v))
/*@}*/
/*******************************************************************************

91
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_mcm.h
View File

@ -15,6 +15,9 @@
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** (C) COPYRIGHT 2015-2015 ARM Limited
** ALL RIGHTS RESERVED
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
@ -68,6 +71,10 @@
** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
** Update of SystemInit() and SystemCoreClockUpdate() functions.
** Module access macro module_BASES replaced by module_BASE_PTRS.
** - rev. 2.6 (2015-08-03) (ARM)
** All accesses to memory are replaced by equivalent macros; this allows
** memory read/write operations to be re-defined if needed (for example,
** to implement new security features
**
** ###################################################################
*/
@ -134,7 +141,7 @@ typedef union _hw_mcm_plasc
#define HW_MCM_PLASC_ADDR(x) ((x) + 0x8U)
#define HW_MCM_PLASC(x) (*(__I hw_mcm_plasc_t *) HW_MCM_PLASC_ADDR(x))
#define HW_MCM_PLASC_RD(x) (HW_MCM_PLASC(x).U)
#define HW_MCM_PLASC_RD(x) (ADDRESS_READ(hw_mcm_plasc_t, HW_MCM_PLASC_ADDR(x)))
/*@}*/
/*
@ -154,7 +161,7 @@ typedef union _hw_mcm_plasc
#define BS_MCM_PLASC_ASC (8U) /*!< Bit field size in bits for MCM_PLASC_ASC. */
/*! @brief Read current value of the MCM_PLASC_ASC field. */
#define BR_MCM_PLASC_ASC(x) (HW_MCM_PLASC(x).B.ASC)
#define BR_MCM_PLASC_ASC(x) (UNION_READ(hw_mcm_plasc_t, HW_MCM_PLASC_ADDR(x), U, B.ASC))
/*@}*/
/*******************************************************************************
@ -187,7 +194,7 @@ typedef union _hw_mcm_plamc
#define HW_MCM_PLAMC_ADDR(x) ((x) + 0xAU)
#define HW_MCM_PLAMC(x) (*(__I hw_mcm_plamc_t *) HW_MCM_PLAMC_ADDR(x))
#define HW_MCM_PLAMC_RD(x) (HW_MCM_PLAMC(x).U)
#define HW_MCM_PLAMC_RD(x) (ADDRESS_READ(hw_mcm_plamc_t, HW_MCM_PLAMC_ADDR(x)))
/*@}*/
/*
@ -207,7 +214,7 @@ typedef union _hw_mcm_plamc
#define BS_MCM_PLAMC_AMC (8U) /*!< Bit field size in bits for MCM_PLAMC_AMC. */
/*! @brief Read current value of the MCM_PLAMC_AMC field. */
#define BR_MCM_PLAMC_AMC(x) (HW_MCM_PLAMC(x).B.AMC)
#define BR_MCM_PLAMC_AMC(x) (UNION_READ(hw_mcm_plamc_t, HW_MCM_PLAMC_ADDR(x), U, B.AMC))
/*@}*/
/*******************************************************************************
@ -244,8 +251,8 @@ typedef union _hw_mcm_cr
#define HW_MCM_CR_ADDR(x) ((x) + 0xCU)
#define HW_MCM_CR(x) (*(__IO hw_mcm_cr_t *) HW_MCM_CR_ADDR(x))
#define HW_MCM_CR_RD(x) (HW_MCM_CR(x).U)
#define HW_MCM_CR_WR(x, v) (HW_MCM_CR(x).U = (v))
#define HW_MCM_CR_RD(x) (ADDRESS_READ(hw_mcm_cr_t, HW_MCM_CR_ADDR(x)))
#define HW_MCM_CR_WR(x, v) (ADDRESS_WRITE(hw_mcm_cr_t, HW_MCM_CR_ADDR(x), v))
#define HW_MCM_CR_SET(x, v) (HW_MCM_CR_WR(x, HW_MCM_CR_RD(x) | (v)))
#define HW_MCM_CR_CLR(x, v) (HW_MCM_CR_WR(x, HW_MCM_CR_RD(x) & ~(v)))
#define HW_MCM_CR_TOG(x, v) (HW_MCM_CR_WR(x, HW_MCM_CR_RD(x) ^ (v)))
@ -273,7 +280,7 @@ typedef union _hw_mcm_cr
#define BS_MCM_CR_SRAMUAP (2U) /*!< Bit field size in bits for MCM_CR_SRAMUAP. */
/*! @brief Read current value of the MCM_CR_SRAMUAP field. */
#define BR_MCM_CR_SRAMUAP(x) (HW_MCM_CR(x).B.SRAMUAP)
#define BR_MCM_CR_SRAMUAP(x) (UNION_READ(hw_mcm_cr_t, HW_MCM_CR_ADDR(x), U, B.SRAMUAP))
/*! @brief Format value for bitfield MCM_CR_SRAMUAP. */
#define BF_MCM_CR_SRAMUAP(v) ((uint32_t)((uint32_t)(v) << BP_MCM_CR_SRAMUAP) & BM_MCM_CR_SRAMUAP)
@ -293,7 +300,7 @@ typedef union _hw_mcm_cr
#define BS_MCM_CR_SRAMUWP (1U) /*!< Bit field size in bits for MCM_CR_SRAMUWP. */
/*! @brief Read current value of the MCM_CR_SRAMUWP field. */
#define BR_MCM_CR_SRAMUWP(x) (HW_MCM_CR(x).B.SRAMUWP)
#define BR_MCM_CR_SRAMUWP(x) (UNION_READ(hw_mcm_cr_t, HW_MCM_CR_ADDR(x), U, B.SRAMUWP))
/*! @brief Format value for bitfield MCM_CR_SRAMUWP. */
#define BF_MCM_CR_SRAMUWP(v) ((uint32_t)((uint32_t)(v) << BP_MCM_CR_SRAMUWP) & BM_MCM_CR_SRAMUWP)
@ -320,7 +327,7 @@ typedef union _hw_mcm_cr
#define BS_MCM_CR_SRAMLAP (2U) /*!< Bit field size in bits for MCM_CR_SRAMLAP. */
/*! @brief Read current value of the MCM_CR_SRAMLAP field. */
#define BR_MCM_CR_SRAMLAP(x) (HW_MCM_CR(x).B.SRAMLAP)
#define BR_MCM_CR_SRAMLAP(x) (UNION_READ(hw_mcm_cr_t, HW_MCM_CR_ADDR(x), U, B.SRAMLAP))
/*! @brief Format value for bitfield MCM_CR_SRAMLAP. */
#define BF_MCM_CR_SRAMLAP(v) ((uint32_t)((uint32_t)(v) << BP_MCM_CR_SRAMLAP) & BM_MCM_CR_SRAMLAP)
@ -340,7 +347,7 @@ typedef union _hw_mcm_cr
#define BS_MCM_CR_SRAMLWP (1U) /*!< Bit field size in bits for MCM_CR_SRAMLWP. */
/*! @brief Read current value of the MCM_CR_SRAMLWP field. */
#define BR_MCM_CR_SRAMLWP(x) (HW_MCM_CR(x).B.SRAMLWP)
#define BR_MCM_CR_SRAMLWP(x) (UNION_READ(hw_mcm_cr_t, HW_MCM_CR_ADDR(x), U, B.SRAMLWP))
/*! @brief Format value for bitfield MCM_CR_SRAMLWP. */
#define BF_MCM_CR_SRAMLWP(v) ((uint32_t)((uint32_t)(v) << BP_MCM_CR_SRAMLWP) & BM_MCM_CR_SRAMLWP)
@ -394,8 +401,8 @@ typedef union _hw_mcm_iscr
#define HW_MCM_ISCR_ADDR(x) ((x) + 0x10U)
#define HW_MCM_ISCR(x) (*(__IO hw_mcm_iscr_t *) HW_MCM_ISCR_ADDR(x))
#define HW_MCM_ISCR_RD(x) (HW_MCM_ISCR(x).U)
#define HW_MCM_ISCR_WR(x, v) (HW_MCM_ISCR(x).U = (v))
#define HW_MCM_ISCR_RD(x) (ADDRESS_READ(hw_mcm_iscr_t, HW_MCM_ISCR_ADDR(x)))
#define HW_MCM_ISCR_WR(x, v) (ADDRESS_WRITE(hw_mcm_iscr_t, HW_MCM_ISCR_ADDR(x), v))
#define HW_MCM_ISCR_SET(x, v) (HW_MCM_ISCR_WR(x, HW_MCM_ISCR_RD(x) | (v)))
#define HW_MCM_ISCR_CLR(x, v) (HW_MCM_ISCR_WR(x, HW_MCM_ISCR_RD(x) & ~(v)))
#define HW_MCM_ISCR_TOG(x, v) (HW_MCM_ISCR_WR(x, HW_MCM_ISCR_RD(x) ^ (v)))
@ -420,7 +427,7 @@ typedef union _hw_mcm_iscr
#define BS_MCM_ISCR_IRQ (1U) /*!< Bit field size in bits for MCM_ISCR_IRQ. */
/*! @brief Read current value of the MCM_ISCR_IRQ field. */
#define BR_MCM_ISCR_IRQ(x) (HW_MCM_ISCR(x).B.IRQ)
#define BR_MCM_ISCR_IRQ(x) (UNION_READ(hw_mcm_iscr_t, HW_MCM_ISCR_ADDR(x), U, B.IRQ))
/*! @brief Format value for bitfield MCM_ISCR_IRQ. */
#define BF_MCM_ISCR_IRQ(v) ((uint32_t)((uint32_t)(v) << BP_MCM_ISCR_IRQ) & BM_MCM_ISCR_IRQ)
@ -444,7 +451,7 @@ typedef union _hw_mcm_iscr
#define BS_MCM_ISCR_NMI (1U) /*!< Bit field size in bits for MCM_ISCR_NMI. */
/*! @brief Read current value of the MCM_ISCR_NMI field. */
#define BR_MCM_ISCR_NMI(x) (HW_MCM_ISCR(x).B.NMI)
#define BR_MCM_ISCR_NMI(x) (UNION_READ(hw_mcm_iscr_t, HW_MCM_ISCR_ADDR(x), U, B.NMI))
/*! @brief Format value for bitfield MCM_ISCR_NMI. */
#define BF_MCM_ISCR_NMI(v) ((uint32_t)((uint32_t)(v) << BP_MCM_ISCR_NMI) & BM_MCM_ISCR_NMI)
@ -470,7 +477,7 @@ typedef union _hw_mcm_iscr
#define BS_MCM_ISCR_DHREQ (1U) /*!< Bit field size in bits for MCM_ISCR_DHREQ. */
/*! @brief Read current value of the MCM_ISCR_DHREQ field. */
#define BR_MCM_ISCR_DHREQ(x) (HW_MCM_ISCR(x).B.DHREQ)
#define BR_MCM_ISCR_DHREQ(x) (UNION_READ(hw_mcm_iscr_t, HW_MCM_ISCR_ADDR(x), U, B.DHREQ))
/*@}*/
/*!
@ -490,7 +497,7 @@ typedef union _hw_mcm_iscr
#define BS_MCM_ISCR_FIOC (1U) /*!< Bit field size in bits for MCM_ISCR_FIOC. */
/*! @brief Read current value of the MCM_ISCR_FIOC field. */
#define BR_MCM_ISCR_FIOC(x) (HW_MCM_ISCR(x).B.FIOC)
#define BR_MCM_ISCR_FIOC(x) (UNION_READ(hw_mcm_iscr_t, HW_MCM_ISCR_ADDR(x), U, B.FIOC))
/*@}*/
/*!
@ -510,7 +517,7 @@ typedef union _hw_mcm_iscr
#define BS_MCM_ISCR_FDZC (1U) /*!< Bit field size in bits for MCM_ISCR_FDZC. */
/*! @brief Read current value of the MCM_ISCR_FDZC field. */
#define BR_MCM_ISCR_FDZC(x) (HW_MCM_ISCR(x).B.FDZC)
#define BR_MCM_ISCR_FDZC(x) (UNION_READ(hw_mcm_iscr_t, HW_MCM_ISCR_ADDR(x), U, B.FDZC))
/*@}*/
/*!
@ -530,7 +537,7 @@ typedef union _hw_mcm_iscr
#define BS_MCM_ISCR_FOFC (1U) /*!< Bit field size in bits for MCM_ISCR_FOFC. */
/*! @brief Read current value of the MCM_ISCR_FOFC field. */
#define BR_MCM_ISCR_FOFC(x) (HW_MCM_ISCR(x).B.FOFC)
#define BR_MCM_ISCR_FOFC(x) (UNION_READ(hw_mcm_iscr_t, HW_MCM_ISCR_ADDR(x), U, B.FOFC))
/*@}*/
/*!
@ -550,7 +557,7 @@ typedef union _hw_mcm_iscr
#define BS_MCM_ISCR_FUFC (1U) /*!< Bit field size in bits for MCM_ISCR_FUFC. */
/*! @brief Read current value of the MCM_ISCR_FUFC field. */
#define BR_MCM_ISCR_FUFC(x) (HW_MCM_ISCR(x).B.FUFC)
#define BR_MCM_ISCR_FUFC(x) (UNION_READ(hw_mcm_iscr_t, HW_MCM_ISCR_ADDR(x), U, B.FUFC))
/*@}*/
/*!
@ -570,7 +577,7 @@ typedef union _hw_mcm_iscr
#define BS_MCM_ISCR_FIXC (1U) /*!< Bit field size in bits for MCM_ISCR_FIXC. */
/*! @brief Read current value of the MCM_ISCR_FIXC field. */
#define BR_MCM_ISCR_FIXC(x) (HW_MCM_ISCR(x).B.FIXC)
#define BR_MCM_ISCR_FIXC(x) (UNION_READ(hw_mcm_iscr_t, HW_MCM_ISCR_ADDR(x), U, B.FIXC))
/*@}*/
/*!
@ -590,7 +597,7 @@ typedef union _hw_mcm_iscr
#define BS_MCM_ISCR_FIDC (1U) /*!< Bit field size in bits for MCM_ISCR_FIDC. */
/*! @brief Read current value of the MCM_ISCR_FIDC field. */
#define BR_MCM_ISCR_FIDC(x) (HW_MCM_ISCR(x).B.FIDC)
#define BR_MCM_ISCR_FIDC(x) (UNION_READ(hw_mcm_iscr_t, HW_MCM_ISCR_ADDR(x), U, B.FIDC))
/*@}*/
/*!
@ -606,7 +613,7 @@ typedef union _hw_mcm_iscr
#define BS_MCM_ISCR_FIOCE (1U) /*!< Bit field size in bits for MCM_ISCR_FIOCE. */
/*! @brief Read current value of the MCM_ISCR_FIOCE field. */
#define BR_MCM_ISCR_FIOCE(x) (HW_MCM_ISCR(x).B.FIOCE)
#define BR_MCM_ISCR_FIOCE(x) (UNION_READ(hw_mcm_iscr_t, HW_MCM_ISCR_ADDR(x), U, B.FIOCE))
/*! @brief Format value for bitfield MCM_ISCR_FIOCE. */
#define BF_MCM_ISCR_FIOCE(v) ((uint32_t)((uint32_t)(v) << BP_MCM_ISCR_FIOCE) & BM_MCM_ISCR_FIOCE)
@ -628,7 +635,7 @@ typedef union _hw_mcm_iscr
#define BS_MCM_ISCR_FDZCE (1U) /*!< Bit field size in bits for MCM_ISCR_FDZCE. */
/*! @brief Read current value of the MCM_ISCR_FDZCE field. */
#define BR_MCM_ISCR_FDZCE(x) (HW_MCM_ISCR(x).B.FDZCE)
#define BR_MCM_ISCR_FDZCE(x) (UNION_READ(hw_mcm_iscr_t, HW_MCM_ISCR_ADDR(x), U, B.FDZCE))
/*! @brief Format value for bitfield MCM_ISCR_FDZCE. */
#define BF_MCM_ISCR_FDZCE(v) ((uint32_t)((uint32_t)(v) << BP_MCM_ISCR_FDZCE) & BM_MCM_ISCR_FDZCE)
@ -650,7 +657,7 @@ typedef union _hw_mcm_iscr
#define BS_MCM_ISCR_FOFCE (1U) /*!< Bit field size in bits for MCM_ISCR_FOFCE. */
/*! @brief Read current value of the MCM_ISCR_FOFCE field. */
#define BR_MCM_ISCR_FOFCE(x) (HW_MCM_ISCR(x).B.FOFCE)
#define BR_MCM_ISCR_FOFCE(x) (UNION_READ(hw_mcm_iscr_t, HW_MCM_ISCR_ADDR(x), U, B.FOFCE))
/*! @brief Format value for bitfield MCM_ISCR_FOFCE. */
#define BF_MCM_ISCR_FOFCE(v) ((uint32_t)((uint32_t)(v) << BP_MCM_ISCR_FOFCE) & BM_MCM_ISCR_FOFCE)
@ -672,7 +679,7 @@ typedef union _hw_mcm_iscr
#define BS_MCM_ISCR_FUFCE (1U) /*!< Bit field size in bits for MCM_ISCR_FUFCE. */
/*! @brief Read current value of the MCM_ISCR_FUFCE field. */
#define BR_MCM_ISCR_FUFCE(x) (HW_MCM_ISCR(x).B.FUFCE)
#define BR_MCM_ISCR_FUFCE(x) (UNION_READ(hw_mcm_iscr_t, HW_MCM_ISCR_ADDR(x), U, B.FUFCE))
/*! @brief Format value for bitfield MCM_ISCR_FUFCE. */
#define BF_MCM_ISCR_FUFCE(v) ((uint32_t)((uint32_t)(v) << BP_MCM_ISCR_FUFCE) & BM_MCM_ISCR_FUFCE)
@ -694,7 +701,7 @@ typedef union _hw_mcm_iscr
#define BS_MCM_ISCR_FIXCE (1U) /*!< Bit field size in bits for MCM_ISCR_FIXCE. */
/*! @brief Read current value of the MCM_ISCR_FIXCE field. */
#define BR_MCM_ISCR_FIXCE(x) (HW_MCM_ISCR(x).B.FIXCE)
#define BR_MCM_ISCR_FIXCE(x) (UNION_READ(hw_mcm_iscr_t, HW_MCM_ISCR_ADDR(x), U, B.FIXCE))
/*! @brief Format value for bitfield MCM_ISCR_FIXCE. */
#define BF_MCM_ISCR_FIXCE(v) ((uint32_t)((uint32_t)(v) << BP_MCM_ISCR_FIXCE) & BM_MCM_ISCR_FIXCE)
@ -716,7 +723,7 @@ typedef union _hw_mcm_iscr
#define BS_MCM_ISCR_FIDCE (1U) /*!< Bit field size in bits for MCM_ISCR_FIDCE. */
/*! @brief Read current value of the MCM_ISCR_FIDCE field. */
#define BR_MCM_ISCR_FIDCE(x) (HW_MCM_ISCR(x).B.FIDCE)
#define BR_MCM_ISCR_FIDCE(x) (UNION_READ(hw_mcm_iscr_t, HW_MCM_ISCR_ADDR(x), U, B.FIDCE))
/*! @brief Format value for bitfield MCM_ISCR_FIDCE. */
#define BF_MCM_ISCR_FIDCE(v) ((uint32_t)((uint32_t)(v) << BP_MCM_ISCR_FIDCE) & BM_MCM_ISCR_FIDCE)
@ -755,8 +762,8 @@ typedef union _hw_mcm_etbcc
#define HW_MCM_ETBCC_ADDR(x) ((x) + 0x14U)
#define HW_MCM_ETBCC(x) (*(__IO hw_mcm_etbcc_t *) HW_MCM_ETBCC_ADDR(x))
#define HW_MCM_ETBCC_RD(x) (HW_MCM_ETBCC(x).U)
#define HW_MCM_ETBCC_WR(x, v) (HW_MCM_ETBCC(x).U = (v))
#define HW_MCM_ETBCC_RD(x) (ADDRESS_READ(hw_mcm_etbcc_t, HW_MCM_ETBCC_ADDR(x)))
#define HW_MCM_ETBCC_WR(x, v) (ADDRESS_WRITE(hw_mcm_etbcc_t, HW_MCM_ETBCC_ADDR(x), v))
#define HW_MCM_ETBCC_SET(x, v) (HW_MCM_ETBCC_WR(x, HW_MCM_ETBCC_RD(x) | (v)))
#define HW_MCM_ETBCC_CLR(x, v) (HW_MCM_ETBCC_WR(x, HW_MCM_ETBCC_RD(x) & ~(v)))
#define HW_MCM_ETBCC_TOG(x, v) (HW_MCM_ETBCC_WR(x, HW_MCM_ETBCC_RD(x) ^ (v)))
@ -781,7 +788,7 @@ typedef union _hw_mcm_etbcc
#define BS_MCM_ETBCC_CNTEN (1U) /*!< Bit field size in bits for MCM_ETBCC_CNTEN. */
/*! @brief Read current value of the MCM_ETBCC_CNTEN field. */
#define BR_MCM_ETBCC_CNTEN(x) (HW_MCM_ETBCC(x).B.CNTEN)
#define BR_MCM_ETBCC_CNTEN(x) (UNION_READ(hw_mcm_etbcc_t, HW_MCM_ETBCC_ADDR(x), U, B.CNTEN))
/*! @brief Format value for bitfield MCM_ETBCC_CNTEN. */
#define BF_MCM_ETBCC_CNTEN(v) ((uint32_t)((uint32_t)(v) << BP_MCM_ETBCC_CNTEN) & BM_MCM_ETBCC_CNTEN)
@ -805,7 +812,7 @@ typedef union _hw_mcm_etbcc
#define BS_MCM_ETBCC_RSPT (2U) /*!< Bit field size in bits for MCM_ETBCC_RSPT. */
/*! @brief Read current value of the MCM_ETBCC_RSPT field. */
#define BR_MCM_ETBCC_RSPT(x) (HW_MCM_ETBCC(x).B.RSPT)
#define BR_MCM_ETBCC_RSPT(x) (UNION_READ(hw_mcm_etbcc_t, HW_MCM_ETBCC_ADDR(x), U, B.RSPT))
/*! @brief Format value for bitfield MCM_ETBCC_RSPT. */
#define BF_MCM_ETBCC_RSPT(v) ((uint32_t)((uint32_t)(v) << BP_MCM_ETBCC_RSPT) & BM_MCM_ETBCC_RSPT)
@ -833,7 +840,7 @@ typedef union _hw_mcm_etbcc
#define BS_MCM_ETBCC_RLRQ (1U) /*!< Bit field size in bits for MCM_ETBCC_RLRQ. */
/*! @brief Read current value of the MCM_ETBCC_RLRQ field. */
#define BR_MCM_ETBCC_RLRQ(x) (HW_MCM_ETBCC(x).B.RLRQ)
#define BR_MCM_ETBCC_RLRQ(x) (UNION_READ(hw_mcm_etbcc_t, HW_MCM_ETBCC_ADDR(x), U, B.RLRQ))
/*! @brief Format value for bitfield MCM_ETBCC_RLRQ. */
#define BF_MCM_ETBCC_RLRQ(v) ((uint32_t)((uint32_t)(v) << BP_MCM_ETBCC_RLRQ) & BM_MCM_ETBCC_RLRQ)
@ -857,7 +864,7 @@ typedef union _hw_mcm_etbcc
#define BS_MCM_ETBCC_ETDIS (1U) /*!< Bit field size in bits for MCM_ETBCC_ETDIS. */
/*! @brief Read current value of the MCM_ETBCC_ETDIS field. */
#define BR_MCM_ETBCC_ETDIS(x) (HW_MCM_ETBCC(x).B.ETDIS)
#define BR_MCM_ETBCC_ETDIS(x) (UNION_READ(hw_mcm_etbcc_t, HW_MCM_ETBCC_ADDR(x), U, B.ETDIS))
/*! @brief Format value for bitfield MCM_ETBCC_ETDIS. */
#define BF_MCM_ETBCC_ETDIS(v) ((uint32_t)((uint32_t)(v) << BP_MCM_ETBCC_ETDIS) & BM_MCM_ETBCC_ETDIS)
@ -881,7 +888,7 @@ typedef union _hw_mcm_etbcc
#define BS_MCM_ETBCC_ITDIS (1U) /*!< Bit field size in bits for MCM_ETBCC_ITDIS. */
/*! @brief Read current value of the MCM_ETBCC_ITDIS field. */
#define BR_MCM_ETBCC_ITDIS(x) (HW_MCM_ETBCC(x).B.ITDIS)
#define BR_MCM_ETBCC_ITDIS(x) (UNION_READ(hw_mcm_etbcc_t, HW_MCM_ETBCC_ADDR(x), U, B.ITDIS))
/*! @brief Format value for bitfield MCM_ETBCC_ITDIS. */
#define BF_MCM_ETBCC_ITDIS(v) ((uint32_t)((uint32_t)(v) << BP_MCM_ETBCC_ITDIS) & BM_MCM_ETBCC_ITDIS)
@ -916,8 +923,8 @@ typedef union _hw_mcm_etbrl
#define HW_MCM_ETBRL_ADDR(x) ((x) + 0x18U)
#define HW_MCM_ETBRL(x) (*(__IO hw_mcm_etbrl_t *) HW_MCM_ETBRL_ADDR(x))
#define HW_MCM_ETBRL_RD(x) (HW_MCM_ETBRL(x).U)
#define HW_MCM_ETBRL_WR(x, v) (HW_MCM_ETBRL(x).U = (v))
#define HW_MCM_ETBRL_RD(x) (ADDRESS_READ(hw_mcm_etbrl_t, HW_MCM_ETBRL_ADDR(x)))
#define HW_MCM_ETBRL_WR(x, v) (ADDRESS_WRITE(hw_mcm_etbrl_t, HW_MCM_ETBRL_ADDR(x), v))
#define HW_MCM_ETBRL_SET(x, v) (HW_MCM_ETBRL_WR(x, HW_MCM_ETBRL_RD(x) | (v)))
#define HW_MCM_ETBRL_CLR(x, v) (HW_MCM_ETBRL_WR(x, HW_MCM_ETBRL_RD(x) & ~(v)))
#define HW_MCM_ETBRL_TOG(x, v) (HW_MCM_ETBRL_WR(x, HW_MCM_ETBRL_RD(x) ^ (v)))
@ -939,7 +946,7 @@ typedef union _hw_mcm_etbrl
#define BS_MCM_ETBRL_RELOAD (11U) /*!< Bit field size in bits for MCM_ETBRL_RELOAD. */
/*! @brief Read current value of the MCM_ETBRL_RELOAD field. */
#define BR_MCM_ETBRL_RELOAD(x) (HW_MCM_ETBRL(x).B.RELOAD)
#define BR_MCM_ETBRL_RELOAD(x) (UNION_READ(hw_mcm_etbrl_t, HW_MCM_ETBRL_ADDR(x), U, B.RELOAD))
/*! @brief Format value for bitfield MCM_ETBRL_RELOAD. */
#define BF_MCM_ETBRL_RELOAD(v) ((uint32_t)((uint32_t)(v) << BP_MCM_ETBRL_RELOAD) & BM_MCM_ETBRL_RELOAD)
@ -974,7 +981,7 @@ typedef union _hw_mcm_etbcnt
#define HW_MCM_ETBCNT_ADDR(x) ((x) + 0x1CU)
#define HW_MCM_ETBCNT(x) (*(__I hw_mcm_etbcnt_t *) HW_MCM_ETBCNT_ADDR(x))
#define HW_MCM_ETBCNT_RD(x) (HW_MCM_ETBCNT(x).U)
#define HW_MCM_ETBCNT_RD(x) (ADDRESS_READ(hw_mcm_etbcnt_t, HW_MCM_ETBCNT_ADDR(x)))
/*@}*/
/*
@ -992,7 +999,7 @@ typedef union _hw_mcm_etbcnt
#define BS_MCM_ETBCNT_COUNTER (11U) /*!< Bit field size in bits for MCM_ETBCNT_COUNTER. */
/*! @brief Read current value of the MCM_ETBCNT_COUNTER field. */
#define BR_MCM_ETBCNT_COUNTER(x) (HW_MCM_ETBCNT(x).B.COUNTER)
#define BR_MCM_ETBCNT_COUNTER(x) (UNION_READ(hw_mcm_etbcnt_t, HW_MCM_ETBCNT_ADDR(x), U, B.COUNTER))
/*@}*/
/*******************************************************************************
@ -1026,8 +1033,8 @@ typedef union _hw_mcm_pid
#define HW_MCM_PID_ADDR(x) ((x) + 0x30U)
#define HW_MCM_PID(x) (*(__IO hw_mcm_pid_t *) HW_MCM_PID_ADDR(x))
#define HW_MCM_PID_RD(x) (HW_MCM_PID(x).U)
#define HW_MCM_PID_WR(x, v) (HW_MCM_PID(x).U = (v))
#define HW_MCM_PID_RD(x) (ADDRESS_READ(hw_mcm_pid_t, HW_MCM_PID_ADDR(x)))
#define HW_MCM_PID_WR(x, v) (ADDRESS_WRITE(hw_mcm_pid_t, HW_MCM_PID_ADDR(x), v))
#define HW_MCM_PID_SET(x, v) (HW_MCM_PID_WR(x, HW_MCM_PID_RD(x) | (v)))
#define HW_MCM_PID_CLR(x, v) (HW_MCM_PID_WR(x, HW_MCM_PID_RD(x) & ~(v)))
#define HW_MCM_PID_TOG(x, v) (HW_MCM_PID_WR(x, HW_MCM_PID_RD(x) ^ (v)))
@ -1048,7 +1055,7 @@ typedef union _hw_mcm_pid
#define BS_MCM_PID_PID (8U) /*!< Bit field size in bits for MCM_PID_PID. */
/*! @brief Read current value of the MCM_PID_PID field. */
#define BR_MCM_PID_PID(x) (HW_MCM_PID(x).B.PID)
#define BR_MCM_PID_PID(x) (UNION_READ(hw_mcm_pid_t, HW_MCM_PID_ADDR(x), U, B.PID))
/*! @brief Format value for bitfield MCM_PID_PID. */
#define BF_MCM_PID_PID(v) ((uint32_t)((uint32_t)(v) << BP_MCM_PID_PID) & BM_MCM_PID_PID)

197
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_mpu.h
View File

@ -15,6 +15,9 @@
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** (C) COPYRIGHT 2015-2015 ARM Limited
** ALL RIGHTS RESERVED
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
@ -68,6 +71,10 @@
** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
** Update of SystemInit() and SystemCoreClockUpdate() functions.
** Module access macro module_BASES replaced by module_BASE_PTRS.
** - rev. 2.6 (2015-08-03) (ARM)
** All accesses to memory are replaced by equivalent macros; this allows
** memory read/write operations to be re-defined if needed (for example,
** to implement new security features
**
** ###################################################################
*/
@ -134,8 +141,8 @@ typedef union _hw_mpu_cesr
#define HW_MPU_CESR_ADDR(x) ((x) + 0x0U)
#define HW_MPU_CESR(x) (*(__IO hw_mpu_cesr_t *) HW_MPU_CESR_ADDR(x))
#define HW_MPU_CESR_RD(x) (HW_MPU_CESR(x).U)
#define HW_MPU_CESR_WR(x, v) (HW_MPU_CESR(x).U = (v))
#define HW_MPU_CESR_RD(x) (ADDRESS_READ(hw_mpu_cesr_t, HW_MPU_CESR_ADDR(x)))
#define HW_MPU_CESR_WR(x, v) (ADDRESS_WRITE(hw_mpu_cesr_t, HW_MPU_CESR_ADDR(x), v))
#define HW_MPU_CESR_SET(x, v) (HW_MPU_CESR_WR(x, HW_MPU_CESR_RD(x) | (v)))
#define HW_MPU_CESR_CLR(x, v) (HW_MPU_CESR_WR(x, HW_MPU_CESR_RD(x) & ~(v)))
#define HW_MPU_CESR_TOG(x, v) (HW_MPU_CESR_WR(x, HW_MPU_CESR_RD(x) ^ (v)))
@ -160,13 +167,13 @@ typedef union _hw_mpu_cesr
#define BS_MPU_CESR_VLD (1U) /*!< Bit field size in bits for MPU_CESR_VLD. */
/*! @brief Read current value of the MPU_CESR_VLD field. */
#define BR_MPU_CESR_VLD(x) (BITBAND_ACCESS32(HW_MPU_CESR_ADDR(x), BP_MPU_CESR_VLD))
#define BR_MPU_CESR_VLD(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_CESR_ADDR(x), BP_MPU_CESR_VLD)))
/*! @brief Format value for bitfield MPU_CESR_VLD. */
#define BF_MPU_CESR_VLD(v) ((uint32_t)((uint32_t)(v) << BP_MPU_CESR_VLD) & BM_MPU_CESR_VLD)
/*! @brief Set the VLD field to a new value. */
#define BW_MPU_CESR_VLD(x, v) (BITBAND_ACCESS32(HW_MPU_CESR_ADDR(x), BP_MPU_CESR_VLD) = (v))
#define BW_MPU_CESR_VLD(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_CESR_ADDR(x), BP_MPU_CESR_VLD), v))
/*@}*/
/*!
@ -185,7 +192,7 @@ typedef union _hw_mpu_cesr
#define BS_MPU_CESR_NRGD (4U) /*!< Bit field size in bits for MPU_CESR_NRGD. */
/*! @brief Read current value of the MPU_CESR_NRGD field. */
#define BR_MPU_CESR_NRGD(x) (HW_MPU_CESR(x).B.NRGD)
#define BR_MPU_CESR_NRGD(x) (UNION_READ(hw_mpu_cesr_t, HW_MPU_CESR_ADDR(x), U, B.NRGD))
/*@}*/
/*!
@ -199,7 +206,7 @@ typedef union _hw_mpu_cesr
#define BS_MPU_CESR_NSP (4U) /*!< Bit field size in bits for MPU_CESR_NSP. */
/*! @brief Read current value of the MPU_CESR_NSP field. */
#define BR_MPU_CESR_NSP(x) (HW_MPU_CESR(x).B.NSP)
#define BR_MPU_CESR_NSP(x) (UNION_READ(hw_mpu_cesr_t, HW_MPU_CESR_ADDR(x), U, B.NSP))
/*@}*/
/*!
@ -214,7 +221,7 @@ typedef union _hw_mpu_cesr
#define BS_MPU_CESR_HRL (4U) /*!< Bit field size in bits for MPU_CESR_HRL. */
/*! @brief Read current value of the MPU_CESR_HRL field. */
#define BR_MPU_CESR_HRL(x) (HW_MPU_CESR(x).B.HRL)
#define BR_MPU_CESR_HRL(x) (UNION_READ(hw_mpu_cesr_t, HW_MPU_CESR_ADDR(x), U, B.HRL))
/*@}*/
/*!
@ -239,7 +246,7 @@ typedef union _hw_mpu_cesr
#define BS_MPU_CESR_SPERR (5U) /*!< Bit field size in bits for MPU_CESR_SPERR. */
/*! @brief Read current value of the MPU_CESR_SPERR field. */
#define BR_MPU_CESR_SPERR(x) (HW_MPU_CESR(x).B.SPERR)
#define BR_MPU_CESR_SPERR(x) (UNION_READ(hw_mpu_cesr_t, HW_MPU_CESR_ADDR(x), U, B.SPERR))
/*! @brief Format value for bitfield MPU_CESR_SPERR. */
#define BF_MPU_CESR_SPERR(v) ((uint32_t)((uint32_t)(v) << BP_MPU_CESR_SPERR) & BM_MPU_CESR_SPERR)
@ -283,7 +290,7 @@ typedef union _hw_mpu_earn
#define HW_MPU_EARn_ADDR(x, n) ((x) + 0x10U + (0x8U * (n)))
#define HW_MPU_EARn(x, n) (*(__I hw_mpu_earn_t *) HW_MPU_EARn_ADDR(x, n))
#define HW_MPU_EARn_RD(x, n) (HW_MPU_EARn(x, n).U)
#define HW_MPU_EARn_RD(x, n) (ADDRESS_READ(hw_mpu_earn_t, HW_MPU_EARn_ADDR(x, n)))
/*@}*/
/*
@ -343,7 +350,7 @@ typedef union _hw_mpu_edrn
#define HW_MPU_EDRn_ADDR(x, n) ((x) + 0x14U + (0x8U * (n)))
#define HW_MPU_EDRn(x, n) (*(__I hw_mpu_edrn_t *) HW_MPU_EDRn_ADDR(x, n))
#define HW_MPU_EDRn_RD(x, n) (HW_MPU_EDRn(x, n).U)
#define HW_MPU_EDRn_RD(x, n) (ADDRESS_READ(hw_mpu_edrn_t, HW_MPU_EDRn_ADDR(x, n)))
/*@}*/
/*
@ -365,7 +372,7 @@ typedef union _hw_mpu_edrn
#define BS_MPU_EDRn_ERW (1U) /*!< Bit field size in bits for MPU_EDRn_ERW. */
/*! @brief Read current value of the MPU_EDRn_ERW field. */
#define BR_MPU_EDRn_ERW(x, n) (BITBAND_ACCESS32(HW_MPU_EDRn_ADDR(x, n), BP_MPU_EDRn_ERW))
#define BR_MPU_EDRn_ERW(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_EDRn_ADDR(x, n), BP_MPU_EDRn_ERW)))
/*@}*/
/*!
@ -386,7 +393,7 @@ typedef union _hw_mpu_edrn
#define BS_MPU_EDRn_EATTR (3U) /*!< Bit field size in bits for MPU_EDRn_EATTR. */
/*! @brief Read current value of the MPU_EDRn_EATTR field. */
#define BR_MPU_EDRn_EATTR(x, n) (HW_MPU_EDRn(x, n).B.EATTR)
#define BR_MPU_EDRn_EATTR(x, n) (UNION_READ(hw_mpu_edrn_t, HW_MPU_EDRn_ADDR(x, n), U, B.EATTR))
/*@}*/
/*!
@ -400,7 +407,7 @@ typedef union _hw_mpu_edrn
#define BS_MPU_EDRn_EMN (4U) /*!< Bit field size in bits for MPU_EDRn_EMN. */
/*! @brief Read current value of the MPU_EDRn_EMN field. */
#define BR_MPU_EDRn_EMN(x, n) (HW_MPU_EDRn(x, n).B.EMN)
#define BR_MPU_EDRn_EMN(x, n) (UNION_READ(hw_mpu_edrn_t, HW_MPU_EDRn_ADDR(x, n), U, B.EMN))
/*@}*/
/*!
@ -416,7 +423,7 @@ typedef union _hw_mpu_edrn
#define BS_MPU_EDRn_EPID (8U) /*!< Bit field size in bits for MPU_EDRn_EPID. */
/*! @brief Read current value of the MPU_EDRn_EPID field. */
#define BR_MPU_EDRn_EPID(x, n) (HW_MPU_EDRn(x, n).B.EPID)
#define BR_MPU_EDRn_EPID(x, n) (UNION_READ(hw_mpu_edrn_t, HW_MPU_EDRn_ADDR(x, n), U, B.EPID))
/*@}*/
/*!
@ -434,7 +441,7 @@ typedef union _hw_mpu_edrn
#define BS_MPU_EDRn_EACD (16U) /*!< Bit field size in bits for MPU_EDRn_EACD. */
/*! @brief Read current value of the MPU_EDRn_EACD field. */
#define BR_MPU_EDRn_EACD(x, n) (HW_MPU_EDRn(x, n).B.EACD)
#define BR_MPU_EDRn_EACD(x, n) (UNION_READ(hw_mpu_edrn_t, HW_MPU_EDRn_ADDR(x, n), U, B.EACD))
/*@}*/
/*******************************************************************************
@ -469,8 +476,8 @@ typedef union _hw_mpu_rgdn_word0
#define HW_MPU_RGDn_WORD0_ADDR(x, n) ((x) + 0x400U + (0x10U * (n)))
#define HW_MPU_RGDn_WORD0(x, n) (*(__IO hw_mpu_rgdn_word0_t *) HW_MPU_RGDn_WORD0_ADDR(x, n))
#define HW_MPU_RGDn_WORD0_RD(x, n) (HW_MPU_RGDn_WORD0(x, n).U)
#define HW_MPU_RGDn_WORD0_WR(x, n, v) (HW_MPU_RGDn_WORD0(x, n).U = (v))
#define HW_MPU_RGDn_WORD0_RD(x, n) (ADDRESS_READ(hw_mpu_rgdn_word0_t, HW_MPU_RGDn_WORD0_ADDR(x, n)))
#define HW_MPU_RGDn_WORD0_WR(x, n, v) (ADDRESS_WRITE(hw_mpu_rgdn_word0_t, HW_MPU_RGDn_WORD0_ADDR(x, n), v))
#define HW_MPU_RGDn_WORD0_SET(x, n, v) (HW_MPU_RGDn_WORD0_WR(x, n, HW_MPU_RGDn_WORD0_RD(x, n) | (v)))
#define HW_MPU_RGDn_WORD0_CLR(x, n, v) (HW_MPU_RGDn_WORD0_WR(x, n, HW_MPU_RGDn_WORD0_RD(x, n) & ~(v)))
#define HW_MPU_RGDn_WORD0_TOG(x, n, v) (HW_MPU_RGDn_WORD0_WR(x, n, HW_MPU_RGDn_WORD0_RD(x, n) ^ (v)))
@ -492,7 +499,7 @@ typedef union _hw_mpu_rgdn_word0
#define BS_MPU_RGDn_WORD0_SRTADDR (27U) /*!< Bit field size in bits for MPU_RGDn_WORD0_SRTADDR. */
/*! @brief Read current value of the MPU_RGDn_WORD0_SRTADDR field. */
#define BR_MPU_RGDn_WORD0_SRTADDR(x, n) (HW_MPU_RGDn_WORD0(x, n).B.SRTADDR)
#define BR_MPU_RGDn_WORD0_SRTADDR(x, n) (UNION_READ(hw_mpu_rgdn_word0_t, HW_MPU_RGDn_WORD0_ADDR(x, n), U, B.SRTADDR))
/*! @brief Format value for bitfield MPU_RGDn_WORD0_SRTADDR. */
#define BF_MPU_RGDn_WORD0_SRTADDR(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD0_SRTADDR) & BM_MPU_RGDn_WORD0_SRTADDR)
@ -532,8 +539,8 @@ typedef union _hw_mpu_rgdn_word1
#define HW_MPU_RGDn_WORD1_ADDR(x, n) ((x) + 0x404U + (0x10U * (n)))
#define HW_MPU_RGDn_WORD1(x, n) (*(__IO hw_mpu_rgdn_word1_t *) HW_MPU_RGDn_WORD1_ADDR(x, n))
#define HW_MPU_RGDn_WORD1_RD(x, n) (HW_MPU_RGDn_WORD1(x, n).U)
#define HW_MPU_RGDn_WORD1_WR(x, n, v) (HW_MPU_RGDn_WORD1(x, n).U = (v))
#define HW_MPU_RGDn_WORD1_RD(x, n) (ADDRESS_READ(hw_mpu_rgdn_word1_t, HW_MPU_RGDn_WORD1_ADDR(x, n)))
#define HW_MPU_RGDn_WORD1_WR(x, n, v) (ADDRESS_WRITE(hw_mpu_rgdn_word1_t, HW_MPU_RGDn_WORD1_ADDR(x, n), v))
#define HW_MPU_RGDn_WORD1_SET(x, n, v) (HW_MPU_RGDn_WORD1_WR(x, n, HW_MPU_RGDn_WORD1_RD(x, n) | (v)))
#define HW_MPU_RGDn_WORD1_CLR(x, n, v) (HW_MPU_RGDn_WORD1_WR(x, n, HW_MPU_RGDn_WORD1_RD(x, n) & ~(v)))
#define HW_MPU_RGDn_WORD1_TOG(x, n, v) (HW_MPU_RGDn_WORD1_WR(x, n, HW_MPU_RGDn_WORD1_RD(x, n) ^ (v)))
@ -555,7 +562,7 @@ typedef union _hw_mpu_rgdn_word1
#define BS_MPU_RGDn_WORD1_ENDADDR (27U) /*!< Bit field size in bits for MPU_RGDn_WORD1_ENDADDR. */
/*! @brief Read current value of the MPU_RGDn_WORD1_ENDADDR field. */
#define BR_MPU_RGDn_WORD1_ENDADDR(x, n) (HW_MPU_RGDn_WORD1(x, n).B.ENDADDR)
#define BR_MPU_RGDn_WORD1_ENDADDR(x, n) (UNION_READ(hw_mpu_rgdn_word1_t, HW_MPU_RGDn_WORD1_ADDR(x, n), U, B.ENDADDR))
/*! @brief Format value for bitfield MPU_RGDn_WORD1_ENDADDR. */
#define BF_MPU_RGDn_WORD1_ENDADDR(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD1_ENDADDR) & BM_MPU_RGDn_WORD1_ENDADDR)
@ -630,8 +637,8 @@ typedef union _hw_mpu_rgdn_word2
#define HW_MPU_RGDn_WORD2_ADDR(x, n) ((x) + 0x408U + (0x10U * (n)))
#define HW_MPU_RGDn_WORD2(x, n) (*(__IO hw_mpu_rgdn_word2_t *) HW_MPU_RGDn_WORD2_ADDR(x, n))
#define HW_MPU_RGDn_WORD2_RD(x, n) (HW_MPU_RGDn_WORD2(x, n).U)
#define HW_MPU_RGDn_WORD2_WR(x, n, v) (HW_MPU_RGDn_WORD2(x, n).U = (v))
#define HW_MPU_RGDn_WORD2_RD(x, n) (ADDRESS_READ(hw_mpu_rgdn_word2_t, HW_MPU_RGDn_WORD2_ADDR(x, n)))
#define HW_MPU_RGDn_WORD2_WR(x, n, v) (ADDRESS_WRITE(hw_mpu_rgdn_word2_t, HW_MPU_RGDn_WORD2_ADDR(x, n), v))
#define HW_MPU_RGDn_WORD2_SET(x, n, v) (HW_MPU_RGDn_WORD2_WR(x, n, HW_MPU_RGDn_WORD2_RD(x, n) | (v)))
#define HW_MPU_RGDn_WORD2_CLR(x, n, v) (HW_MPU_RGDn_WORD2_WR(x, n, HW_MPU_RGDn_WORD2_RD(x, n) & ~(v)))
#define HW_MPU_RGDn_WORD2_TOG(x, n, v) (HW_MPU_RGDn_WORD2_WR(x, n, HW_MPU_RGDn_WORD2_RD(x, n) ^ (v)))
@ -652,7 +659,7 @@ typedef union _hw_mpu_rgdn_word2
#define BS_MPU_RGDn_WORD2_M0UM (3U) /*!< Bit field size in bits for MPU_RGDn_WORD2_M0UM. */
/*! @brief Read current value of the MPU_RGDn_WORD2_M0UM field. */
#define BR_MPU_RGDn_WORD2_M0UM(x, n) (HW_MPU_RGDn_WORD2(x, n).B.M0UM)
#define BR_MPU_RGDn_WORD2_M0UM(x, n) (UNION_READ(hw_mpu_rgdn_word2_t, HW_MPU_RGDn_WORD2_ADDR(x, n), U, B.M0UM))
/*! @brief Format value for bitfield MPU_RGDn_WORD2_M0UM. */
#define BF_MPU_RGDn_WORD2_M0UM(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD2_M0UM) & BM_MPU_RGDn_WORD2_M0UM)
@ -672,7 +679,7 @@ typedef union _hw_mpu_rgdn_word2
#define BS_MPU_RGDn_WORD2_M0SM (2U) /*!< Bit field size in bits for MPU_RGDn_WORD2_M0SM. */
/*! @brief Read current value of the MPU_RGDn_WORD2_M0SM field. */
#define BR_MPU_RGDn_WORD2_M0SM(x, n) (HW_MPU_RGDn_WORD2(x, n).B.M0SM)
#define BR_MPU_RGDn_WORD2_M0SM(x, n) (UNION_READ(hw_mpu_rgdn_word2_t, HW_MPU_RGDn_WORD2_ADDR(x, n), U, B.M0SM))
/*! @brief Format value for bitfield MPU_RGDn_WORD2_M0SM. */
#define BF_MPU_RGDn_WORD2_M0SM(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD2_M0SM) & BM_MPU_RGDn_WORD2_M0SM)
@ -692,13 +699,13 @@ typedef union _hw_mpu_rgdn_word2
#define BS_MPU_RGDn_WORD2_M0PE (1U) /*!< Bit field size in bits for MPU_RGDn_WORD2_M0PE. */
/*! @brief Read current value of the MPU_RGDn_WORD2_M0PE field. */
#define BR_MPU_RGDn_WORD2_M0PE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M0PE))
#define BR_MPU_RGDn_WORD2_M0PE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M0PE)))
/*! @brief Format value for bitfield MPU_RGDn_WORD2_M0PE. */
#define BF_MPU_RGDn_WORD2_M0PE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD2_M0PE) & BM_MPU_RGDn_WORD2_M0PE)
/*! @brief Set the M0PE field to a new value. */
#define BW_MPU_RGDn_WORD2_M0PE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M0PE) = (v))
#define BW_MPU_RGDn_WORD2_M0PE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M0PE), v))
/*@}*/
/*!
@ -712,7 +719,7 @@ typedef union _hw_mpu_rgdn_word2
#define BS_MPU_RGDn_WORD2_M1UM (3U) /*!< Bit field size in bits for MPU_RGDn_WORD2_M1UM. */
/*! @brief Read current value of the MPU_RGDn_WORD2_M1UM field. */
#define BR_MPU_RGDn_WORD2_M1UM(x, n) (HW_MPU_RGDn_WORD2(x, n).B.M1UM)
#define BR_MPU_RGDn_WORD2_M1UM(x, n) (UNION_READ(hw_mpu_rgdn_word2_t, HW_MPU_RGDn_WORD2_ADDR(x, n), U, B.M1UM))
/*! @brief Format value for bitfield MPU_RGDn_WORD2_M1UM. */
#define BF_MPU_RGDn_WORD2_M1UM(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD2_M1UM) & BM_MPU_RGDn_WORD2_M1UM)
@ -732,7 +739,7 @@ typedef union _hw_mpu_rgdn_word2
#define BS_MPU_RGDn_WORD2_M1SM (2U) /*!< Bit field size in bits for MPU_RGDn_WORD2_M1SM. */
/*! @brief Read current value of the MPU_RGDn_WORD2_M1SM field. */
#define BR_MPU_RGDn_WORD2_M1SM(x, n) (HW_MPU_RGDn_WORD2(x, n).B.M1SM)
#define BR_MPU_RGDn_WORD2_M1SM(x, n) (UNION_READ(hw_mpu_rgdn_word2_t, HW_MPU_RGDn_WORD2_ADDR(x, n), U, B.M1SM))
/*! @brief Format value for bitfield MPU_RGDn_WORD2_M1SM. */
#define BF_MPU_RGDn_WORD2_M1SM(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD2_M1SM) & BM_MPU_RGDn_WORD2_M1SM)
@ -752,13 +759,13 @@ typedef union _hw_mpu_rgdn_word2
#define BS_MPU_RGDn_WORD2_M1PE (1U) /*!< Bit field size in bits for MPU_RGDn_WORD2_M1PE. */
/*! @brief Read current value of the MPU_RGDn_WORD2_M1PE field. */
#define BR_MPU_RGDn_WORD2_M1PE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M1PE))
#define BR_MPU_RGDn_WORD2_M1PE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M1PE)))
/*! @brief Format value for bitfield MPU_RGDn_WORD2_M1PE. */
#define BF_MPU_RGDn_WORD2_M1PE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD2_M1PE) & BM_MPU_RGDn_WORD2_M1PE)
/*! @brief Set the M1PE field to a new value. */
#define BW_MPU_RGDn_WORD2_M1PE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M1PE) = (v))
#define BW_MPU_RGDn_WORD2_M1PE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M1PE), v))
/*@}*/
/*!
@ -772,7 +779,7 @@ typedef union _hw_mpu_rgdn_word2
#define BS_MPU_RGDn_WORD2_M2UM (3U) /*!< Bit field size in bits for MPU_RGDn_WORD2_M2UM. */
/*! @brief Read current value of the MPU_RGDn_WORD2_M2UM field. */
#define BR_MPU_RGDn_WORD2_M2UM(x, n) (HW_MPU_RGDn_WORD2(x, n).B.M2UM)
#define BR_MPU_RGDn_WORD2_M2UM(x, n) (UNION_READ(hw_mpu_rgdn_word2_t, HW_MPU_RGDn_WORD2_ADDR(x, n), U, B.M2UM))
/*! @brief Format value for bitfield MPU_RGDn_WORD2_M2UM. */
#define BF_MPU_RGDn_WORD2_M2UM(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD2_M2UM) & BM_MPU_RGDn_WORD2_M2UM)
@ -792,7 +799,7 @@ typedef union _hw_mpu_rgdn_word2
#define BS_MPU_RGDn_WORD2_M2SM (2U) /*!< Bit field size in bits for MPU_RGDn_WORD2_M2SM. */
/*! @brief Read current value of the MPU_RGDn_WORD2_M2SM field. */
#define BR_MPU_RGDn_WORD2_M2SM(x, n) (HW_MPU_RGDn_WORD2(x, n).B.M2SM)
#define BR_MPU_RGDn_WORD2_M2SM(x, n) (UNION_READ(hw_mpu_rgdn_word2_t, HW_MPU_RGDn_WORD2_ADDR(x, n), U, B.M2SM))
/*! @brief Format value for bitfield MPU_RGDn_WORD2_M2SM. */
#define BF_MPU_RGDn_WORD2_M2SM(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD2_M2SM) & BM_MPU_RGDn_WORD2_M2SM)
@ -812,13 +819,13 @@ typedef union _hw_mpu_rgdn_word2
#define BS_MPU_RGDn_WORD2_M2PE (1U) /*!< Bit field size in bits for MPU_RGDn_WORD2_M2PE. */
/*! @brief Read current value of the MPU_RGDn_WORD2_M2PE field. */
#define BR_MPU_RGDn_WORD2_M2PE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M2PE))
#define BR_MPU_RGDn_WORD2_M2PE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M2PE)))
/*! @brief Format value for bitfield MPU_RGDn_WORD2_M2PE. */
#define BF_MPU_RGDn_WORD2_M2PE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD2_M2PE) & BM_MPU_RGDn_WORD2_M2PE)
/*! @brief Set the M2PE field to a new value. */
#define BW_MPU_RGDn_WORD2_M2PE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M2PE) = (v))
#define BW_MPU_RGDn_WORD2_M2PE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M2PE), v))
/*@}*/
/*!
@ -839,7 +846,7 @@ typedef union _hw_mpu_rgdn_word2
#define BS_MPU_RGDn_WORD2_M3UM (3U) /*!< Bit field size in bits for MPU_RGDn_WORD2_M3UM. */
/*! @brief Read current value of the MPU_RGDn_WORD2_M3UM field. */
#define BR_MPU_RGDn_WORD2_M3UM(x, n) (HW_MPU_RGDn_WORD2(x, n).B.M3UM)
#define BR_MPU_RGDn_WORD2_M3UM(x, n) (UNION_READ(hw_mpu_rgdn_word2_t, HW_MPU_RGDn_WORD2_ADDR(x, n), U, B.M3UM))
/*! @brief Format value for bitfield MPU_RGDn_WORD2_M3UM. */
#define BF_MPU_RGDn_WORD2_M3UM(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD2_M3UM) & BM_MPU_RGDn_WORD2_M3UM)
@ -865,7 +872,7 @@ typedef union _hw_mpu_rgdn_word2
#define BS_MPU_RGDn_WORD2_M3SM (2U) /*!< Bit field size in bits for MPU_RGDn_WORD2_M3SM. */
/*! @brief Read current value of the MPU_RGDn_WORD2_M3SM field. */
#define BR_MPU_RGDn_WORD2_M3SM(x, n) (HW_MPU_RGDn_WORD2(x, n).B.M3SM)
#define BR_MPU_RGDn_WORD2_M3SM(x, n) (UNION_READ(hw_mpu_rgdn_word2_t, HW_MPU_RGDn_WORD2_ADDR(x, n), U, B.M3SM))
/*! @brief Format value for bitfield MPU_RGDn_WORD2_M3SM. */
#define BF_MPU_RGDn_WORD2_M3SM(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD2_M3SM) & BM_MPU_RGDn_WORD2_M3SM)
@ -888,13 +895,13 @@ typedef union _hw_mpu_rgdn_word2
#define BS_MPU_RGDn_WORD2_M3PE (1U) /*!< Bit field size in bits for MPU_RGDn_WORD2_M3PE. */
/*! @brief Read current value of the MPU_RGDn_WORD2_M3PE field. */
#define BR_MPU_RGDn_WORD2_M3PE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M3PE))
#define BR_MPU_RGDn_WORD2_M3PE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M3PE)))
/*! @brief Format value for bitfield MPU_RGDn_WORD2_M3PE. */
#define BF_MPU_RGDn_WORD2_M3PE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD2_M3PE) & BM_MPU_RGDn_WORD2_M3PE)
/*! @brief Set the M3PE field to a new value. */
#define BW_MPU_RGDn_WORD2_M3PE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M3PE) = (v))
#define BW_MPU_RGDn_WORD2_M3PE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M3PE), v))
/*@}*/
/*!
@ -911,13 +918,13 @@ typedef union _hw_mpu_rgdn_word2
#define BS_MPU_RGDn_WORD2_M4WE (1U) /*!< Bit field size in bits for MPU_RGDn_WORD2_M4WE. */
/*! @brief Read current value of the MPU_RGDn_WORD2_M4WE field. */
#define BR_MPU_RGDn_WORD2_M4WE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M4WE))
#define BR_MPU_RGDn_WORD2_M4WE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M4WE)))
/*! @brief Format value for bitfield MPU_RGDn_WORD2_M4WE. */
#define BF_MPU_RGDn_WORD2_M4WE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD2_M4WE) & BM_MPU_RGDn_WORD2_M4WE)
/*! @brief Set the M4WE field to a new value. */
#define BW_MPU_RGDn_WORD2_M4WE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M4WE) = (v))
#define BW_MPU_RGDn_WORD2_M4WE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M4WE), v))
/*@}*/
/*!
@ -934,13 +941,13 @@ typedef union _hw_mpu_rgdn_word2
#define BS_MPU_RGDn_WORD2_M4RE (1U) /*!< Bit field size in bits for MPU_RGDn_WORD2_M4RE. */
/*! @brief Read current value of the MPU_RGDn_WORD2_M4RE field. */
#define BR_MPU_RGDn_WORD2_M4RE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M4RE))
#define BR_MPU_RGDn_WORD2_M4RE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M4RE)))
/*! @brief Format value for bitfield MPU_RGDn_WORD2_M4RE. */
#define BF_MPU_RGDn_WORD2_M4RE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD2_M4RE) & BM_MPU_RGDn_WORD2_M4RE)
/*! @brief Set the M4RE field to a new value. */
#define BW_MPU_RGDn_WORD2_M4RE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M4RE) = (v))
#define BW_MPU_RGDn_WORD2_M4RE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M4RE), v))
/*@}*/
/*!
@ -957,13 +964,13 @@ typedef union _hw_mpu_rgdn_word2
#define BS_MPU_RGDn_WORD2_M5WE (1U) /*!< Bit field size in bits for MPU_RGDn_WORD2_M5WE. */
/*! @brief Read current value of the MPU_RGDn_WORD2_M5WE field. */
#define BR_MPU_RGDn_WORD2_M5WE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M5WE))
#define BR_MPU_RGDn_WORD2_M5WE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M5WE)))
/*! @brief Format value for bitfield MPU_RGDn_WORD2_M5WE. */
#define BF_MPU_RGDn_WORD2_M5WE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD2_M5WE) & BM_MPU_RGDn_WORD2_M5WE)
/*! @brief Set the M5WE field to a new value. */
#define BW_MPU_RGDn_WORD2_M5WE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M5WE) = (v))
#define BW_MPU_RGDn_WORD2_M5WE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M5WE), v))
/*@}*/
/*!
@ -980,13 +987,13 @@ typedef union _hw_mpu_rgdn_word2
#define BS_MPU_RGDn_WORD2_M5RE (1U) /*!< Bit field size in bits for MPU_RGDn_WORD2_M5RE. */
/*! @brief Read current value of the MPU_RGDn_WORD2_M5RE field. */
#define BR_MPU_RGDn_WORD2_M5RE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M5RE))
#define BR_MPU_RGDn_WORD2_M5RE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M5RE)))
/*! @brief Format value for bitfield MPU_RGDn_WORD2_M5RE. */
#define BF_MPU_RGDn_WORD2_M5RE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD2_M5RE) & BM_MPU_RGDn_WORD2_M5RE)
/*! @brief Set the M5RE field to a new value. */
#define BW_MPU_RGDn_WORD2_M5RE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M5RE) = (v))
#define BW_MPU_RGDn_WORD2_M5RE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M5RE), v))
/*@}*/
/*!
@ -1003,13 +1010,13 @@ typedef union _hw_mpu_rgdn_word2
#define BS_MPU_RGDn_WORD2_M6WE (1U) /*!< Bit field size in bits for MPU_RGDn_WORD2_M6WE. */
/*! @brief Read current value of the MPU_RGDn_WORD2_M6WE field. */
#define BR_MPU_RGDn_WORD2_M6WE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M6WE))
#define BR_MPU_RGDn_WORD2_M6WE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M6WE)))
/*! @brief Format value for bitfield MPU_RGDn_WORD2_M6WE. */
#define BF_MPU_RGDn_WORD2_M6WE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD2_M6WE) & BM_MPU_RGDn_WORD2_M6WE)
/*! @brief Set the M6WE field to a new value. */
#define BW_MPU_RGDn_WORD2_M6WE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M6WE) = (v))
#define BW_MPU_RGDn_WORD2_M6WE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M6WE), v))
/*@}*/
/*!
@ -1026,13 +1033,13 @@ typedef union _hw_mpu_rgdn_word2
#define BS_MPU_RGDn_WORD2_M6RE (1U) /*!< Bit field size in bits for MPU_RGDn_WORD2_M6RE. */
/*! @brief Read current value of the MPU_RGDn_WORD2_M6RE field. */
#define BR_MPU_RGDn_WORD2_M6RE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M6RE))
#define BR_MPU_RGDn_WORD2_M6RE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M6RE)))
/*! @brief Format value for bitfield MPU_RGDn_WORD2_M6RE. */
#define BF_MPU_RGDn_WORD2_M6RE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD2_M6RE) & BM_MPU_RGDn_WORD2_M6RE)
/*! @brief Set the M6RE field to a new value. */
#define BW_MPU_RGDn_WORD2_M6RE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M6RE) = (v))
#define BW_MPU_RGDn_WORD2_M6RE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M6RE), v))
/*@}*/
/*!
@ -1049,13 +1056,13 @@ typedef union _hw_mpu_rgdn_word2
#define BS_MPU_RGDn_WORD2_M7WE (1U) /*!< Bit field size in bits for MPU_RGDn_WORD2_M7WE. */
/*! @brief Read current value of the MPU_RGDn_WORD2_M7WE field. */
#define BR_MPU_RGDn_WORD2_M7WE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M7WE))
#define BR_MPU_RGDn_WORD2_M7WE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M7WE)))
/*! @brief Format value for bitfield MPU_RGDn_WORD2_M7WE. */
#define BF_MPU_RGDn_WORD2_M7WE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD2_M7WE) & BM_MPU_RGDn_WORD2_M7WE)
/*! @brief Set the M7WE field to a new value. */
#define BW_MPU_RGDn_WORD2_M7WE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M7WE) = (v))
#define BW_MPU_RGDn_WORD2_M7WE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M7WE), v))
/*@}*/
/*!
@ -1072,13 +1079,13 @@ typedef union _hw_mpu_rgdn_word2
#define BS_MPU_RGDn_WORD2_M7RE (1U) /*!< Bit field size in bits for MPU_RGDn_WORD2_M7RE. */
/*! @brief Read current value of the MPU_RGDn_WORD2_M7RE field. */
#define BR_MPU_RGDn_WORD2_M7RE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M7RE))
#define BR_MPU_RGDn_WORD2_M7RE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M7RE)))
/*! @brief Format value for bitfield MPU_RGDn_WORD2_M7RE. */
#define BF_MPU_RGDn_WORD2_M7RE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD2_M7RE) & BM_MPU_RGDn_WORD2_M7RE)
/*! @brief Set the M7RE field to a new value. */
#define BW_MPU_RGDn_WORD2_M7RE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M7RE) = (v))
#define BW_MPU_RGDn_WORD2_M7RE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD2_ADDR(x, n), BP_MPU_RGDn_WORD2_M7RE), v))
/*@}*/
/*******************************************************************************
* HW_MPU_RGDn_WORD3 - Region Descriptor n, Word 3
@ -1113,8 +1120,8 @@ typedef union _hw_mpu_rgdn_word3
#define HW_MPU_RGDn_WORD3_ADDR(x, n) ((x) + 0x40CU + (0x10U * (n)))
#define HW_MPU_RGDn_WORD3(x, n) (*(__IO hw_mpu_rgdn_word3_t *) HW_MPU_RGDn_WORD3_ADDR(x, n))
#define HW_MPU_RGDn_WORD3_RD(x, n) (HW_MPU_RGDn_WORD3(x, n).U)
#define HW_MPU_RGDn_WORD3_WR(x, n, v) (HW_MPU_RGDn_WORD3(x, n).U = (v))
#define HW_MPU_RGDn_WORD3_RD(x, n) (ADDRESS_READ(hw_mpu_rgdn_word3_t, HW_MPU_RGDn_WORD3_ADDR(x, n)))
#define HW_MPU_RGDn_WORD3_WR(x, n, v) (ADDRESS_WRITE(hw_mpu_rgdn_word3_t, HW_MPU_RGDn_WORD3_ADDR(x, n), v))
#define HW_MPU_RGDn_WORD3_SET(x, n, v) (HW_MPU_RGDn_WORD3_WR(x, n, HW_MPU_RGDn_WORD3_RD(x, n) | (v)))
#define HW_MPU_RGDn_WORD3_CLR(x, n, v) (HW_MPU_RGDn_WORD3_WR(x, n, HW_MPU_RGDn_WORD3_RD(x, n) & ~(v)))
#define HW_MPU_RGDn_WORD3_TOG(x, n, v) (HW_MPU_RGDn_WORD3_WR(x, n, HW_MPU_RGDn_WORD3_RD(x, n) ^ (v)))
@ -1140,13 +1147,13 @@ typedef union _hw_mpu_rgdn_word3
#define BS_MPU_RGDn_WORD3_VLD (1U) /*!< Bit field size in bits for MPU_RGDn_WORD3_VLD. */
/*! @brief Read current value of the MPU_RGDn_WORD3_VLD field. */
#define BR_MPU_RGDn_WORD3_VLD(x, n) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD3_ADDR(x, n), BP_MPU_RGDn_WORD3_VLD))
#define BR_MPU_RGDn_WORD3_VLD(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD3_ADDR(x, n), BP_MPU_RGDn_WORD3_VLD)))
/*! @brief Format value for bitfield MPU_RGDn_WORD3_VLD. */
#define BF_MPU_RGDn_WORD3_VLD(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD3_VLD) & BM_MPU_RGDn_WORD3_VLD)
/*! @brief Set the VLD field to a new value. */
#define BW_MPU_RGDn_WORD3_VLD(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDn_WORD3_ADDR(x, n), BP_MPU_RGDn_WORD3_VLD) = (v))
#define BW_MPU_RGDn_WORD3_VLD(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDn_WORD3_ADDR(x, n), BP_MPU_RGDn_WORD3_VLD), v))
/*@}*/
/*!
@ -1165,7 +1172,7 @@ typedef union _hw_mpu_rgdn_word3
#define BS_MPU_RGDn_WORD3_PIDMASK (8U) /*!< Bit field size in bits for MPU_RGDn_WORD3_PIDMASK. */
/*! @brief Read current value of the MPU_RGDn_WORD3_PIDMASK field. */
#define BR_MPU_RGDn_WORD3_PIDMASK(x, n) (HW_MPU_RGDn_WORD3(x, n).B.PIDMASK)
#define BR_MPU_RGDn_WORD3_PIDMASK(x, n) (UNION_READ(hw_mpu_rgdn_word3_t, HW_MPU_RGDn_WORD3_ADDR(x, n), U, B.PIDMASK))
/*! @brief Format value for bitfield MPU_RGDn_WORD3_PIDMASK. */
#define BF_MPU_RGDn_WORD3_PIDMASK(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD3_PIDMASK) & BM_MPU_RGDn_WORD3_PIDMASK)
@ -1187,7 +1194,7 @@ typedef union _hw_mpu_rgdn_word3
#define BS_MPU_RGDn_WORD3_PID (8U) /*!< Bit field size in bits for MPU_RGDn_WORD3_PID. */
/*! @brief Read current value of the MPU_RGDn_WORD3_PID field. */
#define BR_MPU_RGDn_WORD3_PID(x, n) (HW_MPU_RGDn_WORD3(x, n).B.PID)
#define BR_MPU_RGDn_WORD3_PID(x, n) (UNION_READ(hw_mpu_rgdn_word3_t, HW_MPU_RGDn_WORD3_ADDR(x, n), U, B.PID))
/*! @brief Format value for bitfield MPU_RGDn_WORD3_PID. */
#define BF_MPU_RGDn_WORD3_PID(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDn_WORD3_PID) & BM_MPU_RGDn_WORD3_PID)
@ -1253,8 +1260,8 @@ typedef union _hw_mpu_rgdaacn
#define HW_MPU_RGDAACn_ADDR(x, n) ((x) + 0x800U + (0x4U * (n)))
#define HW_MPU_RGDAACn(x, n) (*(__IO hw_mpu_rgdaacn_t *) HW_MPU_RGDAACn_ADDR(x, n))
#define HW_MPU_RGDAACn_RD(x, n) (HW_MPU_RGDAACn(x, n).U)
#define HW_MPU_RGDAACn_WR(x, n, v) (HW_MPU_RGDAACn(x, n).U = (v))
#define HW_MPU_RGDAACn_RD(x, n) (ADDRESS_READ(hw_mpu_rgdaacn_t, HW_MPU_RGDAACn_ADDR(x, n)))
#define HW_MPU_RGDAACn_WR(x, n, v) (ADDRESS_WRITE(hw_mpu_rgdaacn_t, HW_MPU_RGDAACn_ADDR(x, n), v))
#define HW_MPU_RGDAACn_SET(x, n, v) (HW_MPU_RGDAACn_WR(x, n, HW_MPU_RGDAACn_RD(x, n) | (v)))
#define HW_MPU_RGDAACn_CLR(x, n, v) (HW_MPU_RGDAACn_WR(x, n, HW_MPU_RGDAACn_RD(x, n) & ~(v)))
#define HW_MPU_RGDAACn_TOG(x, n, v) (HW_MPU_RGDAACn_WR(x, n, HW_MPU_RGDAACn_RD(x, n) ^ (v)))
@ -1275,7 +1282,7 @@ typedef union _hw_mpu_rgdaacn
#define BS_MPU_RGDAACn_M0UM (3U) /*!< Bit field size in bits for MPU_RGDAACn_M0UM. */
/*! @brief Read current value of the MPU_RGDAACn_M0UM field. */
#define BR_MPU_RGDAACn_M0UM(x, n) (HW_MPU_RGDAACn(x, n).B.M0UM)
#define BR_MPU_RGDAACn_M0UM(x, n) (UNION_READ(hw_mpu_rgdaacn_t, HW_MPU_RGDAACn_ADDR(x, n), U, B.M0UM))
/*! @brief Format value for bitfield MPU_RGDAACn_M0UM. */
#define BF_MPU_RGDAACn_M0UM(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDAACn_M0UM) & BM_MPU_RGDAACn_M0UM)
@ -1295,7 +1302,7 @@ typedef union _hw_mpu_rgdaacn
#define BS_MPU_RGDAACn_M0SM (2U) /*!< Bit field size in bits for MPU_RGDAACn_M0SM. */
/*! @brief Read current value of the MPU_RGDAACn_M0SM field. */
#define BR_MPU_RGDAACn_M0SM(x, n) (HW_MPU_RGDAACn(x, n).B.M0SM)
#define BR_MPU_RGDAACn_M0SM(x, n) (UNION_READ(hw_mpu_rgdaacn_t, HW_MPU_RGDAACn_ADDR(x, n), U, B.M0SM))
/*! @brief Format value for bitfield MPU_RGDAACn_M0SM. */
#define BF_MPU_RGDAACn_M0SM(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDAACn_M0SM) & BM_MPU_RGDAACn_M0SM)
@ -1315,13 +1322,13 @@ typedef union _hw_mpu_rgdaacn
#define BS_MPU_RGDAACn_M0PE (1U) /*!< Bit field size in bits for MPU_RGDAACn_M0PE. */
/*! @brief Read current value of the MPU_RGDAACn_M0PE field. */
#define BR_MPU_RGDAACn_M0PE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M0PE))
#define BR_MPU_RGDAACn_M0PE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M0PE)))
/*! @brief Format value for bitfield MPU_RGDAACn_M0PE. */
#define BF_MPU_RGDAACn_M0PE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDAACn_M0PE) & BM_MPU_RGDAACn_M0PE)
/*! @brief Set the M0PE field to a new value. */
#define BW_MPU_RGDAACn_M0PE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M0PE) = (v))
#define BW_MPU_RGDAACn_M0PE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M0PE), v))
/*@}*/
/*!
@ -1335,7 +1342,7 @@ typedef union _hw_mpu_rgdaacn
#define BS_MPU_RGDAACn_M1UM (3U) /*!< Bit field size in bits for MPU_RGDAACn_M1UM. */
/*! @brief Read current value of the MPU_RGDAACn_M1UM field. */
#define BR_MPU_RGDAACn_M1UM(x, n) (HW_MPU_RGDAACn(x, n).B.M1UM)
#define BR_MPU_RGDAACn_M1UM(x, n) (UNION_READ(hw_mpu_rgdaacn_t, HW_MPU_RGDAACn_ADDR(x, n), U, B.M1UM))
/*! @brief Format value for bitfield MPU_RGDAACn_M1UM. */
#define BF_MPU_RGDAACn_M1UM(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDAACn_M1UM) & BM_MPU_RGDAACn_M1UM)
@ -1355,7 +1362,7 @@ typedef union _hw_mpu_rgdaacn
#define BS_MPU_RGDAACn_M1SM (2U) /*!< Bit field size in bits for MPU_RGDAACn_M1SM. */
/*! @brief Read current value of the MPU_RGDAACn_M1SM field. */
#define BR_MPU_RGDAACn_M1SM(x, n) (HW_MPU_RGDAACn(x, n).B.M1SM)
#define BR_MPU_RGDAACn_M1SM(x, n) (UNION_READ(hw_mpu_rgdaacn_t, HW_MPU_RGDAACn_ADDR(x, n), U, B.M1SM))
/*! @brief Format value for bitfield MPU_RGDAACn_M1SM. */
#define BF_MPU_RGDAACn_M1SM(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDAACn_M1SM) & BM_MPU_RGDAACn_M1SM)
@ -1375,13 +1382,13 @@ typedef union _hw_mpu_rgdaacn
#define BS_MPU_RGDAACn_M1PE (1U) /*!< Bit field size in bits for MPU_RGDAACn_M1PE. */
/*! @brief Read current value of the MPU_RGDAACn_M1PE field. */
#define BR_MPU_RGDAACn_M1PE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M1PE))
#define BR_MPU_RGDAACn_M1PE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M1PE)))
/*! @brief Format value for bitfield MPU_RGDAACn_M1PE. */
#define BF_MPU_RGDAACn_M1PE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDAACn_M1PE) & BM_MPU_RGDAACn_M1PE)
/*! @brief Set the M1PE field to a new value. */
#define BW_MPU_RGDAACn_M1PE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M1PE) = (v))
#define BW_MPU_RGDAACn_M1PE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M1PE), v))
/*@}*/
/*!
@ -1395,7 +1402,7 @@ typedef union _hw_mpu_rgdaacn
#define BS_MPU_RGDAACn_M2UM (3U) /*!< Bit field size in bits for MPU_RGDAACn_M2UM. */
/*! @brief Read current value of the MPU_RGDAACn_M2UM field. */
#define BR_MPU_RGDAACn_M2UM(x, n) (HW_MPU_RGDAACn(x, n).B.M2UM)
#define BR_MPU_RGDAACn_M2UM(x, n) (UNION_READ(hw_mpu_rgdaacn_t, HW_MPU_RGDAACn_ADDR(x, n), U, B.M2UM))
/*! @brief Format value for bitfield MPU_RGDAACn_M2UM. */
#define BF_MPU_RGDAACn_M2UM(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDAACn_M2UM) & BM_MPU_RGDAACn_M2UM)
@ -1415,7 +1422,7 @@ typedef union _hw_mpu_rgdaacn
#define BS_MPU_RGDAACn_M2SM (2U) /*!< Bit field size in bits for MPU_RGDAACn_M2SM. */
/*! @brief Read current value of the MPU_RGDAACn_M2SM field. */
#define BR_MPU_RGDAACn_M2SM(x, n) (HW_MPU_RGDAACn(x, n).B.M2SM)
#define BR_MPU_RGDAACn_M2SM(x, n) (UNION_READ(hw_mpu_rgdaacn_t, HW_MPU_RGDAACn_ADDR(x, n), U, B.M2SM))
/*! @brief Format value for bitfield MPU_RGDAACn_M2SM. */
#define BF_MPU_RGDAACn_M2SM(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDAACn_M2SM) & BM_MPU_RGDAACn_M2SM)
@ -1435,13 +1442,13 @@ typedef union _hw_mpu_rgdaacn
#define BS_MPU_RGDAACn_M2PE (1U) /*!< Bit field size in bits for MPU_RGDAACn_M2PE. */
/*! @brief Read current value of the MPU_RGDAACn_M2PE field. */
#define BR_MPU_RGDAACn_M2PE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M2PE))
#define BR_MPU_RGDAACn_M2PE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M2PE)))
/*! @brief Format value for bitfield MPU_RGDAACn_M2PE. */
#define BF_MPU_RGDAACn_M2PE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDAACn_M2PE) & BM_MPU_RGDAACn_M2PE)
/*! @brief Set the M2PE field to a new value. */
#define BW_MPU_RGDAACn_M2PE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M2PE) = (v))
#define BW_MPU_RGDAACn_M2PE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M2PE), v))
/*@}*/
/*!
@ -1462,7 +1469,7 @@ typedef union _hw_mpu_rgdaacn
#define BS_MPU_RGDAACn_M3UM (3U) /*!< Bit field size in bits for MPU_RGDAACn_M3UM. */
/*! @brief Read current value of the MPU_RGDAACn_M3UM field. */
#define BR_MPU_RGDAACn_M3UM(x, n) (HW_MPU_RGDAACn(x, n).B.M3UM)
#define BR_MPU_RGDAACn_M3UM(x, n) (UNION_READ(hw_mpu_rgdaacn_t, HW_MPU_RGDAACn_ADDR(x, n), U, B.M3UM))
/*! @brief Format value for bitfield MPU_RGDAACn_M3UM. */
#define BF_MPU_RGDAACn_M3UM(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDAACn_M3UM) & BM_MPU_RGDAACn_M3UM)
@ -1488,7 +1495,7 @@ typedef union _hw_mpu_rgdaacn
#define BS_MPU_RGDAACn_M3SM (2U) /*!< Bit field size in bits for MPU_RGDAACn_M3SM. */
/*! @brief Read current value of the MPU_RGDAACn_M3SM field. */
#define BR_MPU_RGDAACn_M3SM(x, n) (HW_MPU_RGDAACn(x, n).B.M3SM)
#define BR_MPU_RGDAACn_M3SM(x, n) (UNION_READ(hw_mpu_rgdaacn_t, HW_MPU_RGDAACn_ADDR(x, n), U, B.M3SM))
/*! @brief Format value for bitfield MPU_RGDAACn_M3SM. */
#define BF_MPU_RGDAACn_M3SM(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDAACn_M3SM) & BM_MPU_RGDAACn_M3SM)
@ -1511,13 +1518,13 @@ typedef union _hw_mpu_rgdaacn
#define BS_MPU_RGDAACn_M3PE (1U) /*!< Bit field size in bits for MPU_RGDAACn_M3PE. */
/*! @brief Read current value of the MPU_RGDAACn_M3PE field. */
#define BR_MPU_RGDAACn_M3PE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M3PE))
#define BR_MPU_RGDAACn_M3PE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M3PE)))
/*! @brief Format value for bitfield MPU_RGDAACn_M3PE. */
#define BF_MPU_RGDAACn_M3PE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDAACn_M3PE) & BM_MPU_RGDAACn_M3PE)
/*! @brief Set the M3PE field to a new value. */
#define BW_MPU_RGDAACn_M3PE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M3PE) = (v))
#define BW_MPU_RGDAACn_M3PE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M3PE), v))
/*@}*/
/*!
@ -1534,13 +1541,13 @@ typedef union _hw_mpu_rgdaacn
#define BS_MPU_RGDAACn_M4WE (1U) /*!< Bit field size in bits for MPU_RGDAACn_M4WE. */
/*! @brief Read current value of the MPU_RGDAACn_M4WE field. */
#define BR_MPU_RGDAACn_M4WE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M4WE))
#define BR_MPU_RGDAACn_M4WE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M4WE)))
/*! @brief Format value for bitfield MPU_RGDAACn_M4WE. */
#define BF_MPU_RGDAACn_M4WE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDAACn_M4WE) & BM_MPU_RGDAACn_M4WE)
/*! @brief Set the M4WE field to a new value. */
#define BW_MPU_RGDAACn_M4WE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M4WE) = (v))
#define BW_MPU_RGDAACn_M4WE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M4WE), v))
/*@}*/
/*!
@ -1557,13 +1564,13 @@ typedef union _hw_mpu_rgdaacn
#define BS_MPU_RGDAACn_M4RE (1U) /*!< Bit field size in bits for MPU_RGDAACn_M4RE. */
/*! @brief Read current value of the MPU_RGDAACn_M4RE field. */
#define BR_MPU_RGDAACn_M4RE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M4RE))
#define BR_MPU_RGDAACn_M4RE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M4RE)))
/*! @brief Format value for bitfield MPU_RGDAACn_M4RE. */
#define BF_MPU_RGDAACn_M4RE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDAACn_M4RE) & BM_MPU_RGDAACn_M4RE)
/*! @brief Set the M4RE field to a new value. */
#define BW_MPU_RGDAACn_M4RE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M4RE) = (v))
#define BW_MPU_RGDAACn_M4RE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M4RE), v))
/*@}*/
/*!
@ -1580,13 +1587,13 @@ typedef union _hw_mpu_rgdaacn
#define BS_MPU_RGDAACn_M5WE (1U) /*!< Bit field size in bits for MPU_RGDAACn_M5WE. */
/*! @brief Read current value of the MPU_RGDAACn_M5WE field. */
#define BR_MPU_RGDAACn_M5WE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M5WE))
#define BR_MPU_RGDAACn_M5WE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M5WE)))
/*! @brief Format value for bitfield MPU_RGDAACn_M5WE. */
#define BF_MPU_RGDAACn_M5WE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDAACn_M5WE) & BM_MPU_RGDAACn_M5WE)
/*! @brief Set the M5WE field to a new value. */
#define BW_MPU_RGDAACn_M5WE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M5WE) = (v))
#define BW_MPU_RGDAACn_M5WE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M5WE), v))
/*@}*/
/*!
@ -1603,13 +1610,13 @@ typedef union _hw_mpu_rgdaacn
#define BS_MPU_RGDAACn_M5RE (1U) /*!< Bit field size in bits for MPU_RGDAACn_M5RE. */
/*! @brief Read current value of the MPU_RGDAACn_M5RE field. */
#define BR_MPU_RGDAACn_M5RE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M5RE))
#define BR_MPU_RGDAACn_M5RE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M5RE)))
/*! @brief Format value for bitfield MPU_RGDAACn_M5RE. */
#define BF_MPU_RGDAACn_M5RE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDAACn_M5RE) & BM_MPU_RGDAACn_M5RE)
/*! @brief Set the M5RE field to a new value. */
#define BW_MPU_RGDAACn_M5RE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M5RE) = (v))
#define BW_MPU_RGDAACn_M5RE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M5RE), v))
/*@}*/
/*!
@ -1626,13 +1633,13 @@ typedef union _hw_mpu_rgdaacn
#define BS_MPU_RGDAACn_M6WE (1U) /*!< Bit field size in bits for MPU_RGDAACn_M6WE. */
/*! @brief Read current value of the MPU_RGDAACn_M6WE field. */
#define BR_MPU_RGDAACn_M6WE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M6WE))
#define BR_MPU_RGDAACn_M6WE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M6WE)))
/*! @brief Format value for bitfield MPU_RGDAACn_M6WE. */
#define BF_MPU_RGDAACn_M6WE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDAACn_M6WE) & BM_MPU_RGDAACn_M6WE)
/*! @brief Set the M6WE field to a new value. */
#define BW_MPU_RGDAACn_M6WE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M6WE) = (v))
#define BW_MPU_RGDAACn_M6WE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M6WE), v))
/*@}*/
/*!
@ -1649,13 +1656,13 @@ typedef union _hw_mpu_rgdaacn
#define BS_MPU_RGDAACn_M6RE (1U) /*!< Bit field size in bits for MPU_RGDAACn_M6RE. */
/*! @brief Read current value of the MPU_RGDAACn_M6RE field. */
#define BR_MPU_RGDAACn_M6RE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M6RE))
#define BR_MPU_RGDAACn_M6RE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M6RE)))
/*! @brief Format value for bitfield MPU_RGDAACn_M6RE. */
#define BF_MPU_RGDAACn_M6RE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDAACn_M6RE) & BM_MPU_RGDAACn_M6RE)
/*! @brief Set the M6RE field to a new value. */
#define BW_MPU_RGDAACn_M6RE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M6RE) = (v))
#define BW_MPU_RGDAACn_M6RE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M6RE), v))
/*@}*/
/*!
@ -1672,13 +1679,13 @@ typedef union _hw_mpu_rgdaacn
#define BS_MPU_RGDAACn_M7WE (1U) /*!< Bit field size in bits for MPU_RGDAACn_M7WE. */
/*! @brief Read current value of the MPU_RGDAACn_M7WE field. */
#define BR_MPU_RGDAACn_M7WE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M7WE))
#define BR_MPU_RGDAACn_M7WE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M7WE)))
/*! @brief Format value for bitfield MPU_RGDAACn_M7WE. */
#define BF_MPU_RGDAACn_M7WE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDAACn_M7WE) & BM_MPU_RGDAACn_M7WE)
/*! @brief Set the M7WE field to a new value. */
#define BW_MPU_RGDAACn_M7WE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M7WE) = (v))
#define BW_MPU_RGDAACn_M7WE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M7WE), v))
/*@}*/
/*!
@ -1695,13 +1702,13 @@ typedef union _hw_mpu_rgdaacn
#define BS_MPU_RGDAACn_M7RE (1U) /*!< Bit field size in bits for MPU_RGDAACn_M7RE. */
/*! @brief Read current value of the MPU_RGDAACn_M7RE field. */
#define BR_MPU_RGDAACn_M7RE(x, n) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M7RE))
#define BR_MPU_RGDAACn_M7RE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M7RE)))
/*! @brief Format value for bitfield MPU_RGDAACn_M7RE. */
#define BF_MPU_RGDAACn_M7RE(v) ((uint32_t)((uint32_t)(v) << BP_MPU_RGDAACn_M7RE) & BM_MPU_RGDAACn_M7RE)
/*! @brief Set the M7RE field to a new value. */
#define BW_MPU_RGDAACn_M7RE(x, n, v) (BITBAND_ACCESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M7RE) = (v))
#define BW_MPU_RGDAACn_M7RE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_MPU_RGDAACn_ADDR(x, n), BP_MPU_RGDAACn_M7RE), v))
/*@}*/
/*******************************************************************************

51
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_nv.h
View File

@ -15,6 +15,9 @@
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** (C) COPYRIGHT 2015-2015 ARM Limited
** ALL RIGHTS RESERVED
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
@ -68,6 +71,10 @@
** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
** Update of SystemInit() and SystemCoreClockUpdate() functions.
** Module access macro module_BASES replaced by module_BASE_PTRS.
** - rev. 2.6 (2015-08-03) (ARM)
** All accesses to memory are replaced by equivalent macros; this allows
** memory read/write operations to be re-defined if needed (for example,
** to implement new security features
**
** ###################################################################
*/
@ -136,7 +143,7 @@ typedef union _hw_nv_backkey3
#define HW_NV_BACKKEY3_ADDR(x) ((x) + 0x0U)
#define HW_NV_BACKKEY3(x) (*(__I hw_nv_backkey3_t *) HW_NV_BACKKEY3_ADDR(x))
#define HW_NV_BACKKEY3_RD(x) (HW_NV_BACKKEY3(x).U)
#define HW_NV_BACKKEY3_RD(x) (ADDRESS_READ(hw_nv_backkey3_t, HW_NV_BACKKEY3_ADDR(x)))
/*@}*/
/*
@ -180,7 +187,7 @@ typedef union _hw_nv_backkey2
#define HW_NV_BACKKEY2_ADDR(x) ((x) + 0x1U)
#define HW_NV_BACKKEY2(x) (*(__I hw_nv_backkey2_t *) HW_NV_BACKKEY2_ADDR(x))
#define HW_NV_BACKKEY2_RD(x) (HW_NV_BACKKEY2(x).U)
#define HW_NV_BACKKEY2_RD(x) (ADDRESS_READ(hw_nv_backkey2_t, HW_NV_BACKKEY2_ADDR(x)))
/*@}*/
/*
@ -224,7 +231,7 @@ typedef union _hw_nv_backkey1
#define HW_NV_BACKKEY1_ADDR(x) ((x) + 0x2U)
#define HW_NV_BACKKEY1(x) (*(__I hw_nv_backkey1_t *) HW_NV_BACKKEY1_ADDR(x))
#define HW_NV_BACKKEY1_RD(x) (HW_NV_BACKKEY1(x).U)
#define HW_NV_BACKKEY1_RD(x) (ADDRESS_READ(hw_nv_backkey1_t, HW_NV_BACKKEY1_ADDR(x)))
/*@}*/
/*
@ -268,7 +275,7 @@ typedef union _hw_nv_backkey0
#define HW_NV_BACKKEY0_ADDR(x) ((x) + 0x3U)
#define HW_NV_BACKKEY0(x) (*(__I hw_nv_backkey0_t *) HW_NV_BACKKEY0_ADDR(x))
#define HW_NV_BACKKEY0_RD(x) (HW_NV_BACKKEY0(x).U)
#define HW_NV_BACKKEY0_RD(x) (ADDRESS_READ(hw_nv_backkey0_t, HW_NV_BACKKEY0_ADDR(x)))
/*@}*/
/*
@ -312,7 +319,7 @@ typedef union _hw_nv_backkey7
#define HW_NV_BACKKEY7_ADDR(x) ((x) + 0x4U)
#define HW_NV_BACKKEY7(x) (*(__I hw_nv_backkey7_t *) HW_NV_BACKKEY7_ADDR(x))
#define HW_NV_BACKKEY7_RD(x) (HW_NV_BACKKEY7(x).U)
#define HW_NV_BACKKEY7_RD(x) (ADDRESS_READ(hw_nv_backkey7_t, HW_NV_BACKKEY7_ADDR(x)))
/*@}*/
/*
@ -356,7 +363,7 @@ typedef union _hw_nv_backkey6
#define HW_NV_BACKKEY6_ADDR(x) ((x) + 0x5U)
#define HW_NV_BACKKEY6(x) (*(__I hw_nv_backkey6_t *) HW_NV_BACKKEY6_ADDR(x))
#define HW_NV_BACKKEY6_RD(x) (HW_NV_BACKKEY6(x).U)
#define HW_NV_BACKKEY6_RD(x) (ADDRESS_READ(hw_nv_backkey6_t, HW_NV_BACKKEY6_ADDR(x)))
/*@}*/
/*
@ -400,7 +407,7 @@ typedef union _hw_nv_backkey5
#define HW_NV_BACKKEY5_ADDR(x) ((x) + 0x6U)
#define HW_NV_BACKKEY5(x) (*(__I hw_nv_backkey5_t *) HW_NV_BACKKEY5_ADDR(x))
#define HW_NV_BACKKEY5_RD(x) (HW_NV_BACKKEY5(x).U)
#define HW_NV_BACKKEY5_RD(x) (ADDRESS_READ(hw_nv_backkey5_t, HW_NV_BACKKEY5_ADDR(x)))
/*@}*/
/*
@ -444,7 +451,7 @@ typedef union _hw_nv_backkey4
#define HW_NV_BACKKEY4_ADDR(x) ((x) + 0x7U)
#define HW_NV_BACKKEY4(x) (*(__I hw_nv_backkey4_t *) HW_NV_BACKKEY4_ADDR(x))
#define HW_NV_BACKKEY4_RD(x) (HW_NV_BACKKEY4(x).U)
#define HW_NV_BACKKEY4_RD(x) (ADDRESS_READ(hw_nv_backkey4_t, HW_NV_BACKKEY4_ADDR(x)))
/*@}*/
/*
@ -488,7 +495,7 @@ typedef union _hw_nv_fprot3
#define HW_NV_FPROT3_ADDR(x) ((x) + 0x8U)
#define HW_NV_FPROT3(x) (*(__I hw_nv_fprot3_t *) HW_NV_FPROT3_ADDR(x))
#define HW_NV_FPROT3_RD(x) (HW_NV_FPROT3(x).U)
#define HW_NV_FPROT3_RD(x) (ADDRESS_READ(hw_nv_fprot3_t, HW_NV_FPROT3_ADDR(x)))
/*@}*/
/*
@ -532,7 +539,7 @@ typedef union _hw_nv_fprot2
#define HW_NV_FPROT2_ADDR(x) ((x) + 0x9U)
#define HW_NV_FPROT2(x) (*(__I hw_nv_fprot2_t *) HW_NV_FPROT2_ADDR(x))
#define HW_NV_FPROT2_RD(x) (HW_NV_FPROT2(x).U)
#define HW_NV_FPROT2_RD(x) (ADDRESS_READ(hw_nv_fprot2_t, HW_NV_FPROT2_ADDR(x)))
/*@}*/
/*
@ -576,7 +583,7 @@ typedef union _hw_nv_fprot1
#define HW_NV_FPROT1_ADDR(x) ((x) + 0xAU)
#define HW_NV_FPROT1(x) (*(__I hw_nv_fprot1_t *) HW_NV_FPROT1_ADDR(x))
#define HW_NV_FPROT1_RD(x) (HW_NV_FPROT1(x).U)
#define HW_NV_FPROT1_RD(x) (ADDRESS_READ(hw_nv_fprot1_t, HW_NV_FPROT1_ADDR(x)))
/*@}*/
/*
@ -620,7 +627,7 @@ typedef union _hw_nv_fprot0
#define HW_NV_FPROT0_ADDR(x) ((x) + 0xBU)
#define HW_NV_FPROT0(x) (*(__I hw_nv_fprot0_t *) HW_NV_FPROT0_ADDR(x))
#define HW_NV_FPROT0_RD(x) (HW_NV_FPROT0(x).U)
#define HW_NV_FPROT0_RD(x) (ADDRESS_READ(hw_nv_fprot0_t, HW_NV_FPROT0_ADDR(x)))
/*@}*/
/*
@ -670,7 +677,7 @@ typedef union _hw_nv_fsec
#define HW_NV_FSEC_ADDR(x) ((x) + 0xCU)
#define HW_NV_FSEC(x) (*(__I hw_nv_fsec_t *) HW_NV_FSEC_ADDR(x))
#define HW_NV_FSEC_RD(x) (HW_NV_FSEC(x).U)
#define HW_NV_FSEC_RD(x) (ADDRESS_READ(hw_nv_fsec_t, HW_NV_FSEC_ADDR(x)))
/*@}*/
/*
@ -690,7 +697,7 @@ typedef union _hw_nv_fsec
#define BS_NV_FSEC_SEC (2U) /*!< Bit field size in bits for NV_FSEC_SEC. */
/*! @brief Read current value of the NV_FSEC_SEC field. */
#define BR_NV_FSEC_SEC(x) (HW_NV_FSEC(x).B.SEC)
#define BR_NV_FSEC_SEC(x) (UNION_READ(hw_nv_fsec_t, HW_NV_FSEC_ADDR(x), U, B.SEC))
/*@}*/
/*!
@ -706,7 +713,7 @@ typedef union _hw_nv_fsec
#define BS_NV_FSEC_FSLACC (2U) /*!< Bit field size in bits for NV_FSEC_FSLACC. */
/*! @brief Read current value of the NV_FSEC_FSLACC field. */
#define BR_NV_FSEC_FSLACC(x) (HW_NV_FSEC(x).B.FSLACC)
#define BR_NV_FSEC_FSLACC(x) (UNION_READ(hw_nv_fsec_t, HW_NV_FSEC_ADDR(x), U, B.FSLACC))
/*@}*/
/*!
@ -722,7 +729,7 @@ typedef union _hw_nv_fsec
#define BS_NV_FSEC_MEEN (2U) /*!< Bit field size in bits for NV_FSEC_MEEN. */
/*! @brief Read current value of the NV_FSEC_MEEN field. */
#define BR_NV_FSEC_MEEN(x) (HW_NV_FSEC(x).B.MEEN)
#define BR_NV_FSEC_MEEN(x) (UNION_READ(hw_nv_fsec_t, HW_NV_FSEC_ADDR(x), U, B.MEEN))
/*@}*/
/*!
@ -738,7 +745,7 @@ typedef union _hw_nv_fsec
#define BS_NV_FSEC_KEYEN (2U) /*!< Bit field size in bits for NV_FSEC_KEYEN. */
/*! @brief Read current value of the NV_FSEC_KEYEN field. */
#define BR_NV_FSEC_KEYEN(x) (HW_NV_FSEC(x).B.KEYEN)
#define BR_NV_FSEC_KEYEN(x) (UNION_READ(hw_nv_fsec_t, HW_NV_FSEC_ADDR(x), U, B.KEYEN))
/*@}*/
/*******************************************************************************
@ -768,7 +775,7 @@ typedef union _hw_nv_fopt
#define HW_NV_FOPT_ADDR(x) ((x) + 0xDU)
#define HW_NV_FOPT(x) (*(__I hw_nv_fopt_t *) HW_NV_FOPT_ADDR(x))
#define HW_NV_FOPT_RD(x) (HW_NV_FOPT(x).U)
#define HW_NV_FOPT_RD(x) (ADDRESS_READ(hw_nv_fopt_t, HW_NV_FOPT_ADDR(x)))
/*@}*/
/*
@ -788,7 +795,7 @@ typedef union _hw_nv_fopt
#define BS_NV_FOPT_LPBOOT (1U) /*!< Bit field size in bits for NV_FOPT_LPBOOT. */
/*! @brief Read current value of the NV_FOPT_LPBOOT field. */
#define BR_NV_FOPT_LPBOOT(x) (BITBAND_ACCESS8(HW_NV_FOPT_ADDR(x), BP_NV_FOPT_LPBOOT))
#define BR_NV_FOPT_LPBOOT(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_NV_FOPT_ADDR(x), BP_NV_FOPT_LPBOOT)))
/*@}*/
/*!
@ -800,7 +807,7 @@ typedef union _hw_nv_fopt
#define BS_NV_FOPT_EZPORT_DIS (1U) /*!< Bit field size in bits for NV_FOPT_EZPORT_DIS. */
/*! @brief Read current value of the NV_FOPT_EZPORT_DIS field. */
#define BR_NV_FOPT_EZPORT_DIS(x) (BITBAND_ACCESS8(HW_NV_FOPT_ADDR(x), BP_NV_FOPT_EZPORT_DIS))
#define BR_NV_FOPT_EZPORT_DIS(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_NV_FOPT_ADDR(x), BP_NV_FOPT_EZPORT_DIS)))
/*@}*/
/*******************************************************************************
@ -828,7 +835,7 @@ typedef union _hw_nv_feprot
#define HW_NV_FEPROT_ADDR(x) ((x) + 0xEU)
#define HW_NV_FEPROT(x) (*(__I hw_nv_feprot_t *) HW_NV_FEPROT_ADDR(x))
#define HW_NV_FEPROT_RD(x) (HW_NV_FEPROT(x).U)
#define HW_NV_FEPROT_RD(x) (ADDRESS_READ(hw_nv_feprot_t, HW_NV_FEPROT_ADDR(x)))
/*@}*/
/*
@ -872,7 +879,7 @@ typedef union _hw_nv_fdprot
#define HW_NV_FDPROT_ADDR(x) ((x) + 0xFU)
#define HW_NV_FDPROT(x) (*(__I hw_nv_fdprot_t *) HW_NV_FDPROT_ADDR(x))
#define HW_NV_FDPROT_RD(x) (HW_NV_FDPROT(x).U)
#define HW_NV_FDPROT_RD(x) (ADDRESS_READ(hw_nv_fdprot_t, HW_NV_FDPROT_ADDR(x)))
/*@}*/
/*

35
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_osc.h
View File

@ -15,6 +15,9 @@
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** (C) COPYRIGHT 2015-2015 ARM Limited
** ALL RIGHTS RESERVED
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
@ -68,6 +71,10 @@
** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
** Update of SystemInit() and SystemCoreClockUpdate() functions.
** Module access macro module_BASES replaced by module_BASE_PTRS.
** - rev. 2.6 (2015-08-03) (ARM)
** All accesses to memory are replaced by equivalent macros; this allows
** memory read/write operations to be re-defined if needed (for example,
** to implement new security features
**
** ###################################################################
*/
@ -132,8 +139,8 @@ typedef union _hw_osc_cr
#define HW_OSC_CR_ADDR(x) ((x) + 0x0U)
#define HW_OSC_CR(x) (*(__IO hw_osc_cr_t *) HW_OSC_CR_ADDR(x))
#define HW_OSC_CR_RD(x) (HW_OSC_CR(x).U)
#define HW_OSC_CR_WR(x, v) (HW_OSC_CR(x).U = (v))
#define HW_OSC_CR_RD(x) (ADDRESS_READ(hw_osc_cr_t, HW_OSC_CR_ADDR(x)))
#define HW_OSC_CR_WR(x, v) (ADDRESS_WRITE(hw_osc_cr_t, HW_OSC_CR_ADDR(x), v))
#define HW_OSC_CR_SET(x, v) (HW_OSC_CR_WR(x, HW_OSC_CR_RD(x) | (v)))
#define HW_OSC_CR_CLR(x, v) (HW_OSC_CR_WR(x, HW_OSC_CR_RD(x) & ~(v)))
#define HW_OSC_CR_TOG(x, v) (HW_OSC_CR_WR(x, HW_OSC_CR_RD(x) ^ (v)))
@ -158,13 +165,13 @@ typedef union _hw_osc_cr
#define BS_OSC_CR_SC16P (1U) /*!< Bit field size in bits for OSC_CR_SC16P. */
/*! @brief Read current value of the OSC_CR_SC16P field. */
#define BR_OSC_CR_SC16P(x) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC16P))
#define BR_OSC_CR_SC16P(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC16P)))
/*! @brief Format value for bitfield OSC_CR_SC16P. */
#define BF_OSC_CR_SC16P(v) ((uint8_t)((uint8_t)(v) << BP_OSC_CR_SC16P) & BM_OSC_CR_SC16P)
/*! @brief Set the SC16P field to a new value. */
#define BW_OSC_CR_SC16P(x, v) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC16P) = (v))
#define BW_OSC_CR_SC16P(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC16P), v))
/*@}*/
/*!
@ -182,13 +189,13 @@ typedef union _hw_osc_cr
#define BS_OSC_CR_SC8P (1U) /*!< Bit field size in bits for OSC_CR_SC8P. */
/*! @brief Read current value of the OSC_CR_SC8P field. */
#define BR_OSC_CR_SC8P(x) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC8P))
#define BR_OSC_CR_SC8P(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC8P)))
/*! @brief Format value for bitfield OSC_CR_SC8P. */
#define BF_OSC_CR_SC8P(v) ((uint8_t)((uint8_t)(v) << BP_OSC_CR_SC8P) & BM_OSC_CR_SC8P)
/*! @brief Set the SC8P field to a new value. */
#define BW_OSC_CR_SC8P(x, v) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC8P) = (v))
#define BW_OSC_CR_SC8P(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC8P), v))
/*@}*/
/*!
@ -206,13 +213,13 @@ typedef union _hw_osc_cr
#define BS_OSC_CR_SC4P (1U) /*!< Bit field size in bits for OSC_CR_SC4P. */
/*! @brief Read current value of the OSC_CR_SC4P field. */
#define BR_OSC_CR_SC4P(x) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC4P))
#define BR_OSC_CR_SC4P(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC4P)))
/*! @brief Format value for bitfield OSC_CR_SC4P. */
#define BF_OSC_CR_SC4P(v) ((uint8_t)((uint8_t)(v) << BP_OSC_CR_SC4P) & BM_OSC_CR_SC4P)
/*! @brief Set the SC4P field to a new value. */
#define BW_OSC_CR_SC4P(x, v) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC4P) = (v))
#define BW_OSC_CR_SC4P(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC4P), v))
/*@}*/
/*!
@ -230,13 +237,13 @@ typedef union _hw_osc_cr
#define BS_OSC_CR_SC2P (1U) /*!< Bit field size in bits for OSC_CR_SC2P. */
/*! @brief Read current value of the OSC_CR_SC2P field. */
#define BR_OSC_CR_SC2P(x) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC2P))
#define BR_OSC_CR_SC2P(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC2P)))
/*! @brief Format value for bitfield OSC_CR_SC2P. */
#define BF_OSC_CR_SC2P(v) ((uint8_t)((uint8_t)(v) << BP_OSC_CR_SC2P) & BM_OSC_CR_SC2P)
/*! @brief Set the SC2P field to a new value. */
#define BW_OSC_CR_SC2P(x, v) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC2P) = (v))
#define BW_OSC_CR_SC2P(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_SC2P), v))
/*@}*/
/*!
@ -256,13 +263,13 @@ typedef union _hw_osc_cr
#define BS_OSC_CR_EREFSTEN (1U) /*!< Bit field size in bits for OSC_CR_EREFSTEN. */
/*! @brief Read current value of the OSC_CR_EREFSTEN field. */
#define BR_OSC_CR_EREFSTEN(x) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_EREFSTEN))
#define BR_OSC_CR_EREFSTEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_EREFSTEN)))
/*! @brief Format value for bitfield OSC_CR_EREFSTEN. */
#define BF_OSC_CR_EREFSTEN(v) ((uint8_t)((uint8_t)(v) << BP_OSC_CR_EREFSTEN) & BM_OSC_CR_EREFSTEN)
/*! @brief Set the EREFSTEN field to a new value. */
#define BW_OSC_CR_EREFSTEN(x, v) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_EREFSTEN) = (v))
#define BW_OSC_CR_EREFSTEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_EREFSTEN), v))
/*@}*/
/*!
@ -280,13 +287,13 @@ typedef union _hw_osc_cr
#define BS_OSC_CR_ERCLKEN (1U) /*!< Bit field size in bits for OSC_CR_ERCLKEN. */
/*! @brief Read current value of the OSC_CR_ERCLKEN field. */
#define BR_OSC_CR_ERCLKEN(x) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_ERCLKEN))
#define BR_OSC_CR_ERCLKEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_ERCLKEN)))
/*! @brief Format value for bitfield OSC_CR_ERCLKEN. */
#define BF_OSC_CR_ERCLKEN(v) ((uint8_t)((uint8_t)(v) << BP_OSC_CR_ERCLKEN) & BM_OSC_CR_ERCLKEN)
/*! @brief Set the ERCLKEN field to a new value. */
#define BW_OSC_CR_ERCLKEN(x, v) (BITBAND_ACCESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_ERCLKEN) = (v))
#define BW_OSC_CR_ERCLKEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_OSC_CR_ADDR(x), BP_OSC_CR_ERCLKEN), v))
/*@}*/
/*******************************************************************************

127
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_pdb.h
View File

@ -15,6 +15,9 @@
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** (C) COPYRIGHT 2015-2015 ARM Limited
** ALL RIGHTS RESERVED
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
@ -68,6 +71,10 @@
** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
** Update of SystemInit() and SystemCoreClockUpdate() functions.
** Module access macro module_BASES replaced by module_BASE_PTRS.
** - rev. 2.6 (2015-08-03) (ARM)
** All accesses to memory are replaced by equivalent macros; this allows
** memory read/write operations to be re-defined if needed (for example,
** to implement new security features
**
** ###################################################################
*/
@ -146,8 +153,8 @@ typedef union _hw_pdb_sc
#define HW_PDB_SC_ADDR(x) ((x) + 0x0U)
#define HW_PDB_SC(x) (*(__IO hw_pdb_sc_t *) HW_PDB_SC_ADDR(x))
#define HW_PDB_SC_RD(x) (HW_PDB_SC(x).U)
#define HW_PDB_SC_WR(x, v) (HW_PDB_SC(x).U = (v))
#define HW_PDB_SC_RD(x) (ADDRESS_READ(hw_pdb_sc_t, HW_PDB_SC_ADDR(x)))
#define HW_PDB_SC_WR(x, v) (ADDRESS_WRITE(hw_pdb_sc_t, HW_PDB_SC_ADDR(x), v))
#define HW_PDB_SC_SET(x, v) (HW_PDB_SC_WR(x, HW_PDB_SC_RD(x) | (v)))
#define HW_PDB_SC_CLR(x, v) (HW_PDB_SC_WR(x, HW_PDB_SC_RD(x) & ~(v)))
#define HW_PDB_SC_TOG(x, v) (HW_PDB_SC_WR(x, HW_PDB_SC_RD(x) ^ (v)))
@ -176,13 +183,13 @@ typedef union _hw_pdb_sc
#define BS_PDB_SC_LDOK (1U) /*!< Bit field size in bits for PDB_SC_LDOK. */
/*! @brief Read current value of the PDB_SC_LDOK field. */
#define BR_PDB_SC_LDOK(x) (BITBAND_ACCESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_LDOK))
#define BR_PDB_SC_LDOK(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_LDOK)))
/*! @brief Format value for bitfield PDB_SC_LDOK. */
#define BF_PDB_SC_LDOK(v) ((uint32_t)((uint32_t)(v) << BP_PDB_SC_LDOK) & BM_PDB_SC_LDOK)
/*! @brief Set the LDOK field to a new value. */
#define BW_PDB_SC_LDOK(x, v) (BITBAND_ACCESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_LDOK) = (v))
#define BW_PDB_SC_LDOK(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_LDOK), v))
/*@}*/
/*!
@ -200,13 +207,13 @@ typedef union _hw_pdb_sc
#define BS_PDB_SC_CONT (1U) /*!< Bit field size in bits for PDB_SC_CONT. */
/*! @brief Read current value of the PDB_SC_CONT field. */
#define BR_PDB_SC_CONT(x) (BITBAND_ACCESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_CONT))
#define BR_PDB_SC_CONT(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_CONT)))
/*! @brief Format value for bitfield PDB_SC_CONT. */
#define BF_PDB_SC_CONT(v) ((uint32_t)((uint32_t)(v) << BP_PDB_SC_CONT) & BM_PDB_SC_CONT)
/*! @brief Set the CONT field to a new value. */
#define BW_PDB_SC_CONT(x, v) (BITBAND_ACCESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_CONT) = (v))
#define BW_PDB_SC_CONT(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_CONT), v))
/*@}*/
/*!
@ -227,7 +234,7 @@ typedef union _hw_pdb_sc
#define BS_PDB_SC_MULT (2U) /*!< Bit field size in bits for PDB_SC_MULT. */
/*! @brief Read current value of the PDB_SC_MULT field. */
#define BR_PDB_SC_MULT(x) (HW_PDB_SC(x).B.MULT)
#define BR_PDB_SC_MULT(x) (UNION_READ(hw_pdb_sc_t, HW_PDB_SC_ADDR(x), U, B.MULT))
/*! @brief Format value for bitfield PDB_SC_MULT. */
#define BF_PDB_SC_MULT(v) ((uint32_t)((uint32_t)(v) << BP_PDB_SC_MULT) & BM_PDB_SC_MULT)
@ -252,13 +259,13 @@ typedef union _hw_pdb_sc
#define BS_PDB_SC_PDBIE (1U) /*!< Bit field size in bits for PDB_SC_PDBIE. */
/*! @brief Read current value of the PDB_SC_PDBIE field. */
#define BR_PDB_SC_PDBIE(x) (BITBAND_ACCESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_PDBIE))
#define BR_PDB_SC_PDBIE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_PDBIE)))
/*! @brief Format value for bitfield PDB_SC_PDBIE. */
#define BF_PDB_SC_PDBIE(v) ((uint32_t)((uint32_t)(v) << BP_PDB_SC_PDBIE) & BM_PDB_SC_PDBIE)
/*! @brief Set the PDBIE field to a new value. */
#define BW_PDB_SC_PDBIE(x, v) (BITBAND_ACCESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_PDBIE) = (v))
#define BW_PDB_SC_PDBIE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_PDBIE), v))
/*@}*/
/*!
@ -273,13 +280,13 @@ typedef union _hw_pdb_sc
#define BS_PDB_SC_PDBIF (1U) /*!< Bit field size in bits for PDB_SC_PDBIF. */
/*! @brief Read current value of the PDB_SC_PDBIF field. */
#define BR_PDB_SC_PDBIF(x) (BITBAND_ACCESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_PDBIF))
#define BR_PDB_SC_PDBIF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_PDBIF)))
/*! @brief Format value for bitfield PDB_SC_PDBIF. */
#define BF_PDB_SC_PDBIF(v) ((uint32_t)((uint32_t)(v) << BP_PDB_SC_PDBIF) & BM_PDB_SC_PDBIF)
/*! @brief Set the PDBIF field to a new value. */
#define BW_PDB_SC_PDBIF(x, v) (BITBAND_ACCESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_PDBIF) = (v))
#define BW_PDB_SC_PDBIF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_PDBIF), v))
/*@}*/
/*!
@ -295,13 +302,13 @@ typedef union _hw_pdb_sc
#define BS_PDB_SC_PDBEN (1U) /*!< Bit field size in bits for PDB_SC_PDBEN. */
/*! @brief Read current value of the PDB_SC_PDBEN field. */
#define BR_PDB_SC_PDBEN(x) (BITBAND_ACCESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_PDBEN))
#define BR_PDB_SC_PDBEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_PDBEN)))
/*! @brief Format value for bitfield PDB_SC_PDBEN. */
#define BF_PDB_SC_PDBEN(v) ((uint32_t)((uint32_t)(v) << BP_PDB_SC_PDBEN) & BM_PDB_SC_PDBEN)
/*! @brief Set the PDBEN field to a new value. */
#define BW_PDB_SC_PDBEN(x, v) (BITBAND_ACCESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_PDBEN) = (v))
#define BW_PDB_SC_PDBEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_PDBEN), v))
/*@}*/
/*!
@ -335,7 +342,7 @@ typedef union _hw_pdb_sc
#define BS_PDB_SC_TRGSEL (4U) /*!< Bit field size in bits for PDB_SC_TRGSEL. */
/*! @brief Read current value of the PDB_SC_TRGSEL field. */
#define BR_PDB_SC_TRGSEL(x) (HW_PDB_SC(x).B.TRGSEL)
#define BR_PDB_SC_TRGSEL(x) (UNION_READ(hw_pdb_sc_t, HW_PDB_SC_ADDR(x), U, B.TRGSEL))
/*! @brief Format value for bitfield PDB_SC_TRGSEL. */
#define BF_PDB_SC_TRGSEL(v) ((uint32_t)((uint32_t)(v) << BP_PDB_SC_TRGSEL) & BM_PDB_SC_TRGSEL)
@ -371,7 +378,7 @@ typedef union _hw_pdb_sc
#define BS_PDB_SC_PRESCALER (3U) /*!< Bit field size in bits for PDB_SC_PRESCALER. */
/*! @brief Read current value of the PDB_SC_PRESCALER field. */
#define BR_PDB_SC_PRESCALER(x) (HW_PDB_SC(x).B.PRESCALER)
#define BR_PDB_SC_PRESCALER(x) (UNION_READ(hw_pdb_sc_t, HW_PDB_SC_ADDR(x), U, B.PRESCALER))
/*! @brief Format value for bitfield PDB_SC_PRESCALER. */
#define BF_PDB_SC_PRESCALER(v) ((uint32_t)((uint32_t)(v) << BP_PDB_SC_PRESCALER) & BM_PDB_SC_PRESCALER)
@ -396,13 +403,13 @@ typedef union _hw_pdb_sc
#define BS_PDB_SC_DMAEN (1U) /*!< Bit field size in bits for PDB_SC_DMAEN. */
/*! @brief Read current value of the PDB_SC_DMAEN field. */
#define BR_PDB_SC_DMAEN(x) (BITBAND_ACCESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_DMAEN))
#define BR_PDB_SC_DMAEN(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_DMAEN)))
/*! @brief Format value for bitfield PDB_SC_DMAEN. */
#define BF_PDB_SC_DMAEN(v) ((uint32_t)((uint32_t)(v) << BP_PDB_SC_DMAEN) & BM_PDB_SC_DMAEN)
/*! @brief Set the DMAEN field to a new value. */
#define BW_PDB_SC_DMAEN(x, v) (BITBAND_ACCESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_DMAEN) = (v))
#define BW_PDB_SC_DMAEN(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_DMAEN), v))
/*@}*/
/*!
@ -421,7 +428,7 @@ typedef union _hw_pdb_sc
#define BF_PDB_SC_SWTRIG(v) ((uint32_t)((uint32_t)(v) << BP_PDB_SC_SWTRIG) & BM_PDB_SC_SWTRIG)
/*! @brief Set the SWTRIG field to a new value. */
#define BW_PDB_SC_SWTRIG(x, v) (BITBAND_ACCESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_SWTRIG) = (v))
#define BW_PDB_SC_SWTRIG(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_SWTRIG), v))
/*@}*/
/*!
@ -440,13 +447,13 @@ typedef union _hw_pdb_sc
#define BS_PDB_SC_PDBEIE (1U) /*!< Bit field size in bits for PDB_SC_PDBEIE. */
/*! @brief Read current value of the PDB_SC_PDBEIE field. */
#define BR_PDB_SC_PDBEIE(x) (BITBAND_ACCESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_PDBEIE))
#define BR_PDB_SC_PDBEIE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_PDBEIE)))
/*! @brief Format value for bitfield PDB_SC_PDBEIE. */
#define BF_PDB_SC_PDBEIE(v) ((uint32_t)((uint32_t)(v) << BP_PDB_SC_PDBEIE) & BM_PDB_SC_PDBEIE)
/*! @brief Set the PDBEIE field to a new value. */
#define BW_PDB_SC_PDBEIE(x, v) (BITBAND_ACCESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_PDBEIE) = (v))
#define BW_PDB_SC_PDBEIE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PDB_SC_ADDR(x), BP_PDB_SC_PDBEIE), v))
/*@}*/
/*!
@ -473,7 +480,7 @@ typedef union _hw_pdb_sc
#define BS_PDB_SC_LDMOD (2U) /*!< Bit field size in bits for PDB_SC_LDMOD. */
/*! @brief Read current value of the PDB_SC_LDMOD field. */
#define BR_PDB_SC_LDMOD(x) (HW_PDB_SC(x).B.LDMOD)
#define BR_PDB_SC_LDMOD(x) (UNION_READ(hw_pdb_sc_t, HW_PDB_SC_ADDR(x), U, B.LDMOD))
/*! @brief Format value for bitfield PDB_SC_LDMOD. */
#define BF_PDB_SC_LDMOD(v) ((uint32_t)((uint32_t)(v) << BP_PDB_SC_LDMOD) & BM_PDB_SC_LDMOD)
@ -508,8 +515,8 @@ typedef union _hw_pdb_mod
#define HW_PDB_MOD_ADDR(x) ((x) + 0x4U)
#define HW_PDB_MOD(x) (*(__IO hw_pdb_mod_t *) HW_PDB_MOD_ADDR(x))
#define HW_PDB_MOD_RD(x) (HW_PDB_MOD(x).U)
#define HW_PDB_MOD_WR(x, v) (HW_PDB_MOD(x).U = (v))
#define HW_PDB_MOD_RD(x) (ADDRESS_READ(hw_pdb_mod_t, HW_PDB_MOD_ADDR(x)))
#define HW_PDB_MOD_WR(x, v) (ADDRESS_WRITE(hw_pdb_mod_t, HW_PDB_MOD_ADDR(x), v))
#define HW_PDB_MOD_SET(x, v) (HW_PDB_MOD_WR(x, HW_PDB_MOD_RD(x) | (v)))
#define HW_PDB_MOD_CLR(x, v) (HW_PDB_MOD_WR(x, HW_PDB_MOD_RD(x) & ~(v)))
#define HW_PDB_MOD_TOG(x, v) (HW_PDB_MOD_WR(x, HW_PDB_MOD_RD(x) ^ (v)))
@ -533,7 +540,7 @@ typedef union _hw_pdb_mod
#define BS_PDB_MOD_MOD (16U) /*!< Bit field size in bits for PDB_MOD_MOD. */
/*! @brief Read current value of the PDB_MOD_MOD field. */
#define BR_PDB_MOD_MOD(x) (HW_PDB_MOD(x).B.MOD)
#define BR_PDB_MOD_MOD(x) (UNION_READ(hw_pdb_mod_t, HW_PDB_MOD_ADDR(x), U, B.MOD))
/*! @brief Format value for bitfield PDB_MOD_MOD. */
#define BF_PDB_MOD_MOD(v) ((uint32_t)((uint32_t)(v) << BP_PDB_MOD_MOD) & BM_PDB_MOD_MOD)
@ -568,7 +575,7 @@ typedef union _hw_pdb_cnt
#define HW_PDB_CNT_ADDR(x) ((x) + 0x8U)
#define HW_PDB_CNT(x) (*(__I hw_pdb_cnt_t *) HW_PDB_CNT_ADDR(x))
#define HW_PDB_CNT_RD(x) (HW_PDB_CNT(x).U)
#define HW_PDB_CNT_RD(x) (ADDRESS_READ(hw_pdb_cnt_t, HW_PDB_CNT_ADDR(x)))
/*@}*/
/*
@ -586,7 +593,7 @@ typedef union _hw_pdb_cnt
#define BS_PDB_CNT_CNT (16U) /*!< Bit field size in bits for PDB_CNT_CNT. */
/*! @brief Read current value of the PDB_CNT_CNT field. */
#define BR_PDB_CNT_CNT(x) (HW_PDB_CNT(x).B.CNT)
#define BR_PDB_CNT_CNT(x) (UNION_READ(hw_pdb_cnt_t, HW_PDB_CNT_ADDR(x), U, B.CNT))
/*@}*/
/*******************************************************************************
@ -615,8 +622,8 @@ typedef union _hw_pdb_idly
#define HW_PDB_IDLY_ADDR(x) ((x) + 0xCU)
#define HW_PDB_IDLY(x) (*(__IO hw_pdb_idly_t *) HW_PDB_IDLY_ADDR(x))
#define HW_PDB_IDLY_RD(x) (HW_PDB_IDLY(x).U)
#define HW_PDB_IDLY_WR(x, v) (HW_PDB_IDLY(x).U = (v))
#define HW_PDB_IDLY_RD(x) (ADDRESS_READ(hw_pdb_idly_t, HW_PDB_IDLY_ADDR(x)))
#define HW_PDB_IDLY_WR(x, v) (ADDRESS_WRITE(hw_pdb_idly_t, HW_PDB_IDLY_ADDR(x), v))
#define HW_PDB_IDLY_SET(x, v) (HW_PDB_IDLY_WR(x, HW_PDB_IDLY_RD(x) | (v)))
#define HW_PDB_IDLY_CLR(x, v) (HW_PDB_IDLY_WR(x, HW_PDB_IDLY_RD(x) & ~(v)))
#define HW_PDB_IDLY_TOG(x, v) (HW_PDB_IDLY_WR(x, HW_PDB_IDLY_RD(x) ^ (v)))
@ -641,7 +648,7 @@ typedef union _hw_pdb_idly
#define BS_PDB_IDLY_IDLY (16U) /*!< Bit field size in bits for PDB_IDLY_IDLY. */
/*! @brief Read current value of the PDB_IDLY_IDLY field. */
#define BR_PDB_IDLY_IDLY(x) (HW_PDB_IDLY(x).B.IDLY)
#define BR_PDB_IDLY_IDLY(x) (UNION_READ(hw_pdb_idly_t, HW_PDB_IDLY_ADDR(x), U, B.IDLY))
/*! @brief Format value for bitfield PDB_IDLY_IDLY. */
#define BF_PDB_IDLY_IDLY(v) ((uint32_t)((uint32_t)(v) << BP_PDB_IDLY_IDLY) & BM_PDB_IDLY_IDLY)
@ -684,8 +691,8 @@ typedef union _hw_pdb_chnc1
#define HW_PDB_CHnC1_ADDR(x, n) ((x) + 0x10U + (0x28U * (n)))
#define HW_PDB_CHnC1(x, n) (*(__IO hw_pdb_chnc1_t *) HW_PDB_CHnC1_ADDR(x, n))
#define HW_PDB_CHnC1_RD(x, n) (HW_PDB_CHnC1(x, n).U)
#define HW_PDB_CHnC1_WR(x, n, v) (HW_PDB_CHnC1(x, n).U = (v))
#define HW_PDB_CHnC1_RD(x, n) (ADDRESS_READ(hw_pdb_chnc1_t, HW_PDB_CHnC1_ADDR(x, n)))
#define HW_PDB_CHnC1_WR(x, n, v) (ADDRESS_WRITE(hw_pdb_chnc1_t, HW_PDB_CHnC1_ADDR(x, n), v))
#define HW_PDB_CHnC1_SET(x, n, v) (HW_PDB_CHnC1_WR(x, n, HW_PDB_CHnC1_RD(x, n) | (v)))
#define HW_PDB_CHnC1_CLR(x, n, v) (HW_PDB_CHnC1_WR(x, n, HW_PDB_CHnC1_RD(x, n) & ~(v)))
#define HW_PDB_CHnC1_TOG(x, n, v) (HW_PDB_CHnC1_WR(x, n, HW_PDB_CHnC1_RD(x, n) ^ (v)))
@ -711,7 +718,7 @@ typedef union _hw_pdb_chnc1
#define BS_PDB_CHnC1_EN (8U) /*!< Bit field size in bits for PDB_CHnC1_EN. */
/*! @brief Read current value of the PDB_CHnC1_EN field. */
#define BR_PDB_CHnC1_EN(x, n) (HW_PDB_CHnC1(x, n).B.EN)
#define BR_PDB_CHnC1_EN(x, n) (UNION_READ(hw_pdb_chnc1_t, HW_PDB_CHnC1_ADDR(x, n), U, B.EN))
/*! @brief Format value for bitfield PDB_CHnC1_EN. */
#define BF_PDB_CHnC1_EN(v) ((uint32_t)((uint32_t)(v) << BP_PDB_CHnC1_EN) & BM_PDB_CHnC1_EN)
@ -742,7 +749,7 @@ typedef union _hw_pdb_chnc1
#define BS_PDB_CHnC1_TOS (8U) /*!< Bit field size in bits for PDB_CHnC1_TOS. */
/*! @brief Read current value of the PDB_CHnC1_TOS field. */
#define BR_PDB_CHnC1_TOS(x, n) (HW_PDB_CHnC1(x, n).B.TOS)
#define BR_PDB_CHnC1_TOS(x, n) (UNION_READ(hw_pdb_chnc1_t, HW_PDB_CHnC1_ADDR(x, n), U, B.TOS))
/*! @brief Format value for bitfield PDB_CHnC1_TOS. */
#define BF_PDB_CHnC1_TOS(v) ((uint32_t)((uint32_t)(v) << BP_PDB_CHnC1_TOS) & BM_PDB_CHnC1_TOS)
@ -772,7 +779,7 @@ typedef union _hw_pdb_chnc1
#define BS_PDB_CHnC1_BB (8U) /*!< Bit field size in bits for PDB_CHnC1_BB. */
/*! @brief Read current value of the PDB_CHnC1_BB field. */
#define BR_PDB_CHnC1_BB(x, n) (HW_PDB_CHnC1(x, n).B.BB)
#define BR_PDB_CHnC1_BB(x, n) (UNION_READ(hw_pdb_chnc1_t, HW_PDB_CHnC1_ADDR(x, n), U, B.BB))
/*! @brief Format value for bitfield PDB_CHnC1_BB. */
#define BF_PDB_CHnC1_BB(v) ((uint32_t)((uint32_t)(v) << BP_PDB_CHnC1_BB) & BM_PDB_CHnC1_BB)
@ -810,8 +817,8 @@ typedef union _hw_pdb_chns
#define HW_PDB_CHnS_ADDR(x, n) ((x) + 0x14U + (0x28U * (n)))
#define HW_PDB_CHnS(x, n) (*(__IO hw_pdb_chns_t *) HW_PDB_CHnS_ADDR(x, n))
#define HW_PDB_CHnS_RD(x, n) (HW_PDB_CHnS(x, n).U)
#define HW_PDB_CHnS_WR(x, n, v) (HW_PDB_CHnS(x, n).U = (v))
#define HW_PDB_CHnS_RD(x, n) (ADDRESS_READ(hw_pdb_chns_t, HW_PDB_CHnS_ADDR(x, n)))
#define HW_PDB_CHnS_WR(x, n, v) (ADDRESS_WRITE(hw_pdb_chns_t, HW_PDB_CHnS_ADDR(x, n), v))
#define HW_PDB_CHnS_SET(x, n, v) (HW_PDB_CHnS_WR(x, n, HW_PDB_CHnS_RD(x, n) | (v)))
#define HW_PDB_CHnS_CLR(x, n, v) (HW_PDB_CHnS_WR(x, n, HW_PDB_CHnS_RD(x, n) & ~(v)))
#define HW_PDB_CHnS_TOG(x, n, v) (HW_PDB_CHnS_WR(x, n, HW_PDB_CHnS_RD(x, n) ^ (v)))
@ -841,7 +848,7 @@ typedef union _hw_pdb_chns
#define BS_PDB_CHnS_ERR (8U) /*!< Bit field size in bits for PDB_CHnS_ERR. */
/*! @brief Read current value of the PDB_CHnS_ERR field. */
#define BR_PDB_CHnS_ERR(x, n) (HW_PDB_CHnS(x, n).B.ERR)
#define BR_PDB_CHnS_ERR(x, n) (UNION_READ(hw_pdb_chns_t, HW_PDB_CHnS_ADDR(x, n), U, B.ERR))
/*! @brief Format value for bitfield PDB_CHnS_ERR. */
#define BF_PDB_CHnS_ERR(v) ((uint32_t)((uint32_t)(v) << BP_PDB_CHnS_ERR) & BM_PDB_CHnS_ERR)
@ -862,7 +869,7 @@ typedef union _hw_pdb_chns
#define BS_PDB_CHnS_CF (8U) /*!< Bit field size in bits for PDB_CHnS_CF. */
/*! @brief Read current value of the PDB_CHnS_CF field. */
#define BR_PDB_CHnS_CF(x, n) (HW_PDB_CHnS(x, n).B.CF)
#define BR_PDB_CHnS_CF(x, n) (UNION_READ(hw_pdb_chns_t, HW_PDB_CHnS_ADDR(x, n), U, B.CF))
/*! @brief Format value for bitfield PDB_CHnS_CF. */
#define BF_PDB_CHnS_CF(v) ((uint32_t)((uint32_t)(v) << BP_PDB_CHnS_CF) & BM_PDB_CHnS_CF)
@ -898,8 +905,8 @@ typedef union _hw_pdb_chndly0
#define HW_PDB_CHnDLY0_ADDR(x, n) ((x) + 0x18U + (0x28U * (n)))
#define HW_PDB_CHnDLY0(x, n) (*(__IO hw_pdb_chndly0_t *) HW_PDB_CHnDLY0_ADDR(x, n))
#define HW_PDB_CHnDLY0_RD(x, n) (HW_PDB_CHnDLY0(x, n).U)
#define HW_PDB_CHnDLY0_WR(x, n, v) (HW_PDB_CHnDLY0(x, n).U = (v))
#define HW_PDB_CHnDLY0_RD(x, n) (ADDRESS_READ(hw_pdb_chndly0_t, HW_PDB_CHnDLY0_ADDR(x, n)))
#define HW_PDB_CHnDLY0_WR(x, n, v) (ADDRESS_WRITE(hw_pdb_chndly0_t, HW_PDB_CHnDLY0_ADDR(x, n), v))
#define HW_PDB_CHnDLY0_SET(x, n, v) (HW_PDB_CHnDLY0_WR(x, n, HW_PDB_CHnDLY0_RD(x, n) | (v)))
#define HW_PDB_CHnDLY0_CLR(x, n, v) (HW_PDB_CHnDLY0_WR(x, n, HW_PDB_CHnDLY0_RD(x, n) & ~(v)))
#define HW_PDB_CHnDLY0_TOG(x, n, v) (HW_PDB_CHnDLY0_WR(x, n, HW_PDB_CHnDLY0_RD(x, n) ^ (v)))
@ -922,7 +929,7 @@ typedef union _hw_pdb_chndly0
#define BS_PDB_CHnDLY0_DLY (16U) /*!< Bit field size in bits for PDB_CHnDLY0_DLY. */
/*! @brief Read current value of the PDB_CHnDLY0_DLY field. */
#define BR_PDB_CHnDLY0_DLY(x, n) (HW_PDB_CHnDLY0(x, n).B.DLY)
#define BR_PDB_CHnDLY0_DLY(x, n) (UNION_READ(hw_pdb_chndly0_t, HW_PDB_CHnDLY0_ADDR(x, n), U, B.DLY))
/*! @brief Format value for bitfield PDB_CHnDLY0_DLY. */
#define BF_PDB_CHnDLY0_DLY(v) ((uint32_t)((uint32_t)(v) << BP_PDB_CHnDLY0_DLY) & BM_PDB_CHnDLY0_DLY)
@ -958,8 +965,8 @@ typedef union _hw_pdb_chndly1
#define HW_PDB_CHnDLY1_ADDR(x, n) ((x) + 0x1CU + (0x28U * (n)))
#define HW_PDB_CHnDLY1(x, n) (*(__IO hw_pdb_chndly1_t *) HW_PDB_CHnDLY1_ADDR(x, n))
#define HW_PDB_CHnDLY1_RD(x, n) (HW_PDB_CHnDLY1(x, n).U)
#define HW_PDB_CHnDLY1_WR(x, n, v) (HW_PDB_CHnDLY1(x, n).U = (v))
#define HW_PDB_CHnDLY1_RD(x, n) (ADDRESS_READ(hw_pdb_chndly1_t, HW_PDB_CHnDLY1_ADDR(x, n)))
#define HW_PDB_CHnDLY1_WR(x, n, v) (ADDRESS_WRITE(hw_pdb_chndly1_t, HW_PDB_CHnDLY1_ADDR(x, n), v))
#define HW_PDB_CHnDLY1_SET(x, n, v) (HW_PDB_CHnDLY1_WR(x, n, HW_PDB_CHnDLY1_RD(x, n) | (v)))
#define HW_PDB_CHnDLY1_CLR(x, n, v) (HW_PDB_CHnDLY1_WR(x, n, HW_PDB_CHnDLY1_RD(x, n) & ~(v)))
#define HW_PDB_CHnDLY1_TOG(x, n, v) (HW_PDB_CHnDLY1_WR(x, n, HW_PDB_CHnDLY1_RD(x, n) ^ (v)))
@ -983,7 +990,7 @@ typedef union _hw_pdb_chndly1
#define BS_PDB_CHnDLY1_DLY (16U) /*!< Bit field size in bits for PDB_CHnDLY1_DLY. */
/*! @brief Read current value of the PDB_CHnDLY1_DLY field. */
#define BR_PDB_CHnDLY1_DLY(x, n) (HW_PDB_CHnDLY1(x, n).B.DLY)
#define BR_PDB_CHnDLY1_DLY(x, n) (UNION_READ(hw_pdb_chndly1_t, HW_PDB_CHnDLY1_ADDR(x, n), U, B.DLY))
/*! @brief Format value for bitfield PDB_CHnDLY1_DLY. */
#define BF_PDB_CHnDLY1_DLY(v) ((uint32_t)((uint32_t)(v) << BP_PDB_CHnDLY1_DLY) & BM_PDB_CHnDLY1_DLY)
@ -1021,8 +1028,8 @@ typedef union _hw_pdb_dacintcn
#define HW_PDB_DACINTCn_ADDR(x, n) ((x) + 0x150U + (0x8U * (n)))
#define HW_PDB_DACINTCn(x, n) (*(__IO hw_pdb_dacintcn_t *) HW_PDB_DACINTCn_ADDR(x, n))
#define HW_PDB_DACINTCn_RD(x, n) (HW_PDB_DACINTCn(x, n).U)
#define HW_PDB_DACINTCn_WR(x, n, v) (HW_PDB_DACINTCn(x, n).U = (v))
#define HW_PDB_DACINTCn_RD(x, n) (ADDRESS_READ(hw_pdb_dacintcn_t, HW_PDB_DACINTCn_ADDR(x, n)))
#define HW_PDB_DACINTCn_WR(x, n, v) (ADDRESS_WRITE(hw_pdb_dacintcn_t, HW_PDB_DACINTCn_ADDR(x, n), v))
#define HW_PDB_DACINTCn_SET(x, n, v) (HW_PDB_DACINTCn_WR(x, n, HW_PDB_DACINTCn_RD(x, n) | (v)))
#define HW_PDB_DACINTCn_CLR(x, n, v) (HW_PDB_DACINTCn_WR(x, n, HW_PDB_DACINTCn_RD(x, n) & ~(v)))
#define HW_PDB_DACINTCn_TOG(x, n, v) (HW_PDB_DACINTCn_WR(x, n, HW_PDB_DACINTCn_RD(x, n) ^ (v)))
@ -1047,13 +1054,13 @@ typedef union _hw_pdb_dacintcn
#define BS_PDB_DACINTCn_TOE (1U) /*!< Bit field size in bits for PDB_DACINTCn_TOE. */
/*! @brief Read current value of the PDB_DACINTCn_TOE field. */
#define BR_PDB_DACINTCn_TOE(x, n) (BITBAND_ACCESS32(HW_PDB_DACINTCn_ADDR(x, n), BP_PDB_DACINTCn_TOE))
#define BR_PDB_DACINTCn_TOE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PDB_DACINTCn_ADDR(x, n), BP_PDB_DACINTCn_TOE)))
/*! @brief Format value for bitfield PDB_DACINTCn_TOE. */
#define BF_PDB_DACINTCn_TOE(v) ((uint32_t)((uint32_t)(v) << BP_PDB_DACINTCn_TOE) & BM_PDB_DACINTCn_TOE)
/*! @brief Set the TOE field to a new value. */
#define BW_PDB_DACINTCn_TOE(x, n, v) (BITBAND_ACCESS32(HW_PDB_DACINTCn_ADDR(x, n), BP_PDB_DACINTCn_TOE) = (v))
#define BW_PDB_DACINTCn_TOE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PDB_DACINTCn_ADDR(x, n), BP_PDB_DACINTCn_TOE), v))
/*@}*/
/*!
@ -1074,13 +1081,13 @@ typedef union _hw_pdb_dacintcn
#define BS_PDB_DACINTCn_EXT (1U) /*!< Bit field size in bits for PDB_DACINTCn_EXT. */
/*! @brief Read current value of the PDB_DACINTCn_EXT field. */
#define BR_PDB_DACINTCn_EXT(x, n) (BITBAND_ACCESS32(HW_PDB_DACINTCn_ADDR(x, n), BP_PDB_DACINTCn_EXT))
#define BR_PDB_DACINTCn_EXT(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PDB_DACINTCn_ADDR(x, n), BP_PDB_DACINTCn_EXT)))
/*! @brief Format value for bitfield PDB_DACINTCn_EXT. */
#define BF_PDB_DACINTCn_EXT(v) ((uint32_t)((uint32_t)(v) << BP_PDB_DACINTCn_EXT) & BM_PDB_DACINTCn_EXT)
/*! @brief Set the EXT field to a new value. */
#define BW_PDB_DACINTCn_EXT(x, n, v) (BITBAND_ACCESS32(HW_PDB_DACINTCn_ADDR(x, n), BP_PDB_DACINTCn_EXT) = (v))
#define BW_PDB_DACINTCn_EXT(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PDB_DACINTCn_ADDR(x, n), BP_PDB_DACINTCn_EXT), v))
/*@}*/
/*******************************************************************************
* HW_PDB_DACINTn - DAC Interval n register
@ -1110,8 +1117,8 @@ typedef union _hw_pdb_dacintn
#define HW_PDB_DACINTn_ADDR(x, n) ((x) + 0x154U + (0x8U * (n)))
#define HW_PDB_DACINTn(x, n) (*(__IO hw_pdb_dacintn_t *) HW_PDB_DACINTn_ADDR(x, n))
#define HW_PDB_DACINTn_RD(x, n) (HW_PDB_DACINTn(x, n).U)
#define HW_PDB_DACINTn_WR(x, n, v) (HW_PDB_DACINTn(x, n).U = (v))
#define HW_PDB_DACINTn_RD(x, n) (ADDRESS_READ(hw_pdb_dacintn_t, HW_PDB_DACINTn_ADDR(x, n)))
#define HW_PDB_DACINTn_WR(x, n, v) (ADDRESS_WRITE(hw_pdb_dacintn_t, HW_PDB_DACINTn_ADDR(x, n), v))
#define HW_PDB_DACINTn_SET(x, n, v) (HW_PDB_DACINTn_WR(x, n, HW_PDB_DACINTn_RD(x, n) | (v)))
#define HW_PDB_DACINTn_CLR(x, n, v) (HW_PDB_DACINTn_WR(x, n, HW_PDB_DACINTn_RD(x, n) & ~(v)))
#define HW_PDB_DACINTn_TOG(x, n, v) (HW_PDB_DACINTn_WR(x, n, HW_PDB_DACINTn_RD(x, n) ^ (v)))
@ -1135,7 +1142,7 @@ typedef union _hw_pdb_dacintn
#define BS_PDB_DACINTn_INT (16U) /*!< Bit field size in bits for PDB_DACINTn_INT. */
/*! @brief Read current value of the PDB_DACINTn_INT field. */
#define BR_PDB_DACINTn_INT(x, n) (HW_PDB_DACINTn(x, n).B.INT)
#define BR_PDB_DACINTn_INT(x, n) (UNION_READ(hw_pdb_dacintn_t, HW_PDB_DACINTn_ADDR(x, n), U, B.INT))
/*! @brief Format value for bitfield PDB_DACINTn_INT. */
#define BF_PDB_DACINTn_INT(v) ((uint32_t)((uint32_t)(v) << BP_PDB_DACINTn_INT) & BM_PDB_DACINTn_INT)
@ -1170,8 +1177,8 @@ typedef union _hw_pdb_poen
#define HW_PDB_POEN_ADDR(x) ((x) + 0x190U)
#define HW_PDB_POEN(x) (*(__IO hw_pdb_poen_t *) HW_PDB_POEN_ADDR(x))
#define HW_PDB_POEN_RD(x) (HW_PDB_POEN(x).U)
#define HW_PDB_POEN_WR(x, v) (HW_PDB_POEN(x).U = (v))
#define HW_PDB_POEN_RD(x) (ADDRESS_READ(hw_pdb_poen_t, HW_PDB_POEN_ADDR(x)))
#define HW_PDB_POEN_WR(x, v) (ADDRESS_WRITE(hw_pdb_poen_t, HW_PDB_POEN_ADDR(x), v))
#define HW_PDB_POEN_SET(x, v) (HW_PDB_POEN_WR(x, HW_PDB_POEN_RD(x) | (v)))
#define HW_PDB_POEN_CLR(x, v) (HW_PDB_POEN_WR(x, HW_PDB_POEN_RD(x) & ~(v)))
#define HW_PDB_POEN_TOG(x, v) (HW_PDB_POEN_WR(x, HW_PDB_POEN_RD(x) ^ (v)))
@ -1196,7 +1203,7 @@ typedef union _hw_pdb_poen
#define BS_PDB_POEN_POEN (8U) /*!< Bit field size in bits for PDB_POEN_POEN. */
/*! @brief Read current value of the PDB_POEN_POEN field. */
#define BR_PDB_POEN_POEN(x) (HW_PDB_POEN(x).B.POEN)
#define BR_PDB_POEN_POEN(x) (UNION_READ(hw_pdb_poen_t, HW_PDB_POEN_ADDR(x), U, B.POEN))
/*! @brief Format value for bitfield PDB_POEN_POEN. */
#define BF_PDB_POEN_POEN(v) ((uint32_t)((uint32_t)(v) << BP_PDB_POEN_POEN) & BM_PDB_POEN_POEN)
@ -1233,8 +1240,8 @@ typedef union _hw_pdb_pondly
#define HW_PDB_POnDLY_ADDR(x, n) ((x) + 0x194U + (0x4U * (n)))
#define HW_PDB_POnDLY(x, n) (*(__IO hw_pdb_pondly_t *) HW_PDB_POnDLY_ADDR(x, n))
#define HW_PDB_POnDLY_RD(x, n) (HW_PDB_POnDLY(x, n).U)
#define HW_PDB_POnDLY_WR(x, n, v) (HW_PDB_POnDLY(x, n).U = (v))
#define HW_PDB_POnDLY_RD(x, n) (ADDRESS_READ(hw_pdb_pondly_t, HW_PDB_POnDLY_ADDR(x, n)))
#define HW_PDB_POnDLY_WR(x, n, v) (ADDRESS_WRITE(hw_pdb_pondly_t, HW_PDB_POnDLY_ADDR(x, n), v))
#define HW_PDB_POnDLY_SET(x, n, v) (HW_PDB_POnDLY_WR(x, n, HW_PDB_POnDLY_RD(x, n) | (v)))
#define HW_PDB_POnDLY_CLR(x, n, v) (HW_PDB_POnDLY_WR(x, n, HW_PDB_POnDLY_RD(x, n) & ~(v)))
#define HW_PDB_POnDLY_TOG(x, n, v) (HW_PDB_POnDLY_WR(x, n, HW_PDB_POnDLY_RD(x, n) ^ (v)))
@ -1257,7 +1264,7 @@ typedef union _hw_pdb_pondly
#define BS_PDB_POnDLY_DLY2 (16U) /*!< Bit field size in bits for PDB_POnDLY_DLY2. */
/*! @brief Read current value of the PDB_POnDLY_DLY2 field. */
#define BR_PDB_POnDLY_DLY2(x, n) (HW_PDB_POnDLY(x, n).B.DLY2)
#define BR_PDB_POnDLY_DLY2(x, n) (UNION_READ(hw_pdb_pondly_t, HW_PDB_POnDLY_ADDR(x, n), U, B.DLY2))
/*! @brief Format value for bitfield PDB_POnDLY_DLY2. */
#define BF_PDB_POnDLY_DLY2(v) ((uint32_t)((uint32_t)(v) << BP_PDB_POnDLY_DLY2) & BM_PDB_POnDLY_DLY2)
@ -1279,7 +1286,7 @@ typedef union _hw_pdb_pondly
#define BS_PDB_POnDLY_DLY1 (16U) /*!< Bit field size in bits for PDB_POnDLY_DLY1. */
/*! @brief Read current value of the PDB_POnDLY_DLY1 field. */
#define BR_PDB_POnDLY_DLY1(x, n) (HW_PDB_POnDLY(x, n).B.DLY1)
#define BR_PDB_POnDLY_DLY1(x, n) (UNION_READ(hw_pdb_pondly_t, HW_PDB_POnDLY_ADDR(x, n), U, B.DLY1))
/*! @brief Format value for bitfield PDB_POnDLY_DLY1. */
#define BF_PDB_POnDLY_DLY1(v) ((uint32_t)((uint32_t)(v) << BP_PDB_POnDLY_DLY1) & BM_PDB_POnDLY_DLY1)

49
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_pit.h
View File

@ -15,6 +15,9 @@
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** (C) COPYRIGHT 2015-2015 ARM Limited
** ALL RIGHTS RESERVED
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
@ -68,6 +71,10 @@
** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
** Update of SystemInit() and SystemCoreClockUpdate() functions.
** Module access macro module_BASES replaced by module_BASE_PTRS.
** - rev. 2.6 (2015-08-03) (ARM)
** All accesses to memory are replaced by equivalent macros; this allows
** memory read/write operations to be re-defined if needed (for example,
** to implement new security features
**
** ###################################################################
*/
@ -130,8 +137,8 @@ typedef union _hw_pit_mcr
#define HW_PIT_MCR_ADDR(x) ((x) + 0x0U)
#define HW_PIT_MCR(x) (*(__IO hw_pit_mcr_t *) HW_PIT_MCR_ADDR(x))
#define HW_PIT_MCR_RD(x) (HW_PIT_MCR(x).U)
#define HW_PIT_MCR_WR(x, v) (HW_PIT_MCR(x).U = (v))
#define HW_PIT_MCR_RD(x) (ADDRESS_READ(hw_pit_mcr_t, HW_PIT_MCR_ADDR(x)))
#define HW_PIT_MCR_WR(x, v) (ADDRESS_WRITE(hw_pit_mcr_t, HW_PIT_MCR_ADDR(x), v))
#define HW_PIT_MCR_SET(x, v) (HW_PIT_MCR_WR(x, HW_PIT_MCR_RD(x) | (v)))
#define HW_PIT_MCR_CLR(x, v) (HW_PIT_MCR_WR(x, HW_PIT_MCR_RD(x) & ~(v)))
#define HW_PIT_MCR_TOG(x, v) (HW_PIT_MCR_WR(x, HW_PIT_MCR_RD(x) ^ (v)))
@ -156,13 +163,13 @@ typedef union _hw_pit_mcr
#define BS_PIT_MCR_FRZ (1U) /*!< Bit field size in bits for PIT_MCR_FRZ. */
/*! @brief Read current value of the PIT_MCR_FRZ field. */
#define BR_PIT_MCR_FRZ(x) (BITBAND_ACCESS32(HW_PIT_MCR_ADDR(x), BP_PIT_MCR_FRZ))
#define BR_PIT_MCR_FRZ(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PIT_MCR_ADDR(x), BP_PIT_MCR_FRZ)))
/*! @brief Format value for bitfield PIT_MCR_FRZ. */
#define BF_PIT_MCR_FRZ(v) ((uint32_t)((uint32_t)(v) << BP_PIT_MCR_FRZ) & BM_PIT_MCR_FRZ)
/*! @brief Set the FRZ field to a new value. */
#define BW_PIT_MCR_FRZ(x, v) (BITBAND_ACCESS32(HW_PIT_MCR_ADDR(x), BP_PIT_MCR_FRZ) = (v))
#define BW_PIT_MCR_FRZ(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PIT_MCR_ADDR(x), BP_PIT_MCR_FRZ), v))
/*@}*/
/*!
@ -181,13 +188,13 @@ typedef union _hw_pit_mcr
#define BS_PIT_MCR_MDIS (1U) /*!< Bit field size in bits for PIT_MCR_MDIS. */
/*! @brief Read current value of the PIT_MCR_MDIS field. */
#define BR_PIT_MCR_MDIS(x) (BITBAND_ACCESS32(HW_PIT_MCR_ADDR(x), BP_PIT_MCR_MDIS))
#define BR_PIT_MCR_MDIS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PIT_MCR_ADDR(x), BP_PIT_MCR_MDIS)))
/*! @brief Format value for bitfield PIT_MCR_MDIS. */
#define BF_PIT_MCR_MDIS(v) ((uint32_t)((uint32_t)(v) << BP_PIT_MCR_MDIS) & BM_PIT_MCR_MDIS)
/*! @brief Set the MDIS field to a new value. */
#define BW_PIT_MCR_MDIS(x, v) (BITBAND_ACCESS32(HW_PIT_MCR_ADDR(x), BP_PIT_MCR_MDIS) = (v))
#define BW_PIT_MCR_MDIS(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PIT_MCR_ADDR(x), BP_PIT_MCR_MDIS), v))
/*@}*/
/*******************************************************************************
@ -219,8 +226,8 @@ typedef union _hw_pit_ldvaln
#define HW_PIT_LDVALn_ADDR(x, n) ((x) + 0x100U + (0x10U * (n)))
#define HW_PIT_LDVALn(x, n) (*(__IO hw_pit_ldvaln_t *) HW_PIT_LDVALn_ADDR(x, n))
#define HW_PIT_LDVALn_RD(x, n) (HW_PIT_LDVALn(x, n).U)
#define HW_PIT_LDVALn_WR(x, n, v) (HW_PIT_LDVALn(x, n).U = (v))
#define HW_PIT_LDVALn_RD(x, n) (ADDRESS_READ(hw_pit_ldvaln_t, HW_PIT_LDVALn_ADDR(x, n)))
#define HW_PIT_LDVALn_WR(x, n, v) (ADDRESS_WRITE(hw_pit_ldvaln_t, HW_PIT_LDVALn_ADDR(x, n), v))
#define HW_PIT_LDVALn_SET(x, n, v) (HW_PIT_LDVALn_WR(x, n, HW_PIT_LDVALn_RD(x, n) | (v)))
#define HW_PIT_LDVALn_CLR(x, n, v) (HW_PIT_LDVALn_WR(x, n, HW_PIT_LDVALn_RD(x, n) & ~(v)))
#define HW_PIT_LDVALn_TOG(x, n, v) (HW_PIT_LDVALn_WR(x, n, HW_PIT_LDVALn_RD(x, n) ^ (v)))
@ -282,7 +289,7 @@ typedef union _hw_pit_cvaln
#define HW_PIT_CVALn_ADDR(x, n) ((x) + 0x104U + (0x10U * (n)))
#define HW_PIT_CVALn(x, n) (*(__I hw_pit_cvaln_t *) HW_PIT_CVALn_ADDR(x, n))
#define HW_PIT_CVALn_RD(x, n) (HW_PIT_CVALn(x, n).U)
#define HW_PIT_CVALn_RD(x, n) (ADDRESS_READ(hw_pit_cvaln_t, HW_PIT_CVALn_ADDR(x, n)))
/*@}*/
/*
@ -336,8 +343,8 @@ typedef union _hw_pit_tctrln
#define HW_PIT_TCTRLn_ADDR(x, n) ((x) + 0x108U + (0x10U * (n)))
#define HW_PIT_TCTRLn(x, n) (*(__IO hw_pit_tctrln_t *) HW_PIT_TCTRLn_ADDR(x, n))
#define HW_PIT_TCTRLn_RD(x, n) (HW_PIT_TCTRLn(x, n).U)
#define HW_PIT_TCTRLn_WR(x, n, v) (HW_PIT_TCTRLn(x, n).U = (v))
#define HW_PIT_TCTRLn_RD(x, n) (ADDRESS_READ(hw_pit_tctrln_t, HW_PIT_TCTRLn_ADDR(x, n)))
#define HW_PIT_TCTRLn_WR(x, n, v) (ADDRESS_WRITE(hw_pit_tctrln_t, HW_PIT_TCTRLn_ADDR(x, n), v))
#define HW_PIT_TCTRLn_SET(x, n, v) (HW_PIT_TCTRLn_WR(x, n, HW_PIT_TCTRLn_RD(x, n) | (v)))
#define HW_PIT_TCTRLn_CLR(x, n, v) (HW_PIT_TCTRLn_WR(x, n, HW_PIT_TCTRLn_RD(x, n) & ~(v)))
#define HW_PIT_TCTRLn_TOG(x, n, v) (HW_PIT_TCTRLn_WR(x, n, HW_PIT_TCTRLn_RD(x, n) ^ (v)))
@ -362,13 +369,13 @@ typedef union _hw_pit_tctrln
#define BS_PIT_TCTRLn_TEN (1U) /*!< Bit field size in bits for PIT_TCTRLn_TEN. */
/*! @brief Read current value of the PIT_TCTRLn_TEN field. */
#define BR_PIT_TCTRLn_TEN(x, n) (BITBAND_ACCESS32(HW_PIT_TCTRLn_ADDR(x, n), BP_PIT_TCTRLn_TEN))
#define BR_PIT_TCTRLn_TEN(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PIT_TCTRLn_ADDR(x, n), BP_PIT_TCTRLn_TEN)))
/*! @brief Format value for bitfield PIT_TCTRLn_TEN. */
#define BF_PIT_TCTRLn_TEN(v) ((uint32_t)((uint32_t)(v) << BP_PIT_TCTRLn_TEN) & BM_PIT_TCTRLn_TEN)
/*! @brief Set the TEN field to a new value. */
#define BW_PIT_TCTRLn_TEN(x, n, v) (BITBAND_ACCESS32(HW_PIT_TCTRLn_ADDR(x, n), BP_PIT_TCTRLn_TEN) = (v))
#define BW_PIT_TCTRLn_TEN(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PIT_TCTRLn_ADDR(x, n), BP_PIT_TCTRLn_TEN), v))
/*@}*/
/*!
@ -388,13 +395,13 @@ typedef union _hw_pit_tctrln
#define BS_PIT_TCTRLn_TIE (1U) /*!< Bit field size in bits for PIT_TCTRLn_TIE. */
/*! @brief Read current value of the PIT_TCTRLn_TIE field. */
#define BR_PIT_TCTRLn_TIE(x, n) (BITBAND_ACCESS32(HW_PIT_TCTRLn_ADDR(x, n), BP_PIT_TCTRLn_TIE))
#define BR_PIT_TCTRLn_TIE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PIT_TCTRLn_ADDR(x, n), BP_PIT_TCTRLn_TIE)))
/*! @brief Format value for bitfield PIT_TCTRLn_TIE. */
#define BF_PIT_TCTRLn_TIE(v) ((uint32_t)((uint32_t)(v) << BP_PIT_TCTRLn_TIE) & BM_PIT_TCTRLn_TIE)
/*! @brief Set the TIE field to a new value. */
#define BW_PIT_TCTRLn_TIE(x, n, v) (BITBAND_ACCESS32(HW_PIT_TCTRLn_ADDR(x, n), BP_PIT_TCTRLn_TIE) = (v))
#define BW_PIT_TCTRLn_TIE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PIT_TCTRLn_ADDR(x, n), BP_PIT_TCTRLn_TIE), v))
/*@}*/
/*!
@ -414,13 +421,13 @@ typedef union _hw_pit_tctrln
#define BS_PIT_TCTRLn_CHN (1U) /*!< Bit field size in bits for PIT_TCTRLn_CHN. */
/*! @brief Read current value of the PIT_TCTRLn_CHN field. */
#define BR_PIT_TCTRLn_CHN(x, n) (BITBAND_ACCESS32(HW_PIT_TCTRLn_ADDR(x, n), BP_PIT_TCTRLn_CHN))
#define BR_PIT_TCTRLn_CHN(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PIT_TCTRLn_ADDR(x, n), BP_PIT_TCTRLn_CHN)))
/*! @brief Format value for bitfield PIT_TCTRLn_CHN. */
#define BF_PIT_TCTRLn_CHN(v) ((uint32_t)((uint32_t)(v) << BP_PIT_TCTRLn_CHN) & BM_PIT_TCTRLn_CHN)
/*! @brief Set the CHN field to a new value. */
#define BW_PIT_TCTRLn_CHN(x, n, v) (BITBAND_ACCESS32(HW_PIT_TCTRLn_ADDR(x, n), BP_PIT_TCTRLn_CHN) = (v))
#define BW_PIT_TCTRLn_CHN(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PIT_TCTRLn_ADDR(x, n), BP_PIT_TCTRLn_CHN), v))
/*@}*/
/*******************************************************************************
* HW_PIT_TFLGn - Timer Flag Register
@ -452,8 +459,8 @@ typedef union _hw_pit_tflgn
#define HW_PIT_TFLGn_ADDR(x, n) ((x) + 0x10CU + (0x10U * (n)))
#define HW_PIT_TFLGn(x, n) (*(__IO hw_pit_tflgn_t *) HW_PIT_TFLGn_ADDR(x, n))
#define HW_PIT_TFLGn_RD(x, n) (HW_PIT_TFLGn(x, n).U)
#define HW_PIT_TFLGn_WR(x, n, v) (HW_PIT_TFLGn(x, n).U = (v))
#define HW_PIT_TFLGn_RD(x, n) (ADDRESS_READ(hw_pit_tflgn_t, HW_PIT_TFLGn_ADDR(x, n)))
#define HW_PIT_TFLGn_WR(x, n, v) (ADDRESS_WRITE(hw_pit_tflgn_t, HW_PIT_TFLGn_ADDR(x, n), v))
#define HW_PIT_TFLGn_SET(x, n, v) (HW_PIT_TFLGn_WR(x, n, HW_PIT_TFLGn_RD(x, n) | (v)))
#define HW_PIT_TFLGn_CLR(x, n, v) (HW_PIT_TFLGn_WR(x, n, HW_PIT_TFLGn_RD(x, n) & ~(v)))
#define HW_PIT_TFLGn_TOG(x, n, v) (HW_PIT_TFLGn_WR(x, n, HW_PIT_TFLGn_RD(x, n) ^ (v)))
@ -480,13 +487,13 @@ typedef union _hw_pit_tflgn
#define BS_PIT_TFLGn_TIF (1U) /*!< Bit field size in bits for PIT_TFLGn_TIF. */
/*! @brief Read current value of the PIT_TFLGn_TIF field. */
#define BR_PIT_TFLGn_TIF(x, n) (BITBAND_ACCESS32(HW_PIT_TFLGn_ADDR(x, n), BP_PIT_TFLGn_TIF))
#define BR_PIT_TFLGn_TIF(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PIT_TFLGn_ADDR(x, n), BP_PIT_TFLGn_TIF)))
/*! @brief Format value for bitfield PIT_TFLGn_TIF. */
#define BF_PIT_TFLGn_TIF(v) ((uint32_t)((uint32_t)(v) << BP_PIT_TFLGn_TIF) & BM_PIT_TFLGn_TIF)
/*! @brief Set the TIF field to a new value. */
#define BW_PIT_TFLGn_TIF(x, n, v) (BITBAND_ACCESS32(HW_PIT_TFLGn_ADDR(x, n), BP_PIT_TFLGn_TIF) = (v))
#define BW_PIT_TFLGn_TIF(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PIT_TFLGn_ADDR(x, n), BP_PIT_TFLGn_TIF), v))
/*@}*/
/*******************************************************************************

57
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_pmc.h
View File

@ -15,6 +15,9 @@
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** (C) COPYRIGHT 2015-2015 ARM Limited
** ALL RIGHTS RESERVED
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
@ -68,6 +71,10 @@
** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
** Update of SystemInit() and SystemCoreClockUpdate() functions.
** Module access macro module_BASES replaced by module_BASE_PTRS.
** - rev. 2.6 (2015-08-03) (ARM)
** All accesses to memory are replaced by equivalent macros; this allows
** memory read/write operations to be re-defined if needed (for example,
** to implement new security features
**
** ###################################################################
*/
@ -140,8 +147,8 @@ typedef union _hw_pmc_lvdsc1
#define HW_PMC_LVDSC1_ADDR(x) ((x) + 0x0U)
#define HW_PMC_LVDSC1(x) (*(__IO hw_pmc_lvdsc1_t *) HW_PMC_LVDSC1_ADDR(x))
#define HW_PMC_LVDSC1_RD(x) (HW_PMC_LVDSC1(x).U)
#define HW_PMC_LVDSC1_WR(x, v) (HW_PMC_LVDSC1(x).U = (v))
#define HW_PMC_LVDSC1_RD(x) (ADDRESS_READ(hw_pmc_lvdsc1_t, HW_PMC_LVDSC1_ADDR(x)))
#define HW_PMC_LVDSC1_WR(x, v) (ADDRESS_WRITE(hw_pmc_lvdsc1_t, HW_PMC_LVDSC1_ADDR(x), v))
#define HW_PMC_LVDSC1_SET(x, v) (HW_PMC_LVDSC1_WR(x, HW_PMC_LVDSC1_RD(x) | (v)))
#define HW_PMC_LVDSC1_CLR(x, v) (HW_PMC_LVDSC1_WR(x, HW_PMC_LVDSC1_RD(x) & ~(v)))
#define HW_PMC_LVDSC1_TOG(x, v) (HW_PMC_LVDSC1_WR(x, HW_PMC_LVDSC1_RD(x) ^ (v)))
@ -168,7 +175,7 @@ typedef union _hw_pmc_lvdsc1
#define BS_PMC_LVDSC1_LVDV (2U) /*!< Bit field size in bits for PMC_LVDSC1_LVDV. */
/*! @brief Read current value of the PMC_LVDSC1_LVDV field. */
#define BR_PMC_LVDSC1_LVDV(x) (HW_PMC_LVDSC1(x).B.LVDV)
#define BR_PMC_LVDSC1_LVDV(x) (UNION_READ(hw_pmc_lvdsc1_t, HW_PMC_LVDSC1_ADDR(x), U, B.LVDV))
/*! @brief Format value for bitfield PMC_LVDSC1_LVDV. */
#define BF_PMC_LVDSC1_LVDV(v) ((uint8_t)((uint8_t)(v) << BP_PMC_LVDSC1_LVDV) & BM_PMC_LVDSC1_LVDV)
@ -193,13 +200,13 @@ typedef union _hw_pmc_lvdsc1
#define BS_PMC_LVDSC1_LVDRE (1U) /*!< Bit field size in bits for PMC_LVDSC1_LVDRE. */
/*! @brief Read current value of the PMC_LVDSC1_LVDRE field. */
#define BR_PMC_LVDSC1_LVDRE(x) (BITBAND_ACCESS8(HW_PMC_LVDSC1_ADDR(x), BP_PMC_LVDSC1_LVDRE))
#define BR_PMC_LVDSC1_LVDRE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_PMC_LVDSC1_ADDR(x), BP_PMC_LVDSC1_LVDRE)))
/*! @brief Format value for bitfield PMC_LVDSC1_LVDRE. */
#define BF_PMC_LVDSC1_LVDRE(v) ((uint8_t)((uint8_t)(v) << BP_PMC_LVDSC1_LVDRE) & BM_PMC_LVDSC1_LVDRE)
/*! @brief Set the LVDRE field to a new value. */
#define BW_PMC_LVDSC1_LVDRE(x, v) (BITBAND_ACCESS8(HW_PMC_LVDSC1_ADDR(x), BP_PMC_LVDSC1_LVDRE) = (v))
#define BW_PMC_LVDSC1_LVDRE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_PMC_LVDSC1_ADDR(x), BP_PMC_LVDSC1_LVDRE), v))
/*@}*/
/*!
@ -217,13 +224,13 @@ typedef union _hw_pmc_lvdsc1
#define BS_PMC_LVDSC1_LVDIE (1U) /*!< Bit field size in bits for PMC_LVDSC1_LVDIE. */
/*! @brief Read current value of the PMC_LVDSC1_LVDIE field. */
#define BR_PMC_LVDSC1_LVDIE(x) (BITBAND_ACCESS8(HW_PMC_LVDSC1_ADDR(x), BP_PMC_LVDSC1_LVDIE))
#define BR_PMC_LVDSC1_LVDIE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_PMC_LVDSC1_ADDR(x), BP_PMC_LVDSC1_LVDIE)))
/*! @brief Format value for bitfield PMC_LVDSC1_LVDIE. */
#define BF_PMC_LVDSC1_LVDIE(v) ((uint8_t)((uint8_t)(v) << BP_PMC_LVDSC1_LVDIE) & BM_PMC_LVDSC1_LVDIE)
/*! @brief Set the LVDIE field to a new value. */
#define BW_PMC_LVDSC1_LVDIE(x, v) (BITBAND_ACCESS8(HW_PMC_LVDSC1_ADDR(x), BP_PMC_LVDSC1_LVDIE) = (v))
#define BW_PMC_LVDSC1_LVDIE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_PMC_LVDSC1_ADDR(x), BP_PMC_LVDSC1_LVDIE), v))
/*@}*/
/*!
@ -241,7 +248,7 @@ typedef union _hw_pmc_lvdsc1
#define BF_PMC_LVDSC1_LVDACK(v) ((uint8_t)((uint8_t)(v) << BP_PMC_LVDSC1_LVDACK) & BM_PMC_LVDSC1_LVDACK)
/*! @brief Set the LVDACK field to a new value. */
#define BW_PMC_LVDSC1_LVDACK(x, v) (BITBAND_ACCESS8(HW_PMC_LVDSC1_ADDR(x), BP_PMC_LVDSC1_LVDACK) = (v))
#define BW_PMC_LVDSC1_LVDACK(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_PMC_LVDSC1_ADDR(x), BP_PMC_LVDSC1_LVDACK), v))
/*@}*/
/*!
@ -259,7 +266,7 @@ typedef union _hw_pmc_lvdsc1
#define BS_PMC_LVDSC1_LVDF (1U) /*!< Bit field size in bits for PMC_LVDSC1_LVDF. */
/*! @brief Read current value of the PMC_LVDSC1_LVDF field. */
#define BR_PMC_LVDSC1_LVDF(x) (BITBAND_ACCESS8(HW_PMC_LVDSC1_ADDR(x), BP_PMC_LVDSC1_LVDF))
#define BR_PMC_LVDSC1_LVDF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_PMC_LVDSC1_ADDR(x), BP_PMC_LVDSC1_LVDF)))
/*@}*/
/*******************************************************************************
@ -299,8 +306,8 @@ typedef union _hw_pmc_lvdsc2
#define HW_PMC_LVDSC2_ADDR(x) ((x) + 0x1U)
#define HW_PMC_LVDSC2(x) (*(__IO hw_pmc_lvdsc2_t *) HW_PMC_LVDSC2_ADDR(x))
#define HW_PMC_LVDSC2_RD(x) (HW_PMC_LVDSC2(x).U)
#define HW_PMC_LVDSC2_WR(x, v) (HW_PMC_LVDSC2(x).U = (v))
#define HW_PMC_LVDSC2_RD(x) (ADDRESS_READ(hw_pmc_lvdsc2_t, HW_PMC_LVDSC2_ADDR(x)))
#define HW_PMC_LVDSC2_WR(x, v) (ADDRESS_WRITE(hw_pmc_lvdsc2_t, HW_PMC_LVDSC2_ADDR(x), v))
#define HW_PMC_LVDSC2_SET(x, v) (HW_PMC_LVDSC2_WR(x, HW_PMC_LVDSC2_RD(x) | (v)))
#define HW_PMC_LVDSC2_CLR(x, v) (HW_PMC_LVDSC2_WR(x, HW_PMC_LVDSC2_RD(x) & ~(v)))
#define HW_PMC_LVDSC2_TOG(x, v) (HW_PMC_LVDSC2_WR(x, HW_PMC_LVDSC2_RD(x) ^ (v)))
@ -328,7 +335,7 @@ typedef union _hw_pmc_lvdsc2
#define BS_PMC_LVDSC2_LVWV (2U) /*!< Bit field size in bits for PMC_LVDSC2_LVWV. */
/*! @brief Read current value of the PMC_LVDSC2_LVWV field. */
#define BR_PMC_LVDSC2_LVWV(x) (HW_PMC_LVDSC2(x).B.LVWV)
#define BR_PMC_LVDSC2_LVWV(x) (UNION_READ(hw_pmc_lvdsc2_t, HW_PMC_LVDSC2_ADDR(x), U, B.LVWV))
/*! @brief Format value for bitfield PMC_LVDSC2_LVWV. */
#define BF_PMC_LVDSC2_LVWV(v) ((uint8_t)((uint8_t)(v) << BP_PMC_LVDSC2_LVWV) & BM_PMC_LVDSC2_LVWV)
@ -352,13 +359,13 @@ typedef union _hw_pmc_lvdsc2
#define BS_PMC_LVDSC2_LVWIE (1U) /*!< Bit field size in bits for PMC_LVDSC2_LVWIE. */
/*! @brief Read current value of the PMC_LVDSC2_LVWIE field. */
#define BR_PMC_LVDSC2_LVWIE(x) (BITBAND_ACCESS8(HW_PMC_LVDSC2_ADDR(x), BP_PMC_LVDSC2_LVWIE))
#define BR_PMC_LVDSC2_LVWIE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_PMC_LVDSC2_ADDR(x), BP_PMC_LVDSC2_LVWIE)))
/*! @brief Format value for bitfield PMC_LVDSC2_LVWIE. */
#define BF_PMC_LVDSC2_LVWIE(v) ((uint8_t)((uint8_t)(v) << BP_PMC_LVDSC2_LVWIE) & BM_PMC_LVDSC2_LVWIE)
/*! @brief Set the LVWIE field to a new value. */
#define BW_PMC_LVDSC2_LVWIE(x, v) (BITBAND_ACCESS8(HW_PMC_LVDSC2_ADDR(x), BP_PMC_LVDSC2_LVWIE) = (v))
#define BW_PMC_LVDSC2_LVWIE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_PMC_LVDSC2_ADDR(x), BP_PMC_LVDSC2_LVWIE), v))
/*@}*/
/*!
@ -376,7 +383,7 @@ typedef union _hw_pmc_lvdsc2
#define BF_PMC_LVDSC2_LVWACK(v) ((uint8_t)((uint8_t)(v) << BP_PMC_LVDSC2_LVWACK) & BM_PMC_LVDSC2_LVWACK)
/*! @brief Set the LVWACK field to a new value. */
#define BW_PMC_LVDSC2_LVWACK(x, v) (BITBAND_ACCESS8(HW_PMC_LVDSC2_ADDR(x), BP_PMC_LVDSC2_LVWACK) = (v))
#define BW_PMC_LVDSC2_LVWACK(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_PMC_LVDSC2_ADDR(x), BP_PMC_LVDSC2_LVWACK), v))
/*@}*/
/*!
@ -398,7 +405,7 @@ typedef union _hw_pmc_lvdsc2
#define BS_PMC_LVDSC2_LVWF (1U) /*!< Bit field size in bits for PMC_LVDSC2_LVWF. */
/*! @brief Read current value of the PMC_LVDSC2_LVWF field. */
#define BR_PMC_LVDSC2_LVWF(x) (BITBAND_ACCESS8(HW_PMC_LVDSC2_ADDR(x), BP_PMC_LVDSC2_LVWF))
#define BR_PMC_LVDSC2_LVWF(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_PMC_LVDSC2_ADDR(x), BP_PMC_LVDSC2_LVWF)))
/*@}*/
/*******************************************************************************
@ -438,8 +445,8 @@ typedef union _hw_pmc_regsc
#define HW_PMC_REGSC_ADDR(x) ((x) + 0x2U)
#define HW_PMC_REGSC(x) (*(__IO hw_pmc_regsc_t *) HW_PMC_REGSC_ADDR(x))
#define HW_PMC_REGSC_RD(x) (HW_PMC_REGSC(x).U)
#define HW_PMC_REGSC_WR(x, v) (HW_PMC_REGSC(x).U = (v))
#define HW_PMC_REGSC_RD(x) (ADDRESS_READ(hw_pmc_regsc_t, HW_PMC_REGSC_ADDR(x)))
#define HW_PMC_REGSC_WR(x, v) (ADDRESS_WRITE(hw_pmc_regsc_t, HW_PMC_REGSC_ADDR(x), v))
#define HW_PMC_REGSC_SET(x, v) (HW_PMC_REGSC_WR(x, HW_PMC_REGSC_RD(x) | (v)))
#define HW_PMC_REGSC_CLR(x, v) (HW_PMC_REGSC_WR(x, HW_PMC_REGSC_RD(x) & ~(v)))
#define HW_PMC_REGSC_TOG(x, v) (HW_PMC_REGSC_WR(x, HW_PMC_REGSC_RD(x) ^ (v)))
@ -464,13 +471,13 @@ typedef union _hw_pmc_regsc
#define BS_PMC_REGSC_BGBE (1U) /*!< Bit field size in bits for PMC_REGSC_BGBE. */
/*! @brief Read current value of the PMC_REGSC_BGBE field. */
#define BR_PMC_REGSC_BGBE(x) (BITBAND_ACCESS8(HW_PMC_REGSC_ADDR(x), BP_PMC_REGSC_BGBE))
#define BR_PMC_REGSC_BGBE(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_PMC_REGSC_ADDR(x), BP_PMC_REGSC_BGBE)))
/*! @brief Format value for bitfield PMC_REGSC_BGBE. */
#define BF_PMC_REGSC_BGBE(v) ((uint8_t)((uint8_t)(v) << BP_PMC_REGSC_BGBE) & BM_PMC_REGSC_BGBE)
/*! @brief Set the BGBE field to a new value. */
#define BW_PMC_REGSC_BGBE(x, v) (BITBAND_ACCESS8(HW_PMC_REGSC_ADDR(x), BP_PMC_REGSC_BGBE) = (v))
#define BW_PMC_REGSC_BGBE(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_PMC_REGSC_ADDR(x), BP_PMC_REGSC_BGBE), v))
/*@}*/
/*!
@ -489,7 +496,7 @@ typedef union _hw_pmc_regsc
#define BS_PMC_REGSC_REGONS (1U) /*!< Bit field size in bits for PMC_REGSC_REGONS. */
/*! @brief Read current value of the PMC_REGSC_REGONS field. */
#define BR_PMC_REGSC_REGONS(x) (BITBAND_ACCESS8(HW_PMC_REGSC_ADDR(x), BP_PMC_REGSC_REGONS))
#define BR_PMC_REGSC_REGONS(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_PMC_REGSC_ADDR(x), BP_PMC_REGSC_REGONS)))
/*@}*/
/*!
@ -513,13 +520,13 @@ typedef union _hw_pmc_regsc
#define BS_PMC_REGSC_ACKISO (1U) /*!< Bit field size in bits for PMC_REGSC_ACKISO. */
/*! @brief Read current value of the PMC_REGSC_ACKISO field. */
#define BR_PMC_REGSC_ACKISO(x) (BITBAND_ACCESS8(HW_PMC_REGSC_ADDR(x), BP_PMC_REGSC_ACKISO))
#define BR_PMC_REGSC_ACKISO(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_PMC_REGSC_ADDR(x), BP_PMC_REGSC_ACKISO)))
/*! @brief Format value for bitfield PMC_REGSC_ACKISO. */
#define BF_PMC_REGSC_ACKISO(v) ((uint8_t)((uint8_t)(v) << BP_PMC_REGSC_ACKISO) & BM_PMC_REGSC_ACKISO)
/*! @brief Set the ACKISO field to a new value. */
#define BW_PMC_REGSC_ACKISO(x, v) (BITBAND_ACCESS8(HW_PMC_REGSC_ADDR(x), BP_PMC_REGSC_ACKISO) = (v))
#define BW_PMC_REGSC_ACKISO(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_PMC_REGSC_ADDR(x), BP_PMC_REGSC_ACKISO), v))
/*@}*/
/*!
@ -541,13 +548,13 @@ typedef union _hw_pmc_regsc
#define BS_PMC_REGSC_BGEN (1U) /*!< Bit field size in bits for PMC_REGSC_BGEN. */
/*! @brief Read current value of the PMC_REGSC_BGEN field. */
#define BR_PMC_REGSC_BGEN(x) (BITBAND_ACCESS8(HW_PMC_REGSC_ADDR(x), BP_PMC_REGSC_BGEN))
#define BR_PMC_REGSC_BGEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_PMC_REGSC_ADDR(x), BP_PMC_REGSC_BGEN)))
/*! @brief Format value for bitfield PMC_REGSC_BGEN. */
#define BF_PMC_REGSC_BGEN(v) ((uint8_t)((uint8_t)(v) << BP_PMC_REGSC_BGEN) & BM_PMC_REGSC_BGEN)
/*! @brief Set the BGEN field to a new value. */
#define BW_PMC_REGSC_BGEN(x, v) (BITBAND_ACCESS8(HW_PMC_REGSC_ADDR(x), BP_PMC_REGSC_BGEN) = (v))
#define BW_PMC_REGSC_BGEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_PMC_REGSC_ADDR(x), BP_PMC_REGSC_BGEN), v))
/*@}*/
/*******************************************************************************

77
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_port.h
View File

@ -15,6 +15,9 @@
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** (C) COPYRIGHT 2015-2015 ARM Limited
** ALL RIGHTS RESERVED
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
@ -68,6 +71,10 @@
** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
** Update of SystemInit() and SystemCoreClockUpdate() functions.
** Module access macro module_BASES replaced by module_BASE_PTRS.
** - rev. 2.6 (2015-08-03) (ARM)
** All accesses to memory are replaced by equivalent macros; this allows
** memory read/write operations to be re-defined if needed (for example,
** to implement new security features
**
** ###################################################################
*/
@ -154,8 +161,8 @@ typedef union _hw_port_pcrn
#define HW_PORT_PCRn_ADDR(x, n) ((x) + 0x0U + (0x4U * (n)))
#define HW_PORT_PCRn(x, n) (*(__IO hw_port_pcrn_t *) HW_PORT_PCRn_ADDR(x, n))
#define HW_PORT_PCRn_RD(x, n) (HW_PORT_PCRn(x, n).U)
#define HW_PORT_PCRn_WR(x, n, v) (HW_PORT_PCRn(x, n).U = (v))
#define HW_PORT_PCRn_RD(x, n) (ADDRESS_READ(hw_port_pcrn_t, HW_PORT_PCRn_ADDR(x, n)))
#define HW_PORT_PCRn_WR(x, n, v) (ADDRESS_WRITE(hw_port_pcrn_t, HW_PORT_PCRn_ADDR(x, n), v))
#define HW_PORT_PCRn_SET(x, n, v) (HW_PORT_PCRn_WR(x, n, HW_PORT_PCRn_RD(x, n) | (v)))
#define HW_PORT_PCRn_CLR(x, n, v) (HW_PORT_PCRn_WR(x, n, HW_PORT_PCRn_RD(x, n) & ~(v)))
#define HW_PORT_PCRn_TOG(x, n, v) (HW_PORT_PCRn_WR(x, n, HW_PORT_PCRn_RD(x, n) ^ (v)))
@ -182,13 +189,13 @@ typedef union _hw_port_pcrn
#define BS_PORT_PCRn_PS (1U) /*!< Bit field size in bits for PORT_PCRn_PS. */
/*! @brief Read current value of the PORT_PCRn_PS field. */
#define BR_PORT_PCRn_PS(x, n) (BITBAND_ACCESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_PS))
#define BR_PORT_PCRn_PS(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_PS)))
/*! @brief Format value for bitfield PORT_PCRn_PS. */
#define BF_PORT_PCRn_PS(v) ((uint32_t)((uint32_t)(v) << BP_PORT_PCRn_PS) & BM_PORT_PCRn_PS)
/*! @brief Set the PS field to a new value. */
#define BW_PORT_PCRn_PS(x, n, v) (BITBAND_ACCESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_PS) = (v))
#define BW_PORT_PCRn_PS(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_PS), v))
/*@}*/
/*!
@ -208,13 +215,13 @@ typedef union _hw_port_pcrn
#define BS_PORT_PCRn_PE (1U) /*!< Bit field size in bits for PORT_PCRn_PE. */
/*! @brief Read current value of the PORT_PCRn_PE field. */
#define BR_PORT_PCRn_PE(x, n) (BITBAND_ACCESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_PE))
#define BR_PORT_PCRn_PE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_PE)))
/*! @brief Format value for bitfield PORT_PCRn_PE. */
#define BF_PORT_PCRn_PE(v) ((uint32_t)((uint32_t)(v) << BP_PORT_PCRn_PE) & BM_PORT_PCRn_PE)
/*! @brief Set the PE field to a new value. */
#define BW_PORT_PCRn_PE(x, n, v) (BITBAND_ACCESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_PE) = (v))
#define BW_PORT_PCRn_PE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_PE), v))
/*@}*/
/*!
@ -234,13 +241,13 @@ typedef union _hw_port_pcrn
#define BS_PORT_PCRn_SRE (1U) /*!< Bit field size in bits for PORT_PCRn_SRE. */
/*! @brief Read current value of the PORT_PCRn_SRE field. */
#define BR_PORT_PCRn_SRE(x, n) (BITBAND_ACCESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_SRE))
#define BR_PORT_PCRn_SRE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_SRE)))
/*! @brief Format value for bitfield PORT_PCRn_SRE. */
#define BF_PORT_PCRn_SRE(v) ((uint32_t)((uint32_t)(v) << BP_PORT_PCRn_SRE) & BM_PORT_PCRn_SRE)
/*! @brief Set the SRE field to a new value. */
#define BW_PORT_PCRn_SRE(x, n, v) (BITBAND_ACCESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_SRE) = (v))
#define BW_PORT_PCRn_SRE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_SRE), v))
/*@}*/
/*!
@ -260,13 +267,13 @@ typedef union _hw_port_pcrn
#define BS_PORT_PCRn_PFE (1U) /*!< Bit field size in bits for PORT_PCRn_PFE. */
/*! @brief Read current value of the PORT_PCRn_PFE field. */
#define BR_PORT_PCRn_PFE(x, n) (BITBAND_ACCESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_PFE))
#define BR_PORT_PCRn_PFE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_PFE)))
/*! @brief Format value for bitfield PORT_PCRn_PFE. */
#define BF_PORT_PCRn_PFE(v) ((uint32_t)((uint32_t)(v) << BP_PORT_PCRn_PFE) & BM_PORT_PCRn_PFE)
/*! @brief Set the PFE field to a new value. */
#define BW_PORT_PCRn_PFE(x, n, v) (BITBAND_ACCESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_PFE) = (v))
#define BW_PORT_PCRn_PFE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_PFE), v))
/*@}*/
/*!
@ -285,13 +292,13 @@ typedef union _hw_port_pcrn
#define BS_PORT_PCRn_ODE (1U) /*!< Bit field size in bits for PORT_PCRn_ODE. */
/*! @brief Read current value of the PORT_PCRn_ODE field. */
#define BR_PORT_PCRn_ODE(x, n) (BITBAND_ACCESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_ODE))
#define BR_PORT_PCRn_ODE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_ODE)))
/*! @brief Format value for bitfield PORT_PCRn_ODE. */
#define BF_PORT_PCRn_ODE(v) ((uint32_t)((uint32_t)(v) << BP_PORT_PCRn_ODE) & BM_PORT_PCRn_ODE)
/*! @brief Set the ODE field to a new value. */
#define BW_PORT_PCRn_ODE(x, n, v) (BITBAND_ACCESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_ODE) = (v))
#define BW_PORT_PCRn_ODE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_ODE), v))
/*@}*/
/*!
@ -311,13 +318,13 @@ typedef union _hw_port_pcrn
#define BS_PORT_PCRn_DSE (1U) /*!< Bit field size in bits for PORT_PCRn_DSE. */
/*! @brief Read current value of the PORT_PCRn_DSE field. */
#define BR_PORT_PCRn_DSE(x, n) (BITBAND_ACCESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_DSE))
#define BR_PORT_PCRn_DSE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_DSE)))
/*! @brief Format value for bitfield PORT_PCRn_DSE. */
#define BF_PORT_PCRn_DSE(v) ((uint32_t)((uint32_t)(v) << BP_PORT_PCRn_DSE) & BM_PORT_PCRn_DSE)
/*! @brief Set the DSE field to a new value. */
#define BW_PORT_PCRn_DSE(x, n, v) (BITBAND_ACCESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_DSE) = (v))
#define BW_PORT_PCRn_DSE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_DSE), v))
/*@}*/
/*!
@ -344,7 +351,7 @@ typedef union _hw_port_pcrn
#define BS_PORT_PCRn_MUX (3U) /*!< Bit field size in bits for PORT_PCRn_MUX. */
/*! @brief Read current value of the PORT_PCRn_MUX field. */
#define BR_PORT_PCRn_MUX(x, n) (HW_PORT_PCRn(x, n).B.MUX)
#define BR_PORT_PCRn_MUX(x, n) (UNION_READ(hw_port_pcrn_t, HW_PORT_PCRn_ADDR(x, n), U, B.MUX))
/*! @brief Format value for bitfield PORT_PCRn_MUX. */
#define BF_PORT_PCRn_MUX(v) ((uint32_t)((uint32_t)(v) << BP_PORT_PCRn_MUX) & BM_PORT_PCRn_MUX)
@ -367,13 +374,13 @@ typedef union _hw_port_pcrn
#define BS_PORT_PCRn_LK (1U) /*!< Bit field size in bits for PORT_PCRn_LK. */
/*! @brief Read current value of the PORT_PCRn_LK field. */
#define BR_PORT_PCRn_LK(x, n) (BITBAND_ACCESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_LK))
#define BR_PORT_PCRn_LK(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_LK)))
/*! @brief Format value for bitfield PORT_PCRn_LK. */
#define BF_PORT_PCRn_LK(v) ((uint32_t)((uint32_t)(v) << BP_PORT_PCRn_LK) & BM_PORT_PCRn_LK)
/*! @brief Set the LK field to a new value. */
#define BW_PORT_PCRn_LK(x, n, v) (BITBAND_ACCESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_LK) = (v))
#define BW_PORT_PCRn_LK(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_LK), v))
/*@}*/
/*!
@ -399,7 +406,7 @@ typedef union _hw_port_pcrn
#define BS_PORT_PCRn_IRQC (4U) /*!< Bit field size in bits for PORT_PCRn_IRQC. */
/*! @brief Read current value of the PORT_PCRn_IRQC field. */
#define BR_PORT_PCRn_IRQC(x, n) (HW_PORT_PCRn(x, n).B.IRQC)
#define BR_PORT_PCRn_IRQC(x, n) (UNION_READ(hw_port_pcrn_t, HW_PORT_PCRn_ADDR(x, n), U, B.IRQC))
/*! @brief Format value for bitfield PORT_PCRn_IRQC. */
#define BF_PORT_PCRn_IRQC(v) ((uint32_t)((uint32_t)(v) << BP_PORT_PCRn_IRQC) & BM_PORT_PCRn_IRQC)
@ -428,13 +435,13 @@ typedef union _hw_port_pcrn
#define BS_PORT_PCRn_ISF (1U) /*!< Bit field size in bits for PORT_PCRn_ISF. */
/*! @brief Read current value of the PORT_PCRn_ISF field. */
#define BR_PORT_PCRn_ISF(x, n) (BITBAND_ACCESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_ISF))
#define BR_PORT_PCRn_ISF(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_ISF)))
/*! @brief Format value for bitfield PORT_PCRn_ISF. */
#define BF_PORT_PCRn_ISF(v) ((uint32_t)((uint32_t)(v) << BP_PORT_PCRn_ISF) & BM_PORT_PCRn_ISF)
/*! @brief Set the ISF field to a new value. */
#define BW_PORT_PCRn_ISF(x, n, v) (BITBAND_ACCESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_ISF) = (v))
#define BW_PORT_PCRn_ISF(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PORT_PCRn_ADDR(x, n), BP_PORT_PCRn_ISF), v))
/*@}*/
/*******************************************************************************
@ -465,8 +472,8 @@ typedef union _hw_port_gpclr
#define HW_PORT_GPCLR_ADDR(x) ((x) + 0x80U)
#define HW_PORT_GPCLR(x) (*(__O hw_port_gpclr_t *) HW_PORT_GPCLR_ADDR(x))
#define HW_PORT_GPCLR_RD(x) (HW_PORT_GPCLR(x).U)
#define HW_PORT_GPCLR_WR(x, v) (HW_PORT_GPCLR(x).U = (v))
#define HW_PORT_GPCLR_RD(x) (ADDRESS_READ(hw_port_gpclr_t, HW_PORT_GPCLR_ADDR(x)))
#define HW_PORT_GPCLR_WR(x, v) (ADDRESS_WRITE(hw_port_gpclr_t, HW_PORT_GPCLR_ADDR(x), v))
/*@}*/
/*
@ -543,8 +550,8 @@ typedef union _hw_port_gpchr
#define HW_PORT_GPCHR_ADDR(x) ((x) + 0x84U)
#define HW_PORT_GPCHR(x) (*(__O hw_port_gpchr_t *) HW_PORT_GPCHR_ADDR(x))
#define HW_PORT_GPCHR_RD(x) (HW_PORT_GPCHR(x).U)
#define HW_PORT_GPCHR_WR(x, v) (HW_PORT_GPCHR(x).U = (v))
#define HW_PORT_GPCHR_RD(x) (ADDRESS_READ(hw_port_gpchr_t, HW_PORT_GPCHR_ADDR(x)))
#define HW_PORT_GPCHR_WR(x, v) (ADDRESS_WRITE(hw_port_gpchr_t, HW_PORT_GPCHR_ADDR(x), v))
/*@}*/
/*
@ -622,8 +629,8 @@ typedef union _hw_port_isfr
#define HW_PORT_ISFR_ADDR(x) ((x) + 0xA0U)
#define HW_PORT_ISFR(x) (*(__IO hw_port_isfr_t *) HW_PORT_ISFR_ADDR(x))
#define HW_PORT_ISFR_RD(x) (HW_PORT_ISFR(x).U)
#define HW_PORT_ISFR_WR(x, v) (HW_PORT_ISFR(x).U = (v))
#define HW_PORT_ISFR_RD(x) (ADDRESS_READ(hw_port_isfr_t, HW_PORT_ISFR_ADDR(x)))
#define HW_PORT_ISFR_WR(x, v) (ADDRESS_WRITE(hw_port_isfr_t, HW_PORT_ISFR_ADDR(x), v))
#define HW_PORT_ISFR_SET(x, v) (HW_PORT_ISFR_WR(x, HW_PORT_ISFR_RD(x) | (v)))
#define HW_PORT_ISFR_CLR(x, v) (HW_PORT_ISFR_WR(x, HW_PORT_ISFR_RD(x) & ~(v)))
#define HW_PORT_ISFR_TOG(x, v) (HW_PORT_ISFR_WR(x, HW_PORT_ISFR_RD(x) ^ (v)))
@ -693,8 +700,8 @@ typedef union _hw_port_dfer
#define HW_PORT_DFER_ADDR(x) ((x) + 0xC0U)
#define HW_PORT_DFER(x) (*(__IO hw_port_dfer_t *) HW_PORT_DFER_ADDR(x))
#define HW_PORT_DFER_RD(x) (HW_PORT_DFER(x).U)
#define HW_PORT_DFER_WR(x, v) (HW_PORT_DFER(x).U = (v))
#define HW_PORT_DFER_RD(x) (ADDRESS_READ(hw_port_dfer_t, HW_PORT_DFER_ADDR(x)))
#define HW_PORT_DFER_WR(x, v) (ADDRESS_WRITE(hw_port_dfer_t, HW_PORT_DFER_ADDR(x), v))
#define HW_PORT_DFER_SET(x, v) (HW_PORT_DFER_WR(x, HW_PORT_DFER_RD(x) | (v)))
#define HW_PORT_DFER_CLR(x, v) (HW_PORT_DFER_WR(x, HW_PORT_DFER_RD(x) & ~(v)))
#define HW_PORT_DFER_TOG(x, v) (HW_PORT_DFER_WR(x, HW_PORT_DFER_RD(x) ^ (v)))
@ -762,8 +769,8 @@ typedef union _hw_port_dfcr
#define HW_PORT_DFCR_ADDR(x) ((x) + 0xC4U)
#define HW_PORT_DFCR(x) (*(__IO hw_port_dfcr_t *) HW_PORT_DFCR_ADDR(x))
#define HW_PORT_DFCR_RD(x) (HW_PORT_DFCR(x).U)
#define HW_PORT_DFCR_WR(x, v) (HW_PORT_DFCR(x).U = (v))
#define HW_PORT_DFCR_RD(x) (ADDRESS_READ(hw_port_dfcr_t, HW_PORT_DFCR_ADDR(x)))
#define HW_PORT_DFCR_WR(x, v) (ADDRESS_WRITE(hw_port_dfcr_t, HW_PORT_DFCR_ADDR(x), v))
#define HW_PORT_DFCR_SET(x, v) (HW_PORT_DFCR_WR(x, HW_PORT_DFCR_RD(x) | (v)))
#define HW_PORT_DFCR_CLR(x, v) (HW_PORT_DFCR_WR(x, HW_PORT_DFCR_RD(x) & ~(v)))
#define HW_PORT_DFCR_TOG(x, v) (HW_PORT_DFCR_WR(x, HW_PORT_DFCR_RD(x) ^ (v)))
@ -790,13 +797,13 @@ typedef union _hw_port_dfcr
#define BS_PORT_DFCR_CS (1U) /*!< Bit field size in bits for PORT_DFCR_CS. */
/*! @brief Read current value of the PORT_DFCR_CS field. */
#define BR_PORT_DFCR_CS(x) (BITBAND_ACCESS32(HW_PORT_DFCR_ADDR(x), BP_PORT_DFCR_CS))
#define BR_PORT_DFCR_CS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_PORT_DFCR_ADDR(x), BP_PORT_DFCR_CS)))
/*! @brief Format value for bitfield PORT_DFCR_CS. */
#define BF_PORT_DFCR_CS(v) ((uint32_t)((uint32_t)(v) << BP_PORT_DFCR_CS) & BM_PORT_DFCR_CS)
/*! @brief Set the CS field to a new value. */
#define BW_PORT_DFCR_CS(x, v) (BITBAND_ACCESS32(HW_PORT_DFCR_ADDR(x), BP_PORT_DFCR_CS) = (v))
#define BW_PORT_DFCR_CS(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_PORT_DFCR_ADDR(x), BP_PORT_DFCR_CS), v))
/*@}*/
/*******************************************************************************
@ -828,8 +835,8 @@ typedef union _hw_port_dfwr
#define HW_PORT_DFWR_ADDR(x) ((x) + 0xC8U)
#define HW_PORT_DFWR(x) (*(__IO hw_port_dfwr_t *) HW_PORT_DFWR_ADDR(x))
#define HW_PORT_DFWR_RD(x) (HW_PORT_DFWR(x).U)
#define HW_PORT_DFWR_WR(x, v) (HW_PORT_DFWR(x).U = (v))
#define HW_PORT_DFWR_RD(x) (ADDRESS_READ(hw_port_dfwr_t, HW_PORT_DFWR_ADDR(x)))
#define HW_PORT_DFWR_WR(x, v) (ADDRESS_WRITE(hw_port_dfwr_t, HW_PORT_DFWR_ADDR(x), v))
#define HW_PORT_DFWR_SET(x, v) (HW_PORT_DFWR_WR(x, HW_PORT_DFWR_RD(x) | (v)))
#define HW_PORT_DFWR_CLR(x, v) (HW_PORT_DFWR_WR(x, HW_PORT_DFWR_RD(x) & ~(v)))
#define HW_PORT_DFWR_TOG(x, v) (HW_PORT_DFWR_WR(x, HW_PORT_DFWR_RD(x) ^ (v)))
@ -855,7 +862,7 @@ typedef union _hw_port_dfwr
#define BS_PORT_DFWR_FILT (5U) /*!< Bit field size in bits for PORT_DFWR_FILT. */
/*! @brief Read current value of the PORT_DFWR_FILT field. */
#define BR_PORT_DFWR_FILT(x) (HW_PORT_DFWR(x).B.FILT)
#define BR_PORT_DFWR_FILT(x) (UNION_READ(hw_port_dfwr_t, HW_PORT_DFWR_ADDR(x), U, B.FILT))
/*! @brief Format value for bitfield PORT_DFWR_FILT. */
#define BF_PORT_DFWR_FILT(v) ((uint32_t)((uint32_t)(v) << BP_PORT_DFWR_FILT) & BM_PORT_DFWR_FILT)

57
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_rcm.h
View File

@ -15,6 +15,9 @@
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** (C) COPYRIGHT 2015-2015 ARM Limited
** ALL RIGHTS RESERVED
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
@ -68,6 +71,10 @@
** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
** Update of SystemInit() and SystemCoreClockUpdate() functions.
** Module access macro module_BASES replaced by module_BASE_PTRS.
** - rev. 2.6 (2015-08-03) (ARM)
** All accesses to memory are replaced by equivalent macros; this allows
** memory read/write operations to be re-defined if needed (for example,
** to implement new security features
**
** ###################################################################
*/
@ -139,7 +146,7 @@ typedef union _hw_rcm_srs0
#define HW_RCM_SRS0_ADDR(x) ((x) + 0x0U)
#define HW_RCM_SRS0(x) (*(__I hw_rcm_srs0_t *) HW_RCM_SRS0_ADDR(x))
#define HW_RCM_SRS0_RD(x) (HW_RCM_SRS0(x).U)
#define HW_RCM_SRS0_RD(x) (ADDRESS_READ(hw_rcm_srs0_t, HW_RCM_SRS0_ADDR(x)))
/*@}*/
/*
@ -164,7 +171,7 @@ typedef union _hw_rcm_srs0
#define BS_RCM_SRS0_WAKEUP (1U) /*!< Bit field size in bits for RCM_SRS0_WAKEUP. */
/*! @brief Read current value of the RCM_SRS0_WAKEUP field. */
#define BR_RCM_SRS0_WAKEUP(x) (BITBAND_ACCESS8(HW_RCM_SRS0_ADDR(x), BP_RCM_SRS0_WAKEUP))
#define BR_RCM_SRS0_WAKEUP(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_RCM_SRS0_ADDR(x), BP_RCM_SRS0_WAKEUP)))
/*@}*/
/*!
@ -183,7 +190,7 @@ typedef union _hw_rcm_srs0
#define BS_RCM_SRS0_LVD (1U) /*!< Bit field size in bits for RCM_SRS0_LVD. */
/*! @brief Read current value of the RCM_SRS0_LVD field. */
#define BR_RCM_SRS0_LVD(x) (BITBAND_ACCESS8(HW_RCM_SRS0_ADDR(x), BP_RCM_SRS0_LVD))
#define BR_RCM_SRS0_LVD(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_RCM_SRS0_ADDR(x), BP_RCM_SRS0_LVD)))
/*@}*/
/*!
@ -203,7 +210,7 @@ typedef union _hw_rcm_srs0
#define BS_RCM_SRS0_LOC (1U) /*!< Bit field size in bits for RCM_SRS0_LOC. */
/*! @brief Read current value of the RCM_SRS0_LOC field. */
#define BR_RCM_SRS0_LOC(x) (BITBAND_ACCESS8(HW_RCM_SRS0_ADDR(x), BP_RCM_SRS0_LOC))
#define BR_RCM_SRS0_LOC(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_RCM_SRS0_ADDR(x), BP_RCM_SRS0_LOC)))
/*@}*/
/*!
@ -222,7 +229,7 @@ typedef union _hw_rcm_srs0
#define BS_RCM_SRS0_LOL (1U) /*!< Bit field size in bits for RCM_SRS0_LOL. */
/*! @brief Read current value of the RCM_SRS0_LOL field. */
#define BR_RCM_SRS0_LOL(x) (BITBAND_ACCESS8(HW_RCM_SRS0_ADDR(x), BP_RCM_SRS0_LOL))
#define BR_RCM_SRS0_LOL(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_RCM_SRS0_ADDR(x), BP_RCM_SRS0_LOL)))
/*@}*/
/*!
@ -242,7 +249,7 @@ typedef union _hw_rcm_srs0
#define BS_RCM_SRS0_WDOG (1U) /*!< Bit field size in bits for RCM_SRS0_WDOG. */
/*! @brief Read current value of the RCM_SRS0_WDOG field. */
#define BR_RCM_SRS0_WDOG(x) (BITBAND_ACCESS8(HW_RCM_SRS0_ADDR(x), BP_RCM_SRS0_WDOG))
#define BR_RCM_SRS0_WDOG(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_RCM_SRS0_ADDR(x), BP_RCM_SRS0_WDOG)))
/*@}*/
/*!
@ -261,7 +268,7 @@ typedef union _hw_rcm_srs0
#define BS_RCM_SRS0_PIN (1U) /*!< Bit field size in bits for RCM_SRS0_PIN. */
/*! @brief Read current value of the RCM_SRS0_PIN field. */
#define BR_RCM_SRS0_PIN(x) (BITBAND_ACCESS8(HW_RCM_SRS0_ADDR(x), BP_RCM_SRS0_PIN))
#define BR_RCM_SRS0_PIN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_RCM_SRS0_ADDR(x), BP_RCM_SRS0_PIN)))
/*@}*/
/*!
@ -282,7 +289,7 @@ typedef union _hw_rcm_srs0
#define BS_RCM_SRS0_POR (1U) /*!< Bit field size in bits for RCM_SRS0_POR. */
/*! @brief Read current value of the RCM_SRS0_POR field. */
#define BR_RCM_SRS0_POR(x) (BITBAND_ACCESS8(HW_RCM_SRS0_ADDR(x), BP_RCM_SRS0_POR))
#define BR_RCM_SRS0_POR(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_RCM_SRS0_ADDR(x), BP_RCM_SRS0_POR)))
/*@}*/
/*******************************************************************************
@ -322,7 +329,7 @@ typedef union _hw_rcm_srs1
#define HW_RCM_SRS1_ADDR(x) ((x) + 0x1U)
#define HW_RCM_SRS1(x) (*(__I hw_rcm_srs1_t *) HW_RCM_SRS1_ADDR(x))
#define HW_RCM_SRS1_RD(x) (HW_RCM_SRS1(x).U)
#define HW_RCM_SRS1_RD(x) (ADDRESS_READ(hw_rcm_srs1_t, HW_RCM_SRS1_ADDR(x)))
/*@}*/
/*
@ -345,7 +352,7 @@ typedef union _hw_rcm_srs1
#define BS_RCM_SRS1_JTAG (1U) /*!< Bit field size in bits for RCM_SRS1_JTAG. */
/*! @brief Read current value of the RCM_SRS1_JTAG field. */
#define BR_RCM_SRS1_JTAG(x) (BITBAND_ACCESS8(HW_RCM_SRS1_ADDR(x), BP_RCM_SRS1_JTAG))
#define BR_RCM_SRS1_JTAG(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_RCM_SRS1_ADDR(x), BP_RCM_SRS1_JTAG)))
/*@}*/
/*!
@ -364,7 +371,7 @@ typedef union _hw_rcm_srs1
#define BS_RCM_SRS1_LOCKUP (1U) /*!< Bit field size in bits for RCM_SRS1_LOCKUP. */
/*! @brief Read current value of the RCM_SRS1_LOCKUP field. */
#define BR_RCM_SRS1_LOCKUP(x) (BITBAND_ACCESS8(HW_RCM_SRS1_ADDR(x), BP_RCM_SRS1_LOCKUP))
#define BR_RCM_SRS1_LOCKUP(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_RCM_SRS1_ADDR(x), BP_RCM_SRS1_LOCKUP)))
/*@}*/
/*!
@ -383,7 +390,7 @@ typedef union _hw_rcm_srs1
#define BS_RCM_SRS1_SW (1U) /*!< Bit field size in bits for RCM_SRS1_SW. */
/*! @brief Read current value of the RCM_SRS1_SW field. */
#define BR_RCM_SRS1_SW(x) (BITBAND_ACCESS8(HW_RCM_SRS1_ADDR(x), BP_RCM_SRS1_SW))
#define BR_RCM_SRS1_SW(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_RCM_SRS1_ADDR(x), BP_RCM_SRS1_SW)))
/*@}*/
/*!
@ -404,7 +411,7 @@ typedef union _hw_rcm_srs1
#define BS_RCM_SRS1_MDM_AP (1U) /*!< Bit field size in bits for RCM_SRS1_MDM_AP. */
/*! @brief Read current value of the RCM_SRS1_MDM_AP field. */
#define BR_RCM_SRS1_MDM_AP(x) (BITBAND_ACCESS8(HW_RCM_SRS1_ADDR(x), BP_RCM_SRS1_MDM_AP))
#define BR_RCM_SRS1_MDM_AP(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_RCM_SRS1_ADDR(x), BP_RCM_SRS1_MDM_AP)))
/*@}*/
/*!
@ -425,7 +432,7 @@ typedef union _hw_rcm_srs1
#define BS_RCM_SRS1_EZPT (1U) /*!< Bit field size in bits for RCM_SRS1_EZPT. */
/*! @brief Read current value of the RCM_SRS1_EZPT field. */
#define BR_RCM_SRS1_EZPT(x) (BITBAND_ACCESS8(HW_RCM_SRS1_ADDR(x), BP_RCM_SRS1_EZPT))
#define BR_RCM_SRS1_EZPT(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_RCM_SRS1_ADDR(x), BP_RCM_SRS1_EZPT)))
/*@}*/
/*!
@ -447,7 +454,7 @@ typedef union _hw_rcm_srs1
#define BS_RCM_SRS1_SACKERR (1U) /*!< Bit field size in bits for RCM_SRS1_SACKERR. */
/*! @brief Read current value of the RCM_SRS1_SACKERR field. */
#define BR_RCM_SRS1_SACKERR(x) (BITBAND_ACCESS8(HW_RCM_SRS1_ADDR(x), BP_RCM_SRS1_SACKERR))
#define BR_RCM_SRS1_SACKERR(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_RCM_SRS1_ADDR(x), BP_RCM_SRS1_SACKERR)))
/*@}*/
/*******************************************************************************
@ -483,8 +490,8 @@ typedef union _hw_rcm_rpfc
#define HW_RCM_RPFC_ADDR(x) ((x) + 0x4U)
#define HW_RCM_RPFC(x) (*(__IO hw_rcm_rpfc_t *) HW_RCM_RPFC_ADDR(x))
#define HW_RCM_RPFC_RD(x) (HW_RCM_RPFC(x).U)
#define HW_RCM_RPFC_WR(x, v) (HW_RCM_RPFC(x).U = (v))
#define HW_RCM_RPFC_RD(x) (ADDRESS_READ(hw_rcm_rpfc_t, HW_RCM_RPFC_ADDR(x)))
#define HW_RCM_RPFC_WR(x, v) (ADDRESS_WRITE(hw_rcm_rpfc_t, HW_RCM_RPFC_ADDR(x), v))
#define HW_RCM_RPFC_SET(x, v) (HW_RCM_RPFC_WR(x, HW_RCM_RPFC_RD(x) | (v)))
#define HW_RCM_RPFC_CLR(x, v) (HW_RCM_RPFC_WR(x, HW_RCM_RPFC_RD(x) & ~(v)))
#define HW_RCM_RPFC_TOG(x, v) (HW_RCM_RPFC_WR(x, HW_RCM_RPFC_RD(x) ^ (v)))
@ -511,7 +518,7 @@ typedef union _hw_rcm_rpfc
#define BS_RCM_RPFC_RSTFLTSRW (2U) /*!< Bit field size in bits for RCM_RPFC_RSTFLTSRW. */
/*! @brief Read current value of the RCM_RPFC_RSTFLTSRW field. */
#define BR_RCM_RPFC_RSTFLTSRW(x) (HW_RCM_RPFC(x).B.RSTFLTSRW)
#define BR_RCM_RPFC_RSTFLTSRW(x) (UNION_READ(hw_rcm_rpfc_t, HW_RCM_RPFC_ADDR(x), U, B.RSTFLTSRW))
/*! @brief Format value for bitfield RCM_RPFC_RSTFLTSRW. */
#define BF_RCM_RPFC_RSTFLTSRW(v) ((uint8_t)((uint8_t)(v) << BP_RCM_RPFC_RSTFLTSRW) & BM_RCM_RPFC_RSTFLTSRW)
@ -535,13 +542,13 @@ typedef union _hw_rcm_rpfc
#define BS_RCM_RPFC_RSTFLTSS (1U) /*!< Bit field size in bits for RCM_RPFC_RSTFLTSS. */
/*! @brief Read current value of the RCM_RPFC_RSTFLTSS field. */
#define BR_RCM_RPFC_RSTFLTSS(x) (BITBAND_ACCESS8(HW_RCM_RPFC_ADDR(x), BP_RCM_RPFC_RSTFLTSS))
#define BR_RCM_RPFC_RSTFLTSS(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_RCM_RPFC_ADDR(x), BP_RCM_RPFC_RSTFLTSS)))
/*! @brief Format value for bitfield RCM_RPFC_RSTFLTSS. */
#define BF_RCM_RPFC_RSTFLTSS(v) ((uint8_t)((uint8_t)(v) << BP_RCM_RPFC_RSTFLTSS) & BM_RCM_RPFC_RSTFLTSS)
/*! @brief Set the RSTFLTSS field to a new value. */
#define BW_RCM_RPFC_RSTFLTSS(x, v) (BITBAND_ACCESS8(HW_RCM_RPFC_ADDR(x), BP_RCM_RPFC_RSTFLTSS) = (v))
#define BW_RCM_RPFC_RSTFLTSS(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_RCM_RPFC_ADDR(x), BP_RCM_RPFC_RSTFLTSS), v))
/*@}*/
/*******************************************************************************
@ -573,8 +580,8 @@ typedef union _hw_rcm_rpfw
#define HW_RCM_RPFW_ADDR(x) ((x) + 0x5U)
#define HW_RCM_RPFW(x) (*(__IO hw_rcm_rpfw_t *) HW_RCM_RPFW_ADDR(x))
#define HW_RCM_RPFW_RD(x) (HW_RCM_RPFW(x).U)
#define HW_RCM_RPFW_WR(x, v) (HW_RCM_RPFW(x).U = (v))
#define HW_RCM_RPFW_RD(x) (ADDRESS_READ(hw_rcm_rpfw_t, HW_RCM_RPFW_ADDR(x)))
#define HW_RCM_RPFW_WR(x, v) (ADDRESS_WRITE(hw_rcm_rpfw_t, HW_RCM_RPFW_ADDR(x), v))
#define HW_RCM_RPFW_SET(x, v) (HW_RCM_RPFW_WR(x, HW_RCM_RPFW_RD(x) | (v)))
#define HW_RCM_RPFW_CLR(x, v) (HW_RCM_RPFW_WR(x, HW_RCM_RPFW_RD(x) & ~(v)))
#define HW_RCM_RPFW_TOG(x, v) (HW_RCM_RPFW_WR(x, HW_RCM_RPFW_RD(x) ^ (v)))
@ -629,7 +636,7 @@ typedef union _hw_rcm_rpfw
#define BS_RCM_RPFW_RSTFLTSEL (5U) /*!< Bit field size in bits for RCM_RPFW_RSTFLTSEL. */
/*! @brief Read current value of the RCM_RPFW_RSTFLTSEL field. */
#define BR_RCM_RPFW_RSTFLTSEL(x) (HW_RCM_RPFW(x).B.RSTFLTSEL)
#define BR_RCM_RPFW_RSTFLTSEL(x) (UNION_READ(hw_rcm_rpfw_t, HW_RCM_RPFW_ADDR(x), U, B.RSTFLTSEL))
/*! @brief Format value for bitfield RCM_RPFW_RSTFLTSEL. */
#define BF_RCM_RPFW_RSTFLTSEL(v) ((uint8_t)((uint8_t)(v) << BP_RCM_RPFW_RSTFLTSEL) & BM_RCM_RPFW_RSTFLTSEL)
@ -668,7 +675,7 @@ typedef union _hw_rcm_mr
#define HW_RCM_MR_ADDR(x) ((x) + 0x7U)
#define HW_RCM_MR(x) (*(__I hw_rcm_mr_t *) HW_RCM_MR_ADDR(x))
#define HW_RCM_MR_RD(x) (HW_RCM_MR(x).U)
#define HW_RCM_MR_RD(x) (ADDRESS_READ(hw_rcm_mr_t, HW_RCM_MR_ADDR(x)))
/*@}*/
/*
@ -690,7 +697,7 @@ typedef union _hw_rcm_mr
#define BS_RCM_MR_EZP_MS (1U) /*!< Bit field size in bits for RCM_MR_EZP_MS. */
/*! @brief Read current value of the RCM_MR_EZP_MS field. */
#define BR_RCM_MR_EZP_MS(x) (BITBAND_ACCESS8(HW_RCM_MR_ADDR(x), BP_RCM_MR_EZP_MS))
#define BR_RCM_MR_EZP_MS(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_RCM_MR_ADDR(x), BP_RCM_MR_EZP_MS)))
/*@}*/
/*******************************************************************************

19
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_rfsys.h
View File

@ -15,6 +15,9 @@
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** (C) COPYRIGHT 2015-2015 ARM Limited
** ALL RIGHTS RESERVED
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
@ -68,6 +71,10 @@
** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
** Update of SystemInit() and SystemCoreClockUpdate() functions.
** Module access macro module_BASES replaced by module_BASE_PTRS.
** - rev. 2.6 (2015-08-03) (ARM)
** All accesses to memory are replaced by equivalent macros; this allows
** memory read/write operations to be re-defined if needed (for example,
** to implement new security features
**
** ###################################################################
*/
@ -128,8 +135,8 @@ typedef union _hw_rfsys_regn
#define HW_RFSYS_REGn_ADDR(x, n) ((x) + 0x0U + (0x4U * (n)))
#define HW_RFSYS_REGn(x, n) (*(__IO hw_rfsys_regn_t *) HW_RFSYS_REGn_ADDR(x, n))
#define HW_RFSYS_REGn_RD(x, n) (HW_RFSYS_REGn(x, n).U)
#define HW_RFSYS_REGn_WR(x, n, v) (HW_RFSYS_REGn(x, n).U = (v))
#define HW_RFSYS_REGn_RD(x, n) (ADDRESS_READ(hw_rfsys_regn_t, HW_RFSYS_REGn_ADDR(x, n)))
#define HW_RFSYS_REGn_WR(x, n, v) (ADDRESS_WRITE(hw_rfsys_regn_t, HW_RFSYS_REGn_ADDR(x, n), v))
#define HW_RFSYS_REGn_SET(x, n, v) (HW_RFSYS_REGn_WR(x, n, HW_RFSYS_REGn_RD(x, n) | (v)))
#define HW_RFSYS_REGn_CLR(x, n, v) (HW_RFSYS_REGn_WR(x, n, HW_RFSYS_REGn_RD(x, n) & ~(v)))
#define HW_RFSYS_REGn_TOG(x, n, v) (HW_RFSYS_REGn_WR(x, n, HW_RFSYS_REGn_RD(x, n) ^ (v)))
@ -150,7 +157,7 @@ typedef union _hw_rfsys_regn
#define BS_RFSYS_REGn_LL (8U) /*!< Bit field size in bits for RFSYS_REGn_LL. */
/*! @brief Read current value of the RFSYS_REGn_LL field. */
#define BR_RFSYS_REGn_LL(x, n) (HW_RFSYS_REGn(x, n).B.LL)
#define BR_RFSYS_REGn_LL(x, n) (UNION_READ(hw_rfsys_regn_t, HW_RFSYS_REGn_ADDR(x, n), U, B.LL))
/*! @brief Format value for bitfield RFSYS_REGn_LL. */
#define BF_RFSYS_REGn_LL(v) ((uint32_t)((uint32_t)(v) << BP_RFSYS_REGn_LL) & BM_RFSYS_REGn_LL)
@ -170,7 +177,7 @@ typedef union _hw_rfsys_regn
#define BS_RFSYS_REGn_LH (8U) /*!< Bit field size in bits for RFSYS_REGn_LH. */
/*! @brief Read current value of the RFSYS_REGn_LH field. */
#define BR_RFSYS_REGn_LH(x, n) (HW_RFSYS_REGn(x, n).B.LH)
#define BR_RFSYS_REGn_LH(x, n) (UNION_READ(hw_rfsys_regn_t, HW_RFSYS_REGn_ADDR(x, n), U, B.LH))
/*! @brief Format value for bitfield RFSYS_REGn_LH. */
#define BF_RFSYS_REGn_LH(v) ((uint32_t)((uint32_t)(v) << BP_RFSYS_REGn_LH) & BM_RFSYS_REGn_LH)
@ -190,7 +197,7 @@ typedef union _hw_rfsys_regn
#define BS_RFSYS_REGn_HL (8U) /*!< Bit field size in bits for RFSYS_REGn_HL. */
/*! @brief Read current value of the RFSYS_REGn_HL field. */
#define BR_RFSYS_REGn_HL(x, n) (HW_RFSYS_REGn(x, n).B.HL)
#define BR_RFSYS_REGn_HL(x, n) (UNION_READ(hw_rfsys_regn_t, HW_RFSYS_REGn_ADDR(x, n), U, B.HL))
/*! @brief Format value for bitfield RFSYS_REGn_HL. */
#define BF_RFSYS_REGn_HL(v) ((uint32_t)((uint32_t)(v) << BP_RFSYS_REGn_HL) & BM_RFSYS_REGn_HL)
@ -210,7 +217,7 @@ typedef union _hw_rfsys_regn
#define BS_RFSYS_REGn_HH (8U) /*!< Bit field size in bits for RFSYS_REGn_HH. */
/*! @brief Read current value of the RFSYS_REGn_HH field. */
#define BR_RFSYS_REGn_HH(x, n) (HW_RFSYS_REGn(x, n).B.HH)
#define BR_RFSYS_REGn_HH(x, n) (UNION_READ(hw_rfsys_regn_t, HW_RFSYS_REGn_ADDR(x, n), U, B.HH))
/*! @brief Format value for bitfield RFSYS_REGn_HH. */
#define BF_RFSYS_REGn_HH(v) ((uint32_t)((uint32_t)(v) << BP_RFSYS_REGn_HH) & BM_RFSYS_REGn_HH)

19
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_rfvbat.h
View File

@ -15,6 +15,9 @@
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** (C) COPYRIGHT 2015-2015 ARM Limited
** ALL RIGHTS RESERVED
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
@ -68,6 +71,10 @@
** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
** Update of SystemInit() and SystemCoreClockUpdate() functions.
** Module access macro module_BASES replaced by module_BASE_PTRS.
** - rev. 2.6 (2015-08-03) (ARM)
** All accesses to memory are replaced by equivalent macros; this allows
** memory read/write operations to be re-defined if needed (for example,
** to implement new security features
**
** ###################################################################
*/
@ -128,8 +135,8 @@ typedef union _hw_rfvbat_regn
#define HW_RFVBAT_REGn_ADDR(x, n) ((x) + 0x0U + (0x4U * (n)))
#define HW_RFVBAT_REGn(x, n) (*(__IO hw_rfvbat_regn_t *) HW_RFVBAT_REGn_ADDR(x, n))
#define HW_RFVBAT_REGn_RD(x, n) (HW_RFVBAT_REGn(x, n).U)
#define HW_RFVBAT_REGn_WR(x, n, v) (HW_RFVBAT_REGn(x, n).U = (v))
#define HW_RFVBAT_REGn_RD(x, n) (ADDRESS_READ(hw_rfvbat_regn_t, HW_RFVBAT_REGn_ADDR(x, n)))
#define HW_RFVBAT_REGn_WR(x, n, v) (ADDRESS_WRITE(hw_rfvbat_regn_t, HW_RFVBAT_REGn_ADDR(x, n), v))
#define HW_RFVBAT_REGn_SET(x, n, v) (HW_RFVBAT_REGn_WR(x, n, HW_RFVBAT_REGn_RD(x, n) | (v)))
#define HW_RFVBAT_REGn_CLR(x, n, v) (HW_RFVBAT_REGn_WR(x, n, HW_RFVBAT_REGn_RD(x, n) & ~(v)))
#define HW_RFVBAT_REGn_TOG(x, n, v) (HW_RFVBAT_REGn_WR(x, n, HW_RFVBAT_REGn_RD(x, n) ^ (v)))
@ -150,7 +157,7 @@ typedef union _hw_rfvbat_regn
#define BS_RFVBAT_REGn_LL (8U) /*!< Bit field size in bits for RFVBAT_REGn_LL. */
/*! @brief Read current value of the RFVBAT_REGn_LL field. */
#define BR_RFVBAT_REGn_LL(x, n) (HW_RFVBAT_REGn(x, n).B.LL)
#define BR_RFVBAT_REGn_LL(x, n) (UNION_READ(hw_rfvbat_regn_t, HW_RFVBAT_REGn_ADDR(x, n), U, B.LL))
/*! @brief Format value for bitfield RFVBAT_REGn_LL. */
#define BF_RFVBAT_REGn_LL(v) ((uint32_t)((uint32_t)(v) << BP_RFVBAT_REGn_LL) & BM_RFVBAT_REGn_LL)
@ -170,7 +177,7 @@ typedef union _hw_rfvbat_regn
#define BS_RFVBAT_REGn_LH (8U) /*!< Bit field size in bits for RFVBAT_REGn_LH. */
/*! @brief Read current value of the RFVBAT_REGn_LH field. */
#define BR_RFVBAT_REGn_LH(x, n) (HW_RFVBAT_REGn(x, n).B.LH)
#define BR_RFVBAT_REGn_LH(x, n) (UNION_READ(hw_rfvbat_regn_t, HW_RFVBAT_REGn_ADDR(x, n), U, B.LH))
/*! @brief Format value for bitfield RFVBAT_REGn_LH. */
#define BF_RFVBAT_REGn_LH(v) ((uint32_t)((uint32_t)(v) << BP_RFVBAT_REGn_LH) & BM_RFVBAT_REGn_LH)
@ -190,7 +197,7 @@ typedef union _hw_rfvbat_regn
#define BS_RFVBAT_REGn_HL (8U) /*!< Bit field size in bits for RFVBAT_REGn_HL. */
/*! @brief Read current value of the RFVBAT_REGn_HL field. */
#define BR_RFVBAT_REGn_HL(x, n) (HW_RFVBAT_REGn(x, n).B.HL)
#define BR_RFVBAT_REGn_HL(x, n) (UNION_READ(hw_rfvbat_regn_t, HW_RFVBAT_REGn_ADDR(x, n), U, B.HL))
/*! @brief Format value for bitfield RFVBAT_REGn_HL. */
#define BF_RFVBAT_REGn_HL(v) ((uint32_t)((uint32_t)(v) << BP_RFVBAT_REGn_HL) & BM_RFVBAT_REGn_HL)
@ -210,7 +217,7 @@ typedef union _hw_rfvbat_regn
#define BS_RFVBAT_REGn_HH (8U) /*!< Bit field size in bits for RFVBAT_REGn_HH. */
/*! @brief Read current value of the RFVBAT_REGn_HH field. */
#define BR_RFVBAT_REGn_HH(x, n) (HW_RFVBAT_REGn(x, n).B.HH)
#define BR_RFVBAT_REGn_HH(x, n) (UNION_READ(hw_rfvbat_regn_t, HW_RFVBAT_REGn_ADDR(x, n), U, B.HH))
/*! @brief Format value for bitfield RFVBAT_REGn_HH. */
#define BF_RFVBAT_REGn_HH(v) ((uint32_t)((uint32_t)(v) << BP_RFVBAT_REGn_HH) & BM_RFVBAT_REGn_HH)

51
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_rng.h
View File

@ -15,6 +15,9 @@
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** (C) COPYRIGHT 2015-2015 ARM Limited
** ALL RIGHTS RESERVED
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
@ -68,6 +71,10 @@
** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
** Update of SystemInit() and SystemCoreClockUpdate() functions.
** Module access macro module_BASES replaced by module_BASE_PTRS.
** - rev. 2.6 (2015-08-03) (ARM)
** All accesses to memory are replaced by equivalent macros; this allows
** memory read/write operations to be re-defined if needed (for example,
** to implement new security features
**
** ###################################################################
*/
@ -131,8 +138,8 @@ typedef union _hw_rng_cr
#define HW_RNG_CR_ADDR(x) ((x) + 0x0U)
#define HW_RNG_CR(x) (*(__IO hw_rng_cr_t *) HW_RNG_CR_ADDR(x))
#define HW_RNG_CR_RD(x) (HW_RNG_CR(x).U)
#define HW_RNG_CR_WR(x, v) (HW_RNG_CR(x).U = (v))
#define HW_RNG_CR_RD(x) (ADDRESS_READ(hw_rng_cr_t, HW_RNG_CR_ADDR(x)))
#define HW_RNG_CR_WR(x, v) (ADDRESS_WRITE(hw_rng_cr_t, HW_RNG_CR_ADDR(x), v))
#define HW_RNG_CR_SET(x, v) (HW_RNG_CR_WR(x, HW_RNG_CR_RD(x) | (v)))
#define HW_RNG_CR_CLR(x, v) (HW_RNG_CR_WR(x, HW_RNG_CR_RD(x) & ~(v)))
#define HW_RNG_CR_TOG(x, v) (HW_RNG_CR_WR(x, HW_RNG_CR_RD(x) ^ (v)))
@ -159,13 +166,13 @@ typedef union _hw_rng_cr
#define BS_RNG_CR_GO (1U) /*!< Bit field size in bits for RNG_CR_GO. */
/*! @brief Read current value of the RNG_CR_GO field. */
#define BR_RNG_CR_GO(x) (BITBAND_ACCESS32(HW_RNG_CR_ADDR(x), BP_RNG_CR_GO))
#define BR_RNG_CR_GO(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RNG_CR_ADDR(x), BP_RNG_CR_GO)))
/*! @brief Format value for bitfield RNG_CR_GO. */
#define BF_RNG_CR_GO(v) ((uint32_t)((uint32_t)(v) << BP_RNG_CR_GO) & BM_RNG_CR_GO)
/*! @brief Set the GO field to a new value. */
#define BW_RNG_CR_GO(x, v) (BITBAND_ACCESS32(HW_RNG_CR_ADDR(x), BP_RNG_CR_GO) = (v))
#define BW_RNG_CR_GO(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RNG_CR_ADDR(x), BP_RNG_CR_GO), v))
/*@}*/
/*!
@ -186,13 +193,13 @@ typedef union _hw_rng_cr
#define BS_RNG_CR_HA (1U) /*!< Bit field size in bits for RNG_CR_HA. */
/*! @brief Read current value of the RNG_CR_HA field. */
#define BR_RNG_CR_HA(x) (BITBAND_ACCESS32(HW_RNG_CR_ADDR(x), BP_RNG_CR_HA))
#define BR_RNG_CR_HA(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RNG_CR_ADDR(x), BP_RNG_CR_HA)))
/*! @brief Format value for bitfield RNG_CR_HA. */
#define BF_RNG_CR_HA(v) ((uint32_t)((uint32_t)(v) << BP_RNG_CR_HA) & BM_RNG_CR_HA)
/*! @brief Set the HA field to a new value. */
#define BW_RNG_CR_HA(x, v) (BITBAND_ACCESS32(HW_RNG_CR_ADDR(x), BP_RNG_CR_HA) = (v))
#define BW_RNG_CR_HA(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RNG_CR_ADDR(x), BP_RNG_CR_HA), v))
/*@}*/
/*!
@ -212,13 +219,13 @@ typedef union _hw_rng_cr
#define BS_RNG_CR_INTM (1U) /*!< Bit field size in bits for RNG_CR_INTM. */
/*! @brief Read current value of the RNG_CR_INTM field. */
#define BR_RNG_CR_INTM(x) (BITBAND_ACCESS32(HW_RNG_CR_ADDR(x), BP_RNG_CR_INTM))
#define BR_RNG_CR_INTM(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RNG_CR_ADDR(x), BP_RNG_CR_INTM)))
/*! @brief Format value for bitfield RNG_CR_INTM. */
#define BF_RNG_CR_INTM(v) ((uint32_t)((uint32_t)(v) << BP_RNG_CR_INTM) & BM_RNG_CR_INTM)
/*! @brief Set the INTM field to a new value. */
#define BW_RNG_CR_INTM(x, v) (BITBAND_ACCESS32(HW_RNG_CR_ADDR(x), BP_RNG_CR_INTM) = (v))
#define BW_RNG_CR_INTM(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RNG_CR_ADDR(x), BP_RNG_CR_INTM), v))
/*@}*/
/*!
@ -240,7 +247,7 @@ typedef union _hw_rng_cr
#define BF_RNG_CR_CLRI(v) ((uint32_t)((uint32_t)(v) << BP_RNG_CR_CLRI) & BM_RNG_CR_CLRI)
/*! @brief Set the CLRI field to a new value. */
#define BW_RNG_CR_CLRI(x, v) (BITBAND_ACCESS32(HW_RNG_CR_ADDR(x), BP_RNG_CR_CLRI) = (v))
#define BW_RNG_CR_CLRI(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RNG_CR_ADDR(x), BP_RNG_CR_CLRI), v))
/*@}*/
/*!
@ -259,13 +266,13 @@ typedef union _hw_rng_cr
#define BS_RNG_CR_SLP (1U) /*!< Bit field size in bits for RNG_CR_SLP. */
/*! @brief Read current value of the RNG_CR_SLP field. */
#define BR_RNG_CR_SLP(x) (BITBAND_ACCESS32(HW_RNG_CR_ADDR(x), BP_RNG_CR_SLP))
#define BR_RNG_CR_SLP(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RNG_CR_ADDR(x), BP_RNG_CR_SLP)))
/*! @brief Format value for bitfield RNG_CR_SLP. */
#define BF_RNG_CR_SLP(v) ((uint32_t)((uint32_t)(v) << BP_RNG_CR_SLP) & BM_RNG_CR_SLP)
/*! @brief Set the SLP field to a new value. */
#define BW_RNG_CR_SLP(x, v) (BITBAND_ACCESS32(HW_RNG_CR_ADDR(x), BP_RNG_CR_SLP) = (v))
#define BW_RNG_CR_SLP(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RNG_CR_ADDR(x), BP_RNG_CR_SLP), v))
/*@}*/
/*******************************************************************************
@ -303,7 +310,7 @@ typedef union _hw_rng_sr
#define HW_RNG_SR_ADDR(x) ((x) + 0x4U)
#define HW_RNG_SR(x) (*(__I hw_rng_sr_t *) HW_RNG_SR_ADDR(x))
#define HW_RNG_SR_RD(x) (HW_RNG_SR(x).U)
#define HW_RNG_SR_RD(x) (ADDRESS_READ(hw_rng_sr_t, HW_RNG_SR_ADDR(x)))
/*@}*/
/*
@ -327,7 +334,7 @@ typedef union _hw_rng_sr
#define BS_RNG_SR_SECV (1U) /*!< Bit field size in bits for RNG_SR_SECV. */
/*! @brief Read current value of the RNG_SR_SECV field. */
#define BR_RNG_SR_SECV(x) (BITBAND_ACCESS32(HW_RNG_SR_ADDR(x), BP_RNG_SR_SECV))
#define BR_RNG_SR_SECV(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RNG_SR_ADDR(x), BP_RNG_SR_SECV)))
/*@}*/
/*!
@ -348,7 +355,7 @@ typedef union _hw_rng_sr
#define BS_RNG_SR_LRS (1U) /*!< Bit field size in bits for RNG_SR_LRS. */
/*! @brief Read current value of the RNG_SR_LRS field. */
#define BR_RNG_SR_LRS(x) (BITBAND_ACCESS32(HW_RNG_SR_ADDR(x), BP_RNG_SR_LRS))
#define BR_RNG_SR_LRS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RNG_SR_ADDR(x), BP_RNG_SR_LRS)))
/*@}*/
/*!
@ -370,7 +377,7 @@ typedef union _hw_rng_sr
#define BS_RNG_SR_ORU (1U) /*!< Bit field size in bits for RNG_SR_ORU. */
/*! @brief Read current value of the RNG_SR_ORU field. */
#define BR_RNG_SR_ORU(x) (BITBAND_ACCESS32(HW_RNG_SR_ADDR(x), BP_RNG_SR_ORU))
#define BR_RNG_SR_ORU(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RNG_SR_ADDR(x), BP_RNG_SR_ORU)))
/*@}*/
/*!
@ -392,7 +399,7 @@ typedef union _hw_rng_sr
#define BS_RNG_SR_ERRI (1U) /*!< Bit field size in bits for RNG_SR_ERRI. */
/*! @brief Read current value of the RNG_SR_ERRI field. */
#define BR_RNG_SR_ERRI(x) (BITBAND_ACCESS32(HW_RNG_SR_ADDR(x), BP_RNG_SR_ERRI))
#define BR_RNG_SR_ERRI(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RNG_SR_ADDR(x), BP_RNG_SR_ERRI)))
/*@}*/
/*!
@ -411,7 +418,7 @@ typedef union _hw_rng_sr
#define BS_RNG_SR_SLP (1U) /*!< Bit field size in bits for RNG_SR_SLP. */
/*! @brief Read current value of the RNG_SR_SLP field. */
#define BR_RNG_SR_SLP(x) (BITBAND_ACCESS32(HW_RNG_SR_ADDR(x), BP_RNG_SR_SLP))
#define BR_RNG_SR_SLP(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RNG_SR_ADDR(x), BP_RNG_SR_SLP)))
/*@}*/
/*!
@ -432,7 +439,7 @@ typedef union _hw_rng_sr
#define BS_RNG_SR_OREG_LVL (8U) /*!< Bit field size in bits for RNG_SR_OREG_LVL. */
/*! @brief Read current value of the RNG_SR_OREG_LVL field. */
#define BR_RNG_SR_OREG_LVL(x) (HW_RNG_SR(x).B.OREG_LVL)
#define BR_RNG_SR_OREG_LVL(x) (UNION_READ(hw_rng_sr_t, HW_RNG_SR_ADDR(x), U, B.OREG_LVL))
/*@}*/
/*!
@ -450,7 +457,7 @@ typedef union _hw_rng_sr
#define BS_RNG_SR_OREG_SIZE (8U) /*!< Bit field size in bits for RNG_SR_OREG_SIZE. */
/*! @brief Read current value of the RNG_SR_OREG_SIZE field. */
#define BR_RNG_SR_OREG_SIZE(x) (HW_RNG_SR(x).B.OREG_SIZE)
#define BR_RNG_SR_OREG_SIZE(x) (UNION_READ(hw_rng_sr_t, HW_RNG_SR_ADDR(x), U, B.OREG_SIZE))
/*@}*/
/*******************************************************************************
@ -482,8 +489,8 @@ typedef union _hw_rng_er
#define HW_RNG_ER_ADDR(x) ((x) + 0x8U)
#define HW_RNG_ER(x) (*(__O hw_rng_er_t *) HW_RNG_ER_ADDR(x))
#define HW_RNG_ER_RD(x) (HW_RNG_ER(x).U)
#define HW_RNG_ER_WR(x, v) (HW_RNG_ER(x).U = (v))
#define HW_RNG_ER_RD(x) (ADDRESS_READ(hw_rng_er_t, HW_RNG_ER_ADDR(x)))
#define HW_RNG_ER_WR(x, v) (ADDRESS_WRITE(hw_rng_er_t, HW_RNG_ER_ADDR(x), v))
/*@}*/
/*
@ -536,7 +543,7 @@ typedef union _hw_rng_or
#define HW_RNG_OR_ADDR(x) ((x) + 0xCU)
#define HW_RNG_OR(x) (*(__I hw_rng_or_t *) HW_RNG_OR_ADDR(x))
#define HW_RNG_OR_RD(x) (HW_RNG_OR(x).U)
#define HW_RNG_OR_RD(x) (ADDRESS_READ(hw_rng_or_t, HW_RNG_OR_ADDR(x)))
/*@}*/
/*

211
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_rtc.h
View File

@ -15,6 +15,9 @@
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** (C) COPYRIGHT 2015-2015 ARM Limited
** ALL RIGHTS RESERVED
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
@ -68,6 +71,10 @@
** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
** Update of SystemInit() and SystemCoreClockUpdate() functions.
** Module access macro module_BASES replaced by module_BASE_PTRS.
** - rev. 2.6 (2015-08-03) (ARM)
** All accesses to memory are replaced by equivalent macros; this allows
** memory read/write operations to be re-defined if needed (for example,
** to implement new security features
**
** ###################################################################
*/
@ -130,8 +137,8 @@ typedef union _hw_rtc_tsr
#define HW_RTC_TSR_ADDR(x) ((x) + 0x0U)
#define HW_RTC_TSR(x) (*(__IO hw_rtc_tsr_t *) HW_RTC_TSR_ADDR(x))
#define HW_RTC_TSR_RD(x) (HW_RTC_TSR(x).U)
#define HW_RTC_TSR_WR(x, v) (HW_RTC_TSR(x).U = (v))
#define HW_RTC_TSR_RD(x) (ADDRESS_READ(hw_rtc_tsr_t, HW_RTC_TSR_ADDR(x)))
#define HW_RTC_TSR_WR(x, v) (ADDRESS_WRITE(hw_rtc_tsr_t, HW_RTC_TSR_ADDR(x), v))
#define HW_RTC_TSR_SET(x, v) (HW_RTC_TSR_WR(x, HW_RTC_TSR_RD(x) | (v)))
#define HW_RTC_TSR_CLR(x, v) (HW_RTC_TSR_WR(x, HW_RTC_TSR_RD(x) & ~(v)))
#define HW_RTC_TSR_TOG(x, v) (HW_RTC_TSR_WR(x, HW_RTC_TSR_RD(x) ^ (v)))
@ -193,8 +200,8 @@ typedef union _hw_rtc_tpr
#define HW_RTC_TPR_ADDR(x) ((x) + 0x4U)
#define HW_RTC_TPR(x) (*(__IO hw_rtc_tpr_t *) HW_RTC_TPR_ADDR(x))
#define HW_RTC_TPR_RD(x) (HW_RTC_TPR(x).U)
#define HW_RTC_TPR_WR(x, v) (HW_RTC_TPR(x).U = (v))
#define HW_RTC_TPR_RD(x) (ADDRESS_READ(hw_rtc_tpr_t, HW_RTC_TPR_ADDR(x)))
#define HW_RTC_TPR_WR(x, v) (ADDRESS_WRITE(hw_rtc_tpr_t, HW_RTC_TPR_ADDR(x), v))
#define HW_RTC_TPR_SET(x, v) (HW_RTC_TPR_WR(x, HW_RTC_TPR_RD(x) | (v)))
#define HW_RTC_TPR_CLR(x, v) (HW_RTC_TPR_WR(x, HW_RTC_TPR_RD(x) & ~(v)))
#define HW_RTC_TPR_TOG(x, v) (HW_RTC_TPR_WR(x, HW_RTC_TPR_RD(x) ^ (v)))
@ -219,7 +226,7 @@ typedef union _hw_rtc_tpr
#define BS_RTC_TPR_TPR (16U) /*!< Bit field size in bits for RTC_TPR_TPR. */
/*! @brief Read current value of the RTC_TPR_TPR field. */
#define BR_RTC_TPR_TPR(x) (HW_RTC_TPR(x).B.TPR)
#define BR_RTC_TPR_TPR(x) (UNION_READ(hw_rtc_tpr_t, HW_RTC_TPR_ADDR(x), U, B.TPR))
/*! @brief Format value for bitfield RTC_TPR_TPR. */
#define BF_RTC_TPR_TPR(v) ((uint32_t)((uint32_t)(v) << BP_RTC_TPR_TPR) & BM_RTC_TPR_TPR)
@ -253,8 +260,8 @@ typedef union _hw_rtc_tar
#define HW_RTC_TAR_ADDR(x) ((x) + 0x8U)
#define HW_RTC_TAR(x) (*(__IO hw_rtc_tar_t *) HW_RTC_TAR_ADDR(x))
#define HW_RTC_TAR_RD(x) (HW_RTC_TAR(x).U)
#define HW_RTC_TAR_WR(x, v) (HW_RTC_TAR(x).U = (v))
#define HW_RTC_TAR_RD(x) (ADDRESS_READ(hw_rtc_tar_t, HW_RTC_TAR_ADDR(x)))
#define HW_RTC_TAR_WR(x, v) (ADDRESS_WRITE(hw_rtc_tar_t, HW_RTC_TAR_ADDR(x), v))
#define HW_RTC_TAR_SET(x, v) (HW_RTC_TAR_WR(x, HW_RTC_TAR_RD(x) | (v)))
#define HW_RTC_TAR_CLR(x, v) (HW_RTC_TAR_WR(x, HW_RTC_TAR_RD(x) & ~(v)))
#define HW_RTC_TAR_TOG(x, v) (HW_RTC_TAR_WR(x, HW_RTC_TAR_RD(x) ^ (v)))
@ -314,8 +321,8 @@ typedef union _hw_rtc_tcr
#define HW_RTC_TCR_ADDR(x) ((x) + 0xCU)
#define HW_RTC_TCR(x) (*(__IO hw_rtc_tcr_t *) HW_RTC_TCR_ADDR(x))
#define HW_RTC_TCR_RD(x) (HW_RTC_TCR(x).U)
#define HW_RTC_TCR_WR(x, v) (HW_RTC_TCR(x).U = (v))
#define HW_RTC_TCR_RD(x) (ADDRESS_READ(hw_rtc_tcr_t, HW_RTC_TCR_ADDR(x)))
#define HW_RTC_TCR_WR(x, v) (ADDRESS_WRITE(hw_rtc_tcr_t, HW_RTC_TCR_ADDR(x), v))
#define HW_RTC_TCR_SET(x, v) (HW_RTC_TCR_WR(x, HW_RTC_TCR_RD(x) | (v)))
#define HW_RTC_TCR_CLR(x, v) (HW_RTC_TCR_WR(x, HW_RTC_TCR_RD(x) & ~(v)))
#define HW_RTC_TCR_TOG(x, v) (HW_RTC_TCR_WR(x, HW_RTC_TCR_RD(x) ^ (v)))
@ -345,7 +352,7 @@ typedef union _hw_rtc_tcr
#define BS_RTC_TCR_TCR (8U) /*!< Bit field size in bits for RTC_TCR_TCR. */
/*! @brief Read current value of the RTC_TCR_TCR field. */
#define BR_RTC_TCR_TCR(x) (HW_RTC_TCR(x).B.TCR)
#define BR_RTC_TCR_TCR(x) (UNION_READ(hw_rtc_tcr_t, HW_RTC_TCR_ADDR(x), U, B.TCR))
/*! @brief Format value for bitfield RTC_TCR_TCR. */
#define BF_RTC_TCR_TCR(v) ((uint32_t)((uint32_t)(v) << BP_RTC_TCR_TCR) & BM_RTC_TCR_TCR)
@ -370,7 +377,7 @@ typedef union _hw_rtc_tcr
#define BS_RTC_TCR_CIR (8U) /*!< Bit field size in bits for RTC_TCR_CIR. */
/*! @brief Read current value of the RTC_TCR_CIR field. */
#define BR_RTC_TCR_CIR(x) (HW_RTC_TCR(x).B.CIR)
#define BR_RTC_TCR_CIR(x) (UNION_READ(hw_rtc_tcr_t, HW_RTC_TCR_ADDR(x), U, B.CIR))
/*! @brief Format value for bitfield RTC_TCR_CIR. */
#define BF_RTC_TCR_CIR(v) ((uint32_t)((uint32_t)(v) << BP_RTC_TCR_CIR) & BM_RTC_TCR_CIR)
@ -393,7 +400,7 @@ typedef union _hw_rtc_tcr
#define BS_RTC_TCR_TCV (8U) /*!< Bit field size in bits for RTC_TCR_TCV. */
/*! @brief Read current value of the RTC_TCR_TCV field. */
#define BR_RTC_TCR_TCV(x) (HW_RTC_TCR(x).B.TCV)
#define BR_RTC_TCR_TCV(x) (UNION_READ(hw_rtc_tcr_t, HW_RTC_TCR_ADDR(x), U, B.TCV))
/*@}*/
/*!
@ -409,7 +416,7 @@ typedef union _hw_rtc_tcr
#define BS_RTC_TCR_CIC (8U) /*!< Bit field size in bits for RTC_TCR_CIC. */
/*! @brief Read current value of the RTC_TCR_CIC field. */
#define BR_RTC_TCR_CIC(x) (HW_RTC_TCR(x).B.CIC)
#define BR_RTC_TCR_CIC(x) (UNION_READ(hw_rtc_tcr_t, HW_RTC_TCR_ADDR(x), U, B.CIC))
/*@}*/
/*******************************************************************************
@ -449,8 +456,8 @@ typedef union _hw_rtc_cr
#define HW_RTC_CR_ADDR(x) ((x) + 0x10U)
#define HW_RTC_CR(x) (*(__IO hw_rtc_cr_t *) HW_RTC_CR_ADDR(x))
#define HW_RTC_CR_RD(x) (HW_RTC_CR(x).U)
#define HW_RTC_CR_WR(x, v) (HW_RTC_CR(x).U = (v))
#define HW_RTC_CR_RD(x) (ADDRESS_READ(hw_rtc_cr_t, HW_RTC_CR_ADDR(x)))
#define HW_RTC_CR_WR(x, v) (ADDRESS_WRITE(hw_rtc_cr_t, HW_RTC_CR_ADDR(x), v))
#define HW_RTC_CR_SET(x, v) (HW_RTC_CR_WR(x, HW_RTC_CR_RD(x) | (v)))
#define HW_RTC_CR_CLR(x, v) (HW_RTC_CR_WR(x, HW_RTC_CR_RD(x) & ~(v)))
#define HW_RTC_CR_TOG(x, v) (HW_RTC_CR_WR(x, HW_RTC_CR_RD(x) ^ (v)))
@ -475,13 +482,13 @@ typedef union _hw_rtc_cr
#define BS_RTC_CR_SWR (1U) /*!< Bit field size in bits for RTC_CR_SWR. */
/*! @brief Read current value of the RTC_CR_SWR field. */
#define BR_RTC_CR_SWR(x) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SWR))
#define BR_RTC_CR_SWR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SWR)))
/*! @brief Format value for bitfield RTC_CR_SWR. */
#define BF_RTC_CR_SWR(v) ((uint32_t)((uint32_t)(v) << BP_RTC_CR_SWR) & BM_RTC_CR_SWR)
/*! @brief Set the SWR field to a new value. */
#define BW_RTC_CR_SWR(x, v) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SWR) = (v))
#define BW_RTC_CR_SWR(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SWR), v))
/*@}*/
/*!
@ -500,13 +507,13 @@ typedef union _hw_rtc_cr
#define BS_RTC_CR_WPE (1U) /*!< Bit field size in bits for RTC_CR_WPE. */
/*! @brief Read current value of the RTC_CR_WPE field. */
#define BR_RTC_CR_WPE(x) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_WPE))
#define BR_RTC_CR_WPE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_WPE)))
/*! @brief Format value for bitfield RTC_CR_WPE. */
#define BF_RTC_CR_WPE(v) ((uint32_t)((uint32_t)(v) << BP_RTC_CR_WPE) & BM_RTC_CR_WPE)
/*! @brief Set the WPE field to a new value. */
#define BW_RTC_CR_WPE(x, v) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_WPE) = (v))
#define BW_RTC_CR_WPE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_WPE), v))
/*@}*/
/*!
@ -523,13 +530,13 @@ typedef union _hw_rtc_cr
#define BS_RTC_CR_SUP (1U) /*!< Bit field size in bits for RTC_CR_SUP. */
/*! @brief Read current value of the RTC_CR_SUP field. */
#define BR_RTC_CR_SUP(x) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SUP))
#define BR_RTC_CR_SUP(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SUP)))
/*! @brief Format value for bitfield RTC_CR_SUP. */
#define BF_RTC_CR_SUP(v) ((uint32_t)((uint32_t)(v) << BP_RTC_CR_SUP) & BM_RTC_CR_SUP)
/*! @brief Set the SUP field to a new value. */
#define BW_RTC_CR_SUP(x, v) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SUP) = (v))
#define BW_RTC_CR_SUP(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SUP), v))
/*@}*/
/*!
@ -549,13 +556,13 @@ typedef union _hw_rtc_cr
#define BS_RTC_CR_UM (1U) /*!< Bit field size in bits for RTC_CR_UM. */
/*! @brief Read current value of the RTC_CR_UM field. */
#define BR_RTC_CR_UM(x) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_UM))
#define BR_RTC_CR_UM(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_UM)))
/*! @brief Format value for bitfield RTC_CR_UM. */
#define BF_RTC_CR_UM(v) ((uint32_t)((uint32_t)(v) << BP_RTC_CR_UM) & BM_RTC_CR_UM)
/*! @brief Set the UM field to a new value. */
#define BW_RTC_CR_UM(x, v) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_UM) = (v))
#define BW_RTC_CR_UM(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_UM), v))
/*@}*/
/*!
@ -575,13 +582,13 @@ typedef union _hw_rtc_cr
#define BS_RTC_CR_WPS (1U) /*!< Bit field size in bits for RTC_CR_WPS. */
/*! @brief Read current value of the RTC_CR_WPS field. */
#define BR_RTC_CR_WPS(x) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_WPS))
#define BR_RTC_CR_WPS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_WPS)))
/*! @brief Format value for bitfield RTC_CR_WPS. */
#define BF_RTC_CR_WPS(v) ((uint32_t)((uint32_t)(v) << BP_RTC_CR_WPS) & BM_RTC_CR_WPS)
/*! @brief Set the WPS field to a new value. */
#define BW_RTC_CR_WPS(x, v) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_WPS) = (v))
#define BW_RTC_CR_WPS(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_WPS), v))
/*@}*/
/*!
@ -599,13 +606,13 @@ typedef union _hw_rtc_cr
#define BS_RTC_CR_OSCE (1U) /*!< Bit field size in bits for RTC_CR_OSCE. */
/*! @brief Read current value of the RTC_CR_OSCE field. */
#define BR_RTC_CR_OSCE(x) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_OSCE))
#define BR_RTC_CR_OSCE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_OSCE)))
/*! @brief Format value for bitfield RTC_CR_OSCE. */
#define BF_RTC_CR_OSCE(v) ((uint32_t)((uint32_t)(v) << BP_RTC_CR_OSCE) & BM_RTC_CR_OSCE)
/*! @brief Set the OSCE field to a new value. */
#define BW_RTC_CR_OSCE(x, v) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_OSCE) = (v))
#define BW_RTC_CR_OSCE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_OSCE), v))
/*@}*/
/*!
@ -621,13 +628,13 @@ typedef union _hw_rtc_cr
#define BS_RTC_CR_CLKO (1U) /*!< Bit field size in bits for RTC_CR_CLKO. */
/*! @brief Read current value of the RTC_CR_CLKO field. */
#define BR_RTC_CR_CLKO(x) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_CLKO))
#define BR_RTC_CR_CLKO(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_CLKO)))
/*! @brief Format value for bitfield RTC_CR_CLKO. */
#define BF_RTC_CR_CLKO(v) ((uint32_t)((uint32_t)(v) << BP_RTC_CR_CLKO) & BM_RTC_CR_CLKO)
/*! @brief Set the CLKO field to a new value. */
#define BW_RTC_CR_CLKO(x, v) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_CLKO) = (v))
#define BW_RTC_CR_CLKO(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_CLKO), v))
/*@}*/
/*!
@ -643,13 +650,13 @@ typedef union _hw_rtc_cr
#define BS_RTC_CR_SC16P (1U) /*!< Bit field size in bits for RTC_CR_SC16P. */
/*! @brief Read current value of the RTC_CR_SC16P field. */
#define BR_RTC_CR_SC16P(x) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SC16P))
#define BR_RTC_CR_SC16P(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SC16P)))
/*! @brief Format value for bitfield RTC_CR_SC16P. */
#define BF_RTC_CR_SC16P(v) ((uint32_t)((uint32_t)(v) << BP_RTC_CR_SC16P) & BM_RTC_CR_SC16P)
/*! @brief Set the SC16P field to a new value. */
#define BW_RTC_CR_SC16P(x, v) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SC16P) = (v))
#define BW_RTC_CR_SC16P(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SC16P), v))
/*@}*/
/*!
@ -665,13 +672,13 @@ typedef union _hw_rtc_cr
#define BS_RTC_CR_SC8P (1U) /*!< Bit field size in bits for RTC_CR_SC8P. */
/*! @brief Read current value of the RTC_CR_SC8P field. */
#define BR_RTC_CR_SC8P(x) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SC8P))
#define BR_RTC_CR_SC8P(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SC8P)))
/*! @brief Format value for bitfield RTC_CR_SC8P. */
#define BF_RTC_CR_SC8P(v) ((uint32_t)((uint32_t)(v) << BP_RTC_CR_SC8P) & BM_RTC_CR_SC8P)
/*! @brief Set the SC8P field to a new value. */
#define BW_RTC_CR_SC8P(x, v) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SC8P) = (v))
#define BW_RTC_CR_SC8P(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SC8P), v))
/*@}*/
/*!
@ -687,13 +694,13 @@ typedef union _hw_rtc_cr
#define BS_RTC_CR_SC4P (1U) /*!< Bit field size in bits for RTC_CR_SC4P. */
/*! @brief Read current value of the RTC_CR_SC4P field. */
#define BR_RTC_CR_SC4P(x) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SC4P))
#define BR_RTC_CR_SC4P(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SC4P)))
/*! @brief Format value for bitfield RTC_CR_SC4P. */
#define BF_RTC_CR_SC4P(v) ((uint32_t)((uint32_t)(v) << BP_RTC_CR_SC4P) & BM_RTC_CR_SC4P)
/*! @brief Set the SC4P field to a new value. */
#define BW_RTC_CR_SC4P(x, v) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SC4P) = (v))
#define BW_RTC_CR_SC4P(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SC4P), v))
/*@}*/
/*!
@ -709,13 +716,13 @@ typedef union _hw_rtc_cr
#define BS_RTC_CR_SC2P (1U) /*!< Bit field size in bits for RTC_CR_SC2P. */
/*! @brief Read current value of the RTC_CR_SC2P field. */
#define BR_RTC_CR_SC2P(x) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SC2P))
#define BR_RTC_CR_SC2P(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SC2P)))
/*! @brief Format value for bitfield RTC_CR_SC2P. */
#define BF_RTC_CR_SC2P(v) ((uint32_t)((uint32_t)(v) << BP_RTC_CR_SC2P) & BM_RTC_CR_SC2P)
/*! @brief Set the SC2P field to a new value. */
#define BW_RTC_CR_SC2P(x, v) (BITBAND_ACCESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SC2P) = (v))
#define BW_RTC_CR_SC2P(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_CR_ADDR(x), BP_RTC_CR_SC2P), v))
/*@}*/
/*******************************************************************************
@ -748,8 +755,8 @@ typedef union _hw_rtc_sr
#define HW_RTC_SR_ADDR(x) ((x) + 0x14U)
#define HW_RTC_SR(x) (*(__IO hw_rtc_sr_t *) HW_RTC_SR_ADDR(x))
#define HW_RTC_SR_RD(x) (HW_RTC_SR(x).U)
#define HW_RTC_SR_WR(x, v) (HW_RTC_SR(x).U = (v))
#define HW_RTC_SR_RD(x) (ADDRESS_READ(hw_rtc_sr_t, HW_RTC_SR_ADDR(x)))
#define HW_RTC_SR_WR(x, v) (ADDRESS_WRITE(hw_rtc_sr_t, HW_RTC_SR_ADDR(x), v))
#define HW_RTC_SR_SET(x, v) (HW_RTC_SR_WR(x, HW_RTC_SR_RD(x) | (v)))
#define HW_RTC_SR_CLR(x, v) (HW_RTC_SR_WR(x, HW_RTC_SR_RD(x) & ~(v)))
#define HW_RTC_SR_TOG(x, v) (HW_RTC_SR_WR(x, HW_RTC_SR_RD(x) ^ (v)))
@ -776,7 +783,7 @@ typedef union _hw_rtc_sr
#define BS_RTC_SR_TIF (1U) /*!< Bit field size in bits for RTC_SR_TIF. */
/*! @brief Read current value of the RTC_SR_TIF field. */
#define BR_RTC_SR_TIF(x) (BITBAND_ACCESS32(HW_RTC_SR_ADDR(x), BP_RTC_SR_TIF))
#define BR_RTC_SR_TIF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_SR_ADDR(x), BP_RTC_SR_TIF)))
/*@}*/
/*!
@ -796,7 +803,7 @@ typedef union _hw_rtc_sr
#define BS_RTC_SR_TOF (1U) /*!< Bit field size in bits for RTC_SR_TOF. */
/*! @brief Read current value of the RTC_SR_TOF field. */
#define BR_RTC_SR_TOF(x) (BITBAND_ACCESS32(HW_RTC_SR_ADDR(x), BP_RTC_SR_TOF))
#define BR_RTC_SR_TOF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_SR_ADDR(x), BP_RTC_SR_TOF)))
/*@}*/
/*!
@ -815,7 +822,7 @@ typedef union _hw_rtc_sr
#define BS_RTC_SR_TAF (1U) /*!< Bit field size in bits for RTC_SR_TAF. */
/*! @brief Read current value of the RTC_SR_TAF field. */
#define BR_RTC_SR_TAF(x) (BITBAND_ACCESS32(HW_RTC_SR_ADDR(x), BP_RTC_SR_TAF))
#define BR_RTC_SR_TAF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_SR_ADDR(x), BP_RTC_SR_TAF)))
/*@}*/
/*!
@ -835,13 +842,13 @@ typedef union _hw_rtc_sr
#define BS_RTC_SR_TCE (1U) /*!< Bit field size in bits for RTC_SR_TCE. */
/*! @brief Read current value of the RTC_SR_TCE field. */
#define BR_RTC_SR_TCE(x) (BITBAND_ACCESS32(HW_RTC_SR_ADDR(x), BP_RTC_SR_TCE))
#define BR_RTC_SR_TCE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_SR_ADDR(x), BP_RTC_SR_TCE)))
/*! @brief Format value for bitfield RTC_SR_TCE. */
#define BF_RTC_SR_TCE(v) ((uint32_t)((uint32_t)(v) << BP_RTC_SR_TCE) & BM_RTC_SR_TCE)
/*! @brief Set the TCE field to a new value. */
#define BW_RTC_SR_TCE(x, v) (BITBAND_ACCESS32(HW_RTC_SR_ADDR(x), BP_RTC_SR_TCE) = (v))
#define BW_RTC_SR_TCE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_SR_ADDR(x), BP_RTC_SR_TCE), v))
/*@}*/
/*******************************************************************************
@ -874,8 +881,8 @@ typedef union _hw_rtc_lr
#define HW_RTC_LR_ADDR(x) ((x) + 0x18U)
#define HW_RTC_LR(x) (*(__IO hw_rtc_lr_t *) HW_RTC_LR_ADDR(x))
#define HW_RTC_LR_RD(x) (HW_RTC_LR(x).U)
#define HW_RTC_LR_WR(x, v) (HW_RTC_LR(x).U = (v))
#define HW_RTC_LR_RD(x) (ADDRESS_READ(hw_rtc_lr_t, HW_RTC_LR_ADDR(x)))
#define HW_RTC_LR_WR(x, v) (ADDRESS_WRITE(hw_rtc_lr_t, HW_RTC_LR_ADDR(x), v))
#define HW_RTC_LR_SET(x, v) (HW_RTC_LR_WR(x, HW_RTC_LR_RD(x) | (v)))
#define HW_RTC_LR_CLR(x, v) (HW_RTC_LR_WR(x, HW_RTC_LR_RD(x) & ~(v)))
#define HW_RTC_LR_TOG(x, v) (HW_RTC_LR_WR(x, HW_RTC_LR_RD(x) ^ (v)))
@ -900,13 +907,13 @@ typedef union _hw_rtc_lr
#define BS_RTC_LR_TCL (1U) /*!< Bit field size in bits for RTC_LR_TCL. */
/*! @brief Read current value of the RTC_LR_TCL field. */
#define BR_RTC_LR_TCL(x) (BITBAND_ACCESS32(HW_RTC_LR_ADDR(x), BP_RTC_LR_TCL))
#define BR_RTC_LR_TCL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_LR_ADDR(x), BP_RTC_LR_TCL)))
/*! @brief Format value for bitfield RTC_LR_TCL. */
#define BF_RTC_LR_TCL(v) ((uint32_t)((uint32_t)(v) << BP_RTC_LR_TCL) & BM_RTC_LR_TCL)
/*! @brief Set the TCL field to a new value. */
#define BW_RTC_LR_TCL(x, v) (BITBAND_ACCESS32(HW_RTC_LR_ADDR(x), BP_RTC_LR_TCL) = (v))
#define BW_RTC_LR_TCL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_LR_ADDR(x), BP_RTC_LR_TCL), v))
/*@}*/
/*!
@ -924,13 +931,13 @@ typedef union _hw_rtc_lr
#define BS_RTC_LR_CRL (1U) /*!< Bit field size in bits for RTC_LR_CRL. */
/*! @brief Read current value of the RTC_LR_CRL field. */
#define BR_RTC_LR_CRL(x) (BITBAND_ACCESS32(HW_RTC_LR_ADDR(x), BP_RTC_LR_CRL))
#define BR_RTC_LR_CRL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_LR_ADDR(x), BP_RTC_LR_CRL)))
/*! @brief Format value for bitfield RTC_LR_CRL. */
#define BF_RTC_LR_CRL(v) ((uint32_t)((uint32_t)(v) << BP_RTC_LR_CRL) & BM_RTC_LR_CRL)
/*! @brief Set the CRL field to a new value. */
#define BW_RTC_LR_CRL(x, v) (BITBAND_ACCESS32(HW_RTC_LR_ADDR(x), BP_RTC_LR_CRL) = (v))
#define BW_RTC_LR_CRL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_LR_ADDR(x), BP_RTC_LR_CRL), v))
/*@}*/
/*!
@ -948,13 +955,13 @@ typedef union _hw_rtc_lr
#define BS_RTC_LR_SRL (1U) /*!< Bit field size in bits for RTC_LR_SRL. */
/*! @brief Read current value of the RTC_LR_SRL field. */
#define BR_RTC_LR_SRL(x) (BITBAND_ACCESS32(HW_RTC_LR_ADDR(x), BP_RTC_LR_SRL))
#define BR_RTC_LR_SRL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_LR_ADDR(x), BP_RTC_LR_SRL)))
/*! @brief Format value for bitfield RTC_LR_SRL. */
#define BF_RTC_LR_SRL(v) ((uint32_t)((uint32_t)(v) << BP_RTC_LR_SRL) & BM_RTC_LR_SRL)
/*! @brief Set the SRL field to a new value. */
#define BW_RTC_LR_SRL(x, v) (BITBAND_ACCESS32(HW_RTC_LR_ADDR(x), BP_RTC_LR_SRL) = (v))
#define BW_RTC_LR_SRL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_LR_ADDR(x), BP_RTC_LR_SRL), v))
/*@}*/
/*!
@ -972,13 +979,13 @@ typedef union _hw_rtc_lr
#define BS_RTC_LR_LRL (1U) /*!< Bit field size in bits for RTC_LR_LRL. */
/*! @brief Read current value of the RTC_LR_LRL field. */
#define BR_RTC_LR_LRL(x) (BITBAND_ACCESS32(HW_RTC_LR_ADDR(x), BP_RTC_LR_LRL))
#define BR_RTC_LR_LRL(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_LR_ADDR(x), BP_RTC_LR_LRL)))
/*! @brief Format value for bitfield RTC_LR_LRL. */
#define BF_RTC_LR_LRL(v) ((uint32_t)((uint32_t)(v) << BP_RTC_LR_LRL) & BM_RTC_LR_LRL)
/*! @brief Set the LRL field to a new value. */
#define BW_RTC_LR_LRL(x, v) (BITBAND_ACCESS32(HW_RTC_LR_ADDR(x), BP_RTC_LR_LRL) = (v))
#define BW_RTC_LR_LRL(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_LR_ADDR(x), BP_RTC_LR_LRL), v))
/*@}*/
/*******************************************************************************
@ -1013,8 +1020,8 @@ typedef union _hw_rtc_ier
#define HW_RTC_IER_ADDR(x) ((x) + 0x1CU)
#define HW_RTC_IER(x) (*(__IO hw_rtc_ier_t *) HW_RTC_IER_ADDR(x))
#define HW_RTC_IER_RD(x) (HW_RTC_IER(x).U)
#define HW_RTC_IER_WR(x, v) (HW_RTC_IER(x).U = (v))
#define HW_RTC_IER_RD(x) (ADDRESS_READ(hw_rtc_ier_t, HW_RTC_IER_ADDR(x)))
#define HW_RTC_IER_WR(x, v) (ADDRESS_WRITE(hw_rtc_ier_t, HW_RTC_IER_ADDR(x), v))
#define HW_RTC_IER_SET(x, v) (HW_RTC_IER_WR(x, HW_RTC_IER_RD(x) | (v)))
#define HW_RTC_IER_CLR(x, v) (HW_RTC_IER_WR(x, HW_RTC_IER_RD(x) & ~(v)))
#define HW_RTC_IER_TOG(x, v) (HW_RTC_IER_WR(x, HW_RTC_IER_RD(x) ^ (v)))
@ -1037,13 +1044,13 @@ typedef union _hw_rtc_ier
#define BS_RTC_IER_TIIE (1U) /*!< Bit field size in bits for RTC_IER_TIIE. */
/*! @brief Read current value of the RTC_IER_TIIE field. */
#define BR_RTC_IER_TIIE(x) (BITBAND_ACCESS32(HW_RTC_IER_ADDR(x), BP_RTC_IER_TIIE))
#define BR_RTC_IER_TIIE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_IER_ADDR(x), BP_RTC_IER_TIIE)))
/*! @brief Format value for bitfield RTC_IER_TIIE. */
#define BF_RTC_IER_TIIE(v) ((uint32_t)((uint32_t)(v) << BP_RTC_IER_TIIE) & BM_RTC_IER_TIIE)
/*! @brief Set the TIIE field to a new value. */
#define BW_RTC_IER_TIIE(x, v) (BITBAND_ACCESS32(HW_RTC_IER_ADDR(x), BP_RTC_IER_TIIE) = (v))
#define BW_RTC_IER_TIIE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_IER_ADDR(x), BP_RTC_IER_TIIE), v))
/*@}*/
/*!
@ -1059,13 +1066,13 @@ typedef union _hw_rtc_ier
#define BS_RTC_IER_TOIE (1U) /*!< Bit field size in bits for RTC_IER_TOIE. */
/*! @brief Read current value of the RTC_IER_TOIE field. */
#define BR_RTC_IER_TOIE(x) (BITBAND_ACCESS32(HW_RTC_IER_ADDR(x), BP_RTC_IER_TOIE))
#define BR_RTC_IER_TOIE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_IER_ADDR(x), BP_RTC_IER_TOIE)))
/*! @brief Format value for bitfield RTC_IER_TOIE. */
#define BF_RTC_IER_TOIE(v) ((uint32_t)((uint32_t)(v) << BP_RTC_IER_TOIE) & BM_RTC_IER_TOIE)
/*! @brief Set the TOIE field to a new value. */
#define BW_RTC_IER_TOIE(x, v) (BITBAND_ACCESS32(HW_RTC_IER_ADDR(x), BP_RTC_IER_TOIE) = (v))
#define BW_RTC_IER_TOIE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_IER_ADDR(x), BP_RTC_IER_TOIE), v))
/*@}*/
/*!
@ -1081,13 +1088,13 @@ typedef union _hw_rtc_ier
#define BS_RTC_IER_TAIE (1U) /*!< Bit field size in bits for RTC_IER_TAIE. */
/*! @brief Read current value of the RTC_IER_TAIE field. */
#define BR_RTC_IER_TAIE(x) (BITBAND_ACCESS32(HW_RTC_IER_ADDR(x), BP_RTC_IER_TAIE))
#define BR_RTC_IER_TAIE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_IER_ADDR(x), BP_RTC_IER_TAIE)))
/*! @brief Format value for bitfield RTC_IER_TAIE. */
#define BF_RTC_IER_TAIE(v) ((uint32_t)((uint32_t)(v) << BP_RTC_IER_TAIE) & BM_RTC_IER_TAIE)
/*! @brief Set the TAIE field to a new value. */
#define BW_RTC_IER_TAIE(x, v) (BITBAND_ACCESS32(HW_RTC_IER_ADDR(x), BP_RTC_IER_TAIE) = (v))
#define BW_RTC_IER_TAIE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_IER_ADDR(x), BP_RTC_IER_TAIE), v))
/*@}*/
/*!
@ -1107,13 +1114,13 @@ typedef union _hw_rtc_ier
#define BS_RTC_IER_TSIE (1U) /*!< Bit field size in bits for RTC_IER_TSIE. */
/*! @brief Read current value of the RTC_IER_TSIE field. */
#define BR_RTC_IER_TSIE(x) (BITBAND_ACCESS32(HW_RTC_IER_ADDR(x), BP_RTC_IER_TSIE))
#define BR_RTC_IER_TSIE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_IER_ADDR(x), BP_RTC_IER_TSIE)))
/*! @brief Format value for bitfield RTC_IER_TSIE. */
#define BF_RTC_IER_TSIE(v) ((uint32_t)((uint32_t)(v) << BP_RTC_IER_TSIE) & BM_RTC_IER_TSIE)
/*! @brief Set the TSIE field to a new value. */
#define BW_RTC_IER_TSIE(x, v) (BITBAND_ACCESS32(HW_RTC_IER_ADDR(x), BP_RTC_IER_TSIE) = (v))
#define BW_RTC_IER_TSIE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_IER_ADDR(x), BP_RTC_IER_TSIE), v))
/*@}*/
/*!
@ -1132,13 +1139,13 @@ typedef union _hw_rtc_ier
#define BS_RTC_IER_WPON (1U) /*!< Bit field size in bits for RTC_IER_WPON. */
/*! @brief Read current value of the RTC_IER_WPON field. */
#define BR_RTC_IER_WPON(x) (BITBAND_ACCESS32(HW_RTC_IER_ADDR(x), BP_RTC_IER_WPON))
#define BR_RTC_IER_WPON(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_IER_ADDR(x), BP_RTC_IER_WPON)))
/*! @brief Format value for bitfield RTC_IER_WPON. */
#define BF_RTC_IER_WPON(v) ((uint32_t)((uint32_t)(v) << BP_RTC_IER_WPON) & BM_RTC_IER_WPON)
/*! @brief Set the WPON field to a new value. */
#define BW_RTC_IER_WPON(x, v) (BITBAND_ACCESS32(HW_RTC_IER_ADDR(x), BP_RTC_IER_WPON) = (v))
#define BW_RTC_IER_WPON(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_IER_ADDR(x), BP_RTC_IER_WPON), v))
/*@}*/
/*******************************************************************************
@ -1174,8 +1181,8 @@ typedef union _hw_rtc_war
#define HW_RTC_WAR_ADDR(x) ((x) + 0x800U)
#define HW_RTC_WAR(x) (*(__IO hw_rtc_war_t *) HW_RTC_WAR_ADDR(x))
#define HW_RTC_WAR_RD(x) (HW_RTC_WAR(x).U)
#define HW_RTC_WAR_WR(x, v) (HW_RTC_WAR(x).U = (v))
#define HW_RTC_WAR_RD(x) (ADDRESS_READ(hw_rtc_war_t, HW_RTC_WAR_ADDR(x)))
#define HW_RTC_WAR_WR(x, v) (ADDRESS_WRITE(hw_rtc_war_t, HW_RTC_WAR_ADDR(x), v))
#define HW_RTC_WAR_SET(x, v) (HW_RTC_WAR_WR(x, HW_RTC_WAR_RD(x) | (v)))
#define HW_RTC_WAR_CLR(x, v) (HW_RTC_WAR_WR(x, HW_RTC_WAR_RD(x) & ~(v)))
#define HW_RTC_WAR_TOG(x, v) (HW_RTC_WAR_WR(x, HW_RTC_WAR_RD(x) ^ (v)))
@ -1201,13 +1208,13 @@ typedef union _hw_rtc_war
#define BS_RTC_WAR_TSRW (1U) /*!< Bit field size in bits for RTC_WAR_TSRW. */
/*! @brief Read current value of the RTC_WAR_TSRW field. */
#define BR_RTC_WAR_TSRW(x) (BITBAND_ACCESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_TSRW))
#define BR_RTC_WAR_TSRW(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_TSRW)))
/*! @brief Format value for bitfield RTC_WAR_TSRW. */
#define BF_RTC_WAR_TSRW(v) ((uint32_t)((uint32_t)(v) << BP_RTC_WAR_TSRW) & BM_RTC_WAR_TSRW)
/*! @brief Set the TSRW field to a new value. */
#define BW_RTC_WAR_TSRW(x, v) (BITBAND_ACCESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_TSRW) = (v))
#define BW_RTC_WAR_TSRW(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_TSRW), v))
/*@}*/
/*!
@ -1226,13 +1233,13 @@ typedef union _hw_rtc_war
#define BS_RTC_WAR_TPRW (1U) /*!< Bit field size in bits for RTC_WAR_TPRW. */
/*! @brief Read current value of the RTC_WAR_TPRW field. */
#define BR_RTC_WAR_TPRW(x) (BITBAND_ACCESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_TPRW))
#define BR_RTC_WAR_TPRW(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_TPRW)))
/*! @brief Format value for bitfield RTC_WAR_TPRW. */
#define BF_RTC_WAR_TPRW(v) ((uint32_t)((uint32_t)(v) << BP_RTC_WAR_TPRW) & BM_RTC_WAR_TPRW)
/*! @brief Set the TPRW field to a new value. */
#define BW_RTC_WAR_TPRW(x, v) (BITBAND_ACCESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_TPRW) = (v))
#define BW_RTC_WAR_TPRW(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_TPRW), v))
/*@}*/
/*!
@ -1251,13 +1258,13 @@ typedef union _hw_rtc_war
#define BS_RTC_WAR_TARW (1U) /*!< Bit field size in bits for RTC_WAR_TARW. */
/*! @brief Read current value of the RTC_WAR_TARW field. */
#define BR_RTC_WAR_TARW(x) (BITBAND_ACCESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_TARW))
#define BR_RTC_WAR_TARW(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_TARW)))
/*! @brief Format value for bitfield RTC_WAR_TARW. */
#define BF_RTC_WAR_TARW(v) ((uint32_t)((uint32_t)(v) << BP_RTC_WAR_TARW) & BM_RTC_WAR_TARW)
/*! @brief Set the TARW field to a new value. */
#define BW_RTC_WAR_TARW(x, v) (BITBAND_ACCESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_TARW) = (v))
#define BW_RTC_WAR_TARW(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_TARW), v))
/*@}*/
/*!
@ -1276,13 +1283,13 @@ typedef union _hw_rtc_war
#define BS_RTC_WAR_TCRW (1U) /*!< Bit field size in bits for RTC_WAR_TCRW. */
/*! @brief Read current value of the RTC_WAR_TCRW field. */
#define BR_RTC_WAR_TCRW(x) (BITBAND_ACCESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_TCRW))
#define BR_RTC_WAR_TCRW(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_TCRW)))
/*! @brief Format value for bitfield RTC_WAR_TCRW. */
#define BF_RTC_WAR_TCRW(v) ((uint32_t)((uint32_t)(v) << BP_RTC_WAR_TCRW) & BM_RTC_WAR_TCRW)
/*! @brief Set the TCRW field to a new value. */
#define BW_RTC_WAR_TCRW(x, v) (BITBAND_ACCESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_TCRW) = (v))
#define BW_RTC_WAR_TCRW(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_TCRW), v))
/*@}*/
/*!
@ -1301,13 +1308,13 @@ typedef union _hw_rtc_war
#define BS_RTC_WAR_CRW (1U) /*!< Bit field size in bits for RTC_WAR_CRW. */
/*! @brief Read current value of the RTC_WAR_CRW field. */
#define BR_RTC_WAR_CRW(x) (BITBAND_ACCESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_CRW))
#define BR_RTC_WAR_CRW(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_CRW)))
/*! @brief Format value for bitfield RTC_WAR_CRW. */
#define BF_RTC_WAR_CRW(v) ((uint32_t)((uint32_t)(v) << BP_RTC_WAR_CRW) & BM_RTC_WAR_CRW)
/*! @brief Set the CRW field to a new value. */
#define BW_RTC_WAR_CRW(x, v) (BITBAND_ACCESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_CRW) = (v))
#define BW_RTC_WAR_CRW(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_CRW), v))
/*@}*/
/*!
@ -1326,13 +1333,13 @@ typedef union _hw_rtc_war
#define BS_RTC_WAR_SRW (1U) /*!< Bit field size in bits for RTC_WAR_SRW. */
/*! @brief Read current value of the RTC_WAR_SRW field. */
#define BR_RTC_WAR_SRW(x) (BITBAND_ACCESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_SRW))
#define BR_RTC_WAR_SRW(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_SRW)))
/*! @brief Format value for bitfield RTC_WAR_SRW. */
#define BF_RTC_WAR_SRW(v) ((uint32_t)((uint32_t)(v) << BP_RTC_WAR_SRW) & BM_RTC_WAR_SRW)
/*! @brief Set the SRW field to a new value. */
#define BW_RTC_WAR_SRW(x, v) (BITBAND_ACCESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_SRW) = (v))
#define BW_RTC_WAR_SRW(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_SRW), v))
/*@}*/
/*!
@ -1351,13 +1358,13 @@ typedef union _hw_rtc_war
#define BS_RTC_WAR_LRW (1U) /*!< Bit field size in bits for RTC_WAR_LRW. */
/*! @brief Read current value of the RTC_WAR_LRW field. */
#define BR_RTC_WAR_LRW(x) (BITBAND_ACCESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_LRW))
#define BR_RTC_WAR_LRW(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_LRW)))
/*! @brief Format value for bitfield RTC_WAR_LRW. */
#define BF_RTC_WAR_LRW(v) ((uint32_t)((uint32_t)(v) << BP_RTC_WAR_LRW) & BM_RTC_WAR_LRW)
/*! @brief Set the LRW field to a new value. */
#define BW_RTC_WAR_LRW(x, v) (BITBAND_ACCESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_LRW) = (v))
#define BW_RTC_WAR_LRW(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_LRW), v))
/*@}*/
/*!
@ -1376,13 +1383,13 @@ typedef union _hw_rtc_war
#define BS_RTC_WAR_IERW (1U) /*!< Bit field size in bits for RTC_WAR_IERW. */
/*! @brief Read current value of the RTC_WAR_IERW field. */
#define BR_RTC_WAR_IERW(x) (BITBAND_ACCESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_IERW))
#define BR_RTC_WAR_IERW(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_IERW)))
/*! @brief Format value for bitfield RTC_WAR_IERW. */
#define BF_RTC_WAR_IERW(v) ((uint32_t)((uint32_t)(v) << BP_RTC_WAR_IERW) & BM_RTC_WAR_IERW)
/*! @brief Set the IERW field to a new value. */
#define BW_RTC_WAR_IERW(x, v) (BITBAND_ACCESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_IERW) = (v))
#define BW_RTC_WAR_IERW(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_WAR_ADDR(x), BP_RTC_WAR_IERW), v))
/*@}*/
/*******************************************************************************
@ -1418,8 +1425,8 @@ typedef union _hw_rtc_rar
#define HW_RTC_RAR_ADDR(x) ((x) + 0x804U)
#define HW_RTC_RAR(x) (*(__IO hw_rtc_rar_t *) HW_RTC_RAR_ADDR(x))
#define HW_RTC_RAR_RD(x) (HW_RTC_RAR(x).U)
#define HW_RTC_RAR_WR(x, v) (HW_RTC_RAR(x).U = (v))
#define HW_RTC_RAR_RD(x) (ADDRESS_READ(hw_rtc_rar_t, HW_RTC_RAR_ADDR(x)))
#define HW_RTC_RAR_WR(x, v) (ADDRESS_WRITE(hw_rtc_rar_t, HW_RTC_RAR_ADDR(x), v))
#define HW_RTC_RAR_SET(x, v) (HW_RTC_RAR_WR(x, HW_RTC_RAR_RD(x) | (v)))
#define HW_RTC_RAR_CLR(x, v) (HW_RTC_RAR_WR(x, HW_RTC_RAR_RD(x) & ~(v)))
#define HW_RTC_RAR_TOG(x, v) (HW_RTC_RAR_WR(x, HW_RTC_RAR_RD(x) ^ (v)))
@ -1445,13 +1452,13 @@ typedef union _hw_rtc_rar
#define BS_RTC_RAR_TSRR (1U) /*!< Bit field size in bits for RTC_RAR_TSRR. */
/*! @brief Read current value of the RTC_RAR_TSRR field. */
#define BR_RTC_RAR_TSRR(x) (BITBAND_ACCESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_TSRR))
#define BR_RTC_RAR_TSRR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_TSRR)))
/*! @brief Format value for bitfield RTC_RAR_TSRR. */
#define BF_RTC_RAR_TSRR(v) ((uint32_t)((uint32_t)(v) << BP_RTC_RAR_TSRR) & BM_RTC_RAR_TSRR)
/*! @brief Set the TSRR field to a new value. */
#define BW_RTC_RAR_TSRR(x, v) (BITBAND_ACCESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_TSRR) = (v))
#define BW_RTC_RAR_TSRR(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_TSRR), v))
/*@}*/
/*!
@ -1470,13 +1477,13 @@ typedef union _hw_rtc_rar
#define BS_RTC_RAR_TPRR (1U) /*!< Bit field size in bits for RTC_RAR_TPRR. */
/*! @brief Read current value of the RTC_RAR_TPRR field. */
#define BR_RTC_RAR_TPRR(x) (BITBAND_ACCESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_TPRR))
#define BR_RTC_RAR_TPRR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_TPRR)))
/*! @brief Format value for bitfield RTC_RAR_TPRR. */
#define BF_RTC_RAR_TPRR(v) ((uint32_t)((uint32_t)(v) << BP_RTC_RAR_TPRR) & BM_RTC_RAR_TPRR)
/*! @brief Set the TPRR field to a new value. */
#define BW_RTC_RAR_TPRR(x, v) (BITBAND_ACCESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_TPRR) = (v))
#define BW_RTC_RAR_TPRR(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_TPRR), v))
/*@}*/
/*!
@ -1495,13 +1502,13 @@ typedef union _hw_rtc_rar
#define BS_RTC_RAR_TARR (1U) /*!< Bit field size in bits for RTC_RAR_TARR. */
/*! @brief Read current value of the RTC_RAR_TARR field. */
#define BR_RTC_RAR_TARR(x) (BITBAND_ACCESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_TARR))
#define BR_RTC_RAR_TARR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_TARR)))
/*! @brief Format value for bitfield RTC_RAR_TARR. */
#define BF_RTC_RAR_TARR(v) ((uint32_t)((uint32_t)(v) << BP_RTC_RAR_TARR) & BM_RTC_RAR_TARR)
/*! @brief Set the TARR field to a new value. */
#define BW_RTC_RAR_TARR(x, v) (BITBAND_ACCESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_TARR) = (v))
#define BW_RTC_RAR_TARR(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_TARR), v))
/*@}*/
/*!
@ -1520,13 +1527,13 @@ typedef union _hw_rtc_rar
#define BS_RTC_RAR_TCRR (1U) /*!< Bit field size in bits for RTC_RAR_TCRR. */
/*! @brief Read current value of the RTC_RAR_TCRR field. */
#define BR_RTC_RAR_TCRR(x) (BITBAND_ACCESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_TCRR))
#define BR_RTC_RAR_TCRR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_TCRR)))
/*! @brief Format value for bitfield RTC_RAR_TCRR. */
#define BF_RTC_RAR_TCRR(v) ((uint32_t)((uint32_t)(v) << BP_RTC_RAR_TCRR) & BM_RTC_RAR_TCRR)
/*! @brief Set the TCRR field to a new value. */
#define BW_RTC_RAR_TCRR(x, v) (BITBAND_ACCESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_TCRR) = (v))
#define BW_RTC_RAR_TCRR(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_TCRR), v))
/*@}*/
/*!
@ -1545,13 +1552,13 @@ typedef union _hw_rtc_rar
#define BS_RTC_RAR_CRR (1U) /*!< Bit field size in bits for RTC_RAR_CRR. */
/*! @brief Read current value of the RTC_RAR_CRR field. */
#define BR_RTC_RAR_CRR(x) (BITBAND_ACCESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_CRR))
#define BR_RTC_RAR_CRR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_CRR)))
/*! @brief Format value for bitfield RTC_RAR_CRR. */
#define BF_RTC_RAR_CRR(v) ((uint32_t)((uint32_t)(v) << BP_RTC_RAR_CRR) & BM_RTC_RAR_CRR)
/*! @brief Set the CRR field to a new value. */
#define BW_RTC_RAR_CRR(x, v) (BITBAND_ACCESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_CRR) = (v))
#define BW_RTC_RAR_CRR(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_CRR), v))
/*@}*/
/*!
@ -1570,13 +1577,13 @@ typedef union _hw_rtc_rar
#define BS_RTC_RAR_SRR (1U) /*!< Bit field size in bits for RTC_RAR_SRR. */
/*! @brief Read current value of the RTC_RAR_SRR field. */
#define BR_RTC_RAR_SRR(x) (BITBAND_ACCESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_SRR))
#define BR_RTC_RAR_SRR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_SRR)))
/*! @brief Format value for bitfield RTC_RAR_SRR. */
#define BF_RTC_RAR_SRR(v) ((uint32_t)((uint32_t)(v) << BP_RTC_RAR_SRR) & BM_RTC_RAR_SRR)
/*! @brief Set the SRR field to a new value. */
#define BW_RTC_RAR_SRR(x, v) (BITBAND_ACCESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_SRR) = (v))
#define BW_RTC_RAR_SRR(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_SRR), v))
/*@}*/
/*!
@ -1595,13 +1602,13 @@ typedef union _hw_rtc_rar
#define BS_RTC_RAR_LRR (1U) /*!< Bit field size in bits for RTC_RAR_LRR. */
/*! @brief Read current value of the RTC_RAR_LRR field. */
#define BR_RTC_RAR_LRR(x) (BITBAND_ACCESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_LRR))
#define BR_RTC_RAR_LRR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_LRR)))
/*! @brief Format value for bitfield RTC_RAR_LRR. */
#define BF_RTC_RAR_LRR(v) ((uint32_t)((uint32_t)(v) << BP_RTC_RAR_LRR) & BM_RTC_RAR_LRR)
/*! @brief Set the LRR field to a new value. */
#define BW_RTC_RAR_LRR(x, v) (BITBAND_ACCESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_LRR) = (v))
#define BW_RTC_RAR_LRR(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_LRR), v))
/*@}*/
/*!
@ -1620,13 +1627,13 @@ typedef union _hw_rtc_rar
#define BS_RTC_RAR_IERR (1U) /*!< Bit field size in bits for RTC_RAR_IERR. */
/*! @brief Read current value of the RTC_RAR_IERR field. */
#define BR_RTC_RAR_IERR(x) (BITBAND_ACCESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_IERR))
#define BR_RTC_RAR_IERR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_IERR)))
/*! @brief Format value for bitfield RTC_RAR_IERR. */
#define BF_RTC_RAR_IERR(v) ((uint32_t)((uint32_t)(v) << BP_RTC_RAR_IERR) & BM_RTC_RAR_IERR)
/*! @brief Set the IERR field to a new value. */
#define BW_RTC_RAR_IERR(x, v) (BITBAND_ACCESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_IERR) = (v))
#define BW_RTC_RAR_IERR(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_RTC_RAR_ADDR(x), BP_RTC_RAR_IERR), v))
/*@}*/
/*******************************************************************************

559
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_sdhc.h
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475
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_sim.h
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51
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_smc.h
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@ -15,6 +15,9 @@
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** (C) COPYRIGHT 2015-2015 ARM Limited
** ALL RIGHTS RESERVED
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
@ -68,6 +71,10 @@
** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
** Update of SystemInit() and SystemCoreClockUpdate() functions.
** Module access macro module_BASES replaced by module_BASE_PTRS.
** - rev. 2.6 (2015-08-03) (ARM)
** All accesses to memory are replaced by equivalent macros; this allows
** memory read/write operations to be re-defined if needed (for example,
** to implement new security features
**
** ###################################################################
*/
@ -142,8 +149,8 @@ typedef union _hw_smc_pmprot
#define HW_SMC_PMPROT_ADDR(x) ((x) + 0x0U)
#define HW_SMC_PMPROT(x) (*(__IO hw_smc_pmprot_t *) HW_SMC_PMPROT_ADDR(x))
#define HW_SMC_PMPROT_RD(x) (HW_SMC_PMPROT(x).U)
#define HW_SMC_PMPROT_WR(x, v) (HW_SMC_PMPROT(x).U = (v))
#define HW_SMC_PMPROT_RD(x) (ADDRESS_READ(hw_smc_pmprot_t, HW_SMC_PMPROT_ADDR(x)))
#define HW_SMC_PMPROT_WR(x, v) (ADDRESS_WRITE(hw_smc_pmprot_t, HW_SMC_PMPROT_ADDR(x), v))
#define HW_SMC_PMPROT_SET(x, v) (HW_SMC_PMPROT_WR(x, HW_SMC_PMPROT_RD(x) | (v)))
#define HW_SMC_PMPROT_CLR(x, v) (HW_SMC_PMPROT_WR(x, HW_SMC_PMPROT_RD(x) & ~(v)))
#define HW_SMC_PMPROT_TOG(x, v) (HW_SMC_PMPROT_WR(x, HW_SMC_PMPROT_RD(x) ^ (v)))
@ -169,13 +176,13 @@ typedef union _hw_smc_pmprot
#define BS_SMC_PMPROT_AVLLS (1U) /*!< Bit field size in bits for SMC_PMPROT_AVLLS. */
/*! @brief Read current value of the SMC_PMPROT_AVLLS field. */
#define BR_SMC_PMPROT_AVLLS(x) (BITBAND_ACCESS8(HW_SMC_PMPROT_ADDR(x), BP_SMC_PMPROT_AVLLS))
#define BR_SMC_PMPROT_AVLLS(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_SMC_PMPROT_ADDR(x), BP_SMC_PMPROT_AVLLS)))
/*! @brief Format value for bitfield SMC_PMPROT_AVLLS. */
#define BF_SMC_PMPROT_AVLLS(v) ((uint8_t)((uint8_t)(v) << BP_SMC_PMPROT_AVLLS) & BM_SMC_PMPROT_AVLLS)
/*! @brief Set the AVLLS field to a new value. */
#define BW_SMC_PMPROT_AVLLS(x, v) (BITBAND_ACCESS8(HW_SMC_PMPROT_ADDR(x), BP_SMC_PMPROT_AVLLS) = (v))
#define BW_SMC_PMPROT_AVLLS(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_SMC_PMPROT_ADDR(x), BP_SMC_PMPROT_AVLLS), v))
/*@}*/
/*!
@ -194,13 +201,13 @@ typedef union _hw_smc_pmprot
#define BS_SMC_PMPROT_ALLS (1U) /*!< Bit field size in bits for SMC_PMPROT_ALLS. */
/*! @brief Read current value of the SMC_PMPROT_ALLS field. */
#define BR_SMC_PMPROT_ALLS(x) (BITBAND_ACCESS8(HW_SMC_PMPROT_ADDR(x), BP_SMC_PMPROT_ALLS))
#define BR_SMC_PMPROT_ALLS(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_SMC_PMPROT_ADDR(x), BP_SMC_PMPROT_ALLS)))
/*! @brief Format value for bitfield SMC_PMPROT_ALLS. */
#define BF_SMC_PMPROT_ALLS(v) ((uint8_t)((uint8_t)(v) << BP_SMC_PMPROT_ALLS) & BM_SMC_PMPROT_ALLS)
/*! @brief Set the ALLS field to a new value. */
#define BW_SMC_PMPROT_ALLS(x, v) (BITBAND_ACCESS8(HW_SMC_PMPROT_ADDR(x), BP_SMC_PMPROT_ALLS) = (v))
#define BW_SMC_PMPROT_ALLS(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_SMC_PMPROT_ADDR(x), BP_SMC_PMPROT_ALLS), v))
/*@}*/
/*!
@ -219,13 +226,13 @@ typedef union _hw_smc_pmprot
#define BS_SMC_PMPROT_AVLP (1U) /*!< Bit field size in bits for SMC_PMPROT_AVLP. */
/*! @brief Read current value of the SMC_PMPROT_AVLP field. */
#define BR_SMC_PMPROT_AVLP(x) (BITBAND_ACCESS8(HW_SMC_PMPROT_ADDR(x), BP_SMC_PMPROT_AVLP))
#define BR_SMC_PMPROT_AVLP(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_SMC_PMPROT_ADDR(x), BP_SMC_PMPROT_AVLP)))
/*! @brief Format value for bitfield SMC_PMPROT_AVLP. */
#define BF_SMC_PMPROT_AVLP(v) ((uint8_t)((uint8_t)(v) << BP_SMC_PMPROT_AVLP) & BM_SMC_PMPROT_AVLP)
/*! @brief Set the AVLP field to a new value. */
#define BW_SMC_PMPROT_AVLP(x, v) (BITBAND_ACCESS8(HW_SMC_PMPROT_ADDR(x), BP_SMC_PMPROT_AVLP) = (v))
#define BW_SMC_PMPROT_AVLP(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_SMC_PMPROT_ADDR(x), BP_SMC_PMPROT_AVLP), v))
/*@}*/
/*******************************************************************************
@ -264,8 +271,8 @@ typedef union _hw_smc_pmctrl
#define HW_SMC_PMCTRL_ADDR(x) ((x) + 0x1U)
#define HW_SMC_PMCTRL(x) (*(__IO hw_smc_pmctrl_t *) HW_SMC_PMCTRL_ADDR(x))
#define HW_SMC_PMCTRL_RD(x) (HW_SMC_PMCTRL(x).U)
#define HW_SMC_PMCTRL_WR(x, v) (HW_SMC_PMCTRL(x).U = (v))
#define HW_SMC_PMCTRL_RD(x) (ADDRESS_READ(hw_smc_pmctrl_t, HW_SMC_PMCTRL_ADDR(x)))
#define HW_SMC_PMCTRL_WR(x, v) (ADDRESS_WRITE(hw_smc_pmctrl_t, HW_SMC_PMCTRL_ADDR(x), v))
#define HW_SMC_PMCTRL_SET(x, v) (HW_SMC_PMCTRL_WR(x, HW_SMC_PMCTRL_RD(x) | (v)))
#define HW_SMC_PMCTRL_CLR(x, v) (HW_SMC_PMCTRL_WR(x, HW_SMC_PMCTRL_RD(x) & ~(v)))
#define HW_SMC_PMCTRL_TOG(x, v) (HW_SMC_PMCTRL_WR(x, HW_SMC_PMCTRL_RD(x) ^ (v)))
@ -302,7 +309,7 @@ typedef union _hw_smc_pmctrl
#define BS_SMC_PMCTRL_STOPM (3U) /*!< Bit field size in bits for SMC_PMCTRL_STOPM. */
/*! @brief Read current value of the SMC_PMCTRL_STOPM field. */
#define BR_SMC_PMCTRL_STOPM(x) (HW_SMC_PMCTRL(x).B.STOPM)
#define BR_SMC_PMCTRL_STOPM(x) (UNION_READ(hw_smc_pmctrl_t, HW_SMC_PMCTRL_ADDR(x), U, B.STOPM))
/*! @brief Format value for bitfield SMC_PMCTRL_STOPM. */
#define BF_SMC_PMCTRL_STOPM(v) ((uint8_t)((uint8_t)(v) << BP_SMC_PMCTRL_STOPM) & BM_SMC_PMCTRL_STOPM)
@ -329,7 +336,7 @@ typedef union _hw_smc_pmctrl
#define BS_SMC_PMCTRL_STOPA (1U) /*!< Bit field size in bits for SMC_PMCTRL_STOPA. */
/*! @brief Read current value of the SMC_PMCTRL_STOPA field. */
#define BR_SMC_PMCTRL_STOPA(x) (BITBAND_ACCESS8(HW_SMC_PMCTRL_ADDR(x), BP_SMC_PMCTRL_STOPA))
#define BR_SMC_PMCTRL_STOPA(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_SMC_PMCTRL_ADDR(x), BP_SMC_PMCTRL_STOPA)))
/*@}*/
/*!
@ -352,7 +359,7 @@ typedef union _hw_smc_pmctrl
#define BS_SMC_PMCTRL_RUNM (2U) /*!< Bit field size in bits for SMC_PMCTRL_RUNM. */
/*! @brief Read current value of the SMC_PMCTRL_RUNM field. */
#define BR_SMC_PMCTRL_RUNM(x) (HW_SMC_PMCTRL(x).B.RUNM)
#define BR_SMC_PMCTRL_RUNM(x) (UNION_READ(hw_smc_pmctrl_t, HW_SMC_PMCTRL_ADDR(x), U, B.RUNM))
/*! @brief Format value for bitfield SMC_PMCTRL_RUNM. */
#define BF_SMC_PMCTRL_RUNM(v) ((uint8_t)((uint8_t)(v) << BP_SMC_PMCTRL_RUNM) & BM_SMC_PMCTRL_RUNM)
@ -380,13 +387,13 @@ typedef union _hw_smc_pmctrl
#define BS_SMC_PMCTRL_LPWUI (1U) /*!< Bit field size in bits for SMC_PMCTRL_LPWUI. */
/*! @brief Read current value of the SMC_PMCTRL_LPWUI field. */
#define BR_SMC_PMCTRL_LPWUI(x) (BITBAND_ACCESS8(HW_SMC_PMCTRL_ADDR(x), BP_SMC_PMCTRL_LPWUI))
#define BR_SMC_PMCTRL_LPWUI(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_SMC_PMCTRL_ADDR(x), BP_SMC_PMCTRL_LPWUI)))
/*! @brief Format value for bitfield SMC_PMCTRL_LPWUI. */
#define BF_SMC_PMCTRL_LPWUI(v) ((uint8_t)((uint8_t)(v) << BP_SMC_PMCTRL_LPWUI) & BM_SMC_PMCTRL_LPWUI)
/*! @brief Set the LPWUI field to a new value. */
#define BW_SMC_PMCTRL_LPWUI(x, v) (BITBAND_ACCESS8(HW_SMC_PMCTRL_ADDR(x), BP_SMC_PMCTRL_LPWUI) = (v))
#define BW_SMC_PMCTRL_LPWUI(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_SMC_PMCTRL_ADDR(x), BP_SMC_PMCTRL_LPWUI), v))
/*@}*/
/*******************************************************************************
@ -422,8 +429,8 @@ typedef union _hw_smc_vllsctrl
#define HW_SMC_VLLSCTRL_ADDR(x) ((x) + 0x2U)
#define HW_SMC_VLLSCTRL(x) (*(__IO hw_smc_vllsctrl_t *) HW_SMC_VLLSCTRL_ADDR(x))
#define HW_SMC_VLLSCTRL_RD(x) (HW_SMC_VLLSCTRL(x).U)
#define HW_SMC_VLLSCTRL_WR(x, v) (HW_SMC_VLLSCTRL(x).U = (v))
#define HW_SMC_VLLSCTRL_RD(x) (ADDRESS_READ(hw_smc_vllsctrl_t, HW_SMC_VLLSCTRL_ADDR(x)))
#define HW_SMC_VLLSCTRL_WR(x, v) (ADDRESS_WRITE(hw_smc_vllsctrl_t, HW_SMC_VLLSCTRL_ADDR(x), v))
#define HW_SMC_VLLSCTRL_SET(x, v) (HW_SMC_VLLSCTRL_WR(x, HW_SMC_VLLSCTRL_RD(x) | (v)))
#define HW_SMC_VLLSCTRL_CLR(x, v) (HW_SMC_VLLSCTRL_WR(x, HW_SMC_VLLSCTRL_RD(x) & ~(v)))
#define HW_SMC_VLLSCTRL_TOG(x, v) (HW_SMC_VLLSCTRL_WR(x, HW_SMC_VLLSCTRL_RD(x) ^ (v)))
@ -454,7 +461,7 @@ typedef union _hw_smc_vllsctrl
#define BS_SMC_VLLSCTRL_VLLSM (3U) /*!< Bit field size in bits for SMC_VLLSCTRL_VLLSM. */
/*! @brief Read current value of the SMC_VLLSCTRL_VLLSM field. */
#define BR_SMC_VLLSCTRL_VLLSM(x) (HW_SMC_VLLSCTRL(x).B.VLLSM)
#define BR_SMC_VLLSCTRL_VLLSM(x) (UNION_READ(hw_smc_vllsctrl_t, HW_SMC_VLLSCTRL_ADDR(x), U, B.VLLSM))
/*! @brief Format value for bitfield SMC_VLLSCTRL_VLLSM. */
#define BF_SMC_VLLSCTRL_VLLSM(v) ((uint8_t)((uint8_t)(v) << BP_SMC_VLLSCTRL_VLLSM) & BM_SMC_VLLSCTRL_VLLSM)
@ -479,13 +486,13 @@ typedef union _hw_smc_vllsctrl
#define BS_SMC_VLLSCTRL_PORPO (1U) /*!< Bit field size in bits for SMC_VLLSCTRL_PORPO. */
/*! @brief Read current value of the SMC_VLLSCTRL_PORPO field. */
#define BR_SMC_VLLSCTRL_PORPO(x) (BITBAND_ACCESS8(HW_SMC_VLLSCTRL_ADDR(x), BP_SMC_VLLSCTRL_PORPO))
#define BR_SMC_VLLSCTRL_PORPO(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_SMC_VLLSCTRL_ADDR(x), BP_SMC_VLLSCTRL_PORPO)))
/*! @brief Format value for bitfield SMC_VLLSCTRL_PORPO. */
#define BF_SMC_VLLSCTRL_PORPO(v) ((uint8_t)((uint8_t)(v) << BP_SMC_VLLSCTRL_PORPO) & BM_SMC_VLLSCTRL_PORPO)
/*! @brief Set the PORPO field to a new value. */
#define BW_SMC_VLLSCTRL_PORPO(x, v) (BITBAND_ACCESS8(HW_SMC_VLLSCTRL_ADDR(x), BP_SMC_VLLSCTRL_PORPO) = (v))
#define BW_SMC_VLLSCTRL_PORPO(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_SMC_VLLSCTRL_ADDR(x), BP_SMC_VLLSCTRL_PORPO), v))
/*@}*/
/*******************************************************************************
@ -519,7 +526,7 @@ typedef union _hw_smc_pmstat
#define HW_SMC_PMSTAT_ADDR(x) ((x) + 0x3U)
#define HW_SMC_PMSTAT(x) (*(__I hw_smc_pmstat_t *) HW_SMC_PMSTAT_ADDR(x))
#define HW_SMC_PMSTAT_RD(x) (HW_SMC_PMSTAT(x).U)
#define HW_SMC_PMSTAT_RD(x) (ADDRESS_READ(hw_smc_pmstat_t, HW_SMC_PMSTAT_ADDR(x)))
/*@}*/
/*
@ -537,7 +544,7 @@ typedef union _hw_smc_pmstat
#define BS_SMC_PMSTAT_PMSTAT (7U) /*!< Bit field size in bits for SMC_PMSTAT_PMSTAT. */
/*! @brief Read current value of the SMC_PMSTAT_PMSTAT field. */
#define BR_SMC_PMSTAT_PMSTAT(x) (HW_SMC_PMSTAT(x).B.PMSTAT)
#define BR_SMC_PMSTAT_PMSTAT(x) (UNION_READ(hw_smc_pmstat_t, HW_SMC_PMSTAT_ADDR(x), U, B.PMSTAT))
/*@}*/
/*******************************************************************************

235
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_spi.h
View File

@ -15,6 +15,9 @@
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** (C) COPYRIGHT 2015-2015 ARM Limited
** ALL RIGHTS RESERVED
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
@ -68,6 +71,10 @@
** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
** Update of SystemInit() and SystemCoreClockUpdate() functions.
** Module access macro module_BASES replaced by module_BASE_PTRS.
** - rev. 2.6 (2015-08-03) (ARM)
** All accesses to memory are replaced by equivalent macros; this allows
** memory read/write operations to be re-defined if needed (for example,
** to implement new security features
**
** ###################################################################
*/
@ -157,8 +164,8 @@ typedef union _hw_spi_mcr
#define HW_SPI_MCR_ADDR(x) ((x) + 0x0U)
#define HW_SPI_MCR(x) (*(__IO hw_spi_mcr_t *) HW_SPI_MCR_ADDR(x))
#define HW_SPI_MCR_RD(x) (HW_SPI_MCR(x).U)
#define HW_SPI_MCR_WR(x, v) (HW_SPI_MCR(x).U = (v))
#define HW_SPI_MCR_RD(x) (ADDRESS_READ(hw_spi_mcr_t, HW_SPI_MCR_ADDR(x)))
#define HW_SPI_MCR_WR(x, v) (ADDRESS_WRITE(hw_spi_mcr_t, HW_SPI_MCR_ADDR(x), v))
#define HW_SPI_MCR_SET(x, v) (HW_SPI_MCR_WR(x, HW_SPI_MCR_RD(x) | (v)))
#define HW_SPI_MCR_CLR(x, v) (HW_SPI_MCR_WR(x, HW_SPI_MCR_RD(x) & ~(v)))
#define HW_SPI_MCR_TOG(x, v) (HW_SPI_MCR_WR(x, HW_SPI_MCR_RD(x) ^ (v)))
@ -184,13 +191,13 @@ typedef union _hw_spi_mcr
#define BS_SPI_MCR_HALT (1U) /*!< Bit field size in bits for SPI_MCR_HALT. */
/*! @brief Read current value of the SPI_MCR_HALT field. */
#define BR_SPI_MCR_HALT(x) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_HALT))
#define BR_SPI_MCR_HALT(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_HALT)))
/*! @brief Format value for bitfield SPI_MCR_HALT. */
#define BF_SPI_MCR_HALT(v) ((uint32_t)((uint32_t)(v) << BP_SPI_MCR_HALT) & BM_SPI_MCR_HALT)
/*! @brief Set the HALT field to a new value. */
#define BW_SPI_MCR_HALT(x, v) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_HALT) = (v))
#define BW_SPI_MCR_HALT(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_HALT), v))
/*@}*/
/*!
@ -211,7 +218,7 @@ typedef union _hw_spi_mcr
#define BS_SPI_MCR_SMPL_PT (2U) /*!< Bit field size in bits for SPI_MCR_SMPL_PT. */
/*! @brief Read current value of the SPI_MCR_SMPL_PT field. */
#define BR_SPI_MCR_SMPL_PT(x) (HW_SPI_MCR(x).B.SMPL_PT)
#define BR_SPI_MCR_SMPL_PT(x) (UNION_READ(hw_spi_mcr_t, HW_SPI_MCR_ADDR(x), U, B.SMPL_PT))
/*! @brief Format value for bitfield SPI_MCR_SMPL_PT. */
#define BF_SPI_MCR_SMPL_PT(v) ((uint32_t)((uint32_t)(v) << BP_SPI_MCR_SMPL_PT) & BM_SPI_MCR_SMPL_PT)
@ -239,7 +246,7 @@ typedef union _hw_spi_mcr
#define BF_SPI_MCR_CLR_RXF(v) ((uint32_t)((uint32_t)(v) << BP_SPI_MCR_CLR_RXF) & BM_SPI_MCR_CLR_RXF)
/*! @brief Set the CLR_RXF field to a new value. */
#define BW_SPI_MCR_CLR_RXF(x, v) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_CLR_RXF) = (v))
#define BW_SPI_MCR_CLR_RXF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_CLR_RXF), v))
/*@}*/
/*!
@ -261,7 +268,7 @@ typedef union _hw_spi_mcr
#define BF_SPI_MCR_CLR_TXF(v) ((uint32_t)((uint32_t)(v) << BP_SPI_MCR_CLR_TXF) & BM_SPI_MCR_CLR_TXF)
/*! @brief Set the CLR_TXF field to a new value. */
#define BW_SPI_MCR_CLR_TXF(x, v) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_CLR_TXF) = (v))
#define BW_SPI_MCR_CLR_TXF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_CLR_TXF), v))
/*@}*/
/*!
@ -281,13 +288,13 @@ typedef union _hw_spi_mcr
#define BS_SPI_MCR_DIS_RXF (1U) /*!< Bit field size in bits for SPI_MCR_DIS_RXF. */
/*! @brief Read current value of the SPI_MCR_DIS_RXF field. */
#define BR_SPI_MCR_DIS_RXF(x) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_DIS_RXF))
#define BR_SPI_MCR_DIS_RXF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_DIS_RXF)))
/*! @brief Format value for bitfield SPI_MCR_DIS_RXF. */
#define BF_SPI_MCR_DIS_RXF(v) ((uint32_t)((uint32_t)(v) << BP_SPI_MCR_DIS_RXF) & BM_SPI_MCR_DIS_RXF)
/*! @brief Set the DIS_RXF field to a new value. */
#define BW_SPI_MCR_DIS_RXF(x, v) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_DIS_RXF) = (v))
#define BW_SPI_MCR_DIS_RXF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_DIS_RXF), v))
/*@}*/
/*!
@ -307,13 +314,13 @@ typedef union _hw_spi_mcr
#define BS_SPI_MCR_DIS_TXF (1U) /*!< Bit field size in bits for SPI_MCR_DIS_TXF. */
/*! @brief Read current value of the SPI_MCR_DIS_TXF field. */
#define BR_SPI_MCR_DIS_TXF(x) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_DIS_TXF))
#define BR_SPI_MCR_DIS_TXF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_DIS_TXF)))
/*! @brief Format value for bitfield SPI_MCR_DIS_TXF. */
#define BF_SPI_MCR_DIS_TXF(v) ((uint32_t)((uint32_t)(v) << BP_SPI_MCR_DIS_TXF) & BM_SPI_MCR_DIS_TXF)
/*! @brief Set the DIS_TXF field to a new value. */
#define BW_SPI_MCR_DIS_TXF(x, v) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_DIS_TXF) = (v))
#define BW_SPI_MCR_DIS_TXF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_DIS_TXF), v))
/*@}*/
/*!
@ -335,13 +342,13 @@ typedef union _hw_spi_mcr
#define BS_SPI_MCR_MDIS (1U) /*!< Bit field size in bits for SPI_MCR_MDIS. */
/*! @brief Read current value of the SPI_MCR_MDIS field. */
#define BR_SPI_MCR_MDIS(x) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_MDIS))
#define BR_SPI_MCR_MDIS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_MDIS)))
/*! @brief Format value for bitfield SPI_MCR_MDIS. */
#define BF_SPI_MCR_MDIS(v) ((uint32_t)((uint32_t)(v) << BP_SPI_MCR_MDIS) & BM_SPI_MCR_MDIS)
/*! @brief Set the MDIS field to a new value. */
#define BW_SPI_MCR_MDIS(x, v) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_MDIS) = (v))
#define BW_SPI_MCR_MDIS(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_MDIS), v))
/*@}*/
/*!
@ -360,13 +367,13 @@ typedef union _hw_spi_mcr
#define BS_SPI_MCR_DOZE (1U) /*!< Bit field size in bits for SPI_MCR_DOZE. */
/*! @brief Read current value of the SPI_MCR_DOZE field. */
#define BR_SPI_MCR_DOZE(x) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_DOZE))
#define BR_SPI_MCR_DOZE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_DOZE)))
/*! @brief Format value for bitfield SPI_MCR_DOZE. */
#define BF_SPI_MCR_DOZE(v) ((uint32_t)((uint32_t)(v) << BP_SPI_MCR_DOZE) & BM_SPI_MCR_DOZE)
/*! @brief Set the DOZE field to a new value. */
#define BW_SPI_MCR_DOZE(x, v) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_DOZE) = (v))
#define BW_SPI_MCR_DOZE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_DOZE), v))
/*@}*/
/*!
@ -384,7 +391,7 @@ typedef union _hw_spi_mcr
#define BS_SPI_MCR_PCSIS (6U) /*!< Bit field size in bits for SPI_MCR_PCSIS. */
/*! @brief Read current value of the SPI_MCR_PCSIS field. */
#define BR_SPI_MCR_PCSIS(x) (HW_SPI_MCR(x).B.PCSIS)
#define BR_SPI_MCR_PCSIS(x) (UNION_READ(hw_spi_mcr_t, HW_SPI_MCR_ADDR(x), U, B.PCSIS))
/*! @brief Format value for bitfield SPI_MCR_PCSIS. */
#define BF_SPI_MCR_PCSIS(v) ((uint32_t)((uint32_t)(v) << BP_SPI_MCR_PCSIS) & BM_SPI_MCR_PCSIS)
@ -411,13 +418,13 @@ typedef union _hw_spi_mcr
#define BS_SPI_MCR_ROOE (1U) /*!< Bit field size in bits for SPI_MCR_ROOE. */
/*! @brief Read current value of the SPI_MCR_ROOE field. */
#define BR_SPI_MCR_ROOE(x) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_ROOE))
#define BR_SPI_MCR_ROOE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_ROOE)))
/*! @brief Format value for bitfield SPI_MCR_ROOE. */
#define BF_SPI_MCR_ROOE(v) ((uint32_t)((uint32_t)(v) << BP_SPI_MCR_ROOE) & BM_SPI_MCR_ROOE)
/*! @brief Set the ROOE field to a new value. */
#define BW_SPI_MCR_ROOE(x, v) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_ROOE) = (v))
#define BW_SPI_MCR_ROOE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_ROOE), v))
/*@}*/
/*!
@ -435,13 +442,13 @@ typedef union _hw_spi_mcr
#define BS_SPI_MCR_PCSSE (1U) /*!< Bit field size in bits for SPI_MCR_PCSSE. */
/*! @brief Read current value of the SPI_MCR_PCSSE field. */
#define BR_SPI_MCR_PCSSE(x) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_PCSSE))
#define BR_SPI_MCR_PCSSE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_PCSSE)))
/*! @brief Format value for bitfield SPI_MCR_PCSSE. */
#define BF_SPI_MCR_PCSSE(v) ((uint32_t)((uint32_t)(v) << BP_SPI_MCR_PCSSE) & BM_SPI_MCR_PCSSE)
/*! @brief Set the PCSSE field to a new value. */
#define BW_SPI_MCR_PCSSE(x, v) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_PCSSE) = (v))
#define BW_SPI_MCR_PCSSE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_PCSSE), v))
/*@}*/
/*!
@ -459,13 +466,13 @@ typedef union _hw_spi_mcr
#define BS_SPI_MCR_MTFE (1U) /*!< Bit field size in bits for SPI_MCR_MTFE. */
/*! @brief Read current value of the SPI_MCR_MTFE field. */
#define BR_SPI_MCR_MTFE(x) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_MTFE))
#define BR_SPI_MCR_MTFE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_MTFE)))
/*! @brief Format value for bitfield SPI_MCR_MTFE. */
#define BF_SPI_MCR_MTFE(v) ((uint32_t)((uint32_t)(v) << BP_SPI_MCR_MTFE) & BM_SPI_MCR_MTFE)
/*! @brief Set the MTFE field to a new value. */
#define BW_SPI_MCR_MTFE(x, v) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_MTFE) = (v))
#define BW_SPI_MCR_MTFE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_MTFE), v))
/*@}*/
/*!
@ -484,13 +491,13 @@ typedef union _hw_spi_mcr
#define BS_SPI_MCR_FRZ (1U) /*!< Bit field size in bits for SPI_MCR_FRZ. */
/*! @brief Read current value of the SPI_MCR_FRZ field. */
#define BR_SPI_MCR_FRZ(x) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_FRZ))
#define BR_SPI_MCR_FRZ(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_FRZ)))
/*! @brief Format value for bitfield SPI_MCR_FRZ. */
#define BF_SPI_MCR_FRZ(v) ((uint32_t)((uint32_t)(v) << BP_SPI_MCR_FRZ) & BM_SPI_MCR_FRZ)
/*! @brief Set the FRZ field to a new value. */
#define BW_SPI_MCR_FRZ(x, v) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_FRZ) = (v))
#define BW_SPI_MCR_FRZ(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_FRZ), v))
/*@}*/
/*!
@ -510,7 +517,7 @@ typedef union _hw_spi_mcr
#define BS_SPI_MCR_DCONF (2U) /*!< Bit field size in bits for SPI_MCR_DCONF. */
/*! @brief Read current value of the SPI_MCR_DCONF field. */
#define BR_SPI_MCR_DCONF(x) (HW_SPI_MCR(x).B.DCONF)
#define BR_SPI_MCR_DCONF(x) (UNION_READ(hw_spi_mcr_t, HW_SPI_MCR_ADDR(x), U, B.DCONF))
/*@}*/
/*!
@ -528,13 +535,13 @@ typedef union _hw_spi_mcr
#define BS_SPI_MCR_CONT_SCKE (1U) /*!< Bit field size in bits for SPI_MCR_CONT_SCKE. */
/*! @brief Read current value of the SPI_MCR_CONT_SCKE field. */
#define BR_SPI_MCR_CONT_SCKE(x) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_CONT_SCKE))
#define BR_SPI_MCR_CONT_SCKE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_CONT_SCKE)))
/*! @brief Format value for bitfield SPI_MCR_CONT_SCKE. */
#define BF_SPI_MCR_CONT_SCKE(v) ((uint32_t)((uint32_t)(v) << BP_SPI_MCR_CONT_SCKE) & BM_SPI_MCR_CONT_SCKE)
/*! @brief Set the CONT_SCKE field to a new value. */
#define BW_SPI_MCR_CONT_SCKE(x, v) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_CONT_SCKE) = (v))
#define BW_SPI_MCR_CONT_SCKE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_CONT_SCKE), v))
/*@}*/
/*!
@ -553,13 +560,13 @@ typedef union _hw_spi_mcr
#define BS_SPI_MCR_MSTR (1U) /*!< Bit field size in bits for SPI_MCR_MSTR. */
/*! @brief Read current value of the SPI_MCR_MSTR field. */
#define BR_SPI_MCR_MSTR(x) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_MSTR))
#define BR_SPI_MCR_MSTR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_MSTR)))
/*! @brief Format value for bitfield SPI_MCR_MSTR. */
#define BF_SPI_MCR_MSTR(v) ((uint32_t)((uint32_t)(v) << BP_SPI_MCR_MSTR) & BM_SPI_MCR_MSTR)
/*! @brief Set the MSTR field to a new value. */
#define BW_SPI_MCR_MSTR(x, v) (BITBAND_ACCESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_MSTR) = (v))
#define BW_SPI_MCR_MSTR(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_MCR_ADDR(x), BP_SPI_MCR_MSTR), v))
/*@}*/
/*******************************************************************************
@ -592,8 +599,8 @@ typedef union _hw_spi_tcr
#define HW_SPI_TCR_ADDR(x) ((x) + 0x8U)
#define HW_SPI_TCR(x) (*(__IO hw_spi_tcr_t *) HW_SPI_TCR_ADDR(x))
#define HW_SPI_TCR_RD(x) (HW_SPI_TCR(x).U)
#define HW_SPI_TCR_WR(x, v) (HW_SPI_TCR(x).U = (v))
#define HW_SPI_TCR_RD(x) (ADDRESS_READ(hw_spi_tcr_t, HW_SPI_TCR_ADDR(x)))
#define HW_SPI_TCR_WR(x, v) (ADDRESS_WRITE(hw_spi_tcr_t, HW_SPI_TCR_ADDR(x), v))
#define HW_SPI_TCR_SET(x, v) (HW_SPI_TCR_WR(x, HW_SPI_TCR_RD(x) | (v)))
#define HW_SPI_TCR_CLR(x, v) (HW_SPI_TCR_WR(x, HW_SPI_TCR_RD(x) & ~(v)))
#define HW_SPI_TCR_TOG(x, v) (HW_SPI_TCR_WR(x, HW_SPI_TCR_RD(x) ^ (v)))
@ -619,7 +626,7 @@ typedef union _hw_spi_tcr
#define BS_SPI_TCR_SPI_TCNT (16U) /*!< Bit field size in bits for SPI_TCR_SPI_TCNT. */
/*! @brief Read current value of the SPI_TCR_SPI_TCNT field. */
#define BR_SPI_TCR_SPI_TCNT(x) (HW_SPI_TCR(x).B.SPI_TCNT)
#define BR_SPI_TCR_SPI_TCNT(x) (UNION_READ(hw_spi_tcr_t, HW_SPI_TCR_ADDR(x), U, B.SPI_TCNT))
/*! @brief Format value for bitfield SPI_TCR_SPI_TCNT. */
#define BF_SPI_TCR_SPI_TCNT(v) ((uint32_t)((uint32_t)(v) << BP_SPI_TCR_SPI_TCNT) & BM_SPI_TCR_SPI_TCNT)
@ -677,8 +684,8 @@ typedef union _hw_spi_ctarn
#define HW_SPI_CTARn_ADDR(x, n) ((x) + 0xCU + (0x4U * (n)))
#define HW_SPI_CTARn(x, n) (*(__IO hw_spi_ctarn_t *) HW_SPI_CTARn_ADDR(x, n))
#define HW_SPI_CTARn_RD(x, n) (HW_SPI_CTARn(x, n).U)
#define HW_SPI_CTARn_WR(x, n, v) (HW_SPI_CTARn(x, n).U = (v))
#define HW_SPI_CTARn_RD(x, n) (ADDRESS_READ(hw_spi_ctarn_t, HW_SPI_CTARn_ADDR(x, n)))
#define HW_SPI_CTARn_WR(x, n, v) (ADDRESS_WRITE(hw_spi_ctarn_t, HW_SPI_CTARn_ADDR(x, n), v))
#define HW_SPI_CTARn_SET(x, n, v) (HW_SPI_CTARn_WR(x, n, HW_SPI_CTARn_RD(x, n) | (v)))
#define HW_SPI_CTARn_CLR(x, n, v) (HW_SPI_CTARn_WR(x, n, HW_SPI_CTARn_RD(x, n) & ~(v)))
#define HW_SPI_CTARn_TOG(x, n, v) (HW_SPI_CTARn_WR(x, n, HW_SPI_CTARn_RD(x, n) ^ (v)))
@ -705,7 +712,7 @@ typedef union _hw_spi_ctarn
#define BS_SPI_CTARn_BR (4U) /*!< Bit field size in bits for SPI_CTARn_BR. */
/*! @brief Read current value of the SPI_CTARn_BR field. */
#define BR_SPI_CTARn_BR(x, n) (HW_SPI_CTARn(x, n).B.BR)
#define BR_SPI_CTARn_BR(x, n) (UNION_READ(hw_spi_ctarn_t, HW_SPI_CTARn_ADDR(x, n), U, B.BR))
/*! @brief Format value for bitfield SPI_CTARn_BR. */
#define BF_SPI_CTARn_BR(v) ((uint32_t)((uint32_t)(v) << BP_SPI_CTARn_BR) & BM_SPI_CTARn_BR)
@ -732,7 +739,7 @@ typedef union _hw_spi_ctarn
#define BS_SPI_CTARn_DT (4U) /*!< Bit field size in bits for SPI_CTARn_DT. */
/*! @brief Read current value of the SPI_CTARn_DT field. */
#define BR_SPI_CTARn_DT(x, n) (HW_SPI_CTARn(x, n).B.DT)
#define BR_SPI_CTARn_DT(x, n) (UNION_READ(hw_spi_ctarn_t, HW_SPI_CTARn_ADDR(x, n), U, B.DT))
/*! @brief Format value for bitfield SPI_CTARn_DT. */
#define BF_SPI_CTARn_DT(v) ((uint32_t)((uint32_t)(v) << BP_SPI_CTARn_DT) & BM_SPI_CTARn_DT)
@ -757,7 +764,7 @@ typedef union _hw_spi_ctarn
#define BS_SPI_CTARn_ASC (4U) /*!< Bit field size in bits for SPI_CTARn_ASC. */
/*! @brief Read current value of the SPI_CTARn_ASC field. */
#define BR_SPI_CTARn_ASC(x, n) (HW_SPI_CTARn(x, n).B.ASC)
#define BR_SPI_CTARn_ASC(x, n) (UNION_READ(hw_spi_ctarn_t, HW_SPI_CTARn_ADDR(x, n), U, B.ASC))
/*! @brief Format value for bitfield SPI_CTARn_ASC. */
#define BF_SPI_CTARn_ASC(v) ((uint32_t)((uint32_t)(v) << BP_SPI_CTARn_ASC) & BM_SPI_CTARn_ASC)
@ -785,7 +792,7 @@ typedef union _hw_spi_ctarn
#define BS_SPI_CTARn_CSSCK (4U) /*!< Bit field size in bits for SPI_CTARn_CSSCK. */
/*! @brief Read current value of the SPI_CTARn_CSSCK field. */
#define BR_SPI_CTARn_CSSCK(x, n) (HW_SPI_CTARn(x, n).B.CSSCK)
#define BR_SPI_CTARn_CSSCK(x, n) (UNION_READ(hw_spi_ctarn_t, HW_SPI_CTARn_ADDR(x, n), U, B.CSSCK))
/*! @brief Format value for bitfield SPI_CTARn_CSSCK. */
#define BF_SPI_CTARn_CSSCK(v) ((uint32_t)((uint32_t)(v) << BP_SPI_CTARn_CSSCK) & BM_SPI_CTARn_CSSCK)
@ -814,7 +821,7 @@ typedef union _hw_spi_ctarn
#define BS_SPI_CTARn_PBR (2U) /*!< Bit field size in bits for SPI_CTARn_PBR. */
/*! @brief Read current value of the SPI_CTARn_PBR field. */
#define BR_SPI_CTARn_PBR(x, n) (HW_SPI_CTARn(x, n).B.PBR)
#define BR_SPI_CTARn_PBR(x, n) (UNION_READ(hw_spi_ctarn_t, HW_SPI_CTARn_ADDR(x, n), U, B.PBR))
/*! @brief Format value for bitfield SPI_CTARn_PBR. */
#define BF_SPI_CTARn_PBR(v) ((uint32_t)((uint32_t)(v) << BP_SPI_CTARn_PBR) & BM_SPI_CTARn_PBR)
@ -844,7 +851,7 @@ typedef union _hw_spi_ctarn
#define BS_SPI_CTARn_PDT (2U) /*!< Bit field size in bits for SPI_CTARn_PDT. */
/*! @brief Read current value of the SPI_CTARn_PDT field. */
#define BR_SPI_CTARn_PDT(x, n) (HW_SPI_CTARn(x, n).B.PDT)
#define BR_SPI_CTARn_PDT(x, n) (UNION_READ(hw_spi_ctarn_t, HW_SPI_CTARn_ADDR(x, n), U, B.PDT))
/*! @brief Format value for bitfield SPI_CTARn_PDT. */
#define BF_SPI_CTARn_PDT(v) ((uint32_t)((uint32_t)(v) << BP_SPI_CTARn_PDT) & BM_SPI_CTARn_PDT)
@ -872,7 +879,7 @@ typedef union _hw_spi_ctarn
#define BS_SPI_CTARn_PASC (2U) /*!< Bit field size in bits for SPI_CTARn_PASC. */
/*! @brief Read current value of the SPI_CTARn_PASC field. */
#define BR_SPI_CTARn_PASC(x, n) (HW_SPI_CTARn(x, n).B.PASC)
#define BR_SPI_CTARn_PASC(x, n) (UNION_READ(hw_spi_ctarn_t, HW_SPI_CTARn_ADDR(x, n), U, B.PASC))
/*! @brief Format value for bitfield SPI_CTARn_PASC. */
#define BF_SPI_CTARn_PASC(v) ((uint32_t)((uint32_t)(v) << BP_SPI_CTARn_PASC) & BM_SPI_CTARn_PASC)
@ -900,7 +907,7 @@ typedef union _hw_spi_ctarn
#define BS_SPI_CTARn_PCSSCK (2U) /*!< Bit field size in bits for SPI_CTARn_PCSSCK. */
/*! @brief Read current value of the SPI_CTARn_PCSSCK field. */
#define BR_SPI_CTARn_PCSSCK(x, n) (HW_SPI_CTARn(x, n).B.PCSSCK)
#define BR_SPI_CTARn_PCSSCK(x, n) (UNION_READ(hw_spi_ctarn_t, HW_SPI_CTARn_ADDR(x, n), U, B.PCSSCK))
/*! @brief Format value for bitfield SPI_CTARn_PCSSCK. */
#define BF_SPI_CTARn_PCSSCK(v) ((uint32_t)((uint32_t)(v) << BP_SPI_CTARn_PCSSCK) & BM_SPI_CTARn_PCSSCK)
@ -924,13 +931,13 @@ typedef union _hw_spi_ctarn
#define BS_SPI_CTARn_LSBFE (1U) /*!< Bit field size in bits for SPI_CTARn_LSBFE. */
/*! @brief Read current value of the SPI_CTARn_LSBFE field. */
#define BR_SPI_CTARn_LSBFE(x, n) (BITBAND_ACCESS32(HW_SPI_CTARn_ADDR(x, n), BP_SPI_CTARn_LSBFE))
#define BR_SPI_CTARn_LSBFE(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_CTARn_ADDR(x, n), BP_SPI_CTARn_LSBFE)))
/*! @brief Format value for bitfield SPI_CTARn_LSBFE. */
#define BF_SPI_CTARn_LSBFE(v) ((uint32_t)((uint32_t)(v) << BP_SPI_CTARn_LSBFE) & BM_SPI_CTARn_LSBFE)
/*! @brief Set the LSBFE field to a new value. */
#define BW_SPI_CTARn_LSBFE(x, n, v) (BITBAND_ACCESS32(HW_SPI_CTARn_ADDR(x, n), BP_SPI_CTARn_LSBFE) = (v))
#define BW_SPI_CTARn_LSBFE(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_CTARn_ADDR(x, n), BP_SPI_CTARn_LSBFE), v))
/*@}*/
/*!
@ -954,13 +961,13 @@ typedef union _hw_spi_ctarn
#define BS_SPI_CTARn_CPHA (1U) /*!< Bit field size in bits for SPI_CTARn_CPHA. */
/*! @brief Read current value of the SPI_CTARn_CPHA field. */
#define BR_SPI_CTARn_CPHA(x, n) (BITBAND_ACCESS32(HW_SPI_CTARn_ADDR(x, n), BP_SPI_CTARn_CPHA))
#define BR_SPI_CTARn_CPHA(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_CTARn_ADDR(x, n), BP_SPI_CTARn_CPHA)))
/*! @brief Format value for bitfield SPI_CTARn_CPHA. */
#define BF_SPI_CTARn_CPHA(v) ((uint32_t)((uint32_t)(v) << BP_SPI_CTARn_CPHA) & BM_SPI_CTARn_CPHA)
/*! @brief Set the CPHA field to a new value. */
#define BW_SPI_CTARn_CPHA(x, n, v) (BITBAND_ACCESS32(HW_SPI_CTARn_ADDR(x, n), BP_SPI_CTARn_CPHA) = (v))
#define BW_SPI_CTARn_CPHA(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_CTARn_ADDR(x, n), BP_SPI_CTARn_CPHA), v))
/*@}*/
/*!
@ -985,13 +992,13 @@ typedef union _hw_spi_ctarn
#define BS_SPI_CTARn_CPOL (1U) /*!< Bit field size in bits for SPI_CTARn_CPOL. */
/*! @brief Read current value of the SPI_CTARn_CPOL field. */
#define BR_SPI_CTARn_CPOL(x, n) (BITBAND_ACCESS32(HW_SPI_CTARn_ADDR(x, n), BP_SPI_CTARn_CPOL))
#define BR_SPI_CTARn_CPOL(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_CTARn_ADDR(x, n), BP_SPI_CTARn_CPOL)))
/*! @brief Format value for bitfield SPI_CTARn_CPOL. */
#define BF_SPI_CTARn_CPOL(v) ((uint32_t)((uint32_t)(v) << BP_SPI_CTARn_CPOL) & BM_SPI_CTARn_CPOL)
/*! @brief Set the CPOL field to a new value. */
#define BW_SPI_CTARn_CPOL(x, n, v) (BITBAND_ACCESS32(HW_SPI_CTARn_ADDR(x, n), BP_SPI_CTARn_CPOL) = (v))
#define BW_SPI_CTARn_CPOL(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_CTARn_ADDR(x, n), BP_SPI_CTARn_CPOL), v))
/*@}*/
/*!
@ -1006,7 +1013,7 @@ typedef union _hw_spi_ctarn
#define BS_SPI_CTARn_FMSZ (4U) /*!< Bit field size in bits for SPI_CTARn_FMSZ. */
/*! @brief Read current value of the SPI_CTARn_FMSZ field. */
#define BR_SPI_CTARn_FMSZ(x, n) (HW_SPI_CTARn(x, n).B.FMSZ)
#define BR_SPI_CTARn_FMSZ(x, n) (UNION_READ(hw_spi_ctarn_t, HW_SPI_CTARn_ADDR(x, n), U, B.FMSZ))
/*! @brief Format value for bitfield SPI_CTARn_FMSZ. */
#define BF_SPI_CTARn_FMSZ(v) ((uint32_t)((uint32_t)(v) << BP_SPI_CTARn_FMSZ) & BM_SPI_CTARn_FMSZ)
@ -1039,13 +1046,13 @@ typedef union _hw_spi_ctarn
#define BS_SPI_CTARn_DBR (1U) /*!< Bit field size in bits for SPI_CTARn_DBR. */
/*! @brief Read current value of the SPI_CTARn_DBR field. */
#define BR_SPI_CTARn_DBR(x, n) (BITBAND_ACCESS32(HW_SPI_CTARn_ADDR(x, n), BP_SPI_CTARn_DBR))
#define BR_SPI_CTARn_DBR(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_CTARn_ADDR(x, n), BP_SPI_CTARn_DBR)))
/*! @brief Format value for bitfield SPI_CTARn_DBR. */
#define BF_SPI_CTARn_DBR(v) ((uint32_t)((uint32_t)(v) << BP_SPI_CTARn_DBR) & BM_SPI_CTARn_DBR)
/*! @brief Set the DBR field to a new value. */
#define BW_SPI_CTARn_DBR(x, n, v) (BITBAND_ACCESS32(HW_SPI_CTARn_ADDR(x, n), BP_SPI_CTARn_DBR) = (v))
#define BW_SPI_CTARn_DBR(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_CTARn_ADDR(x, n), BP_SPI_CTARn_DBR), v))
/*@}*/
/*******************************************************************************
* HW_SPI_CTARn_SLAVE - Clock and Transfer Attributes Register (In Slave Mode)
@ -1079,8 +1086,8 @@ typedef union _hw_spi_ctarn_slave
#define HW_SPI_CTARn_SLAVE_ADDR(x, n) ((x) + 0xCU + (0x4U * (n)))
#define HW_SPI_CTARn_SLAVE(x, n) (*(__IO hw_spi_ctarn_slave_t *) HW_SPI_CTARn_SLAVE_ADDR(x, n))
#define HW_SPI_CTARn_SLAVE_RD(x, n) (HW_SPI_CTARn_SLAVE(x, n).U)
#define HW_SPI_CTARn_SLAVE_WR(x, n, v) (HW_SPI_CTARn_SLAVE(x, n).U = (v))
#define HW_SPI_CTARn_SLAVE_RD(x, n) (ADDRESS_READ(hw_spi_ctarn_slave_t, HW_SPI_CTARn_SLAVE_ADDR(x, n)))
#define HW_SPI_CTARn_SLAVE_WR(x, n, v) (ADDRESS_WRITE(hw_spi_ctarn_slave_t, HW_SPI_CTARn_SLAVE_ADDR(x, n), v))
#define HW_SPI_CTARn_SLAVE_SET(x, n, v) (HW_SPI_CTARn_SLAVE_WR(x, n, HW_SPI_CTARn_SLAVE_RD(x, n) | (v)))
#define HW_SPI_CTARn_SLAVE_CLR(x, n, v) (HW_SPI_CTARn_SLAVE_WR(x, n, HW_SPI_CTARn_SLAVE_RD(x, n) & ~(v)))
#define HW_SPI_CTARn_SLAVE_TOG(x, n, v) (HW_SPI_CTARn_SLAVE_WR(x, n, HW_SPI_CTARn_SLAVE_RD(x, n) ^ (v)))
@ -1111,13 +1118,13 @@ typedef union _hw_spi_ctarn_slave
#define BS_SPI_CTARn_SLAVE_CPHA (1U) /*!< Bit field size in bits for SPI_CTARn_SLAVE_CPHA. */
/*! @brief Read current value of the SPI_CTARn_SLAVE_CPHA field. */
#define BR_SPI_CTARn_SLAVE_CPHA(x, n) (BITBAND_ACCESS32(HW_SPI_CTARn_SLAVE_ADDR(x, n), BP_SPI_CTARn_SLAVE_CPHA))
#define BR_SPI_CTARn_SLAVE_CPHA(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_CTARn_SLAVE_ADDR(x, n), BP_SPI_CTARn_SLAVE_CPHA)))
/*! @brief Format value for bitfield SPI_CTARn_SLAVE_CPHA. */
#define BF_SPI_CTARn_SLAVE_CPHA(v) ((uint32_t)((uint32_t)(v) << BP_SPI_CTARn_SLAVE_CPHA) & BM_SPI_CTARn_SLAVE_CPHA)
/*! @brief Set the CPHA field to a new value. */
#define BW_SPI_CTARn_SLAVE_CPHA(x, n, v) (BITBAND_ACCESS32(HW_SPI_CTARn_SLAVE_ADDR(x, n), BP_SPI_CTARn_SLAVE_CPHA) = (v))
#define BW_SPI_CTARn_SLAVE_CPHA(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_CTARn_SLAVE_ADDR(x, n), BP_SPI_CTARn_SLAVE_CPHA), v))
/*@}*/
/*!
@ -1137,13 +1144,13 @@ typedef union _hw_spi_ctarn_slave
#define BS_SPI_CTARn_SLAVE_CPOL (1U) /*!< Bit field size in bits for SPI_CTARn_SLAVE_CPOL. */
/*! @brief Read current value of the SPI_CTARn_SLAVE_CPOL field. */
#define BR_SPI_CTARn_SLAVE_CPOL(x, n) (BITBAND_ACCESS32(HW_SPI_CTARn_SLAVE_ADDR(x, n), BP_SPI_CTARn_SLAVE_CPOL))
#define BR_SPI_CTARn_SLAVE_CPOL(x, n) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_CTARn_SLAVE_ADDR(x, n), BP_SPI_CTARn_SLAVE_CPOL)))
/*! @brief Format value for bitfield SPI_CTARn_SLAVE_CPOL. */
#define BF_SPI_CTARn_SLAVE_CPOL(v) ((uint32_t)((uint32_t)(v) << BP_SPI_CTARn_SLAVE_CPOL) & BM_SPI_CTARn_SLAVE_CPOL)
/*! @brief Set the CPOL field to a new value. */
#define BW_SPI_CTARn_SLAVE_CPOL(x, n, v) (BITBAND_ACCESS32(HW_SPI_CTARn_SLAVE_ADDR(x, n), BP_SPI_CTARn_SLAVE_CPOL) = (v))
#define BW_SPI_CTARn_SLAVE_CPOL(x, n, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_CTARn_SLAVE_ADDR(x, n), BP_SPI_CTARn_SLAVE_CPOL), v))
/*@}*/
/*!
@ -1158,7 +1165,7 @@ typedef union _hw_spi_ctarn_slave
#define BS_SPI_CTARn_SLAVE_FMSZ (5U) /*!< Bit field size in bits for SPI_CTARn_SLAVE_FMSZ. */
/*! @brief Read current value of the SPI_CTARn_SLAVE_FMSZ field. */
#define BR_SPI_CTARn_SLAVE_FMSZ(x, n) (HW_SPI_CTARn_SLAVE(x, n).B.FMSZ)
#define BR_SPI_CTARn_SLAVE_FMSZ(x, n) (UNION_READ(hw_spi_ctarn_slave_t, HW_SPI_CTARn_SLAVE_ADDR(x, n), U, B.FMSZ))
/*! @brief Format value for bitfield SPI_CTARn_SLAVE_FMSZ. */
#define BF_SPI_CTARn_SLAVE_FMSZ(v) ((uint32_t)((uint32_t)(v) << BP_SPI_CTARn_SLAVE_FMSZ) & BM_SPI_CTARn_SLAVE_FMSZ)
@ -1213,8 +1220,8 @@ typedef union _hw_spi_sr
#define HW_SPI_SR_ADDR(x) ((x) + 0x2CU)
#define HW_SPI_SR(x) (*(__IO hw_spi_sr_t *) HW_SPI_SR_ADDR(x))
#define HW_SPI_SR_RD(x) (HW_SPI_SR(x).U)
#define HW_SPI_SR_WR(x, v) (HW_SPI_SR(x).U = (v))
#define HW_SPI_SR_RD(x) (ADDRESS_READ(hw_spi_sr_t, HW_SPI_SR_ADDR(x)))
#define HW_SPI_SR_WR(x, v) (ADDRESS_WRITE(hw_spi_sr_t, HW_SPI_SR_ADDR(x), v))
#define HW_SPI_SR_SET(x, v) (HW_SPI_SR_WR(x, HW_SPI_SR_RD(x) | (v)))
#define HW_SPI_SR_CLR(x, v) (HW_SPI_SR_WR(x, HW_SPI_SR_RD(x) & ~(v)))
#define HW_SPI_SR_TOG(x, v) (HW_SPI_SR_WR(x, HW_SPI_SR_RD(x) ^ (v)))
@ -1236,7 +1243,7 @@ typedef union _hw_spi_sr
#define BS_SPI_SR_POPNXTPTR (4U) /*!< Bit field size in bits for SPI_SR_POPNXTPTR. */
/*! @brief Read current value of the SPI_SR_POPNXTPTR field. */
#define BR_SPI_SR_POPNXTPTR(x) (HW_SPI_SR(x).B.POPNXTPTR)
#define BR_SPI_SR_POPNXTPTR(x) (UNION_READ(hw_spi_sr_t, HW_SPI_SR_ADDR(x), U, B.POPNXTPTR))
/*@}*/
/*!
@ -1252,7 +1259,7 @@ typedef union _hw_spi_sr
#define BS_SPI_SR_RXCTR (4U) /*!< Bit field size in bits for SPI_SR_RXCTR. */
/*! @brief Read current value of the SPI_SR_RXCTR field. */
#define BR_SPI_SR_RXCTR(x) (HW_SPI_SR(x).B.RXCTR)
#define BR_SPI_SR_RXCTR(x) (UNION_READ(hw_spi_sr_t, HW_SPI_SR_ADDR(x), U, B.RXCTR))
/*@}*/
/*!
@ -1268,7 +1275,7 @@ typedef union _hw_spi_sr
#define BS_SPI_SR_TXNXTPTR (4U) /*!< Bit field size in bits for SPI_SR_TXNXTPTR. */
/*! @brief Read current value of the SPI_SR_TXNXTPTR field. */
#define BR_SPI_SR_TXNXTPTR(x) (HW_SPI_SR(x).B.TXNXTPTR)
#define BR_SPI_SR_TXNXTPTR(x) (UNION_READ(hw_spi_sr_t, HW_SPI_SR_ADDR(x), U, B.TXNXTPTR))
/*@}*/
/*!
@ -1284,7 +1291,7 @@ typedef union _hw_spi_sr
#define BS_SPI_SR_TXCTR (4U) /*!< Bit field size in bits for SPI_SR_TXCTR. */
/*! @brief Read current value of the SPI_SR_TXCTR field. */
#define BR_SPI_SR_TXCTR(x) (HW_SPI_SR(x).B.TXCTR)
#define BR_SPI_SR_TXCTR(x) (UNION_READ(hw_spi_sr_t, HW_SPI_SR_ADDR(x), U, B.TXCTR))
/*@}*/
/*!
@ -1305,13 +1312,13 @@ typedef union _hw_spi_sr
#define BS_SPI_SR_RFDF (1U) /*!< Bit field size in bits for SPI_SR_RFDF. */
/*! @brief Read current value of the SPI_SR_RFDF field. */
#define BR_SPI_SR_RFDF(x) (BITBAND_ACCESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_RFDF))
#define BR_SPI_SR_RFDF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_RFDF)))
/*! @brief Format value for bitfield SPI_SR_RFDF. */
#define BF_SPI_SR_RFDF(v) ((uint32_t)((uint32_t)(v) << BP_SPI_SR_RFDF) & BM_SPI_SR_RFDF)
/*! @brief Set the RFDF field to a new value. */
#define BW_SPI_SR_RFDF(x, v) (BITBAND_ACCESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_RFDF) = (v))
#define BW_SPI_SR_RFDF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_RFDF), v))
/*@}*/
/*!
@ -1331,13 +1338,13 @@ typedef union _hw_spi_sr
#define BS_SPI_SR_RFOF (1U) /*!< Bit field size in bits for SPI_SR_RFOF. */
/*! @brief Read current value of the SPI_SR_RFOF field. */
#define BR_SPI_SR_RFOF(x) (BITBAND_ACCESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_RFOF))
#define BR_SPI_SR_RFOF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_RFOF)))
/*! @brief Format value for bitfield SPI_SR_RFOF. */
#define BF_SPI_SR_RFOF(v) ((uint32_t)((uint32_t)(v) << BP_SPI_SR_RFOF) & BM_SPI_SR_RFOF)
/*! @brief Set the RFOF field to a new value. */
#define BW_SPI_SR_RFOF(x, v) (BITBAND_ACCESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_RFOF) = (v))
#define BW_SPI_SR_RFOF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_RFOF), v))
/*@}*/
/*!
@ -1358,13 +1365,13 @@ typedef union _hw_spi_sr
#define BS_SPI_SR_TFFF (1U) /*!< Bit field size in bits for SPI_SR_TFFF. */
/*! @brief Read current value of the SPI_SR_TFFF field. */
#define BR_SPI_SR_TFFF(x) (BITBAND_ACCESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_TFFF))
#define BR_SPI_SR_TFFF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_TFFF)))
/*! @brief Format value for bitfield SPI_SR_TFFF. */
#define BF_SPI_SR_TFFF(v) ((uint32_t)((uint32_t)(v) << BP_SPI_SR_TFFF) & BM_SPI_SR_TFFF)
/*! @brief Set the TFFF field to a new value. */
#define BW_SPI_SR_TFFF(x, v) (BITBAND_ACCESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_TFFF) = (v))
#define BW_SPI_SR_TFFF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_TFFF), v))
/*@}*/
/*!
@ -1386,13 +1393,13 @@ typedef union _hw_spi_sr
#define BS_SPI_SR_TFUF (1U) /*!< Bit field size in bits for SPI_SR_TFUF. */
/*! @brief Read current value of the SPI_SR_TFUF field. */
#define BR_SPI_SR_TFUF(x) (BITBAND_ACCESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_TFUF))
#define BR_SPI_SR_TFUF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_TFUF)))
/*! @brief Format value for bitfield SPI_SR_TFUF. */
#define BF_SPI_SR_TFUF(v) ((uint32_t)((uint32_t)(v) << BP_SPI_SR_TFUF) & BM_SPI_SR_TFUF)
/*! @brief Set the TFUF field to a new value. */
#define BW_SPI_SR_TFUF(x, v) (BITBAND_ACCESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_TFUF) = (v))
#define BW_SPI_SR_TFUF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_TFUF), v))
/*@}*/
/*!
@ -1414,13 +1421,13 @@ typedef union _hw_spi_sr
#define BS_SPI_SR_EOQF (1U) /*!< Bit field size in bits for SPI_SR_EOQF. */
/*! @brief Read current value of the SPI_SR_EOQF field. */
#define BR_SPI_SR_EOQF(x) (BITBAND_ACCESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_EOQF))
#define BR_SPI_SR_EOQF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_EOQF)))
/*! @brief Format value for bitfield SPI_SR_EOQF. */
#define BF_SPI_SR_EOQF(v) ((uint32_t)((uint32_t)(v) << BP_SPI_SR_EOQF) & BM_SPI_SR_EOQF)
/*! @brief Set the EOQF field to a new value. */
#define BW_SPI_SR_EOQF(x, v) (BITBAND_ACCESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_EOQF) = (v))
#define BW_SPI_SR_EOQF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_EOQF), v))
/*@}*/
/*!
@ -1440,13 +1447,13 @@ typedef union _hw_spi_sr
#define BS_SPI_SR_TXRXS (1U) /*!< Bit field size in bits for SPI_SR_TXRXS. */
/*! @brief Read current value of the SPI_SR_TXRXS field. */
#define BR_SPI_SR_TXRXS(x) (BITBAND_ACCESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_TXRXS))
#define BR_SPI_SR_TXRXS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_TXRXS)))
/*! @brief Format value for bitfield SPI_SR_TXRXS. */
#define BF_SPI_SR_TXRXS(v) ((uint32_t)((uint32_t)(v) << BP_SPI_SR_TXRXS) & BM_SPI_SR_TXRXS)
/*! @brief Set the TXRXS field to a new value. */
#define BW_SPI_SR_TXRXS(x, v) (BITBAND_ACCESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_TXRXS) = (v))
#define BW_SPI_SR_TXRXS(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_TXRXS), v))
/*@}*/
/*!
@ -1465,13 +1472,13 @@ typedef union _hw_spi_sr
#define BS_SPI_SR_TCF (1U) /*!< Bit field size in bits for SPI_SR_TCF. */
/*! @brief Read current value of the SPI_SR_TCF field. */
#define BR_SPI_SR_TCF(x) (BITBAND_ACCESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_TCF))
#define BR_SPI_SR_TCF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_TCF)))
/*! @brief Format value for bitfield SPI_SR_TCF. */
#define BF_SPI_SR_TCF(v) ((uint32_t)((uint32_t)(v) << BP_SPI_SR_TCF) & BM_SPI_SR_TCF)
/*! @brief Set the TCF field to a new value. */
#define BW_SPI_SR_TCF(x, v) (BITBAND_ACCESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_TCF) = (v))
#define BW_SPI_SR_TCF(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_SR_ADDR(x), BP_SPI_SR_TCF), v))
/*@}*/
/*******************************************************************************
@ -1518,8 +1525,8 @@ typedef union _hw_spi_rser
#define HW_SPI_RSER_ADDR(x) ((x) + 0x30U)
#define HW_SPI_RSER(x) (*(__IO hw_spi_rser_t *) HW_SPI_RSER_ADDR(x))
#define HW_SPI_RSER_RD(x) (HW_SPI_RSER(x).U)
#define HW_SPI_RSER_WR(x, v) (HW_SPI_RSER(x).U = (v))
#define HW_SPI_RSER_RD(x) (ADDRESS_READ(hw_spi_rser_t, HW_SPI_RSER_ADDR(x)))
#define HW_SPI_RSER_WR(x, v) (ADDRESS_WRITE(hw_spi_rser_t, HW_SPI_RSER_ADDR(x), v))
#define HW_SPI_RSER_SET(x, v) (HW_SPI_RSER_WR(x, HW_SPI_RSER_RD(x) | (v)))
#define HW_SPI_RSER_CLR(x, v) (HW_SPI_RSER_WR(x, HW_SPI_RSER_RD(x) & ~(v)))
#define HW_SPI_RSER_TOG(x, v) (HW_SPI_RSER_WR(x, HW_SPI_RSER_RD(x) ^ (v)))
@ -1546,13 +1553,13 @@ typedef union _hw_spi_rser
#define BS_SPI_RSER_RFDF_DIRS (1U) /*!< Bit field size in bits for SPI_RSER_RFDF_DIRS. */
/*! @brief Read current value of the SPI_RSER_RFDF_DIRS field. */
#define BR_SPI_RSER_RFDF_DIRS(x) (BITBAND_ACCESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_RFDF_DIRS))
#define BR_SPI_RSER_RFDF_DIRS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_RFDF_DIRS)))
/*! @brief Format value for bitfield SPI_RSER_RFDF_DIRS. */
#define BF_SPI_RSER_RFDF_DIRS(v) ((uint32_t)((uint32_t)(v) << BP_SPI_RSER_RFDF_DIRS) & BM_SPI_RSER_RFDF_DIRS)
/*! @brief Set the RFDF_DIRS field to a new value. */
#define BW_SPI_RSER_RFDF_DIRS(x, v) (BITBAND_ACCESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_RFDF_DIRS) = (v))
#define BW_SPI_RSER_RFDF_DIRS(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_RFDF_DIRS), v))
/*@}*/
/*!
@ -1571,13 +1578,13 @@ typedef union _hw_spi_rser
#define BS_SPI_RSER_RFDF_RE (1U) /*!< Bit field size in bits for SPI_RSER_RFDF_RE. */
/*! @brief Read current value of the SPI_RSER_RFDF_RE field. */
#define BR_SPI_RSER_RFDF_RE(x) (BITBAND_ACCESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_RFDF_RE))
#define BR_SPI_RSER_RFDF_RE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_RFDF_RE)))
/*! @brief Format value for bitfield SPI_RSER_RFDF_RE. */
#define BF_SPI_RSER_RFDF_RE(v) ((uint32_t)((uint32_t)(v) << BP_SPI_RSER_RFDF_RE) & BM_SPI_RSER_RFDF_RE)
/*! @brief Set the RFDF_RE field to a new value. */
#define BW_SPI_RSER_RFDF_RE(x, v) (BITBAND_ACCESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_RFDF_RE) = (v))
#define BW_SPI_RSER_RFDF_RE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_RFDF_RE), v))
/*@}*/
/*!
@ -1595,13 +1602,13 @@ typedef union _hw_spi_rser
#define BS_SPI_RSER_RFOF_RE (1U) /*!< Bit field size in bits for SPI_RSER_RFOF_RE. */
/*! @brief Read current value of the SPI_RSER_RFOF_RE field. */
#define BR_SPI_RSER_RFOF_RE(x) (BITBAND_ACCESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_RFOF_RE))
#define BR_SPI_RSER_RFOF_RE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_RFOF_RE)))
/*! @brief Format value for bitfield SPI_RSER_RFOF_RE. */
#define BF_SPI_RSER_RFOF_RE(v) ((uint32_t)((uint32_t)(v) << BP_SPI_RSER_RFOF_RE) & BM_SPI_RSER_RFOF_RE)
/*! @brief Set the RFOF_RE field to a new value. */
#define BW_SPI_RSER_RFOF_RE(x, v) (BITBAND_ACCESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_RFOF_RE) = (v))
#define BW_SPI_RSER_RFOF_RE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_RFOF_RE), v))
/*@}*/
/*!
@ -1621,13 +1628,13 @@ typedef union _hw_spi_rser
#define BS_SPI_RSER_TFFF_DIRS (1U) /*!< Bit field size in bits for SPI_RSER_TFFF_DIRS. */
/*! @brief Read current value of the SPI_RSER_TFFF_DIRS field. */
#define BR_SPI_RSER_TFFF_DIRS(x) (BITBAND_ACCESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_TFFF_DIRS))
#define BR_SPI_RSER_TFFF_DIRS(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_TFFF_DIRS)))
/*! @brief Format value for bitfield SPI_RSER_TFFF_DIRS. */
#define BF_SPI_RSER_TFFF_DIRS(v) ((uint32_t)((uint32_t)(v) << BP_SPI_RSER_TFFF_DIRS) & BM_SPI_RSER_TFFF_DIRS)
/*! @brief Set the TFFF_DIRS field to a new value. */
#define BW_SPI_RSER_TFFF_DIRS(x, v) (BITBAND_ACCESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_TFFF_DIRS) = (v))
#define BW_SPI_RSER_TFFF_DIRS(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_TFFF_DIRS), v))
/*@}*/
/*!
@ -1646,13 +1653,13 @@ typedef union _hw_spi_rser
#define BS_SPI_RSER_TFFF_RE (1U) /*!< Bit field size in bits for SPI_RSER_TFFF_RE. */
/*! @brief Read current value of the SPI_RSER_TFFF_RE field. */
#define BR_SPI_RSER_TFFF_RE(x) (BITBAND_ACCESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_TFFF_RE))
#define BR_SPI_RSER_TFFF_RE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_TFFF_RE)))
/*! @brief Format value for bitfield SPI_RSER_TFFF_RE. */
#define BF_SPI_RSER_TFFF_RE(v) ((uint32_t)((uint32_t)(v) << BP_SPI_RSER_TFFF_RE) & BM_SPI_RSER_TFFF_RE)
/*! @brief Set the TFFF_RE field to a new value. */
#define BW_SPI_RSER_TFFF_RE(x, v) (BITBAND_ACCESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_TFFF_RE) = (v))
#define BW_SPI_RSER_TFFF_RE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_TFFF_RE), v))
/*@}*/
/*!
@ -1670,13 +1677,13 @@ typedef union _hw_spi_rser
#define BS_SPI_RSER_TFUF_RE (1U) /*!< Bit field size in bits for SPI_RSER_TFUF_RE. */
/*! @brief Read current value of the SPI_RSER_TFUF_RE field. */
#define BR_SPI_RSER_TFUF_RE(x) (BITBAND_ACCESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_TFUF_RE))
#define BR_SPI_RSER_TFUF_RE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_TFUF_RE)))
/*! @brief Format value for bitfield SPI_RSER_TFUF_RE. */
#define BF_SPI_RSER_TFUF_RE(v) ((uint32_t)((uint32_t)(v) << BP_SPI_RSER_TFUF_RE) & BM_SPI_RSER_TFUF_RE)
/*! @brief Set the TFUF_RE field to a new value. */
#define BW_SPI_RSER_TFUF_RE(x, v) (BITBAND_ACCESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_TFUF_RE) = (v))
#define BW_SPI_RSER_TFUF_RE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_TFUF_RE), v))
/*@}*/
/*!
@ -1694,13 +1701,13 @@ typedef union _hw_spi_rser
#define BS_SPI_RSER_EOQF_RE (1U) /*!< Bit field size in bits for SPI_RSER_EOQF_RE. */
/*! @brief Read current value of the SPI_RSER_EOQF_RE field. */
#define BR_SPI_RSER_EOQF_RE(x) (BITBAND_ACCESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_EOQF_RE))
#define BR_SPI_RSER_EOQF_RE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_EOQF_RE)))
/*! @brief Format value for bitfield SPI_RSER_EOQF_RE. */
#define BF_SPI_RSER_EOQF_RE(v) ((uint32_t)((uint32_t)(v) << BP_SPI_RSER_EOQF_RE) & BM_SPI_RSER_EOQF_RE)
/*! @brief Set the EOQF_RE field to a new value. */
#define BW_SPI_RSER_EOQF_RE(x, v) (BITBAND_ACCESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_EOQF_RE) = (v))
#define BW_SPI_RSER_EOQF_RE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_EOQF_RE), v))
/*@}*/
/*!
@ -1718,13 +1725,13 @@ typedef union _hw_spi_rser
#define BS_SPI_RSER_TCF_RE (1U) /*!< Bit field size in bits for SPI_RSER_TCF_RE. */
/*! @brief Read current value of the SPI_RSER_TCF_RE field. */
#define BR_SPI_RSER_TCF_RE(x) (BITBAND_ACCESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_TCF_RE))
#define BR_SPI_RSER_TCF_RE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_TCF_RE)))
/*! @brief Format value for bitfield SPI_RSER_TCF_RE. */
#define BF_SPI_RSER_TCF_RE(v) ((uint32_t)((uint32_t)(v) << BP_SPI_RSER_TCF_RE) & BM_SPI_RSER_TCF_RE)
/*! @brief Set the TCF_RE field to a new value. */
#define BW_SPI_RSER_TCF_RE(x, v) (BITBAND_ACCESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_TCF_RE) = (v))
#define BW_SPI_RSER_TCF_RE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_RSER_ADDR(x), BP_SPI_RSER_TCF_RE), v))
/*@}*/
/*******************************************************************************
@ -1769,8 +1776,8 @@ typedef union _hw_spi_pushr
#define HW_SPI_PUSHR_ADDR(x) ((x) + 0x34U)
#define HW_SPI_PUSHR(x) (*(__IO hw_spi_pushr_t *) HW_SPI_PUSHR_ADDR(x))
#define HW_SPI_PUSHR_RD(x) (HW_SPI_PUSHR(x).U)
#define HW_SPI_PUSHR_WR(x, v) (HW_SPI_PUSHR(x).U = (v))
#define HW_SPI_PUSHR_RD(x) (ADDRESS_READ(hw_spi_pushr_t, HW_SPI_PUSHR_ADDR(x)))
#define HW_SPI_PUSHR_WR(x, v) (ADDRESS_WRITE(hw_spi_pushr_t, HW_SPI_PUSHR_ADDR(x), v))
#define HW_SPI_PUSHR_SET(x, v) (HW_SPI_PUSHR_WR(x, HW_SPI_PUSHR_RD(x) | (v)))
#define HW_SPI_PUSHR_CLR(x, v) (HW_SPI_PUSHR_WR(x, HW_SPI_PUSHR_RD(x) & ~(v)))
#define HW_SPI_PUSHR_TOG(x, v) (HW_SPI_PUSHR_WR(x, HW_SPI_PUSHR_RD(x) ^ (v)))
@ -1791,7 +1798,7 @@ typedef union _hw_spi_pushr
#define BS_SPI_PUSHR_TXDATA (16U) /*!< Bit field size in bits for SPI_PUSHR_TXDATA. */
/*! @brief Read current value of the SPI_PUSHR_TXDATA field. */
#define BR_SPI_PUSHR_TXDATA(x) (HW_SPI_PUSHR(x).B.TXDATA)
#define BR_SPI_PUSHR_TXDATA(x) (UNION_READ(hw_spi_pushr_t, HW_SPI_PUSHR_ADDR(x), U, B.TXDATA))
/*! @brief Format value for bitfield SPI_PUSHR_TXDATA. */
#define BF_SPI_PUSHR_TXDATA(v) ((uint32_t)((uint32_t)(v) << BP_SPI_PUSHR_TXDATA) & BM_SPI_PUSHR_TXDATA)
@ -1816,7 +1823,7 @@ typedef union _hw_spi_pushr
#define BS_SPI_PUSHR_PCS (6U) /*!< Bit field size in bits for SPI_PUSHR_PCS. */
/*! @brief Read current value of the SPI_PUSHR_PCS field. */
#define BR_SPI_PUSHR_PCS(x) (HW_SPI_PUSHR(x).B.PCS)
#define BR_SPI_PUSHR_PCS(x) (UNION_READ(hw_spi_pushr_t, HW_SPI_PUSHR_ADDR(x), U, B.PCS))
/*! @brief Format value for bitfield SPI_PUSHR_PCS. */
#define BF_SPI_PUSHR_PCS(v) ((uint32_t)((uint32_t)(v) << BP_SPI_PUSHR_PCS) & BM_SPI_PUSHR_PCS)
@ -1841,13 +1848,13 @@ typedef union _hw_spi_pushr
#define BS_SPI_PUSHR_CTCNT (1U) /*!< Bit field size in bits for SPI_PUSHR_CTCNT. */
/*! @brief Read current value of the SPI_PUSHR_CTCNT field. */
#define BR_SPI_PUSHR_CTCNT(x) (BITBAND_ACCESS32(HW_SPI_PUSHR_ADDR(x), BP_SPI_PUSHR_CTCNT))
#define BR_SPI_PUSHR_CTCNT(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_PUSHR_ADDR(x), BP_SPI_PUSHR_CTCNT)))
/*! @brief Format value for bitfield SPI_PUSHR_CTCNT. */
#define BF_SPI_PUSHR_CTCNT(v) ((uint32_t)((uint32_t)(v) << BP_SPI_PUSHR_CTCNT) & BM_SPI_PUSHR_CTCNT)
/*! @brief Set the CTCNT field to a new value. */
#define BW_SPI_PUSHR_CTCNT(x, v) (BITBAND_ACCESS32(HW_SPI_PUSHR_ADDR(x), BP_SPI_PUSHR_CTCNT) = (v))
#define BW_SPI_PUSHR_CTCNT(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_PUSHR_ADDR(x), BP_SPI_PUSHR_CTCNT), v))
/*@}*/
/*!
@ -1867,13 +1874,13 @@ typedef union _hw_spi_pushr
#define BS_SPI_PUSHR_EOQ (1U) /*!< Bit field size in bits for SPI_PUSHR_EOQ. */
/*! @brief Read current value of the SPI_PUSHR_EOQ field. */
#define BR_SPI_PUSHR_EOQ(x) (BITBAND_ACCESS32(HW_SPI_PUSHR_ADDR(x), BP_SPI_PUSHR_EOQ))
#define BR_SPI_PUSHR_EOQ(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_PUSHR_ADDR(x), BP_SPI_PUSHR_EOQ)))
/*! @brief Format value for bitfield SPI_PUSHR_EOQ. */
#define BF_SPI_PUSHR_EOQ(v) ((uint32_t)((uint32_t)(v) << BP_SPI_PUSHR_EOQ) & BM_SPI_PUSHR_EOQ)
/*! @brief Set the EOQ field to a new value. */
#define BW_SPI_PUSHR_EOQ(x, v) (BITBAND_ACCESS32(HW_SPI_PUSHR_ADDR(x), BP_SPI_PUSHR_EOQ) = (v))
#define BW_SPI_PUSHR_EOQ(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_PUSHR_ADDR(x), BP_SPI_PUSHR_EOQ), v))
/*@}*/
/*!
@ -1900,7 +1907,7 @@ typedef union _hw_spi_pushr
#define BS_SPI_PUSHR_CTAS (3U) /*!< Bit field size in bits for SPI_PUSHR_CTAS. */
/*! @brief Read current value of the SPI_PUSHR_CTAS field. */
#define BR_SPI_PUSHR_CTAS(x) (HW_SPI_PUSHR(x).B.CTAS)
#define BR_SPI_PUSHR_CTAS(x) (UNION_READ(hw_spi_pushr_t, HW_SPI_PUSHR_ADDR(x), U, B.CTAS))
/*! @brief Format value for bitfield SPI_PUSHR_CTAS. */
#define BF_SPI_PUSHR_CTAS(v) ((uint32_t)((uint32_t)(v) << BP_SPI_PUSHR_CTAS) & BM_SPI_PUSHR_CTAS)
@ -1925,13 +1932,13 @@ typedef union _hw_spi_pushr
#define BS_SPI_PUSHR_CONT (1U) /*!< Bit field size in bits for SPI_PUSHR_CONT. */
/*! @brief Read current value of the SPI_PUSHR_CONT field. */
#define BR_SPI_PUSHR_CONT(x) (BITBAND_ACCESS32(HW_SPI_PUSHR_ADDR(x), BP_SPI_PUSHR_CONT))
#define BR_SPI_PUSHR_CONT(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_SPI_PUSHR_ADDR(x), BP_SPI_PUSHR_CONT)))
/*! @brief Format value for bitfield SPI_PUSHR_CONT. */
#define BF_SPI_PUSHR_CONT(v) ((uint32_t)((uint32_t)(v) << BP_SPI_PUSHR_CONT) & BM_SPI_PUSHR_CONT)
/*! @brief Set the CONT field to a new value. */
#define BW_SPI_PUSHR_CONT(x, v) (BITBAND_ACCESS32(HW_SPI_PUSHR_ADDR(x), BP_SPI_PUSHR_CONT) = (v))
#define BW_SPI_PUSHR_CONT(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_SPI_PUSHR_ADDR(x), BP_SPI_PUSHR_CONT), v))
/*@}*/
/*******************************************************************************
* HW_SPI_PUSHR_SLAVE - PUSH TX FIFO Register In Slave Mode
@ -1964,8 +1971,8 @@ typedef union _hw_spi_pushr_slave
#define HW_SPI_PUSHR_SLAVE_ADDR(x) ((x) + 0x34U)
#define HW_SPI_PUSHR_SLAVE(x) (*(__IO hw_spi_pushr_slave_t *) HW_SPI_PUSHR_SLAVE_ADDR(x))
#define HW_SPI_PUSHR_SLAVE_RD(x) (HW_SPI_PUSHR_SLAVE(x).U)
#define HW_SPI_PUSHR_SLAVE_WR(x, v) (HW_SPI_PUSHR_SLAVE(x).U = (v))
#define HW_SPI_PUSHR_SLAVE_RD(x) (ADDRESS_READ(hw_spi_pushr_slave_t, HW_SPI_PUSHR_SLAVE_ADDR(x)))
#define HW_SPI_PUSHR_SLAVE_WR(x, v) (ADDRESS_WRITE(hw_spi_pushr_slave_t, HW_SPI_PUSHR_SLAVE_ADDR(x), v))
#define HW_SPI_PUSHR_SLAVE_SET(x, v) (HW_SPI_PUSHR_SLAVE_WR(x, HW_SPI_PUSHR_SLAVE_RD(x) | (v)))
#define HW_SPI_PUSHR_SLAVE_CLR(x, v) (HW_SPI_PUSHR_SLAVE_WR(x, HW_SPI_PUSHR_SLAVE_RD(x) & ~(v)))
#define HW_SPI_PUSHR_SLAVE_TOG(x, v) (HW_SPI_PUSHR_SLAVE_WR(x, HW_SPI_PUSHR_SLAVE_RD(x) ^ (v)))
@ -2024,7 +2031,7 @@ typedef union _hw_spi_popr
#define HW_SPI_POPR_ADDR(x) ((x) + 0x38U)
#define HW_SPI_POPR(x) (*(__I hw_spi_popr_t *) HW_SPI_POPR_ADDR(x))
#define HW_SPI_POPR_RD(x) (HW_SPI_POPR(x).U)
#define HW_SPI_POPR_RD(x) (ADDRESS_READ(hw_spi_popr_t, HW_SPI_POPR_ADDR(x)))
/*@}*/
/*
@ -2080,7 +2087,7 @@ typedef union _hw_spi_txfrn
#define HW_SPI_TXFRn_ADDR(x, n) ((x) + 0x3CU + (0x4U * (n)))
#define HW_SPI_TXFRn(x, n) (*(__I hw_spi_txfrn_t *) HW_SPI_TXFRn_ADDR(x, n))
#define HW_SPI_TXFRn_RD(x, n) (HW_SPI_TXFRn(x, n).U)
#define HW_SPI_TXFRn_RD(x, n) (ADDRESS_READ(hw_spi_txfrn_t, HW_SPI_TXFRn_ADDR(x, n)))
/*@}*/
/*
@ -2098,7 +2105,7 @@ typedef union _hw_spi_txfrn
#define BS_SPI_TXFRn_TXDATA (16U) /*!< Bit field size in bits for SPI_TXFRn_TXDATA. */
/*! @brief Read current value of the SPI_TXFRn_TXDATA field. */
#define BR_SPI_TXFRn_TXDATA(x, n) (HW_SPI_TXFRn(x, n).B.TXDATA)
#define BR_SPI_TXFRn_TXDATA(x, n) (UNION_READ(hw_spi_txfrn_t, HW_SPI_TXFRn_ADDR(x, n), U, B.TXDATA))
/*@}*/
/*!
@ -2114,7 +2121,7 @@ typedef union _hw_spi_txfrn
#define BS_SPI_TXFRn_TXCMD_TXDATA (16U) /*!< Bit field size in bits for SPI_TXFRn_TXCMD_TXDATA. */
/*! @brief Read current value of the SPI_TXFRn_TXCMD_TXDATA field. */
#define BR_SPI_TXFRn_TXCMD_TXDATA(x, n) (HW_SPI_TXFRn(x, n).B.TXCMD_TXDATA)
#define BR_SPI_TXFRn_TXCMD_TXDATA(x, n) (UNION_READ(hw_spi_txfrn_t, HW_SPI_TXFRn_ADDR(x, n), U, B.TXCMD_TXDATA))
/*@}*/
/*******************************************************************************
@ -2148,7 +2155,7 @@ typedef union _hw_spi_rxfrn
#define HW_SPI_RXFRn_ADDR(x, n) ((x) + 0x7CU + (0x4U * (n)))
#define HW_SPI_RXFRn(x, n) (*(__I hw_spi_rxfrn_t *) HW_SPI_RXFRn_ADDR(x, n))
#define HW_SPI_RXFRn_RD(x, n) (HW_SPI_RXFRn(x, n).U)
#define HW_SPI_RXFRn_RD(x, n) (ADDRESS_READ(hw_spi_rxfrn_t, HW_SPI_RXFRn_ADDR(x, n)))
/*@}*/
/*

465
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_uart.h
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hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_usb.h
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hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_usbdcd.h
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@ -15,6 +15,9 @@
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** (C) COPYRIGHT 2015-2015 ARM Limited
** ALL RIGHTS RESERVED
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
@ -68,6 +71,10 @@
** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
** Update of SystemInit() and SystemCoreClockUpdate() functions.
** Module access macro module_BASES replaced by module_BASE_PTRS.
** - rev. 2.6 (2015-08-03) (ARM)
** All accesses to memory are replaced by equivalent macros; this allows
** memory read/write operations to be re-defined if needed (for example,
** to implement new security features
**
** ###################################################################
*/
@ -138,8 +145,8 @@ typedef union _hw_usbdcd_control
#define HW_USBDCD_CONTROL_ADDR(x) ((x) + 0x0U)
#define HW_USBDCD_CONTROL(x) (*(__IO hw_usbdcd_control_t *) HW_USBDCD_CONTROL_ADDR(x))
#define HW_USBDCD_CONTROL_RD(x) (HW_USBDCD_CONTROL(x).U)
#define HW_USBDCD_CONTROL_WR(x, v) (HW_USBDCD_CONTROL(x).U = (v))
#define HW_USBDCD_CONTROL_RD(x) (ADDRESS_READ(hw_usbdcd_control_t, HW_USBDCD_CONTROL_ADDR(x)))
#define HW_USBDCD_CONTROL_WR(x, v) (ADDRESS_WRITE(hw_usbdcd_control_t, HW_USBDCD_CONTROL_ADDR(x), v))
#define HW_USBDCD_CONTROL_SET(x, v) (HW_USBDCD_CONTROL_WR(x, HW_USBDCD_CONTROL_RD(x) | (v)))
#define HW_USBDCD_CONTROL_CLR(x, v) (HW_USBDCD_CONTROL_WR(x, HW_USBDCD_CONTROL_RD(x) & ~(v)))
#define HW_USBDCD_CONTROL_TOG(x, v) (HW_USBDCD_CONTROL_WR(x, HW_USBDCD_CONTROL_RD(x) ^ (v)))
@ -167,7 +174,7 @@ typedef union _hw_usbdcd_control
#define BF_USBDCD_CONTROL_IACK(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_CONTROL_IACK) & BM_USBDCD_CONTROL_IACK)
/*! @brief Set the IACK field to a new value. */
#define BW_USBDCD_CONTROL_IACK(x, v) (BITBAND_ACCESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_IACK) = (v))
#define BW_USBDCD_CONTROL_IACK(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_IACK), v))
/*@}*/
/*!
@ -185,7 +192,7 @@ typedef union _hw_usbdcd_control
#define BS_USBDCD_CONTROL_IF (1U) /*!< Bit field size in bits for USBDCD_CONTROL_IF. */
/*! @brief Read current value of the USBDCD_CONTROL_IF field. */
#define BR_USBDCD_CONTROL_IF(x) (BITBAND_ACCESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_IF))
#define BR_USBDCD_CONTROL_IF(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_IF)))
/*@}*/
/*!
@ -203,13 +210,13 @@ typedef union _hw_usbdcd_control
#define BS_USBDCD_CONTROL_IE (1U) /*!< Bit field size in bits for USBDCD_CONTROL_IE. */
/*! @brief Read current value of the USBDCD_CONTROL_IE field. */
#define BR_USBDCD_CONTROL_IE(x) (BITBAND_ACCESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_IE))
#define BR_USBDCD_CONTROL_IE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_IE)))
/*! @brief Format value for bitfield USBDCD_CONTROL_IE. */
#define BF_USBDCD_CONTROL_IE(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_CONTROL_IE) & BM_USBDCD_CONTROL_IE)
/*! @brief Set the IE field to a new value. */
#define BW_USBDCD_CONTROL_IE(x, v) (BITBAND_ACCESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_IE) = (v))
#define BW_USBDCD_CONTROL_IE(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_IE), v))
/*@}*/
/*!
@ -227,13 +234,13 @@ typedef union _hw_usbdcd_control
#define BS_USBDCD_CONTROL_BC12 (1U) /*!< Bit field size in bits for USBDCD_CONTROL_BC12. */
/*! @brief Read current value of the USBDCD_CONTROL_BC12 field. */
#define BR_USBDCD_CONTROL_BC12(x) (BITBAND_ACCESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_BC12))
#define BR_USBDCD_CONTROL_BC12(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_BC12)))
/*! @brief Format value for bitfield USBDCD_CONTROL_BC12. */
#define BF_USBDCD_CONTROL_BC12(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_CONTROL_BC12) & BM_USBDCD_CONTROL_BC12)
/*! @brief Set the BC12 field to a new value. */
#define BW_USBDCD_CONTROL_BC12(x, v) (BITBAND_ACCESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_BC12) = (v))
#define BW_USBDCD_CONTROL_BC12(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_BC12), v))
/*@}*/
/*!
@ -255,7 +262,7 @@ typedef union _hw_usbdcd_control
#define BF_USBDCD_CONTROL_START(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_CONTROL_START) & BM_USBDCD_CONTROL_START)
/*! @brief Set the START field to a new value. */
#define BW_USBDCD_CONTROL_START(x, v) (BITBAND_ACCESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_START) = (v))
#define BW_USBDCD_CONTROL_START(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_START), v))
/*@}*/
/*!
@ -276,7 +283,7 @@ typedef union _hw_usbdcd_control
#define BF_USBDCD_CONTROL_SR(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_CONTROL_SR) & BM_USBDCD_CONTROL_SR)
/*! @brief Set the SR field to a new value. */
#define BW_USBDCD_CONTROL_SR(x, v) (BITBAND_ACCESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_SR) = (v))
#define BW_USBDCD_CONTROL_SR(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_USBDCD_CONTROL_ADDR(x), BP_USBDCD_CONTROL_SR), v))
/*@}*/
/*******************************************************************************
@ -309,8 +316,8 @@ typedef union _hw_usbdcd_clock
#define HW_USBDCD_CLOCK_ADDR(x) ((x) + 0x4U)
#define HW_USBDCD_CLOCK(x) (*(__IO hw_usbdcd_clock_t *) HW_USBDCD_CLOCK_ADDR(x))
#define HW_USBDCD_CLOCK_RD(x) (HW_USBDCD_CLOCK(x).U)
#define HW_USBDCD_CLOCK_WR(x, v) (HW_USBDCD_CLOCK(x).U = (v))
#define HW_USBDCD_CLOCK_RD(x) (ADDRESS_READ(hw_usbdcd_clock_t, HW_USBDCD_CLOCK_ADDR(x)))
#define HW_USBDCD_CLOCK_WR(x, v) (ADDRESS_WRITE(hw_usbdcd_clock_t, HW_USBDCD_CLOCK_ADDR(x), v))
#define HW_USBDCD_CLOCK_SET(x, v) (HW_USBDCD_CLOCK_WR(x, HW_USBDCD_CLOCK_RD(x) | (v)))
#define HW_USBDCD_CLOCK_CLR(x, v) (HW_USBDCD_CLOCK_WR(x, HW_USBDCD_CLOCK_RD(x) & ~(v)))
#define HW_USBDCD_CLOCK_TOG(x, v) (HW_USBDCD_CLOCK_WR(x, HW_USBDCD_CLOCK_RD(x) ^ (v)))
@ -335,13 +342,13 @@ typedef union _hw_usbdcd_clock
#define BS_USBDCD_CLOCK_CLOCK_UNIT (1U) /*!< Bit field size in bits for USBDCD_CLOCK_CLOCK_UNIT. */
/*! @brief Read current value of the USBDCD_CLOCK_CLOCK_UNIT field. */
#define BR_USBDCD_CLOCK_CLOCK_UNIT(x) (BITBAND_ACCESS32(HW_USBDCD_CLOCK_ADDR(x), BP_USBDCD_CLOCK_CLOCK_UNIT))
#define BR_USBDCD_CLOCK_CLOCK_UNIT(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_USBDCD_CLOCK_ADDR(x), BP_USBDCD_CLOCK_CLOCK_UNIT)))
/*! @brief Format value for bitfield USBDCD_CLOCK_CLOCK_UNIT. */
#define BF_USBDCD_CLOCK_CLOCK_UNIT(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_CLOCK_CLOCK_UNIT) & BM_USBDCD_CLOCK_CLOCK_UNIT)
/*! @brief Set the CLOCK_UNIT field to a new value. */
#define BW_USBDCD_CLOCK_CLOCK_UNIT(x, v) (BITBAND_ACCESS32(HW_USBDCD_CLOCK_ADDR(x), BP_USBDCD_CLOCK_CLOCK_UNIT) = (v))
#define BW_USBDCD_CLOCK_CLOCK_UNIT(x, v) (ADDRESS_WRITE(uint32_t, BITBAND_ADDRESS32(HW_USBDCD_CLOCK_ADDR(x), BP_USBDCD_CLOCK_CLOCK_UNIT), v))
/*@}*/
/*!
@ -359,7 +366,7 @@ typedef union _hw_usbdcd_clock
#define BS_USBDCD_CLOCK_CLOCK_SPEED (10U) /*!< Bit field size in bits for USBDCD_CLOCK_CLOCK_SPEED. */
/*! @brief Read current value of the USBDCD_CLOCK_CLOCK_SPEED field. */
#define BR_USBDCD_CLOCK_CLOCK_SPEED(x) (HW_USBDCD_CLOCK(x).B.CLOCK_SPEED)
#define BR_USBDCD_CLOCK_CLOCK_SPEED(x) (UNION_READ(hw_usbdcd_clock_t, HW_USBDCD_CLOCK_ADDR(x), U, B.CLOCK_SPEED))
/*! @brief Format value for bitfield USBDCD_CLOCK_CLOCK_SPEED. */
#define BF_USBDCD_CLOCK_CLOCK_SPEED(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_CLOCK_CLOCK_SPEED) & BM_USBDCD_CLOCK_CLOCK_SPEED)
@ -403,7 +410,7 @@ typedef union _hw_usbdcd_status
#define HW_USBDCD_STATUS_ADDR(x) ((x) + 0x8U)
#define HW_USBDCD_STATUS(x) (*(__I hw_usbdcd_status_t *) HW_USBDCD_STATUS_ADDR(x))
#define HW_USBDCD_STATUS_RD(x) (HW_USBDCD_STATUS(x).U)
#define HW_USBDCD_STATUS_RD(x) (ADDRESS_READ(hw_usbdcd_status_t, HW_USBDCD_STATUS_ADDR(x)))
/*@}*/
/*
@ -431,7 +438,7 @@ typedef union _hw_usbdcd_status
#define BS_USBDCD_STATUS_SEQ_RES (2U) /*!< Bit field size in bits for USBDCD_STATUS_SEQ_RES. */
/*! @brief Read current value of the USBDCD_STATUS_SEQ_RES field. */
#define BR_USBDCD_STATUS_SEQ_RES(x) (HW_USBDCD_STATUS(x).B.SEQ_RES)
#define BR_USBDCD_STATUS_SEQ_RES(x) (UNION_READ(hw_usbdcd_status_t, HW_USBDCD_STATUS_ADDR(x), U, B.SEQ_RES))
/*@}*/
/*!
@ -452,7 +459,7 @@ typedef union _hw_usbdcd_status
#define BS_USBDCD_STATUS_SEQ_STAT (2U) /*!< Bit field size in bits for USBDCD_STATUS_SEQ_STAT. */
/*! @brief Read current value of the USBDCD_STATUS_SEQ_STAT field. */
#define BR_USBDCD_STATUS_SEQ_STAT(x) (HW_USBDCD_STATUS(x).B.SEQ_STAT)
#define BR_USBDCD_STATUS_SEQ_STAT(x) (UNION_READ(hw_usbdcd_status_t, HW_USBDCD_STATUS_ADDR(x), U, B.SEQ_STAT))
/*@}*/
/*!
@ -471,7 +478,7 @@ typedef union _hw_usbdcd_status
#define BS_USBDCD_STATUS_ERR (1U) /*!< Bit field size in bits for USBDCD_STATUS_ERR. */
/*! @brief Read current value of the USBDCD_STATUS_ERR field. */
#define BR_USBDCD_STATUS_ERR(x) (BITBAND_ACCESS32(HW_USBDCD_STATUS_ADDR(x), BP_USBDCD_STATUS_ERR))
#define BR_USBDCD_STATUS_ERR(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_USBDCD_STATUS_ADDR(x), BP_USBDCD_STATUS_ERR)))
/*@}*/
/*!
@ -490,7 +497,7 @@ typedef union _hw_usbdcd_status
#define BS_USBDCD_STATUS_TO (1U) /*!< Bit field size in bits for USBDCD_STATUS_TO. */
/*! @brief Read current value of the USBDCD_STATUS_TO field. */
#define BR_USBDCD_STATUS_TO(x) (BITBAND_ACCESS32(HW_USBDCD_STATUS_ADDR(x), BP_USBDCD_STATUS_TO))
#define BR_USBDCD_STATUS_TO(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_USBDCD_STATUS_ADDR(x), BP_USBDCD_STATUS_TO)))
/*@}*/
/*!
@ -508,7 +515,7 @@ typedef union _hw_usbdcd_status
#define BS_USBDCD_STATUS_ACTIVE (1U) /*!< Bit field size in bits for USBDCD_STATUS_ACTIVE. */
/*! @brief Read current value of the USBDCD_STATUS_ACTIVE field. */
#define BR_USBDCD_STATUS_ACTIVE(x) (BITBAND_ACCESS32(HW_USBDCD_STATUS_ADDR(x), BP_USBDCD_STATUS_ACTIVE))
#define BR_USBDCD_STATUS_ACTIVE(x) (ADDRESS_READ(uint32_t, BITBAND_ADDRESS32(HW_USBDCD_STATUS_ADDR(x), BP_USBDCD_STATUS_ACTIVE)))
/*@}*/
/*******************************************************************************
@ -548,8 +555,8 @@ typedef union _hw_usbdcd_timer0
#define HW_USBDCD_TIMER0_ADDR(x) ((x) + 0x10U)
#define HW_USBDCD_TIMER0(x) (*(__IO hw_usbdcd_timer0_t *) HW_USBDCD_TIMER0_ADDR(x))
#define HW_USBDCD_TIMER0_RD(x) (HW_USBDCD_TIMER0(x).U)
#define HW_USBDCD_TIMER0_WR(x, v) (HW_USBDCD_TIMER0(x).U = (v))
#define HW_USBDCD_TIMER0_RD(x) (ADDRESS_READ(hw_usbdcd_timer0_t, HW_USBDCD_TIMER0_ADDR(x)))
#define HW_USBDCD_TIMER0_WR(x, v) (ADDRESS_WRITE(hw_usbdcd_timer0_t, HW_USBDCD_TIMER0_ADDR(x), v))
#define HW_USBDCD_TIMER0_SET(x, v) (HW_USBDCD_TIMER0_WR(x, HW_USBDCD_TIMER0_RD(x) | (v)))
#define HW_USBDCD_TIMER0_CLR(x, v) (HW_USBDCD_TIMER0_WR(x, HW_USBDCD_TIMER0_RD(x) & ~(v)))
#define HW_USBDCD_TIMER0_TOG(x, v) (HW_USBDCD_TIMER0_WR(x, HW_USBDCD_TIMER0_RD(x) ^ (v)))
@ -579,7 +586,7 @@ typedef union _hw_usbdcd_timer0
#define BS_USBDCD_TIMER0_TUNITCON (12U) /*!< Bit field size in bits for USBDCD_TIMER0_TUNITCON. */
/*! @brief Read current value of the USBDCD_TIMER0_TUNITCON field. */
#define BR_USBDCD_TIMER0_TUNITCON(x) (HW_USBDCD_TIMER0(x).B.TUNITCON)
#define BR_USBDCD_TIMER0_TUNITCON(x) (UNION_READ(hw_usbdcd_timer0_t, HW_USBDCD_TIMER0_ADDR(x), U, B.TUNITCON))
/*@}*/
/*!
@ -598,7 +605,7 @@ typedef union _hw_usbdcd_timer0
#define BS_USBDCD_TIMER0_TSEQ_INIT (10U) /*!< Bit field size in bits for USBDCD_TIMER0_TSEQ_INIT. */
/*! @brief Read current value of the USBDCD_TIMER0_TSEQ_INIT field. */
#define BR_USBDCD_TIMER0_TSEQ_INIT(x) (HW_USBDCD_TIMER0(x).B.TSEQ_INIT)
#define BR_USBDCD_TIMER0_TSEQ_INIT(x) (UNION_READ(hw_usbdcd_timer0_t, HW_USBDCD_TIMER0_ADDR(x), U, B.TSEQ_INIT))
/*! @brief Format value for bitfield USBDCD_TIMER0_TSEQ_INIT. */
#define BF_USBDCD_TIMER0_TSEQ_INIT(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_TIMER0_TSEQ_INIT) & BM_USBDCD_TIMER0_TSEQ_INIT)
@ -640,8 +647,8 @@ typedef union _hw_usbdcd_timer1
#define HW_USBDCD_TIMER1_ADDR(x) ((x) + 0x14U)
#define HW_USBDCD_TIMER1(x) (*(__IO hw_usbdcd_timer1_t *) HW_USBDCD_TIMER1_ADDR(x))
#define HW_USBDCD_TIMER1_RD(x) (HW_USBDCD_TIMER1(x).U)
#define HW_USBDCD_TIMER1_WR(x, v) (HW_USBDCD_TIMER1(x).U = (v))
#define HW_USBDCD_TIMER1_RD(x) (ADDRESS_READ(hw_usbdcd_timer1_t, HW_USBDCD_TIMER1_ADDR(x)))
#define HW_USBDCD_TIMER1_WR(x, v) (ADDRESS_WRITE(hw_usbdcd_timer1_t, HW_USBDCD_TIMER1_ADDR(x), v))
#define HW_USBDCD_TIMER1_SET(x, v) (HW_USBDCD_TIMER1_WR(x, HW_USBDCD_TIMER1_RD(x) | (v)))
#define HW_USBDCD_TIMER1_CLR(x, v) (HW_USBDCD_TIMER1_WR(x, HW_USBDCD_TIMER1_RD(x) & ~(v)))
#define HW_USBDCD_TIMER1_TOG(x, v) (HW_USBDCD_TIMER1_WR(x, HW_USBDCD_TIMER1_RD(x) ^ (v)))
@ -664,7 +671,7 @@ typedef union _hw_usbdcd_timer1
#define BS_USBDCD_TIMER1_TVDPSRC_ON (10U) /*!< Bit field size in bits for USBDCD_TIMER1_TVDPSRC_ON. */
/*! @brief Read current value of the USBDCD_TIMER1_TVDPSRC_ON field. */
#define BR_USBDCD_TIMER1_TVDPSRC_ON(x) (HW_USBDCD_TIMER1(x).B.TVDPSRC_ON)
#define BR_USBDCD_TIMER1_TVDPSRC_ON(x) (UNION_READ(hw_usbdcd_timer1_t, HW_USBDCD_TIMER1_ADDR(x), U, B.TVDPSRC_ON))
/*! @brief Format value for bitfield USBDCD_TIMER1_TVDPSRC_ON. */
#define BF_USBDCD_TIMER1_TVDPSRC_ON(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_TIMER1_TVDPSRC_ON) & BM_USBDCD_TIMER1_TVDPSRC_ON)
@ -687,7 +694,7 @@ typedef union _hw_usbdcd_timer1
#define BS_USBDCD_TIMER1_TDCD_DBNC (10U) /*!< Bit field size in bits for USBDCD_TIMER1_TDCD_DBNC. */
/*! @brief Read current value of the USBDCD_TIMER1_TDCD_DBNC field. */
#define BR_USBDCD_TIMER1_TDCD_DBNC(x) (HW_USBDCD_TIMER1(x).B.TDCD_DBNC)
#define BR_USBDCD_TIMER1_TDCD_DBNC(x) (UNION_READ(hw_usbdcd_timer1_t, HW_USBDCD_TIMER1_ADDR(x), U, B.TDCD_DBNC))
/*! @brief Format value for bitfield USBDCD_TIMER1_TDCD_DBNC. */
#define BF_USBDCD_TIMER1_TDCD_DBNC(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_TIMER1_TDCD_DBNC) & BM_USBDCD_TIMER1_TDCD_DBNC)
@ -730,8 +737,8 @@ typedef union _hw_usbdcd_timer2_bc11
#define HW_USBDCD_TIMER2_BC11_ADDR(x) ((x) + 0x18U)
#define HW_USBDCD_TIMER2_BC11(x) (*(__IO hw_usbdcd_timer2_bc11_t *) HW_USBDCD_TIMER2_BC11_ADDR(x))
#define HW_USBDCD_TIMER2_BC11_RD(x) (HW_USBDCD_TIMER2_BC11(x).U)
#define HW_USBDCD_TIMER2_BC11_WR(x, v) (HW_USBDCD_TIMER2_BC11(x).U = (v))
#define HW_USBDCD_TIMER2_BC11_RD(x) (ADDRESS_READ(hw_usbdcd_timer2_bc11_t, HW_USBDCD_TIMER2_BC11_ADDR(x)))
#define HW_USBDCD_TIMER2_BC11_WR(x, v) (ADDRESS_WRITE(hw_usbdcd_timer2_bc11_t, HW_USBDCD_TIMER2_BC11_ADDR(x), v))
#define HW_USBDCD_TIMER2_BC11_SET(x, v) (HW_USBDCD_TIMER2_BC11_WR(x, HW_USBDCD_TIMER2_BC11_RD(x) | (v)))
#define HW_USBDCD_TIMER2_BC11_CLR(x, v) (HW_USBDCD_TIMER2_BC11_WR(x, HW_USBDCD_TIMER2_BC11_RD(x) & ~(v)))
#define HW_USBDCD_TIMER2_BC11_TOG(x, v) (HW_USBDCD_TIMER2_BC11_WR(x, HW_USBDCD_TIMER2_BC11_RD(x) ^ (v)))
@ -754,7 +761,7 @@ typedef union _hw_usbdcd_timer2_bc11
#define BS_USBDCD_TIMER2_BC11_CHECK_DM (4U) /*!< Bit field size in bits for USBDCD_TIMER2_BC11_CHECK_DM. */
/*! @brief Read current value of the USBDCD_TIMER2_BC11_CHECK_DM field. */
#define BR_USBDCD_TIMER2_BC11_CHECK_DM(x) (HW_USBDCD_TIMER2_BC11(x).B.CHECK_DM)
#define BR_USBDCD_TIMER2_BC11_CHECK_DM(x) (UNION_READ(hw_usbdcd_timer2_bc11_t, HW_USBDCD_TIMER2_BC11_ADDR(x), U, B.CHECK_DM))
/*! @brief Format value for bitfield USBDCD_TIMER2_BC11_CHECK_DM. */
#define BF_USBDCD_TIMER2_BC11_CHECK_DM(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_TIMER2_BC11_CHECK_DM) & BM_USBDCD_TIMER2_BC11_CHECK_DM)
@ -777,7 +784,7 @@ typedef union _hw_usbdcd_timer2_bc11
#define BS_USBDCD_TIMER2_BC11_TVDPSRC_CON (10U) /*!< Bit field size in bits for USBDCD_TIMER2_BC11_TVDPSRC_CON. */
/*! @brief Read current value of the USBDCD_TIMER2_BC11_TVDPSRC_CON field. */
#define BR_USBDCD_TIMER2_BC11_TVDPSRC_CON(x) (HW_USBDCD_TIMER2_BC11(x).B.TVDPSRC_CON)
#define BR_USBDCD_TIMER2_BC11_TVDPSRC_CON(x) (UNION_READ(hw_usbdcd_timer2_bc11_t, HW_USBDCD_TIMER2_BC11_ADDR(x), U, B.TVDPSRC_CON))
/*! @brief Format value for bitfield USBDCD_TIMER2_BC11_TVDPSRC_CON. */
#define BF_USBDCD_TIMER2_BC11_TVDPSRC_CON(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_TIMER2_BC11_TVDPSRC_CON) & BM_USBDCD_TIMER2_BC11_TVDPSRC_CON)
@ -818,8 +825,8 @@ typedef union _hw_usbdcd_timer2_bc12
#define HW_USBDCD_TIMER2_BC12_ADDR(x) ((x) + 0x18U)
#define HW_USBDCD_TIMER2_BC12(x) (*(__IO hw_usbdcd_timer2_bc12_t *) HW_USBDCD_TIMER2_BC12_ADDR(x))
#define HW_USBDCD_TIMER2_BC12_RD(x) (HW_USBDCD_TIMER2_BC12(x).U)
#define HW_USBDCD_TIMER2_BC12_WR(x, v) (HW_USBDCD_TIMER2_BC12(x).U = (v))
#define HW_USBDCD_TIMER2_BC12_RD(x) (ADDRESS_READ(hw_usbdcd_timer2_bc12_t, HW_USBDCD_TIMER2_BC12_ADDR(x)))
#define HW_USBDCD_TIMER2_BC12_WR(x, v) (ADDRESS_WRITE(hw_usbdcd_timer2_bc12_t, HW_USBDCD_TIMER2_BC12_ADDR(x), v))
#define HW_USBDCD_TIMER2_BC12_SET(x, v) (HW_USBDCD_TIMER2_BC12_WR(x, HW_USBDCD_TIMER2_BC12_RD(x) | (v)))
#define HW_USBDCD_TIMER2_BC12_CLR(x, v) (HW_USBDCD_TIMER2_BC12_WR(x, HW_USBDCD_TIMER2_BC12_RD(x) & ~(v)))
#define HW_USBDCD_TIMER2_BC12_TOG(x, v) (HW_USBDCD_TIMER2_BC12_WR(x, HW_USBDCD_TIMER2_BC12_RD(x) ^ (v)))
@ -841,7 +848,7 @@ typedef union _hw_usbdcd_timer2_bc12
#define BS_USBDCD_TIMER2_BC12_TVDMSRC_ON (10U) /*!< Bit field size in bits for USBDCD_TIMER2_BC12_TVDMSRC_ON. */
/*! @brief Read current value of the USBDCD_TIMER2_BC12_TVDMSRC_ON field. */
#define BR_USBDCD_TIMER2_BC12_TVDMSRC_ON(x) (HW_USBDCD_TIMER2_BC12(x).B.TVDMSRC_ON)
#define BR_USBDCD_TIMER2_BC12_TVDMSRC_ON(x) (UNION_READ(hw_usbdcd_timer2_bc12_t, HW_USBDCD_TIMER2_BC12_ADDR(x), U, B.TVDMSRC_ON))
/*! @brief Format value for bitfield USBDCD_TIMER2_BC12_TVDMSRC_ON. */
#define BF_USBDCD_TIMER2_BC12_TVDMSRC_ON(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_TIMER2_BC12_TVDMSRC_ON) & BM_USBDCD_TIMER2_BC12_TVDMSRC_ON)
@ -863,7 +870,7 @@ typedef union _hw_usbdcd_timer2_bc12
#define BS_USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD (10U) /*!< Bit field size in bits for USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD. */
/*! @brief Read current value of the USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD field. */
#define BR_USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD(x) (HW_USBDCD_TIMER2_BC12(x).B.TWAIT_AFTER_PRD)
#define BR_USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD(x) (UNION_READ(hw_usbdcd_timer2_bc12_t, HW_USBDCD_TIMER2_BC12_ADDR(x), U, B.TWAIT_AFTER_PRD))
/*! @brief Format value for bitfield USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD. */
#define BF_USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD(v) ((uint32_t)((uint32_t)(v) << BP_USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD) & BM_USBDCD_TIMER2_BC12_TWAIT_AFTER_PRD)

37
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_vref.h
View File

@ -15,6 +15,9 @@
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** (C) COPYRIGHT 2015-2015 ARM Limited
** ALL RIGHTS RESERVED
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
@ -68,6 +71,10 @@
** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
** Update of SystemInit() and SystemCoreClockUpdate() functions.
** Module access macro module_BASES replaced by module_BASE_PTRS.
** - rev. 2.6 (2015-08-03) (ARM)
** All accesses to memory are replaced by equivalent macros; this allows
** memory read/write operations to be re-defined if needed (for example,
** to implement new security features
**
** ###################################################################
*/
@ -129,8 +136,8 @@ typedef union _hw_vref_trm
#define HW_VREF_TRM_ADDR(x) ((x) + 0x0U)
#define HW_VREF_TRM(x) (*(__IO hw_vref_trm_t *) HW_VREF_TRM_ADDR(x))
#define HW_VREF_TRM_RD(x) (HW_VREF_TRM(x).U)
#define HW_VREF_TRM_WR(x, v) (HW_VREF_TRM(x).U = (v))
#define HW_VREF_TRM_RD(x) (ADDRESS_READ(hw_vref_trm_t, HW_VREF_TRM_ADDR(x)))
#define HW_VREF_TRM_WR(x, v) (ADDRESS_WRITE(hw_vref_trm_t, HW_VREF_TRM_ADDR(x), v))
#define HW_VREF_TRM_SET(x, v) (HW_VREF_TRM_WR(x, HW_VREF_TRM_RD(x) | (v)))
#define HW_VREF_TRM_CLR(x, v) (HW_VREF_TRM_WR(x, HW_VREF_TRM_RD(x) & ~(v)))
#define HW_VREF_TRM_TOG(x, v) (HW_VREF_TRM_WR(x, HW_VREF_TRM_RD(x) ^ (v)))
@ -157,7 +164,7 @@ typedef union _hw_vref_trm
#define BS_VREF_TRM_TRIM (6U) /*!< Bit field size in bits for VREF_TRM_TRIM. */
/*! @brief Read current value of the VREF_TRM_TRIM field. */
#define BR_VREF_TRM_TRIM(x) (HW_VREF_TRM(x).B.TRIM)
#define BR_VREF_TRM_TRIM(x) (UNION_READ(hw_vref_trm_t, HW_VREF_TRM_ADDR(x), U, B.TRIM))
/*! @brief Format value for bitfield VREF_TRM_TRIM. */
#define BF_VREF_TRM_TRIM(v) ((uint8_t)((uint8_t)(v) << BP_VREF_TRM_TRIM) & BM_VREF_TRM_TRIM)
@ -182,13 +189,13 @@ typedef union _hw_vref_trm
#define BS_VREF_TRM_CHOPEN (1U) /*!< Bit field size in bits for VREF_TRM_CHOPEN. */
/*! @brief Read current value of the VREF_TRM_CHOPEN field. */
#define BR_VREF_TRM_CHOPEN(x) (BITBAND_ACCESS8(HW_VREF_TRM_ADDR(x), BP_VREF_TRM_CHOPEN))
#define BR_VREF_TRM_CHOPEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_VREF_TRM_ADDR(x), BP_VREF_TRM_CHOPEN)))
/*! @brief Format value for bitfield VREF_TRM_CHOPEN. */
#define BF_VREF_TRM_CHOPEN(v) ((uint8_t)((uint8_t)(v) << BP_VREF_TRM_CHOPEN) & BM_VREF_TRM_CHOPEN)
/*! @brief Set the CHOPEN field to a new value. */
#define BW_VREF_TRM_CHOPEN(x, v) (BITBAND_ACCESS8(HW_VREF_TRM_ADDR(x), BP_VREF_TRM_CHOPEN) = (v))
#define BW_VREF_TRM_CHOPEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_VREF_TRM_ADDR(x), BP_VREF_TRM_CHOPEN), v))
/*@}*/
/*******************************************************************************
@ -225,8 +232,8 @@ typedef union _hw_vref_sc
#define HW_VREF_SC_ADDR(x) ((x) + 0x1U)
#define HW_VREF_SC(x) (*(__IO hw_vref_sc_t *) HW_VREF_SC_ADDR(x))
#define HW_VREF_SC_RD(x) (HW_VREF_SC(x).U)
#define HW_VREF_SC_WR(x, v) (HW_VREF_SC(x).U = (v))
#define HW_VREF_SC_RD(x) (ADDRESS_READ(hw_vref_sc_t, HW_VREF_SC_ADDR(x)))
#define HW_VREF_SC_WR(x, v) (ADDRESS_WRITE(hw_vref_sc_t, HW_VREF_SC_ADDR(x), v))
#define HW_VREF_SC_SET(x, v) (HW_VREF_SC_WR(x, HW_VREF_SC_RD(x) | (v)))
#define HW_VREF_SC_CLR(x, v) (HW_VREF_SC_WR(x, HW_VREF_SC_RD(x) & ~(v)))
#define HW_VREF_SC_TOG(x, v) (HW_VREF_SC_WR(x, HW_VREF_SC_RD(x) ^ (v)))
@ -253,7 +260,7 @@ typedef union _hw_vref_sc
#define BS_VREF_SC_MODE_LV (2U) /*!< Bit field size in bits for VREF_SC_MODE_LV. */
/*! @brief Read current value of the VREF_SC_MODE_LV field. */
#define BR_VREF_SC_MODE_LV(x) (HW_VREF_SC(x).B.MODE_LV)
#define BR_VREF_SC_MODE_LV(x) (UNION_READ(hw_vref_sc_t, HW_VREF_SC_ADDR(x), U, B.MODE_LV))
/*! @brief Format value for bitfield VREF_SC_MODE_LV. */
#define BF_VREF_SC_MODE_LV(v) ((uint8_t)((uint8_t)(v) << BP_VREF_SC_MODE_LV) & BM_VREF_SC_MODE_LV)
@ -278,7 +285,7 @@ typedef union _hw_vref_sc
#define BS_VREF_SC_VREFST (1U) /*!< Bit field size in bits for VREF_SC_VREFST. */
/*! @brief Read current value of the VREF_SC_VREFST field. */
#define BR_VREF_SC_VREFST(x) (BITBAND_ACCESS8(HW_VREF_SC_ADDR(x), BP_VREF_SC_VREFST))
#define BR_VREF_SC_VREFST(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_VREF_SC_ADDR(x), BP_VREF_SC_VREFST)))
/*@}*/
/*!
@ -297,13 +304,13 @@ typedef union _hw_vref_sc
#define BS_VREF_SC_ICOMPEN (1U) /*!< Bit field size in bits for VREF_SC_ICOMPEN. */
/*! @brief Read current value of the VREF_SC_ICOMPEN field. */
#define BR_VREF_SC_ICOMPEN(x) (BITBAND_ACCESS8(HW_VREF_SC_ADDR(x), BP_VREF_SC_ICOMPEN))
#define BR_VREF_SC_ICOMPEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_VREF_SC_ADDR(x), BP_VREF_SC_ICOMPEN)))
/*! @brief Format value for bitfield VREF_SC_ICOMPEN. */
#define BF_VREF_SC_ICOMPEN(v) ((uint8_t)((uint8_t)(v) << BP_VREF_SC_ICOMPEN) & BM_VREF_SC_ICOMPEN)
/*! @brief Set the ICOMPEN field to a new value. */
#define BW_VREF_SC_ICOMPEN(x, v) (BITBAND_ACCESS8(HW_VREF_SC_ADDR(x), BP_VREF_SC_ICOMPEN) = (v))
#define BW_VREF_SC_ICOMPEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_VREF_SC_ADDR(x), BP_VREF_SC_ICOMPEN), v))
/*@}*/
/*!
@ -327,13 +334,13 @@ typedef union _hw_vref_sc
#define BS_VREF_SC_REGEN (1U) /*!< Bit field size in bits for VREF_SC_REGEN. */
/*! @brief Read current value of the VREF_SC_REGEN field. */
#define BR_VREF_SC_REGEN(x) (BITBAND_ACCESS8(HW_VREF_SC_ADDR(x), BP_VREF_SC_REGEN))
#define BR_VREF_SC_REGEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_VREF_SC_ADDR(x), BP_VREF_SC_REGEN)))
/*! @brief Format value for bitfield VREF_SC_REGEN. */
#define BF_VREF_SC_REGEN(v) ((uint8_t)((uint8_t)(v) << BP_VREF_SC_REGEN) & BM_VREF_SC_REGEN)
/*! @brief Set the REGEN field to a new value. */
#define BW_VREF_SC_REGEN(x, v) (BITBAND_ACCESS8(HW_VREF_SC_ADDR(x), BP_VREF_SC_REGEN) = (v))
#define BW_VREF_SC_REGEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_VREF_SC_ADDR(x), BP_VREF_SC_REGEN), v))
/*@}*/
/*!
@ -354,13 +361,13 @@ typedef union _hw_vref_sc
#define BS_VREF_SC_VREFEN (1U) /*!< Bit field size in bits for VREF_SC_VREFEN. */
/*! @brief Read current value of the VREF_SC_VREFEN field. */
#define BR_VREF_SC_VREFEN(x) (BITBAND_ACCESS8(HW_VREF_SC_ADDR(x), BP_VREF_SC_VREFEN))
#define BR_VREF_SC_VREFEN(x) (ADDRESS_READ(uint8_t, BITBAND_ADDRESS8(HW_VREF_SC_ADDR(x), BP_VREF_SC_VREFEN)))
/*! @brief Format value for bitfield VREF_SC_VREFEN. */
#define BF_VREF_SC_VREFEN(v) ((uint8_t)((uint8_t)(v) << BP_VREF_SC_VREFEN) & BM_VREF_SC_VREFEN)
/*! @brief Set the VREFEN field to a new value. */
#define BW_VREF_SC_VREFEN(x, v) (BITBAND_ACCESS8(HW_VREF_SC_ADDR(x), BP_VREF_SC_VREFEN) = (v))
#define BW_VREF_SC_VREFEN(x, v) (ADDRESS_WRITE(uint8_t, BITBAND_ADDRESS8(HW_VREF_SC_ADDR(x), BP_VREF_SC_VREFEN), v))
/*@}*/
/*******************************************************************************

107
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/device/MK64F12/MK64F12_wdog.h
View File

@ -15,6 +15,9 @@
** Copyright (c) 2014 Freescale Semiconductor, Inc.
** All rights reserved.
**
** (C) COPYRIGHT 2015-2015 ARM Limited
** ALL RIGHTS RESERVED
**
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
@ -68,6 +71,10 @@
** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
** Update of SystemInit() and SystemCoreClockUpdate() functions.
** Module access macro module_BASES replaced by module_BASE_PTRS.
** - rev. 2.6 (2015-08-03) (ARM)
** All accesses to memory are replaced by equivalent macros; this allows
** memory read/write operations to be re-defined if needed (for example,
** to implement new security features
**
** ###################################################################
*/
@ -145,8 +152,8 @@ typedef union _hw_wdog_stctrlh
#define HW_WDOG_STCTRLH_ADDR(x) ((x) + 0x0U)
#define HW_WDOG_STCTRLH(x) (*(__IO hw_wdog_stctrlh_t *) HW_WDOG_STCTRLH_ADDR(x))
#define HW_WDOG_STCTRLH_RD(x) (HW_WDOG_STCTRLH(x).U)
#define HW_WDOG_STCTRLH_WR(x, v) (HW_WDOG_STCTRLH(x).U = (v))
#define HW_WDOG_STCTRLH_RD(x) (ADDRESS_READ(hw_wdog_stctrlh_t, HW_WDOG_STCTRLH_ADDR(x)))
#define HW_WDOG_STCTRLH_WR(x, v) (ADDRESS_WRITE(hw_wdog_stctrlh_t, HW_WDOG_STCTRLH_ADDR(x), v))
#define HW_WDOG_STCTRLH_SET(x, v) (HW_WDOG_STCTRLH_WR(x, HW_WDOG_STCTRLH_RD(x) | (v)))
#define HW_WDOG_STCTRLH_CLR(x, v) (HW_WDOG_STCTRLH_WR(x, HW_WDOG_STCTRLH_RD(x) & ~(v)))
#define HW_WDOG_STCTRLH_TOG(x, v) (HW_WDOG_STCTRLH_WR(x, HW_WDOG_STCTRLH_RD(x) ^ (v)))
@ -174,13 +181,13 @@ typedef union _hw_wdog_stctrlh
#define BS_WDOG_STCTRLH_WDOGEN (1U) /*!< Bit field size in bits for WDOG_STCTRLH_WDOGEN. */
/*! @brief Read current value of the WDOG_STCTRLH_WDOGEN field. */
#define BR_WDOG_STCTRLH_WDOGEN(x) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_WDOGEN))
#define BR_WDOG_STCTRLH_WDOGEN(x) (ADDRESS_READ(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_WDOGEN)))
/*! @brief Format value for bitfield WDOG_STCTRLH_WDOGEN. */
#define BF_WDOG_STCTRLH_WDOGEN(v) ((uint16_t)((uint16_t)(v) << BP_WDOG_STCTRLH_WDOGEN) & BM_WDOG_STCTRLH_WDOGEN)
/*! @brief Set the WDOGEN field to a new value. */
#define BW_WDOG_STCTRLH_WDOGEN(x, v) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_WDOGEN) = (v))
#define BW_WDOG_STCTRLH_WDOGEN(x, v) (ADDRESS_WRITE(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_WDOGEN), v))
/*@}*/
/*!
@ -198,13 +205,13 @@ typedef union _hw_wdog_stctrlh
#define BS_WDOG_STCTRLH_CLKSRC (1U) /*!< Bit field size in bits for WDOG_STCTRLH_CLKSRC. */
/*! @brief Read current value of the WDOG_STCTRLH_CLKSRC field. */
#define BR_WDOG_STCTRLH_CLKSRC(x) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_CLKSRC))
#define BR_WDOG_STCTRLH_CLKSRC(x) (ADDRESS_READ(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_CLKSRC)))
/*! @brief Format value for bitfield WDOG_STCTRLH_CLKSRC. */
#define BF_WDOG_STCTRLH_CLKSRC(v) ((uint16_t)((uint16_t)(v) << BP_WDOG_STCTRLH_CLKSRC) & BM_WDOG_STCTRLH_CLKSRC)
/*! @brief Set the CLKSRC field to a new value. */
#define BW_WDOG_STCTRLH_CLKSRC(x, v) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_CLKSRC) = (v))
#define BW_WDOG_STCTRLH_CLKSRC(x, v) (ADDRESS_WRITE(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_CLKSRC), v))
/*@}*/
/*!
@ -224,13 +231,13 @@ typedef union _hw_wdog_stctrlh
#define BS_WDOG_STCTRLH_IRQRSTEN (1U) /*!< Bit field size in bits for WDOG_STCTRLH_IRQRSTEN. */
/*! @brief Read current value of the WDOG_STCTRLH_IRQRSTEN field. */
#define BR_WDOG_STCTRLH_IRQRSTEN(x) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_IRQRSTEN))
#define BR_WDOG_STCTRLH_IRQRSTEN(x) (ADDRESS_READ(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_IRQRSTEN)))
/*! @brief Format value for bitfield WDOG_STCTRLH_IRQRSTEN. */
#define BF_WDOG_STCTRLH_IRQRSTEN(v) ((uint16_t)((uint16_t)(v) << BP_WDOG_STCTRLH_IRQRSTEN) & BM_WDOG_STCTRLH_IRQRSTEN)
/*! @brief Set the IRQRSTEN field to a new value. */
#define BW_WDOG_STCTRLH_IRQRSTEN(x, v) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_IRQRSTEN) = (v))
#define BW_WDOG_STCTRLH_IRQRSTEN(x, v) (ADDRESS_WRITE(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_IRQRSTEN), v))
/*@}*/
/*!
@ -248,13 +255,13 @@ typedef union _hw_wdog_stctrlh
#define BS_WDOG_STCTRLH_WINEN (1U) /*!< Bit field size in bits for WDOG_STCTRLH_WINEN. */
/*! @brief Read current value of the WDOG_STCTRLH_WINEN field. */
#define BR_WDOG_STCTRLH_WINEN(x) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_WINEN))
#define BR_WDOG_STCTRLH_WINEN(x) (ADDRESS_READ(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_WINEN)))
/*! @brief Format value for bitfield WDOG_STCTRLH_WINEN. */
#define BF_WDOG_STCTRLH_WINEN(v) ((uint16_t)((uint16_t)(v) << BP_WDOG_STCTRLH_WINEN) & BM_WDOG_STCTRLH_WINEN)
/*! @brief Set the WINEN field to a new value. */
#define BW_WDOG_STCTRLH_WINEN(x, v) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_WINEN) = (v))
#define BW_WDOG_STCTRLH_WINEN(x, v) (ADDRESS_WRITE(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_WINEN), v))
/*@}*/
/*!
@ -273,13 +280,13 @@ typedef union _hw_wdog_stctrlh
#define BS_WDOG_STCTRLH_ALLOWUPDATE (1U) /*!< Bit field size in bits for WDOG_STCTRLH_ALLOWUPDATE. */
/*! @brief Read current value of the WDOG_STCTRLH_ALLOWUPDATE field. */
#define BR_WDOG_STCTRLH_ALLOWUPDATE(x) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_ALLOWUPDATE))
#define BR_WDOG_STCTRLH_ALLOWUPDATE(x) (ADDRESS_READ(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_ALLOWUPDATE)))
/*! @brief Format value for bitfield WDOG_STCTRLH_ALLOWUPDATE. */
#define BF_WDOG_STCTRLH_ALLOWUPDATE(v) ((uint16_t)((uint16_t)(v) << BP_WDOG_STCTRLH_ALLOWUPDATE) & BM_WDOG_STCTRLH_ALLOWUPDATE)
/*! @brief Set the ALLOWUPDATE field to a new value. */
#define BW_WDOG_STCTRLH_ALLOWUPDATE(x, v) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_ALLOWUPDATE) = (v))
#define BW_WDOG_STCTRLH_ALLOWUPDATE(x, v) (ADDRESS_WRITE(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_ALLOWUPDATE), v))
/*@}*/
/*!
@ -297,13 +304,13 @@ typedef union _hw_wdog_stctrlh
#define BS_WDOG_STCTRLH_DBGEN (1U) /*!< Bit field size in bits for WDOG_STCTRLH_DBGEN. */
/*! @brief Read current value of the WDOG_STCTRLH_DBGEN field. */
#define BR_WDOG_STCTRLH_DBGEN(x) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_DBGEN))
#define BR_WDOG_STCTRLH_DBGEN(x) (ADDRESS_READ(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_DBGEN)))
/*! @brief Format value for bitfield WDOG_STCTRLH_DBGEN. */
#define BF_WDOG_STCTRLH_DBGEN(v) ((uint16_t)((uint16_t)(v) << BP_WDOG_STCTRLH_DBGEN) & BM_WDOG_STCTRLH_DBGEN)
/*! @brief Set the DBGEN field to a new value. */
#define BW_WDOG_STCTRLH_DBGEN(x, v) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_DBGEN) = (v))
#define BW_WDOG_STCTRLH_DBGEN(x, v) (ADDRESS_WRITE(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_DBGEN), v))
/*@}*/
/*!
@ -321,13 +328,13 @@ typedef union _hw_wdog_stctrlh
#define BS_WDOG_STCTRLH_STOPEN (1U) /*!< Bit field size in bits for WDOG_STCTRLH_STOPEN. */
/*! @brief Read current value of the WDOG_STCTRLH_STOPEN field. */
#define BR_WDOG_STCTRLH_STOPEN(x) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_STOPEN))
#define BR_WDOG_STCTRLH_STOPEN(x) (ADDRESS_READ(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_STOPEN)))
/*! @brief Format value for bitfield WDOG_STCTRLH_STOPEN. */
#define BF_WDOG_STCTRLH_STOPEN(v) ((uint16_t)((uint16_t)(v) << BP_WDOG_STCTRLH_STOPEN) & BM_WDOG_STCTRLH_STOPEN)
/*! @brief Set the STOPEN field to a new value. */
#define BW_WDOG_STCTRLH_STOPEN(x, v) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_STOPEN) = (v))
#define BW_WDOG_STCTRLH_STOPEN(x, v) (ADDRESS_WRITE(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_STOPEN), v))
/*@}*/
/*!
@ -345,13 +352,13 @@ typedef union _hw_wdog_stctrlh
#define BS_WDOG_STCTRLH_WAITEN (1U) /*!< Bit field size in bits for WDOG_STCTRLH_WAITEN. */
/*! @brief Read current value of the WDOG_STCTRLH_WAITEN field. */
#define BR_WDOG_STCTRLH_WAITEN(x) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_WAITEN))
#define BR_WDOG_STCTRLH_WAITEN(x) (ADDRESS_READ(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_WAITEN)))
/*! @brief Format value for bitfield WDOG_STCTRLH_WAITEN. */
#define BF_WDOG_STCTRLH_WAITEN(v) ((uint16_t)((uint16_t)(v) << BP_WDOG_STCTRLH_WAITEN) & BM_WDOG_STCTRLH_WAITEN)
/*! @brief Set the WAITEN field to a new value. */
#define BW_WDOG_STCTRLH_WAITEN(x, v) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_WAITEN) = (v))
#define BW_WDOG_STCTRLH_WAITEN(x, v) (ADDRESS_WRITE(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_WAITEN), v))
/*@}*/
/*!
@ -369,13 +376,13 @@ typedef union _hw_wdog_stctrlh
#define BS_WDOG_STCTRLH_TESTWDOG (1U) /*!< Bit field size in bits for WDOG_STCTRLH_TESTWDOG. */
/*! @brief Read current value of the WDOG_STCTRLH_TESTWDOG field. */
#define BR_WDOG_STCTRLH_TESTWDOG(x) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_TESTWDOG))
#define BR_WDOG_STCTRLH_TESTWDOG(x) (ADDRESS_READ(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_TESTWDOG)))
/*! @brief Format value for bitfield WDOG_STCTRLH_TESTWDOG. */
#define BF_WDOG_STCTRLH_TESTWDOG(v) ((uint16_t)((uint16_t)(v) << BP_WDOG_STCTRLH_TESTWDOG) & BM_WDOG_STCTRLH_TESTWDOG)
/*! @brief Set the TESTWDOG field to a new value. */
#define BW_WDOG_STCTRLH_TESTWDOG(x, v) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_TESTWDOG) = (v))
#define BW_WDOG_STCTRLH_TESTWDOG(x, v) (ADDRESS_WRITE(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_TESTWDOG), v))
/*@}*/
/*!
@ -398,13 +405,13 @@ typedef union _hw_wdog_stctrlh
#define BS_WDOG_STCTRLH_TESTSEL (1U) /*!< Bit field size in bits for WDOG_STCTRLH_TESTSEL. */
/*! @brief Read current value of the WDOG_STCTRLH_TESTSEL field. */
#define BR_WDOG_STCTRLH_TESTSEL(x) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_TESTSEL))
#define BR_WDOG_STCTRLH_TESTSEL(x) (ADDRESS_READ(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_TESTSEL)))
/*! @brief Format value for bitfield WDOG_STCTRLH_TESTSEL. */
#define BF_WDOG_STCTRLH_TESTSEL(v) ((uint16_t)((uint16_t)(v) << BP_WDOG_STCTRLH_TESTSEL) & BM_WDOG_STCTRLH_TESTSEL)
/*! @brief Set the TESTSEL field to a new value. */
#define BW_WDOG_STCTRLH_TESTSEL(x, v) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_TESTSEL) = (v))
#define BW_WDOG_STCTRLH_TESTSEL(x, v) (ADDRESS_WRITE(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_TESTSEL), v))
/*@}*/
/*!
@ -425,7 +432,7 @@ typedef union _hw_wdog_stctrlh
#define BS_WDOG_STCTRLH_BYTESEL (2U) /*!< Bit field size in bits for WDOG_STCTRLH_BYTESEL. */
/*! @brief Read current value of the WDOG_STCTRLH_BYTESEL field. */
#define BR_WDOG_STCTRLH_BYTESEL(x) (HW_WDOG_STCTRLH(x).B.BYTESEL)
#define BR_WDOG_STCTRLH_BYTESEL(x) (UNION_READ(hw_wdog_stctrlh_t, HW_WDOG_STCTRLH_ADDR(x), U, B.BYTESEL))
/*! @brief Format value for bitfield WDOG_STCTRLH_BYTESEL. */
#define BF_WDOG_STCTRLH_BYTESEL(v) ((uint16_t)((uint16_t)(v) << BP_WDOG_STCTRLH_BYTESEL) & BM_WDOG_STCTRLH_BYTESEL)
@ -451,13 +458,13 @@ typedef union _hw_wdog_stctrlh
#define BS_WDOG_STCTRLH_DISTESTWDOG (1U) /*!< Bit field size in bits for WDOG_STCTRLH_DISTESTWDOG. */
/*! @brief Read current value of the WDOG_STCTRLH_DISTESTWDOG field. */
#define BR_WDOG_STCTRLH_DISTESTWDOG(x) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_DISTESTWDOG))
#define BR_WDOG_STCTRLH_DISTESTWDOG(x) (ADDRESS_READ(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_DISTESTWDOG)))
/*! @brief Format value for bitfield WDOG_STCTRLH_DISTESTWDOG. */
#define BF_WDOG_STCTRLH_DISTESTWDOG(v) ((uint16_t)((uint16_t)(v) << BP_WDOG_STCTRLH_DISTESTWDOG) & BM_WDOG_STCTRLH_DISTESTWDOG)
/*! @brief Set the DISTESTWDOG field to a new value. */
#define BW_WDOG_STCTRLH_DISTESTWDOG(x, v) (BITBAND_ACCESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_DISTESTWDOG) = (v))
#define BW_WDOG_STCTRLH_DISTESTWDOG(x, v) (ADDRESS_WRITE(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLH_ADDR(x), BP_WDOG_STCTRLH_DISTESTWDOG), v))
/*@}*/
/*******************************************************************************
@ -486,8 +493,8 @@ typedef union _hw_wdog_stctrll
#define HW_WDOG_STCTRLL_ADDR(x) ((x) + 0x2U)
#define HW_WDOG_STCTRLL(x) (*(__IO hw_wdog_stctrll_t *) HW_WDOG_STCTRLL_ADDR(x))
#define HW_WDOG_STCTRLL_RD(x) (HW_WDOG_STCTRLL(x).U)
#define HW_WDOG_STCTRLL_WR(x, v) (HW_WDOG_STCTRLL(x).U = (v))
#define HW_WDOG_STCTRLL_RD(x) (ADDRESS_READ(hw_wdog_stctrll_t, HW_WDOG_STCTRLL_ADDR(x)))
#define HW_WDOG_STCTRLL_WR(x, v) (ADDRESS_WRITE(hw_wdog_stctrll_t, HW_WDOG_STCTRLL_ADDR(x), v))
#define HW_WDOG_STCTRLL_SET(x, v) (HW_WDOG_STCTRLL_WR(x, HW_WDOG_STCTRLL_RD(x) | (v)))
#define HW_WDOG_STCTRLL_CLR(x, v) (HW_WDOG_STCTRLL_WR(x, HW_WDOG_STCTRLL_RD(x) & ~(v)))
#define HW_WDOG_STCTRLL_TOG(x, v) (HW_WDOG_STCTRLL_WR(x, HW_WDOG_STCTRLL_RD(x) ^ (v)))
@ -511,13 +518,13 @@ typedef union _hw_wdog_stctrll
#define BS_WDOG_STCTRLL_INTFLG (1U) /*!< Bit field size in bits for WDOG_STCTRLL_INTFLG. */
/*! @brief Read current value of the WDOG_STCTRLL_INTFLG field. */
#define BR_WDOG_STCTRLL_INTFLG(x) (BITBAND_ACCESS16(HW_WDOG_STCTRLL_ADDR(x), BP_WDOG_STCTRLL_INTFLG))
#define BR_WDOG_STCTRLL_INTFLG(x) (ADDRESS_READ(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLL_ADDR(x), BP_WDOG_STCTRLL_INTFLG)))
/*! @brief Format value for bitfield WDOG_STCTRLL_INTFLG. */
#define BF_WDOG_STCTRLL_INTFLG(v) ((uint16_t)((uint16_t)(v) << BP_WDOG_STCTRLL_INTFLG) & BM_WDOG_STCTRLL_INTFLG)
/*! @brief Set the INTFLG field to a new value. */
#define BW_WDOG_STCTRLL_INTFLG(x, v) (BITBAND_ACCESS16(HW_WDOG_STCTRLL_ADDR(x), BP_WDOG_STCTRLL_INTFLG) = (v))
#define BW_WDOG_STCTRLL_INTFLG(x, v) (ADDRESS_WRITE(uint16_t, BITBAND_ADDRESS16(HW_WDOG_STCTRLL_ADDR(x), BP_WDOG_STCTRLL_INTFLG), v))
/*@}*/
/*******************************************************************************
@ -545,8 +552,8 @@ typedef union _hw_wdog_tovalh
#define HW_WDOG_TOVALH_ADDR(x) ((x) + 0x4U)
#define HW_WDOG_TOVALH(x) (*(__IO hw_wdog_tovalh_t *) HW_WDOG_TOVALH_ADDR(x))
#define HW_WDOG_TOVALH_RD(x) (HW_WDOG_TOVALH(x).U)
#define HW_WDOG_TOVALH_WR(x, v) (HW_WDOG_TOVALH(x).U = (v))
#define HW_WDOG_TOVALH_RD(x) (ADDRESS_READ(hw_wdog_tovalh_t, HW_WDOG_TOVALH_ADDR(x)))
#define HW_WDOG_TOVALH_WR(x, v) (ADDRESS_WRITE(hw_wdog_tovalh_t, HW_WDOG_TOVALH_ADDR(x), v))
#define HW_WDOG_TOVALH_SET(x, v) (HW_WDOG_TOVALH_WR(x, HW_WDOG_TOVALH_RD(x) | (v)))
#define HW_WDOG_TOVALH_CLR(x, v) (HW_WDOG_TOVALH_WR(x, HW_WDOG_TOVALH_RD(x) & ~(v)))
#define HW_WDOG_TOVALH_TOG(x, v) (HW_WDOG_TOVALH_WR(x, HW_WDOG_TOVALH_RD(x) ^ (v)))
@ -606,8 +613,8 @@ typedef union _hw_wdog_tovall
#define HW_WDOG_TOVALL_ADDR(x) ((x) + 0x6U)
#define HW_WDOG_TOVALL(x) (*(__IO hw_wdog_tovall_t *) HW_WDOG_TOVALL_ADDR(x))
#define HW_WDOG_TOVALL_RD(x) (HW_WDOG_TOVALL(x).U)
#define HW_WDOG_TOVALL_WR(x, v) (HW_WDOG_TOVALL(x).U = (v))
#define HW_WDOG_TOVALL_RD(x) (ADDRESS_READ(hw_wdog_tovall_t, HW_WDOG_TOVALL_ADDR(x)))
#define HW_WDOG_TOVALL_WR(x, v) (ADDRESS_WRITE(hw_wdog_tovall_t, HW_WDOG_TOVALL_ADDR(x), v))
#define HW_WDOG_TOVALL_SET(x, v) (HW_WDOG_TOVALL_WR(x, HW_WDOG_TOVALL_RD(x) | (v)))
#define HW_WDOG_TOVALL_CLR(x, v) (HW_WDOG_TOVALL_WR(x, HW_WDOG_TOVALL_RD(x) & ~(v)))
#define HW_WDOG_TOVALL_TOG(x, v) (HW_WDOG_TOVALL_WR(x, HW_WDOG_TOVALL_RD(x) ^ (v)))
@ -665,8 +672,8 @@ typedef union _hw_wdog_winh
#define HW_WDOG_WINH_ADDR(x) ((x) + 0x8U)
#define HW_WDOG_WINH(x) (*(__IO hw_wdog_winh_t *) HW_WDOG_WINH_ADDR(x))
#define HW_WDOG_WINH_RD(x) (HW_WDOG_WINH(x).U)
#define HW_WDOG_WINH_WR(x, v) (HW_WDOG_WINH(x).U = (v))
#define HW_WDOG_WINH_RD(x) (ADDRESS_READ(hw_wdog_winh_t, HW_WDOG_WINH_ADDR(x)))
#define HW_WDOG_WINH_WR(x, v) (ADDRESS_WRITE(hw_wdog_winh_t, HW_WDOG_WINH_ADDR(x), v))
#define HW_WDOG_WINH_SET(x, v) (HW_WDOG_WINH_WR(x, HW_WDOG_WINH_RD(x) | (v)))
#define HW_WDOG_WINH_CLR(x, v) (HW_WDOG_WINH_WR(x, HW_WDOG_WINH_RD(x) & ~(v)))
#define HW_WDOG_WINH_TOG(x, v) (HW_WDOG_WINH_WR(x, HW_WDOG_WINH_RD(x) ^ (v)))
@ -728,8 +735,8 @@ typedef union _hw_wdog_winl
#define HW_WDOG_WINL_ADDR(x) ((x) + 0xAU)
#define HW_WDOG_WINL(x) (*(__IO hw_wdog_winl_t *) HW_WDOG_WINL_ADDR(x))
#define HW_WDOG_WINL_RD(x) (HW_WDOG_WINL(x).U)
#define HW_WDOG_WINL_WR(x, v) (HW_WDOG_WINL(x).U = (v))
#define HW_WDOG_WINL_RD(x) (ADDRESS_READ(hw_wdog_winl_t, HW_WDOG_WINL_ADDR(x)))
#define HW_WDOG_WINL_WR(x, v) (ADDRESS_WRITE(hw_wdog_winl_t, HW_WDOG_WINL_ADDR(x), v))
#define HW_WDOG_WINL_SET(x, v) (HW_WDOG_WINL_WR(x, HW_WDOG_WINL_RD(x) | (v)))
#define HW_WDOG_WINL_CLR(x, v) (HW_WDOG_WINL_WR(x, HW_WDOG_WINL_RD(x) & ~(v)))
#define HW_WDOG_WINL_TOG(x, v) (HW_WDOG_WINL_WR(x, HW_WDOG_WINL_RD(x) ^ (v)))
@ -789,8 +796,8 @@ typedef union _hw_wdog_refresh
#define HW_WDOG_REFRESH_ADDR(x) ((x) + 0xCU)
#define HW_WDOG_REFRESH(x) (*(__IO hw_wdog_refresh_t *) HW_WDOG_REFRESH_ADDR(x))
#define HW_WDOG_REFRESH_RD(x) (HW_WDOG_REFRESH(x).U)
#define HW_WDOG_REFRESH_WR(x, v) (HW_WDOG_REFRESH(x).U = (v))
#define HW_WDOG_REFRESH_RD(x) (ADDRESS_READ(hw_wdog_refresh_t, HW_WDOG_REFRESH_ADDR(x)))
#define HW_WDOG_REFRESH_WR(x, v) (ADDRESS_WRITE(hw_wdog_refresh_t, HW_WDOG_REFRESH_ADDR(x), v))
#define HW_WDOG_REFRESH_SET(x, v) (HW_WDOG_REFRESH_WR(x, HW_WDOG_REFRESH_RD(x) | (v)))
#define HW_WDOG_REFRESH_CLR(x, v) (HW_WDOG_REFRESH_WR(x, HW_WDOG_REFRESH_RD(x) & ~(v)))
#define HW_WDOG_REFRESH_TOG(x, v) (HW_WDOG_REFRESH_WR(x, HW_WDOG_REFRESH_RD(x) ^ (v)))
@ -849,8 +856,8 @@ typedef union _hw_wdog_unlock
#define HW_WDOG_UNLOCK_ADDR(x) ((x) + 0xEU)
#define HW_WDOG_UNLOCK(x) (*(__IO hw_wdog_unlock_t *) HW_WDOG_UNLOCK_ADDR(x))
#define HW_WDOG_UNLOCK_RD(x) (HW_WDOG_UNLOCK(x).U)
#define HW_WDOG_UNLOCK_WR(x, v) (HW_WDOG_UNLOCK(x).U = (v))
#define HW_WDOG_UNLOCK_RD(x) (ADDRESS_READ(hw_wdog_unlock_t, HW_WDOG_UNLOCK_ADDR(x)))
#define HW_WDOG_UNLOCK_WR(x, v) (ADDRESS_WRITE(hw_wdog_unlock_t, HW_WDOG_UNLOCK_ADDR(x), v))
#define HW_WDOG_UNLOCK_SET(x, v) (HW_WDOG_UNLOCK_WR(x, HW_WDOG_UNLOCK_RD(x) | (v)))
#define HW_WDOG_UNLOCK_CLR(x, v) (HW_WDOG_UNLOCK_WR(x, HW_WDOG_UNLOCK_RD(x) & ~(v)))
#define HW_WDOG_UNLOCK_TOG(x, v) (HW_WDOG_UNLOCK_WR(x, HW_WDOG_UNLOCK_RD(x) ^ (v)))
@ -912,8 +919,8 @@ typedef union _hw_wdog_tmrouth
#define HW_WDOG_TMROUTH_ADDR(x) ((x) + 0x10U)
#define HW_WDOG_TMROUTH(x) (*(__IO hw_wdog_tmrouth_t *) HW_WDOG_TMROUTH_ADDR(x))
#define HW_WDOG_TMROUTH_RD(x) (HW_WDOG_TMROUTH(x).U)
#define HW_WDOG_TMROUTH_WR(x, v) (HW_WDOG_TMROUTH(x).U = (v))
#define HW_WDOG_TMROUTH_RD(x) (ADDRESS_READ(hw_wdog_tmrouth_t, HW_WDOG_TMROUTH_ADDR(x)))
#define HW_WDOG_TMROUTH_WR(x, v) (ADDRESS_WRITE(hw_wdog_tmrouth_t, HW_WDOG_TMROUTH_ADDR(x), v))
#define HW_WDOG_TMROUTH_SET(x, v) (HW_WDOG_TMROUTH_WR(x, HW_WDOG_TMROUTH_RD(x) | (v)))
#define HW_WDOG_TMROUTH_CLR(x, v) (HW_WDOG_TMROUTH_WR(x, HW_WDOG_TMROUTH_RD(x) & ~(v)))
#define HW_WDOG_TMROUTH_TOG(x, v) (HW_WDOG_TMROUTH_WR(x, HW_WDOG_TMROUTH_RD(x) ^ (v)))
@ -973,8 +980,8 @@ typedef union _hw_wdog_tmroutl
#define HW_WDOG_TMROUTL_ADDR(x) ((x) + 0x12U)
#define HW_WDOG_TMROUTL(x) (*(__IO hw_wdog_tmroutl_t *) HW_WDOG_TMROUTL_ADDR(x))
#define HW_WDOG_TMROUTL_RD(x) (HW_WDOG_TMROUTL(x).U)
#define HW_WDOG_TMROUTL_WR(x, v) (HW_WDOG_TMROUTL(x).U = (v))
#define HW_WDOG_TMROUTL_RD(x) (ADDRESS_READ(hw_wdog_tmroutl_t, HW_WDOG_TMROUTL_ADDR(x)))
#define HW_WDOG_TMROUTL_WR(x, v) (ADDRESS_WRITE(hw_wdog_tmroutl_t, HW_WDOG_TMROUTL_ADDR(x), v))
#define HW_WDOG_TMROUTL_SET(x, v) (HW_WDOG_TMROUTL_WR(x, HW_WDOG_TMROUTL_RD(x) | (v)))
#define HW_WDOG_TMROUTL_CLR(x, v) (HW_WDOG_TMROUTL_WR(x, HW_WDOG_TMROUTL_RD(x) & ~(v)))
#define HW_WDOG_TMROUTL_TOG(x, v) (HW_WDOG_TMROUTL_WR(x, HW_WDOG_TMROUTL_RD(x) ^ (v)))
@ -1029,8 +1036,8 @@ typedef union _hw_wdog_rstcnt
#define HW_WDOG_RSTCNT_ADDR(x) ((x) + 0x14U)
#define HW_WDOG_RSTCNT(x) (*(__IO hw_wdog_rstcnt_t *) HW_WDOG_RSTCNT_ADDR(x))
#define HW_WDOG_RSTCNT_RD(x) (HW_WDOG_RSTCNT(x).U)
#define HW_WDOG_RSTCNT_WR(x, v) (HW_WDOG_RSTCNT(x).U = (v))
#define HW_WDOG_RSTCNT_RD(x) (ADDRESS_READ(hw_wdog_rstcnt_t, HW_WDOG_RSTCNT_ADDR(x)))
#define HW_WDOG_RSTCNT_WR(x, v) (ADDRESS_WRITE(hw_wdog_rstcnt_t, HW_WDOG_RSTCNT_ADDR(x), v))
#define HW_WDOG_RSTCNT_SET(x, v) (HW_WDOG_RSTCNT_WR(x, HW_WDOG_RSTCNT_RD(x) | (v)))
#define HW_WDOG_RSTCNT_CLR(x, v) (HW_WDOG_RSTCNT_WR(x, HW_WDOG_RSTCNT_RD(x) & ~(v)))
#define HW_WDOG_RSTCNT_TOG(x, v) (HW_WDOG_RSTCNT_WR(x, HW_WDOG_RSTCNT_RD(x) ^ (v)))
@ -1089,8 +1096,8 @@ typedef union _hw_wdog_presc
#define HW_WDOG_PRESC_ADDR(x) ((x) + 0x16U)
#define HW_WDOG_PRESC(x) (*(__IO hw_wdog_presc_t *) HW_WDOG_PRESC_ADDR(x))
#define HW_WDOG_PRESC_RD(x) (HW_WDOG_PRESC(x).U)
#define HW_WDOG_PRESC_WR(x, v) (HW_WDOG_PRESC(x).U = (v))
#define HW_WDOG_PRESC_RD(x) (ADDRESS_READ(hw_wdog_presc_t, HW_WDOG_PRESC_ADDR(x)))
#define HW_WDOG_PRESC_WR(x, v) (ADDRESS_WRITE(hw_wdog_presc_t, HW_WDOG_PRESC_ADDR(x), v))
#define HW_WDOG_PRESC_SET(x, v) (HW_WDOG_PRESC_WR(x, HW_WDOG_PRESC_RD(x) | (v)))
#define HW_WDOG_PRESC_CLR(x, v) (HW_WDOG_PRESC_WR(x, HW_WDOG_PRESC_RD(x) & ~(v)))
#define HW_WDOG_PRESC_TOG(x, v) (HW_WDOG_PRESC_WR(x, HW_WDOG_PRESC_RD(x) ^ (v)))
@ -1113,7 +1120,7 @@ typedef union _hw_wdog_presc
#define BS_WDOG_PRESC_PRESCVAL (3U) /*!< Bit field size in bits for WDOG_PRESC_PRESCVAL. */
/*! @brief Read current value of the WDOG_PRESC_PRESCVAL field. */
#define BR_WDOG_PRESC_PRESCVAL(x) (HW_WDOG_PRESC(x).B.PRESCVAL)
#define BR_WDOG_PRESC_PRESCVAL(x) (UNION_READ(hw_wdog_presc_t, HW_WDOG_PRESC_ADDR(x), U, B.PRESCVAL))
/*! @brief Format value for bitfield WDOG_PRESC_PRESCVAL. */
#define BF_WDOG_PRESC_PRESCVAL(v) ((uint16_t)((uint16_t)(v) << BP_WDOG_PRESC_PRESCVAL) & BM_WDOG_PRESC_PRESCVAL)

24
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/gpio_irq_api.c
View File

@ -118,8 +118,8 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32
error("gpio_irq only supported on port A-E.");
break;
}
NVIC_SetVector(irq_n, vector);
NVIC_EnableIRQ(irq_n);
vIRQ_SetVector(irq_n, vector);
vIRQ_EnableIRQ(irq_n);
obj->ch = ch_base + obj->pin;
channel_ids[obj->ch] = id;
@ -175,19 +175,19 @@ void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) {
void gpio_irq_enable(gpio_irq_t *obj) {
switch (obj->port) {
case PortA:
NVIC_EnableIRQ(PORTA_IRQn);
vIRQ_EnableIRQ(PORTA_IRQn);
break;
case PortB:
NVIC_EnableIRQ(PORTB_IRQn);
vIRQ_EnableIRQ(PORTB_IRQn);
break;
case PortC:
NVIC_EnableIRQ(PORTC_IRQn);
vIRQ_EnableIRQ(PORTC_IRQn);
break;
case PortD:
NVIC_EnableIRQ(PORTD_IRQn);
vIRQ_EnableIRQ(PORTD_IRQn);
break;
case PortE:
NVIC_EnableIRQ(PORTE_IRQn);
vIRQ_EnableIRQ(PORTE_IRQn);
break;
}
}
@ -195,19 +195,19 @@ void gpio_irq_enable(gpio_irq_t *obj) {
void gpio_irq_disable(gpio_irq_t *obj) {
switch (obj->port) {
case PortA:
NVIC_DisableIRQ(PORTA_IRQn);
vIRQ_DisableIRQ(PORTA_IRQn);
break;
case PortB:
NVIC_DisableIRQ(PORTB_IRQn);
vIRQ_DisableIRQ(PORTB_IRQn);
break;
case PortC:
NVIC_DisableIRQ(PORTC_IRQn);
vIRQ_DisableIRQ(PORTC_IRQn);
break;
case PortD:
NVIC_DisableIRQ(PORTD_IRQn);
vIRQ_DisableIRQ(PORTD_IRQn);
break;
case PortE:
NVIC_DisableIRQ(PORTE_IRQn);
vIRQ_DisableIRQ(PORTE_IRQn);
break;
}
}

6
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/serial_api.c
View File

@ -164,8 +164,8 @@ void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
case RxIrq: UART_HAL_SetRxDataRegFullIntCmd(uart_addrs[obj->index], true); break;
case TxIrq: UART_HAL_SetTxDataRegEmptyIntCmd(uart_addrs[obj->index], true); break;
}
NVIC_SetVector(irq_n, vector);
NVIC_EnableIRQ(irq_n);
vIRQ_SetVector(irq_n, vector);
vIRQ_EnableIRQ(irq_n);
} else { // disable
int all_disabled = 0;
@ -179,7 +179,7 @@ void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
case TxIrq: all_disabled = UART_HAL_GetTxDataRegEmptyIntCmd(uart_addrs[obj->index]) == 0; break;
}
if (all_disabled)
NVIC_DisableIRQ(irq_n);
vIRQ_DisableIRQ(irq_n);
}
}

4
hal/targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/us_ticker.c
View File

@ -44,8 +44,8 @@ void us_ticker_init(void) {
//Ticker
PIT_HAL_SetTimerPeriodByCount(PIT_BASE, 2, busClock / 1000000 - 1);
PIT_HAL_SetTimerChainCmd(PIT_BASE, 3, true);
NVIC_SetVector(PIT3_IRQn, (uint32_t)us_ticker_irq_handler);
NVIC_EnableIRQ(PIT3_IRQn);
vIRQ_SetVector(PIT3_IRQn, (uint32_t)us_ticker_irq_handler);
vIRQ_EnableIRQ(PIT3_IRQn);
}