diff --git a/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_NUMAKER_PFM_M2351/PeripheralNames.h b/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_NUMAKER_PFM_M2351/PeripheralNames.h
index f8c34c21e6..03b39c9574 100644
--- a/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_NUMAKER_PFM_M2351/PeripheralNames.h
+++ b/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_NUMAKER_PFM_M2351/PeripheralNames.h
@@ -72,7 +72,7 @@ typedef enum {
     UART_2 = (int) NU_MODNAME(UART2_BASE, 2, 0),
     UART_3 = (int) NU_MODNAME(UART3_BASE, 3, 0),
     UART_4 = (int) NU_MODNAME(UART4_BASE, 4, 0),
-    UART_5 = (int) NU_MODNAME(UART5_BASE, 5, 0),
+    UART_5 = (int) NU_MODNAME((UART5_BASE + NS_OFFSET), 5, 0),  // UART 5 is the stdio, set as non-secure
     // NOTE: board-specific
     STDIO_UART  = UART_3
 } UARTName;
@@ -124,14 +124,14 @@ typedef enum {
 } PWMName;
 
 typedef enum {
-    TIMER_0  = (int) NU_MODNAME(TMR01_BASE, 0, 0),
-    TIMER_1  = (int) NU_MODNAME(TMR01_BASE + 0x100, 1, 0),
-    TIMER_2  = (int) NU_MODNAME(TMR23_BASE, 2, 0),
-    TIMER_3  = (int) NU_MODNAME(TMR23_BASE + 0x100, 3, 0),
+    TIMER_0  = (int) NU_MODNAME(TMR01_BASE + NS_OFFSET, 0, 0),
+    TIMER_1  = (int) NU_MODNAME(TMR01_BASE + NS_OFFSET + 0x100, 1, 0),
+    TIMER_2  = (int) NU_MODNAME(TMR23_BASE + NS_OFFSET, 2, 0),
+    TIMER_3  = (int) NU_MODNAME(TMR23_BASE + NS_OFFSET + 0x100, 3, 0),
 } TIMERName;
 
 typedef enum {
-    RTC_0 = (int) NU_MODNAME(RTC_BASE, 0, 0)
+    RTC_0 = (int) NU_MODNAME(RTC_BASE + NS_OFFSET, 0, 0)
 } RTCName;
 
 typedef enum {
diff --git a/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_NUMAKER_PFM_M2351/PinNames.h b/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_NUMAKER_PFM_M2351/PinNames.h
index dab674c460..69a056eb9f 100644
--- a/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_NUMAKER_PFM_M2351/PinNames.h
+++ b/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_NUMAKER_PFM_M2351/PinNames.h
@@ -39,7 +39,7 @@ extern "C" {
 #define NU_PINNAME_BIND(PINNAME, modname)           NU_PINNAME_BIND_(NU_PINPORT(PINNAME), NU_PININDEX(PINNAME), modname)
 #define NU_PINNAME_BIND_(PORT, PIN, modname)        ((((unsigned int)(PORT)) << NU_PINPORT_Pos) | (((unsigned int)(PIN)) << NU_PININDEX_Pos) | (NU_MODINDEX(modname) << NU_PIN_MODINDEX_Pos) | NU_PIN_BIND_Msk)
 
-#define NU_PORT_BASE(port)                          ((GPIO_T *)(((uint32_t) GPIOA_BASE) + 0x40 * port))
+#define NU_PORT_BASE(port)                          ((GPIO_T *)(((uint32_t) (GPIOA_BASE  + NS_OFFSET)) + 0x40 * port))  // Set All GPIO as non-secure
 #define NU_MFP_POS(pin)                             ((pin % 8) * 4)
 #define NU_MFP_MSK(pin)                             (0xful << NU_MFP_POS(pin))
 
diff --git a/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_NUMAKER_PFM_M2351/mbed_overrides.c b/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_NUMAKER_PFM_M2351/mbed_overrides.c
index 57ccaa9cef..443d26a8fa 100644
--- a/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_NUMAKER_PFM_M2351/mbed_overrides.c
+++ b/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_NUMAKER_PFM_M2351/mbed_overrides.c
@@ -25,7 +25,8 @@ void mbed_sdk_init(void)
         return;
     }
     inited = 1;
-    
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)    
     /*---------------------------------------------------------------------------------------------------------*/
     /* Init System Clock                                                                                       */
     /*---------------------------------------------------------------------------------------------------------*/
@@ -63,4 +64,5 @@ void mbed_sdk_init(void)
 
     /* Lock protected registers */
     SYS_LockReg();
+#endif		
 }
diff --git a/targets/TARGET_NUVOTON/TARGET_M2351/device/M2351.h b/targets/TARGET_NUVOTON/TARGET_M2351/device/M2351.h
index ae5f6b73b2..8f57793c68 100644
--- a/targets/TARGET_NUVOTON/TARGET_M2351/device/M2351.h
+++ b/targets/TARGET_NUVOTON/TARGET_M2351/device/M2351.h
@@ -31225,8 +31225,12 @@ typedef struct
 
 /* Peripheral and SRAM base address */
 #define SRAM_BASE            (0x20000000UL)                              /*!< (SRAM      ) Base Address */
-#define PERIPH_BASE          (0x40000000UL)                              /*!< (Peripheral) Base Address */
 #define NS_OFFSET            (0x10000000UL)
+#if (__DOMAIN_NS == 1U)
+#define PERIPH_BASE          (0x40000000UL + NS_OFFSET)                              /*!< (Peripheral) Base Address */
+#else
+#define PERIPH_BASE          (0x40000000UL)                              /*!< (Peripheral) Base Address */
+#endif
 
 /* Peripheral memory map */
 #define AHBPERIPH_BASE       PERIPH_BASE
diff --git a/targets/TARGET_NUVOTON/TARGET_M2351/device/StdDriver/m2351_clk.c b/targets/TARGET_NUVOTON/TARGET_M2351/device/StdDriver/m2351_clk.c
index 33874cd797..3b2e4f2139 100644
--- a/targets/TARGET_NUVOTON/TARGET_M2351/device/StdDriver/m2351_clk.c
+++ b/targets/TARGET_NUVOTON/TARGET_M2351/device/StdDriver/m2351_clk.c
@@ -109,7 +109,7 @@ void CLK_Idle(void)
   */
 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
 __attribute__((cmse_nonsecure_entry))
-#endif
+//#endif
 uint32_t CLK_GetHXTFreq(void)
 {
     if(CLK->PWRCTL & CLK_PWRCTL_HXTEN_Msk)
@@ -117,7 +117,7 @@ uint32_t CLK_GetHXTFreq(void)
     else
         return 0;
 }
-
+#endif
 /**
   * @brief      Get external low speed crystal clock frequency
   * @param      None
@@ -126,7 +126,7 @@ uint32_t CLK_GetHXTFreq(void)
   */
 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
 __attribute__((cmse_nonsecure_entry))
-#endif
+//#endif
 uint32_t CLK_GetLXTFreq(void)
 {
     if(CLK->PWRCTL & CLK_PWRCTL_LXTEN_Msk)
@@ -134,7 +134,7 @@ uint32_t CLK_GetLXTFreq(void)
     else
         return 0;
 }
-
+#endif
 /**
   * @brief      Get HCLK frequency
   * @param      None
@@ -143,13 +143,13 @@ uint32_t CLK_GetLXTFreq(void)
   */
 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
 __attribute__((cmse_nonsecure_entry))
-#endif
+//#endif
 uint32_t CLK_GetHCLKFreq(void)
 {
     SystemCoreClockUpdate();
     return SystemCoreClock;
 }
-
+#endif
 /**
   * @brief      Get PCLK0 frequency
   * @param      None
@@ -158,13 +158,13 @@ uint32_t CLK_GetHCLKFreq(void)
   */
 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
 __attribute__((cmse_nonsecure_entry))
-#endif
+//#endif
 uint32_t CLK_GetPCLK0Freq(void)
 {
     SystemCoreClockUpdate();
     return (SystemCoreClock >> ((CLK->CLKSEL0 & CLK_CLKSEL0_PCLK0SEL_Msk) >> CLK_CLKSEL0_PCLK0SEL_Pos));
 }
-
+#endif
 /**
   * @brief      Get PCLK1 frequency
   * @param      None
@@ -173,13 +173,13 @@ uint32_t CLK_GetPCLK0Freq(void)
   */
 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
 __attribute__((cmse_nonsecure_entry))
-#endif
+//#endif
 uint32_t CLK_GetPCLK1Freq(void)
 {
     SystemCoreClockUpdate();
     return (SystemCoreClock >> ((CLK->CLKSEL0 & CLK_CLKSEL0_PCLK1SEL_Msk) >> CLK_CLKSEL0_PCLK1SEL_Pos));
 }
-
+#endif
 /**
   * @brief      Get CPU frequency
   * @param      None
@@ -188,7 +188,7 @@ uint32_t CLK_GetPCLK1Freq(void)
   */
 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
 __attribute__((cmse_nonsecure_entry))
-#endif
+//#endif
 uint32_t CLK_GetCPUFreq(void)
 {
     uint32_t u32Freq, u32HclkSrc, u32HclkDiv;
@@ -241,7 +241,7 @@ uint32_t CLK_GetCPUFreq(void)
     
     return SystemCoreClock;    
 }
-
+#endif
 /**
   * @brief      Set HCLK frequency
   * @param[in]  u32Hclk is HCLK frequency. The range of u32Hclk is 24 MHz ~ 48 MHz.
@@ -943,7 +943,7 @@ void CLK_EnableSPDWKPin(uint32_t u32Port, uint32_t u32Pin, uint32_t u32TriggerTy
   */
 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
 __attribute__((cmse_nonsecure_entry))
-#endif
+//#endif
 uint32_t CLK_GetPLLClockFreq(void)
 {
     uint32_t u32PllFreq = 0, u32PllReg;
@@ -973,7 +973,7 @@ uint32_t CLK_GetPLLClockFreq(void)
 
     return u32PllFreq;
 }
-
+#endif
 /**
   * @brief      Get selected module clock source
   * @param[in]  u32ModuleIdx is module index.
@@ -1015,7 +1015,7 @@ uint32_t CLK_GetPLLClockFreq(void)
   */
 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
 __attribute__((cmse_nonsecure_entry))
-#endif
+//#endif
 uint32_t CLK_GetModuleClockSource(uint32_t u32ModuleIdx)
 {
     uint32_t u32sel = 0;
@@ -1042,7 +1042,7 @@ uint32_t CLK_GetModuleClockSource(uint32_t u32ModuleIdx)
     else
         return 0;
 }
-
+#endif
 /**
   * @brief      Get selected module clock divider number
   * @param[in]  u32ModuleIdx is module index.
@@ -1066,7 +1066,7 @@ uint32_t CLK_GetModuleClockSource(uint32_t u32ModuleIdx)
   */
 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
 __attribute__((cmse_nonsecure_entry))
-#endif
+//#endif
 uint32_t CLK_GetModuleClockDivider(uint32_t u32ModuleIdx)
 {
     uint32_t u32div = 0;
@@ -1082,7 +1082,7 @@ uint32_t CLK_GetModuleClockDivider(uint32_t u32ModuleIdx)
     else
         return 0;
 }
-
+#endif
 
 
 /*@}*/ /* end of group CLK_EXPORTED_FUNCTIONS */
diff --git a/targets/TARGET_NUVOTON/TARGET_M2351/device/StdDriver/m2351_sys.c b/targets/TARGET_NUVOTON/TARGET_M2351/device/StdDriver/m2351_sys.c
index 56dc0b2d31..c69825f1cb 100644
--- a/targets/TARGET_NUVOTON/TARGET_M2351/device/StdDriver/m2351_sys.c
+++ b/targets/TARGET_NUVOTON/TARGET_M2351/device/StdDriver/m2351_sys.c
@@ -164,6 +164,8 @@ void SYS_ResetCPU(void)
   * @return     None
   * @details    This function reset selected module.
   */
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+__attribute__((cmse_nonsecure_entry))
 void SYS_ResetModule(uint32_t u32ModuleIndex)
 {
     /* Generate reset signal to the corresponding module */
@@ -172,7 +174,7 @@ void SYS_ResetModule(uint32_t u32ModuleIndex)
     /* Release corresponding module from reset state */
     *(volatile uint32_t *)((uint32_t)&SYS->IPRST0 + (u32ModuleIndex >> 24))  &= ~(1 << (u32ModuleIndex & 0x00ffffff));
 }
-
+#endif
 
 /**
   * @brief      Enable and configure Brown-out detector function
diff --git a/targets/TARGET_NUVOTON/TARGET_M2351/device/partition_M2351.h b/targets/TARGET_NUVOTON/TARGET_M2351/device/partition_M2351.h
index 6f0a65c7df..0c49636bdf 100644
--- a/targets/TARGET_NUVOTON/TARGET_M2351/device/partition_M2351.h
+++ b/targets/TARGET_NUVOTON/TARGET_M2351/device/partition_M2351.h
@@ -326,7 +326,7 @@
 //   <o.31> PWM1_P2           <0=> Secure <1=> Non-Secure
 //
 */
-#define NVIC_INIT_ITNS0_VAL      0x0
+#define NVIC_INIT_ITNS0_VAL      0x3F0040
 
 /*
     Initialize ITNS 1 (Interrupts 0..31)
@@ -367,7 +367,7 @@
 
 //
 */
-#define NVIC_INIT_ITNS1_VAL      0x10
+#define NVIC_INIT_ITNS1_VAL      0x0F
 
 /*
     Initialize ITNS 2 (Interrupts 0..31)
@@ -408,7 +408,7 @@
 
 //
 */
-#define NVIC_INIT_ITNS2_VAL      0x0
+#define NVIC_INIT_ITNS2_VAL      0x800
 
 
 /*
@@ -565,7 +565,7 @@ __STATIC_INLINE void TZ_SAU_Setup(void)
 //   <o.17>  CRC       <0=> Secure <1=> Non-Secure
 //   <o.18>  CRPT   <0=> Secure <1=> Non-Secure
 */
-#define SCU_INIT_PNSSET1_VAL      0x00000000
+#define SCU_INIT_PNSSET1_VAL      0x00040000
 /*
     PNSSET2
 */
@@ -584,7 +584,7 @@ __STATIC_INLINE void TZ_SAU_Setup(void)
 //   <o.26>  BPWM0      <0=> Secure <1=> Non-Secure
 //   <o.27>  BPWM1      <0=> Secure <1=> Non-Secure
 */
-#define SCU_INIT_PNSSET2_VAL      0x00000000
+#define SCU_INIT_PNSSET2_VAL      0x00000002
 /*
     PNSSET3
 */
@@ -603,7 +603,7 @@ __STATIC_INLINE void TZ_SAU_Setup(void)
 //   <o.20>  UART4      <0=> Secure <1=> Non-Secure
 //   <o.21>  UART5      <0=> Secure <1=> Non-Secure
 */
-#define SCU_INIT_PNSSET3_VAL      0x00010000
+#define SCU_INIT_PNSSET3_VAL      0x00200000
 /*
     PNSSET4
 */
@@ -665,7 +665,7 @@ __STATIC_INLINE void TZ_SAU_Setup(void)
 //   <o.5>  PF      <0=> Secure <1=> Non-Secure
 //   <o.6>  PG      <0=> Secure <1=> Non-Secure
 */
-#define SCU_INIT_IONSSET_VAL      0x00000001
+#define SCU_INIT_IONSSET_VAL      0x0000007F
 /*
 // </h>
 */
diff --git a/targets/TARGET_NUVOTON/TARGET_M2351/device/startup_M2351.c b/targets/TARGET_NUVOTON/TARGET_M2351/device/startup_M2351.c
index a2c7189b8c..05af4ee581 100644
--- a/targets/TARGET_NUVOTON/TARGET_M2351/device/startup_M2351.c
+++ b/targets/TARGET_NUVOTON/TARGET_M2351/device/startup_M2351.c
@@ -328,6 +328,7 @@ const uint32_t __vector_handlers[] = {
  */
 void Reset_Handler(void)
 {
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
     /* Disable register write-protection function */
     SYS_UnlockReg();
     
@@ -336,7 +337,8 @@ void Reset_Handler(void)
     
     /* Enable register write-protection function */
     SYS_LockReg();
-    
+#endif
+
     /**
      * SystemInit() must be called at the very start.
      */
@@ -397,4 +399,4 @@ __asm  {
        }    
     return val;
 }    
-#endif
\ No newline at end of file
+#endif
diff --git a/targets/TARGET_NUVOTON/TARGET_M2351/gpio_api.c b/targets/TARGET_NUVOTON/TARGET_M2351/gpio_api.c
index ff6708e71e..5197234eaa 100644
--- a/targets/TARGET_NUVOTON/TARGET_M2351/gpio_api.c
+++ b/targets/TARGET_NUVOTON/TARGET_M2351/gpio_api.c
@@ -57,6 +57,8 @@ void gpio_mode(gpio_t *obj, PinMode mode)
     pin_mode(obj->pin, mode);
 }
 
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+__attribute__((cmse_nonsecure_entry))
 void gpio_dir(gpio_t *obj, PinDirection direction)
 {
     if (obj->pin == (PinName) NC) {
@@ -84,3 +86,4 @@ void gpio_dir(gpio_t *obj, PinDirection direction)
     
     GPIO_SetMode(gpio_base, 1 << pin_index, mode_intern);
 }
+#endif
\ No newline at end of file
diff --git a/targets/TARGET_NUVOTON/TARGET_M2351/pinmap.c b/targets/TARGET_NUVOTON/TARGET_M2351/pinmap.c
index 3924b3efb9..cf6fb58c6f 100644
--- a/targets/TARGET_NUVOTON/TARGET_M2351/pinmap.c
+++ b/targets/TARGET_NUVOTON/TARGET_M2351/pinmap.c
@@ -22,6 +22,9 @@
 /**
  * Configure pin multi-function
  */
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+__attribute__((cmse_nonsecure_entry))
 void pin_function(PinName pin, int data)
 {
     MBED_ASSERT(pin != (PinName)NC);
@@ -43,6 +46,7 @@ void pin_function(PinName pin, int data)
     //
     //}
 }
+#endif
 
 /**
  * Configure pin pull-up/pull-down
diff --git a/targets/TARGET_NUVOTON/TARGET_M2351/port_api.c b/targets/TARGET_NUVOTON/TARGET_M2351/port_api.c
index 777fcf4357..deadd80ec5 100644
--- a/targets/TARGET_NUVOTON/TARGET_M2351/port_api.c
+++ b/targets/TARGET_NUVOTON/TARGET_M2351/port_api.c
@@ -43,6 +43,8 @@ void port_init(port_t *obj, PortName port, int mask, PinDirection dir)
     port_dir(obj, dir);
 }
 
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+__attribute__((cmse_nonsecure_entry))
 void port_dir(port_t *obj, PinDirection dir)
 {
     uint32_t i;
@@ -57,6 +59,7 @@ void port_dir(port_t *obj, PinDirection dir)
         }
     }
 }
+#endif
 
 void port_mode(port_t *obj, PinMode mode)
 {
diff --git a/targets/TARGET_NUVOTON/TARGET_M2351/serial_api.c b/targets/TARGET_NUVOTON/TARGET_M2351/serial_api.c
index c77cde975e..78722cf8ae 100644
--- a/targets/TARGET_NUVOTON/TARGET_M2351/serial_api.c
+++ b/targets/TARGET_NUVOTON/TARGET_M2351/serial_api.c
@@ -182,6 +182,8 @@ static const struct nu_modinit_s uart_modinit_tab[] = {
 
 extern void mbed_sdk_init(void);
 
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+__attribute__((cmse_nonsecure_entry))
 void serial_init(serial_t *obj, PinName tx, PinName rx)
 {
     // NOTE: With armcc, serial_init() gets called from _sys_open() timing of which is before main()/mbed_sdk_init().
@@ -248,6 +250,7 @@ void serial_init(serial_t *obj, PinName tx, PinName rx)
     }
 }
 
+__attribute__((cmse_nonsecure_entry))
 void serial_free(serial_t *obj)
 {
     const struct nu_modinit_s *modinit = get_modinit(obj->serial.uart, uart_modinit_tab);
@@ -296,6 +299,7 @@ void serial_free(serial_t *obj)
         uart_modinit_mask &= ~(1 << i);
     }
 }
+#endif
 
 void serial_baud(serial_t *obj, int baudrate) {
     // Flush Tx FIFO. Otherwise, output data may get lost on this change.
@@ -1217,4 +1221,4 @@ static void serial_check_dma_usage(DMAUsage *dma_usage, int *dma_ch)
 
 #endif //#ifndef NVT_SERIAL_SYNC_ONLY
 #endif  // #if DEVICE_SERIAL_ASYNCH
-#endif // #if DEVICE_SERIAL
\ No newline at end of file
+#endif // #if DEVICE_SERIAL
diff --git a/targets/TARGET_NUVOTON/TARGET_M2351/sleep.c b/targets/TARGET_NUVOTON/TARGET_M2351/sleep.c
index 0a8616645a..7be7e1f906 100644
--- a/targets/TARGET_NUVOTON/TARGET_M2351/sleep.c
+++ b/targets/TARGET_NUVOTON/TARGET_M2351/sleep.c
@@ -36,6 +36,10 @@ int pwmout_allow_powerdown(void);
 /**
  * Enter Idle mode.
  */
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+__attribute__((cmse_nonsecure_entry))
 void hal_sleep(void)
 {
     struct sleep_s sleep_obj;
@@ -47,6 +51,7 @@ void hal_sleep(void)
 /**
  * Enter Power-down mode while no peripheral is active; otherwise, enter Idle mode.
  */
+__attribute__((cmse_nonsecure_entry))
 void hal_deepsleep(void)
 {
     struct sleep_s sleep_obj;
@@ -54,6 +59,7 @@ void hal_deepsleep(void)
     mbed_enter_sleep(&sleep_obj);
     mbed_exit_sleep(&sleep_obj);
 }
+#endif
 
 static void mbed_enter_sleep(struct sleep_s *obj)
 {