mirror of https://github.com/ARMmbed/mbed-os.git
Merge pull request #13091 from jeromecoutant/PR_BAREMETAL_SUPPORT
STM32 baremetal support step3/3 (F2/F4)pull/13118/head
Anna Bridge
GitHub
commit
58975d1df4
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@ -1,74 +1,53 @@
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||||||
#! armcc -E
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#! armcc -E
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||||||
; Scatter-Loading Description File
|
; Scatter-Loading Description File
|
||||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|
||||||
; Copyright (c) 2016, STMicroelectronics
|
|
||||||
; All rights reserved.
|
|
||||||
;
|
;
|
||||||
; Redistribution and use in source and binary forms, with or without
|
; SPDX-License-Identifier: BSD-3-Clause
|
||||||
; modification, are permitted provided that the following conditions are met:
|
;******************************************************************************
|
||||||
;
|
;* @attention
|
||||||
; 1. Redistributions of source code must retain the above copyright notice,
|
;*
|
||||||
; this list of conditions and the following disclaimer.
|
;* Copyright (c) 2016-2020 STMicroelectronics.
|
||||||
; 2. Redistributions in binary form must reproduce the above copyright notice,
|
;* All rights reserved.
|
||||||
; this list of conditions and the following disclaimer in the documentation
|
;*
|
||||||
; and/or other materials provided with the distribution.
|
;* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
; 3. Neither the name of STMicroelectronics nor the names of its contributors
|
;* the "License"; You may not use this file except in compliance with the
|
||||||
; may be used to endorse or promote products derived from this software
|
;* License. You may obtain a copy of the License at:
|
||||||
; without specific prior written permission.
|
;* opensource.org/licenses/BSD-3-Clause
|
||||||
;
|
;*
|
||||||
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
;******************************************************************************
|
||||||
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
#include "../cmsis_nvic.h"
|
||||||
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
|
||||||
; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
||||||
; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
|
||||||
; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
||||||
; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
|
||||||
; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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|
||||||
|
|
||||||
#if !defined(MBED_APP_START)
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#if !defined(MBED_APP_START)
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||||||
#define MBED_APP_START 0x08000000
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#define MBED_APP_START MBED_ROM_START
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||||||
#endif
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#endif
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||||||
|
|
||||||
#if !defined(MBED_APP_SIZE)
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#if !defined(MBED_APP_SIZE)
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||||||
#define MBED_APP_SIZE 0x100000
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#define MBED_APP_SIZE MBED_ROM_SIZE
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||||||
#endif
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#endif
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||||||
|
|
||||||
#if !defined(MBED_RAM_START)
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|
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#define MBED_RAM_START 0x20000000
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|
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#endif
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||||||
|
|
||||||
#if !defined(MBED_RAM_SIZE)
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|
||||||
#define MBED_RAM_SIZE 0x00020000
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|
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#endif
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|
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#if !defined(MBED_BOOT_STACK_SIZE)
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#if !defined(MBED_BOOT_STACK_SIZE)
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#define MBED_BOOT_STACK_SIZE 0x400
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/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
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#define MBED_BOOT_STACK_SIZE 0x400
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#endif
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#endif
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||||||
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||||||
; 97 vectors * 4 bytes = 388 bytes to reserve (0x184) 8-byte aligned = 0x188 (0x184 + 0x4)
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/* Round up VECTORS_SIZE to 8 bytes */
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#define VECTOR_SIZE 0x188
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#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
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|
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#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
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LR_IROM1 MBED_APP_START MBED_APP_SIZE {
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|
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LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
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ER_IROM1 MBED_APP_START MBED_APP_SIZE {
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||||||
|
*.o (RESET, +First)
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ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
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*(InRoot$$Sections)
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||||||
*.o (RESET, +First)
|
.ANY (+RO)
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||||||
*(InRoot$$Sections)
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|
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.ANY (+RO)
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||||||
}
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}
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||||||
|
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||||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
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RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data
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.ANY (+RW +ZI)
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.ANY (+RW +ZI)
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||||||
}
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}
|
||||||
|
|
||||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
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ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
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}
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}
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|
|
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ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
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ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
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}
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}
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}
|
}
|
||||||
|
|
|
||||||
|
|
@ -1,24 +1,44 @@
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||||||
|
/* Linker script to configure memory regions. */
|
||||||
|
/*
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||||||
|
* SPDX-License-Identifier: BSD-3-Clause
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2016-2020 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
|
* the "License"; You may not use this file except in compliance with the
|
||||||
|
* License. You may obtain a copy of the License at:
|
||||||
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
|
*
|
||||||
|
******************************************************************************
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||||||
|
*/
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#include "../cmsis_nvic.h"
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|
|
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#if !defined(MBED_APP_START)
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#if !defined(MBED_APP_START)
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#define MBED_APP_START 0x8000000
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#define MBED_APP_START MBED_ROM_START
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#endif
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#endif
|
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|
|
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#if !defined(MBED_APP_SIZE)
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#if !defined(MBED_APP_SIZE)
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#define MBED_APP_SIZE 1024k
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#define MBED_APP_SIZE MBED_ROM_SIZE
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#endif
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#endif
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#if !defined(MBED_BOOT_STACK_SIZE)
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#if !defined(MBED_BOOT_STACK_SIZE)
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#define MBED_BOOT_STACK_SIZE 0x400
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/* This value is normally defined by the tools
|
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|
to 0x1000 for bare metal and 0x400 for RTOS */
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#define MBED_BOOT_STACK_SIZE 0x400
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#endif
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#endif
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STACK_SIZE = MBED_BOOT_STACK_SIZE;
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/* Round up VECTORS_SIZE to 8 bytes */
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#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
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/* Linker script to configure memory regions. */
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/* 97 vectors * 4 bytes = 388 bytes to reserve (0x184) */
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/* 8-byte aligned(0x184) = 0x188 */
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MEMORY
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MEMORY
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{
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{
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FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
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FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
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RAM (rwx) : ORIGIN = 0x20000188, LENGTH = 128K - 0x188
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RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE - VECTORS_SIZE
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}
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}
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|
|
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/* Linker script to place sections and symbol values. Should be used together
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/* Linker script to place sections and symbol values. Should be used together
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|
@ -56,6 +76,7 @@ SECTIONS
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{
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{
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KEEP(*(.isr_vector))
|
KEEP(*(.isr_vector))
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*(.text*)
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*(.text*)
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|
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KEEP(*(.init))
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KEEP(*(.init))
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KEEP(*(.fini))
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KEEP(*(.fini))
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|
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@ -92,7 +113,7 @@ SECTIONS
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|
|
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__etext = .;
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__etext = .;
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_sidata = .;
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_sidata = .;
|
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|
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.data : AT (__etext)
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.data : AT (__etext)
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{
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{
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__data_start__ = .;
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__data_start__ = .;
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|
@ -113,7 +134,6 @@ SECTIONS
|
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KEEP(*(.init_array))
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KEEP(*(.init_array))
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PROVIDE_HIDDEN (__init_array_end = .);
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PROVIDE_HIDDEN (__init_array_end = .);
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. = ALIGN(8);
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. = ALIGN(8);
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/* finit data */
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/* finit data */
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PROVIDE_HIDDEN (__fini_array_start = .);
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PROVIDE_HIDDEN (__fini_array_start = .);
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@ -129,6 +149,19 @@ SECTIONS
|
||||||
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} > RAM
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} > RAM
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|
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||||||
|
/* Uninitialized data section
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* This region is not initialized by the C/C++ library and can be used to
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|
* store state across soft reboots. */
|
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|
.uninitialized (NOLOAD):
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||||||
|
{
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||||||
|
. = ALIGN(32);
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__uninitialized_start = .;
|
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|
*(.uninitialized)
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||||||
|
KEEP(*(.keep.uninitialized))
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. = ALIGN(32);
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__uninitialized_end = .;
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||||||
|
} > RAM
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||||||
|
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||||||
.bss :
|
.bss :
|
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{
|
{
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. = ALIGN(8);
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. = ALIGN(8);
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||||||
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|
@ -144,9 +177,9 @@ SECTIONS
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.heap (COPY):
|
.heap (COPY):
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||||||
{
|
{
|
||||||
__end__ = .;
|
__end__ = .;
|
||||||
end = __end__;
|
PROVIDE(end = .);
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||||||
*(.heap*)
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*(.heap*)
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. = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE;
|
. = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE;
|
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__HeapLimit = .;
|
__HeapLimit = .;
|
||||||
} > RAM
|
} > RAM
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||||||
|
|
||||||
|
|
@ -162,7 +195,7 @@ SECTIONS
|
||||||
* size of stack_dummy section */
|
* size of stack_dummy section */
|
||||||
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
|
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
|
||||||
_estack = __StackTop;
|
_estack = __StackTop;
|
||||||
__StackLimit = __StackTop - STACK_SIZE;
|
__StackLimit = __StackTop - MBED_BOOT_STACK_SIZE;
|
||||||
PROVIDE(__stack = __StackTop);
|
PROVIDE(__stack = __StackTop);
|
||||||
|
|
||||||
/* Check if data + heap + stack exceeds RAM limit */
|
/* Check if data + heap + stack exceeds RAM limit */
|
||||||
|
|
|
||||||
|
|
@ -1,36 +1,59 @@
|
||||||
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
|
/* Linker script to configure memory regions.
|
||||||
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x100000; }
|
*
|
||||||
|
* SPDX-License-Identifier: BSD-3-Clause
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2016-2020 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
|
* the "License"; You may not use this file except in compliance with the
|
||||||
|
* License. You may obtain a copy of the License at:
|
||||||
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* Device specific values */
|
||||||
|
|
||||||
/* [ROM = 1024kb = 0x100000] */
|
/* Tools provide -DMBED_ROM_START=xxx -DMBED_ROM_SIZE=xxx -DMBED_RAM_START=xxx -DMBED_RAM_SIZE=xxx */
|
||||||
define symbol __intvec_start__ = MBED_APP_START;
|
|
||||||
define symbol __region_ROM_start__ = 0x08000000;
|
|
||||||
define symbol __region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
|
|
||||||
|
|
||||||
/* [RAM = 128kb = 0x20000] Vector table dynamic copy: 97 vectors = 388 bytes (0x184) to be reserved in RAM */
|
define symbol VECTORS = 97; /* This value must match NVIC_NUM_VECTORS in cmsis_nvic.h */
|
||||||
define symbol __NVIC_start__ = 0x20000000;
|
define symbol HEAP_SIZE = 0xa000;
|
||||||
define symbol __NVIC_end__ = 0x20000187; /*aligned on 8 bytes */
|
|
||||||
define symbol __region_RAM_start__ = 0x20000188;
|
|
||||||
define symbol __region_RAM_end__ = 0x2001FFFF;
|
|
||||||
|
|
||||||
/* Memory regions */
|
/* Common - Do not change */
|
||||||
define memory mem with size = 4G;
|
|
||||||
define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
|
if (!isdefinedsymbol(MBED_APP_START)) {
|
||||||
define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__];
|
define symbol MBED_APP_START = MBED_ROM_START;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (!isdefinedsymbol(MBED_APP_SIZE)) {
|
||||||
|
define symbol MBED_APP_SIZE = MBED_ROM_SIZE;
|
||||||
|
}
|
||||||
|
|
||||||
/* Stack and Heap */
|
|
||||||
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
|
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
|
||||||
|
/* This value is normally defined by the tools
|
||||||
|
to 0x1000 for bare metal and 0x400 for RTOS */
|
||||||
define symbol MBED_BOOT_STACK_SIZE = 0x400;
|
define symbol MBED_BOOT_STACK_SIZE = 0x400;
|
||||||
}
|
}
|
||||||
define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
|
|
||||||
define symbol __size_heap__ = 0xF000;
|
|
||||||
define block CSTACK with alignment = 8, size = __size_cstack__ { };
|
|
||||||
define block HEAP with alignment = 8, size = __size_heap__ { };
|
|
||||||
define block STACKHEAP with fixed order { block HEAP, block CSTACK };
|
|
||||||
|
|
||||||
initialize by copy with packing = zeros { readwrite };
|
/* Round up VECTORS_SIZE to 8 bytes */
|
||||||
|
define symbol VECTORS_SIZE = ((VECTORS * 4) + 7) & ~7;
|
||||||
|
define symbol RAM_REGION_START = MBED_RAM_START + VECTORS_SIZE;
|
||||||
|
define symbol RAM_REGION_SIZE = MBED_RAM_SIZE - VECTORS_SIZE;
|
||||||
|
|
||||||
|
define memory mem with size = 4G;
|
||||||
|
define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE];
|
||||||
|
define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE];
|
||||||
|
|
||||||
|
define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { };
|
||||||
|
define block HEAP with alignment = 8, size = HEAP_SIZE { };
|
||||||
|
|
||||||
|
initialize by copy { readwrite };
|
||||||
do not initialize { section .noinit };
|
do not initialize { section .noinit };
|
||||||
|
|
||||||
place at address mem:__intvec_start__ { readonly section .intvec };
|
place at address mem: MBED_APP_START { readonly section .intvec };
|
||||||
|
|
||||||
place in ROM_region { readonly };
|
place in ROM_region { readonly };
|
||||||
place in RAM_region { readwrite, block STACKHEAP };
|
place in RAM_region { readwrite,
|
||||||
|
block CSTACK, block HEAP };
|
||||||
|
|
|
||||||
|
|
@ -1,40 +1,39 @@
|
||||||
/* mbed Microcontroller Library
|
/* mbed Microcontroller Library
|
||||||
*******************************************************************************
|
* SPDX-License-Identifier: BSD-3-Clause
|
||||||
* Copyright (c) 2016, STMicroelectronics
|
******************************************************************************
|
||||||
* All rights reserved.
|
* @attention
|
||||||
*
|
*
|
||||||
* Redistribution and use in source and binary forms, with or without
|
* <h2><center>© Copyright (c) 2016-2020 STMicroelectronics.
|
||||||
* modification, are permitted provided that the following conditions are met:
|
* All rights reserved.</center></h2>
|
||||||
*
|
*
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
* this list of conditions and the following disclaimer.
|
* the "License"; You may not use this file except in compliance with the
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
* License. You may obtain a copy of the License at:
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
******************************************************************************
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
*/
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
|
||||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
|
||||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
||||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
|
||||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
||||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
|
||||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*******************************************************************************
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef MBED_CMSIS_NVIC_H
|
#ifndef MBED_CMSIS_NVIC_H
|
||||||
#define MBED_CMSIS_NVIC_H
|
#define MBED_CMSIS_NVIC_H
|
||||||
|
|
||||||
// CORE: 16 vectors (= 64 bytes from 0x00 to 0x3F)
|
#if !defined(MBED_ROM_START)
|
||||||
// MCU Peripherals: 81 vectors
|
#define MBED_ROM_START 0x8000000
|
||||||
// Total: 388 bytes to be reserved in RAM (see scatter file)
|
#endif
|
||||||
|
|
||||||
|
#if !defined(MBED_ROM_SIZE)
|
||||||
|
#define MBED_ROM_SIZE 0x100000 // 1.0 MB
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(MBED_RAM_START)
|
||||||
|
#define MBED_RAM_START 0x20000000
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(MBED_RAM_SIZE)
|
||||||
|
#define MBED_RAM_SIZE 0x20000 // 128 KB
|
||||||
|
#endif
|
||||||
|
|
||||||
#define NVIC_NUM_VECTORS 97
|
#define NVIC_NUM_VECTORS 97
|
||||||
#define NVIC_RAM_VECTOR_ADDRESS 0x20000000 // Vectors positioned at start of RAM
|
#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
|
||||||
|
|
@ -147,6 +147,11 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
|
||||||
regarding system frequency refer to product datasheet. */
|
regarding system frequency refer to product datasheet. */
|
||||||
__HAL_RCC_PWR_CLK_ENABLE();
|
__HAL_RCC_PWR_CLK_ENABLE();
|
||||||
|
|
||||||
|
// Select HSI as system clock source to allow modification of the PLL configuration
|
||||||
|
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK;
|
||||||
|
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
|
||||||
|
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0);
|
||||||
|
|
||||||
// Enable HSE oscillator and activate PLL with HSE as source
|
// Enable HSE oscillator and activate PLL with HSE as source
|
||||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
||||||
if (bypass == 0) {
|
if (bypass == 0) {
|
||||||
|
|
@ -194,6 +199,11 @@ uint8_t SetSysClock_PLL_HSI(void)
|
||||||
regarding system frequency refer to product datasheet. */
|
regarding system frequency refer to product datasheet. */
|
||||||
__HAL_RCC_PWR_CLK_ENABLE();
|
__HAL_RCC_PWR_CLK_ENABLE();
|
||||||
|
|
||||||
|
// Select HSI as system clock source to allow modification of the PLL configuration
|
||||||
|
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK;
|
||||||
|
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
|
||||||
|
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0);
|
||||||
|
|
||||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
|
||||||
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
|
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
|
||||||
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
|
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
|
||||||
|
|
|
||||||
|
|
@ -99,22 +99,29 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
|
||||||
__HAL_RCC_PWR_CLK_ENABLE();
|
__HAL_RCC_PWR_CLK_ENABLE();
|
||||||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
|
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
|
||||||
|
|
||||||
// Enable HSE oscillator and activate PLL with HSE as source
|
/* Get the Clocks configuration according to the internal RCC registers */
|
||||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
HAL_RCC_GetOscConfig(&RCC_OscInitStruct);
|
||||||
if (bypass == 0) {
|
|
||||||
RCC_OscInitStruct.HSEState = RCC_HSE_ON; // External 8 MHz xtal on OSC_IN/OSC_OUT
|
|
||||||
} else {
|
|
||||||
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; // External 8 MHz clock on OSC_IN
|
|
||||||
}
|
|
||||||
|
|
||||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
/* PLL could be already configured by bootlader */
|
||||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
if (RCC_OscInitStruct.PLL.PLLState != RCC_PLL_ON) {
|
||||||
RCC_OscInitStruct.PLL.PLLM = 8; // VCO input clock = 1 MHz (8 MHz / 8)
|
|
||||||
RCC_OscInitStruct.PLL.PLLN = 336; // VCO output clock = 336 MHz (1 MHz * 336)
|
// Enable HSE oscillator and activate PLL with HSE as source
|
||||||
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; // PLLCLK = 84 MHz (336 MHz / 4)
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
||||||
RCC_OscInitStruct.PLL.PLLQ = 7; // USB clock = 48 MHz (336 MHz / 7) --> OK for USB
|
if (bypass == 0) {
|
||||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
|
RCC_OscInitStruct.HSEState = RCC_HSE_ON; // External 8 MHz xtal on OSC_IN/OSC_OUT
|
||||||
return 0; // FAIL
|
} else {
|
||||||
|
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; // External 8 MHz clock on OSC_IN
|
||||||
|
}
|
||||||
|
|
||||||
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||||
|
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||||
|
RCC_OscInitStruct.PLL.PLLM = 8; // VCO input clock = 1 MHz (8 MHz / 8)
|
||||||
|
RCC_OscInitStruct.PLL.PLLN = 336; // VCO output clock = 336 MHz (1 MHz * 336)
|
||||||
|
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; // PLLCLK = 84 MHz (336 MHz / 4)
|
||||||
|
RCC_OscInitStruct.PLL.PLLQ = 7; // USB clock = 48 MHz (336 MHz / 7) --> OK for USB
|
||||||
|
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
|
||||||
|
return 0; // FAIL
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
// Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers
|
// Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers
|
||||||
|
|
|
||||||
|
|
@ -1,76 +1,53 @@
|
||||||
#! armcc -E
|
#! armcc -E
|
||||||
; Scatter-Loading Description File
|
; Scatter-Loading Description File
|
||||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|
||||||
; Copyright (c) 2014, STMicroelectronics
|
|
||||||
; All rights reserved.
|
|
||||||
;
|
;
|
||||||
; Redistribution and use in source and binary forms, with or without
|
; SPDX-License-Identifier: BSD-3-Clause
|
||||||
; modification, are permitted provided that the following conditions are met:
|
;******************************************************************************
|
||||||
;
|
;* @attention
|
||||||
; 1. Redistributions of source code must retain the above copyright notice,
|
;*
|
||||||
; this list of conditions and the following disclaimer.
|
;* Copyright (c) 2014-2020 STMicroelectronics.
|
||||||
; 2. Redistributions in binary form must reproduce the above copyright notice,
|
;* All rights reserved.
|
||||||
; this list of conditions and the following disclaimer in the documentation
|
;*
|
||||||
; and/or other materials provided with the distribution.
|
;* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
; 3. Neither the name of STMicroelectronics nor the names of its contributors
|
;* the "License"; You may not use this file except in compliance with the
|
||||||
; may be used to endorse or promote products derived from this software
|
;* License. You may obtain a copy of the License at:
|
||||||
; without specific prior written permission.
|
;* opensource.org/licenses/BSD-3-Clause
|
||||||
;
|
;*
|
||||||
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
;******************************************************************************
|
||||||
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
#include "../cmsis_nvic.h"
|
||||||
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
|
||||||
; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
||||||
; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
|
||||||
; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
||||||
; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
|
||||||
; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|
||||||
|
|
||||||
#if !defined(MBED_APP_START)
|
#if !defined(MBED_APP_START)
|
||||||
#define MBED_APP_START 0x08000000
|
#define MBED_APP_START MBED_ROM_START
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
; STM32F401RE: 512KB FLASH
|
|
||||||
#if !defined(MBED_APP_SIZE)
|
#if !defined(MBED_APP_SIZE)
|
||||||
#define MBED_APP_SIZE 0x80000
|
#define MBED_APP_SIZE MBED_ROM_SIZE
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
; 96KB SRAM
|
|
||||||
#if !defined(MBED_RAM_START)
|
|
||||||
#define MBED_RAM_START 0x20000000
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if !defined(MBED_RAM_SIZE)
|
|
||||||
#define MBED_RAM_SIZE 0x18000
|
|
||||||
#endif
|
|
||||||
|
|
||||||
|
|
||||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||||
#define MBED_BOOT_STACK_SIZE 0x400
|
/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
|
||||||
|
#define MBED_BOOT_STACK_SIZE 0x400
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
; Total: 101 vectors = 404 bytes (0x194) 8-byte aligned = 0x198 (0x194 + 0x4) to be reserved in RAM
|
/* Round up VECTORS_SIZE to 8 bytes */
|
||||||
#define VECTOR_SIZE 0x198
|
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
|
||||||
|
|
||||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
LR_IROM1 MBED_APP_START MBED_APP_SIZE {
|
||||||
|
|
||||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
ER_IROM1 MBED_APP_START MBED_APP_SIZE {
|
||||||
|
*.o (RESET, +First)
|
||||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
*(InRoot$$Sections)
|
||||||
*.o (RESET, +First)
|
.ANY (+RO)
|
||||||
*(InRoot$$Sections)
|
|
||||||
.ANY (+RO)
|
|
||||||
}
|
}
|
||||||
|
|
||||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data
|
||||||
.ANY (+RW +ZI)
|
.ANY (+RW +ZI)
|
||||||
}
|
}
|
||||||
|
|
||||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
|
||||||
}
|
}
|
||||||
|
|
||||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -1,23 +1,51 @@
|
||||||
/* Linker script to configure memory regions. */
|
/* Linker script to configure memory regions. */
|
||||||
/* 0x194 reserved for vectors 8-byte aligned = 0x198 (0x194 + 0x4) */
|
/*
|
||||||
|
* SPDX-License-Identifier: BSD-3-Clause
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2016-2020 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
|
* the "License"; You may not use this file except in compliance with the
|
||||||
|
* License. You may obtain a copy of the License at:
|
||||||
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
#include "../cmsis_nvic.h"
|
||||||
#define MBED_BOOT_STACK_SIZE 0x400
|
|
||||||
|
|
||||||
|
#if !defined(MBED_APP_START)
|
||||||
|
#define MBED_APP_START MBED_ROM_START
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
STACK_SIZE = MBED_BOOT_STACK_SIZE;
|
#if !defined(MBED_APP_SIZE)
|
||||||
|
#define MBED_APP_SIZE MBED_ROM_SIZE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||||
|
/* This value is normally defined by the tools
|
||||||
|
to 0x1000 for bare metal and 0x400 for RTOS */
|
||||||
|
#define MBED_BOOT_STACK_SIZE 0x400
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Round up VECTORS_SIZE to 8 bytes */
|
||||||
|
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
|
||||||
|
|
||||||
MEMORY
|
MEMORY
|
||||||
{
|
{
|
||||||
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K
|
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
|
||||||
RAM (rwx) : ORIGIN = 0x20000198, LENGTH = 96k - (0x194+0x4)
|
RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE - VECTORS_SIZE
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Linker script to place sections and symbol values. Should be used together
|
/* Linker script to place sections and symbol values. Should be used together
|
||||||
* with other linker script that defines memory regions FLASH and RAM.
|
* with other linker script that defines memory regions FLASH and RAM.
|
||||||
* It references following symbols, which must be defined in code:
|
* It references following symbols, which must be defined in code:
|
||||||
* Reset_Handler : Entry of reset handler
|
* Reset_Handler : Entry of reset handler
|
||||||
*
|
*
|
||||||
* It defines following symbols, which code can use without definition:
|
* It defines following symbols, which code can use without definition:
|
||||||
* __exidx_start
|
* __exidx_start
|
||||||
* __exidx_end
|
* __exidx_end
|
||||||
|
|
@ -48,6 +76,7 @@ SECTIONS
|
||||||
{
|
{
|
||||||
KEEP(*(.isr_vector))
|
KEEP(*(.isr_vector))
|
||||||
*(.text*)
|
*(.text*)
|
||||||
|
|
||||||
KEEP(*(.init))
|
KEEP(*(.init))
|
||||||
KEEP(*(.fini))
|
KEEP(*(.fini))
|
||||||
|
|
||||||
|
|
@ -84,7 +113,7 @@ SECTIONS
|
||||||
|
|
||||||
__etext = .;
|
__etext = .;
|
||||||
_sidata = .;
|
_sidata = .;
|
||||||
|
|
||||||
.data : AT (__etext)
|
.data : AT (__etext)
|
||||||
{
|
{
|
||||||
__data_start__ = .;
|
__data_start__ = .;
|
||||||
|
|
@ -105,7 +134,6 @@ SECTIONS
|
||||||
KEEP(*(.init_array))
|
KEEP(*(.init_array))
|
||||||
PROVIDE_HIDDEN (__init_array_end = .);
|
PROVIDE_HIDDEN (__init_array_end = .);
|
||||||
|
|
||||||
|
|
||||||
. = ALIGN(8);
|
. = ALIGN(8);
|
||||||
/* finit data */
|
/* finit data */
|
||||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||||
|
|
@ -121,6 +149,19 @@ SECTIONS
|
||||||
|
|
||||||
} > RAM
|
} > RAM
|
||||||
|
|
||||||
|
/* Uninitialized data section
|
||||||
|
* This region is not initialized by the C/C++ library and can be used to
|
||||||
|
* store state across soft reboots. */
|
||||||
|
.uninitialized (NOLOAD):
|
||||||
|
{
|
||||||
|
. = ALIGN(32);
|
||||||
|
__uninitialized_start = .;
|
||||||
|
*(.uninitialized)
|
||||||
|
KEEP(*(.keep.uninitialized))
|
||||||
|
. = ALIGN(32);
|
||||||
|
__uninitialized_end = .;
|
||||||
|
} > RAM
|
||||||
|
|
||||||
.bss :
|
.bss :
|
||||||
{
|
{
|
||||||
. = ALIGN(8);
|
. = ALIGN(8);
|
||||||
|
|
@ -136,9 +177,9 @@ SECTIONS
|
||||||
.heap (COPY):
|
.heap (COPY):
|
||||||
{
|
{
|
||||||
__end__ = .;
|
__end__ = .;
|
||||||
end = __end__;
|
PROVIDE(end = .);
|
||||||
*(.heap*)
|
*(.heap*)
|
||||||
. = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE;
|
. = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE;
|
||||||
__HeapLimit = .;
|
__HeapLimit = .;
|
||||||
} > RAM
|
} > RAM
|
||||||
|
|
||||||
|
|
@ -154,7 +195,7 @@ SECTIONS
|
||||||
* size of stack_dummy section */
|
* size of stack_dummy section */
|
||||||
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
|
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
|
||||||
_estack = __StackTop;
|
_estack = __StackTop;
|
||||||
__StackLimit = __StackTop - STACK_SIZE;
|
__StackLimit = __StackTop - MBED_BOOT_STACK_SIZE;
|
||||||
PROVIDE(__stack = __StackTop);
|
PROVIDE(__stack = __StackTop);
|
||||||
|
|
||||||
/* Check if data + heap + stack exceeds RAM limit */
|
/* Check if data + heap + stack exceeds RAM limit */
|
||||||
|
|
|
||||||
|
|
@ -1,35 +1,59 @@
|
||||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
/* Linker script to configure memory regions.
|
||||||
/*-Editor annotation file-*/
|
*
|
||||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
* SPDX-License-Identifier: BSD-3-Clause
|
||||||
/*-Specials-*/
|
******************************************************************************
|
||||||
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
* @attention
|
||||||
/*-Memory Regions-*/
|
*
|
||||||
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
|
* Copyright (c) 2016-2020 STMicroelectronics.
|
||||||
define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
|
* All rights reserved.
|
||||||
define symbol __NVIC_start__ = 0x20000000;
|
*
|
||||||
define symbol __NVIC_end__ = 0x20000197; /* to be aligned on 8 bytes */
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
define symbol __ICFEDIT_region_RAM_start__ = 0x20000198;
|
* the "License"; You may not use this file except in compliance with the
|
||||||
define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF;
|
* License. You may obtain a copy of the License at:
|
||||||
/*-Sizes-*/
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* Device specific values */
|
||||||
|
|
||||||
|
/* Tools provide -DMBED_ROM_START=xxx -DMBED_ROM_SIZE=xxx -DMBED_RAM_START=xxx -DMBED_RAM_SIZE=xxx */
|
||||||
|
|
||||||
|
define symbol VECTORS = 101; /* This value must match NVIC_NUM_VECTORS in cmsis_nvic.h */
|
||||||
|
define symbol HEAP_SIZE = 0x4000;
|
||||||
|
|
||||||
|
/* Common - Do not change */
|
||||||
|
|
||||||
|
if (!isdefinedsymbol(MBED_APP_START)) {
|
||||||
|
define symbol MBED_APP_START = MBED_ROM_START;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (!isdefinedsymbol(MBED_APP_SIZE)) {
|
||||||
|
define symbol MBED_APP_SIZE = MBED_ROM_SIZE;
|
||||||
|
}
|
||||||
|
|
||||||
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
|
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
|
||||||
|
/* This value is normally defined by the tools
|
||||||
|
to 0x1000 for bare metal and 0x400 for RTOS */
|
||||||
define symbol MBED_BOOT_STACK_SIZE = 0x400;
|
define symbol MBED_BOOT_STACK_SIZE = 0x400;
|
||||||
}
|
}
|
||||||
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
|
|
||||||
define symbol __ICFEDIT_size_heap__ = 0x6000;
|
/* Round up VECTORS_SIZE to 8 bytes */
|
||||||
/**** End of ICF editor section. ###ICF###*/
|
define symbol VECTORS_SIZE = ((VECTORS * 4) + 7) & ~7;
|
||||||
|
define symbol RAM_REGION_START = MBED_RAM_START + VECTORS_SIZE;
|
||||||
|
define symbol RAM_REGION_SIZE = MBED_RAM_SIZE - VECTORS_SIZE;
|
||||||
|
|
||||||
define memory mem with size = 4G;
|
define memory mem with size = 4G;
|
||||||
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE];
|
||||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE];
|
||||||
|
|
||||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { };
|
||||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
define block HEAP with alignment = 8, size = HEAP_SIZE { };
|
||||||
|
|
||||||
initialize by copy { readwrite };
|
initialize by copy { readwrite };
|
||||||
do not initialize { section .noinit };
|
do not initialize { section .noinit };
|
||||||
|
|
||||||
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
place at address mem: MBED_APP_START { readonly section .intvec };
|
||||||
|
|
||||||
place in ROM_region { readonly };
|
place in ROM_region { readonly };
|
||||||
place in RAM_region { readwrite,
|
place in RAM_region { readwrite,
|
||||||
block HEAP, block CSTACK };
|
block CSTACK, block HEAP };
|
||||||
|
|
|
||||||
|
|
@ -1,41 +1,39 @@
|
||||||
/* mbed Microcontroller Library
|
/* mbed Microcontroller Library
|
||||||
*******************************************************************************
|
* SPDX-License-Identifier: BSD-3-Clause
|
||||||
* Copyright (c) 2014, STMicroelectronics
|
******************************************************************************
|
||||||
* All rights reserved.
|
* @attention
|
||||||
*
|
*
|
||||||
* Redistribution and use in source and binary forms, with or without
|
* <h2><center>© Copyright (c) 2016-2020 STMicroelectronics.
|
||||||
* modification, are permitted provided that the following conditions are met:
|
* All rights reserved.</center></h2>
|
||||||
*
|
*
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
* this list of conditions and the following disclaimer.
|
* the "License"; You may not use this file except in compliance with the
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
* License. You may obtain a copy of the License at:
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
******************************************************************************
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
*/
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
|
||||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
|
||||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
||||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
|
||||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
||||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
|
||||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*******************************************************************************
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef MBED_CMSIS_NVIC_H
|
#ifndef MBED_CMSIS_NVIC_H
|
||||||
#define MBED_CMSIS_NVIC_H
|
#define MBED_CMSIS_NVIC_H
|
||||||
|
|
||||||
// STM32F401RE
|
#if !defined(MBED_ROM_START)
|
||||||
// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F
|
#define MBED_ROM_START 0x8000000
|
||||||
// MCU Peripherals: 85 vectors = 340 bytes from 0x40 to ...
|
#endif
|
||||||
// Total: 101 vectors = 404 bytes (0x194) to be reserved in RAM
|
|
||||||
|
#if !defined(MBED_ROM_SIZE)
|
||||||
|
#define MBED_ROM_SIZE 0x80000 // 512 KB
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(MBED_RAM_START)
|
||||||
|
#define MBED_RAM_START 0x20000000
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(MBED_RAM_SIZE)
|
||||||
|
#define MBED_RAM_SIZE 0x18000 // 96 KB
|
||||||
|
#endif
|
||||||
|
|
||||||
#define NVIC_NUM_VECTORS 101
|
#define NVIC_NUM_VECTORS 101
|
||||||
#define NVIC_RAM_VECTOR_ADDRESS 0x20000000 // Vectors positioned at start of RAM
|
#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
|
||||||
|
|
@ -1,44 +1,47 @@
|
||||||
/* mbed Microcontroller Library
|
/* mbed Microcontroller Library
|
||||||
*******************************************************************************
|
|
||||||
* Copyright (c) 2014-2019, STMicroelectronics
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* SPDX-License-Identifier: BSD-3-Clause
|
* SPDX-License-Identifier: BSD-3-Clause
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
*
|
*
|
||||||
* Redistribution and use in source and binary forms, with or without
|
* <h2><center>© Copyright (c) 2016-2020 STMicroelectronics.
|
||||||
* modification, are permitted provided that the following conditions are met:
|
* All rights reserved.</center></h2>
|
||||||
*
|
*
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
* this list of conditions and the following disclaimer.
|
* the "License"; You may not use this file except in compliance with the
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
* License. You may obtain a copy of the License at:
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
******************************************************************************
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
*/
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
|
||||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
|
||||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
||||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
|
||||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
||||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
|
||||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*******************************************************************************
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef MBED_CMSIS_NVIC_H
|
#ifndef MBED_CMSIS_NVIC_H
|
||||||
#define MBED_CMSIS_NVIC_H
|
#define MBED_CMSIS_NVIC_H
|
||||||
|
|
||||||
// STM32F407VG
|
#if !defined(MBED_ROM_START)
|
||||||
// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F
|
#define MBED_ROM_START 0x8000000
|
||||||
// MCU Peripherals: 82 vectors = 328 bytes from 0x40 to ...
|
#endif
|
||||||
// Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM
|
|
||||||
|
#if !defined(MBED_ROM_SIZE)
|
||||||
|
#define MBED_ROM_SIZE 0x80000 // 512 KB
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(MBED_RAM_START)
|
||||||
|
#define MBED_RAM_START 0x20000000
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(MBED_RAM_SIZE)
|
||||||
|
#define MBED_RAM_SIZE 0x20000 // 128 KB
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(MBED_RAM1_START)
|
||||||
|
#define MBED_RAM1_START 0x10000000
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(MBED_RAM1_SIZE)
|
||||||
|
#define MBED_RAM1_SIZE 0x10000 // 64 KB
|
||||||
|
#endif
|
||||||
|
|
||||||
#define NVIC_NUM_VECTORS 98
|
#define NVIC_NUM_VECTORS 98
|
||||||
#define NVIC_RAM_VECTOR_ADDRESS 0x20000000 // Vectors positioned at start of RAM
|
#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
|
||||||
|
|
@ -1,85 +1,64 @@
|
||||||
#! armcc -E
|
#! armcc -E
|
||||||
; Scatter-Loading Description File
|
; Scatter-Loading Description File
|
||||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|
||||||
; Copyright (c) 2014, STMicroelectronics
|
|
||||||
; All rights reserved.
|
|
||||||
;
|
;
|
||||||
; Redistribution and use in source and binary forms, with or without
|
; SPDX-License-Identifier: BSD-3-Clause
|
||||||
; modification, are permitted provided that the following conditions are met:
|
;******************************************************************************
|
||||||
;
|
;* @attention
|
||||||
; 1. Redistributions of source code must retain the above copyright notice,
|
;*
|
||||||
; this list of conditions and the following disclaimer.
|
;* Copyright (c) 2014-2020 STMicroelectronics.
|
||||||
; 2. Redistributions in binary form must reproduce the above copyright notice,
|
;* All rights reserved.
|
||||||
; this list of conditions and the following disclaimer in the documentation
|
;*
|
||||||
; and/or other materials provided with the distribution.
|
;* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
; 3. Neither the name of STMicroelectronics nor the names of its contributors
|
;* the "License"; You may not use this file except in compliance with the
|
||||||
; may be used to endorse or promote products derived from this software
|
;* License. You may obtain a copy of the License at:
|
||||||
; without specific prior written permission.
|
;* opensource.org/licenses/BSD-3-Clause
|
||||||
;
|
;*
|
||||||
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
;******************************************************************************
|
||||||
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
#include "../cmsis_nvic.h"
|
||||||
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
|
||||||
; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
||||||
; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
|
||||||
; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
||||||
; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
|
||||||
; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|
||||||
|
|
||||||
#if !defined(MBED_APP_START)
|
#if !defined(MBED_APP_START)
|
||||||
#define MBED_APP_START 0x08000000
|
#define MBED_APP_START MBED_ROM_START
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
; STM32F411RE: 512 KB FLASH (0x80000)
|
|
||||||
#if !defined(MBED_APP_SIZE)
|
#if !defined(MBED_APP_SIZE)
|
||||||
#define MBED_APP_SIZE 0x80000
|
#define MBED_APP_SIZE MBED_ROM_SIZE
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
; 128 KB SRAM (0x20000)
|
|
||||||
#if !defined(MBED_RAM_START)
|
|
||||||
#define MBED_RAM_START 0x20000000
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if !defined(MBED_RAM_SIZE)
|
|
||||||
#define MBED_RAM_SIZE 0x20000
|
|
||||||
#endif
|
|
||||||
|
|
||||||
|
|
||||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||||
#define MBED_BOOT_STACK_SIZE 0x400
|
/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
|
||||||
|
#define MBED_BOOT_STACK_SIZE 0x400
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
; Total: 102 vectors = 408 bytes (0x198) to be reserved in RAM
|
/* Round up VECTORS_SIZE to 8 bytes */
|
||||||
#define VECTOR_SIZE 0x198
|
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
|
||||||
|
|
||||||
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
|
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
|
||||||
|
|
||||||
#define MBED_IRAM1_START (MBED_RAM_START + VECTOR_SIZE + MBED_CRASH_REPORT_RAM_SIZE)
|
#define MBED_IRAM1_START (MBED_RAM_START + VECTORS_SIZE + MBED_CRASH_REPORT_RAM_SIZE)
|
||||||
#define MBED_IRAM1_SIZE (MBED_RAM_SIZE - VECTOR_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
|
#define MBED_IRAM1_SIZE (MBED_RAM_SIZE - VECTORS_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
|
||||||
|
|
||||||
|
|
||||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE+MBED_CRASH_REPORT_RAM_SIZE)
|
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE + VECTORS_SIZE + MBED_CRASH_REPORT_RAM_SIZE)
|
||||||
|
|
||||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
LR_IROM1 MBED_APP_START MBED_APP_SIZE {
|
||||||
|
|
||||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
ER_IROM1 MBED_APP_START MBED_APP_SIZE {
|
||||||
*.o (RESET, +First)
|
*.o (RESET, +First)
|
||||||
*(InRoot$$Sections)
|
*(InRoot$$Sections)
|
||||||
.ANY (+RO)
|
.ANY (+RO)
|
||||||
}
|
}
|
||||||
|
|
||||||
RW_m_crash_data (MBED_RAM_START+VECTOR_SIZE) EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
|
RW_m_crash_data (MBED_RAM_START + VECTORS_SIZE) EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
|
||||||
}
|
}
|
||||||
|
|
||||||
RW_IRAM1 MBED_IRAM1_START MBED_IRAM1_SIZE { ; RW data
|
RW_IRAM1 MBED_IRAM1_START MBED_IRAM1_SIZE { ; RW data
|
||||||
.ANY (+RW +ZI)
|
.ANY (+RW +ZI)
|
||||||
}
|
}
|
||||||
|
|
||||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - RAM_FIXED_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||||
}
|
}
|
||||||
|
|
||||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -1,31 +1,53 @@
|
||||||
|
/* Linker script to configure memory regions. */
|
||||||
|
/*
|
||||||
|
* SPDX-License-Identifier: BSD-3-Clause
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2016-2020 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
|
* the "License"; You may not use this file except in compliance with the
|
||||||
|
* License. You may obtain a copy of the License at:
|
||||||
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "../cmsis_nvic.h"
|
||||||
|
|
||||||
|
|
||||||
#if !defined(MBED_APP_START)
|
#if !defined(MBED_APP_START)
|
||||||
#define MBED_APP_START 0x08000000
|
#define MBED_APP_START MBED_ROM_START
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if !defined(MBED_APP_SIZE)
|
#if !defined(MBED_APP_SIZE)
|
||||||
#define MBED_APP_SIZE 512K
|
#define MBED_APP_SIZE MBED_ROM_SIZE
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||||
#define MBED_BOOT_STACK_SIZE 0x400
|
/* This value is normally defined by the tools
|
||||||
|
to 0x1000 for bare metal and 0x400 for RTOS */
|
||||||
|
#define MBED_BOOT_STACK_SIZE 0x400
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
STACK_SIZE = MBED_BOOT_STACK_SIZE;
|
/* Round up VECTORS_SIZE to 8 bytes */
|
||||||
|
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
|
||||||
|
|
||||||
M_CRASH_DATA_RAM_SIZE = 0x100;
|
M_CRASH_DATA_RAM_SIZE = 0x100;
|
||||||
|
|
||||||
/* Linker script to configure memory regions. */
|
|
||||||
MEMORY
|
MEMORY
|
||||||
{
|
{
|
||||||
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
|
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
|
||||||
RAM (rwx) : ORIGIN = 0x20000198, LENGTH = 128k - 0x198
|
RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE - VECTORS_SIZE
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Linker script to place sections and symbol values. Should be used together
|
/* Linker script to place sections and symbol values. Should be used together
|
||||||
* with other linker script that defines memory regions FLASH and RAM.
|
* with other linker script that defines memory regions FLASH and RAM.
|
||||||
* It references following symbols, which must be defined in code:
|
* It references following symbols, which must be defined in code:
|
||||||
* Reset_Handler : Entry of reset handler
|
* Reset_Handler : Entry of reset handler
|
||||||
*
|
*
|
||||||
* It defines following symbols, which code can use without definition:
|
* It defines following symbols, which code can use without definition:
|
||||||
* __exidx_start
|
* __exidx_start
|
||||||
* __exidx_end
|
* __exidx_end
|
||||||
|
|
@ -56,6 +78,7 @@ SECTIONS
|
||||||
{
|
{
|
||||||
KEEP(*(.isr_vector))
|
KEEP(*(.isr_vector))
|
||||||
*(.text*)
|
*(.text*)
|
||||||
|
|
||||||
KEEP(*(.init))
|
KEEP(*(.init))
|
||||||
KEEP(*(.fini))
|
KEEP(*(.fini))
|
||||||
|
|
||||||
|
|
@ -125,7 +148,6 @@ SECTIONS
|
||||||
KEEP(*(.init_array))
|
KEEP(*(.init_array))
|
||||||
PROVIDE_HIDDEN (__init_array_end = .);
|
PROVIDE_HIDDEN (__init_array_end = .);
|
||||||
|
|
||||||
|
|
||||||
. = ALIGN(8);
|
. = ALIGN(8);
|
||||||
/* finit data */
|
/* finit data */
|
||||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||||
|
|
@ -141,6 +163,19 @@ SECTIONS
|
||||||
|
|
||||||
} > RAM
|
} > RAM
|
||||||
|
|
||||||
|
/* Uninitialized data section
|
||||||
|
* This region is not initialized by the C/C++ library and can be used to
|
||||||
|
* store state across soft reboots. */
|
||||||
|
.uninitialized (NOLOAD):
|
||||||
|
{
|
||||||
|
. = ALIGN(32);
|
||||||
|
__uninitialized_start = .;
|
||||||
|
*(.uninitialized)
|
||||||
|
KEEP(*(.keep.uninitialized))
|
||||||
|
. = ALIGN(32);
|
||||||
|
__uninitialized_end = .;
|
||||||
|
} > RAM
|
||||||
|
|
||||||
.bss :
|
.bss :
|
||||||
{
|
{
|
||||||
. = ALIGN(8);
|
. = ALIGN(8);
|
||||||
|
|
@ -156,9 +191,9 @@ SECTIONS
|
||||||
.heap (COPY):
|
.heap (COPY):
|
||||||
{
|
{
|
||||||
__end__ = .;
|
__end__ = .;
|
||||||
end = __end__;
|
PROVIDE(end = .);
|
||||||
*(.heap*)
|
*(.heap*)
|
||||||
. = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE;
|
. = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE;
|
||||||
__HeapLimit = .;
|
__HeapLimit = .;
|
||||||
} > RAM
|
} > RAM
|
||||||
|
|
||||||
|
|
@ -174,7 +209,7 @@ SECTIONS
|
||||||
* size of stack_dummy section */
|
* size of stack_dummy section */
|
||||||
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
|
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
|
||||||
_estack = __StackTop;
|
_estack = __StackTop;
|
||||||
__StackLimit = __StackTop - STACK_SIZE;
|
__StackLimit = __StackTop - MBED_BOOT_STACK_SIZE;
|
||||||
PROVIDE(__stack = __StackTop);
|
PROVIDE(__stack = __StackTop);
|
||||||
|
|
||||||
/* Check if data + heap + stack exceeds RAM limit */
|
/* Check if data + heap + stack exceeds RAM limit */
|
||||||
|
|
|
||||||
|
|
@ -1,5 +1,25 @@
|
||||||
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
|
/* Linker script to configure memory regions.
|
||||||
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x80000; }
|
*
|
||||||
|
* SPDX-License-Identifier: BSD-3-Clause
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2016-2020 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
|
* the "License"; You may not use this file except in compliance with the
|
||||||
|
* License. You may obtain a copy of the License at:
|
||||||
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* Device specific values */
|
||||||
|
|
||||||
|
/* Tools provide -DMBED_ROM_START=xxx -DMBED_ROM_SIZE=xxx -DMBED_RAM_START=xxx -DMBED_RAM_SIZE=xxx */
|
||||||
|
|
||||||
|
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = MBED_ROM_START; }
|
||||||
|
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_SIZE; }
|
||||||
|
|
||||||
/* [ROM = 512kb = 0x80000] */
|
/* [ROM = 512kb = 0x80000] */
|
||||||
define symbol __intvec_start__ = MBED_APP_START;
|
define symbol __intvec_start__ = MBED_APP_START;
|
||||||
|
|
|
||||||
|
|
@ -1,41 +1,39 @@
|
||||||
/* mbed Microcontroller Library
|
/* mbed Microcontroller Library
|
||||||
*******************************************************************************
|
* SPDX-License-Identifier: BSD-3-Clause
|
||||||
* Copyright (c) 2014, STMicroelectronics
|
******************************************************************************
|
||||||
* All rights reserved.
|
* @attention
|
||||||
*
|
*
|
||||||
* Redistribution and use in source and binary forms, with or without
|
* <h2><center>© Copyright (c) 2016-2020 STMicroelectronics.
|
||||||
* modification, are permitted provided that the following conditions are met:
|
* All rights reserved.</center></h2>
|
||||||
*
|
*
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
* this list of conditions and the following disclaimer.
|
* the "License"; You may not use this file except in compliance with the
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
* License. You may obtain a copy of the License at:
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
******************************************************************************
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
*/
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
|
||||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
|
||||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
||||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
|
||||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
||||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
|
||||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*******************************************************************************
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef MBED_CMSIS_NVIC_H
|
#ifndef MBED_CMSIS_NVIC_H
|
||||||
#define MBED_CMSIS_NVIC_H
|
#define MBED_CMSIS_NVIC_H
|
||||||
|
|
||||||
// STM32F411RE
|
#if !defined(MBED_ROM_START)
|
||||||
// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F
|
#define MBED_ROM_START 0x8000000
|
||||||
// MCU Peripherals: 86 vectors = 344 bytes from 0x40 to 0x197
|
#endif
|
||||||
// Total: 102 vectors = 408 bytes (0x198) to be reserved in RAM
|
|
||||||
|
#if !defined(MBED_ROM_SIZE)
|
||||||
|
#define MBED_ROM_SIZE 0x80000 // 512 KB
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(MBED_RAM_START)
|
||||||
|
#define MBED_RAM_START 0x20000000
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(MBED_RAM_SIZE)
|
||||||
|
#define MBED_RAM_SIZE 0x20000 // 128 KB
|
||||||
|
#endif
|
||||||
|
|
||||||
#define NVIC_NUM_VECTORS 102
|
#define NVIC_NUM_VECTORS 102
|
||||||
#define NVIC_RAM_VECTOR_ADDRESS 0x20000000 // Vectors positioned at start of RAM
|
#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
|
||||||
|
|
@ -1,62 +1,53 @@
|
||||||
#! armcc -E
|
#! armcc -E
|
||||||
; Scatter-Loading Description File
|
; Scatter-Loading Description File
|
||||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|
||||||
; Copyright (c) 2017, STMicroelectronics
|
|
||||||
; All rights reserved.
|
|
||||||
;
|
;
|
||||||
; Redistribution and use in source and binary forms, with or without
|
; SPDX-License-Identifier: BSD-3-Clause
|
||||||
; modification, are permitted provided that the following conditions are met:
|
;******************************************************************************
|
||||||
;
|
;* @attention
|
||||||
; 1. Redistributions of source code must retain the above copyright notice,
|
;*
|
||||||
; this list of conditions and the following disclaimer.
|
;* Copyright (c) 2016-2020 STMicroelectronics.
|
||||||
; 2. Redistributions in binary form must reproduce the above copyright notice,
|
;* All rights reserved.
|
||||||
; this list of conditions and the following disclaimer in the documentation
|
;*
|
||||||
; and/or other materials provided with the distribution.
|
;* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
; 3. Neither the name of STMicroelectronics nor the names of its contributors
|
;* the "License"; You may not use this file except in compliance with the
|
||||||
; may be used to endorse or promote products derived from this software
|
;* License. You may obtain a copy of the License at:
|
||||||
; without specific prior written permission.
|
;* opensource.org/licenses/BSD-3-Clause
|
||||||
;
|
;*
|
||||||
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
;******************************************************************************
|
||||||
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
#include "../cmsis_nvic.h"
|
||||||
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
|
||||||
; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
||||||
; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
|
||||||
; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
||||||
; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
|
||||||
; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|
||||||
|
|
||||||
#if !defined(MBED_APP_START)
|
#if !defined(MBED_APP_START)
|
||||||
#define MBED_APP_START 0x08000000
|
#define MBED_APP_START MBED_ROM_START
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if !defined(MBED_APP_SIZE)
|
#if !defined(MBED_APP_SIZE)
|
||||||
#define MBED_APP_SIZE 0x100000
|
#define MBED_APP_SIZE MBED_ROM_SIZE
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||||
#define MBED_BOOT_STACK_SIZE 0x400
|
/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
|
||||||
|
#define MBED_BOOT_STACK_SIZE 0x400
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#define Stack_Size MBED_BOOT_STACK_SIZE
|
/* Round up VECTORS_SIZE to 8 bytes */
|
||||||
|
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
|
||||||
|
|
||||||
; STM32F412ZG: 1024 KB FLASH (0x100000) + 256 KB SRAM (0x40000)
|
LR_IROM1 MBED_APP_START MBED_APP_SIZE {
|
||||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
|
||||||
|
|
||||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
ER_IROM1 MBED_APP_START MBED_APP_SIZE {
|
||||||
*.o (RESET, +First)
|
*.o (RESET, +First)
|
||||||
*(InRoot$$Sections)
|
*(InRoot$$Sections)
|
||||||
.ANY (+RO)
|
.ANY (+RO)
|
||||||
}
|
}
|
||||||
|
|
||||||
; Total: 113 vectors = 452 bytes (0x1C4) 8-byte aligned = 0x1C8 (0x1C4 + 0x4) to be reserved in RAM
|
RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data
|
||||||
RW_IRAM1 (0x20000000+0x1C8) (0x40000-0x1C8-Stack_Size) { ; RW data
|
.ANY (+RW +ZI)
|
||||||
.ANY (+RW +ZI)
|
|
||||||
}
|
}
|
||||||
|
|
||||||
ARM_LIB_STACK (0x20000000+0x40000) EMPTY -Stack_Size { ; stack
|
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
|
||||||
|
}
|
||||||
|
|
||||||
|
ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -1,30 +1,51 @@
|
||||||
|
/* Linker script to configure memory regions. */
|
||||||
|
/*
|
||||||
|
* SPDX-License-Identifier: BSD-3-Clause
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2016-2020 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
|
* the "License"; You may not use this file except in compliance with the
|
||||||
|
* License. You may obtain a copy of the License at:
|
||||||
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "../cmsis_nvic.h"
|
||||||
|
|
||||||
|
|
||||||
#if !defined(MBED_APP_START)
|
#if !defined(MBED_APP_START)
|
||||||
#define MBED_APP_START 0x08000000
|
#define MBED_APP_START MBED_ROM_START
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if !defined(MBED_APP_SIZE)
|
#if !defined(MBED_APP_SIZE)
|
||||||
#define MBED_APP_SIZE 1024K
|
#define MBED_APP_SIZE MBED_ROM_SIZE
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||||
#define MBED_BOOT_STACK_SIZE 0x400
|
/* This value is normally defined by the tools
|
||||||
|
to 0x1000 for bare metal and 0x400 for RTOS */
|
||||||
|
#define MBED_BOOT_STACK_SIZE 0x400
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
STACK_SIZE = MBED_BOOT_STACK_SIZE;
|
/* Round up VECTORS_SIZE to 8 bytes */
|
||||||
|
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
|
||||||
|
|
||||||
/* Linker script to configure memory regions. */
|
|
||||||
/* 0x1C4 reserved for vectors; 8-byte aligned = 0x1C8 (0x1C4 + 0x4) */
|
|
||||||
MEMORY
|
MEMORY
|
||||||
{
|
{
|
||||||
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
|
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
|
||||||
RAM (rwx) : ORIGIN = 0x200001C8, LENGTH = 256K - (0x1C4+0x4)
|
RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE - VECTORS_SIZE
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Linker script to place sections and symbol values. Should be used together
|
/* Linker script to place sections and symbol values. Should be used together
|
||||||
* with other linker script that defines memory regions FLASH and RAM.
|
* with other linker script that defines memory regions FLASH and RAM.
|
||||||
* It references following symbols, which must be defined in code:
|
* It references following symbols, which must be defined in code:
|
||||||
* Reset_Handler : Entry of reset handler
|
* Reset_Handler : Entry of reset handler
|
||||||
*
|
*
|
||||||
* It defines following symbols, which code can use without definition:
|
* It defines following symbols, which code can use without definition:
|
||||||
* __exidx_start
|
* __exidx_start
|
||||||
* __exidx_end
|
* __exidx_end
|
||||||
|
|
@ -55,6 +76,7 @@ SECTIONS
|
||||||
{
|
{
|
||||||
KEEP(*(.isr_vector))
|
KEEP(*(.isr_vector))
|
||||||
*(.text*)
|
*(.text*)
|
||||||
|
|
||||||
KEEP(*(.init))
|
KEEP(*(.init))
|
||||||
KEEP(*(.fini))
|
KEEP(*(.fini))
|
||||||
|
|
||||||
|
|
@ -91,7 +113,7 @@ SECTIONS
|
||||||
|
|
||||||
__etext = .;
|
__etext = .;
|
||||||
_sidata = .;
|
_sidata = .;
|
||||||
|
|
||||||
.data : AT (__etext)
|
.data : AT (__etext)
|
||||||
{
|
{
|
||||||
__data_start__ = .;
|
__data_start__ = .;
|
||||||
|
|
@ -112,7 +134,6 @@ SECTIONS
|
||||||
KEEP(*(.init_array))
|
KEEP(*(.init_array))
|
||||||
PROVIDE_HIDDEN (__init_array_end = .);
|
PROVIDE_HIDDEN (__init_array_end = .);
|
||||||
|
|
||||||
|
|
||||||
. = ALIGN(8);
|
. = ALIGN(8);
|
||||||
/* finit data */
|
/* finit data */
|
||||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||||
|
|
@ -128,6 +149,19 @@ SECTIONS
|
||||||
|
|
||||||
} > RAM
|
} > RAM
|
||||||
|
|
||||||
|
/* Uninitialized data section
|
||||||
|
* This region is not initialized by the C/C++ library and can be used to
|
||||||
|
* store state across soft reboots. */
|
||||||
|
.uninitialized (NOLOAD):
|
||||||
|
{
|
||||||
|
. = ALIGN(32);
|
||||||
|
__uninitialized_start = .;
|
||||||
|
*(.uninitialized)
|
||||||
|
KEEP(*(.keep.uninitialized))
|
||||||
|
. = ALIGN(32);
|
||||||
|
__uninitialized_end = .;
|
||||||
|
} > RAM
|
||||||
|
|
||||||
.bss :
|
.bss :
|
||||||
{
|
{
|
||||||
. = ALIGN(8);
|
. = ALIGN(8);
|
||||||
|
|
@ -143,9 +177,9 @@ SECTIONS
|
||||||
.heap (COPY):
|
.heap (COPY):
|
||||||
{
|
{
|
||||||
__end__ = .;
|
__end__ = .;
|
||||||
end = __end__;
|
PROVIDE(end = .);
|
||||||
*(.heap*)
|
*(.heap*)
|
||||||
. = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE;
|
. = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE;
|
||||||
__HeapLimit = .;
|
__HeapLimit = .;
|
||||||
} > RAM
|
} > RAM
|
||||||
|
|
||||||
|
|
@ -161,7 +195,7 @@ SECTIONS
|
||||||
* size of stack_dummy section */
|
* size of stack_dummy section */
|
||||||
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
|
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
|
||||||
_estack = __StackTop;
|
_estack = __StackTop;
|
||||||
__StackLimit = __StackTop - STACK_SIZE;
|
__StackLimit = __StackTop - MBED_BOOT_STACK_SIZE;
|
||||||
PROVIDE(__stack = __StackTop);
|
PROVIDE(__stack = __StackTop);
|
||||||
|
|
||||||
/* Check if data + heap + stack exceeds RAM limit */
|
/* Check if data + heap + stack exceeds RAM limit */
|
||||||
|
|
|
||||||
|
|
@ -1,36 +1,59 @@
|
||||||
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
|
/* Linker script to configure memory regions.
|
||||||
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x100000; }
|
*
|
||||||
|
* SPDX-License-Identifier: BSD-3-Clause
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2016-2020 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
|
* the "License"; You may not use this file except in compliance with the
|
||||||
|
* License. You may obtain a copy of the License at:
|
||||||
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* Device specific values */
|
||||||
|
|
||||||
/* [ROM = 1024kb = 0x100000] */
|
/* Tools provide -DMBED_ROM_START=xxx -DMBED_ROM_SIZE=xxx -DMBED_RAM_START=xxx -DMBED_RAM_SIZE=xxx */
|
||||||
define symbol __intvec_start__ = MBED_APP_START;
|
|
||||||
define symbol __region_ROM_start__ = MBED_APP_START;
|
|
||||||
define symbol __region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE;
|
|
||||||
|
|
||||||
/* [RAM = 256kb = 0x40000] Vector table dynamic copy: 113 vectors = 452 bytes (0x1C4) to be reserved in RAM */
|
define symbol VECTORS = 113; /* This value must match NVIC_NUM_VECTORS in cmsis_nvic.h */
|
||||||
define symbol __NVIC_start__ = 0x20000000;
|
define symbol HEAP_SIZE = 0x10000;
|
||||||
define symbol __NVIC_end__ = 0x200001C7; /* Aligned on 8 bytes */
|
|
||||||
define symbol __region_RAM_start__ = 0x200001C8;
|
|
||||||
define symbol __region_RAM_end__ = 0x2003FFFF;
|
|
||||||
|
|
||||||
/* Memory regions */
|
/* Common - Do not change */
|
||||||
define memory mem with size = 4G;
|
|
||||||
define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
|
if (!isdefinedsymbol(MBED_APP_START)) {
|
||||||
define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__];
|
define symbol MBED_APP_START = MBED_ROM_START;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (!isdefinedsymbol(MBED_APP_SIZE)) {
|
||||||
|
define symbol MBED_APP_SIZE = MBED_ROM_SIZE;
|
||||||
|
}
|
||||||
|
|
||||||
/* Stack and Heap */
|
|
||||||
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
|
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
|
||||||
|
/* This value is normally defined by the tools
|
||||||
|
to 0x1000 for bare metal and 0x400 for RTOS */
|
||||||
define symbol MBED_BOOT_STACK_SIZE = 0x400;
|
define symbol MBED_BOOT_STACK_SIZE = 0x400;
|
||||||
}
|
}
|
||||||
define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
|
|
||||||
define symbol __size_heap__ = 0x15000;
|
|
||||||
define block CSTACK with alignment = 8, size = __size_cstack__ { };
|
|
||||||
define block HEAP with alignment = 8, size = __size_heap__ { };
|
|
||||||
define block STACKHEAP with fixed order { block HEAP, block CSTACK };
|
|
||||||
|
|
||||||
initialize by copy with packing = zeros { readwrite };
|
/* Round up VECTORS_SIZE to 8 bytes */
|
||||||
|
define symbol VECTORS_SIZE = ((VECTORS * 4) + 7) & ~7;
|
||||||
|
define symbol RAM_REGION_START = MBED_RAM_START + VECTORS_SIZE;
|
||||||
|
define symbol RAM_REGION_SIZE = MBED_RAM_SIZE - VECTORS_SIZE;
|
||||||
|
|
||||||
|
define memory mem with size = 4G;
|
||||||
|
define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE];
|
||||||
|
define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE];
|
||||||
|
|
||||||
|
define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { };
|
||||||
|
define block HEAP with alignment = 8, size = HEAP_SIZE { };
|
||||||
|
|
||||||
|
initialize by copy { readwrite };
|
||||||
do not initialize { section .noinit };
|
do not initialize { section .noinit };
|
||||||
|
|
||||||
place at address mem:__intvec_start__ { readonly section .intvec };
|
place at address mem: MBED_APP_START { readonly section .intvec };
|
||||||
|
|
||||||
place in ROM_region { readonly };
|
place in ROM_region { readonly };
|
||||||
place in RAM_region { readwrite, block STACKHEAP };
|
place in RAM_region { readwrite,
|
||||||
|
block CSTACK, block HEAP };
|
||||||
|
|
|
||||||
|
|
@ -1,43 +1,39 @@
|
||||||
/* mbed Microcontroller Library
|
/* mbed Microcontroller Library
|
||||||
* CMSIS-style functionality to support dynamic vectors
|
* SPDX-License-Identifier: BSD-3-Clause
|
||||||
*******************************************************************************
|
******************************************************************************
|
||||||
* Copyright (c) 2014, STMicroelectronics
|
* @attention
|
||||||
* All rights reserved.
|
|
||||||
*
|
*
|
||||||
* Redistribution and use in source and binary forms, with or without
|
* <h2><center>© Copyright (c) 2016-2020 STMicroelectronics.
|
||||||
* modification, are permitted provided that the following conditions are met:
|
* All rights reserved.</center></h2>
|
||||||
*
|
*
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
* this list of conditions and the following disclaimer.
|
* the "License"; You may not use this file except in compliance with the
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
* License. You may obtain a copy of the License at:
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
******************************************************************************
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
*/
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
|
||||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
|
||||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
||||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
|
||||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
||||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
|
||||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*******************************************************************************
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef MBED_CMSIS_NVIC_H
|
#ifndef MBED_CMSIS_NVIC_H
|
||||||
#define MBED_CMSIS_NVIC_H
|
#define MBED_CMSIS_NVIC_H
|
||||||
|
|
||||||
// STM32F412ZG
|
#if !defined(MBED_ROM_START)
|
||||||
// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F
|
#define MBED_ROM_START 0x8000000
|
||||||
// MCU Peripherals: 97 vectors = 388 bytes from 0x40 to 0x1C3
|
#endif
|
||||||
// Total: 113 vectors = 452 bytes (0x1C4) to be reserved in RAM
|
|
||||||
#define NVIC_NUM_VECTORS 113
|
|
||||||
#define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Vectors positioned at start of RAM
|
|
||||||
|
|
||||||
|
#if !defined(MBED_ROM_SIZE)
|
||||||
|
#define MBED_ROM_SIZE 0x100000 // 1.0 MB
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(MBED_RAM_START)
|
||||||
|
#define MBED_RAM_START 0x20000000
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(MBED_RAM_SIZE)
|
||||||
|
#define MBED_RAM_SIZE 0x40000 // 256 KB
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#define NVIC_NUM_VECTORS 113
|
||||||
|
#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
|
||||||
|
|
@ -102,6 +102,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
|
||||||
regarding system frequency refer to product datasheet. */
|
regarding system frequency refer to product datasheet. */
|
||||||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
|
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
|
||||||
|
|
||||||
|
|
||||||
/* Get the Clocks configuration according to the internal RCC registers */
|
/* Get the Clocks configuration according to the internal RCC registers */
|
||||||
HAL_RCC_GetOscConfig(&RCC_OscInitStruct);
|
HAL_RCC_GetOscConfig(&RCC_OscInitStruct);
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -114,25 +114,32 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
|
||||||
regarding system frequency refer to product datasheet. */
|
regarding system frequency refer to product datasheet. */
|
||||||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
|
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
|
||||||
|
|
||||||
/* Enable HSE oscillator and activate PLL with HSE as source */
|
/* Get the Clocks configuration according to the internal RCC registers */
|
||||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
HAL_RCC_GetOscConfig(&RCC_OscInitStruct);
|
||||||
if (bypass == 0) {
|
|
||||||
RCC_OscInitStruct.HSEState = RCC_HSE_ON; /* External 8 MHz xtal on OSC_IN/OSC_OUT */
|
|
||||||
} else {
|
|
||||||
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; /* External 8 MHz clock on OSC_IN */
|
|
||||||
}
|
|
||||||
|
|
||||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
/* PLL could be already configured by bootlader */
|
||||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
if (RCC_OscInitStruct.PLL.PLLState != RCC_PLL_ON) {
|
||||||
|
|
||||||
RCC_OscInitStruct.PLL.PLLM = 8; // VCO input clock = 1 MHz (8 MHz / 8)
|
/* Enable HSE oscillator and activate PLL with HSE as source */
|
||||||
RCC_OscInitStruct.PLL.PLLN = 200; // VCO output clock = 200 MHz (1 MHz * 200)
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
||||||
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // PLLCLK = 100 MHz (200 MHz / 2)
|
if (bypass == 0) {
|
||||||
RCC_OscInitStruct.PLL.PLLQ = 7;
|
RCC_OscInitStruct.HSEState = RCC_HSE_ON; /* External 8 MHz xtal on OSC_IN/OSC_OUT */
|
||||||
RCC_OscInitStruct.PLL.PLLR = 2;
|
} else {
|
||||||
|
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; /* External 8 MHz clock on OSC_IN */
|
||||||
|
}
|
||||||
|
|
||||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||||
return 0; // FAIL
|
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||||
|
|
||||||
|
RCC_OscInitStruct.PLL.PLLM = 8; // VCO input clock = 1 MHz (8 MHz / 8)
|
||||||
|
RCC_OscInitStruct.PLL.PLLN = 200; // VCO output clock = 200 MHz (1 MHz * 200)
|
||||||
|
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // PLLCLK = 100 MHz (200 MHz / 2)
|
||||||
|
RCC_OscInitStruct.PLL.PLLQ = 7;
|
||||||
|
RCC_OscInitStruct.PLL.PLLR = 2;
|
||||||
|
|
||||||
|
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
|
||||||
|
return 0; // FAIL
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#if DEVICE_USBDEVICE
|
#if DEVICE_USBDEVICE
|
||||||
|
|
|
||||||
|
|
@ -101,25 +101,32 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
|
||||||
regarding system frequency refer to product datasheet. */
|
regarding system frequency refer to product datasheet. */
|
||||||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
|
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
|
||||||
|
|
||||||
/* Enable HSE oscillator and activate PLL with HSE as source */
|
/* Get the Clocks configuration according to the internal RCC registers */
|
||||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
HAL_RCC_GetOscConfig(&RCC_OscInitStruct);
|
||||||
if (bypass == 0) {
|
|
||||||
RCC_OscInitStruct.HSEState = RCC_HSE_ON; /* External 8 MHz xtal on OSC_IN/OSC_OUT */
|
|
||||||
} else {
|
|
||||||
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; /* External 8 MHz clock on OSC_IN */
|
|
||||||
}
|
|
||||||
|
|
||||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
/* PLL could be already configured by bootlader */
|
||||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
if (RCC_OscInitStruct.PLL.PLLState != RCC_PLL_ON) {
|
||||||
|
|
||||||
RCC_OscInitStruct.PLL.PLLM = 8; // VCO input clock = 1 MHz (8 MHz / 8)
|
/* Enable HSE oscillator and activate PLL with HSE as source */
|
||||||
RCC_OscInitStruct.PLL.PLLN = 200; // VCO output clock = 200 MHz (1 MHz * 200)
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
||||||
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // PLLCLK = 100 MHz (200 MHz / 2)
|
if (bypass == 0) {
|
||||||
RCC_OscInitStruct.PLL.PLLQ = 7;
|
RCC_OscInitStruct.HSEState = RCC_HSE_ON; /* External 8 MHz xtal on OSC_IN/OSC_OUT */
|
||||||
RCC_OscInitStruct.PLL.PLLR = 2;
|
} else {
|
||||||
|
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; /* External 8 MHz clock on OSC_IN */
|
||||||
|
}
|
||||||
|
|
||||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||||
return 0; // FAIL
|
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||||
|
|
||||||
|
RCC_OscInitStruct.PLL.PLLM = 8; // VCO input clock = 1 MHz (8 MHz / 8)
|
||||||
|
RCC_OscInitStruct.PLL.PLLN = 200; // VCO output clock = 200 MHz (1 MHz * 200)
|
||||||
|
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // PLLCLK = 100 MHz (200 MHz / 2)
|
||||||
|
RCC_OscInitStruct.PLL.PLLQ = 7;
|
||||||
|
RCC_OscInitStruct.PLL.PLLR = 2;
|
||||||
|
|
||||||
|
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
|
||||||
|
return 0; // FAIL
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#if DEVICE_USBDEVICE
|
#if DEVICE_USBDEVICE
|
||||||
|
|
|
||||||
|
|
@ -1,75 +1,62 @@
|
||||||
#! armcc -E
|
#! armcc -E
|
||||||
; Scatter-Loading Description File
|
; Scatter-Loading Description File
|
||||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|
||||||
; Copyright (c) 2017, STMicroelectronics
|
|
||||||
; All rights reserved.
|
|
||||||
;
|
;
|
||||||
; Redistribution and use in source and binary forms, with or without
|
; SPDX-License-Identifier: BSD-3-Clause
|
||||||
; modification, are permitted provided that the following conditions are met:
|
;******************************************************************************
|
||||||
;
|
;* @attention
|
||||||
; 1. Redistributions of source code must retain the above copyright notice,
|
;*
|
||||||
; this list of conditions and the following disclaimer.
|
;* Copyright (c) 2016-2020 STMicroelectronics.
|
||||||
; 2. Redistributions in binary form must reproduce the above copyright notice,
|
;* All rights reserved.
|
||||||
; this list of conditions and the following disclaimer in the documentation
|
;*
|
||||||
; and/or other materials provided with the distribution.
|
;* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
; 3. Neither the name of STMicroelectronics nor the names of its contributors
|
;* the "License"; You may not use this file except in compliance with the
|
||||||
; may be used to endorse or promote products derived from this software
|
;* License. You may obtain a copy of the License at:
|
||||||
; without specific prior written permission.
|
;* opensource.org/licenses/BSD-3-Clause
|
||||||
;
|
;*
|
||||||
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
;******************************************************************************
|
||||||
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
#include "../cmsis_nvic.h"
|
||||||
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
|
||||||
; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
||||||
; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
|
||||||
; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
||||||
; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
|
||||||
; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|
||||||
|
|
||||||
#if !defined(MBED_APP_START)
|
#if !defined(MBED_APP_START)
|
||||||
#define MBED_APP_START 0x08000000
|
#define MBED_APP_START MBED_ROM_START
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
; 1536KB FLASH (0x180000)
|
|
||||||
#if !defined(MBED_APP_SIZE)
|
#if !defined(MBED_APP_SIZE)
|
||||||
#define MBED_APP_SIZE 0x180000
|
#define MBED_APP_SIZE MBED_ROM_SIZE
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||||
#define MBED_BOOT_STACK_SIZE 0x400
|
/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
|
||||||
|
#define MBED_BOOT_STACK_SIZE 0x400
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#define Stack_Size MBED_BOOT_STACK_SIZE
|
/* Round up VECTORS_SIZE to 8 bytes */
|
||||||
|
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
|
||||||
|
|
||||||
#define MBED_RAM_START 0x20000000
|
#define MBED_CRASH_REPORT_RAM_START (MBED_RAM_START + VECTORS_SIZE)
|
||||||
; 320KB SRAM (0x50000)
|
|
||||||
#define MBED_RAM_SIZE 0x50000
|
|
||||||
#define MBED_VECTTABLE_RAM_START (MBED_RAM_START)
|
|
||||||
; Total: 118 vectors = 472 bytes (0x1D8) to be reserved in RAM
|
|
||||||
#define MBED_VECTTABLE_RAM_SIZE 0x1D8
|
|
||||||
#define MBED_CRASH_REPORT_RAM_START (MBED_VECTTABLE_RAM_START + MBED_VECTTABLE_RAM_SIZE)
|
|
||||||
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
|
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
|
||||||
#define MBED_RAM0_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
|
#define MBED_RAM0_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
|
||||||
#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_VECTTABLE_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
|
#define MBED_RAM0_SIZE (MBED_RAM_SIZE - VECTORS_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
|
||||||
|
|
||||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
LR_IROM1 MBED_APP_START MBED_APP_SIZE {
|
||||||
|
|
||||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
ER_IROM1 MBED_APP_START MBED_APP_SIZE {
|
||||||
*.o (RESET, +First)
|
*.o (RESET, +First)
|
||||||
*(InRoot$$Sections)
|
*(InRoot$$Sections)
|
||||||
.ANY (+RO)
|
.ANY (+RO)
|
||||||
}
|
}
|
||||||
|
|
||||||
RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
|
RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
|
||||||
}
|
}
|
||||||
|
|
||||||
RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE-Stack_Size) { ; RW data
|
RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE - MBED_BOOT_STACK_SIZE) { ; RW data
|
||||||
.ANY (+RW +ZI)
|
.ANY (+RW +ZI)
|
||||||
}
|
}
|
||||||
|
|
||||||
ARM_LIB_STACK (MBED_RAM0_START+MBED_RAM0_SIZE) EMPTY -Stack_Size { ; stack
|
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
|
||||||
|
}
|
||||||
|
|
||||||
|
ARM_LIB_STACK (MBED_RAM0_START + MBED_RAM0_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -1,31 +1,53 @@
|
||||||
|
/* Linker script to configure memory regions. */
|
||||||
|
/*
|
||||||
|
* SPDX-License-Identifier: BSD-3-Clause
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2016-2020 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
|
* the "License"; You may not use this file except in compliance with the
|
||||||
|
* License. You may obtain a copy of the License at:
|
||||||
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "../cmsis_nvic.h"
|
||||||
|
|
||||||
|
|
||||||
#if !defined(MBED_APP_START)
|
#if !defined(MBED_APP_START)
|
||||||
#define MBED_APP_START 0x08000000
|
#define MBED_APP_START MBED_ROM_START
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if !defined(MBED_APP_SIZE)
|
#if !defined(MBED_APP_SIZE)
|
||||||
#define MBED_APP_SIZE 1536K
|
#define MBED_APP_SIZE MBED_ROM_SIZE
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||||
#define MBED_BOOT_STACK_SIZE 0x400
|
/* This value is normally defined by the tools
|
||||||
|
to 0x1000 for bare metal and 0x400 for RTOS */
|
||||||
|
#define MBED_BOOT_STACK_SIZE 0x400
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
STACK_SIZE = MBED_BOOT_STACK_SIZE;
|
/* Round up VECTORS_SIZE to 8 bytes */
|
||||||
|
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
|
||||||
|
|
||||||
M_CRASH_DATA_RAM_SIZE = 0x100;
|
M_CRASH_DATA_RAM_SIZE = 0x100;
|
||||||
|
|
||||||
/* Linker script to configure memory regions. */
|
|
||||||
MEMORY
|
MEMORY
|
||||||
{
|
{
|
||||||
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
|
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
|
||||||
RAM (rwx) : ORIGIN = 0x200001D8, LENGTH = 320K - 0x1D8
|
RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE - VECTORS_SIZE
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Linker script to place sections and symbol values. Should be used together
|
/* Linker script to place sections and symbol values. Should be used together
|
||||||
* with other linker script that defines memory regions FLASH and RAM.
|
* with other linker script that defines memory regions FLASH and RAM.
|
||||||
* It references following symbols, which must be defined in code:
|
* It references following symbols, which must be defined in code:
|
||||||
* Reset_Handler : Entry of reset handler
|
* Reset_Handler : Entry of reset handler
|
||||||
*
|
*
|
||||||
* It defines following symbols, which code can use without definition:
|
* It defines following symbols, which code can use without definition:
|
||||||
* __exidx_start
|
* __exidx_start
|
||||||
* __exidx_end
|
* __exidx_end
|
||||||
|
|
@ -56,6 +78,7 @@ SECTIONS
|
||||||
{
|
{
|
||||||
KEEP(*(.isr_vector))
|
KEEP(*(.isr_vector))
|
||||||
*(.text*)
|
*(.text*)
|
||||||
|
|
||||||
KEEP(*(.init))
|
KEEP(*(.init))
|
||||||
KEEP(*(.fini))
|
KEEP(*(.fini))
|
||||||
|
|
||||||
|
|
@ -125,7 +148,6 @@ SECTIONS
|
||||||
KEEP(*(.init_array))
|
KEEP(*(.init_array))
|
||||||
PROVIDE_HIDDEN (__init_array_end = .);
|
PROVIDE_HIDDEN (__init_array_end = .);
|
||||||
|
|
||||||
|
|
||||||
. = ALIGN(8);
|
. = ALIGN(8);
|
||||||
/* finit data */
|
/* finit data */
|
||||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||||
|
|
@ -141,6 +163,19 @@ SECTIONS
|
||||||
|
|
||||||
} > RAM
|
} > RAM
|
||||||
|
|
||||||
|
/* Uninitialized data section
|
||||||
|
* This region is not initialized by the C/C++ library and can be used to
|
||||||
|
* store state across soft reboots. */
|
||||||
|
.uninitialized (NOLOAD):
|
||||||
|
{
|
||||||
|
. = ALIGN(32);
|
||||||
|
__uninitialized_start = .;
|
||||||
|
*(.uninitialized)
|
||||||
|
KEEP(*(.keep.uninitialized))
|
||||||
|
. = ALIGN(32);
|
||||||
|
__uninitialized_end = .;
|
||||||
|
} > RAM
|
||||||
|
|
||||||
.bss :
|
.bss :
|
||||||
{
|
{
|
||||||
. = ALIGN(8);
|
. = ALIGN(8);
|
||||||
|
|
@ -156,9 +191,9 @@ SECTIONS
|
||||||
.heap (COPY):
|
.heap (COPY):
|
||||||
{
|
{
|
||||||
__end__ = .;
|
__end__ = .;
|
||||||
end = __end__;
|
PROVIDE(end = .);
|
||||||
*(.heap*)
|
*(.heap*)
|
||||||
. = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE;
|
. = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE;
|
||||||
__HeapLimit = .;
|
__HeapLimit = .;
|
||||||
} > RAM
|
} > RAM
|
||||||
|
|
||||||
|
|
@ -174,7 +209,7 @@ SECTIONS
|
||||||
* size of stack_dummy section */
|
* size of stack_dummy section */
|
||||||
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
|
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
|
||||||
_estack = __StackTop;
|
_estack = __StackTop;
|
||||||
__StackLimit = __StackTop - STACK_SIZE;
|
__StackLimit = __StackTop - MBED_BOOT_STACK_SIZE;
|
||||||
PROVIDE(__stack = __StackTop);
|
PROVIDE(__stack = __StackTop);
|
||||||
|
|
||||||
/* Check if data + heap + stack exceeds RAM limit */
|
/* Check if data + heap + stack exceeds RAM limit */
|
||||||
|
|
|
||||||
|
|
@ -1,3 +1,23 @@
|
||||||
|
/* Linker script to configure memory regions.
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: BSD-3-Clause
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2016-2020 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
|
* the "License"; You may not use this file except in compliance with the
|
||||||
|
* License. You may obtain a copy of the License at:
|
||||||
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* Device specific values */
|
||||||
|
|
||||||
|
/* Tools provide -DMBED_ROM_START=xxx -DMBED_ROM_SIZE=xxx -DMBED_RAM_START=xxx -DMBED_RAM_SIZE=xxx */
|
||||||
|
|
||||||
/* [ROM = 1536kb = 0x180000] */
|
/* [ROM = 1536kb = 0x180000] */
|
||||||
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
|
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
|
||||||
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x180000; }
|
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x180000; }
|
||||||
|
|
|
||||||
|
|
@ -1,43 +1,39 @@
|
||||||
/* mbed Microcontroller Library
|
/* mbed Microcontroller Library
|
||||||
* CMSIS-style functionality to support dynamic vectors
|
* SPDX-License-Identifier: BSD-3-Clause
|
||||||
*******************************************************************************
|
******************************************************************************
|
||||||
* Copyright (c) 2017, STMicroelectronics
|
* @attention
|
||||||
* All rights reserved.
|
|
||||||
*
|
*
|
||||||
* Redistribution and use in source and binary forms, with or without
|
* <h2><center>© Copyright (c) 2016-2020 STMicroelectronics.
|
||||||
* modification, are permitted provided that the following conditions are met:
|
* All rights reserved.</center></h2>
|
||||||
*
|
*
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
* this list of conditions and the following disclaimer.
|
* the "License"; You may not use this file except in compliance with the
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
* License. You may obtain a copy of the License at:
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
******************************************************************************
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
*/
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
|
||||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
|
||||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
||||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
|
||||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
||||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
|
||||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*******************************************************************************
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef MBED_CMSIS_NVIC_H
|
#ifndef MBED_CMSIS_NVIC_H
|
||||||
#define MBED_CMSIS_NVIC_H
|
#define MBED_CMSIS_NVIC_H
|
||||||
|
|
||||||
// STM32F412ZG
|
#if !defined(MBED_ROM_START)
|
||||||
// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F
|
#define MBED_ROM_START 0x8000000
|
||||||
// MCU Peripherals: 102 vectors = 408 bytes from 0x40 to 0x1D7
|
#endif
|
||||||
// Total: 118 vectors = 472 bytes (0x1D8) to be reserved in RAM
|
|
||||||
#define NVIC_NUM_VECTORS 118
|
|
||||||
#define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Vectors positioned at start of RAM
|
|
||||||
|
|
||||||
|
#if !defined(MBED_ROM_SIZE)
|
||||||
|
#define MBED_ROM_SIZE 0x180000 // 1.5 MB
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(MBED_RAM_START)
|
||||||
|
#define MBED_RAM_START 0x20000000
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(MBED_RAM_SIZE)
|
||||||
|
#define MBED_RAM_SIZE 0x50000 // 320 KB
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#define NVIC_NUM_VECTORS 118
|
||||||
|
#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
|
||||||
|
|
@ -95,26 +95,33 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
|
||||||
__HAL_RCC_PWR_CLK_ENABLE();
|
__HAL_RCC_PWR_CLK_ENABLE();
|
||||||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
|
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
|
||||||
|
|
||||||
// Enable HSE oscillator and activate PLL with HSE as source
|
/* Get the Clocks configuration according to the internal RCC registers */
|
||||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
HAL_RCC_GetOscConfig(&RCC_OscInitStruct);
|
||||||
if (bypass == 0) {
|
|
||||||
RCC_OscInitStruct.HSEState = RCC_HSE_ON; // External 8 MHz xtal on OSC_IN/OSC_OUT
|
|
||||||
} else {
|
|
||||||
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; // External 8 MHz clock on OSC_IN
|
|
||||||
}
|
|
||||||
|
|
||||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
/* PLL could be already configured by bootlader */
|
||||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
if (RCC_OscInitStruct.PLL.PLLState != RCC_PLL_ON) {
|
||||||
RCC_OscInitStruct.PLL.PLLM = 8;
|
|
||||||
|
// Enable HSE oscillator and activate PLL with HSE as source
|
||||||
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
||||||
|
if (bypass == 0) {
|
||||||
|
RCC_OscInitStruct.HSEState = RCC_HSE_ON; // External 8 MHz xtal on OSC_IN/OSC_OUT
|
||||||
|
} else {
|
||||||
|
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; // External 8 MHz clock on OSC_IN
|
||||||
|
}
|
||||||
|
|
||||||
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||||
|
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||||
|
RCC_OscInitStruct.PLL.PLLM = 8;
|
||||||
#if (DEVICE_USBDEVICE)
|
#if (DEVICE_USBDEVICE)
|
||||||
RCC_OscInitStruct.PLL.PLLN = 336;
|
RCC_OscInitStruct.PLL.PLLN = 336;
|
||||||
#else
|
#else
|
||||||
RCC_OscInitStruct.PLL.PLLN = 360;
|
RCC_OscInitStruct.PLL.PLLN = 360;
|
||||||
#endif
|
#endif
|
||||||
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if DEVICE_USBDEVICE defined
|
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if DEVICE_USBDEVICE defined
|
||||||
RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if DEVICE_USBDEVICE defined
|
RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if DEVICE_USBDEVICE defined
|
||||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
|
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
|
||||||
return 0; // FAIL
|
return 0; // FAIL
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
// Activate the OverDrive to reach the 180 MHz Frequency
|
// Activate the OverDrive to reach the 180 MHz Frequency
|
||||||
|
|
|
||||||
|
|
@ -1,82 +1,65 @@
|
||||||
#! armcc -E
|
#! armcc -E
|
||||||
; Scatter-Loading Description File
|
; Scatter-Loading Description File
|
||||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|
||||||
; Copyright (c) 2015, STMicroelectronics
|
|
||||||
; All rights reserved.
|
|
||||||
;
|
;
|
||||||
; Redistribution and use in source and binary forms, with or without
|
; SPDX-License-Identifier: BSD-3-Clause
|
||||||
; modification, are permitted provided that the following conditions are met:
|
;******************************************************************************
|
||||||
;
|
;* @attention
|
||||||
; 1. Redistributions of source code must retain the above copyright notice,
|
;*
|
||||||
; this list of conditions and the following disclaimer.
|
;* Copyright (c) 2016-2020 STMicroelectronics.
|
||||||
; 2. Redistributions in binary form must reproduce the above copyright notice,
|
;* All rights reserved.
|
||||||
; this list of conditions and the following disclaimer in the documentation
|
;*
|
||||||
; and/or other materials provided with the distribution.
|
;* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
; 3. Neither the name of STMicroelectronics nor the names of its contributors
|
;* the "License"; You may not use this file except in compliance with the
|
||||||
; may be used to endorse or promote products derived from this software
|
;* License. You may obtain a copy of the License at:
|
||||||
; without specific prior written permission.
|
;* opensource.org/licenses/BSD-3-Clause
|
||||||
;
|
;*
|
||||||
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
;******************************************************************************
|
||||||
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
#include "../cmsis_nvic.h"
|
||||||
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
|
||||||
; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
||||||
; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
|
||||||
; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
||||||
; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
|
||||||
; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|
||||||
|
|
||||||
#if !defined(MBED_APP_START)
|
#if !defined(MBED_APP_START)
|
||||||
#define MBED_APP_START 0x08000000
|
#define MBED_APP_START MBED_ROM_START
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
; 2 MB FLASH (0x200000)
|
|
||||||
#if !defined(MBED_APP_SIZE)
|
#if !defined(MBED_APP_SIZE)
|
||||||
#define MBED_APP_SIZE 0x200000
|
#define MBED_APP_SIZE MBED_ROM_SIZE
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
;256 KB SRAM (0x30000 + 0x10000)
|
|
||||||
#if !defined(MBED_RAM_START)
|
|
||||||
#define MBED_RAM_START 0x20000000
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if !defined(MBED_RAM_SIZE)
|
|
||||||
#define MBED_RAM_SIZE 0x30000
|
|
||||||
#endif
|
|
||||||
|
|
||||||
|
|
||||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||||
#define MBED_BOOT_STACK_SIZE 0x400
|
/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
|
||||||
|
#define MBED_BOOT_STACK_SIZE 0x400
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
; Total: 107 vectors = 428 bytes (0x1AC) 8-byte aligned = 0x1B0 (0x1AC + 0x4) to be reserved in RAM
|
/* Round up VECTORS_SIZE to 8 bytes */
|
||||||
#define VECTOR_SIZE 0x1B0
|
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
|
||||||
|
|
||||||
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
|
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
|
||||||
#define MBED_IRAM1_START (MBED_RAM_START + VECTOR_SIZE + MBED_CRASH_REPORT_RAM_SIZE)
|
#define MBED_IRAM1_START (MBED_RAM_START + VECTORS_SIZE + MBED_CRASH_REPORT_RAM_SIZE)
|
||||||
#define MBED_IRAM1_SIZE (MBED_RAM_SIZE - VECTOR_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
|
#define MBED_IRAM1_SIZE (MBED_RAM_SIZE - VECTORS_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
|
||||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE + VECTOR_SIZE + MBED_CRASH_REPORT_RAM_SIZE)
|
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE + VECTORS_SIZE + MBED_CRASH_REPORT_RAM_SIZE)
|
||||||
|
|
||||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
LR_IROM1 MBED_APP_START MBED_APP_SIZE {
|
||||||
|
|
||||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
ER_IROM1 MBED_APP_START MBED_APP_SIZE {
|
||||||
*.o (RESET, +First)
|
*.o (RESET, +First)
|
||||||
*(InRoot$$Sections)
|
*(InRoot$$Sections)
|
||||||
.ANY (+RO)
|
.ANY (+RO)
|
||||||
}
|
}
|
||||||
|
|
||||||
RW_m_crash_data (MBED_RAM_START+VECTOR_SIZE) EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
|
RW_m_crash_data (MBED_RAM_START + VECTORS_SIZE) EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
|
||||||
}
|
}
|
||||||
|
|
||||||
RW_IRAM1 MBED_IRAM1_START MBED_IRAM1_SIZE { ; RW data
|
RW_IRAM1 MBED_IRAM1_START MBED_IRAM1_SIZE { ; RW data
|
||||||
.ANY (+RW +ZI)
|
.ANY (+RW +ZI)
|
||||||
}
|
}
|
||||||
|
|
||||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - RAM_FIXED_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||||
}
|
}
|
||||||
|
|
||||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
RW_IRAM2 (MBED_RAM1_START) (MBED_RAM1_SIZE) { ; RW data
|
||||||
|
.ANY (+RW +ZI)
|
||||||
|
}
|
||||||
|
|
||||||
|
ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -1,28 +1,47 @@
|
||||||
/* With the RTOS in use, this does not affect the main stack size. The size of
|
/* Linker script to configure memory regions. */
|
||||||
* the stack where main runs is determined via the RTOS. */
|
/*
|
||||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
* SPDX-License-Identifier: BSD-3-Clause
|
||||||
#define MBED_BOOT_STACK_SIZE 0x400
|
******************************************************************************
|
||||||
#endif
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2016-2020 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
|
* the "License"; You may not use this file except in compliance with the
|
||||||
|
* License. You may obtain a copy of the License at:
|
||||||
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "../cmsis_nvic.h"
|
||||||
|
|
||||||
STACK_SIZE = MBED_BOOT_STACK_SIZE;
|
|
||||||
|
|
||||||
#if !defined(MBED_APP_START)
|
#if !defined(MBED_APP_START)
|
||||||
#define MBED_APP_START 0x08000000
|
#define MBED_APP_START MBED_ROM_START
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if !defined(MBED_APP_SIZE)
|
#if !defined(MBED_APP_SIZE)
|
||||||
#define MBED_APP_SIZE 2048k
|
#define MBED_APP_SIZE MBED_ROM_SIZE
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||||
|
/* This value is normally defined by the tools
|
||||||
|
to 0x1000 for bare metal and 0x400 for RTOS */
|
||||||
|
#define MBED_BOOT_STACK_SIZE 0x400
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Round up VECTORS_SIZE to 8 bytes */
|
||||||
|
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
|
||||||
|
|
||||||
M_CRASH_DATA_RAM_SIZE = 0x100;
|
M_CRASH_DATA_RAM_SIZE = 0x100;
|
||||||
|
|
||||||
/* Linker script to configure memory regions. */
|
|
||||||
/* 0x1AC resevered for vectors; 8-byte aligned = 0x1B0 (0x1AC + 0x4)*/
|
|
||||||
MEMORY
|
MEMORY
|
||||||
{
|
{
|
||||||
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
|
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
|
||||||
CCM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K
|
CCM (rwx) : ORIGIN = MBED_RAM1_START, LENGTH = MBED_RAM1_SIZE
|
||||||
RAM (rwx) : ORIGIN = 0x200001B0, LENGTH = 192k - (0x1AC+0x4)
|
RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE - VECTORS_SIZE
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Linker script to place sections and symbol values. Should be used together
|
/* Linker script to place sections and symbol values. Should be used together
|
||||||
|
|
@ -60,6 +79,7 @@ SECTIONS
|
||||||
{
|
{
|
||||||
KEEP(*(.isr_vector))
|
KEEP(*(.isr_vector))
|
||||||
*(.text*)
|
*(.text*)
|
||||||
|
|
||||||
KEEP(*(.init))
|
KEEP(*(.init))
|
||||||
KEEP(*(.fini))
|
KEEP(*(.fini))
|
||||||
|
|
||||||
|
|
@ -129,7 +149,6 @@ SECTIONS
|
||||||
KEEP(*(.init_array))
|
KEEP(*(.init_array))
|
||||||
PROVIDE_HIDDEN (__init_array_end = .);
|
PROVIDE_HIDDEN (__init_array_end = .);
|
||||||
|
|
||||||
|
|
||||||
. = ALIGN(8);
|
. = ALIGN(8);
|
||||||
/* finit data */
|
/* finit data */
|
||||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||||
|
|
@ -145,6 +164,19 @@ SECTIONS
|
||||||
|
|
||||||
} > RAM
|
} > RAM
|
||||||
|
|
||||||
|
/* Uninitialized data section
|
||||||
|
* This region is not initialized by the C/C++ library and can be used to
|
||||||
|
* store state across soft reboots. */
|
||||||
|
.uninitialized (NOLOAD):
|
||||||
|
{
|
||||||
|
. = ALIGN(32);
|
||||||
|
__uninitialized_start = .;
|
||||||
|
*(.uninitialized)
|
||||||
|
KEEP(*(.keep.uninitialized))
|
||||||
|
. = ALIGN(32);
|
||||||
|
__uninitialized_end = .;
|
||||||
|
} > RAM
|
||||||
|
|
||||||
.bss :
|
.bss :
|
||||||
{
|
{
|
||||||
. = ALIGN(8);
|
. = ALIGN(8);
|
||||||
|
|
@ -160,9 +192,9 @@ SECTIONS
|
||||||
.heap (COPY):
|
.heap (COPY):
|
||||||
{
|
{
|
||||||
__end__ = .;
|
__end__ = .;
|
||||||
end = __end__;
|
PROVIDE(end = .);
|
||||||
*(.heap*)
|
*(.heap*)
|
||||||
. = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE;
|
. = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE;
|
||||||
__HeapLimit = .;
|
__HeapLimit = .;
|
||||||
} > RAM
|
} > RAM
|
||||||
|
|
||||||
|
|
@ -178,7 +210,7 @@ SECTIONS
|
||||||
* size of stack_dummy section */
|
* size of stack_dummy section */
|
||||||
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
|
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
|
||||||
_estack = __StackTop;
|
_estack = __StackTop;
|
||||||
__StackLimit = __StackTop - STACK_SIZE;
|
__StackLimit = __StackTop - MBED_BOOT_STACK_SIZE;
|
||||||
PROVIDE(__stack = __StackTop);
|
PROVIDE(__stack = __StackTop);
|
||||||
|
|
||||||
/* Check if data + heap + stack exceeds RAM limit */
|
/* Check if data + heap + stack exceeds RAM limit */
|
||||||
|
|
|
||||||
|
|
@ -1,8 +1,25 @@
|
||||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
/* Linker script to configure memory regions.
|
||||||
/*-Editor annotation file-*/
|
*
|
||||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
* SPDX-License-Identifier: BSD-3-Clause
|
||||||
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
|
******************************************************************************
|
||||||
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x200000; }
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2016-2020 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
|
* the "License"; You may not use this file except in compliance with the
|
||||||
|
* License. You may obtain a copy of the License at:
|
||||||
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* Device specific values */
|
||||||
|
|
||||||
|
/* Tools provide -DMBED_ROM_START=xxx -DMBED_ROM_SIZE=xxx -DMBED_RAM_START=xxx -DMBED_RAM_SIZE=xxx */
|
||||||
|
|
||||||
|
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = MBED_ROM_START; }
|
||||||
|
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_SIZE; }
|
||||||
/*-Specials-*/
|
/*-Specials-*/
|
||||||
define symbol __ICFEDIT_intvec_start__ = MBED_APP_START;
|
define symbol __ICFEDIT_intvec_start__ = MBED_APP_START;
|
||||||
/*-Memory Regions-*/
|
/*-Memory Regions-*/
|
||||||
|
|
|
||||||
|
|
@ -1,41 +1,47 @@
|
||||||
/* mbed Microcontroller Library
|
/* mbed Microcontroller Library
|
||||||
*******************************************************************************
|
* SPDX-License-Identifier: BSD-3-Clause
|
||||||
* Copyright (c) 2015, STMicroelectronics
|
******************************************************************************
|
||||||
* All rights reserved.
|
* @attention
|
||||||
*
|
*
|
||||||
* Redistribution and use in source and binary forms, with or without
|
* <h2><center>© Copyright (c) 2016-2020 STMicroelectronics.
|
||||||
* modification, are permitted provided that the following conditions are met:
|
* All rights reserved.</center></h2>
|
||||||
*
|
*
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
* this list of conditions and the following disclaimer.
|
* the "License"; You may not use this file except in compliance with the
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
* License. You may obtain a copy of the License at:
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
******************************************************************************
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
*/
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
|
||||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
|
||||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
||||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
|
||||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
||||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
|
||||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*******************************************************************************
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef MBED_CMSIS_NVIC_H
|
#ifndef MBED_CMSIS_NVIC_H
|
||||||
#define MBED_CMSIS_NVIC_H
|
#define MBED_CMSIS_NVIC_H
|
||||||
|
|
||||||
// STM32F429ZI
|
#if !defined(MBED_ROM_START)
|
||||||
// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F
|
#define MBED_ROM_START 0x8000000
|
||||||
// MCU Peripherals: 91 vectors = 364 bytes from 0x40 to 0x1AB
|
#endif
|
||||||
// Total: 107 vectors = 428 bytes (0x1AC) to be reserved in RAM
|
|
||||||
|
#if !defined(MBED_ROM_SIZE)
|
||||||
|
#define MBED_ROM_SIZE 0x200000 // 2.0 MB
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(MBED_RAM_START)
|
||||||
|
#define MBED_RAM_START 0x20000000
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(MBED_RAM_SIZE)
|
||||||
|
#define MBED_RAM_SIZE 0x30000 // 192 KB
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(MBED_RAM1_START)
|
||||||
|
#define MBED_RAM1_START 0x10000000
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(MBED_RAM1_SIZE)
|
||||||
|
#define MBED_RAM1_SIZE 0x10000 // 64 KB
|
||||||
|
#endif
|
||||||
|
|
||||||
#define NVIC_NUM_VECTORS 107
|
#define NVIC_NUM_VECTORS 107
|
||||||
#define NVIC_RAM_VECTOR_ADDRESS 0x20000000 // Vectors positioned at start of RAM
|
#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
|
||||||
|
|
@ -46,7 +46,6 @@ uint8_t SetSysClock_PLL_HSI(void);
|
||||||
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */
|
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Configures the System clock source, PLL Multiplier and Divider factors,
|
* @brief Configures the System clock source, PLL Multiplier and Divider factors,
|
||||||
* AHB/APBx prescalers and Flash settings
|
* AHB/APBx prescalers and Flash settings
|
||||||
|
|
@ -96,26 +95,33 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
|
||||||
__HAL_RCC_PWR_CLK_ENABLE();
|
__HAL_RCC_PWR_CLK_ENABLE();
|
||||||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
|
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
|
||||||
|
|
||||||
// Enable HSE oscillator and activate PLL with HSE as source
|
/* Get the Clocks configuration according to the internal RCC registers */
|
||||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
HAL_RCC_GetOscConfig(&RCC_OscInitStruct);
|
||||||
if (bypass == 0) {
|
|
||||||
RCC_OscInitStruct.HSEState = RCC_HSE_ON; // External 8 MHz xtal on OSC_IN/OSC_OUT
|
|
||||||
} else {
|
|
||||||
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; // External 8 MHz clock on OSC_IN
|
|
||||||
}
|
|
||||||
|
|
||||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
/* PLL could be already configured by bootlader */
|
||||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
if (RCC_OscInitStruct.PLL.PLLState != RCC_PLL_ON) {
|
||||||
RCC_OscInitStruct.PLL.PLLM = 8;
|
|
||||||
|
// Enable HSE oscillator and activate PLL with HSE as source
|
||||||
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
||||||
|
if (bypass == 0) {
|
||||||
|
RCC_OscInitStruct.HSEState = RCC_HSE_ON; // External 8 MHz xtal on OSC_IN/OSC_OUT
|
||||||
|
} else {
|
||||||
|
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; // External 8 MHz clock on OSC_IN
|
||||||
|
}
|
||||||
|
|
||||||
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||||
|
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||||
|
RCC_OscInitStruct.PLL.PLLM = 8;
|
||||||
#if (DEVICE_USBDEVICE)
|
#if (DEVICE_USBDEVICE)
|
||||||
RCC_OscInitStruct.PLL.PLLN = 336;
|
RCC_OscInitStruct.PLL.PLLN = 336;
|
||||||
#else
|
#else
|
||||||
RCC_OscInitStruct.PLL.PLLN = 360;
|
RCC_OscInitStruct.PLL.PLLN = 360;
|
||||||
#endif
|
#endif
|
||||||
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if DEVICE_USBDEVICE defined
|
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // 180 MHz or 168 MHz if DEVICE_USBDEVICE defined
|
||||||
RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if DEVICE_USBDEVICE defined
|
RCC_OscInitStruct.PLL.PLLQ = 7; // 48 MHz if DEVICE_USBDEVICE defined
|
||||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
|
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
|
||||||
return 0; // FAIL
|
return 0; // FAIL
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
// Activate the OverDrive to reach the 180 MHz Frequency
|
// Activate the OverDrive to reach the 180 MHz Frequency
|
||||||
|
|
|
||||||
|
|
@ -1,78 +1,65 @@
|
||||||
#! armcc -E
|
#! armcc -E
|
||||||
; Scatter-Loading Description File
|
; Scatter-Loading Description File
|
||||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|
||||||
; Copyright (c) 2015, STMicroelectronics
|
|
||||||
; All rights reserved.
|
|
||||||
;
|
;
|
||||||
; Redistribution and use in source and binary forms, with or without
|
; SPDX-License-Identifier: BSD-3-Clause
|
||||||
; modification, are permitted provided that the following conditions are met:
|
;******************************************************************************
|
||||||
;
|
;* @attention
|
||||||
; 1. Redistributions of source code must retain the above copyright notice,
|
;*
|
||||||
; this list of conditions and the following disclaimer.
|
;* Copyright (c) 2016-2020 STMicroelectronics.
|
||||||
; 2. Redistributions in binary form must reproduce the above copyright notice,
|
;* All rights reserved.
|
||||||
; this list of conditions and the following disclaimer in the documentation
|
;*
|
||||||
; and/or other materials provided with the distribution.
|
;* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
; 3. Neither the name of STMicroelectronics nor the names of its contributors
|
;* the "License"; You may not use this file except in compliance with the
|
||||||
; may be used to endorse or promote products derived from this software
|
;* License. You may obtain a copy of the License at:
|
||||||
; without specific prior written permission.
|
;* opensource.org/licenses/BSD-3-Clause
|
||||||
;
|
;*
|
||||||
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
;******************************************************************************
|
||||||
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
#include "../cmsis_nvic.h"
|
||||||
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
|
||||||
; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
||||||
; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
|
||||||
; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
||||||
; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
|
||||||
; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|
||||||
|
|
||||||
#if !defined(MBED_APP_START)
|
#if !defined(MBED_APP_START)
|
||||||
#define MBED_APP_START 0x08000000
|
#define MBED_APP_START MBED_ROM_START
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if !defined(MBED_APP_SIZE)
|
#if !defined(MBED_APP_SIZE)
|
||||||
#define MBED_APP_SIZE 0x200000
|
#define MBED_APP_SIZE MBED_ROM_SIZE
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||||
#define MBED_BOOT_STACK_SIZE 0x400
|
/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
|
||||||
|
#define MBED_BOOT_STACK_SIZE 0x400
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#define Stack_Size MBED_BOOT_STACK_SIZE
|
/* Round up VECTORS_SIZE to 8 bytes */
|
||||||
|
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
|
||||||
|
|
||||||
#define MBED_RAM_START 0x20000000
|
|
||||||
#define MBED_RAM_SIZE 0x30000
|
|
||||||
#define MBED_VECTTABLE_RAM_START (MBED_RAM_START)
|
|
||||||
#define MBED_VECTTABLE_RAM_SIZE 0x1B0
|
|
||||||
#define MBED_CRASH_REPORT_RAM_START (MBED_VECTTABLE_RAM_START + MBED_VECTTABLE_RAM_SIZE)
|
|
||||||
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
|
#define MBED_CRASH_REPORT_RAM_SIZE 0x100
|
||||||
#define MBED_RAM0_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE)
|
#define MBED_IRAM1_START (MBED_RAM_START + VECTORS_SIZE + MBED_CRASH_REPORT_RAM_SIZE)
|
||||||
#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_VECTTABLE_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
|
#define MBED_IRAM1_SIZE (MBED_RAM_SIZE - VECTORS_SIZE - MBED_CRASH_REPORT_RAM_SIZE)
|
||||||
|
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE + VECTORS_SIZE + MBED_CRASH_REPORT_RAM_SIZE)
|
||||||
|
|
||||||
; 2 MB FLASH (0x200000) + 256 KB SRAM (0x30000 + 0x10000)
|
LR_IROM1 MBED_APP_START MBED_APP_SIZE {
|
||||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
|
||||||
|
|
||||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
ER_IROM1 MBED_APP_START MBED_APP_SIZE {
|
||||||
*.o (RESET, +First)
|
*.o (RESET, +First)
|
||||||
*(InRoot$$Sections)
|
*(InRoot$$Sections)
|
||||||
.ANY (+RO)
|
.ANY (+RO)
|
||||||
}
|
|
||||||
|
|
||||||
RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
|
|
||||||
}
|
}
|
||||||
|
|
||||||
; Total: 107 vectors = 428 bytes(0x1AC) 8-byte aligned = 0x1B0 (0x1AC + 0x4) to be reserved in RAM
|
RW_m_crash_data (MBED_RAM_START + VECTORS_SIZE) EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
|
||||||
RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE-Stack_Size) { ; RW data
|
|
||||||
.ANY (+RW +ZI)
|
|
||||||
}
|
}
|
||||||
|
|
||||||
RW_IRAM2 (0x10000000) (0x10000) { ; RW data
|
RW_IRAM1 MBED_IRAM1_START MBED_IRAM1_SIZE { ; RW data
|
||||||
.ANY (+RW +ZI)
|
.ANY (+RW +ZI)
|
||||||
}
|
}
|
||||||
|
|
||||||
ARM_LIB_STACK (MBED_RAM0_START+MBED_RAM0_SIZE) EMPTY -Stack_Size { ; stack
|
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - RAM_FIXED_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||||
|
}
|
||||||
|
|
||||||
|
RW_IRAM2 (MBED_RAM1_START) (MBED_RAM1_SIZE) { ; RW data
|
||||||
|
.ANY (+RW +ZI)
|
||||||
|
}
|
||||||
|
|
||||||
|
ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -1,26 +1,47 @@
|
||||||
|
/* Linker script to configure memory regions. */
|
||||||
|
/*
|
||||||
|
* SPDX-License-Identifier: BSD-3-Clause
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2016-2020 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
|
* the "License"; You may not use this file except in compliance with the
|
||||||
|
* License. You may obtain a copy of the License at:
|
||||||
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "../cmsis_nvic.h"
|
||||||
|
|
||||||
|
|
||||||
#if !defined(MBED_APP_START)
|
#if !defined(MBED_APP_START)
|
||||||
#define MBED_APP_START 0x08000000
|
#define MBED_APP_START MBED_ROM_START
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if !defined(MBED_APP_SIZE)
|
#if !defined(MBED_APP_SIZE)
|
||||||
#define MBED_APP_SIZE 2048k
|
#define MBED_APP_SIZE MBED_ROM_SIZE
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||||
|
/* This value is normally defined by the tools
|
||||||
|
to 0x1000 for bare metal and 0x400 for RTOS */
|
||||||
|
#define MBED_BOOT_STACK_SIZE 0x400
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Round up VECTORS_SIZE to 8 bytes */
|
||||||
|
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
|
||||||
|
|
||||||
M_CRASH_DATA_RAM_SIZE = 0x100;
|
M_CRASH_DATA_RAM_SIZE = 0x100;
|
||||||
|
|
||||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
|
||||||
#define MBED_BOOT_STACK_SIZE 0x400
|
|
||||||
#endif
|
|
||||||
|
|
||||||
STACK_SIZE = MBED_BOOT_STACK_SIZE;
|
|
||||||
|
|
||||||
/* Linker script to configure memory regions. */
|
|
||||||
/* 0x1AC resevered for vectors; 8-byte aligned = 0x1B0 (0x1AC + 0x4)*/
|
|
||||||
MEMORY
|
MEMORY
|
||||||
{
|
{
|
||||||
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
|
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
|
||||||
CCM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K
|
CCM (rwx) : ORIGIN = MBED_RAM1_START, LENGTH = MBED_RAM1_SIZE
|
||||||
RAM (rwx) : ORIGIN = 0x200001B0, LENGTH = 192k - (0x1AC+0x4)
|
RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE - VECTORS_SIZE
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Linker script to place sections and symbol values. Should be used together
|
/* Linker script to place sections and symbol values. Should be used together
|
||||||
|
|
@ -58,6 +79,7 @@ SECTIONS
|
||||||
{
|
{
|
||||||
KEEP(*(.isr_vector))
|
KEEP(*(.isr_vector))
|
||||||
*(.text*)
|
*(.text*)
|
||||||
|
|
||||||
KEEP(*(.init))
|
KEEP(*(.init))
|
||||||
KEEP(*(.fini))
|
KEEP(*(.fini))
|
||||||
|
|
||||||
|
|
@ -127,7 +149,6 @@ SECTIONS
|
||||||
KEEP(*(.init_array))
|
KEEP(*(.init_array))
|
||||||
PROVIDE_HIDDEN (__init_array_end = .);
|
PROVIDE_HIDDEN (__init_array_end = .);
|
||||||
|
|
||||||
|
|
||||||
. = ALIGN(8);
|
. = ALIGN(8);
|
||||||
/* finit data */
|
/* finit data */
|
||||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||||
|
|
@ -143,6 +164,19 @@ SECTIONS
|
||||||
|
|
||||||
} > RAM
|
} > RAM
|
||||||
|
|
||||||
|
/* Uninitialized data section
|
||||||
|
* This region is not initialized by the C/C++ library and can be used to
|
||||||
|
* store state across soft reboots. */
|
||||||
|
.uninitialized (NOLOAD):
|
||||||
|
{
|
||||||
|
. = ALIGN(32);
|
||||||
|
__uninitialized_start = .;
|
||||||
|
*(.uninitialized)
|
||||||
|
KEEP(*(.keep.uninitialized))
|
||||||
|
. = ALIGN(32);
|
||||||
|
__uninitialized_end = .;
|
||||||
|
} > RAM
|
||||||
|
|
||||||
.bss :
|
.bss :
|
||||||
{
|
{
|
||||||
. = ALIGN(8);
|
. = ALIGN(8);
|
||||||
|
|
@ -158,9 +192,9 @@ SECTIONS
|
||||||
.heap (COPY):
|
.heap (COPY):
|
||||||
{
|
{
|
||||||
__end__ = .;
|
__end__ = .;
|
||||||
end = __end__;
|
PROVIDE(end = .);
|
||||||
*(.heap*)
|
*(.heap*)
|
||||||
. = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE;
|
. = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE;
|
||||||
__HeapLimit = .;
|
__HeapLimit = .;
|
||||||
} > RAM
|
} > RAM
|
||||||
|
|
||||||
|
|
@ -176,7 +210,7 @@ SECTIONS
|
||||||
* size of stack_dummy section */
|
* size of stack_dummy section */
|
||||||
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
|
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
|
||||||
_estack = __StackTop;
|
_estack = __StackTop;
|
||||||
__StackLimit = __StackTop - STACK_SIZE;
|
__StackLimit = __StackTop - MBED_BOOT_STACK_SIZE;
|
||||||
PROVIDE(__stack = __StackTop);
|
PROVIDE(__stack = __StackTop);
|
||||||
|
|
||||||
/* Check if data + heap + stack exceeds RAM limit */
|
/* Check if data + heap + stack exceeds RAM limit */
|
||||||
|
|
|
||||||
|
|
@ -1,8 +1,25 @@
|
||||||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
/* Linker script to configure memory regions.
|
||||||
/*-Editor annotation file-*/
|
*
|
||||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
* SPDX-License-Identifier: BSD-3-Clause
|
||||||
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
|
******************************************************************************
|
||||||
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x200000; }
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2016-2020 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
|
* the "License"; You may not use this file except in compliance with the
|
||||||
|
* License. You may obtain a copy of the License at:
|
||||||
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* Device specific values */
|
||||||
|
|
||||||
|
/* Tools provide -DMBED_ROM_START=xxx -DMBED_ROM_SIZE=xxx -DMBED_RAM_START=xxx -DMBED_RAM_SIZE=xxx */
|
||||||
|
|
||||||
|
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = MBED_ROM_START; }
|
||||||
|
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = MBED_ROM_SIZE; }
|
||||||
/*-Specials-*/
|
/*-Specials-*/
|
||||||
define symbol __ICFEDIT_intvec_start__ = MBED_APP_START;
|
define symbol __ICFEDIT_intvec_start__ = MBED_APP_START;
|
||||||
/*-Memory Regions-*/
|
/*-Memory Regions-*/
|
||||||
|
|
@ -45,4 +62,4 @@ place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||||
|
|
||||||
place in ROM_region { readonly };
|
place in ROM_region { readonly };
|
||||||
place in RAM_region { readwrite,
|
place in RAM_region { readwrite,
|
||||||
block CSTACK, block HEAP };
|
block CSTACK, block HEAP };
|
||||||
|
|
|
||||||
|
|
@ -1,41 +1,47 @@
|
||||||
/* mbed Microcontroller Library
|
/* mbed Microcontroller Library
|
||||||
*******************************************************************************
|
* SPDX-License-Identifier: BSD-3-Clause
|
||||||
* Copyright (c) 2015, STMicroelectronics
|
******************************************************************************
|
||||||
* All rights reserved.
|
* @attention
|
||||||
*
|
*
|
||||||
* Redistribution and use in source and binary forms, with or without
|
* <h2><center>© Copyright (c) 2016-2020 STMicroelectronics.
|
||||||
* modification, are permitted provided that the following conditions are met:
|
* All rights reserved.</center></h2>
|
||||||
*
|
*
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
* this list of conditions and the following disclaimer.
|
* the "License"; You may not use this file except in compliance with the
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
* License. You may obtain a copy of the License at:
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
******************************************************************************
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
*/
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
|
||||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
|
||||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
||||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
|
||||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
||||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
|
||||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*******************************************************************************
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef MBED_CMSIS_NVIC_H
|
#ifndef MBED_CMSIS_NVIC_H
|
||||||
#define MBED_CMSIS_NVIC_H
|
#define MBED_CMSIS_NVIC_H
|
||||||
|
|
||||||
// STM32F439xI
|
#if !defined(MBED_ROM_START)
|
||||||
// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F
|
#define MBED_ROM_START 0x8000000
|
||||||
// MCU Peripherals: 91 vectors = 364 bytes from 0x40 to 0x1AB
|
#endif
|
||||||
// Total: 107 vectors = 428 bytes (0x1AC) to be reserved in RAM
|
|
||||||
|
#if !defined(MBED_ROM_SIZE)
|
||||||
|
#define MBED_ROM_SIZE 0x200000 // 2.0 MB
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(MBED_RAM_START)
|
||||||
|
#define MBED_RAM_START 0x20000000
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(MBED_RAM_SIZE)
|
||||||
|
#define MBED_RAM_SIZE 0x30000 // 192 KB
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(MBED_RAM1_START)
|
||||||
|
#define MBED_RAM1_START 0x10000000
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(MBED_RAM1_SIZE)
|
||||||
|
#define MBED_RAM1_SIZE 0x10000 // 64 KB
|
||||||
|
#endif
|
||||||
|
|
||||||
#define NVIC_NUM_VECTORS 107
|
#define NVIC_NUM_VECTORS 107
|
||||||
#define NVIC_RAM_VECTOR_ADDRESS 0x20000000 // Vectors positioned at start of RAM
|
#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
|
||||||
|
|
@ -109,23 +109,30 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
|
||||||
__HAL_RCC_PWR_CLK_ENABLE();
|
__HAL_RCC_PWR_CLK_ENABLE();
|
||||||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
|
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
|
||||||
|
|
||||||
// Enable HSE oscillator and activate PLL with HSE as source
|
/* Get the Clocks configuration according to the internal RCC registers */
|
||||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
HAL_RCC_GetOscConfig(&RCC_OscInitStruct);
|
||||||
if (bypass == 0) {
|
|
||||||
RCC_OscInitStruct.HSEState = RCC_HSE_ON; // External 8 MHz xtal on OSC_IN/OSC_OUT
|
|
||||||
} else {
|
|
||||||
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; // External 8 MHz clock on OSC_IN
|
|
||||||
}
|
|
||||||
|
|
||||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
/* PLL could be already configured by bootlader */
|
||||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
if (RCC_OscInitStruct.PLL.PLLState != RCC_PLL_ON) {
|
||||||
RCC_OscInitStruct.PLL.PLLM = 8; // VCO input clock = 1 MHz (8 MHz / 8)
|
|
||||||
RCC_OscInitStruct.PLL.PLLN = 360; // VCO output clock = 360 MHz (1 MHz * 360)
|
// Enable HSE oscillator and activate PLL with HSE as source
|
||||||
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // PLLCLK = 180 MHz (360 MHz / 2)
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
||||||
RCC_OscInitStruct.PLL.PLLQ = 7; //
|
if (bypass == 0) {
|
||||||
RCC_OscInitStruct.PLL.PLLR = 2; //
|
RCC_OscInitStruct.HSEState = RCC_HSE_ON; // External 8 MHz xtal on OSC_IN/OSC_OUT
|
||||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
|
} else {
|
||||||
return 0; // FAIL
|
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; // External 8 MHz clock on OSC_IN
|
||||||
|
}
|
||||||
|
|
||||||
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||||
|
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||||
|
RCC_OscInitStruct.PLL.PLLM = 8; // VCO input clock = 1 MHz (8 MHz / 8)
|
||||||
|
RCC_OscInitStruct.PLL.PLLN = 360; // VCO output clock = 360 MHz (1 MHz * 360)
|
||||||
|
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // PLLCLK = 180 MHz (360 MHz / 2)
|
||||||
|
RCC_OscInitStruct.PLL.PLLQ = 7; //
|
||||||
|
RCC_OscInitStruct.PLL.PLLR = 2; //
|
||||||
|
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
|
||||||
|
return 0; // FAIL
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
// Activate the OverDrive to reach the 180 MHz Frequency
|
// Activate the OverDrive to reach the 180 MHz Frequency
|
||||||
|
|
|
||||||
|
|
@ -106,22 +106,29 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
|
||||||
regarding system frequency refer to product datasheet. */
|
regarding system frequency refer to product datasheet. */
|
||||||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
|
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
|
||||||
|
|
||||||
/* Enable HSE oscillator and activate PLL with HSE as source */
|
/* Get the Clocks configuration according to the internal RCC registers */
|
||||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
HAL_RCC_GetOscConfig(&RCC_OscInitStruct);
|
||||||
if (bypass == 0) {
|
|
||||||
RCC_OscInitStruct.HSEState = RCC_HSE_ON; /* External 8 MHz xtal on OSC_IN/OSC_OUT */
|
/* PLL could be already configured by bootlader */
|
||||||
} else {
|
if (RCC_OscInitStruct.PLL.PLLState != RCC_PLL_ON) {
|
||||||
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; /* External 8 MHz clock on OSC_IN */
|
|
||||||
}
|
/* Enable HSE oscillator and activate PLL with HSE as source */
|
||||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
||||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
if (bypass == 0) {
|
||||||
RCC_OscInitStruct.PLL.PLLM = 8; // VCO input clock = 1 MHz (8 MHz / 8)
|
RCC_OscInitStruct.HSEState = RCC_HSE_ON; /* External 8 MHz xtal on OSC_IN/OSC_OUT */
|
||||||
RCC_OscInitStruct.PLL.PLLN = 360; // VCO output clock = 360 MHz (1 MHz * 360)
|
} else {
|
||||||
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // PLLCLK = 180 MHz (360 MHz / 2)
|
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; /* External 8 MHz clock on OSC_IN */
|
||||||
RCC_OscInitStruct.PLL.PLLQ = 7; //
|
}
|
||||||
RCC_OscInitStruct.PLL.PLLR = 2; //
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
|
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||||
return 0; // FAIL
|
RCC_OscInitStruct.PLL.PLLM = 8; // VCO input clock = 1 MHz (8 MHz / 8)
|
||||||
|
RCC_OscInitStruct.PLL.PLLN = 360; // VCO output clock = 360 MHz (1 MHz * 360)
|
||||||
|
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // PLLCLK = 180 MHz (360 MHz / 2)
|
||||||
|
RCC_OscInitStruct.PLL.PLLQ = 7; //
|
||||||
|
RCC_OscInitStruct.PLL.PLLR = 2; //
|
||||||
|
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
|
||||||
|
return 0; // FAIL
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
// Activate the OverDrive to reach the 180 MHz Frequency
|
// Activate the OverDrive to reach the 180 MHz Frequency
|
||||||
|
|
|
||||||
|
|
@ -1,54 +1,53 @@
|
||||||
#! armcc -E
|
#! armcc -E
|
||||||
; Scatter-Loading Description File
|
; Scatter-Loading Description File
|
||||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|
||||||
; Copyright (c) 2015, STMicroelectronics
|
|
||||||
; All rights reserved.
|
|
||||||
;
|
;
|
||||||
; Redistribution and use in source and binary forms, with or without
|
; SPDX-License-Identifier: BSD-3-Clause
|
||||||
; modification, are permitted provided that the following conditions are met:
|
;******************************************************************************
|
||||||
;
|
;* @attention
|
||||||
; 1. Redistributions of source code must retain the above copyright notice,
|
;*
|
||||||
; this list of conditions and the following disclaimer.
|
;* Copyright (c) 2016-2020 STMicroelectronics.
|
||||||
; 2. Redistributions in binary form must reproduce the above copyright notice,
|
;* All rights reserved.
|
||||||
; this list of conditions and the following disclaimer in the documentation
|
;*
|
||||||
; and/or other materials provided with the distribution.
|
;* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
; 3. Neither the name of STMicroelectronics nor the names of its contributors
|
;* the "License"; You may not use this file except in compliance with the
|
||||||
; may be used to endorse or promote products derived from this software
|
;* License. You may obtain a copy of the License at:
|
||||||
; without specific prior written permission.
|
;* opensource.org/licenses/BSD-3-Clause
|
||||||
;
|
;*
|
||||||
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
;******************************************************************************
|
||||||
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
|
||||||
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
|
||||||
; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
||||||
; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
|
||||||
; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
||||||
; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
|
||||||
; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|
||||||
|
|
||||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
#include "../cmsis_nvic.h"
|
||||||
#define MBED_BOOT_STACK_SIZE 0x400
|
|
||||||
|
#if !defined(MBED_APP_START)
|
||||||
|
#define MBED_APP_START MBED_ROM_START
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#define Stack_Size MBED_BOOT_STACK_SIZE
|
#if !defined(MBED_APP_SIZE)
|
||||||
|
#define MBED_APP_SIZE MBED_ROM_SIZE
|
||||||
|
#endif
|
||||||
|
|
||||||
; 512 KB FLASH (0x80000) + 128 KB SRAM (0x20000)
|
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||||
LR_IROM1 0x08000000 0x80000 { ; load region size_region
|
/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
|
||||||
|
#define MBED_BOOT_STACK_SIZE 0x400
|
||||||
|
#endif
|
||||||
|
|
||||||
ER_IROM1 0x08000000 0x80000 { ; load address = execution address
|
/* Round up VECTORS_SIZE to 8 bytes */
|
||||||
*.o (RESET, +First)
|
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
|
||||||
*(InRoot$$Sections)
|
|
||||||
.ANY (+RO)
|
LR_IROM1 MBED_APP_START MBED_APP_SIZE {
|
||||||
|
|
||||||
|
ER_IROM1 MBED_APP_START MBED_APP_SIZE {
|
||||||
|
*.o (RESET, +First)
|
||||||
|
*(InRoot$$Sections)
|
||||||
|
.ANY (+RO)
|
||||||
}
|
}
|
||||||
|
|
||||||
; Total: 113 vectors = 452 bytes (0x1C4) 8-byte aligned = 0x1C8 (0x1C4 + 0x4) to be reserved in RAM
|
RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data
|
||||||
RW_IRAM1 (0x20000000+0x1C8) (0x20000-0x1C8-Stack_Size) { ; RW data
|
.ANY (+RW +ZI)
|
||||||
.ANY (+RW +ZI)
|
|
||||||
}
|
}
|
||||||
|
|
||||||
ARM_LIB_STACK (0x20000000+0x20000) EMPTY -Stack_Size { ; stack
|
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
|
||||||
|
}
|
||||||
|
|
||||||
|
ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -1,23 +1,44 @@
|
||||||
|
/* Linker script to configure memory regions. */
|
||||||
|
/*
|
||||||
|
* SPDX-License-Identifier: BSD-3-Clause
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2016-2020 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
|
* the "License"; You may not use this file except in compliance with the
|
||||||
|
* License. You may obtain a copy of the License at:
|
||||||
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "../cmsis_nvic.h"
|
||||||
|
|
||||||
|
|
||||||
#if !defined(MBED_APP_START)
|
#if !defined(MBED_APP_START)
|
||||||
#define MBED_APP_START 0x08000000
|
#define MBED_APP_START MBED_ROM_START
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if !defined(MBED_APP_SIZE)
|
#if !defined(MBED_APP_SIZE)
|
||||||
#define MBED_APP_SIZE 512K
|
#define MBED_APP_SIZE MBED_ROM_SIZE
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||||
#define MBED_BOOT_STACK_SIZE 0x400
|
/* This value is normally defined by the tools
|
||||||
|
to 0x1000 for bare metal and 0x400 for RTOS */
|
||||||
|
#define MBED_BOOT_STACK_SIZE 0x400
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
STACK_SIZE = MBED_BOOT_STACK_SIZE;
|
/* Round up VECTORS_SIZE to 8 bytes */
|
||||||
|
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
|
||||||
|
|
||||||
/* Linker script to configure memory regions. */
|
|
||||||
/* 0x1C4 resevered for vectors; 8-byte aligned = 0x1C8 (0x1C4 + 0x4)*/
|
|
||||||
MEMORY
|
MEMORY
|
||||||
{
|
{
|
||||||
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
|
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
|
||||||
RAM (rwx) : ORIGIN = 0x200001C8, LENGTH = 128k - (0x1C4+0x4)
|
RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE - VECTORS_SIZE
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Linker script to place sections and symbol values. Should be used together
|
/* Linker script to place sections and symbol values. Should be used together
|
||||||
|
|
@ -55,6 +76,7 @@ SECTIONS
|
||||||
{
|
{
|
||||||
KEEP(*(.isr_vector))
|
KEEP(*(.isr_vector))
|
||||||
*(.text*)
|
*(.text*)
|
||||||
|
|
||||||
KEEP(*(.init))
|
KEEP(*(.init))
|
||||||
KEEP(*(.fini))
|
KEEP(*(.fini))
|
||||||
|
|
||||||
|
|
@ -91,7 +113,7 @@ SECTIONS
|
||||||
|
|
||||||
__etext = .;
|
__etext = .;
|
||||||
_sidata = .;
|
_sidata = .;
|
||||||
|
|
||||||
.data : AT (__etext)
|
.data : AT (__etext)
|
||||||
{
|
{
|
||||||
__data_start__ = .;
|
__data_start__ = .;
|
||||||
|
|
@ -112,7 +134,6 @@ SECTIONS
|
||||||
KEEP(*(.init_array))
|
KEEP(*(.init_array))
|
||||||
PROVIDE_HIDDEN (__init_array_end = .);
|
PROVIDE_HIDDEN (__init_array_end = .);
|
||||||
|
|
||||||
|
|
||||||
. = ALIGN(8);
|
. = ALIGN(8);
|
||||||
/* finit data */
|
/* finit data */
|
||||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||||
|
|
@ -128,6 +149,19 @@ SECTIONS
|
||||||
|
|
||||||
} > RAM
|
} > RAM
|
||||||
|
|
||||||
|
/* Uninitialized data section
|
||||||
|
* This region is not initialized by the C/C++ library and can be used to
|
||||||
|
* store state across soft reboots. */
|
||||||
|
.uninitialized (NOLOAD):
|
||||||
|
{
|
||||||
|
. = ALIGN(32);
|
||||||
|
__uninitialized_start = .;
|
||||||
|
*(.uninitialized)
|
||||||
|
KEEP(*(.keep.uninitialized))
|
||||||
|
. = ALIGN(32);
|
||||||
|
__uninitialized_end = .;
|
||||||
|
} > RAM
|
||||||
|
|
||||||
.bss :
|
.bss :
|
||||||
{
|
{
|
||||||
. = ALIGN(8);
|
. = ALIGN(8);
|
||||||
|
|
@ -143,9 +177,9 @@ SECTIONS
|
||||||
.heap (COPY):
|
.heap (COPY):
|
||||||
{
|
{
|
||||||
__end__ = .;
|
__end__ = .;
|
||||||
end = __end__;
|
PROVIDE(end = .);
|
||||||
*(.heap*)
|
*(.heap*)
|
||||||
. = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE;
|
. = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE;
|
||||||
__HeapLimit = .;
|
__HeapLimit = .;
|
||||||
} > RAM
|
} > RAM
|
||||||
|
|
||||||
|
|
@ -161,7 +195,7 @@ SECTIONS
|
||||||
* size of stack_dummy section */
|
* size of stack_dummy section */
|
||||||
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
|
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
|
||||||
_estack = __StackTop;
|
_estack = __StackTop;
|
||||||
__StackLimit = __StackTop - STACK_SIZE;
|
__StackLimit = __StackTop - MBED_BOOT_STACK_SIZE;
|
||||||
PROVIDE(__stack = __StackTop);
|
PROVIDE(__stack = __StackTop);
|
||||||
|
|
||||||
/* Check if data + heap + stack exceeds RAM limit */
|
/* Check if data + heap + stack exceeds RAM limit */
|
||||||
|
|
|
||||||
|
|
@ -1,33 +1,59 @@
|
||||||
/* [ROM = 512kb = 0x80000] */
|
/* Linker script to configure memory regions.
|
||||||
define symbol __intvec_start__ = 0x08000000;
|
*
|
||||||
define symbol __region_ROM_start__ = 0x08000000;
|
* SPDX-License-Identifier: BSD-3-Clause
|
||||||
define symbol __region_ROM_end__ = 0x0807FFFF;
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2016-2020 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
|
* the "License"; You may not use this file except in compliance with the
|
||||||
|
* License. You may obtain a copy of the License at:
|
||||||
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* Device specific values */
|
||||||
|
|
||||||
/* [RAM = 128kb = 0x20000] Vector table dynamic copy: 113 vectors * 4= 452 bytes (0x1C4) to be reserved in RAM */
|
/* Tools provide -DMBED_ROM_START=xxx -DMBED_ROM_SIZE=xxx -DMBED_RAM_START=xxx -DMBED_RAM_SIZE=xxx */
|
||||||
define symbol __NVIC_start__ = 0x20000000;
|
|
||||||
define symbol __NVIC_end__ = 0x200001C7; /* Add 4 more bytes to be aligned on 8 bytes */
|
|
||||||
define symbol __region_RAM_start__ = 0x200001C8;
|
|
||||||
define symbol __region_RAM_end__ = 0x2001FFFF;
|
|
||||||
|
|
||||||
/* Memory regions */
|
define symbol VECTORS = 113; /* This value must match NVIC_NUM_VECTORS in cmsis_nvic.h */
|
||||||
define memory mem with size = 4G;
|
define symbol HEAP_SIZE = 0xa000;
|
||||||
define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
|
|
||||||
define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__];
|
/* Common - Do not change */
|
||||||
|
|
||||||
|
if (!isdefinedsymbol(MBED_APP_START)) {
|
||||||
|
define symbol MBED_APP_START = MBED_ROM_START;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (!isdefinedsymbol(MBED_APP_SIZE)) {
|
||||||
|
define symbol MBED_APP_SIZE = MBED_ROM_SIZE;
|
||||||
|
}
|
||||||
|
|
||||||
/* Stack and Heap */
|
|
||||||
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
|
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
|
||||||
|
/* This value is normally defined by the tools
|
||||||
|
to 0x1000 for bare metal and 0x400 for RTOS */
|
||||||
define symbol MBED_BOOT_STACK_SIZE = 0x400;
|
define symbol MBED_BOOT_STACK_SIZE = 0x400;
|
||||||
}
|
}
|
||||||
define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
|
|
||||||
define symbol __size_heap__ = 0x8000;
|
|
||||||
define block CSTACK with alignment = 8, size = __size_cstack__ { };
|
|
||||||
define block HEAP with alignment = 8, size = __size_heap__ { };
|
|
||||||
define block STACKHEAP with fixed order { block HEAP, block CSTACK };
|
|
||||||
|
|
||||||
initialize by copy with packing = zeros { readwrite };
|
/* Round up VECTORS_SIZE to 8 bytes */
|
||||||
|
define symbol VECTORS_SIZE = ((VECTORS * 4) + 7) & ~7;
|
||||||
|
define symbol RAM_REGION_START = MBED_RAM_START + VECTORS_SIZE;
|
||||||
|
define symbol RAM_REGION_SIZE = MBED_RAM_SIZE - VECTORS_SIZE;
|
||||||
|
|
||||||
|
define memory mem with size = 4G;
|
||||||
|
define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE];
|
||||||
|
define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE];
|
||||||
|
|
||||||
|
define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { };
|
||||||
|
define block HEAP with alignment = 8, size = HEAP_SIZE { };
|
||||||
|
|
||||||
|
initialize by copy { readwrite };
|
||||||
do not initialize { section .noinit };
|
do not initialize { section .noinit };
|
||||||
|
|
||||||
place at address mem:__intvec_start__ { readonly section .intvec };
|
place at address mem: MBED_APP_START { readonly section .intvec };
|
||||||
|
|
||||||
place in ROM_region { readonly };
|
place in ROM_region { readonly };
|
||||||
place in RAM_region { readwrite, block STACKHEAP };
|
place in RAM_region { readwrite,
|
||||||
|
block CSTACK, block HEAP };
|
||||||
|
|
|
||||||
|
|
@ -1,40 +1,39 @@
|
||||||
/* mbed Microcontroller Library
|
/* mbed Microcontroller Library
|
||||||
*******************************************************************************
|
* SPDX-License-Identifier: BSD-3-Clause
|
||||||
* Copyright (c) 2015, STMicroelectronics
|
******************************************************************************
|
||||||
* All rights reserved.
|
* @attention
|
||||||
*
|
*
|
||||||
* Redistribution and use in source and binary forms, with or without
|
* <h2><center>© Copyright (c) 2016-2020 STMicroelectronics.
|
||||||
* modification, are permitted provided that the following conditions are met:
|
* All rights reserved.</center></h2>
|
||||||
*
|
*
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
* this list of conditions and the following disclaimer.
|
* the "License"; You may not use this file except in compliance with the
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
* License. You may obtain a copy of the License at:
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
******************************************************************************
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
*/
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
|
||||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
|
||||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
||||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
|
||||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
||||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
|
||||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*******************************************************************************
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef MBED_CMSIS_NVIC_H
|
#ifndef MBED_CMSIS_NVIC_H
|
||||||
#define MBED_CMSIS_NVIC_H
|
#define MBED_CMSIS_NVIC_H
|
||||||
|
|
||||||
// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F
|
#if !defined(MBED_ROM_START)
|
||||||
// MCU Peripherals: 97 vectors = 388 bytes from 0x40 to 0x1C3
|
#define MBED_ROM_START 0x8000000
|
||||||
// Total: 113 vectors = 452 bytes (0x1C4) to be reserved in RAM
|
#endif
|
||||||
|
|
||||||
|
#if !defined(MBED_ROM_SIZE)
|
||||||
|
#define MBED_ROM_SIZE 0x80000 // 512 KB
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(MBED_RAM_START)
|
||||||
|
#define MBED_RAM_START 0x20000000
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(MBED_RAM_SIZE)
|
||||||
|
#define MBED_RAM_SIZE 0x20000 // 128 KB
|
||||||
|
#endif
|
||||||
|
|
||||||
#define NVIC_NUM_VECTORS 113
|
#define NVIC_NUM_VECTORS 113
|
||||||
#define NVIC_RAM_VECTOR_ADDRESS 0x20000000 // Vectors positioned at start of RAM
|
#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
|
||||||
|
|
@ -106,22 +106,29 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
|
||||||
regarding system frequency refer to product datasheet. */
|
regarding system frequency refer to product datasheet. */
|
||||||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
|
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
|
||||||
|
|
||||||
/* Enable HSE oscillator and activate PLL with HSE as source */
|
/* Get the Clocks configuration according to the internal RCC registers */
|
||||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
HAL_RCC_GetOscConfig(&RCC_OscInitStruct);
|
||||||
if (bypass == 0) {
|
|
||||||
RCC_OscInitStruct.HSEState = RCC_HSE_ON; /* External 8 MHz xtal on OSC_IN/OSC_OUT */
|
/* PLL could be already configured by bootlader */
|
||||||
} else {
|
if (RCC_OscInitStruct.PLL.PLLState != RCC_PLL_ON) {
|
||||||
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; /* External 8 MHz clock on OSC_IN */
|
|
||||||
}
|
/* Enable HSE oscillator and activate PLL with HSE as source */
|
||||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
||||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
if (bypass == 0) {
|
||||||
RCC_OscInitStruct.PLL.PLLM = 8; // VCO input clock = 1 MHz (8 MHz / 8)
|
RCC_OscInitStruct.HSEState = RCC_HSE_ON; /* External 8 MHz xtal on OSC_IN/OSC_OUT */
|
||||||
RCC_OscInitStruct.PLL.PLLN = 360; // VCO output clock = 360 MHz (1 MHz * 360)
|
} else {
|
||||||
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // PLLCLK = 180 MHz (360 MHz / 2)
|
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; /* External 8 MHz clock on OSC_IN */
|
||||||
RCC_OscInitStruct.PLL.PLLQ = 7; //
|
}
|
||||||
RCC_OscInitStruct.PLL.PLLR = 2; //
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
|
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||||
return 0; // FAIL
|
RCC_OscInitStruct.PLL.PLLM = 8; // VCO input clock = 1 MHz (8 MHz / 8)
|
||||||
|
RCC_OscInitStruct.PLL.PLLN = 360; // VCO output clock = 360 MHz (1 MHz * 360)
|
||||||
|
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // PLLCLK = 180 MHz (360 MHz / 2)
|
||||||
|
RCC_OscInitStruct.PLL.PLLQ = 7; //
|
||||||
|
RCC_OscInitStruct.PLL.PLLR = 2; //
|
||||||
|
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
|
||||||
|
return 0; // FAIL
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
// Activate the OverDrive to reach the 180 MHz Frequency
|
// Activate the OverDrive to reach the 180 MHz Frequency
|
||||||
|
|
|
||||||
|
|
@ -1,61 +1,53 @@
|
||||||
#! armcc -E
|
#! armcc -E
|
||||||
; Scatter-Loading Description File
|
; Scatter-Loading Description File
|
||||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|
||||||
; Copyright (c) 2015, STMicroelectronics
|
|
||||||
; All rights reserved.
|
|
||||||
;
|
;
|
||||||
; Redistribution and use in source and binary forms, with or without
|
; SPDX-License-Identifier: BSD-3-Clause
|
||||||
; modification, are permitted provided that the following conditions are met:
|
;******************************************************************************
|
||||||
;
|
;* @attention
|
||||||
; 1. Redistributions of source code must retain the above copyright notice,
|
;*
|
||||||
; this list of conditions and the following disclaimer.
|
;* Copyright (c) 2016-2020 STMicroelectronics.
|
||||||
; 2. Redistributions in binary form must reproduce the above copyright notice,
|
;* All rights reserved.
|
||||||
; this list of conditions and the following disclaimer in the documentation
|
;*
|
||||||
; and/or other materials provided with the distribution.
|
;* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
; 3. Neither the name of STMicroelectronics nor the names of its contributors
|
;* the "License"; You may not use this file except in compliance with the
|
||||||
; may be used to endorse or promote products derived from this software
|
;* License. You may obtain a copy of the License at:
|
||||||
; without specific prior written permission.
|
;* opensource.org/licenses/BSD-3-Clause
|
||||||
;
|
;*
|
||||||
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
;******************************************************************************
|
||||||
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
#include "../cmsis_nvic.h"
|
||||||
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
|
||||||
; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
||||||
; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
|
||||||
; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
||||||
; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
|
||||||
; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
|
||||||
|
|
||||||
#if !defined(MBED_APP_START)
|
#if !defined(MBED_APP_START)
|
||||||
#define MBED_APP_START 0x08000000
|
#define MBED_APP_START MBED_ROM_START
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if !defined(MBED_APP_SIZE)
|
#if !defined(MBED_APP_SIZE)
|
||||||
#define MBED_APP_SIZE 0x200000
|
#define MBED_APP_SIZE MBED_ROM_SIZE
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||||
#define MBED_BOOT_STACK_SIZE 0x400
|
/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
|
||||||
|
#define MBED_BOOT_STACK_SIZE 0x400
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#define Stack_Size MBED_BOOT_STACK_SIZE
|
/* Round up VECTORS_SIZE to 8 bytes */
|
||||||
|
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
|
||||||
|
|
||||||
; 2 MB FLASH (0x200000) + 320 KB SRAM (0x50000)
|
LR_IROM1 MBED_APP_START MBED_APP_SIZE {
|
||||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
|
||||||
|
|
||||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
ER_IROM1 MBED_APP_START MBED_APP_SIZE {
|
||||||
*.o (RESET, +First)
|
*.o (RESET, +First)
|
||||||
*(InRoot$$Sections)
|
*(InRoot$$Sections)
|
||||||
.ANY (+RO)
|
.ANY (+RO)
|
||||||
}
|
}
|
||||||
|
|
||||||
; Total: 109 vectors = 436 bytes (0x1B4) 8-byte aligned = 0x1B8 (0x1B4 + 0x4) to be reserved in RAM
|
RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data
|
||||||
RW_IRAM1 (0x20000000+0x1B8) (0x50000-0x1B8-Stack_Size) { ; RW data
|
.ANY (+RW +ZI)
|
||||||
.ANY (+RW +ZI)
|
|
||||||
}
|
}
|
||||||
|
|
||||||
ARM_LIB_STACK (0x20000000+0x50000) EMPTY -Stack_Size { ; stack
|
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
|
||||||
|
}
|
||||||
|
|
||||||
|
ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; Stack region growing down
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -1,30 +1,51 @@
|
||||||
/* Linker script to configure memory regions. */
|
/* Linker script to configure memory regions. */
|
||||||
/* 0x1B4 resevered for vectors; 8-byte aligned = 0x1B8 (0x1B4 + 0x4)*/
|
/*
|
||||||
|
* SPDX-License-Identifier: BSD-3-Clause
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2016-2020 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
|
* the "License"; You may not use this file except in compliance with the
|
||||||
|
* License. You may obtain a copy of the License at:
|
||||||
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "../cmsis_nvic.h"
|
||||||
|
|
||||||
|
|
||||||
#if !defined(MBED_APP_START)
|
#if !defined(MBED_APP_START)
|
||||||
#define MBED_APP_START 0x08000000
|
#define MBED_APP_START MBED_ROM_START
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if !defined(MBED_APP_SIZE)
|
#if !defined(MBED_APP_SIZE)
|
||||||
#define MBED_APP_SIZE 2M
|
#define MBED_APP_SIZE MBED_ROM_SIZE
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||||
#define MBED_BOOT_STACK_SIZE 0x400
|
/* This value is normally defined by the tools
|
||||||
|
to 0x1000 for bare metal and 0x400 for RTOS */
|
||||||
|
#define MBED_BOOT_STACK_SIZE 0x400
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
STACK_SIZE = MBED_BOOT_STACK_SIZE;
|
/* Round up VECTORS_SIZE to 8 bytes */
|
||||||
|
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
|
||||||
|
|
||||||
MEMORY
|
MEMORY
|
||||||
{
|
{
|
||||||
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
|
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
|
||||||
RAM (rwx) : ORIGIN = 0x200001B8, LENGTH = 320k - (0x1B4+0x4)
|
RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE - VECTORS_SIZE
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Linker script to place sections and symbol values. Should be used together
|
/* Linker script to place sections and symbol values. Should be used together
|
||||||
* with other linker script that defines memory regions FLASH and RAM.
|
* with other linker script that defines memory regions FLASH and RAM.
|
||||||
* It references following symbols, which must be defined in code:
|
* It references following symbols, which must be defined in code:
|
||||||
* Reset_Handler : Entry of reset handler
|
* Reset_Handler : Entry of reset handler
|
||||||
*
|
*
|
||||||
* It defines following symbols, which code can use without definition:
|
* It defines following symbols, which code can use without definition:
|
||||||
* __exidx_start
|
* __exidx_start
|
||||||
* __exidx_end
|
* __exidx_end
|
||||||
|
|
@ -55,6 +76,7 @@ SECTIONS
|
||||||
{
|
{
|
||||||
KEEP(*(.isr_vector))
|
KEEP(*(.isr_vector))
|
||||||
*(.text*)
|
*(.text*)
|
||||||
|
|
||||||
KEEP(*(.init))
|
KEEP(*(.init))
|
||||||
KEEP(*(.fini))
|
KEEP(*(.fini))
|
||||||
|
|
||||||
|
|
@ -91,7 +113,7 @@ SECTIONS
|
||||||
|
|
||||||
__etext = .;
|
__etext = .;
|
||||||
_sidata = .;
|
_sidata = .;
|
||||||
|
|
||||||
.data : AT (__etext)
|
.data : AT (__etext)
|
||||||
{
|
{
|
||||||
__data_start__ = .;
|
__data_start__ = .;
|
||||||
|
|
@ -112,7 +134,6 @@ SECTIONS
|
||||||
KEEP(*(.init_array))
|
KEEP(*(.init_array))
|
||||||
PROVIDE_HIDDEN (__init_array_end = .);
|
PROVIDE_HIDDEN (__init_array_end = .);
|
||||||
|
|
||||||
|
|
||||||
. = ALIGN(8);
|
. = ALIGN(8);
|
||||||
/* finit data */
|
/* finit data */
|
||||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||||
|
|
@ -128,6 +149,19 @@ SECTIONS
|
||||||
|
|
||||||
} > RAM
|
} > RAM
|
||||||
|
|
||||||
|
/* Uninitialized data section
|
||||||
|
* This region is not initialized by the C/C++ library and can be used to
|
||||||
|
* store state across soft reboots. */
|
||||||
|
.uninitialized (NOLOAD):
|
||||||
|
{
|
||||||
|
. = ALIGN(32);
|
||||||
|
__uninitialized_start = .;
|
||||||
|
*(.uninitialized)
|
||||||
|
KEEP(*(.keep.uninitialized))
|
||||||
|
. = ALIGN(32);
|
||||||
|
__uninitialized_end = .;
|
||||||
|
} > RAM
|
||||||
|
|
||||||
.bss :
|
.bss :
|
||||||
{
|
{
|
||||||
. = ALIGN(8);
|
. = ALIGN(8);
|
||||||
|
|
@ -143,9 +177,9 @@ SECTIONS
|
||||||
.heap (COPY):
|
.heap (COPY):
|
||||||
{
|
{
|
||||||
__end__ = .;
|
__end__ = .;
|
||||||
end = __end__;
|
PROVIDE(end = .);
|
||||||
*(.heap*)
|
*(.heap*)
|
||||||
. = ORIGIN(RAM) + LENGTH(RAM) - STACK_SIZE;
|
. = ORIGIN(RAM) + LENGTH(RAM) - MBED_BOOT_STACK_SIZE;
|
||||||
__HeapLimit = .;
|
__HeapLimit = .;
|
||||||
} > RAM
|
} > RAM
|
||||||
|
|
||||||
|
|
@ -161,7 +195,7 @@ SECTIONS
|
||||||
* size of stack_dummy section */
|
* size of stack_dummy section */
|
||||||
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
|
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
|
||||||
_estack = __StackTop;
|
_estack = __StackTop;
|
||||||
__StackLimit = __StackTop - STACK_SIZE;
|
__StackLimit = __StackTop - MBED_BOOT_STACK_SIZE;
|
||||||
PROVIDE(__stack = __StackTop);
|
PROVIDE(__stack = __StackTop);
|
||||||
|
|
||||||
/* Check if data + heap + stack exceeds RAM limit */
|
/* Check if data + heap + stack exceeds RAM limit */
|
||||||
|
|
|
||||||
|
|
@ -1,36 +1,59 @@
|
||||||
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
|
/* Linker script to configure memory regions.
|
||||||
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x200000; }
|
*
|
||||||
|
* SPDX-License-Identifier: BSD-3-Clause
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2016-2020 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
|
* the "License"; You may not use this file except in compliance with the
|
||||||
|
* License. You may obtain a copy of the License at:
|
||||||
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* Device specific values */
|
||||||
|
|
||||||
/* [ROM = 2mb = 0x200000] */
|
/* Tools provide -DMBED_ROM_START=xxx -DMBED_ROM_SIZE=xxx -DMBED_RAM_START=xxx -DMBED_RAM_SIZE=xxx */
|
||||||
define symbol __intvec_start__ = MBED_APP_START;
|
|
||||||
define symbol __region_ROM_start__ = MBED_APP_START;
|
|
||||||
define symbol __region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
|
|
||||||
|
|
||||||
/* [RAM = 384kb = 0x60000] Vector table dynamic copy: 109 vectors * 4 = 436 bytes (0x1B4) to be reserved in RAM */
|
define symbol VECTORS = 109; /* This value must match NVIC_NUM_VECTORS in cmsis_nvic.h */
|
||||||
define symbol __NVIC_start__ = 0x20000000;
|
define symbol HEAP_SIZE = 0x10000;
|
||||||
define symbol __NVIC_end__ = 0x200001B7; /* Add 4 more bytes to be aligned on 8 bytes */
|
|
||||||
define symbol __region_RAM_start__ = 0x200001B8;
|
|
||||||
define symbol __region_RAM_end__ = 0x2004FFFF;
|
|
||||||
|
|
||||||
/* Memory regions */
|
/* Common - Do not change */
|
||||||
define memory mem with size = 4G;
|
|
||||||
define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
|
if (!isdefinedsymbol(MBED_APP_START)) {
|
||||||
define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__];
|
define symbol MBED_APP_START = MBED_ROM_START;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (!isdefinedsymbol(MBED_APP_SIZE)) {
|
||||||
|
define symbol MBED_APP_SIZE = MBED_ROM_SIZE;
|
||||||
|
}
|
||||||
|
|
||||||
/* Stack and Heap */
|
|
||||||
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
|
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
|
||||||
|
/* This value is normally defined by the tools
|
||||||
|
to 0x1000 for bare metal and 0x400 for RTOS */
|
||||||
define symbol MBED_BOOT_STACK_SIZE = 0x400;
|
define symbol MBED_BOOT_STACK_SIZE = 0x400;
|
||||||
}
|
}
|
||||||
define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
|
|
||||||
define symbol __size_heap__ = 0x10000;
|
|
||||||
define block CSTACK with alignment = 8, size = __size_cstack__ { };
|
|
||||||
define block HEAP with alignment = 8, size = __size_heap__ { };
|
|
||||||
define block STACKHEAP with fixed order { block HEAP, block CSTACK };
|
|
||||||
|
|
||||||
initialize by copy with packing = zeros { readwrite };
|
/* Round up VECTORS_SIZE to 8 bytes */
|
||||||
|
define symbol VECTORS_SIZE = ((VECTORS * 4) + 7) & ~7;
|
||||||
|
define symbol RAM_REGION_START = MBED_RAM_START + VECTORS_SIZE;
|
||||||
|
define symbol RAM_REGION_SIZE = MBED_RAM_SIZE - VECTORS_SIZE;
|
||||||
|
|
||||||
|
define memory mem with size = 4G;
|
||||||
|
define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE];
|
||||||
|
define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE];
|
||||||
|
|
||||||
|
define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { };
|
||||||
|
define block HEAP with alignment = 8, size = HEAP_SIZE { };
|
||||||
|
|
||||||
|
initialize by copy { readwrite };
|
||||||
do not initialize { section .noinit };
|
do not initialize { section .noinit };
|
||||||
|
|
||||||
place at address mem:__intvec_start__ { readonly section .intvec };
|
place at address mem: MBED_APP_START { readonly section .intvec };
|
||||||
|
|
||||||
place in ROM_region { readonly };
|
place in ROM_region { readonly };
|
||||||
place in RAM_region { readwrite, block STACKHEAP };
|
place in RAM_region { readwrite,
|
||||||
|
block CSTACK, block HEAP };
|
||||||
|
|
|
||||||
|
|
@ -1,41 +1,39 @@
|
||||||
/* mbed Microcontroller Library
|
/* mbed Microcontroller Library
|
||||||
*******************************************************************************
|
* SPDX-License-Identifier: BSD-3-Clause
|
||||||
* Copyright (c) 2014, STMicroelectronics
|
******************************************************************************
|
||||||
* All rights reserved.
|
* @attention
|
||||||
*
|
*
|
||||||
* Redistribution and use in source and binary forms, with or without
|
* <h2><center>© Copyright (c) 2016-2020 STMicroelectronics.
|
||||||
* modification, are permitted provided that the following conditions are met:
|
* All rights reserved.</center></h2>
|
||||||
*
|
*
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
* this list of conditions and the following disclaimer.
|
* the "License"; You may not use this file except in compliance with the
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
* License. You may obtain a copy of the License at:
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
*
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
******************************************************************************
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
*/
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
|
||||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
|
||||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
||||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
|
||||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
||||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
|
||||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*******************************************************************************
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef MBED_CMSIS_NVIC_H
|
#ifndef MBED_CMSIS_NVIC_H
|
||||||
#define MBED_CMSIS_NVIC_H
|
#define MBED_CMSIS_NVIC_H
|
||||||
|
|
||||||
// STM32F429ZI
|
#if !defined(MBED_ROM_START)
|
||||||
// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F
|
#define MBED_ROM_START 0x8000000
|
||||||
// MCU Peripherals: 93 vectors = 372 bytes from 0x40 to 0x1B3
|
#endif
|
||||||
// Total: 109 vectors = 436 bytes (0x1B4) to be reserved in RAM
|
|
||||||
|
#if !defined(MBED_ROM_SIZE)
|
||||||
|
#define MBED_ROM_SIZE 0x200000 // 2.0 MB
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(MBED_RAM_START)
|
||||||
|
#define MBED_RAM_START 0x20000000
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !defined(MBED_RAM_SIZE)
|
||||||
|
#define MBED_RAM_SIZE 0x50000 // 320 KB
|
||||||
|
#endif
|
||||||
|
|
||||||
#define NVIC_NUM_VECTORS 109
|
#define NVIC_NUM_VECTORS 109
|
||||||
#define NVIC_RAM_VECTOR_ADDRESS 0x20000000 // Vectors positioned at start of RAM
|
#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue