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Nuvoton: Fix failure to change WDT clock source 

WDT clock source selection and its enablement bits are protected. Add unlock sequence before write to them.
pull/12970/head
Chun-Chieh Li 2020-05-05 11:22:11 +08:00
parent 2162aaaea3
commit 572bae3ad6
4 changed files with 16 additions and 0 deletions
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4
targets/TARGET_NUVOTON/TARGET_M451/watchdog_api.c
View File

@ -99,6 +99,8 @@ watchdog_status_t hal_watchdog_init(const watchdog_config_t *config)
if (! wdt_hw_inited) {
wdt_hw_inited = 1;
SYS_UnlockReg();
/* Enable IP module clock */
CLK_EnableModuleClock(WDT_MODULE);
@ -109,6 +111,8 @@ watchdog_status_t hal_watchdog_init(const watchdog_config_t *config)
CLK_SetModuleClock(WDT_MODULE, CLK_CLKSEL1_WDTSEL_LIRC, 0);
#endif
SYS_LockReg();
/* Set up IP interrupt */
NVIC_SetVector(WDT_IRQn, (uint32_t) WDT_IRQHandler);
NVIC_EnableIRQ(WDT_IRQn);

4
targets/TARGET_NUVOTON/TARGET_M480/watchdog_api.c
View File

@ -98,6 +98,8 @@ watchdog_status_t hal_watchdog_init(const watchdog_config_t *config)
if (! wdt_hw_inited) {
wdt_hw_inited = 1;
SYS_UnlockReg();
/* Enable IP module clock */
CLK_EnableModuleClock(WDT_MODULE);
@ -108,6 +110,8 @@ watchdog_status_t hal_watchdog_init(const watchdog_config_t *config)
CLK_SetModuleClock(WDT_MODULE, CLK_CLKSEL1_WDTSEL_LIRC, 0);
#endif
SYS_LockReg();
/* Set up IP interrupt */
NVIC_SetVector(WDT_IRQn, (uint32_t) WDT_IRQHandler);
NVIC_EnableIRQ(WDT_IRQn);

4
targets/TARGET_NUVOTON/TARGET_NANO100/watchdog_api.c
View File

@ -101,12 +101,16 @@ watchdog_status_t hal_watchdog_init(const watchdog_config_t *config)
if (! wdt_hw_inited) {
wdt_hw_inited = 1;
SYS_UnlockReg();
/* Enable IP module clock */
CLK_EnableModuleClock(WDT_MODULE);
/* Select IP clock source */
CLK_SetModuleClock(WDT_MODULE, 0, 0);
SYS_LockReg();
/* Set up IP interrupt */
NVIC_SetVector(WDT_IRQn, (uint32_t) WDT_IRQHandler);
NVIC_EnableIRQ(WDT_IRQn);

4
targets/TARGET_NUVOTON/TARGET_NUC472/watchdog_api.c
View File

@ -98,6 +98,8 @@ watchdog_status_t hal_watchdog_init(const watchdog_config_t *config)
if (! wdt_hw_inited) {
wdt_hw_inited = 1;
SYS_UnlockReg();
/* Enable IP module clock */
CLK_EnableModuleClock(WDT_MODULE);
@ -108,6 +110,8 @@ watchdog_status_t hal_watchdog_init(const watchdog_config_t *config)
CLK_SetModuleClock(WDT_MODULE, CLK_CLKSEL1_WDTSEL_LIRC, 0);
#endif
SYS_LockReg();
/* Set up IP interrupt */
NVIC_SetVector(WDT_IRQn, (uint32_t) WDT_IRQHandler);
NVIC_EnableIRQ(WDT_IRQn);