mirror of https://github.com/ARMmbed/mbed-os.git
Nuvoton: Fix failure to change WDT clock source
WDT clock source selection and its enablement bits are protected. Add unlock sequence before write to them.pull/12970/head
parent
2162aaaea3
commit
572bae3ad6
|
@ -99,6 +99,8 @@ watchdog_status_t hal_watchdog_init(const watchdog_config_t *config)
|
||||||
if (! wdt_hw_inited) {
|
if (! wdt_hw_inited) {
|
||||||
wdt_hw_inited = 1;
|
wdt_hw_inited = 1;
|
||||||
|
|
||||||
|
SYS_UnlockReg();
|
||||||
|
|
||||||
/* Enable IP module clock */
|
/* Enable IP module clock */
|
||||||
CLK_EnableModuleClock(WDT_MODULE);
|
CLK_EnableModuleClock(WDT_MODULE);
|
||||||
|
|
||||||
|
@ -109,6 +111,8 @@ watchdog_status_t hal_watchdog_init(const watchdog_config_t *config)
|
||||||
CLK_SetModuleClock(WDT_MODULE, CLK_CLKSEL1_WDTSEL_LIRC, 0);
|
CLK_SetModuleClock(WDT_MODULE, CLK_CLKSEL1_WDTSEL_LIRC, 0);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
SYS_LockReg();
|
||||||
|
|
||||||
/* Set up IP interrupt */
|
/* Set up IP interrupt */
|
||||||
NVIC_SetVector(WDT_IRQn, (uint32_t) WDT_IRQHandler);
|
NVIC_SetVector(WDT_IRQn, (uint32_t) WDT_IRQHandler);
|
||||||
NVIC_EnableIRQ(WDT_IRQn);
|
NVIC_EnableIRQ(WDT_IRQn);
|
||||||
|
|
|
@ -98,6 +98,8 @@ watchdog_status_t hal_watchdog_init(const watchdog_config_t *config)
|
||||||
if (! wdt_hw_inited) {
|
if (! wdt_hw_inited) {
|
||||||
wdt_hw_inited = 1;
|
wdt_hw_inited = 1;
|
||||||
|
|
||||||
|
SYS_UnlockReg();
|
||||||
|
|
||||||
/* Enable IP module clock */
|
/* Enable IP module clock */
|
||||||
CLK_EnableModuleClock(WDT_MODULE);
|
CLK_EnableModuleClock(WDT_MODULE);
|
||||||
|
|
||||||
|
@ -108,6 +110,8 @@ watchdog_status_t hal_watchdog_init(const watchdog_config_t *config)
|
||||||
CLK_SetModuleClock(WDT_MODULE, CLK_CLKSEL1_WDTSEL_LIRC, 0);
|
CLK_SetModuleClock(WDT_MODULE, CLK_CLKSEL1_WDTSEL_LIRC, 0);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
SYS_LockReg();
|
||||||
|
|
||||||
/* Set up IP interrupt */
|
/* Set up IP interrupt */
|
||||||
NVIC_SetVector(WDT_IRQn, (uint32_t) WDT_IRQHandler);
|
NVIC_SetVector(WDT_IRQn, (uint32_t) WDT_IRQHandler);
|
||||||
NVIC_EnableIRQ(WDT_IRQn);
|
NVIC_EnableIRQ(WDT_IRQn);
|
||||||
|
|
|
@ -101,12 +101,16 @@ watchdog_status_t hal_watchdog_init(const watchdog_config_t *config)
|
||||||
if (! wdt_hw_inited) {
|
if (! wdt_hw_inited) {
|
||||||
wdt_hw_inited = 1;
|
wdt_hw_inited = 1;
|
||||||
|
|
||||||
|
SYS_UnlockReg();
|
||||||
|
|
||||||
/* Enable IP module clock */
|
/* Enable IP module clock */
|
||||||
CLK_EnableModuleClock(WDT_MODULE);
|
CLK_EnableModuleClock(WDT_MODULE);
|
||||||
|
|
||||||
/* Select IP clock source */
|
/* Select IP clock source */
|
||||||
CLK_SetModuleClock(WDT_MODULE, 0, 0);
|
CLK_SetModuleClock(WDT_MODULE, 0, 0);
|
||||||
|
|
||||||
|
SYS_LockReg();
|
||||||
|
|
||||||
/* Set up IP interrupt */
|
/* Set up IP interrupt */
|
||||||
NVIC_SetVector(WDT_IRQn, (uint32_t) WDT_IRQHandler);
|
NVIC_SetVector(WDT_IRQn, (uint32_t) WDT_IRQHandler);
|
||||||
NVIC_EnableIRQ(WDT_IRQn);
|
NVIC_EnableIRQ(WDT_IRQn);
|
||||||
|
|
|
@ -98,6 +98,8 @@ watchdog_status_t hal_watchdog_init(const watchdog_config_t *config)
|
||||||
if (! wdt_hw_inited) {
|
if (! wdt_hw_inited) {
|
||||||
wdt_hw_inited = 1;
|
wdt_hw_inited = 1;
|
||||||
|
|
||||||
|
SYS_UnlockReg();
|
||||||
|
|
||||||
/* Enable IP module clock */
|
/* Enable IP module clock */
|
||||||
CLK_EnableModuleClock(WDT_MODULE);
|
CLK_EnableModuleClock(WDT_MODULE);
|
||||||
|
|
||||||
|
@ -108,6 +110,8 @@ watchdog_status_t hal_watchdog_init(const watchdog_config_t *config)
|
||||||
CLK_SetModuleClock(WDT_MODULE, CLK_CLKSEL1_WDTSEL_LIRC, 0);
|
CLK_SetModuleClock(WDT_MODULE, CLK_CLKSEL1_WDTSEL_LIRC, 0);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
SYS_LockReg();
|
||||||
|
|
||||||
/* Set up IP interrupt */
|
/* Set up IP interrupt */
|
||||||
NVIC_SetVector(WDT_IRQn, (uint32_t) WDT_IRQHandler);
|
NVIC_SetVector(WDT_IRQn, (uint32_t) WDT_IRQHandler);
|
||||||
NVIC_EnableIRQ(WDT_IRQn);
|
NVIC_EnableIRQ(WDT_IRQn);
|
||||||
|
|
Loading…
Reference in New Issue