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STM32F3: update to match mbed

pull/13874/head
jeromecoutant 2020-11-05 17:59:43 +01:00
parent 084b873173
commit 56a7afdf66
22 changed files with 106 additions and 36 deletions
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6
targets/TARGET_STM/TARGET_STM32F3/PeripheralNames.h
View File

@ -38,7 +38,9 @@ extern "C" {
typedef enum {
ADC_1 = (int)ADC1_BASE,
#if defined ADC2_BASE
ADC_2 = (int)ADC2_BASE,
#endif
#if defined ADC3_BASE
ADC_3 = (int)ADC3_BASE,
#endif
@ -68,7 +70,9 @@ typedef enum {
#define DEVICE_SPI_COUNT 4
typedef enum {
#if defined SPI1_BASE
SPI_1 = (int)SPI1_BASE,
#endif
#if defined SPI2_BASE
SPI_2 = (int)SPI2_BASE,
#endif
@ -93,7 +97,9 @@ typedef enum {
typedef enum {
PWM_1 = (int)TIM1_BASE,
PWM_2 = (int)TIM2_BASE,
#if defined TIM3_BASE
PWM_3 = (int)TIM3_BASE,
#endif
#if defined TIM4_BASE
PWM_4 = (int)TIM4_BASE,
#endif

2
targets/TARGET_STM/TARGET_STM32F3/STM32Cube_FW/CMSIS/stm32f301x8.h
View File

@ -49,7 +49,9 @@
#define __MPU_PRESENT 0U /*!< STM32F301x8 devices do not provide an MPU */
#define __NVIC_PRIO_BITS 4U /*!< STM32F301x8 devices use 4 Bits for the Priority Levels */
#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */
#ifndef __FPU_PRESENT
#define __FPU_PRESENT 1U /*!< STM32F301x8 devices provide an FPU */
#endif
/**
* @}

7
targets/TARGET_STM/TARGET_STM32F3/STM32Cube_FW/CMSIS/stm32f302x8.h
View File

@ -49,8 +49,9 @@
#define __MPU_PRESENT 0U /*!< STM32F302x8 devices do not provide an MPU */
#define __NVIC_PRIO_BITS 4U /*!< STM32F302x8 devices use 4 Bits for the Priority Levels */
#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */
#ifndef __FPU_PRESENT
#define __FPU_PRESENT 1U /*!< STM32F302x8 devices provide an FPU */
#endif
/**
* @}
*/
@ -780,7 +781,7 @@ typedef struct
#define I2C1 ((I2C_TypeDef *) I2C1_BASE)
#define I2C2 ((I2C_TypeDef *) I2C2_BASE)
#define I2C3 ((I2C_TypeDef *) I2C3_BASE)
#define CAN ((CAN_TypeDef *) CAN_BASE)
#define CAN1 ((CAN_TypeDef *) CAN_BASE)
#define PWR ((PWR_TypeDef *) PWR_BASE)
#define DAC ((DAC_TypeDef *) DAC_BASE)
#define DAC1 ((DAC_TypeDef *) DAC1_BASE)
@ -11944,7 +11945,7 @@ typedef struct
#define IS_ADC_COMMON_INSTANCE(INSTANCE) ((INSTANCE) == ADC1_COMMON)
/****************************** CAN Instances *********************************/
#define IS_CAN_ALL_INSTANCE(INSTANCE) ((INSTANCE) == CAN)
#define IS_CAN_ALL_INSTANCE(INSTANCE) ((INSTANCE) == CAN1)
/****************************** COMP Instances ********************************/
#define IS_COMP_ALL_INSTANCE(INSTANCE) (((INSTANCE) == COMP2) || \

6
targets/TARGET_STM/TARGET_STM32F3/STM32Cube_FW/CMSIS/stm32f302xc.h
View File

@ -49,7 +49,9 @@
#define __MPU_PRESENT 1U /*!< STM32F302xC devices provide an MPU */
#define __NVIC_PRIO_BITS 4U /*!< STM32F302xC devices use 4 Bits for the Priority Levels */
#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */
#ifndef __FPU_PRESENT
#define __FPU_PRESENT 1U /*!< STM32F302xC devices provide an FPU */
#endif
/**
* @}
@ -801,7 +803,7 @@ typedef struct
#define UART5 ((USART_TypeDef *) UART5_BASE)
#define I2C1 ((I2C_TypeDef *) I2C1_BASE)
#define I2C2 ((I2C_TypeDef *) I2C2_BASE)
#define CAN ((CAN_TypeDef *) CAN_BASE)
#define CAN1 ((CAN_TypeDef *) CAN_BASE)
#define PWR ((PWR_TypeDef *) PWR_BASE)
#define DAC ((DAC_TypeDef *) DAC_BASE)
#define DAC1 ((DAC_TypeDef *) DAC1_BASE)
@ -12206,7 +12208,7 @@ typedef struct
#define IS_ADC_COMMON_INSTANCE(INSTANCE) ((INSTANCE) == ADC12_COMMON)
/****************************** CAN Instances *********************************/
#define IS_CAN_ALL_INSTANCE(INSTANCE) ((INSTANCE) == CAN)
#define IS_CAN_ALL_INSTANCE(INSTANCE) ((INSTANCE) == CAN1)
/****************************** COMP Instances ********************************/
#define IS_COMP_ALL_INSTANCE(INSTANCE) (((INSTANCE) == COMP1) || \

6
targets/TARGET_STM/TARGET_STM32F3/STM32Cube_FW/CMSIS/stm32f302xe.h
View File

@ -49,7 +49,9 @@
#define __MPU_PRESENT 1U /*!< STM32F302xE devices provide an MPU */
#define __NVIC_PRIO_BITS 4U /*!< STM32F302xE devices use 4 Bits for the Priority Levels */
#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */
#ifndef __FPU_PRESENT
#define __FPU_PRESENT 1U /*!< STM32F302xE devices provide an FPU */
#endif
/**
* @}
@ -885,7 +887,7 @@ typedef struct
#define I2C1 ((I2C_TypeDef *) I2C1_BASE)
#define I2C2 ((I2C_TypeDef *) I2C2_BASE)
#define I2C3 ((I2C_TypeDef *) I2C3_BASE)
#define CAN ((CAN_TypeDef *) CAN_BASE)
#define CAN1 ((CAN_TypeDef *) CAN_BASE)
#define PWR ((PWR_TypeDef *) PWR_BASE)
#define DAC ((DAC_TypeDef *) DAC_BASE)
#define DAC1 ((DAC_TypeDef *) DAC1_BASE)
@ -13936,7 +13938,7 @@ typedef struct
#define IS_ADC_COMMON_INSTANCE(INSTANCE) ((INSTANCE) == ADC12_COMMON)
/****************************** CAN Instances *********************************/
#define IS_CAN_ALL_INSTANCE(INSTANCE) ((INSTANCE) == CAN)
#define IS_CAN_ALL_INSTANCE(INSTANCE) ((INSTANCE) == CAN1)
/****************************** COMP Instances ********************************/
#define IS_COMP_ALL_INSTANCE(INSTANCE) (((INSTANCE) == COMP1) || \

4
targets/TARGET_STM/TARGET_STM32F3/STM32Cube_FW/CMSIS/stm32f303x8.h
View File

@ -729,7 +729,7 @@ typedef struct
#define USART2 ((USART_TypeDef *) USART2_BASE)
#define USART3 ((USART_TypeDef *) USART3_BASE)
#define I2C1 ((I2C_TypeDef *) I2C1_BASE)
#define CAN ((CAN_TypeDef *) CAN_BASE)
#define CAN1 ((CAN_TypeDef *) CAN_BASE)
#define PWR ((PWR_TypeDef *) PWR_BASE)
#define DAC ((DAC_TypeDef *) DAC_BASE)
#define DAC1 ((DAC_TypeDef *) DAC1_BASE)
@ -11681,7 +11681,7 @@ typedef struct
#define IS_ADC_COMMON_INSTANCE(INSTANCE) ((INSTANCE) == ADC12_COMMON)
/****************************** CAN Instances *********************************/
#define IS_CAN_ALL_INSTANCE(INSTANCE) ((INSTANCE) == CAN)
#define IS_CAN_ALL_INSTANCE(INSTANCE) ((INSTANCE) == CAN1)
/****************************** COMP Instances ********************************/
#define IS_COMP_ALL_INSTANCE(INSTANCE) (((INSTANCE) == COMP2) || \

6
targets/TARGET_STM/TARGET_STM32F3/STM32Cube_FW/CMSIS/stm32f303xc.h
View File

@ -49,7 +49,9 @@
#define __MPU_PRESENT 1U /*!< STM32F303xC devices provide an MPU */
#define __NVIC_PRIO_BITS 4U /*!< STM32F303xC devices use 4 Bits for the Priority Levels */
#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */
#ifndef __FPU_PRESENT
#define __FPU_PRESENT 1U /*!< STM32F303xC devices provide an FPU */
#endif
/**
* @}
@ -821,7 +823,7 @@ typedef struct
#define UART5 ((USART_TypeDef *) UART5_BASE)
#define I2C1 ((I2C_TypeDef *) I2C1_BASE)
#define I2C2 ((I2C_TypeDef *) I2C2_BASE)
#define CAN ((CAN_TypeDef *) CAN_BASE)
#define CAN1 ((CAN_TypeDef *) CAN_BASE)
#define PWR ((PWR_TypeDef *) PWR_BASE)
#define DAC ((DAC_TypeDef *) DAC_BASE)
#define DAC1 ((DAC_TypeDef *) DAC1_BASE)
@ -12887,7 +12889,7 @@ typedef struct
((INSTANCE) == ADC34_COMMON))
/****************************** CAN Instances *********************************/
#define IS_CAN_ALL_INSTANCE(INSTANCE) ((INSTANCE) == CAN)
#define IS_CAN_ALL_INSTANCE(INSTANCE) ((INSTANCE) == CAN1)
/****************************** COMP Instances ********************************/
#define IS_COMP_ALL_INSTANCE(INSTANCE) (((INSTANCE) == COMP1) || \

4
targets/TARGET_STM/TARGET_STM32F3/STM32Cube_FW/CMSIS/stm32f303xe.h
View File

@ -925,7 +925,7 @@ typedef struct
#define I2C1 ((I2C_TypeDef *) I2C1_BASE)
#define I2C2 ((I2C_TypeDef *) I2C2_BASE)
#define I2C3 ((I2C_TypeDef *) I2C3_BASE)
#define CAN ((CAN_TypeDef *) CAN_BASE)
#define CAN1 ((CAN_TypeDef *) CAN_BASE)
#define PWR ((PWR_TypeDef *) PWR_BASE)
#define DAC ((DAC_TypeDef *) DAC_BASE)
#define DAC1 ((DAC_TypeDef *) DAC1_BASE)
@ -14683,7 +14683,7 @@ typedef struct
((INSTANCE) == ADC34_COMMON))
/****************************** CAN Instances *********************************/
#define IS_CAN_ALL_INSTANCE(INSTANCE) ((INSTANCE) == CAN)
#define IS_CAN_ALL_INSTANCE(INSTANCE) ((INSTANCE) == CAN1)
/****************************** COMP Instances ********************************/
#define IS_COMP_ALL_INSTANCE(INSTANCE) (((INSTANCE) == COMP1) || \

2
targets/TARGET_STM/TARGET_STM32F3/STM32Cube_FW/CMSIS/stm32f318xx.h
View File

@ -49,7 +49,9 @@
#define __MPU_PRESENT 0U /*!< STM32F318xx devices do not provide an MPU */
#define __NVIC_PRIO_BITS 4U /*!< STM32F318xx devices use 4 Bits for the Priority Levels */
#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */
#ifndef __FPU_PRESENT
#define __FPU_PRESENT 1U /*!< STM32F318xx devices provide an FPU */
#endif
/**
* @}

6
targets/TARGET_STM/TARGET_STM32F3/STM32Cube_FW/CMSIS/stm32f328xx.h
View File

@ -49,7 +49,9 @@
#define __MPU_PRESENT 0U /*!< STM32F328xx devices do not provide an MPU */
#define __NVIC_PRIO_BITS 4U /*!< STM32F328xx devices use 4 Bits for the Priority Levels */
#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */
#ifndef __FPU_PRESENT
#define __FPU_PRESENT 1U /*!< STM32F328xx devices provide an FPU */
#endif
/**
* @}
@ -727,7 +729,7 @@ typedef struct
#define USART2 ((USART_TypeDef *) USART2_BASE)
#define USART3 ((USART_TypeDef *) USART3_BASE)
#define I2C1 ((I2C_TypeDef *) I2C1_BASE)
#define CAN ((CAN_TypeDef *) CAN_BASE)
#define CAN1 ((CAN_TypeDef *) CAN_BASE)
#define PWR ((PWR_TypeDef *) PWR_BASE)
#define DAC ((DAC_TypeDef *) DAC_BASE)
#define DAC1 ((DAC_TypeDef *) DAC1_BASE)
@ -11650,7 +11652,7 @@ typedef struct
#define IS_ADC_COMMON_INSTANCE(INSTANCE) ((INSTANCE) == ADC12_COMMON)
/****************************** CAN Instances *********************************/
#define IS_CAN_ALL_INSTANCE(INSTANCE) ((INSTANCE) == CAN)
#define IS_CAN_ALL_INSTANCE(INSTANCE) ((INSTANCE) == CAN1)
/****************************** COMP Instances ********************************/
#define IS_COMP_ALL_INSTANCE(INSTANCE) (((INSTANCE) == COMP2) || \

2
targets/TARGET_STM/TARGET_STM32F3/STM32Cube_FW/CMSIS/stm32f334x8.h
View File

@ -49,7 +49,9 @@
#define __MPU_PRESENT 0U /*!< STM32F334x8 devices do not provide an MPU */
#define __NVIC_PRIO_BITS 4U /*!< STM32F334x8 devices use 4 Bits for the Priority Levels */
#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */
#ifndef __FPU_PRESENT
#define __FPU_PRESENT 1U /*!< STM32F334x8 devices provide an FPU */
#endif
/**
* @}

6
targets/TARGET_STM/TARGET_STM32F3/STM32Cube_FW/CMSIS/stm32f358xx.h
View File

@ -49,7 +49,9 @@
#define __MPU_PRESENT 1U /*!< STM32F358xx devices provide an MPU */
#define __NVIC_PRIO_BITS 4U /*!< STM32F358xx devices use 4 Bits for the Priority Levels */
#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */
#ifndef __FPU_PRESENT
#define __FPU_PRESENT 1U /*!< STM32F358xx devices provide an FPU */
#endif
/**
* @}
@ -780,7 +782,7 @@ typedef struct
#define UART5 ((USART_TypeDef *) UART5_BASE)
#define I2C1 ((I2C_TypeDef *) I2C1_BASE)
#define I2C2 ((I2C_TypeDef *) I2C2_BASE)
#define CAN ((CAN_TypeDef *) CAN_BASE)
#define CAN1 ((CAN_TypeDef *) CAN_BASE)
#define PWR ((PWR_TypeDef *) PWR_BASE)
#define DAC ((DAC_TypeDef *) DAC_BASE)
#define DAC1 ((DAC_TypeDef *) DAC1_BASE)
@ -12661,7 +12663,7 @@ typedef struct
((INSTANCE) == ADC34_COMMON))
/****************************** CAN Instances *********************************/
#define IS_CAN_ALL_INSTANCE(INSTANCE) ((INSTANCE) == CAN)
#define IS_CAN_ALL_INSTANCE(INSTANCE) ((INSTANCE) == CAN1)
/****************************** COMP Instances ********************************/
#define IS_COMP_ALL_INSTANCE(INSTANCE) (((INSTANCE) == COMP1) || \

6
targets/TARGET_STM/TARGET_STM32F3/STM32Cube_FW/CMSIS/stm32f373xc.h
View File

@ -49,7 +49,9 @@
#define __MPU_PRESENT 1U /*!< STM32F373xC devices provide an MPU */
#define __NVIC_PRIO_BITS 4U /*!< STM32F373xC devices use 4 Bits for the Priority Levels */
#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */
#ifndef __FPU_PRESENT
#define __FPU_PRESENT 1U /*!< STM32F373xC devices provide an FPU */
#endif
/**
* @}
@ -831,7 +833,7 @@ typedef struct
#define USART3 ((USART_TypeDef *) USART3_BASE)
#define I2C1 ((I2C_TypeDef *) I2C1_BASE)
#define I2C2 ((I2C_TypeDef *) I2C2_BASE)
#define CAN ((CAN_TypeDef *) CAN_BASE)
#define CAN1 ((CAN_TypeDef *) CAN_BASE)
#define PWR ((PWR_TypeDef *) PWR_BASE)
#define DAC ((DAC_TypeDef *) DAC_BASE)
#define DAC1 ((DAC_TypeDef *) DAC1_BASE)
@ -11465,7 +11467,7 @@ typedef struct
#define IS_ADC_COMMON_INSTANCE(INSTANCE) ((INSTANCE) == ADC1_COMMON)
/****************************** CAN Instances *********************************/
#define IS_CAN_ALL_INSTANCE(INSTANCE) ((INSTANCE) == CAN)
#define IS_CAN_ALL_INSTANCE(INSTANCE) ((INSTANCE) == CAN1)
/****************************** CEC Instances *********************************/
#define IS_CEC_ALL_INSTANCE(INSTANCE) ((INSTANCE) == CEC)

6
targets/TARGET_STM/TARGET_STM32F3/STM32Cube_FW/CMSIS/stm32f378xx.h
View File

@ -49,7 +49,9 @@
#define __MPU_PRESENT 1U /*!< STM32F378xx devices provide an MPU */
#define __NVIC_PRIO_BITS 4U /*!< STM32F378xx devices use 4 Bits for the Priority Levels */
#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */
#ifndef __FPU_PRESENT
#define __FPU_PRESENT 1U /*!< STM32F378xx devices provide an FPU */
#endif
/**
* @}
@ -791,7 +793,7 @@ typedef struct
#define USART3 ((USART_TypeDef *) USART3_BASE)
#define I2C1 ((I2C_TypeDef *) I2C1_BASE)
#define I2C2 ((I2C_TypeDef *) I2C2_BASE)
#define CAN ((CAN_TypeDef *) CAN_BASE)
#define CAN1 ((CAN_TypeDef *) CAN_BASE)
#define PWR ((PWR_TypeDef *) PWR_BASE)
#define DAC ((DAC_TypeDef *) DAC_BASE)
#define DAC1 ((DAC_TypeDef *) DAC1_BASE)
@ -11246,7 +11248,7 @@ typedef struct
#define IS_ADC_COMMON_INSTANCE(INSTANCE) ((INSTANCE) == ADC1_COMMON)
/****************************** CAN Instances *********************************/
#define IS_CAN_ALL_INSTANCE(INSTANCE) ((INSTANCE) == CAN)
#define IS_CAN_ALL_INSTANCE(INSTANCE) ((INSTANCE) == CAN1)
/****************************** CEC Instances *********************************/
#define IS_CEC_ALL_INSTANCE(INSTANCE) ((INSTANCE) == CEC)

6
targets/TARGET_STM/TARGET_STM32F3/STM32Cube_FW/CMSIS/stm32f398xx.h
View File

@ -49,7 +49,9 @@
#define __MPU_PRESENT 1U /*!< STM32F398xx devices provide an MPU */
#define __NVIC_PRIO_BITS 4U /*!< STM32F398xx devices use 4 Bits for the Priority Levels */
#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */
#ifndef __FPU_PRESENT
#define __FPU_PRESENT 1U /*!< STM32F398xx devices provide an FPU */
#endif
/**
* @}
@ -881,7 +883,7 @@ typedef struct
#define I2C1 ((I2C_TypeDef *) I2C1_BASE)
#define I2C2 ((I2C_TypeDef *) I2C2_BASE)
#define I2C3 ((I2C_TypeDef *) I2C3_BASE)
#define CAN ((CAN_TypeDef *) CAN_BASE)
#define CAN1 ((CAN_TypeDef *) CAN_BASE)
#define PWR ((PWR_TypeDef *) PWR_BASE)
#define DAC ((DAC_TypeDef *) DAC_BASE)
#define DAC1 ((DAC_TypeDef *) DAC1_BASE)
@ -14443,7 +14445,7 @@ typedef struct
((INSTANCE) == ADC34_COMMON))
/****************************** CAN Instances *********************************/
#define IS_CAN_ALL_INSTANCE(INSTANCE) ((INSTANCE) == CAN)
#define IS_CAN_ALL_INSTANCE(INSTANCE) ((INSTANCE) == CAN1)
/****************************** COMP Instances ********************************/
#define IS_COMP_ALL_INSTANCE(INSTANCE) (((INSTANCE) == COMP1) || \

2
targets/TARGET_STM/TARGET_STM32F3/STM32Cube_FW/STM32F3xx_HAL_Driver/Legacy/stm32_hal_legacy.h
View File

@ -1412,7 +1412,7 @@
#define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) (((cmd)==ENABLE)? HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus))
#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32G4)
#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F3) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32G4)
#define HAL_I2C_Master_Sequential_Transmit_IT HAL_I2C_Master_Seq_Transmit_IT
#define HAL_I2C_Master_Sequential_Receive_IT HAL_I2C_Master_Seq_Receive_IT
#define HAL_I2C_Slave_Sequential_Transmit_IT HAL_I2C_Slave_Seq_Transmit_IT

2
targets/TARGET_STM/TARGET_STM32F3/STM32Cube_FW/STM32F3xx_HAL_Driver/Legacy/stm32f3xx_hal_can_legacy.c
View File

@ -116,7 +116,7 @@
#error 'The HAL CAN driver cannot be used with its legacy, Please ensure to enable only one HAL CAN module at once in stm32f3xx_hal_conf.h file'
#endif /* HAL_CAN_MODULE_ENABLED */
#warning 'Legacy HAL CAN driver is enabled! It can be used with known limitations, refer to the release notes. However it is recommended to use rather the new HAL CAN driver'
// #warning 'Legacy HAL CAN driver is enabled! It can be used with known limitations, refer to the release notes. However it is recommended to use rather the new HAL CAN driver'
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/

4
targets/TARGET_STM/TARGET_STM32F3/STM32Cube_FW/STM32F3xx_HAL_Driver/stm32f3xx_hal_def.h
View File

@ -28,9 +28,9 @@
/* Includes ------------------------------------------------------------------*/
#include "stm32f3xx.h"
#if defined USE_LEGACY
// #if defined USE_LEGACY
#include "Legacy/stm32_hal_legacy.h"
#endif
// #endif
#include <stddef.h>
/* Exported types ------------------------------------------------------------*/

6
targets/TARGET_STM/TARGET_STM32F3/STM32Cube_FW/STM32F3xx_HAL_Driver/stm32f3xx_hal_iwdg.c
View File

@ -108,10 +108,8 @@
/** @defgroup IWDG_Private_Defines IWDG Private Defines
* @{
*/
/* Status register need 5 RC LSI divided by prescaler clock to be updated. With
higher prescaler (256), and according to LSI variation, we need to wait at
least 6 cycles so 48 ms. */
#define HAL_IWDG_DEFAULT_TIMEOUT 48u
/* MBED */
#define HAL_IWDG_DEFAULT_TIMEOUT 96u
/**
* @}
*/

3
targets/TARGET_STM/TARGET_STM32F3/objects.h
View File

@ -39,7 +39,8 @@
#include "stm32f3xx_ll_usart.h"
#include "stm32f3xx_ll_tim.h"
#include "stm32f3xx_ll_pwr.h"
#include "stm32f3xx_ll_adc.h"
#include "stm32f3xx_ll_rtc.h"
#ifdef __cplusplus
extern "C" {

8
targets/TARGET_STM/TARGET_STM32F3/serial_device.c
View File

@ -665,7 +665,7 @@ static void _serial_set_flow_control_direct(serial_t *obj, FlowControl type, con
}
if (type == FlowControlRTS) {
// Enable RTS
MBED_ASSERT(pinmap->rx_flow_pin != (UARTName)NC);
MBED_ASSERT(pinmap->rx_flow_pin != NC);
obj_s->hw_flow_ctl = UART_HWCONTROL_RTS;
obj_s->pin_rts = pinmap->rx_flow_pin;
// Enable the pin for RTS function
@ -674,7 +674,7 @@ static void _serial_set_flow_control_direct(serial_t *obj, FlowControl type, con
}
if (type == FlowControlCTS) {
// Enable CTS
MBED_ASSERT(pinmap->tx_flow_pin != (UARTName)NC);
MBED_ASSERT(pinmap->tx_flow_pin != NC);
obj_s->hw_flow_ctl = UART_HWCONTROL_CTS;
obj_s->pin_cts = pinmap->tx_flow_pin;
// Enable the pin for CTS function
@ -683,8 +683,8 @@ static void _serial_set_flow_control_direct(serial_t *obj, FlowControl type, con
}
if (type == FlowControlRTSCTS) {
// Enable CTS & RTS
MBED_ASSERT(pinmap->rx_flow_pin != (UARTName)NC);
MBED_ASSERT(pinmap->tx_flow_pin != (UARTName)NC);
MBED_ASSERT(pinmap->rx_flow_pin != NC);
MBED_ASSERT(pinmap->tx_flow_pin != NC);
obj_s->hw_flow_ctl = UART_HWCONTROL_RTS_CTS;
obj_s->pin_rts = pinmap->rx_flow_pin;;
obj_s->pin_cts = pinmap->tx_flow_pin;;

42
targets/targets.json
View File

@ -1418,6 +1418,19 @@
"LPTICKER"
]
},
"MCU_STM32F302x8": {
"inherits": [
"MCU_STM32F3"
],
"public": false,
"c_lib": "small",
"extra_labels_add": [
"STM32F302x8"
],
"macros_add": [
"STM32F302x8"
]
},
"MCU_STM32F303x8": {
"inherits": [
"MCU_STM32F3"
@ -1444,6 +1457,22 @@
],
"device_name": "STM32F303K8"
},
"MCU_STM32F303xC": {
"inherits": [
"MCU_STM32F3"
],
"public": false,
"c_lib": "small",
"extra_labels_add": [
"STM32F303xC"
],
"macros_add": [
"STM32F303xC"
],
"device_has_add": [
"MPU"
]
},
"MCU_STM32F303xE": {
"inherits": [
"MCU_STM32F3"
@ -1490,6 +1519,19 @@
],
"device_name": "STM32F303ZE"
},
"MCU_STM32F334x8": {
"inherits": [
"MCU_STM32F3"
],
"public": false,
"c_lib": "small",
"extra_labels_add": [
"STM32F334x8"
],
"macros_add": [
"STM32F334x8"
]
},
"MCU_STM32F4": {
"inherits": [
"MCU_STM32"