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TARGET_STM32F1 astyle

pull/7375/head
jeromecoutant 2018-06-27 14:31:04 +02:00 committed by adbridge
parent a4970221bf
commit 56975a54fe
11 changed files with 125 additions and 120 deletions
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4
targets/TARGET_STM/TARGET_STM32F1/TARGET_BLUEPILL_F103C8/PeripheralPins.c
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@ -172,12 +172,12 @@ const PinMap PinMap_SPI_SSEL[] = {
const PinMap PinMap_CAN_RD[] = { const PinMap PinMap_CAN_RD[] = {
{PA_11, CAN_1, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0)}, {PA_11, CAN_1, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0)},
{PB_8 , CAN_1, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 1)}, {PB_8, CAN_1, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 1)},
{NC, NC, 0} {NC, NC, 0}
}; };
const PinMap PinMap_CAN_TD[] = { const PinMap PinMap_CAN_TD[] = {
{PA_12, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, 0)}, {PA_12, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, 0)},
{PB_9 , CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, 1)}, {PB_9, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, 1)},
{NC, NC, 0} {NC, NC, 0}
}; };

4
targets/TARGET_STM/TARGET_STM32F1/TARGET_DISCO_F100RB/PinNames.h
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@ -174,13 +174,13 @@ typedef enum {
SPI_CS = PB_12, SPI_CS = PB_12,
PWM_OUT = PB_8, PWM_OUT = PB_8,
/**** OSCILLATOR pins ****/ /**** OSCILLATOR pins ****/
RCC_OSC32_IN = PC_14, RCC_OSC32_IN = PC_14,
RCC_OSC32_OUT = PC_15, RCC_OSC32_OUT = PC_15,
RCC_OSC_IN = PD_0, RCC_OSC_IN = PD_0,
RCC_OSC_OUT = PD_1, RCC_OSC_OUT = PD_1,
/**** DEBUG pins ****/ /**** DEBUG pins ****/
SYS_JTCK_SWCLK = PA_14, SYS_JTCK_SWCLK = PA_14,
SYS_JTDI = PA_15, SYS_JTDI = PA_15,
SYS_JTDO_TRACESWO = PB_3, SYS_JTDO_TRACESWO = PB_3,

4
targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/PeripheralPins.c
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@ -109,8 +109,8 @@ MBED_WEAK const PinMap PinMap_PWM[] = {
{PA_10, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 3, 0)}, // TIM1_CH3 {PA_10, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 3, 0)}, // TIM1_CH3
{PA_11, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 4, 0)}, // TIM1_CH4 {PA_11, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 4, 0)}, // TIM1_CH4
{PA_15, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 8, 1, 0)}, // TIM2_CH1 {PA_15, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 8, 1, 0)}, // TIM2_CH1
{PB_0 , PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 3, 0)}, // TIM3_CH3 {PB_0, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 3, 0)}, // TIM3_CH3
{PB_1 , PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 4, 0)}, // TIM3_CH4 {PB_1, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 0, 4, 0)}, // TIM3_CH4
{PB_3, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 8, 2, 0)}, // TIM2_CH2 // Connected to SWO {PB_3, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 8, 2, 0)}, // TIM2_CH2 // Connected to SWO
{PB_4, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 7, 1, 0)}, // TIM3_CH1 {PB_4, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 7, 1, 0)}, // TIM3_CH1
{PB_5, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 7, 2, 0)}, // TIM3_CH2 {PB_5, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, 7, 2, 0)}, // TIM3_CH2

6
targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/PinNames.h
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@ -154,17 +154,17 @@ typedef enum {
SPI_CS = PB_6, SPI_CS = PB_6,
PWM_OUT = PB_3, PWM_OUT = PB_3,
/**** USB pins ****/ /**** USB pins ****/
USB_DM = PA_11, USB_DM = PA_11,
USB_DP = PA_12, USB_DP = PA_12,
/**** OSCILLATOR pins ****/ /**** OSCILLATOR pins ****/
RCC_OSC32_IN = PC_14, RCC_OSC32_IN = PC_14,
RCC_OSC32_OUT = PC_15, RCC_OSC32_OUT = PC_15,
RCC_OSC_IN = PD_0, RCC_OSC_IN = PD_0,
RCC_OSC_OUT = PD_1, RCC_OSC_OUT = PD_1,
/**** DEBUG pins ****/ /**** DEBUG pins ****/
SYS_JTCK_SWCLK = PA_14, SYS_JTCK_SWCLK = PA_14,
SYS_JTDI = PA_15, SYS_JTDI = PA_15,
SYS_JTDO_TRACESWO = PB_3, SYS_JTDO_TRACESWO = PB_3,

2
targets/TARGET_STM/TARGET_STM32F1/flash_api.c
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@ -134,7 +134,7 @@ int32_t flash_program_page(flash_t *obj, uint32_t address, const uint8_t *data,
} }
} else { /* case where data is aligned, so let's avoid any copy */ } else { /* case where data is aligned, so let's avoid any copy */
while ((address < (StartAddress + size)) && (status == 0)) { while ((address < (StartAddress + size)) && (status == 0)) {
if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_WORD, address, *((uint32_t*) data)) == HAL_OK) { if (HAL_FLASH_Program(FLASH_TYPEPROGRAM_WORD, address, *((uint32_t *) data)) == HAL_OK) {
address = address + MIN_PROG_SIZE; address = address + MIN_PROG_SIZE;
data = data + MIN_PROG_SIZE; data = data + MIN_PROG_SIZE;
} else { } else {

9
targets/TARGET_STM/TARGET_STM32F1/pin_device.h
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@ -102,19 +102,22 @@ static inline void stm_pin_PullConfig(GPIO_TypeDef *gpio, uint32_t ll_pin, uint3
switch (pull_config) { switch (pull_config) {
case GPIO_PULLUP: case GPIO_PULLUP:
if (function == LL_GPIO_MODE_FLOATING) if (function == LL_GPIO_MODE_FLOATING) {
LL_GPIO_SetPinMode(gpio, ll_pin, LL_GPIO_MODE_INPUT); LL_GPIO_SetPinMode(gpio, ll_pin, LL_GPIO_MODE_INPUT);
}
LL_GPIO_SetPinPull(gpio, ll_pin, LL_GPIO_PULL_UP); LL_GPIO_SetPinPull(gpio, ll_pin, LL_GPIO_PULL_UP);
break; break;
case GPIO_PULLDOWN: case GPIO_PULLDOWN:
if (function == LL_GPIO_MODE_FLOATING) if (function == LL_GPIO_MODE_FLOATING) {
LL_GPIO_SetPinMode(gpio, ll_pin, LL_GPIO_MODE_INPUT); LL_GPIO_SetPinMode(gpio, ll_pin, LL_GPIO_MODE_INPUT);
}
LL_GPIO_SetPinPull(gpio, ll_pin, LL_GPIO_PULL_DOWN); LL_GPIO_SetPinPull(gpio, ll_pin, LL_GPIO_PULL_DOWN);
break; break;
default: default:
/* Input+NoPull = Floating for F1 family */ /* Input+NoPull = Floating for F1 family */
if (function == LL_GPIO_MODE_INPUT) if (function == LL_GPIO_MODE_INPUT) {
LL_GPIO_SetPinMode(gpio, ll_pin, LL_GPIO_MODE_FLOATING); LL_GPIO_SetPinMode(gpio, ll_pin, LL_GPIO_MODE_FLOATING);
}
break; break;
} }
} }

3
targets/TARGET_STM/TARGET_STM32F1/pwmout_device.c
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@ -33,8 +33,7 @@
#ifdef DEVICE_PWMOUT #ifdef DEVICE_PWMOUT
const pwm_apb_map_t pwm_apb_map_table[] = const pwm_apb_map_t pwm_apb_map_table[] = {
{
#if defined(TIM1_BASE) #if defined(TIM1_BASE)
{PWM_1, PWMOUT_ON_APB2}, {PWM_1, PWMOUT_ON_APB2},
#endif #endif

28
targets/TARGET_STM/TARGET_STM32F1/serial_device.c
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@ -51,7 +51,7 @@ static void uart_irq(UARTName uart_name)
int8_t id = get_uart_index(uart_name); int8_t id = get_uart_index(uart_name);
if (id >= 0) { if (id >= 0) {
UART_HandleTypeDef * huart = &uart_handlers[id]; UART_HandleTypeDef *huart = &uart_handlers[id];
if (serial_irq_ids[id] != 0) { if (serial_irq_ids[id] != 0) {
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_TXE) != RESET) { if (__HAL_UART_GET_FLAG(huart, UART_FLAG_TXE) != RESET) {
if (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_TXE) != RESET) { if (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_TXE) != RESET) {
@ -332,11 +332,11 @@ int serial_tx_asynch(serial_t *obj, const void *tx, size_t tx_length, uint8_t tx
(void) hint; (void) hint;
// Check buffer is ok // Check buffer is ok
MBED_ASSERT(tx != (void*)0); MBED_ASSERT(tx != (void *)0);
MBED_ASSERT(tx_width == 8); // support only 8b width MBED_ASSERT(tx_width == 8); // support only 8b width
struct serial_s *obj_s = SERIAL_S(obj); struct serial_s *obj_s = SERIAL_S(obj);
UART_HandleTypeDef * huart = &uart_handlers[obj_s->index]; UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
if (tx_length == 0) { if (tx_length == 0) {
return 0; return 0;
@ -358,7 +358,7 @@ int serial_tx_asynch(serial_t *obj, const void *tx, size_t tx_length, uint8_t tx
NVIC_EnableIRQ(irq_n); NVIC_EnableIRQ(irq_n);
// the following function will enable UART_IT_TXE and error interrupts // the following function will enable UART_IT_TXE and error interrupts
if (HAL_UART_Transmit_IT(huart, (uint8_t*)tx, tx_length) != HAL_OK) { if (HAL_UART_Transmit_IT(huart, (uint8_t *)tx, tx_length) != HAL_OK) {
return 0; return 0;
} }
@ -386,7 +386,7 @@ void serial_rx_asynch(serial_t *obj, void *rx, size_t rx_length, uint8_t rx_widt
/* Sanity check arguments */ /* Sanity check arguments */
MBED_ASSERT(obj); MBED_ASSERT(obj);
MBED_ASSERT(rx != (void*)0); MBED_ASSERT(rx != (void *)0);
MBED_ASSERT(rx_width == 8); // support only 8b width MBED_ASSERT(rx_width == 8); // support only 8b width
struct serial_s *obj_s = SERIAL_S(obj); struct serial_s *obj_s = SERIAL_S(obj);
@ -408,7 +408,7 @@ void serial_rx_asynch(serial_t *obj, void *rx, size_t rx_length, uint8_t rx_widt
NVIC_EnableIRQ(irq_n); NVIC_EnableIRQ(irq_n);
// following HAL function will enable the RXNE interrupt + error interrupts // following HAL function will enable the RXNE interrupt + error interrupts
HAL_UART_Receive_IT(huart, (uint8_t*)rx, rx_length); HAL_UART_Receive_IT(huart, (uint8_t *)rx, rx_length);
} }
/** /**
@ -443,13 +443,15 @@ uint8_t serial_rx_active(serial_t *obj)
return ((HAL_UART_GetState(huart) == HAL_UART_STATE_BUSY_RX) ? 1 : 0); return ((HAL_UART_GetState(huart) == HAL_UART_STATE_BUSY_RX) ? 1 : 0);
} }
void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) { void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
{
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_TC) != RESET) { if (__HAL_UART_GET_FLAG(huart, UART_FLAG_TC) != RESET) {
__HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC); __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC);
} }
} }
void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart) { void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
{
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_PE) != RESET) { if (__HAL_UART_GET_FLAG(huart, UART_FLAG_PE) != RESET) {
volatile uint32_t tmpval __attribute__((unused)) = huart->Instance->DR; // Clear PE flag volatile uint32_t tmpval __attribute__((unused)) = huart->Instance->DR; // Clear PE flag
} else if (__HAL_UART_GET_FLAG(huart, UART_FLAG_FE) != RESET) { } else if (__HAL_UART_GET_FLAG(huart, UART_FLAG_FE) != RESET) {
@ -473,14 +475,14 @@ int serial_irq_handler_asynch(serial_t *obj)
UART_HandleTypeDef *huart = &uart_handlers[obj_s->index]; UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
volatile int return_event = 0; volatile int return_event = 0;
uint8_t *buf = (uint8_t*)(obj->rx_buff.buffer); uint8_t *buf = (uint8_t *)(obj->rx_buff.buffer);
uint8_t i = 0; uint8_t i = 0;
// TX PART: // TX PART:
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_TC) != RESET) { if (__HAL_UART_GET_FLAG(huart, UART_FLAG_TC) != RESET) {
if (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_TC) != RESET) { if (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_TC) != RESET) {
// Return event SERIAL_EVENT_TX_COMPLETE if requested // Return event SERIAL_EVENT_TX_COMPLETE if requested
if ((obj_s->events & SERIAL_EVENT_TX_COMPLETE ) != 0) { if ((obj_s->events & SERIAL_EVENT_TX_COMPLETE) != 0) {
return_event |= (SERIAL_EVENT_TX_COMPLETE & obj_s->events); return_event |= (SERIAL_EVENT_TX_COMPLETE & obj_s->events);
} }
} }
@ -559,7 +561,7 @@ void serial_tx_abort_asynch(serial_t *obj)
// reset states // reset states
huart->TxXferCount = 0; huart->TxXferCount = 0;
// update handle state // update handle state
if(huart->gState == HAL_UART_STATE_BUSY_TX_RX) { if (huart->gState == HAL_UART_STATE_BUSY_TX_RX) {
huart->gState = HAL_UART_STATE_BUSY_RX; huart->gState = HAL_UART_STATE_BUSY_RX;
} else { } else {
huart->gState = HAL_UART_STATE_READY; huart->gState = HAL_UART_STATE_READY;
@ -589,7 +591,7 @@ void serial_rx_abort_asynch(serial_t *obj)
// reset states // reset states
huart->RxXferCount = 0; huart->RxXferCount = 0;
// update handle state // update handle state
if(huart->RxState == HAL_UART_STATE_BUSY_TX_RX) { if (huart->RxState == HAL_UART_STATE_BUSY_TX_RX) {
huart->RxState = HAL_UART_STATE_BUSY_TX; huart->RxState = HAL_UART_STATE_BUSY_TX;
} else { } else {
huart->RxState = HAL_UART_STATE_READY; huart->RxState = HAL_UART_STATE_READY;
@ -619,7 +621,7 @@ void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, Pi
obj_s->uart = (UARTName)pinmap_merge(uart_cts, uart_rts); obj_s->uart = (UARTName)pinmap_merge(uart_cts, uart_rts);
MBED_ASSERT(obj_s->uart != (UARTName)NC); MBED_ASSERT(obj_s->uart != (UARTName)NC);
if(type == FlowControlNone) { if (type == FlowControlNone) {
// Disable hardware flow control // Disable hardware flow control
obj_s->hw_flow_ctl = UART_HWCONTROL_NONE; obj_s->hw_flow_ctl = UART_HWCONTROL_NONE;
} }

7
targets/TARGET_STM/TARGET_STM32F1/spi_api.c
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@ -37,16 +37,17 @@
#include "PeripheralPins.h" #include "PeripheralPins.h"
#if DEVICE_SPI_ASYNCH #if DEVICE_SPI_ASYNCH
#define SPI_S(obj) (( struct spi_s *)(&(obj->spi))) #define SPI_S(obj) (( struct spi_s *)(&(obj->spi)))
#else #else
#define SPI_S(obj) (( struct spi_s *)(obj)) #define SPI_S(obj) (( struct spi_s *)(obj))
#endif #endif
/* /*
* Only the frequency is managed in the family specific part * Only the frequency is managed in the family specific part
* the rest of SPI management is common to all STM32 families * the rest of SPI management is common to all STM32 families
*/ */
int spi_get_clock_freq(spi_t *obj) { int spi_get_clock_freq(spi_t *obj)
{
struct spi_s *spiobj = SPI_S(obj); struct spi_s *spiobj = SPI_S(obj);
int spi_hz = 0; int spi_hz = 0;