diff --git a/targets/TARGET_NUVOTON/TARGET_M451/serial_api.c b/targets/TARGET_NUVOTON/TARGET_M451/serial_api.c index 50327b8af6..93c9df8a1b 100644 --- a/targets/TARGET_NUVOTON/TARGET_M451/serial_api.c +++ b/targets/TARGET_NUVOTON/TARGET_M451/serial_api.c @@ -300,8 +300,8 @@ void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, Pi MBED_ASSERT(uart_rts == obj->serial.uart); // Enable the pin for RTS function pinmap_pinout(rxflow, PinMap_UART_RTS); - // nRTS pin output is high level active - uart_base->MODEM = (uart_base->MODEM & ~UART_MODEM_RTSACTLV_Msk); + // nRTS pin output is low level active + uart_base->MODEM |= UART_MODEM_RTSACTLV_Msk; uart_base->FIFO = (uart_base->FIFO & ~UART_FIFO_RTSTRGLV_Msk) | UART_FIFO_RTSTRGLV_8BYTES; // Enable RTS uart_base->INTEN |= UART_INTEN_ATORTSEN_Msk; @@ -313,8 +313,8 @@ void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, Pi MBED_ASSERT(uart_cts == obj->serial.uart); // Enable the pin for CTS function pinmap_pinout(txflow, PinMap_UART_CTS); - // nCTS pin input is high level active - uart_base->MODEMSTS = (uart_base->MODEMSTS & ~UART_MODEMSTS_CTSACTLV_Msk); + // nCTS pin input is low level active + uart_base->MODEMSTS |= UART_MODEMSTS_CTSACTLV_Msk; // Enable CTS uart_base->INTEN |= UART_INTEN_ATOCTSEN_Msk; } diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/StdDriver/nuc472_uart.c b/targets/TARGET_NUVOTON/TARGET_NUC472/device/StdDriver/nuc472_uart.c index 388082167c..84b6c0a30c 100644 --- a/targets/TARGET_NUVOTON/TARGET_NUC472/device/StdDriver/nuc472_uart.c +++ b/targets/TARGET_NUVOTON/TARGET_NUC472/device/StdDriver/nuc472_uart.c @@ -1,8 +1,8 @@ /**************************************************************************//** * @file uart.c * @version V1.00 - * $Revision: 13 $ - * $Date: 14/10/03 1:55p $ + * $Revision: 14 $ + * $Date: 15/11/26 10:47a $ * @brief NUC472/NUC442 UART driver source file * * @note @@ -118,7 +118,7 @@ void UART_DisableInt(UART_T* uart, uint32_t u32InterruptFlag ) void UART_EnableFlowCtrl(UART_T* uart ) { uart->MODEM |= UART_MODEM_RTSACTLV_Msk; - uart->MODEM &= UART_MODEM_RTS_Msk; + uart->MODEM &= ~UART_MODEM_RTS_Msk; uart->MODEMSTS |= UART_MODEMSTS_CTSACTLV_Msk; uart->INTEN |= UART_INTEN_ATORTSEN_Msk | UART_INTEN_ATOCTSEN_Msk; } @@ -161,7 +161,7 @@ void UART_Open(UART_T* uart, uint32_t u32baudrate) uint32_t u32Clk; uint32_t u32Baud_Div; - u32ClkTbl[1] = CLK_GetPLLClockFreq();; + u32ClkTbl[1] = CLK_GetPLLClockFreq(); u8UartClkSrcSel = (CLK->CLKSEL1 & CLK_CLKSEL1_UARTSEL_Msk) >> CLK_CLKSEL1_UARTSEL_Pos; @@ -272,7 +272,17 @@ void UART_SetTimeoutCnt(UART_T* uart, uint32_t u32TOC) */ void UART_SelectIrDAMode(UART_T* uart, uint32_t u32Buadrate, uint32_t u32Direction) { - uart->BAUD = UART_BAUD_MODE0 | UART_BAUD_MODE0_DIVIDER(12000000, 57600); + uint8_t u8UartClkSrcSel; + uint32_t u32ClkTbl[4] = {__HXT, 0, __HIRC, __HIRC}; + uint32_t u32Clk; + + u32ClkTbl[1] = CLK_GetPLLClockFreq(); + + u8UartClkSrcSel = (CLK->CLKSEL1 & CLK_CLKSEL1_UARTSEL_Msk) >> CLK_CLKSEL1_UARTSEL_Pos; + + u32Clk = (u32ClkTbl[u8UartClkSrcSel]) / (((CLK->CLKDIV0 & CLK_CLKDIV0_UARTDIV_Msk) >> CLK_CLKDIV0_UARTDIV_Pos) + 1); + + uart->BAUD = UART_BAUD_MODE0 | UART_BAUD_MODE0_DIVIDER(u32Clk, u32Buadrate); uart->IRDA &= ~UART_IRDA_TXINV_Msk; uart->IRDA |= UART_IRDA_RXINV_Msk; diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/StdDriver/nuc472_uart.h b/targets/TARGET_NUVOTON/TARGET_NUC472/device/StdDriver/nuc472_uart.h index e047610dd7..e6e6f73bd7 100644 --- a/targets/TARGET_NUVOTON/TARGET_NUC472/device/StdDriver/nuc472_uart.h +++ b/targets/TARGET_NUVOTON/TARGET_NUC472/device/StdDriver/nuc472_uart.h @@ -1,8 +1,8 @@ /**************************************************************************//** * @file uart.h * @version V1.00 - * $Revision: 19 $ - * $Date: 14/10/07 9:28a $ + * $Revision: 20 $ + * $Date: 15/11/30 1:35p $ * @brief NUC472/NUC442 UART driver header file * * @note @@ -310,7 +310,7 @@ extern "C" * - \ref UART_INTSTS_LINIF_Msk : LIN Bus Flag. * - \ref UART_INTSTS_BUFERRIF_Msk : Buffer Error Interrupt Flag * - \ref UART_INTSTS_RXTOIF_Msk : Rx time-out interrupt Flag - * - \ref UART_INTSTS_MODENIF_Msk : Modem interrupt Flag + * - \ref UART_INTSTS_MODEMIF_Msk : Modem interrupt Flag * - \ref UART_INTSTS_RLSIF_Msk : Rx Line status interrupt Flag * - \ref UART_INTSTS_THREIF_Msk : Tx empty interrupt Flag * - \ref UART_INTSTS_RDAIF_Msk : Rx ready interrupt Flag diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/serial_api.c b/targets/TARGET_NUVOTON/TARGET_NUC472/serial_api.c index efb4f42f9f..e18938aafe 100644 --- a/targets/TARGET_NUVOTON/TARGET_NUC472/serial_api.c +++ b/targets/TARGET_NUVOTON/TARGET_NUC472/serial_api.c @@ -330,8 +330,10 @@ void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, Pi MBED_ASSERT(uart_rts == obj->serial.uart); // Enable the pin for RTS function pinmap_pinout(rxflow, PinMap_UART_RTS); - // nRTS pin output is high level active - uart_base->MODEM = (uart_base->MODEM & ~UART_MODEM_RTSACTLV_Msk) | UART_MODEM_RTSACTLV_Msk; + // nRTS pin output is low level active + uart_base->MODEM |= UART_MODEM_RTSACTLV_Msk; + uart_base->MODEM &= ~UART_MODEM_RTS_Msk; + uart_base->FIFO = (uart_base->FIFO & ~UART_FIFO_RTSTRGLV_Msk) | UART_FIFO_RTSTRGLV_8BYTES; // Enable RTS uart_base->INTEN |= UART_INTEN_ATORTSEN_Msk; @@ -343,8 +345,8 @@ void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, Pi MBED_ASSERT(uart_cts == obj->serial.uart); // Enable the pin for CTS function pinmap_pinout(txflow, PinMap_UART_CTS); - // nCTS pin input is high level active - uart_base->MODEMSTS = (uart_base->MODEMSTS & ~UART_MODEMSTS_CTSACTLV_Msk) | UART_MODEMSTS_CTSACTLV_Msk; + // nCTS pin input is low level active + uart_base->MODEMSTS |= UART_MODEMSTS_CTSACTLV_Msk; // Enable CTS uart_base->INTEN |= UART_INTEN_ATOCTSEN_Msk; }