mirror of https://github.com/ARMmbed/mbed-os.git
Merge pull request #6490 from li-ho/ev-cog-us-ticker-fire-interrupt
ADI: Fix EV_COG_AD3029LZ and EV_COG_AD4050LZ us_ticker_fire_interrupt() minimal time intervalpull/6561/head
commit
54b6aa3d1e
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@ -1,5 +1,5 @@
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/*******************************************************************************
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* Copyright (c) 2010-2017 Analog Devices, Inc.
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* Copyright (c) 2010-2018 Analog Devices, Inc.
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*
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* All rights reserved.
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*
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@ -206,7 +206,10 @@ static void event_timer()
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adi_tmr_ConfigTimer(ADI_TMR_DEVICE_GP2, &tmr2Config);
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adi_tmr_Enable(ADI_TMR_DEVICE_GP2, true);
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} else {
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us_ticker_irq_handler();
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tmr2Config.nLoad = 65535u;
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tmr2Config.nAsyncLoad = 65535u;
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adi_tmr_ConfigTimer(ADI_TMR_DEVICE_GP2, &tmr2Config);
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adi_tmr_Enable(ADI_TMR_DEVICE_GP2, true);
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}
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}
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@ -231,7 +234,11 @@ static void GP2CallbackFunction(void *pCBParam, uint32_t Event, void * pArg)
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if (largecnt < 65536u) {
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adi_tmr_Enable(ADI_TMR_DEVICE_GP2, false);
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event_timer();
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if (largecnt) {
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event_timer();
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} else {
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us_ticker_irq_handler();
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}
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}
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}
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@ -328,6 +335,7 @@ void us_ticker_set_interrupt(timestamp_t timestamp)
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*
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*/
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calc_event_counts(timestamp); // use timestamp to calculate largecnt to control number of timer interrupts
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tmr2Config.ePrescaler = ADI_TMR_PRESCALER_256; // TMR2 at 26MHz/256
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event_timer(); // uses largecnt to initiate timer interrupts
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}
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@ -339,7 +347,9 @@ void us_ticker_set_interrupt(timestamp_t timestamp)
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*/
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void us_ticker_fire_interrupt(void)
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{
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NVIC_SetPendingIRQ(TMR2_EVT_IRQn);
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largecnt = 1; // set a minimal interval so interrupt fire immediately
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tmr2Config.ePrescaler = ADI_TMR_PRESCALER_1; // TMR2 at 26MHz/1
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event_timer(); // enable the timer and interrupt
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}
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@ -1,5 +1,5 @@
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/*******************************************************************************
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* Copyright (c) 2010-2017 Analog Devices, Inc.
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* Copyright (c) 2010-2018 Analog Devices, Inc.
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*
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* All rights reserved.
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*
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@ -116,7 +116,7 @@ static uint32_t get_current_time(void)
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* thereby clearing any TMR1 pend's. This have no effect if this routine is called with interrupts globally disabled.
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*/
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NVIC_DisableIRQ(adi_tmr_interrupt[ADI_TMR_DEVICE_GP1]); // Prevent Upper_count increment
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NVIC_DisableIRQ(adi_tmr_interrupt[ADI_TMR_DEVICE_GP1]); // Prevent Upper_count increment
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tmrpend0 = NVIC_GetPendingIRQ(adi_tmr_interrupt[ADI_TMR_DEVICE_GP1]);
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// Check if there is a pending interrupt for timer 1
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@ -128,27 +128,27 @@ static uint32_t get_current_time(void)
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tmrcnt1 = adi_tmr_registers[ADI_TMR_DEVICE_GP1]->CURCNT; // read both timers manually
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totaltmr0 = tmrcnt0; // expand to u32 bits
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totaltmr1 = tmrcnt1; // expand to u32 bits
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totaltmr0 = tmrcnt0; // expand to u32 bits
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totaltmr1 = tmrcnt1; // expand to u32 bits
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tmrcnt0 &= 0xff00u;
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tmrcnt1 <<= 8;
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__DMB();
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uc1 = *ucptr; // Read Upper_count
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uc1 = *ucptr; // Read Upper_count
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tmrpend1 = NVIC_GetPendingIRQ(adi_tmr_interrupt[ADI_TMR_DEVICE_GP1]);
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// Check for a pending interrupt again. Only leave loop if they match
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NVIC_EnableIRQ(adi_tmr_interrupt[ADI_TMR_DEVICE_GP1]); // enable interrupt on every loop to allow TMR1 interrupt to run
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NVIC_EnableIRQ(adi_tmr_interrupt[ADI_TMR_DEVICE_GP1]); // enable interrupt on every loop to allow TMR1 interrupt to run
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} while ((tmrcnt0 != tmrcnt1) || (tmrpend0 != tmrpend1));
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totaltmr1 <<= 8; // Timer1 runs 256x slower
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totaltmr1 += totaltmr0 & 0xffu; // Use last 8 bits of Timer0 as it runs faster
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// totaltmr1 now contain 24 bits of significance
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if (tmrpend0) { // If an interrupt is pending, then increment local copy of upper count
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if (tmrpend0) { // If an interrupt is pending, then increment local copy of upper count
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uc1++;
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}
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@ -158,7 +158,7 @@ static uint32_t get_current_time(void)
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// Divide Uc by 26 (26MHz converted to 1MHz) todo scale for other clock freqs
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Uc *= 1290555u; // Divide total(1/26) << 25
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Uc >>= 25; // shift back. Fixed point avoid use of floating point divide.
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Uc >>= 25; // shift back. Fixed point avoid use of floating point divide.
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// Compiler does this inline using shifts and adds.
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return Uc;
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@ -205,7 +205,10 @@ static void event_timer()
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adi_tmr_ConfigTimer(ADI_TMR_DEVICE_GP2, tmr2Config);
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adi_tmr_Enable(ADI_TMR_DEVICE_GP2, true);
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} else {
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us_ticker_irq_handler();
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tmr2Config.nLoad = 65535u;
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tmr2Config.nAsyncLoad = 65535u;
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adi_tmr_ConfigTimer(ADI_TMR_DEVICE_GP2, tmr2Config);
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adi_tmr_Enable(ADI_TMR_DEVICE_GP2, true);
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}
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}
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@ -229,7 +232,11 @@ static void GP2CallbackFunction(void *pCBParam, uint32_t Event, void * pArg)
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if (largecnt < 65536u) {
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adi_tmr_Enable(ADI_TMR_DEVICE_GP2, false);
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event_timer();
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if (largecnt) {
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event_timer();
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} else {
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us_ticker_irq_handler();
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}
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}
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}
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@ -326,7 +333,8 @@ void us_ticker_set_interrupt(timestamp_t timestamp)
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*
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*/
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calc_event_counts(timestamp); // use timestamp to calculate largecnt to control number of timer interrupts
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event_timer(); // uses largecnt to initiate timer interrupts
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tmr2Config.ePrescaler = ADI_TMR_PRESCALER_256; // TMR2 at 26MHz/256
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event_timer(); // uses largecnt to initiate timer interrupts
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}
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/** Set pending interrupt that should be fired right away.
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@ -337,7 +345,9 @@ void us_ticker_set_interrupt(timestamp_t timestamp)
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*/
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void us_ticker_fire_interrupt(void)
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{
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NVIC_SetPendingIRQ(TMR2_EVT_IRQn);
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largecnt = 1; // set a minimal interval so interrupt fire immediately
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tmr2Config.ePrescaler = ADI_TMR_PRESCALER_1; // TMR2 at 26MHz/1
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event_timer(); // enable the timer and interrupt
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}
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