mirror of https://github.com/ARMmbed/mbed-os.git
Hardware flow control implementation for LPC81X
parent
d0b2fb6c66
commit
53cd64775d
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@ -39,6 +39,18 @@ static const SWM_Map SWM_UART_RX[] = {
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{2, 24},
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{2, 24},
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};
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};
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static const SWM_Map SWM_UART_RTS[] = {
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{0, 16},
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{1, 24},
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{3, 0},
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};
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static const SWM_Map SWM_UART_CTS[] = {
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{0, 24},
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{2, 0},
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{3, 8}
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};
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// bit flags for used UARTs
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// bit flags for used UARTs
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static unsigned char uart_used = 0;
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static unsigned char uart_used = 0;
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static int get_available_uart(void) {
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static int get_available_uart(void) {
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@ -60,6 +72,7 @@ static int get_available_uart(void) {
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#define TXRDY (0x01<<2)
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#define TXRDY (0x01<<2)
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#define TXBRKEN (0x01<<1)
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#define TXBRKEN (0x01<<1)
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#define CTSEN (0x01<<9)
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static uint32_t UARTSysClk;
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static uint32_t UARTSysClk;
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@ -278,3 +291,34 @@ void serial_break_clear(serial_t *obj) {
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obj->uart->CTRL &= ~TXBRKEN;
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obj->uart->CTRL &= ~TXBRKEN;
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}
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}
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void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow) {
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const SWM_Map *swm_rts, *swm_cts;
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uint32_t regVal_rts, regVal_cts;
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swm_rts = &SWM_UART_RTS[obj->index];
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swm_cts = &SWM_UART_CTS[obj->index];
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regVal_rts = LPC_SWM->PINASSIGN[swm_rts->n] & ~(0xFF << swm_rts->offset);
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regVal_cts = LPC_SWM->PINASSIGN[swm_cts->n] & ~(0xFF << swm_cts->offset);
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if (FlowControlNone == type) {
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LPC_SWM->PINASSIGN[swm_rts->n] = regVal_rts | (0xFF << swm_rts->offset);
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LPC_SWM->PINASSIGN[swm_cts->n] = regVal_cts | (0xFF << swm_cts->offset);
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obj->uart->CFG &= ~CTSEN;
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return;
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}
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if ((FlowControlRTS == type || FlowControlRTSCTS == type) && (rxflow != NC)) {
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LPC_SWM->PINASSIGN[swm_rts->n] = regVal_rts | (rxflow << swm_rts->offset);
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if (FlowControlRTS == type) {
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LPC_SWM->PINASSIGN[swm_cts->n] = regVal_cts | (0xFF << swm_cts->offset);
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obj->uart->CFG &= ~CTSEN;
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}
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}
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if ((FlowControlCTS == type || FlowControlRTSCTS == type) && (txflow != NC)) {
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LPC_SWM->PINASSIGN[swm_cts->n] = regVal_cts | (txflow << swm_cts->offset);
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obj->uart->CFG |= CTSEN;
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if (FlowControlCTS == type) {
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LPC_SWM->PINASSIGN[swm_rts->n] = regVal_rts | (0xFF << swm_rts->offset);
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}
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}
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}
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