diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYSBSYSKIT_01/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_system.c b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYSBSYSKIT_01/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_system.c
index 989f46a972..d06a4b5f86 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYSBSYSKIT_01/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_system.c
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYSBSYSKIT_01/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_system.c
@@ -26,40 +26,3 @@
#include "cycfg_system.h"
-#define CY_CFG_PWR_ENABLED 1
-#define CY_CFG_PWR_INIT 1
-#define CY_CFG_PWR_USING_PMIC 0
-#define CY_CFG_PWR_VBACKUP_USING_VDDD 0
-#define CY_CFG_PWR_LDO_VOLTAGE CY_SYSPM_LDO_VOLTAGE_LP
-#define CY_CFG_PWR_USING_ULP 0
-
-__STATIC_INLINE void init_cycfg_power(void)
-{
- /* Reset the Backup domain on POR, XRES, BOD only if Backup domain is supplied by VDDD */
- #if (CY_CFG_PWR_VBACKUP_USING_VDDD)
- if (0u == Cy_SysLib_GetResetReason() /* POR, XRES, or BOD */)
- {
- Cy_SysLib_ResetBackupDomain();
- Cy_SysClk_IloDisable();
- Cy_SysClk_IloInit();
- }
- #else /* Dedicated Supply */
- Cy_SysPm_BackupSetSupply(CY_SYSPM_VDDBACKUP_VBACKUP);
- #endif /* CY_CFG_PWR_VBACKUP_USING_VDDD */
-
- /* Configure core regulator */
- #if CY_CFG_PWR_USING_LDO
- Cy_SysPm_LdoSetVoltage(CY_SYSPM_LDO_VOLTAGE_LP);
- Cy_SysPm_LdoSetMode(CY_SYSPM_LDO_MODE_NORMAL);
- #else
- Cy_SysPm_BuckEnable(CY_SYSPM_BUCK_OUT1_VOLTAGE_LP);
- #endif /* CY_CFG_PWR_USING_LDO */
- /* Configure PMIC */
- Cy_SysPm_UnlockPmic();
- #if CY_CFG_PWR_USING_PMIC
- Cy_SysPm_PmicEnableOutput();
- #else
- Cy_SysPm_PmicDisableOutput();
- #endif /* CY_CFG_PWR_USING_PMIC */
-}
-
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYSBSYSKIT_01/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_system.h b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYSBSYSKIT_01/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_system.h
index e250de78ed..106e61a459 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYSBSYSKIT_01/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_system.h
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYSBSYSKIT_01/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource/cycfg_system.h
@@ -28,29 +28,11 @@
#define CYCFG_SYSTEM_H
#include "cycfg_notices.h"
-#include "cy_syspm.h"
-
#if defined(__cplusplus)
extern "C" {
#endif
#define cpuss_0_dap_0_ENABLED 1U
-#define srss_0_power_0_ENABLED 1U
-#define CY_CFG_PWR_MODE_LP 0x01UL
-#define CY_CFG_PWR_MODE_ULP 0x02UL
-#define CY_CFG_PWR_MODE_ACTIVE 0x04UL
-#define CY_CFG_PWR_MODE_SLEEP 0x08UL
-#define CY_CFG_PWR_MODE_DEEPSLEEP 0x10UL
-#define CY_CFG_PWR_SYS_IDLE_MODE CY_CFG_PWR_MODE_SLEEP
-#define CY_CFG_PWR_SYS_ACTIVE_MODE CY_CFG_PWR_MODE_LP
-#define CY_CFG_PWR_DEEPSLEEP_LATENCY 0UL
-#define CY_CFG_PWR_USING_LDO 1
-#define CY_CFG_PWR_VDDA_MV 3300
-#define CY_CFG_PWR_VDDD_MV 1800
-#define CY_CFG_PWR_VBACKUP_MV 1800
-#define CY_CFG_PWR_VDD_NS_MV 1800
-#define CY_CFG_PWR_VDDIO0_MV 1800
-#define CY_CFG_PWR_VDDIO1_MV 3300
#if defined(__cplusplus)
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYSBSYSKIT_01/COMPONENT_BSP_DESIGN_MODUS/design.modus b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYSBSYSKIT_01/COMPONENT_BSP_DESIGN_MODUS/design.modus
index 3d3f006423..120837b1b1 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYSBSYSKIT_01/COMPONENT_BSP_DESIGN_MODUS/design.modus
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYSBSYSKIT_01/COMPONENT_BSP_DESIGN_MODUS/design.modus
@@ -84,23 +84,6 @@
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
@@ -117,10 +100,6 @@
-
-
-
-
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYSBSYSKIT_01/cybsp.c b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYSBSYSKIT_01/cybsp.c
index e9481f375a..a935ed999b 100644
--- a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYSBSYSKIT_01/cybsp.c
+++ b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYSBSYSKIT_01/cybsp.c
@@ -31,6 +31,10 @@
#include "cyhal_hwmgr.h"
#endif
+#if !defined (CY_CFG_PWR_SYS_IDLE_MODE)
+#include "mbed_power_mgmt.h"
+#endif
+
#if defined(__cplusplus)
extern "C" {
#endif
@@ -94,6 +98,11 @@ cy_rslt_t cybsp_init(void)
result = cybsp_register_sysclk_pm_callback();
}
+#if !defined(CY_CFG_PWR_SYS_IDLE_MODE)
+ /* Disable deep-sleep. */
+ sleep_manager_lock_deep_sleep();
+#endif
+
/* CYHAL_HWMGR_RSLT_ERR_INUSE error code could be returned if any needed for BSP resource was reserved by
* user previously. Please review the Device Configurator (design.modus) and the BSP reservation list
* (cyreservedresources.list) to make sure no resources are reserved by both.
diff --git a/targets/targets.json b/targets/targets.json
index 592e8e1011..6db1436443 100644
--- a/targets/targets.json
+++ b/targets/targets.json
@@ -14016,7 +14016,8 @@
"CYBSP_WIFI_CAPABLE"
],
"overrides": {
- "network-default-interface-type": "WIFI"
+ "network-default-interface-type": "WIFI",
+ "deep-sleep-latency": 0
},
"detect_code": [
"1912"