Merge pull request #12947 from Uruloke/issi-flash-memory-support-master

Fix setting the QE bit on ISSI Flash memories
pull/12959/head
Martin Kojtal 2020-05-12 14:25:25 +02:00 committed by GitHub
commit 5302a352cf
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1 changed files with 17 additions and 10 deletions

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@ -1062,6 +1062,11 @@ int QSPIFBlockDevice::_handle_vendor_quirks()
_read_status_reg_2_inst = QSPIF_INST_RDCR;
_attempt_4_byte_addressing = false;
break;
case 0x9d:
// ISSI devices have only one status register
tr_debug("Applying quirks for ISSI");
_num_status_registers = 1;
break;
}
return 0;
@ -1420,17 +1425,19 @@ qspi_status_t QSPIFBlockDevice::_qspi_read_status_registers(uint8_t *reg_buffer)
// Read Status Register 2 (and beyond, if applicable)
unsigned int read_length = _num_status_registers - 1; // We already read status reg 1 above
status = _qspi_send_general_command(_read_status_reg_2_inst, QSPI_NO_ADDRESS_COMMAND,
NULL, 0,
(char *) &reg_buffer[1], read_length);
if (QSPI_STATUS_OK == status) {
tr_debug("Reading Status Register 2 Success: value = 0x%x", (int) reg_buffer[1]);
if (_num_status_registers > 2) {
tr_debug("Reading Register 3 Success: value = 0x%x", (int) reg_buffer[2]);
if (read_length > 0) {
status = _qspi_send_general_command(_read_status_reg_2_inst, QSPI_NO_ADDRESS_COMMAND,
NULL, 0,
(char *) &reg_buffer[1], read_length);
if (QSPI_STATUS_OK == status) {
tr_debug("Reading Status Register 2 Success: value = 0x%x", (int) reg_buffer[1]);
if (_num_status_registers > 2) {
tr_debug("Reading Register 3 Success: value = 0x%x", (int) reg_buffer[2]);
}
} else {
tr_error("Reading Status Register 2 failed");
return status;
}
} else {
tr_error("Reading Status Register 2 failed");
return status;
}
return QSPI_STATUS_OK;