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Merge branch 'master' of git://github.com/dbestm/mbed into dbestm-master

pull/286/head^2
Bogdan Marinescu 2014-04-29 16:58:46 +01:00
parent b5f6c135e4 569da9ae6e
commit 522752bd58
2 changed files with 14 additions and 19 deletions
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4
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F030R8/device.h
View File

@ -42,10 +42,10 @@
#define DEVICE_SERIAL 1 #define DEVICE_SERIAL 1
#define DEVICE_I2C 1 #define DEVICE_I2C 1
#define DEVICE_I2CSLAVE 0 #define DEVICE_I2CSLAVE 1
#define DEVICE_SPI 1 #define DEVICE_SPI 1
#define DEVICE_SPISLAVE 0 #define DEVICE_SPISLAVE 1
#define DEVICE_RTC 1 #define DEVICE_RTC 1

29
libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F030R8/i2c_api.c
View File

@ -69,6 +69,7 @@ void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
// Enable I2C clock // Enable I2C clock
if (obj->i2c == I2C_1) { if (obj->i2c == I2C_1) {
RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2C1, ENABLE); RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2C1, ENABLE);
RCC_I2CCLKConfig(RCC_I2C1CLK_SYSCLK);
} }
if (obj->i2c == I2C_2) { if (obj->i2c == I2C_2) {
RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2C2, ENABLE); RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2C2, ENABLE);
@ -103,7 +104,7 @@ void i2c_frequency(i2c_t *obj, int hz) {
* Fast Mode (up to 400 kHz) * Fast Mode (up to 400 kHz)
* Fast Mode Plus (up to 1 MHz) * Fast Mode Plus (up to 1 MHz)
Below values obtained with: Below values obtained with:
- I2C clock source = 8 MHz (HSI clock per default) - I2C clock source = 48 MHz (System Clock)
- Analog filter delay = ON - Analog filter delay = ON
- Digital filter coefficient = 0 - Digital filter coefficient = 0
- Rise time = 100 ns - Rise time = 100 ns
@ -111,16 +112,16 @@ void i2c_frequency(i2c_t *obj, int hz) {
*/ */
switch (hz) { switch (hz) {
case 100000: case 100000:
tim = 0x00201D2B; // Standard mode tim = 0x10805E89; // Standard mode
break; break;
case 200000: case 200000:
tim = 0x0010021E; // Fast Mode tim = 0x00905E82; // Fast Mode
break; break;
case 400000: case 400000:
tim = 0x0010020A; // Fast Mode tim = 0x00901850; // Fast Mode
break; break;
case 1000000: case 1000000:
tim = 0x00100001; // Fast Mode Plus tim = 0x00700818; // Fast Mode Plus
// Enable the Fast Mode Plus capability // Enable the Fast Mode Plus capability
if (obj->i2c == I2C_1) { if (obj->i2c == I2C_1) {
SYSCFG_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus_I2C1, ENABLE); SYSCFG_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus_I2C1, ENABLE);
@ -299,25 +300,19 @@ void i2c_slave_mode(i2c_t *obj, int enable_slave) {
int i2c_slave_receive(i2c_t *obj) { int i2c_slave_receive(i2c_t *obj) {
I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c); I2C_TypeDef *i2c = (I2C_TypeDef *)(obj->i2c);
int event = 0; int event = NoData;
int timeout;
// Wait until address match if(I2C_GetFlagStatus(i2c, I2C_ISR_BUSY) == SET) {
timeout = FLAG_TIMEOUT; if(I2C_GetFlagStatus(i2c, I2C_ISR_ADDR) == SET) {
while (I2C_GetFlagStatus(i2c, I2C_ISR_ADDR) == RESET) {
timeout--;
if (timeout == 0) {
return 0;
}
}
// Check direction // Check direction
if (i2c->ISR & I2C_ISR_DIR) { if (I2C_GetFlagStatus(i2c, I2C_ISR_DIR) == SET) {
event = ReadAddressed; event = ReadAddressed;
} }
else event = WriteAddressed; else event = WriteAddressed;
// Clear adress match flag to generate an acknowledge // Clear adress match flag to generate an acknowledge
i2c->ICR |= I2C_ICR_ADDRCF; i2c->ICR |= I2C_ICR_ADDRCF;
}
}
return event; return event;
} }