diff --git a/workspace_tools/export/coide.py b/workspace_tools/export/coide.py
index f40a6f8585..13789ed1fa 100755
--- a/workspace_tools/export/coide.py
+++ b/workspace_tools/export/coide.py
@@ -48,7 +48,7 @@ class CoIDE(Exporter):
         'DISCO_F429ZI',
         'MTS_MDOT_F405RG',
         'MTS_MDOT_F411RE',
-        'SEMTECH_LORA915',
+        'MOTE_L152RC',
     ]
 
     # seems like CoIDE currently supports only one type
diff --git a/workspace_tools/export/gccarm.py b/workspace_tools/export/gccarm.py
index 16339cfe91..6db362ee55 100755
--- a/workspace_tools/export/gccarm.py
+++ b/workspace_tools/export/gccarm.py
@@ -76,7 +76,7 @@ class GccArm(Exporter):
         'SEEED_TINY_BLE',
         'DISCO_F401VC',
 		'DELTA_DFCM_NNN40',
-        'SEMTECH_LORA915',
+        'MOTE_L152RC',
     ]
 
     DOT_IN_RELATIVE_PATH = True
diff --git a/workspace_tools/export/iar.py b/workspace_tools/export/iar.py
index aa6f11f1a9..fe5a700e3c 100755
--- a/workspace_tools/export/iar.py
+++ b/workspace_tools/export/iar.py
@@ -58,7 +58,7 @@ class IAREmbeddedWorkbench(Exporter):
         'MTS_MDOT_F411RE',
         'MTS_DRAGONFLY_F411RE',
         'NRF51822',
-        'SEMTECH_LORA915',
+        'MOTE_L152RC',
     ]
 
     def generate(self):
diff --git a/workspace_tools/export/uvision4.py b/workspace_tools/export/uvision4.py
index 0290413744..8ab4f21a9d 100755
--- a/workspace_tools/export/uvision4.py
+++ b/workspace_tools/export/uvision4.py
@@ -71,7 +71,7 @@ class Uvision4(Exporter):
         'SEEED_TINY_BLE',
         'LPC11U37H_401',
 		'DELTA_DFCM_NNN40',
-		'SEMTECH_LORA915',
+		'MOTE_L152RC',
     ]
 
     USING_MICROLIB = [
@@ -96,7 +96,7 @@ class Uvision4(Exporter):
         'LPC11U35_501',
         'KL05Z',
         'LPC11U37H_401',
-		'SEMTECH_LORA915',
+		'MOTE_L152RC',
     ]
 
     FILE_TYPES = {
diff --git a/workspace_tools/targets.py b/workspace_tools/targets.py
index cbf01b6f98..e492c25823 100755
--- a/workspace_tools/targets.py
+++ b/workspace_tools/targets.py
@@ -695,7 +695,7 @@ class MTS_MDOT_F411RE(Target):
         self.supported_toolchains = ["ARM", "uARM", "GCC_ARM", "IAR"]
         self.default_toolchain = "uARM"
 
-class SEMTECH_LORA915(Target):
+class MOTE_L152RC(Target):
     def __init__(self):
         Target.__init__(self)
         self.core = "Cortex-M3"
@@ -1049,7 +1049,7 @@ TARGETS = [
     DISCO_L053C8(),
     MTS_MDOT_F405RG(),
     MTS_MDOT_F411RE(),
-    SEMTECH_LORA915(),
+    MOTE_L152RC(),
     MTS_DRAGONFLY_F411RE(),
     DISCO_F401VC(),
     UBLOX_C029(),   # STM32F439