mirror of https://github.com/ARMmbed/mbed-os.git
Modifying the code to support mbed OS 5 -> add mbed_rtx.h
Modifying the code for mbed ci shield test -> analogin_api.c, W7500x_adc.c, gpio_irq_api.c, W7500x_gpio.c Modifying the code for fix bug -> W7500x_uart.c(register control driver problem), W7500x_uart.h, pinmap.c(pullup, pulldown problem)pull/4226/head
justinkim
parent
0b5b6cba71
commit
4fa76dc4f9
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@ -42,6 +42,7 @@ void ADC_InterruptClear (void)
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void ADC_Init (void)
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{
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// ADC_CLK on
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ADC_PowerDownEnable(ENABLE);
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ADC_PowerDownEnable(DISABLE);
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//ADC_ChannelSelect(num);
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}
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@ -67,6 +67,8 @@ void HAL_GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct)
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assert_param(IS_GPIO_PIN(GPIO_InitStruct->GPIO_Pin));
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// assert_param(IS_GPIO_PUPD(GPIO_InitStruct->GPIO_PuPd));
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GPIOx->INTTYPESET = 0x00FF;
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if (GPIOx == GPIOA) px_pcr = PA_PCR;
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else if (GPIOx == GPIOB) px_pcr = PB_PCR;
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else if (GPIOx == GPIOC) px_pcr = PC_PCR;
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@ -260,26 +262,30 @@ void HAL_PAD_AFConfig(PAD_Type Px, uint16_t GPIO_Pin, PAD_AF_TypeDef P_AF)
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if(Px == PAD_PA)
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{
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assert_param(IS_PA_NUM(i));
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PA_AFSR->Port[i] &= ~(0x03ul);
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PA_AFSR->Port[i] |= P_AF;
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//PA_AFSR->Port[i] &= ~(0x03ul);
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//PA_AFSR->Port[i] |= P_AF;
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PA_AFSR->Port[i] = P_AF;
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}
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else if(Px == PAD_PB)
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{
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assert_param(IS_PB_NUM(i));
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PB_AFSR->Port[i] &= ~(0x03ul);
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PB_AFSR->Port[i] |= P_AF;
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//PB_AFSR->Port[i] &= ~(0x03ul);
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//PB_AFSR->Port[i] |= P_AF;
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PB_AFSR->Port[i] = P_AF;
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}
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else if(Px == PAD_PC)
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{
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assert_param(IS_PC_NUM(i));
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PC_AFSR->Port[i] &= ~(0x03ul);
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PC_AFSR->Port[i] |= P_AF;
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//PC_AFSR->Port[i] &= ~(0x03ul);
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//PC_AFSR->Port[i] |= P_AF;
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PC_AFSR->Port[i] = P_AF;
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}
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else
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{
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assert_param(IS_PD_NUM(i));
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PD_AFSR->Port[i] &= ~(0x03ul);
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PD_AFSR->Port[i] |= P_AF;
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//PD_AFSR->Port[i] &= ~(0x03ul);
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//PD_AFSR->Port[i] |= P_AF;
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PD_AFSR->Port[i] = P_AF;
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}
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}
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}
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@ -1,21 +1,59 @@
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/*******************************************************************************************************************************************************
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* Copyright ¨Ï 2016 <WIZnet Co.,Ltd.>
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* Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the ¡°Software¡±),
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* to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
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* THE SOFTWARE IS PROVIDED ¡°AS IS¡±, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*********************************************************************************************************************************************************/
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/**
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******************************************************************************
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* @file W7500x_uart.c
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* @author
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* @version
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* @date
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* @brief
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* @file W7500x_stdPeriph_Driver/src/W7500x_uart.c
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* @author IOP Team
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* @version v1.0.0
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* @date 01-May-2015
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* @brief This file contains all the functions prototypes for the uart
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* firmware library.
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******************************************************************************
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* @attention
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*
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*
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "W7500x.h"
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#include "W7500x_uart.h"
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/** @addtogroup W7500x_Periph_Driver
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* @{
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*/
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/** @defgroup UART
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* @brief UART driver modules
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* @{
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*/
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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/* Private functions ---------------------------------------------------------*/
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/** @defgroup UART_Private_Functions
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* @{
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*/
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/**
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* @brief Fills each UART_InitStruct member with its default value.
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* @param UART_StructInit: pointer to a UART_InitTypeDef structure which will
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* be initialized.
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* @retval None
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*/
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void UART_StructInit(UART_InitTypeDef* UART_InitStruct)
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{
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/* UART_InitStruct members default value */
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@ -27,17 +65,31 @@ void UART_StructInit(UART_InitTypeDef* UART_InitStruct)
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UART_InitStruct->UART_HardwareFlowControl = UART_HardwareFlowControl_None ;
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}
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/* Function check */
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/* This function is checking now. Update or remove maybe. */
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//Why be????
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void UART_DeInit(UART_TypeDef *UARTx)
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{
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}
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/**
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* @brief Initializes the UART peripheral according to the specified
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* parameters in the UART_InitStruct .
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* @param UARTx: where x can be 1, 2 or 3
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* @param UART_InitStruct: pointer to a UART_InitTypeDef structure that contains
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* the configuration information for the specified UART peripheral.
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* @retval None
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*/
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uint32_t UART_Init(UART_TypeDef *UARTx, UART_InitTypeDef* UART_InitStruct)
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{
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float baud_divisor;
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uint32_t tmpreg=0x00, uartclock=0x00;
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uint32_t integer_baud = 0x00, fractional_baud = 0x00;
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/* Check the parameters */
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assert_param(IS_UART_01_PERIPH(UARTx));
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assert_param(IS_UART_WORD_LENGTH(UART_InitStruct->UART_WordLength));
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assert_param(IS_UART_PARITY(UART_InitStruct->UART_Parity));
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@ -45,13 +97,19 @@ uint32_t UART_Init(UART_TypeDef *UARTx, UART_InitTypeDef* UART_InitStruct)
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assert_param(IS_UART_HARDWARE_FLOW_CONTROL(UART_InitStruct->UART_HardwareFlowControl));
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assert_param(IS_UART_MODE(UART_InitStruct->UART_Mode));
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/* Write to UART CR */
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UARTx->CR &= ~(UART_CR_UARTEN);
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// Set baudrate
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/* Set baudrate */
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/* CRG_UARTCLK_SSR_RCLK: Set UART Clock using internal Oscilator ( 8MHz ) */
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/* CRG_UARTCLK_SSR_OCLK: Set UART Clock using external Oscilator */
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CRG->UARTCLK_SSR = CRG_UARTCLK_SSR_RCLK; // Set UART Clock using internal Oscilator ( 8MHz )
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//CRG->UARTCLK_SSR = CRG_UARTCLK_SSR_OCLK; // Set UART Clock using external Oscilator
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/* Set uartclock */
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uartclock = (8000000UL) / (1 << CRG->UARTCLK_PVSR);
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/*----------------------------- UARTx IBRD and FBRD Configuration ------------------------------*/
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baud_divisor = ((float)uartclock / (16 * UART_InitStruct->UART_BaudRate));
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integer_baud = (uint32_t)baud_divisor;
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fractional_baud = (uint32_t)((baud_divisor - integer_baud) * 64 + 0.5);
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@ -63,35 +121,77 @@ uint32_t UART_Init(UART_TypeDef *UARTx, UART_InitTypeDef* UART_InitStruct)
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tmpreg = UARTx->LCR_H;
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tmpreg &= ~(0x00EE);
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tmpreg |= (UART_InitStruct->UART_WordLength | UART_InitStruct->UART_StopBits | UART_InitStruct->UART_Parity);
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UARTx->LCR_H |= tmpreg;
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UARTx->LCR_H = tmpreg;
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tmpreg = UARTx->CR;
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tmpreg &= ~(UART_CR_CTSEn | UART_CR_RTSEn | UART_CR_RXE | UART_CR_TXE | UART_CR_UARTEN);
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tmpreg |= (UART_InitStruct->UART_Mode | UART_InitStruct->UART_HardwareFlowControl);
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UARTx->CR |= tmpreg;
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UARTx->CR = tmpreg;
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/* Debug */
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/* UARTx->LCR_H |=0x10; */
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/* UARTx->IFLS | = 0x00; */
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UARTx->CR |= UART_CR_UARTEN;
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return 0;
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}
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/**
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* @brief UART_FIFO_Enable
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* @param case rx_fifo_level=0: 1/8 full, case rx_fifo_level=1: 1/4 full, case rx_fifo_level=2: 1/2 full,
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* case rx_fifo_level=3: 3/4 full, case rx_fifo_level=4: 7/8 full
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* @param case tx_fifo_level=0: 1/8 full, case tx_fifo_level=1: 1/4 full, case tx_fifo_level=2: 1/2 full,
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* case tx_fifo_level=3: 3/4 full, case tx_fifo_level=4: 7/8 full
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* @retval None
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*/
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void UART_FIFO_Enable(UART_TypeDef *UARTx, uint16_t rx_fifo_level, uint16_t tx_fifo_level)
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{
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UARTx->LCR_H |= UART_LCR_H_FEN;
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UARTx->IFLS = (UART_IFLS_RXIFLSEL(rx_fifo_level) | UART_IFLS_TXIFLSEL(tx_fifo_level));
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}
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/**
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* @brief UART_FIFO_Disable
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* @param UARTx: Define structure at "W7500x.h"
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* @retval None
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*/
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void UART_FIFO_Disable(UART_TypeDef *UARTx)
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{
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UARTx->LCR_H &= ~(UART_LCR_H_FEN);
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}
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/**
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* @brief UART_SendData
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* @param UARTx: Define structure at "W7500x.h"
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* @param Data: Unsigned short value
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* @retval None
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*/
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void UART_SendData(UART_TypeDef* UARTx, uint16_t Data)
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{
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/* Check the parameters */
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assert_param(IS_UART_01_PERIPH(UARTx));
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UARTx->DR = Data;
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}
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/**
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* @brief UART_ReceiveData
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* @param UARTx: Define structure at "W7500x.h"
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* @retval None
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*/
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uint16_t UART_ReceiveData(UART_TypeDef* UARTx)
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{
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/* Check the parameters */
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assert_param(IS_UART_01_PERIPH(UARTx));
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return (uint16_t)(UARTx->DR);
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}
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/**
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* @brief UART_SendBreak
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* @param UARTx: Define structure at "W7500x.h"
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* @retval None
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*/
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void UART_SendBreak(UART_TypeDef* UARTx)
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{
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assert_param(IS_UART_01_PERIPH(UARTx));
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@ -99,11 +199,17 @@ void UART_SendBreak(UART_TypeDef* UARTx)
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UARTx->LCR_H |= UART_LCR_H_BRK;
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}
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/**
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* @brief UART_GetRecvStatus
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* @param UARTx: Define structure at "W7500x.h"
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* @param UART_RECV_STATUS
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* @retval bitstatus
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*/
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FlagStatus UART_GetRecvStatus(UART_TypeDef* UARTx, uint16_t UART_RECV_STATUS)
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{
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FlagStatus bitstatus = RESET;
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/* Check the parameters */
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assert_param(IS_UART_01_PERIPH(UARTx));
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assert_param(IS_UART_RECV_STATUS(UART_RECV_STATUS));
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@ -119,29 +225,44 @@ FlagStatus UART_GetRecvStatus(UART_TypeDef* UARTx, uint16_t UART_RECV_STATUS)
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return bitstatus;
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}
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/**
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* @brief UART_ClearRecvStatus
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* @param UARTx: Define structure at "W7500x.h"
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* @param UART_RECV_STATUS
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* @retval None
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*/
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void UART_ClearRecvStatus(UART_TypeDef* UARTx, uint16_t UART_RECV_STATUS)
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{
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/* Check the parameters */
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assert_param(IS_UART_01_PERIPH(UARTx));
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assert_param(IS_UART_RECV_STATUS(UART_RECV_STATUS));
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/* Set STATUS.ECR*/
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UARTx->STATUS.ECR = (uint16_t)UART_RECV_STATUS;
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}
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/**
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* @brief UART_GetFlagStatus
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* @param UARTx: Define structure at "W7500x.h"
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* @param UART_FLAG
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* @retval bitstatus
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*/
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FlagStatus UART_GetFlagStatus(UART_TypeDef* UARTx, uint16_t UART_FLAG)
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{
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FlagStatus bitstatus = RESET;
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/* Check the parameters */
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assert_param(IS_UART_01_PERIPH(UARTx));
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assert_param(IS_UART_FLAG(UART_FLAG));
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if ((UARTx->FR & UART_FLAG) != (uint16_t)RESET)
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{
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/* bitstatus setting to SET*/
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bitstatus = SET;
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}
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else
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{
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/*bitstatus setting to RESET*/
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bitstatus = RESET;
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}
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@ -149,109 +270,194 @@ FlagStatus UART_GetFlagStatus(UART_TypeDef* UARTx, uint16_t UART_FLAG)
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}
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/*
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/* Function check */
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/* This function is checking now. Update or remove maybe. */
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//Why be?
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void UART_ClearFlag(UART_TypeDef* UARTx, uint16_t UART_FLAG)
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{
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}
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*/
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/**
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* @brief UART_ITConfig
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* @param UARTx: Define structure at "W7500x.h"
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* @param UART_IT
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* @param NewState
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* @retval None
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*/
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void UART_ITConfig(UART_TypeDef* UARTx, uint16_t UART_IT, FunctionalState NewState)
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{
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/* Check the parameters */
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assert_param(IS_UART_01_PERIPH(UARTx));
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assert_param(IS_UART_IT_FLAG(UART_IT));
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if ( NewState != DISABLE )
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{
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/*Set the IMSC*/
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UARTx->IMSC |= UART_IT;
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}
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else
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{
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/*Set the ICR*/
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UARTx->ICR |= UART_IT;
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}
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}
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/**
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* @brief UART_GetITStatus
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* @param UARTx: Define structure at "W7500x.h"
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* @param UART_IT
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* @param bitstatus
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* @retval None
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*/
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ITStatus UART_GetITStatus(UART_TypeDef* UARTx, uint16_t UART_IT)
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{
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ITStatus bitstatus = RESET;
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/* Check the parameters */
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assert_param(IS_UART_01_PERIPH(UARTx));
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assert_param(IS_UART_IT_FLAG(UART_IT));
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if ((UARTx->MIS & UART_IT) != (uint16_t)RESET)
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{
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/*Set bitstatus = SET */
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bitstatus = SET;
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}
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else
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{
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/*Set bitstatus = RESET */
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bitstatus = RESET;
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}
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return bitstatus;
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}
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/**
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* @brief UART_ITPendingBit
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* @param UARTx: Define structure at "W7500x.h"
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* @param UART_IT
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* @retval None
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*/
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void UART_ClearITPendingBit(UART_TypeDef* UARTx, uint16_t UART_IT)
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{
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/* Check the parameters */
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assert_param(IS_UART_01_PERIPH(UARTx));
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assert_param(IS_UART_IT_FLAG(UART_IT));
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/* Set ICR */
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UARTx->ICR |= UART_IT;
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}
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/**
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* @brief UART_DMA_Config
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* @param UARTx: Define structure at "W7500x.h"
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* @param UART_DMA_CONTROL
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* @retval None
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*/
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void UART_DMA_Config(UART_TypeDef* UARTx, uint16_t UART_DMA_CONTROL)
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{
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/* Check the parameters */
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assert_param(IS_UART_01_PERIPH(UARTx));
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assert_param(IS_UART_DMA_CONTROL(UART_DMA_CONTROL));
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/*Set DMACR */
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UARTx->DMACR |= UART_DMA_CONTROL;
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}
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/* Function check */
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/* This function is checking now. Update or remove maybe. */
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//Why be?
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void S_UART_DeInit()
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{
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}
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/**
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* @brief S_UART_Init
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* @param baud
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* @retval None
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*/
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uint32_t S_UART_Init(uint32_t baud)
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{
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uint32_t tmpreg=0x00;
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S_UART_SetBaud(baud);
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/* Set temp register for UART2 CTRL */
|
||||
tmpreg = UART2->CTRL;
|
||||
tmpreg &= ~(S_UART_CTRL_RX_EN | S_UART_CTRL_TX_EN);
|
||||
tmpreg |= (S_UART_CTRL_RX_EN | S_UART_CTRL_TX_EN);
|
||||
|
||||
/* Write to UART2 CTRL */
|
||||
UART2->CTRL = tmpreg;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief S_UART_SetBaud
|
||||
* @param baud
|
||||
* @retval None
|
||||
*/
|
||||
void S_UART_SetBaud(uint32_t baud)
|
||||
{
|
||||
uint32_t uartclock = 0x00, integer_baud = 0x00;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_UART_MODE(S_UART_InitStruct->UART_Mode));
|
||||
|
||||
if(CRG->FCLK_SSR == CRG_FCLK_SSR_RCLK)
|
||||
{
|
||||
/* Set uartclock: INTERN_XTAL */
|
||||
uartclock = INTERN_XTAL;
|
||||
}
|
||||
else if(CRG->FCLK_SSR == CRG_FCLK_SSR_OCLK)
|
||||
{
|
||||
/* Set uartclock: EXTERN_XTAL */
|
||||
uartclock = EXTERN_XTAL;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Set uartclock: GetSystemClock */
|
||||
uartclock = GetSystemClock();
|
||||
}
|
||||
|
||||
/* Set (Calculate) integer_baud */
|
||||
integer_baud = (uint32_t)(uartclock / baud);
|
||||
/* Write UART2 BAUDDIV */
|
||||
UART2->BAUDDIV = integer_baud;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief S_UART_SendData
|
||||
* @param Data
|
||||
* @retval None
|
||||
*/
|
||||
void S_UART_SendData(uint16_t Data)
|
||||
{
|
||||
while(UART2->STATE & S_UART_STATE_TX_BUF_FULL);
|
||||
/* Write UART2 DATA */
|
||||
UART2->DATA = Data;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief S_UART_ReceiveData
|
||||
* @retval UART2 DATA
|
||||
*/
|
||||
uint16_t S_UART_ReceiveData()
|
||||
{
|
||||
return (uint16_t)(UART2->DATA);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief S_UART_GetFlagStatus
|
||||
* @param UART_STATE
|
||||
* @retval bitstatus
|
||||
*/
|
||||
FlagStatus S_UART_GetFlagStatus(uint16_t S_UART_STATE)
|
||||
{
|
||||
FlagStatus bitstatus = RESET;
|
||||
|
|
@ -270,6 +476,13 @@ FlagStatus S_UART_GetFlagStatus(uint16_t S_UART_STATE)
|
|||
return bitstatus;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief S_UART_SetCTRL
|
||||
* @param S_UART_CTRL
|
||||
* @param NewState
|
||||
* @retval None
|
||||
*/
|
||||
void S_UART_SetCTRL(uint16_t S_UART_CTRL, FunctionalState NewState)
|
||||
{
|
||||
if ( NewState != DISABLE )
|
||||
|
|
@ -283,49 +496,77 @@ void S_UART_SetCTRL(uint16_t S_UART_CTRL, FunctionalState NewState)
|
|||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief S_UART_ITConfig
|
||||
* @param S_UART_CTRL
|
||||
* @param NewState
|
||||
* @retval None
|
||||
*/
|
||||
void S_UART_ITConfig(uint16_t S_UART_CTRL, FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_S_UART_CTRL_FLAG(S_UART_CTRL));
|
||||
|
||||
if ( NewState != DISABLE )
|
||||
{
|
||||
/* Set UART2 CTRL: S_UART_CTRL */
|
||||
UART2->CTRL |= S_UART_CTRL;
|
||||
}
|
||||
else
|
||||
{
|
||||
/*Set UART2 CTRL: ~S_UART_CTRL */
|
||||
UART2->CTRL &= ~(S_UART_CTRL);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief S_UART_GetTStatus
|
||||
* @param S_UART_INTSTATUS
|
||||
* @retval bitstatus
|
||||
*/
|
||||
ITStatus S_UART_GetITStatus(uint16_t S_UART_INTSTATUS)
|
||||
{
|
||||
ITStatus bitstatus = RESET;
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_S_UART_INTSATUS(S_UART_INTSTATUS));
|
||||
|
||||
if ((UART2->INT.STATUS & (S_UART_INTSTATUS)) != (uint16_t) RESET)
|
||||
{
|
||||
/* Set bitstatus: SET */
|
||||
bitstatus = SET;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Set bitstatus: RESET */
|
||||
bitstatus = RESET;
|
||||
}
|
||||
|
||||
return bitstatus;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief S_UART_ClearITPendingBit
|
||||
* @param S_UART_INTSTATUS
|
||||
* @retval None
|
||||
*/
|
||||
void S_UART_ClearITPendingBit(uint16_t S_UART_INTSTATUS)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_S_UART_INTSATUS(S_UART_INTSTATUS));
|
||||
|
||||
/* Write UART2 INT.CLEAR: S_UART_INSTATUS */
|
||||
UART2->INT.CLEAR |= (S_UART_INTSTATUS);
|
||||
}
|
||||
|
||||
|
||||
|
||||
/**************************************************/
|
||||
// It will be moved to application board's driver */
|
||||
/**************************************************/
|
||||
|
||||
|
||||
uint8_t UartPutc(UART_TypeDef* UARTx, uint8_t ch)
|
||||
{
|
||||
UART_SendData(UARTx,ch);
|
||||
|
|
@ -335,6 +576,8 @@ uint8_t UartPutc(UART_TypeDef* UARTx, uint8_t ch)
|
|||
return (ch);
|
||||
}
|
||||
|
||||
|
||||
|
||||
void UartPuts(UART_TypeDef* UARTx, uint8_t *str)
|
||||
{
|
||||
uint8_t ch;
|
||||
|
|
@ -349,6 +592,7 @@ void UartPuts(UART_TypeDef* UARTx, uint8_t *str)
|
|||
}while(ch != 0);
|
||||
}
|
||||
|
||||
|
||||
uint8_t UartGetc(UART_TypeDef* UARTx)
|
||||
{
|
||||
while(UARTx->FR & UART_FR_RXFE);
|
||||
|
|
@ -364,6 +608,8 @@ uint8_t S_UartPutc(uint8_t ch)
|
|||
return (ch);
|
||||
}
|
||||
|
||||
|
||||
|
||||
void S_UartPuts(uint8_t *str)
|
||||
{
|
||||
uint8_t ch;
|
||||
|
|
@ -378,6 +624,7 @@ void S_UartPuts(uint8_t *str)
|
|||
}while(ch != 0);
|
||||
}
|
||||
|
||||
|
||||
uint8_t S_UartGetc()
|
||||
{
|
||||
while( (UART2->STATE & S_UART_STATE_RX_BUF_FULL) == 0 );
|
||||
|
|
@ -385,3 +632,16 @@ uint8_t S_UartGetc()
|
|||
}
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -1,9 +1,22 @@
|
|||
/*******************************************************************************************************************************************************
|
||||
* Copyright ¨Ï 2016 <WIZnet Co.,Ltd.>
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the ¡°Software¡±),
|
||||
* to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
|
||||
|
||||
* THE SOFTWARE IS PROVIDED ¡°AS IS¡±, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
||||
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
|
||||
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*********************************************************************************************************************************************************/
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file
|
||||
* @author
|
||||
* @version
|
||||
* @date
|
||||
* @file W7500x_stdPeriph_Driver/inc/W7500x_uart.h
|
||||
* @author IOP Team
|
||||
* @version V1.0.0
|
||||
* @date 01-May-2015
|
||||
* @brief This file contains all the functions prototypes for the UART
|
||||
* firmware library.
|
||||
******************************************************************************
|
||||
|
|
@ -23,6 +36,15 @@
|
|||
#include "W7500x.h"
|
||||
|
||||
|
||||
/** @addtogroup W7500x_Periph_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup UART
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
||||
/**
|
||||
* @brief UART Init Structure definition
|
||||
*/
|
||||
|
|
@ -108,7 +130,8 @@ typedef struct
|
|||
#define UART_Mode_Rx ((uint16_t)(UART_CR_RXE))
|
||||
#define UART_Mode_Tx ((uint16_t)(UART_CR_TXE))
|
||||
#define IS_UART_MODE(MODE) (((MODE) == UART_Mode_Rx) || \
|
||||
((MODE) == UART_Mode_Tx))
|
||||
((MODE) == UART_Mode_Tx) || \
|
||||
((MODE) == (URAT_Mode_Rx | UART_Mode_Tx)))
|
||||
|
||||
/**
|
||||
* @}
|
||||
|
|
@ -133,6 +156,22 @@ typedef struct
|
|||
*/
|
||||
|
||||
|
||||
/** @addtogroup UART_DMA_Control
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define UART_DMAControl_DMAONERR ((uint16_t)UART_DMACR_DMAONERR)
|
||||
#define UART_DMAControl_RXDMAE ((uint16_t)UART_DMACR_TXDMAE)
|
||||
#define UART_DMAControl_TXDMAE ((uint16_t)UART_DMACR_RXDMAE)
|
||||
#define IS_UART_DMA_CONTROL(CONTROL) \
|
||||
(((CONTROL) == UART_DMAControl_DMAONERR) || \
|
||||
((CONTROL) == UART_DMAControl_TXDMAE) || \
|
||||
((CONTROL) == UART_DMAControl_RXDMAE))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @addtogroup UART_Receive Status
|
||||
* @{
|
||||
*/
|
||||
|
|
@ -183,7 +222,7 @@ typedef struct
|
|||
#define UART_IT_FLAG_FEI ((uint16_t)0x01UL << 7) /*!< Framing error interrupt */
|
||||
#define UART_IT_FLAG_RTI ((uint16_t)0x01UL << 6) /*!< Receive timeout interrupt */
|
||||
#define UART_IT_FLAG_TXI ((uint16_t)0x01UL << 5) /*!< Transmit interrupt */
|
||||
#define UART_IT_FLAG_RXI ((uint16_t)0x01UL << 4) /*!< Receive interrupt */
|
||||
#define UART_IT_FLAG_RXI ((uint16_t)0x01UL << 4) /*!< Receive interruptt */
|
||||
#define UART_IT_FLAG_DSRMI ((uint16_t)0x01UL << 3) /*!< UARTDSR modem interrupt */
|
||||
#define UART_IT_FLAG_DCDMI ((uint16_t)0x01UL << 2) /*!< UARTDCD modem interrupt */
|
||||
#define UART_IT_FLAG_CTSMI ((uint16_t)0x01UL << 1) /*!< UARTCTS modem interrupt */
|
||||
|
|
@ -273,6 +312,8 @@ typedef struct
|
|||
void UART_StructInit (UART_InitTypeDef* UART_InitStruct);
|
||||
|
||||
uint32_t UART_Init (UART_TypeDef *UARTx, UART_InitTypeDef* UART_InitStruct);
|
||||
void UART_FIFO_Enable (UART_TypeDef *UARTx, uint16_t rx_fifo_level, uint16_t tx_fifo_level);
|
||||
void UART_FIFO_Disable (UART_TypeDef *UARTx);
|
||||
void UART_SendData (UART_TypeDef* UARTx, uint16_t Data);
|
||||
uint16_t UART_ReceiveData (UART_TypeDef* UARTx);
|
||||
void UART_SendBreak (UART_TypeDef* UARTx);
|
||||
|
|
@ -281,6 +322,7 @@ FlagStatus UART_GetFlagStatus (UART_TypeDef* UARTx, uint16_t UART_FLAG);
|
|||
void UART_ITConfig (UART_TypeDef* UARTx, uint16_t UART_IT, FunctionalState NewState);
|
||||
ITStatus UART_GetITStatus (UART_TypeDef* UARTx, uint16_t UART_IT);
|
||||
void UART_ClearITPendingBit (UART_TypeDef* UARTx, uint16_t UART_IT);
|
||||
void UART_DMA_Config(UART_TypeDef* UARTx, uint16_t UART_DMA_CONTROL);
|
||||
|
||||
uint8_t UartPutc (UART_TypeDef* UARTx, uint8_t ch);
|
||||
void UartPuts (UART_TypeDef* UARTx, uint8_t *str);
|
||||
|
|
@ -311,3 +353,10 @@ void S_UART_ClearITPendingBit(uint16_t S_UART_IT);
|
|||
|
||||
#endif // __W7500X_UART_H
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -58,11 +58,11 @@ void analogin_init(analogin_t *obj, PinName pin)
|
|||
obj->pin = pin;
|
||||
|
||||
// The ADC initialization is done once
|
||||
if (adc_inited == 0) {
|
||||
//if (adc_inited == 0) {
|
||||
adc_inited = 1;
|
||||
|
||||
ADC_Init();
|
||||
}
|
||||
//}
|
||||
}
|
||||
|
||||
static inline uint16_t adc_read(analogin_t *obj)
|
||||
|
|
|
|||
|
|
@ -43,6 +43,8 @@ static gpio_irq_handler irq_handler;
|
|||
|
||||
static uint32_t channel_ids[4][16];
|
||||
|
||||
uint32_t test_tmp = 0;
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"{
|
||||
#endif
|
||||
|
|
@ -50,22 +52,27 @@ void port_generic_handler(GPIO_TypeDef* GPIOx, uint32_t port_num);
|
|||
|
||||
void PORT0_Handler(void)
|
||||
{
|
||||
NVIC_ClearPendingIRQ(PORT0_IRQn);
|
||||
port_generic_handler(GPIOA, 0);
|
||||
test_tmp++;
|
||||
}
|
||||
|
||||
void PORT1_Handler(void)
|
||||
{
|
||||
port_generic_handler(GPIOB, 1);
|
||||
test_tmp++;
|
||||
}
|
||||
|
||||
void PORT2_Handler(void)
|
||||
{
|
||||
port_generic_handler(GPIOC, 2);
|
||||
test_tmp++;
|
||||
}
|
||||
|
||||
void PORT3_Handler(void)
|
||||
{
|
||||
port_generic_handler(GPIOD, 3);
|
||||
test_tmp++;
|
||||
}
|
||||
|
||||
void port_generic_handler(GPIO_TypeDef* GPIOx, uint32_t port_num)
|
||||
|
|
@ -99,6 +106,8 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32
|
|||
obj->pin_num = WIZ_PIN_NUM(pin);
|
||||
obj->pin_index = WIZ_PIN_INDEX(pin);
|
||||
|
||||
//gpio_irq_disable(obj);
|
||||
|
||||
if (pin == NC) return -1;
|
||||
|
||||
if(obj->port_num == 0)
|
||||
|
|
@ -110,10 +119,11 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32
|
|||
else
|
||||
obj->irq_n = PORT3_IRQn;
|
||||
|
||||
//obj->event = EDGE_FALL;
|
||||
obj->event = EDGE_NONE;
|
||||
obj->pin = pin;
|
||||
|
||||
// Enable EXTI interrupt
|
||||
NVIC_ClearPendingIRQ(obj->irq_n);
|
||||
NVIC_EnableIRQ(obj->irq_n);
|
||||
|
||||
channel_ids[obj->port_num][obj->pin_num] = id;
|
||||
|
|
@ -141,10 +151,14 @@ void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
|
|||
obj->rise_null = 0;
|
||||
}
|
||||
else if (event == IRQ_FALL) {
|
||||
gpio->INTPOLSET &= ~obj->pin_index;
|
||||
//gpio->INTPOLSET &= ~obj->pin_index;
|
||||
gpio->INTPOLCLR |= obj->pin_index;
|
||||
obj->event = EDGE_FALL;
|
||||
obj->fall_null = 0;
|
||||
}
|
||||
|
||||
|
||||
gpio->INTENCLR |= obj->pin_index;
|
||||
gpio->INTTYPESET |= obj->pin_index;
|
||||
gpio->INTENSET |= obj->pin_index;
|
||||
|
||||
|
|
|
|||
|
|
@ -119,15 +119,31 @@ void pin_mode(PinName pin, PinMode pupd)
|
|||
|
||||
switch(port_num) {
|
||||
case PortA:
|
||||
if(pupd != 0)
|
||||
{
|
||||
PA_PCR->Port[pin_num] &= 0xFFFFFFFC;
|
||||
}
|
||||
PA_PCR->Port[pin_num] |= pupd;
|
||||
break;
|
||||
case PortB:
|
||||
if(pupd != 0)
|
||||
{
|
||||
PB_PCR->Port[pin_num] &= 0xFFFFFFFC;
|
||||
}
|
||||
PB_PCR->Port[pin_num] |= pupd;
|
||||
break;
|
||||
case PortC:
|
||||
if(pupd != 0)
|
||||
{
|
||||
PC_PCR->Port[pin_num] &= 0xFFFFFFFC;
|
||||
}
|
||||
PC_PCR->Port[pin_num] |= pupd;
|
||||
break;
|
||||
case PortD:
|
||||
if(pupd != 0)
|
||||
{
|
||||
PD_PCR->Port[pin_num] &= 0xFFFFFFFC;
|
||||
}
|
||||
PD_PCR->Port[pin_num] |= pupd;
|
||||
break;
|
||||
default:
|
||||
|
|
|
|||
|
|
@ -0,0 +1,67 @@
|
|||
/* mbed Microcontroller Library
|
||||
* Copyright (c) 2016 ARM Limited
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef MBED_MBED_RTX_H
|
||||
#define MBED_MBED_RTX_H
|
||||
|
||||
#if defined(TARGET_WIZWIKI_W7500)
|
||||
|
||||
#ifndef INITIAL_SP
|
||||
#define INITIAL_SP (0x20004000UL)
|
||||
#endif
|
||||
#ifndef OS_TASKCNT
|
||||
#define OS_TASKCNT 6
|
||||
#endif
|
||||
#ifndef OS_MAINSTKSIZE
|
||||
#define OS_MAINSTKSIZE 128
|
||||
#endif
|
||||
#ifndef OS_CLOCK
|
||||
#define OS_CLOCK 20000000
|
||||
#endif
|
||||
|
||||
#elif defined(TARGET_WIZWIKI_W7500P)
|
||||
|
||||
#ifndef INITIAL_SP
|
||||
#define INITIAL_SP (0x20004000UL)
|
||||
#endif
|
||||
#ifndef OS_TASKCNT
|
||||
#define OS_TASKCNT 6
|
||||
#endif
|
||||
#ifndef OS_MAINSTKSIZE
|
||||
#define OS_MAINSTKSIZE 128
|
||||
#endif
|
||||
#ifndef OS_CLOCK
|
||||
#define OS_CLOCK 20000000
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
#elif defined(TARGET_WIZWIKI_W7500ECO)
|
||||
|
||||
#ifndef INITIAL_SP
|
||||
#define INITIAL_SP (0x20004000UL)
|
||||
#endif
|
||||
#ifndef OS_TASKCNT
|
||||
#define OS_TASKCNT 6
|
||||
#endif
|
||||
#ifndef OS_MAINSTKSIZE
|
||||
#define OS_MAINSTKSIZE 128
|
||||
#endif
|
||||
#ifndef OS_CLOCK
|
||||
#define OS_CLOCK 20000000
|
||||
#endif
|
||||
|
||||
#endif // MBED_MBED_RTX_H
|
||||
|
|
@ -2460,7 +2460,7 @@
|
|||
"supported_toolchains": ["uARM", "ARM"],
|
||||
"inherits": ["Target"],
|
||||
"device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
|
||||
"release_versions": ["2"]
|
||||
"release_versions": ["2", "5"]
|
||||
},
|
||||
"WIZWIKI_W7500P": {
|
||||
"supported_form_factors": ["ARDUINO"],
|
||||
|
|
@ -2469,7 +2469,7 @@
|
|||
"supported_toolchains": ["uARM", "ARM"],
|
||||
"inherits": ["Target"],
|
||||
"device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
|
||||
"release_versions": ["2"]
|
||||
"release_versions": ["2", "5"]
|
||||
},
|
||||
"WIZWIKI_W7500ECO": {
|
||||
"inherits": ["Target"],
|
||||
|
|
@ -2477,7 +2477,7 @@
|
|||
"extra_labels": ["WIZNET", "W7500x", "WIZwiki_W7500ECO"],
|
||||
"supported_toolchains": ["uARM", "ARM"],
|
||||
"device_has": ["ANALOGIN", "I2C", "INTERRUPTIN", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SPI", "SPISLAVE", "STDIO_MESSAGES"],
|
||||
"release_versions": ["2"]
|
||||
"release_versions": ["2", "5"]
|
||||
},
|
||||
"SAMR21G18A": {
|
||||
"inherits": ["Target"],
|
||||
|
|
|
|||
Loading…
Reference in New Issue