From 4f95500dc917bf0cc3615dad18cc0ba2e9caafa2 Mon Sep 17 00:00:00 2001 From: jeromecoutant Date: Fri, 16 Oct 2020 10:29:36 +0200 Subject: [PATCH] STM32G4: target directoty restructuration - Alignment with other STM32 families - Subfamily level in targets.json --- .../TOOLCHAIN_ARM}/startup_stm32g431xx.S | 0 .../TOOLCHAIN_ARM/stm32g431xb.sct} | 12 +- .../TOOLCHAIN_GCC_ARM/startup_stm32g431xx.S | 0 .../TOOLCHAIN_GCC_ARM/stm32g431xb.ld} | 0 .../TOOLCHAIN_IAR/startup_stm32g431xx.S | 0 .../TOOLCHAIN_IAR/stm32g431xb.icf} | 2 +- .../cmsis_nvic.h | 0 .../TARGET_NUCLEO_G431KB/PeripheralPins.c | 258 ----------- .../TARGET_NUCLEO_G431KB/PinNames.h | 79 ---- .../TARGET_NUCLEO_G431RB/PeripheralPins.c | 343 --------------- .../TARGET_NUCLEO_G431RB/PinNames.h | 83 ---- .../TOOLCHAIN_ARM}/startup_stm32g441xx.S | 0 .../TOOLCHAIN_ARM/stm32g441xb.sct} | 12 +- .../TOOLCHAIN_GCC_ARM/startup_stm32g441xx.S | 0 .../TOOLCHAIN_GCC_ARM/stm32g441xb.ld} | 5 +- .../TOOLCHAIN_IAR/startup_stm32g441xx.S | 0 .../TOOLCHAIN_IAR/stm32g441xb.icf} | 2 +- .../cmsis_nvic.h | 4 - .../TOOLCHAIN_ARM}/startup_stm32g471xx.S | 0 .../TOOLCHAIN_ARM/stm32g471xe.sct} | 12 +- .../TOOLCHAIN_GCC_ARM/startup_stm32g471xx.S | 0 .../TOOLCHAIN_GCC_ARM/stm32g471xe.ld} | 5 +- .../TOOLCHAIN_IAR/startup_stm32g471xx.S | 0 .../TOOLCHAIN_IAR/stm32g471xe.icf} | 2 +- .../cmsis_nvic.h | 0 .../TOOLCHAIN_ARM}/startup_stm32g473xx.S | 0 .../TOOLCHAIN_ARM/stm32g473xe.sct} | 12 +- .../TOOLCHAIN_GCC_ARM/startup_stm32g473xx.S | 0 .../TOOLCHAIN_GCC_ARM/stm32g473xe.ld} | 5 +- .../TOOLCHAIN_IAR/startup_stm32g473xx.S | 0 .../TOOLCHAIN_IAR/stm32g473xe.icf} | 2 +- .../cmsis_nvic.h | 0 .../TARGET_NUCLEO_G474RE/PeripheralNames.h | 0 .../TARGET_NUCLEO_G474RE/PeripheralPins.c | 0 .../TARGET_NUCLEO_G474RE/PinNames.h | 0 .../TARGET_NUCLEO_G474RE/system_clock.c | 0 .../TOOLCHAIN_ARM}/startup_stm32g474xx.S | 0 .../TOOLCHAIN_ARM/stm32g474xe.sct | 57 +++ .../TOOLCHAIN_GCC_ARM/startup_stm32g474xx.S | 0 .../TOOLCHAIN_GCC_ARM/stm32g474xe.ld} | 5 +- .../TOOLCHAIN_IAR/startup_stm32g474xx.S | 0 .../TOOLCHAIN_IAR/stm32g474xe.icf} | 2 +- .../cmsis_nvic.h | 3 - .../TARGET_DISCO_G474RE/PeripheralPins.c | 411 ------------------ .../TARGET_DISCO_G474RE/PinNames.h | 83 ---- .../TOOLCHAIN_ARM_STD/stm32g474xx.sct | 57 --- .../TOOLCHAIN_ARM}/startup_stm32g483xx.S | 0 .../TOOLCHAIN_ARM/stm32g483xe.sct | 57 +++ .../TOOLCHAIN_GCC_ARM/startup_stm32g483xx.S | 0 .../TOOLCHAIN_GCC_ARM/stm32g483xe.ld | 203 +++++++++ .../TOOLCHAIN_IAR/startup_stm32g483xx.S | 0 .../TOOLCHAIN_IAR/stm32g483xe.icf} | 2 +- .../cmsis_nvic.h | 4 - .../TOOLCHAIN_ARM_STD/stm32g483xx.sct | 57 --- .../TOOLCHAIN_GCC_ARM/stm32g483xx.ld | 206 --------- .../TOOLCHAIN_ARM}/startup_stm32g484xx.S | 0 .../TOOLCHAIN_ARM/stm32g484xe.sct | 57 +++ .../TOOLCHAIN_GCC_ARM/startup_stm32g484xx.S | 0 .../TOOLCHAIN_GCC_ARM/stm32g484xe.ld | 203 +++++++++ .../TOOLCHAIN_IAR/startup_stm32g484xx.S | 0 .../TOOLCHAIN_IAR/stm32g484xe.icf | 59 +++ .../cmsis_nvic.h | 4 - .../TOOLCHAIN_ARM_STD/stm32g484xx.sct | 57 --- .../TOOLCHAIN_GCC_ARM/stm32g484xx.ld | 206 --------- .../TOOLCHAIN_IAR/stm32g484xx.icf | 59 --- targets/targets.json | 107 ++++- 66 files changed, 762 insertions(+), 1975 deletions(-) rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G431xx/TOOLCHAIN_ARM_STD => TARGET_STM32G431xB/TOOLCHAIN_ARM}/startup_stm32g431xx.S (100%) rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G431xx/TOOLCHAIN_ARM_STD/stm32g431xx.sct => TARGET_STM32G431xB/TOOLCHAIN_ARM/stm32g431xb.sct} (90%) rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G431xx => TARGET_STM32G431xB}/TOOLCHAIN_GCC_ARM/startup_stm32g431xx.S (100%) rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G474xx/TOOLCHAIN_GCC_ARM/stm32g474xx.ld => TARGET_STM32G431xB/TOOLCHAIN_GCC_ARM/stm32g431xb.ld} (100%) rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G431xx => TARGET_STM32G431xB}/TOOLCHAIN_IAR/startup_stm32g431xx.S (100%) rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G431xx/TOOLCHAIN_IAR/stm32g431xx.icf => TARGET_STM32G431xB/TOOLCHAIN_IAR/stm32g431xb.icf} (97%) rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G441xx => TARGET_STM32G431xB}/cmsis_nvic.h (100%) delete mode 100644 targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TARGET_NUCLEO_G431KB/PeripheralPins.c delete mode 100644 targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TARGET_NUCLEO_G431KB/PinNames.h delete mode 100644 targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TARGET_NUCLEO_G431RB/PeripheralPins.c delete mode 100644 targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TARGET_NUCLEO_G431RB/PinNames.h rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G441xx/TOOLCHAIN_ARM_STD => TARGET_STM32G441xB/TOOLCHAIN_ARM}/startup_stm32g441xx.S (100%) rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G441xx/TOOLCHAIN_ARM_STD/stm32g441xx.sct => TARGET_STM32G441xB/TOOLCHAIN_ARM/stm32g441xb.sct} (90%) rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G441xx => TARGET_STM32G441xB}/TOOLCHAIN_GCC_ARM/startup_stm32g441xx.S (100%) rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G431xx/TOOLCHAIN_GCC_ARM/stm32g431xx.ld => TARGET_STM32G441xB/TOOLCHAIN_GCC_ARM/stm32g441xb.ld} (95%) rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G441xx => TARGET_STM32G441xB}/TOOLCHAIN_IAR/startup_stm32g441xx.S (100%) rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G441xx/TOOLCHAIN_IAR/stm32g441xx.icf => TARGET_STM32G441xB/TOOLCHAIN_IAR/stm32g441xb.icf} (97%) rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G431xx => TARGET_STM32G441xB}/cmsis_nvic.h (71%) rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G471xx/TOOLCHAIN_ARM_STD => TARGET_STM32G471xE/TOOLCHAIN_ARM}/startup_stm32g471xx.S (100%) rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G471xx/TOOLCHAIN_ARM_STD/stm32g471xx.sct => TARGET_STM32G471xE/TOOLCHAIN_ARM/stm32g471xe.sct} (90%) rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G471xx => TARGET_STM32G471xE}/TOOLCHAIN_GCC_ARM/startup_stm32g471xx.S (100%) rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G441xx/TOOLCHAIN_GCC_ARM/stm32g441xx.ld => TARGET_STM32G471xE/TOOLCHAIN_GCC_ARM/stm32g471xe.ld} (95%) rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G471xx => TARGET_STM32G471xE}/TOOLCHAIN_IAR/startup_stm32g471xx.S (100%) rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G473xx/TOOLCHAIN_IAR/stm32g473xx.icf => TARGET_STM32G471xE/TOOLCHAIN_IAR/stm32g471xe.icf} (97%) rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G483xx => TARGET_STM32G471xE}/cmsis_nvic.h (100%) rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G473xx/TOOLCHAIN_ARM_STD => TARGET_STM32G473xE/TOOLCHAIN_ARM}/startup_stm32g473xx.S (100%) rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G473xx/TOOLCHAIN_ARM_STD/stm32g473xx.sct => TARGET_STM32G473xE/TOOLCHAIN_ARM/stm32g473xe.sct} (90%) rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G473xx => TARGET_STM32G473xE}/TOOLCHAIN_GCC_ARM/startup_stm32g473xx.S (100%) rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G471xx/TOOLCHAIN_GCC_ARM/stm32g471xx.ld => TARGET_STM32G473xE/TOOLCHAIN_GCC_ARM/stm32g473xe.ld} (95%) rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G473xx => TARGET_STM32G473xE}/TOOLCHAIN_IAR/startup_stm32g473xx.S (100%) rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G471xx/TOOLCHAIN_IAR/stm32g471xx.icf => TARGET_STM32G473xE/TOOLCHAIN_IAR/stm32g473xe.icf} (97%) rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G484xx => TARGET_STM32G473xE}/cmsis_nvic.h (100%) rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G474xx => TARGET_STM32G474xE}/TARGET_NUCLEO_G474RE/PeripheralNames.h (100%) rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G474xx => TARGET_STM32G474xE}/TARGET_NUCLEO_G474RE/PeripheralPins.c (100%) rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G474xx => TARGET_STM32G474xE}/TARGET_NUCLEO_G474RE/PinNames.h (100%) rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G474xx => TARGET_STM32G474xE}/TARGET_NUCLEO_G474RE/system_clock.c (100%) rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G474xx/TOOLCHAIN_ARM_STD => TARGET_STM32G474xE/TOOLCHAIN_ARM}/startup_stm32g474xx.S (100%) create mode 100644 targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xE/TOOLCHAIN_ARM/stm32g474xe.sct rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G474xx => TARGET_STM32G474xE}/TOOLCHAIN_GCC_ARM/startup_stm32g474xx.S (100%) rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G473xx/TOOLCHAIN_GCC_ARM/stm32g473xx.ld => TARGET_STM32G474xE/TOOLCHAIN_GCC_ARM/stm32g474xe.ld} (95%) rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G474xx => TARGET_STM32G474xE}/TOOLCHAIN_IAR/startup_stm32g474xx.S (100%) rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G474xx/TOOLCHAIN_IAR/stm32g474xx.icf => TARGET_STM32G474xE/TOOLCHAIN_IAR/stm32g474xe.icf} (97%) rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G471xx => TARGET_STM32G474xE}/cmsis_nvic.h (77%) delete mode 100644 targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TARGET_DISCO_G474RE/PeripheralPins.c delete mode 100644 targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TARGET_DISCO_G474RE/PinNames.h delete mode 100644 targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TOOLCHAIN_ARM_STD/stm32g474xx.sct rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G483xx/TOOLCHAIN_ARM_STD => TARGET_STM32G483xE/TOOLCHAIN_ARM}/startup_stm32g483xx.S (100%) create mode 100644 targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xE/TOOLCHAIN_ARM/stm32g483xe.sct rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G483xx => TARGET_STM32G483xE}/TOOLCHAIN_GCC_ARM/startup_stm32g483xx.S (100%) create mode 100644 targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xE/TOOLCHAIN_GCC_ARM/stm32g483xe.ld rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G483xx => TARGET_STM32G483xE}/TOOLCHAIN_IAR/startup_stm32g483xx.S (100%) rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G483xx/TOOLCHAIN_IAR/stm32g483xx.icf => TARGET_STM32G483xE/TOOLCHAIN_IAR/stm32g483xe.icf} (97%) rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G473xx => TARGET_STM32G483xE}/cmsis_nvic.h (70%) delete mode 100644 targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xx/TOOLCHAIN_ARM_STD/stm32g483xx.sct delete mode 100644 targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xx/TOOLCHAIN_GCC_ARM/stm32g483xx.ld rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G484xx/TOOLCHAIN_ARM_STD => TARGET_STM32G484xE/TOOLCHAIN_ARM}/startup_stm32g484xx.S (100%) create mode 100644 targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xE/TOOLCHAIN_ARM/stm32g484xe.sct rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G484xx => TARGET_STM32G484xE}/TOOLCHAIN_GCC_ARM/startup_stm32g484xx.S (100%) create mode 100644 targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xE/TOOLCHAIN_GCC_ARM/stm32g484xe.ld rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G484xx => TARGET_STM32G484xE}/TOOLCHAIN_IAR/startup_stm32g484xx.S (100%) create mode 100644 targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xE/TOOLCHAIN_IAR/stm32g484xe.icf rename targets/TARGET_STM/TARGET_STM32G4/{TARGET_STM32G474xx => TARGET_STM32G484xE}/cmsis_nvic.h (70%) delete mode 100644 targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xx/TOOLCHAIN_ARM_STD/stm32g484xx.sct delete mode 100644 targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xx/TOOLCHAIN_GCC_ARM/stm32g484xx.ld delete mode 100644 targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xx/TOOLCHAIN_IAR/stm32g484xx.icf diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TOOLCHAIN_ARM_STD/startup_stm32g431xx.S b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xB/TOOLCHAIN_ARM/startup_stm32g431xx.S similarity index 100% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TOOLCHAIN_ARM_STD/startup_stm32g431xx.S rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xB/TOOLCHAIN_ARM/startup_stm32g431xx.S diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TOOLCHAIN_ARM_STD/stm32g431xx.sct b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xB/TOOLCHAIN_ARM/stm32g431xb.sct similarity index 90% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TOOLCHAIN_ARM_STD/stm32g431xx.sct rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xB/TOOLCHAIN_ARM/stm32g431xb.sct index a27952372d..331351213d 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TOOLCHAIN_ARM_STD/stm32g431xx.sct +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xB/TOOLCHAIN_ARM/stm32g431xb.sct @@ -25,13 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) -# if defined(MBED_BOOT_STACK_SIZE) -# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE -# else -# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 -# endif +/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ +#if defined(MBED_BOOT_STACK_SIZE) +#define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +#else +#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TOOLCHAIN_GCC_ARM/startup_stm32g431xx.S b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xB/TOOLCHAIN_GCC_ARM/startup_stm32g431xx.S similarity index 100% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TOOLCHAIN_GCC_ARM/startup_stm32g431xx.S rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xB/TOOLCHAIN_GCC_ARM/startup_stm32g431xx.S diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TOOLCHAIN_GCC_ARM/stm32g474xx.ld b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xB/TOOLCHAIN_GCC_ARM/stm32g431xb.ld similarity index 100% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TOOLCHAIN_GCC_ARM/stm32g474xx.ld rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xB/TOOLCHAIN_GCC_ARM/stm32g431xb.ld diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TOOLCHAIN_IAR/startup_stm32g431xx.S b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xB/TOOLCHAIN_IAR/startup_stm32g431xx.S similarity index 100% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TOOLCHAIN_IAR/startup_stm32g431xx.S rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xB/TOOLCHAIN_IAR/startup_stm32g431xx.S diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TOOLCHAIN_IAR/stm32g431xx.icf b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xB/TOOLCHAIN_IAR/stm32g431xb.icf similarity index 97% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TOOLCHAIN_IAR/stm32g431xx.icf rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xB/TOOLCHAIN_IAR/stm32g431xb.icf index 1ea8072dd9..988901ff6f 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TOOLCHAIN_IAR/stm32g431xx.icf +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xB/TOOLCHAIN_IAR/stm32g431xb.icf @@ -32,7 +32,7 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { } if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { - /* This value is normally defined by the tools + /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xx/cmsis_nvic.h b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xB/cmsis_nvic.h similarity index 100% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xx/cmsis_nvic.h rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xB/cmsis_nvic.h diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TARGET_NUCLEO_G431KB/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TARGET_NUCLEO_G431KB/PeripheralPins.c deleted file mode 100644 index 25ba6c1b53..0000000000 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TARGET_NUCLEO_G431KB/PeripheralPins.c +++ /dev/null @@ -1,258 +0,0 @@ -/* mbed Microcontroller Library - ******************************************************************************* - * Copyright (c) 2018, STMicroelectronics - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - ******************************************************************************* - * - * Automatically generated from STM32G431K(6-8-B)Tx.xml - */ - -#include "PeripheralPins.h" -#include "mbed_toolchain.h" - -//============================================================================== -// Notes -// -// - The pins mentioned Px_y_ALTz are alternative possibilities which use other -// HW peripheral instances. You can use them the same way as any other "normal" -// pin (i.e. PwmOut pwm(PA_7_ALT0);). These pins are not displayed on the board -// pinout image on mbed.org. -// -// - The pins which are connected to other components present on the board have -// the comment "Connected to xxx". The pin function may not work properly in this -// case. These pins may not be displayed on the board pinout image on mbed.org. -// Please read the board reference manual and schematic for more information. -// -// - Warning: pins connected to the default STDIO_UART_TX and STDIO_UART_RX pins are commented -// See https://os.mbed.com/teams/ST/wiki/STDIO for more information. -// -//============================================================================== - - -//*** ADC *** - -MBED_WEAK const PinMap PinMap_ADC[] = { - {PA_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 - {PA_0_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1 - {PA_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 - {PA_1_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2 -// {PA_2, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 // Connected to STDIO_UART_RX -// {PA_3, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 // Connected to STDIO_UART_TX - {PA_4, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 17, 0)}, // ADC2_IN17 - {PA_5, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13 - {PA_6, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 - {PA_7, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 - {PB_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 - {PF_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 - {PF_1, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 - {NC, NC, 0} -}; - -// !!! SECTION TO BE CHECKED WITH DEVICE REFERENCE MANUAL -MBED_WEAK const PinMap PinMap_ADC_Internal[] = { - {ADC_TEMP, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, - {ADC_VREF, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 17, 0)}, - {ADC_VBAT, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, - {NC, NC, 0} -}; - -//*** DAC *** - -MBED_WEAK const PinMap PinMap_DAC[] = { - {PA_4, DAC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC1_OUT1 - {PA_5, DAC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC1_OUT2 - {NC, NC, 0} -}; - -//*** I2C *** - -MBED_WEAK const PinMap PinMap_I2C_SDA[] = { - {PA_8, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, - {PA_14, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, // Connected to T_SWCLK - {PB_5, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF8_I2C3)}, - {PB_7, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, - {PF_0, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_I2C_SCL[] = { - {PA_8, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF2_I2C3)}, - {PA_9, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, - {PA_13, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, // Connected to T_SWDIO - {PA_15, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, - {PB_8, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, // Connected to LD2 [green] - {NC, NC, 0} -}; - -//*** PWM *** - -// TIM5 cannot be used because already used by the us_ticker -MBED_WEAK const PinMap PinMap_PWM[] = { - {PA_0, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 - {PA_1, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 - {PA_1_ALT0, PWM_15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM15, 1, 1)}, // TIM15_CH1N -// {PA_2, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 // Connected to STDIO_UART_RX -// {PA_2, PWM_15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM15, 1, 0)}, // TIM15_CH1 // Connected to STDIO_UART_RX -// {PA_3, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 // Connected to STDIO_UART_TX -// {PA_3, PWM_15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM15, 2, 0)}, // TIM15_CH2 // Connected to STDIO_UART_TX - {PA_4, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 - {PA_5, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 - {PA_6, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 - {PA_6_ALT0, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 0)}, // TIM16_CH1 - {PA_7, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 1, 1)}, // TIM1_CH1N - {PA_7_ALT0, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 - {PA_7_ALT1, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM8, 1, 1)}, // TIM8_CH1N - {PA_7_ALT2, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 0)}, // TIM17_CH1 - {PA_8, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 1, 0)}, // TIM1_CH1 - {PA_9, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 2, 0)}, // TIM1_CH2 - {PA_9_ALT0, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_TIM2, 3, 0)}, // TIM2_CH3 - {PA_10, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 3, 0)}, // TIM1_CH3 - {PA_10_ALT0, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_TIM2, 4, 0)}, // TIM2_CH4 - {PA_11, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 1, 1)}, // TIM1_CH1N - {PA_11_ALT0, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_TIM1, 4, 0)}, // TIM1_CH4 - {PA_11_ALT1, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_TIM4, 1, 0)}, // TIM4_CH1 - {PA_12, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 2, 1)}, // TIM1_CH2N - {PA_12_ALT0, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_TIM4, 2, 0)}, // TIM4_CH2 - {PA_12_ALT1, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 0)}, // TIM16_CH1 - {PA_13, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_TIM4, 3, 0)}, // TIM4_CH3 // Connected to T_SWDIO - {PA_13_ALT0, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 1)}, // TIM16_CH1N // Connected to T_SWDIO - {PA_14, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_TIM8, 2, 0)}, // TIM8_CH2 // Connected to T_SWCLK - {PA_15, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 - {PA_15_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM8, 1, 0)}, // TIM8_CH1 - {PB_0, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 2, 1)}, // TIM1_CH2N - {PB_0_ALT0, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 - {PB_0_ALT1, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM8, 2, 1)}, // TIM8_CH2N - {PB_3, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 // Connected to T_SWO - {PB_3_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM8, 1, 1)}, // TIM8_CH1N // Connected to T_SWO - {PB_4, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 - {PB_4_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM8, 2, 1)}, // TIM8_CH2N - {PB_4_ALT1, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 0)}, // TIM16_CH1 - {PB_5, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 - {PB_5_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N - {PB_5_ALT1, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_TIM17, 1, 0)}, // TIM17_CH1 - {PB_6, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 - {PB_6_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_TIM8, 1, 0)}, // TIM8_CH1 - {PB_6_ALT1, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 1)}, // TIM16_CH1N - {PB_7, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_TIM3, 4, 0)}, // TIM3_CH4 - {PB_7_ALT0, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 - {PB_7_ALT1, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 1)}, // TIM17_CH1N - {PB_8, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 // Connected to LD2 [green] - {PB_8_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_TIM8, 2, 0)}, // TIM8_CH2 // Connected to LD2 [green] - {PB_8_ALT1, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 0)}, // TIM16_CH1 // Connected to LD2 [green] - {PF_0, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 3, 1)}, // TIM1_CH3N - {NC, NC, 0} -}; - -//*** SERIAL *** - -MBED_WEAK const PinMap PinMap_UART_TX[] = { - {PA_2, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to STDIO_UART_RX - {PA_2_ALT0, LPUART_1,STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_LPUART1)}, // Connected to STDIO_UART_RX - {PA_9, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, - {PA_14, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to T_SWCLK - {PB_3, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to T_SWO - {PB_6, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_UART_RX[] = { - {PA_3, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to STDIO_UART_TX - {PA_3_ALT0, LPUART_1,STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_LPUART1)}, // Connected to STDIO_UART_TX - {PA_10, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, - {PA_15, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, - {PB_4, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, - {PB_7, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_UART_RTS[] = { - {PA_1, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, - {PA_12, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_UART_CTS[] = { - {PA_0, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, - {PA_6, LPUART_1,STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_LPUART1)}, - {PA_11, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, - {NC, NC, 0} -}; - -//*** SPI *** - -MBED_WEAK const PinMap PinMap_SPI_MOSI[] = { - {PA_7, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PA_11, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, - {PB_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PB_5_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_SPI_MISO[] = { - {PA_6, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PA_10, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, - {PB_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PB_4_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_SPI_SCLK[] = { - {PA_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PB_3, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, // Connected to T_SWO - {PB_3_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, // Connected to T_SWO - {PF_1, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_SPI_SSEL[] = { - {PA_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PA_4_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, - {PA_15, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PA_15_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, - {PF_0, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, - {NC, NC, 0} -}; - -//*** CAN *** - -MBED_WEAK const PinMap PinMap_CAN_RD[] = { - {PA_11, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, - {PB_8, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, // Connected to LD2 [green] - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_CAN_TD[] = { - {PA_12, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, - {NC, NC, 0} -}; - -//*** USBDEVICE *** - -MBED_WEAK const PinMap PinMap_USB_FS[] = { - {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DM - {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DP - {NC, NC, 0} -}; diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TARGET_NUCLEO_G431KB/PinNames.h b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TARGET_NUCLEO_G431KB/PinNames.h deleted file mode 100644 index e7687ff783..0000000000 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TARGET_NUCLEO_G431KB/PinNames.h +++ /dev/null @@ -1,79 +0,0 @@ -/* mbed Microcontroller Library - ******************************************************************************* - * Copyright (c) 2018, STMicroelectronics - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - ******************************************************************************* - * - * Automatically generated from STM32G431K(6-8-B)Tx.xml - */ - -#ifndef MBED_PINNAMES_H -#define MBED_PINNAMES_H - -#include "cmsis.h" -#include "PinNamesTypes.h" - -#ifdef __cplusplus -extern "C" { -#endif - -typedef enum { - ALT0 = 0x100, - ALT1 = 0x200, - ALT2 = 0x300, - ALT3 = 0x400 -} ALTx; - -typedef enum { - - - /**** USB pins ****/ - USB_DM = PA_11, - USB_DP = PA_12, - - /**** OSCILLATOR pins ****/ - RCC_OSC_IN = PF_0, - RCC_OSC_OUT = PF_1, - - /**** DEBUG pins ****/ - SYS_JTCK_SWCLK = PA_14, - SYS_JTDI = PA_15, - SYS_JTDO_SWO = PB_3, - SYS_JTMS_SWDIO = PA_13, - SYS_JTRST = PB_4, - SYS_PVD_IN = PB_7, - SYS_WKUP1 = PA_0, - SYS_WKUP4 = PA_2, - - // Not connected - NC = (int)0xFFFFFFFF -} PinName; - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TARGET_NUCLEO_G431RB/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TARGET_NUCLEO_G431RB/PeripheralPins.c deleted file mode 100644 index e3691e7ac7..0000000000 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TARGET_NUCLEO_G431RB/PeripheralPins.c +++ /dev/null @@ -1,343 +0,0 @@ -/* mbed Microcontroller Library - ******************************************************************************* - * Copyright (c) 2018, STMicroelectronics - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - ******************************************************************************* - * - * Automatically generated from STM32G431R(6-8-B)Tx.xml - */ - -#include "PeripheralPins.h" -#include "mbed_toolchain.h" - -//============================================================================== -// Notes -// -// - The pins mentioned Px_y_ALTz are alternative possibilities which use other -// HW peripheral instances. You can use them the same way as any other "normal" -// pin (i.e. PwmOut pwm(PA_7_ALT0);). These pins are not displayed on the board -// pinout image on mbed.org. -// -// - The pins which are connected to other components present on the board have -// the comment "Connected to xxx". The pin function may not work properly in this -// case. These pins may not be displayed on the board pinout image on mbed.org. -// Please read the board reference manual and schematic for more information. -// -// - Warning: pins connected to the default STDIO_UART_TX and STDIO_UART_RX pins are commented -// See https://os.mbed.com/teams/ST/wiki/STDIO for more information. -// -//============================================================================== - - -//*** ADC *** - -MBED_WEAK const PinMap PinMap_ADC[] = { - {PA_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 - {PA_0_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1 - {PA_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 - {PA_1_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2 -// {PA_2, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 // Connected to STDIO_UART_RX -// {PA_3, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 // Connected to STDIO_UART_TX - {PA_4, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 17, 0)}, // ADC2_IN17 - {PA_5, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13 // Connected to LD2 [green] - {PA_6, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 - {PA_7, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 - {PB_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 - {PB_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 - {PB_2, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 - {PB_11, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 - {PB_11_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_IN14 - {PB_12, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 - {PB_14, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 - {PB_15, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 - {PC_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 - {PC_0_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6 - {PC_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 - {PC_1_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 - {PC_2, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 - {PC_2_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 - {PC_3, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 - {PC_3_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 - {PC_4, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5 - {PC_5, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 -// {PF_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 // Connected to RCC_OSC_IN -// {PF_1, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 // Connected to RCC_OSC_OUT - {NC, NC, 0} -}; - -// !!! SECTION TO BE CHECKED WITH DEVICE REFERENCE MANUAL -MBED_WEAK const PinMap PinMap_ADC_Internal[] = { - {ADC_TEMP, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, - {ADC_VREF, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 17, 0)}, - {ADC_VBAT, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, - {NC, NC, 0} -}; - -//*** DAC *** - -MBED_WEAK const PinMap PinMap_DAC[] = { - {PA_4, DAC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC1_OUT1 - {PA_5, DAC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC1_OUT2 // Connected to LD2 [green] - {NC, NC, 0} -}; - -//*** I2C *** - -MBED_WEAK const PinMap PinMap_I2C_SDA[] = { - {PA_8, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, - {PA_14, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, // Connected to T_SWCLK - {PB_5, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF8_I2C3)}, - {PB_7, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, - {PB_9, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, - {PC_9, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF8_I2C3)}, - {PC_11, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF8_I2C3)}, -// {PF_0, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, // Connected to RCC_OSC_IN - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_I2C_SCL[] = { - {PA_8, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF2_I2C3)}, - {PA_9, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, - {PA_13, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, // Connected to T_SWDIO - {PA_15, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, - {PB_8, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, - {PC_4, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, - {PC_8, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF8_I2C3)}, - {NC, NC, 0} -}; - -//*** PWM *** - -// TIM5 cannot be used because already used by the us_ticker -MBED_WEAK const PinMap PinMap_PWM[] = { - {PA_0, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 - {PA_1, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 - {PA_1_ALT0, PWM_15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM15, 1, 1)}, // TIM15_CH1N -// {PA_2, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 // Connected to STDIO_UART_RX -// {PA_2, PWM_15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM15, 1, 0)}, // TIM15_CH1 // Connected to STDIO_UART_RX -// {PA_3, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 // Connected to STDIO_UART_TX -// {PA_3, PWM_15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM15, 2, 0)}, // TIM15_CH2 // Connected to STDIO_UART_TX - {PA_4, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 - {PA_5, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 // Connected to LD2 [green] - {PA_6, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 - {PA_6_ALT0, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 0)}, // TIM16_CH1 - {PA_7, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 1, 1)}, // TIM1_CH1N - {PA_7_ALT0, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 - {PA_7_ALT1, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM8, 1, 1)}, // TIM8_CH1N - {PA_7_ALT2, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 0)}, // TIM17_CH1 - {PA_8, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 1, 0)}, // TIM1_CH1 - {PA_9, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 2, 0)}, // TIM1_CH2 - {PA_9_ALT0, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_TIM2, 3, 0)}, // TIM2_CH3 - {PA_10, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 3, 0)}, // TIM1_CH3 - {PA_10_ALT0, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_TIM2, 4, 0)}, // TIM2_CH4 - {PA_11, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 1, 1)}, // TIM1_CH1N - {PA_11_ALT0, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_TIM1, 4, 0)}, // TIM1_CH4 - {PA_11_ALT1, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_TIM4, 1, 0)}, // TIM4_CH1 - {PA_12, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 2, 1)}, // TIM1_CH2N - {PA_12_ALT0, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_TIM4, 2, 0)}, // TIM4_CH2 - {PA_12_ALT1, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 0)}, // TIM16_CH1 - {PA_13, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_TIM4, 3, 0)}, // TIM4_CH3 // Connected to T_SWDIO - {PA_13_ALT0, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 1)}, // TIM16_CH1N // Connected to T_SWDIO - {PA_14, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_TIM8, 2, 0)}, // TIM8_CH2 // Connected to T_SWCLK - {PA_15, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 - {PA_15_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM8, 1, 0)}, // TIM8_CH1 - {PB_0, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 2, 1)}, // TIM1_CH2N - {PB_0_ALT0, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 - {PB_0_ALT1, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM8, 2, 1)}, // TIM8_CH2N - {PB_1, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 3, 1)}, // TIM1_CH3N - {PB_1_ALT0, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 - {PB_1_ALT1, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM8, 3, 1)}, // TIM8_CH3N - {PB_3, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 // Connected to T_SWO - {PB_3_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM8, 1, 1)}, // TIM8_CH1N // Connected to T_SWO - {PB_4, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 - {PB_4_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM8, 2, 1)}, // TIM8_CH2N - {PB_4_ALT1, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 0)}, // TIM16_CH1 - {PB_5, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 - {PB_5_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N - {PB_5_ALT1, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_TIM17, 1, 0)}, // TIM17_CH1 - {PB_6, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 - {PB_6_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_TIM8, 1, 0)}, // TIM8_CH1 - {PB_6_ALT1, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 1)}, // TIM16_CH1N - {PB_7, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_TIM3, 4, 0)}, // TIM3_CH4 - {PB_7_ALT0, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 - {PB_7_ALT1, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 1)}, // TIM17_CH1N - {PB_8, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 - {PB_8_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_TIM8, 2, 0)}, // TIM8_CH2 - {PB_8_ALT1, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 0)}, // TIM16_CH1 - {PB_9, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_TIM1_COMP1, 3, 1)}, // TIM1_CH3N - {PB_9_ALT0, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 - {PB_9_ALT1, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_TIM8, 3, 0)}, // TIM8_CH3 - {PB_9_ALT2, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 0)}, // TIM17_CH1 - {PB_10, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 - {PB_11, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 - {PB_13, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 1, 1)}, // TIM1_CH1N - {PB_14, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 2, 1)}, // TIM1_CH2N - {PB_14_ALT0, PWM_15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM15, 1, 0)}, // TIM15_CH1 - {PB_15, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM1, 3, 1)}, // TIM1_CH3N - {PB_15_ALT0, PWM_15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM15, 1, 1)}, // TIM15_CH1N - {PB_15_ALT1, PWM_15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM15, 2, 0)}, // TIM15_CH2 - {PC_0, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 1, 0)}, // TIM1_CH1 - {PC_1, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 2, 0)}, // TIM1_CH2 - {PC_2, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 3, 0)}, // TIM1_CH3 - {PC_3, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 4, 0)}, // TIM1_CH4 - {PC_5, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 4, 1)}, // TIM1_CH4N - {PC_6, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 - {PC_6_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM8, 1, 0)}, // TIM8_CH1 - {PC_7, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 - {PC_7_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM8, 2, 0)}, // TIM8_CH2 - {PC_8, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 - {PC_8_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM8, 3, 0)}, // TIM8_CH3 - {PC_9, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 - {PC_9_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM8, 4, 0)}, // TIM8_CH4 - {PC_10, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM8, 1, 1)}, // TIM8_CH1N - {PC_11, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM8, 2, 1)}, // TIM8_CH2N - {PC_12, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM8, 3, 1)}, // TIM8_CH3N - {PC_13, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM1, 1, 1)}, // TIM1_CH1N // Connected to B1 [blue push button] - {PC_13_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM8, 4, 1)}, // TIM8_CH4N // Connected to B1 [blue push button] -// {PF_0, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 3, 1)}, // TIM1_CH3N // Connected to RCC_OSC_IN - {NC, NC, 0} -}; - -//*** SERIAL *** - -MBED_WEAK const PinMap PinMap_UART_TX[] = { - {PA_2, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to STDIO_UART_RX - {PA_2_ALT0, LPUART_1,STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_LPUART1)}, // Connected to STDIO_UART_RX - {PA_9, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, - {PA_14, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to T_SWCLK - {PB_3, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to T_SWO - {PB_6, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, - {PB_9, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, - {PB_10, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, - {PB_11, LPUART_1,STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, - {PC_1, LPUART_1,STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, - {PC_4, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, - {PC_10, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, - {PC_10_ALT0, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_UART4)}, - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_UART_RX[] = { - {PA_3, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to STDIO_UART_TX - {PA_3_ALT0, LPUART_1,STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_LPUART1)}, // Connected to STDIO_UART_TX - {PA_10, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, - {PA_15, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, - {PB_4, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, - {PB_7, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, - {PB_8, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, - {PB_10, LPUART_1,STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, - {PB_11, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, - {PC_0, LPUART_1,STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, - {PC_5, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, - {PC_11, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, - {PC_11_ALT0, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_UART4)}, - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_UART_RTS[] = { - {PA_1, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, - {PA_12, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, - {PA_15, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, - {PB_1, LPUART_1,STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_LPUART1)}, - {PB_12, LPUART_1,STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, - {PB_14, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_UART_CTS[] = { - {PA_0, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, - {PA_6, LPUART_1,STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_LPUART1)}, - {PA_11, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, - {PA_13, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, // Connected to T_SWDIO - {PB_7, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART4)}, - {PB_13, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, - {PB_13_ALT0, LPUART_1,STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, - {NC, NC, 0} -}; - -//*** SPI *** - -MBED_WEAK const PinMap PinMap_SPI_MOSI[] = { - {PA_7, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PA_11, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, - {PB_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PB_5_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, - {PB_15, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, - {PC_12, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_SPI_MISO[] = { - {PA_6, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PA_10, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, - {PB_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PB_4_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, - {PB_14, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, - {PC_11, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_SPI_SCLK[] = { - {PA_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, // Connected to LD2 [green] - {PB_3, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, // Connected to T_SWO - {PB_3_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, // Connected to T_SWO - {PB_13, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, - {PC_10, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, -// {PF_1, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, // Connected to RCC_OSC_OUT - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_SPI_SSEL[] = { - {PA_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PA_4_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, - {PA_15, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PA_15_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, - {PB_12, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, -// {PF_0, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, // Connected to RCC_OSC_IN - {NC, NC, 0} -}; - -//*** CAN *** - -MBED_WEAK const PinMap PinMap_CAN_RD[] = { - {PA_11, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, - {PB_8, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_CAN_TD[] = { - {PA_12, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, - {PB_9, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, - {NC, NC, 0} -}; - -//*** USBDEVICE *** - -MBED_WEAK const PinMap PinMap_USB_FS[] = { - {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DM - {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DP - {NC, NC, 0} -}; diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TARGET_NUCLEO_G431RB/PinNames.h b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TARGET_NUCLEO_G431RB/PinNames.h deleted file mode 100644 index bde8bb4a2a..0000000000 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TARGET_NUCLEO_G431RB/PinNames.h +++ /dev/null @@ -1,83 +0,0 @@ -/* mbed Microcontroller Library - ******************************************************************************* - * Copyright (c) 2018, STMicroelectronics - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - ******************************************************************************* - * - * Automatically generated from STM32G431R(6-8-B)Tx.xml - */ - -#ifndef MBED_PINNAMES_H -#define MBED_PINNAMES_H - -#include "cmsis.h" -#include "PinNamesTypes.h" - -#ifdef __cplusplus -extern "C" { -#endif - -typedef enum { - ALT0 = 0x100, - ALT1 = 0x200, - ALT2 = 0x300, - ALT3 = 0x400 -} ALTx; - -typedef enum { - - - /**** USB pins ****/ - USB_DM = PA_11, - USB_DP = PA_12, - - /**** OSCILLATOR pins ****/ - RCC_OSC32_IN = PC_14, - RCC_OSC32_OUT = PC_15, - RCC_OSC_IN = PF_0, - RCC_OSC_OUT = PF_1, - - /**** DEBUG pins ****/ - SYS_JTCK_SWCLK = PA_14, - SYS_JTDI = PA_15, - SYS_JTDO_SWO = PB_3, - SYS_JTMS_SWDIO = PA_13, - SYS_JTRST = PB_4, - SYS_PVD_IN = PB_7, - SYS_WKUP1 = PA_0, - SYS_WKUP2 = PC_13, - SYS_WKUP4 = PA_2, - SYS_WKUP5 = PC_5, - - // Not connected - NC = (int)0xFFFFFFFF -} PinName; - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xx/TOOLCHAIN_ARM_STD/startup_stm32g441xx.S b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xB/TOOLCHAIN_ARM/startup_stm32g441xx.S similarity index 100% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xx/TOOLCHAIN_ARM_STD/startup_stm32g441xx.S rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xB/TOOLCHAIN_ARM/startup_stm32g441xx.S diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xx/TOOLCHAIN_ARM_STD/stm32g441xx.sct b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xB/TOOLCHAIN_ARM/stm32g441xb.sct similarity index 90% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xx/TOOLCHAIN_ARM_STD/stm32g441xx.sct rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xB/TOOLCHAIN_ARM/stm32g441xb.sct index a27952372d..331351213d 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xx/TOOLCHAIN_ARM_STD/stm32g441xx.sct +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xB/TOOLCHAIN_ARM/stm32g441xb.sct @@ -25,13 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) -# if defined(MBED_BOOT_STACK_SIZE) -# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE -# else -# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 -# endif +/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ +#if defined(MBED_BOOT_STACK_SIZE) +#define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +#else +#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xx/TOOLCHAIN_GCC_ARM/startup_stm32g441xx.S b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xB/TOOLCHAIN_GCC_ARM/startup_stm32g441xx.S similarity index 100% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xx/TOOLCHAIN_GCC_ARM/startup_stm32g441xx.S rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xB/TOOLCHAIN_GCC_ARM/startup_stm32g441xx.S diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TOOLCHAIN_GCC_ARM/stm32g431xx.ld b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xB/TOOLCHAIN_GCC_ARM/stm32g441xb.ld similarity index 95% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TOOLCHAIN_GCC_ARM/stm32g431xx.ld rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xB/TOOLCHAIN_GCC_ARM/stm32g441xb.ld index 0a93b7b56b..5f479936c8 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/TOOLCHAIN_GCC_ARM/stm32g431xx.ld +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xB/TOOLCHAIN_GCC_ARM/stm32g441xb.ld @@ -111,10 +111,7 @@ SECTIONS } > FLASH __exidx_end = .; - /* Location counter can end up 2byte aligned with narrow Thumb code but - __etext is assumed by startup code to be the LMA of a section in RAM - which must be 8-byte aligned */ - __etext = ALIGN (8); + __etext = .; _sidata = .; .data : AT (__etext) diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xx/TOOLCHAIN_IAR/startup_stm32g441xx.S b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xB/TOOLCHAIN_IAR/startup_stm32g441xx.S similarity index 100% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xx/TOOLCHAIN_IAR/startup_stm32g441xx.S rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xB/TOOLCHAIN_IAR/startup_stm32g441xx.S diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xx/TOOLCHAIN_IAR/stm32g441xx.icf b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xB/TOOLCHAIN_IAR/stm32g441xb.icf similarity index 97% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xx/TOOLCHAIN_IAR/stm32g441xx.icf rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xB/TOOLCHAIN_IAR/stm32g441xb.icf index 1ea8072dd9..988901ff6f 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xx/TOOLCHAIN_IAR/stm32g441xx.icf +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xB/TOOLCHAIN_IAR/stm32g441xb.icf @@ -32,7 +32,7 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { } if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { - /* This value is normally defined by the tools + /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/cmsis_nvic.h b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xB/cmsis_nvic.h similarity index 71% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/cmsis_nvic.h rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xB/cmsis_nvic.h index 672abbeffb..308d0de2f2 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G431xx/cmsis_nvic.h +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xB/cmsis_nvic.h @@ -23,10 +23,6 @@ #if !defined(MBED_ROM_SIZE) #define MBED_ROM_SIZE 0x20000 // 128 KB - // 0x8000 STM32G431M6Tx STM32G431K6Tx STM32G431C6Ux STM32G431R6Tx STM32G431V6Tx STM32G431K6Ux STM32G431C6Tx STM32G431R6Ix - // 0x20000 STM32G431KBTx STM32G431CBTx STM32G431RBIx STM32G431CBYx STM32G431KBUx STM32G431VBTx STM32G431CBUx STM32G431RBTx - // 0x10000 STM32G431V8Tx STM32G431R8Tx STM32G431K8Tx STM32G431C8Tx STM32G431R8Ix STM32G431C8Ux STM32G431K8Ux STM32G431M8Tx -#warning "check MBED_ROM_SIZE value in cmsis_nvic.h" #endif #if !defined(MBED_RAM_START) diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xx/TOOLCHAIN_ARM_STD/startup_stm32g471xx.S b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xE/TOOLCHAIN_ARM/startup_stm32g471xx.S similarity index 100% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xx/TOOLCHAIN_ARM_STD/startup_stm32g471xx.S rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xE/TOOLCHAIN_ARM/startup_stm32g471xx.S diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xx/TOOLCHAIN_ARM_STD/stm32g471xx.sct b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xE/TOOLCHAIN_ARM/stm32g471xe.sct similarity index 90% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xx/TOOLCHAIN_ARM_STD/stm32g471xx.sct rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xE/TOOLCHAIN_ARM/stm32g471xe.sct index a27952372d..331351213d 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xx/TOOLCHAIN_ARM_STD/stm32g471xx.sct +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xE/TOOLCHAIN_ARM/stm32g471xe.sct @@ -25,13 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) -# if defined(MBED_BOOT_STACK_SIZE) -# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE -# else -# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 -# endif +/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ +#if defined(MBED_BOOT_STACK_SIZE) +#define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +#else +#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xx/TOOLCHAIN_GCC_ARM/startup_stm32g471xx.S b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xE/TOOLCHAIN_GCC_ARM/startup_stm32g471xx.S similarity index 100% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xx/TOOLCHAIN_GCC_ARM/startup_stm32g471xx.S rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xE/TOOLCHAIN_GCC_ARM/startup_stm32g471xx.S diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xx/TOOLCHAIN_GCC_ARM/stm32g441xx.ld b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xE/TOOLCHAIN_GCC_ARM/stm32g471xe.ld similarity index 95% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xx/TOOLCHAIN_GCC_ARM/stm32g441xx.ld rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xE/TOOLCHAIN_GCC_ARM/stm32g471xe.ld index 0a93b7b56b..5f479936c8 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G441xx/TOOLCHAIN_GCC_ARM/stm32g441xx.ld +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xE/TOOLCHAIN_GCC_ARM/stm32g471xe.ld @@ -111,10 +111,7 @@ SECTIONS } > FLASH __exidx_end = .; - /* Location counter can end up 2byte aligned with narrow Thumb code but - __etext is assumed by startup code to be the LMA of a section in RAM - which must be 8-byte aligned */ - __etext = ALIGN (8); + __etext = .; _sidata = .; .data : AT (__etext) diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xx/TOOLCHAIN_IAR/startup_stm32g471xx.S b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xE/TOOLCHAIN_IAR/startup_stm32g471xx.S similarity index 100% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xx/TOOLCHAIN_IAR/startup_stm32g471xx.S rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xE/TOOLCHAIN_IAR/startup_stm32g471xx.S diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xx/TOOLCHAIN_IAR/stm32g473xx.icf b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xE/TOOLCHAIN_IAR/stm32g471xe.icf similarity index 97% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xx/TOOLCHAIN_IAR/stm32g473xx.icf rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xE/TOOLCHAIN_IAR/stm32g471xe.icf index 64170e81d1..d3bf9e3cd3 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xx/TOOLCHAIN_IAR/stm32g473xx.icf +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xE/TOOLCHAIN_IAR/stm32g471xe.icf @@ -32,7 +32,7 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { } if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { - /* This value is normally defined by the tools + /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xx/cmsis_nvic.h b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xE/cmsis_nvic.h similarity index 100% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xx/cmsis_nvic.h rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xE/cmsis_nvic.h diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xx/TOOLCHAIN_ARM_STD/startup_stm32g473xx.S b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xE/TOOLCHAIN_ARM/startup_stm32g473xx.S similarity index 100% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xx/TOOLCHAIN_ARM_STD/startup_stm32g473xx.S rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xE/TOOLCHAIN_ARM/startup_stm32g473xx.S diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xx/TOOLCHAIN_ARM_STD/stm32g473xx.sct b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xE/TOOLCHAIN_ARM/stm32g473xe.sct similarity index 90% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xx/TOOLCHAIN_ARM_STD/stm32g473xx.sct rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xE/TOOLCHAIN_ARM/stm32g473xe.sct index a27952372d..331351213d 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xx/TOOLCHAIN_ARM_STD/stm32g473xx.sct +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xE/TOOLCHAIN_ARM/stm32g473xe.sct @@ -25,13 +25,13 @@ #define MBED_APP_SIZE MBED_ROM_SIZE #endif -/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) -# if defined(MBED_BOOT_STACK_SIZE) -# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE -# else -# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 -# endif +/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ +#if defined(MBED_BOOT_STACK_SIZE) +#define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +#else +#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#endif #endif /* Round up VECTORS_SIZE to 8 bytes */ diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xx/TOOLCHAIN_GCC_ARM/startup_stm32g473xx.S b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xE/TOOLCHAIN_GCC_ARM/startup_stm32g473xx.S similarity index 100% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xx/TOOLCHAIN_GCC_ARM/startup_stm32g473xx.S rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xE/TOOLCHAIN_GCC_ARM/startup_stm32g473xx.S diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xx/TOOLCHAIN_GCC_ARM/stm32g471xx.ld b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xE/TOOLCHAIN_GCC_ARM/stm32g473xe.ld similarity index 95% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xx/TOOLCHAIN_GCC_ARM/stm32g471xx.ld rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xE/TOOLCHAIN_GCC_ARM/stm32g473xe.ld index 0a93b7b56b..5f479936c8 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xx/TOOLCHAIN_GCC_ARM/stm32g471xx.ld +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xE/TOOLCHAIN_GCC_ARM/stm32g473xe.ld @@ -111,10 +111,7 @@ SECTIONS } > FLASH __exidx_end = .; - /* Location counter can end up 2byte aligned with narrow Thumb code but - __etext is assumed by startup code to be the LMA of a section in RAM - which must be 8-byte aligned */ - __etext = ALIGN (8); + __etext = .; _sidata = .; .data : AT (__etext) diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xx/TOOLCHAIN_IAR/startup_stm32g473xx.S b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xE/TOOLCHAIN_IAR/startup_stm32g473xx.S similarity index 100% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xx/TOOLCHAIN_IAR/startup_stm32g473xx.S rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xE/TOOLCHAIN_IAR/startup_stm32g473xx.S diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xx/TOOLCHAIN_IAR/stm32g471xx.icf b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xE/TOOLCHAIN_IAR/stm32g473xe.icf similarity index 97% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xx/TOOLCHAIN_IAR/stm32g471xx.icf rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xE/TOOLCHAIN_IAR/stm32g473xe.icf index 64170e81d1..d3bf9e3cd3 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xx/TOOLCHAIN_IAR/stm32g471xx.icf +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xE/TOOLCHAIN_IAR/stm32g473xe.icf @@ -32,7 +32,7 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { } if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { - /* This value is normally defined by the tools + /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xx/cmsis_nvic.h b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xE/cmsis_nvic.h similarity index 100% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xx/cmsis_nvic.h rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xE/cmsis_nvic.h diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TARGET_NUCLEO_G474RE/PeripheralNames.h b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xE/TARGET_NUCLEO_G474RE/PeripheralNames.h similarity index 100% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TARGET_NUCLEO_G474RE/PeripheralNames.h rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xE/TARGET_NUCLEO_G474RE/PeripheralNames.h diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TARGET_NUCLEO_G474RE/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xE/TARGET_NUCLEO_G474RE/PeripheralPins.c similarity index 100% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TARGET_NUCLEO_G474RE/PeripheralPins.c rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xE/TARGET_NUCLEO_G474RE/PeripheralPins.c diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TARGET_NUCLEO_G474RE/PinNames.h b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xE/TARGET_NUCLEO_G474RE/PinNames.h similarity index 100% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TARGET_NUCLEO_G474RE/PinNames.h rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xE/TARGET_NUCLEO_G474RE/PinNames.h diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TARGET_NUCLEO_G474RE/system_clock.c b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xE/TARGET_NUCLEO_G474RE/system_clock.c similarity index 100% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TARGET_NUCLEO_G474RE/system_clock.c rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xE/TARGET_NUCLEO_G474RE/system_clock.c diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TOOLCHAIN_ARM_STD/startup_stm32g474xx.S b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xE/TOOLCHAIN_ARM/startup_stm32g474xx.S similarity index 100% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TOOLCHAIN_ARM_STD/startup_stm32g474xx.S rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xE/TOOLCHAIN_ARM/startup_stm32g474xx.S diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xE/TOOLCHAIN_ARM/stm32g474xe.sct b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xE/TOOLCHAIN_ARM/stm32g474xe.sct new file mode 100644 index 0000000000..331351213d --- /dev/null +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xE/TOOLCHAIN_ARM/stm32g474xe.sct @@ -0,0 +1,57 @@ +#! armcc -E +; Scatter-Loading Description File +; +; SPDX-License-Identifier: BSD-3-Clause +;****************************************************************************** +;* @attention +;* +;* Copyright (c) 2016-2020 STMicroelectronics. +;* All rights reserved. +;* +;* This software component is licensed by ST under BSD 3-Clause license, +;* the "License"; You may not use this file except in compliance with the +;* License. You may obtain a copy of the License at: +;* opensource.org/licenses/BSD-3-Clause +;* +;****************************************************************************** + +#include "../cmsis_nvic.h" + +#if !defined(MBED_APP_START) + #define MBED_APP_START MBED_ROM_START +#endif + +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE MBED_ROM_SIZE +#endif + +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ +#if defined(MBED_BOOT_STACK_SIZE) +#define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +#else +#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#endif +#endif + +/* Round up VECTORS_SIZE to 8 bytes */ +#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + } + + RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data + .ANY (+RW +ZI) + } + + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + } + + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down + } +} diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TOOLCHAIN_GCC_ARM/startup_stm32g474xx.S b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xE/TOOLCHAIN_GCC_ARM/startup_stm32g474xx.S similarity index 100% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TOOLCHAIN_GCC_ARM/startup_stm32g474xx.S rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xE/TOOLCHAIN_GCC_ARM/startup_stm32g474xx.S diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xx/TOOLCHAIN_GCC_ARM/stm32g473xx.ld b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xE/TOOLCHAIN_GCC_ARM/stm32g474xe.ld similarity index 95% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xx/TOOLCHAIN_GCC_ARM/stm32g473xx.ld rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xE/TOOLCHAIN_GCC_ARM/stm32g474xe.ld index 0a93b7b56b..5f479936c8 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xx/TOOLCHAIN_GCC_ARM/stm32g473xx.ld +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xE/TOOLCHAIN_GCC_ARM/stm32g474xe.ld @@ -111,10 +111,7 @@ SECTIONS } > FLASH __exidx_end = .; - /* Location counter can end up 2byte aligned with narrow Thumb code but - __etext is assumed by startup code to be the LMA of a section in RAM - which must be 8-byte aligned */ - __etext = ALIGN (8); + __etext = .; _sidata = .; .data : AT (__etext) diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TOOLCHAIN_IAR/startup_stm32g474xx.S b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xE/TOOLCHAIN_IAR/startup_stm32g474xx.S similarity index 100% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TOOLCHAIN_IAR/startup_stm32g474xx.S rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xE/TOOLCHAIN_IAR/startup_stm32g474xx.S diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TOOLCHAIN_IAR/stm32g474xx.icf b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xE/TOOLCHAIN_IAR/stm32g474xe.icf similarity index 97% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TOOLCHAIN_IAR/stm32g474xx.icf rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xE/TOOLCHAIN_IAR/stm32g474xe.icf index 64170e81d1..d3bf9e3cd3 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TOOLCHAIN_IAR/stm32g474xx.icf +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xE/TOOLCHAIN_IAR/stm32g474xe.icf @@ -32,7 +32,7 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { } if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { - /* This value is normally defined by the tools + /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xx/cmsis_nvic.h b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xE/cmsis_nvic.h similarity index 77% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xx/cmsis_nvic.h rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xE/cmsis_nvic.h index afd9918b84..6bbb29dd08 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G471xx/cmsis_nvic.h +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xE/cmsis_nvic.h @@ -23,9 +23,6 @@ #if !defined(MBED_ROM_SIZE) #define MBED_ROM_SIZE 0x80000 // 512 KB - // 0x40000 STM32G471RCTx STM32G471CCUx STM32G471VCHx STM32G471CCTx STM32G471VCIx STM32G471VCTx STM32G471MCTx STM32G471QCTx - // 0x80000 STM32G471RE STM32G471VETx STM32G471METx STM32G471VEHx STM32G471CEUx STM32G471QETx STM32G471MEYx STM32G471VEIx STM32G471CETx -#warning "check MBED_ROM_SIZE value in cmsis_nvic.h" #endif #if !defined(MBED_RAM_START) diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TARGET_DISCO_G474RE/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TARGET_DISCO_G474RE/PeripheralPins.c deleted file mode 100644 index e322afad90..0000000000 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TARGET_DISCO_G474RE/PeripheralPins.c +++ /dev/null @@ -1,411 +0,0 @@ -/* mbed Microcontroller Library - ******************************************************************************* - * Copyright (c) 2018, STMicroelectronics - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - ******************************************************************************* - * - * Automatically generated from STM32G474R(B-C-E)Tx.xml - */ - -#include "PeripheralPins.h" -#include "mbed_toolchain.h" - -//============================================================================== -// Notes -// -// - The pins mentioned Px_y_ALTz are alternative possibilities which use other -// HW peripheral instances. You can use them the same way as any other "normal" -// pin (i.e. PwmOut pwm(PA_7_ALT0);). These pins are not displayed on the board -// pinout image on mbed.org. -// -// - The pins which are connected to other components present on the board have -// the comment "Connected to xxx". The pin function may not work properly in this -// case. These pins may not be displayed on the board pinout image on mbed.org. -// Please read the board reference manual and schematic for more information. -// -// - Warning: pins connected to the default STDIO_UART_TX and STDIO_UART_RX pins are commented -// See https://os.mbed.com/teams/ST/wiki/STDIO for more information. -// -//============================================================================== - - -//*** ADC *** - -MBED_WEAK const PinMap PinMap_ADC[] = { - {PA_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 // Connected to BUCK_GREEN_SENSE - {PA_0_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC2_IN1 // Connected to BUCK_GREEN_SENSE - {PA_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 // Connected to BUCKBOOST_VIN - {PA_1_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_IN2 // Connected to BUCKBOOST_VIN - {PA_2, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 // Connected to BUCKBOOST_I_IN_AVG - {PA_3, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 // Connected to BUCKBOOST_VOUT - {PA_4, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 17, 0)}, // ADC2_IN17 - {PA_5, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC2_IN13 - {PA_6, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_IN3 - {PA_7, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_IN4 // Connected to BUCK_RED_SENSE - {PA_8, ADC_5, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC5_IN1 // Connected to BUCK_BLUE_DRIVE - {PA_9, ADC_5, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC5_IN2 // Connected to UCPD1_DBCC1 - {PB_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 // Connected to BUCK_BLUE_SENSE - {PB_0_ALT0, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC3_IN12 // Connected to BUCK_BLUE_SENSE - {PB_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 // Connected to LD3 [Orange Led] - {PB_1_ALT0, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_IN1 // Connected to LD3 [Orange Led] - {PB_2, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC2_IN12 // Connected to JOYSTICK_RIGHT - {PB_11, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 // Connected to BUCKBOOST_I_IN_SENSE - {PB_11_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_IN14 // Connected to BUCKBOOST_I_IN_SENSE - {PB_12, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 // Connected to BUCKBOOST_P1_DRIVE - {PB_12_ALT0, ADC_4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC4_IN3 // Connected to BUCKBOOST_P1_DRIVE - {PB_13, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC3_IN5 // Connected to BUCKBOOST_N1_DRIVE - {PB_14, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 // Connected to BUCKBOOST_N2_DRIVE - {PB_14_ALT0, ADC_4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC4_IN4 // Connected to BUCKBOOST_N2_DRIVE - {PB_15, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_IN15 // Connected to BUCKBOOST_P2_DRIVE - {PB_15_ALT0, ADC_4, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC4_IN5 // Connected to BUCKBOOST_P2_DRIVE - {PC_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 - {PC_0_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6 - {PC_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 - {PC_1_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 - {PC_2, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 // Connected to USBPD_VIN - {PC_2_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_IN8 // Connected to USBPD_VIN - {PC_3, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 // Connected to BUCKBOOST_USBPD_EN - {PC_3_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_IN9 // Connected to BUCKBOOST_USBPD_EN - {PC_4, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_IN5 // Connected to JOYSTICK_LEFT - {PC_5, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_IN11 // Connected to JOYSTICK_DOWN - {PF_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 - {PF_1, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_IN10 - {NC, NC, 0} -}; - -// !!! SECTION TO BE CHECKED WITH DEVICE REFERENCE MANUAL -MBED_WEAK const PinMap PinMap_ADC_Internal[] = { - {ADC_TEMP, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, - {ADC_VREF, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 17, 0)}, - {ADC_VBAT, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, - {NC, NC, 0} -}; - -//*** DAC *** - -MBED_WEAK const PinMap PinMap_DAC[] = { - {PA_4, DAC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC1_OUT1 - {PA_5, DAC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC1_OUT2 - {PA_6, DAC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC2_OUT1 - {NC, NC, 0} -}; - -//*** I2C *** - -MBED_WEAK const PinMap PinMap_I2C_SDA[] = { - {PA_8, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, // Connected to BUCK_BLUE_DRIVE - {PA_14, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, // Connected to SYS_JTCK-SWCLK - {PB_5, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF8_I2C3)}, // Connected to LD5 [Red Led] - {PB_7, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, // Connected to LD4 [Green Led] - {PB_7_ALT0, I2C_4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I2C4)}, // Connected to LD4 [Green Led] - {PB_9, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, - {PC_7, I2C_4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF8_I2C4)}, // Connected to RC_TP4 - {PC_9, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF8_I2C3)}, -// {PC_11, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF8_I2C3)}, // Connected to STDIO_UART_RX - {PF_0, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_I2C_SCL[] = { - {PA_8, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF2_I2C3)}, // Connected to BUCK_BLUE_DRIVE - {PA_9, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, // Connected to UCPD1_DBCC1 - {PA_13, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, // Connected to SYS_JTMS-SWDIO - {PA_13_ALT0, I2C_4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF3_I2C4)}, // Connected to SYS_JTMS-SWDIO - {PA_15, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, // Connected to LD2 [Blue Led] - {PB_8, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, - {PC_4, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, // Connected to JOYSTICK_LEFT - {PC_6, I2C_4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF8_I2C4)}, // Connected to BUCK_RED_DRIVE - {PC_8, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF8_I2C3)}, // Connected to BUCK_GREEN_DRIVE - {NC, NC, 0} -}; - -//*** PWM *** - -// TIM5 cannot be used because already used by the us_ticker -MBED_WEAK const PinMap PinMap_PWM[] = { - {PA_0, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 // Connected to BUCK_GREEN_SENSE -// {PA_0, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1 // Connected to BUCK_GREEN_SENSE - {PA_1, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 // Connected to BUCKBOOST_VIN -// {PA_1, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2 // Connected to BUCKBOOST_VIN - {PA_1_ALT0, PWM_15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM15, 1, 1)}, // TIM15_CH1N // Connected to BUCKBOOST_VIN - {PA_2, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 // Connected to BUCKBOOST_I_IN_AVG -// {PA_2, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3 // Connected to BUCKBOOST_I_IN_AVG - {PA_2_ALT0, PWM_15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM15, 1, 0)}, // TIM15_CH1 // Connected to BUCKBOOST_I_IN_AVG - {PA_3, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 // Connected to BUCKBOOST_VOUT -// {PA_3, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4 // Connected to BUCKBOOST_VOUT - {PA_3_ALT0, PWM_15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_TIM15, 2, 0)}, // TIM15_CH2 // Connected to BUCKBOOST_VOUT - {PA_4, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 - {PA_5, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 - {PA_6, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 - {PA_6_ALT0, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 0)}, // TIM16_CH1 - {PA_7, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 1, 1)}, // TIM1_CH1N // Connected to BUCK_RED_SENSE - {PA_7_ALT0, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 // Connected to BUCK_RED_SENSE - {PA_7_ALT1, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM8, 1, 1)}, // TIM8_CH1N // Connected to BUCK_RED_SENSE - {PA_7_ALT2, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 0)}, // TIM17_CH1 // Connected to BUCK_RED_SENSE - {PA_8, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 1, 0)}, // TIM1_CH1 // Connected to BUCK_BLUE_DRIVE - {PA_9, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 2, 0)}, // TIM1_CH2 // Connected to UCPD1_DBCC1 - {PA_9_ALT0, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_TIM2, 3, 0)}, // TIM2_CH3 // Connected to UCPD1_DBCC1 - {PA_10, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 3, 0)}, // TIM1_CH3 // Connected to UCPD1_DBCC2 - {PA_10_ALT0, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_TIM2, 4, 0)}, // TIM2_CH4 // Connected to UCPD1_DBCC2 - {PA_11, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 1, 1)}, // TIM1_CH1N // Connected to USB_DM - {PA_11_ALT0, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_TIM1, 4, 0)}, // TIM1_CH4 // Connected to USB_DM - {PA_11_ALT1, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_TIM4, 1, 0)}, // TIM4_CH1 // Connected to USB_DM - {PA_12, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 2, 1)}, // TIM1_CH2N // Connected to USB_DP - {PA_12_ALT0, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_TIM4, 2, 0)}, // TIM4_CH2 // Connected to USB_DP - {PA_12_ALT1, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 0)}, // TIM16_CH1 // Connected to USB_DP - {PA_13, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_TIM4, 3, 0)}, // TIM4_CH3 // Connected to SYS_JTMS-SWDIO - {PA_13_ALT0, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 1)}, // TIM16_CH1N // Connected to SYS_JTMS-SWDIO - {PA_14, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_TIM8, 2, 0)}, // TIM8_CH2 // Connected to SYS_JTCK-SWCLK - {PA_15, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 // Connected to LD2 [Blue Led] - {PA_15_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM8, 1, 0)}, // TIM8_CH1 // Connected to LD2 [Blue Led] - {PB_0, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 2, 1)}, // TIM1_CH2N // Connected to BUCK_BLUE_SENSE - {PB_0_ALT0, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 // Connected to BUCK_BLUE_SENSE - {PB_0_ALT1, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM8, 2, 1)}, // TIM8_CH2N // Connected to BUCK_BLUE_SENSE - {PB_1, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 3, 1)}, // TIM1_CH3N // Connected to LD3 [Orange Led] - {PB_1_ALT0, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 // Connected to LD3 [Orange Led] - {PB_1_ALT1, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM8, 3, 1)}, // TIM8_CH3N // Connected to LD3 [Orange Led] -// {PB_2, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1 // Connected to JOYSTICK_RIGHT - {PB_2, PWM_20, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM20, 1, 0)}, // TIM20_CH1 // Connected to JOYSTICK_RIGHT - {PB_3, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 // Connected to SYS_JTDO-SWO - {PB_3_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM8, 1, 1)}, // TIM8_CH1N // Connected to SYS_JTDO-SWO - {PB_4, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 // Connected to UCPD1_CC2 - {PB_4_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM8, 2, 1)}, // TIM8_CH2N // Connected to UCPD1_CC2 - {PB_4_ALT1, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 0)}, // TIM16_CH1 // Connected to UCPD1_CC2 - {PB_5, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 // Connected to LD5 [Red Led] - {PB_5_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N // Connected to LD5 [Red Led] - {PB_5_ALT1, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_TIM17, 1, 0)}, // TIM17_CH1 // Connected to LD5 [Red Led] - {PB_6, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 // Connected to UCPD1_CC1 - {PB_6_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_TIM8, 1, 0)}, // TIM8_CH1 // Connected to UCPD1_CC1 - {PB_6_ALT1, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 1)}, // TIM16_CH1N // Connected to UCPD1_CC1 - {PB_7, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_TIM3, 4, 0)}, // TIM3_CH4 // Connected to LD4 [Green Led] - {PB_7_ALT0, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 // Connected to LD4 [Green Led] - {PB_7_ALT1, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 1)}, // TIM17_CH1N // Connected to LD4 [Green Led] - {PB_8, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 - {PB_8_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_TIM8, 2, 0)}, // TIM8_CH2 - {PB_8_ALT1, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM16, 1, 0)}, // TIM16_CH1 - {PB_9, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_TIM1_COMP1, 3, 1)}, // TIM1_CH3N - {PB_9_ALT0, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 - {PB_9_ALT1, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_TIM8, 3, 0)}, // TIM8_CH3 - {PB_9_ALT2, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM17, 1, 0)}, // TIM17_CH1 - {PB_10, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 // Connected to JOYSTICK_UP - {PB_11, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 // Connected to BUCKBOOST_I_IN_SENSE - {PB_13, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 1, 1)}, // TIM1_CH1N // Connected to BUCKBOOST_N1_DRIVE - {PB_14, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 2, 1)}, // TIM1_CH2N // Connected to BUCKBOOST_N2_DRIVE - {PB_14_ALT0, PWM_15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM15, 1, 0)}, // TIM15_CH1 // Connected to BUCKBOOST_N2_DRIVE - {PB_15, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM1, 3, 1)}, // TIM1_CH3N // Connected to BUCKBOOST_P2_DRIVE - {PB_15_ALT0, PWM_15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM15, 1, 1)}, // TIM15_CH1N // Connected to BUCKBOOST_P2_DRIVE - {PB_15_ALT1, PWM_15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM15, 2, 0)}, // TIM15_CH2 // Connected to BUCKBOOST_P2_DRIVE - {PC_0, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 1, 0)}, // TIM1_CH1 - {PC_1, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 2, 0)}, // TIM1_CH2 - {PC_2, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 3, 0)}, // TIM1_CH3 // Connected to USBPD_VIN - {PC_2_ALT0, PWM_20, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM20, 2, 0)}, // TIM20_CH2 // Connected to USBPD_VIN - {PC_3, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM1, 4, 0)}, // TIM1_CH4 // Connected to BUCKBOOST_USBPD_EN - {PC_5, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 4, 1)}, // TIM1_CH4N // Connected to JOYSTICK_DOWN - {PC_6, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 // Connected to BUCK_RED_DRIVE - {PC_6_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM8, 1, 0)}, // TIM8_CH1 // Connected to BUCK_RED_DRIVE - {PC_7, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 // Connected to RC_TP4 - {PC_7_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM8, 2, 0)}, // TIM8_CH2 // Connected to RC_TP4 - {PC_8, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 // Connected to BUCK_GREEN_DRIVE - {PC_8_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM8, 3, 0)}, // TIM8_CH3 // Connected to BUCK_GREEN_DRIVE - {PC_8_ALT1, PWM_20, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM20, 3, 0)}, // TIM20_CH3 // Connected to BUCK_GREEN_DRIVE - {PC_9, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 - {PC_9_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM8, 4, 0)}, // TIM8_CH4 -// {PC_10, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM8, 1, 1)}, // TIM8_CH1N // Connected to STDIO_UART_TX -// {PC_11, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM8, 2, 1)}, // TIM8_CH2N // Connected to STDIO_UART_RX -// {PC_12, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM5, 2, 0)}, // TIM5_CH2 // Connected to USBPD_1A_PROTECT - {PC_12, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM8, 3, 1)}, // TIM8_CH3N // Connected to USBPD_1A_PROTECT - {PC_13, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_TIM1, 1, 1)}, // TIM1_CH1N // Connected to JOYSTICK_SEL - {PC_13_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM8, 4, 1)}, // TIM8_CH4N // Connected to JOYSTICK_SEL - {PF_0, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_TIM1, 3, 1)}, // TIM1_CH3N - {NC, NC, 0} -}; - -//*** SERIAL *** - -MBED_WEAK const PinMap PinMap_UART_TX[] = { - {PA_2, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to BUCKBOOST_I_IN_AVG - {PA_2_ALT0, LPUART_1,STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_LPUART1)}, // Connected to BUCKBOOST_I_IN_AVG - {PA_9, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, // Connected to UCPD1_DBCC1 - {PA_14, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to SYS_JTCK-SWCLK - {PB_3, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to SYS_JTDO-SWO - {PB_6, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, // Connected to UCPD1_CC1 - {PB_9, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, - {PB_10, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, // Connected to JOYSTICK_UP - {PB_11, LPUART_1,STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, // Connected to BUCKBOOST_I_IN_SENSE - {PC_1, LPUART_1,STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, - {PC_4, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, // Connected to JOYSTICK_LEFT - {PC_10, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, // Connected to STDIO_UART_TX - {PC_10_ALT0, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_UART4)}, // Connected to STDIO_UART_TX - {PC_12, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_UART5)}, // Connected to USBPD_1A_PROTECT - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_UART_RX[] = { - {PA_3, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to BUCKBOOST_VOUT - {PA_3_ALT0, LPUART_1,STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_LPUART1)}, // Connected to BUCKBOOST_VOUT - {PA_10, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, // Connected to UCPD1_DBCC2 - {PA_15, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to LD2 [Blue Led] - {PB_4, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to UCPD1_CC2 - {PB_7, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, // Connected to LD4 [Green Led] - {PB_8, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, - {PB_10, LPUART_1,STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, // Connected to JOYSTICK_UP - {PB_11, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, // Connected to BUCKBOOST_I_IN_SENSE - {PC_0, LPUART_1,STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, - {PC_5, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, // Connected to JOYSTICK_DOWN - {PC_11, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, // Connected to STDIO_UART_RX - {PC_11_ALT0, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_UART4)}, // Connected to STDIO_UART_RX - {PD_2, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_UART5)}, // Connected to USBPD_550mA_PROTECT - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_UART_RTS[] = { - {PA_1, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to BUCKBOOST_VIN - {PA_12, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, // Connected to USB_DP - {PA_15, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, // Connected to LD2 [Blue Led] - {PB_1, LPUART_1,STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_LPUART1)}, // Connected to LD3 [Orange Led] - {PB_4, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)}, // Connected to UCPD1_CC2 - {PB_12, LPUART_1,STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, // Connected to BUCKBOOST_P1_DRIVE - {PB_14, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, // Connected to BUCKBOOST_N2_DRIVE - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_UART_CTS[] = { - {PA_0, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to BUCK_GREEN_SENSE - {PA_6, LPUART_1,STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_LPUART1)}, - {PA_11, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, // Connected to USB_DM - {PA_13, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, // Connected to SYS_JTMS-SWDIO - {PB_5, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART5)}, // Connected to LD5 [Red Led] - {PB_7, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART4)}, // Connected to LD4 [Green Led] - {PB_13, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, // Connected to BUCKBOOST_N1_DRIVE - {PB_13_ALT0, LPUART_1,STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART1)}, // Connected to BUCKBOOST_N1_DRIVE - {NC, NC, 0} -}; - -//*** SPI *** - -MBED_WEAK const PinMap PinMap_SPI_MOSI[] = { - {PA_7, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, // Connected to BUCK_RED_SENSE - {PA_11, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, // Connected to USB_DM - {PB_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, // Connected to LD5 [Red Led] - {PB_5_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, // Connected to LD5 [Red Led] - {PB_15, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, // Connected to BUCKBOOST_P2_DRIVE - {PC_12, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, // Connected to USBPD_1A_PROTECT - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_SPI_MISO[] = { - {PA_6, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PA_10, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, // Connected to UCPD1_DBCC2 - {PB_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, // Connected to UCPD1_CC2 - {PB_4_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, // Connected to UCPD1_CC2 - {PB_14, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, // Connected to BUCKBOOST_N2_DRIVE -// {PC_11, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, // Connected to STDIO_UART_RX - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_SPI_SCLK[] = { - {PA_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PB_3, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, // Connected to SYS_JTDO-SWO - {PB_3_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, // Connected to SYS_JTDO-SWO - {PB_13, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, // Connected to BUCKBOOST_N1_DRIVE -// {PC_10, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, // Connected to STDIO_UART_TX - {PF_1, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_SPI_SSEL[] = { - {PA_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, - {PA_4_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, - {PA_15, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, // Connected to LD2 [Blue Led] - {PA_15_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, // Connected to LD2 [Blue Led] - {PB_12, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, // Connected to BUCKBOOST_P1_DRIVE - {PF_0, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, - {NC, NC, 0} -}; - -//*** CAN *** - -MBED_WEAK const PinMap PinMap_CAN_RD[] = { - {PA_8, CAN_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN3)}, // Connected to BUCK_BLUE_DRIVE - {PA_11, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, // Connected to USB_DM - {PB_3, CAN_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN3)}, // Connected to SYS_JTDO-SWO - {PB_5, CAN_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)}, // Connected to LD5 [Red Led] - {PB_8, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, - {PB_12, CAN_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)}, // Connected to BUCKBOOST_P1_DRIVE - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_CAN_TD[] = { - {PA_12, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, // Connected to USB_DP - {PA_15, CAN_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN3)}, // Connected to LD2 [Blue Led] - {PB_4, CAN_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF11_FDCAN3)}, // Connected to UCPD1_CC2 - {PB_6, CAN_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)}, // Connected to UCPD1_CC1 - {PB_9, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, - {PB_13, CAN_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)}, // Connected to BUCKBOOST_N1_DRIVE - {NC, NC, 0} -}; - -//*** QUADSPI *** - -MBED_WEAK const PinMap PinMap_QSPI_DATA0[] = { - {PB_1, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI1_BK1_IO0 // Connected to LD3 [Orange Led] - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_QSPI_DATA1[] = { - {PB_0, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI1_BK1_IO1 // Connected to BUCK_BLUE_SENSE - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_QSPI_DATA2[] = { - {PA_7, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI1_BK1_IO2 // Connected to BUCK_RED_SENSE - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_QSPI_DATA3[] = { - {PA_6, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI1_BK1_IO3 - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_QSPI_SCLK[] = { - {PA_3, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI1_CLK // Connected to BUCKBOOST_VOUT - {PB_10, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI1_CLK // Connected to JOYSTICK_UP - {NC, NC, 0} -}; - -MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = { - {PA_2, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI1_BK1_NCS // Connected to BUCKBOOST_I_IN_AVG - {PB_11, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_QUADSPI)}, // QUADSPI1_BK1_NCS // Connected to BUCKBOOST_I_IN_SENSE - {NC, NC, 0} -}; - -//*** USBDEVICE *** - -MBED_WEAK const PinMap PinMap_USB_FS[] = { - {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DM // Connected to USB_DM - {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_DP // Connected to USB_DP - {NC, NC, 0} -}; diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TARGET_DISCO_G474RE/PinNames.h b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TARGET_DISCO_G474RE/PinNames.h deleted file mode 100644 index 4d36896fab..0000000000 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TARGET_DISCO_G474RE/PinNames.h +++ /dev/null @@ -1,83 +0,0 @@ -/* mbed Microcontroller Library - ******************************************************************************* - * Copyright (c) 2018, STMicroelectronics - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - ******************************************************************************* - * - * Automatically generated from STM32G474R(B-C-E)Tx.xml - */ - -#ifndef MBED_PINNAMES_H -#define MBED_PINNAMES_H - -#include "cmsis.h" -#include "PinNamesTypes.h" - -#ifdef __cplusplus -extern "C" { -#endif - -typedef enum { - ALT0 = 0x100, - ALT1 = 0x200, - ALT2 = 0x300, - ALT3 = 0x400 -} ALTx; - -typedef enum { - - - /**** USB pins ****/ - USB_DM = PA_11, - USB_DP = PA_12, - - /**** OSCILLATOR pins ****/ - RCC_OSC32_IN = PC_14, - RCC_OSC32_OUT = PC_15, - RCC_OSC_IN = PF_0, - RCC_OSC_OUT = PF_1, - - /**** DEBUG pins ****/ - SYS_JTCK_SWCLK = PA_14, - SYS_JTDI = PA_15, - SYS_JTDO_SWO = PB_3, - SYS_JTMS_SWDIO = PA_13, - SYS_JTRST = PB_4, - SYS_PVD_IN = PB_7, - SYS_WKUP1 = PA_0, - SYS_WKUP2 = PC_13, - SYS_WKUP4 = PA_2, - SYS_WKUP5 = PC_5, - - // Not connected - NC = (int)0xFFFFFFFF -} PinName; - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TOOLCHAIN_ARM_STD/stm32g474xx.sct b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TOOLCHAIN_ARM_STD/stm32g474xx.sct deleted file mode 100644 index a27952372d..0000000000 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/TOOLCHAIN_ARM_STD/stm32g474xx.sct +++ /dev/null @@ -1,57 +0,0 @@ -#! armcc -E -; Scatter-Loading Description File -; -; SPDX-License-Identifier: BSD-3-Clause -;****************************************************************************** -;* @attention -;* -;* Copyright (c) 2016-2020 STMicroelectronics. -;* All rights reserved. -;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause -;* -;****************************************************************************** - -#include "../cmsis_nvic.h" - -#if !defined(MBED_APP_START) - #define MBED_APP_START MBED_ROM_START -#endif - -#if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE MBED_ROM_SIZE -#endif - -/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) -# if defined(MBED_BOOT_STACK_SIZE) -# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE -# else -# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 -# endif -#endif - -/* Round up VECTORS_SIZE to 8 bytes */ -#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7) - -LR_IROM1 MBED_APP_START MBED_APP_SIZE { - - ER_IROM1 MBED_APP_START MBED_APP_SIZE { - *.o (RESET, +First) - *(InRoot$$Sections) - .ANY (+RO) - } - - RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data - .ANY (+RW +ZI) - } - - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up - } - - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down - } -} diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xx/TOOLCHAIN_ARM_STD/startup_stm32g483xx.S b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xE/TOOLCHAIN_ARM/startup_stm32g483xx.S similarity index 100% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xx/TOOLCHAIN_ARM_STD/startup_stm32g483xx.S rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xE/TOOLCHAIN_ARM/startup_stm32g483xx.S diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xE/TOOLCHAIN_ARM/stm32g483xe.sct b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xE/TOOLCHAIN_ARM/stm32g483xe.sct new file mode 100644 index 0000000000..331351213d --- /dev/null +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xE/TOOLCHAIN_ARM/stm32g483xe.sct @@ -0,0 +1,57 @@ +#! armcc -E +; Scatter-Loading Description File +; +; SPDX-License-Identifier: BSD-3-Clause +;****************************************************************************** +;* @attention +;* +;* Copyright (c) 2016-2020 STMicroelectronics. +;* All rights reserved. +;* +;* This software component is licensed by ST under BSD 3-Clause license, +;* the "License"; You may not use this file except in compliance with the +;* License. You may obtain a copy of the License at: +;* opensource.org/licenses/BSD-3-Clause +;* +;****************************************************************************** + +#include "../cmsis_nvic.h" + +#if !defined(MBED_APP_START) + #define MBED_APP_START MBED_ROM_START +#endif + +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE MBED_ROM_SIZE +#endif + +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ +#if defined(MBED_BOOT_STACK_SIZE) +#define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +#else +#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#endif +#endif + +/* Round up VECTORS_SIZE to 8 bytes */ +#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + } + + RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data + .ANY (+RW +ZI) + } + + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + } + + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down + } +} diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xx/TOOLCHAIN_GCC_ARM/startup_stm32g483xx.S b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xE/TOOLCHAIN_GCC_ARM/startup_stm32g483xx.S similarity index 100% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xx/TOOLCHAIN_GCC_ARM/startup_stm32g483xx.S rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xE/TOOLCHAIN_GCC_ARM/startup_stm32g483xx.S diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xE/TOOLCHAIN_GCC_ARM/stm32g483xe.ld b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xE/TOOLCHAIN_GCC_ARM/stm32g483xe.ld new file mode 100644 index 0000000000..5f479936c8 --- /dev/null +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xE/TOOLCHAIN_GCC_ARM/stm32g483xe.ld @@ -0,0 +1,203 @@ +/* Linker script to configure memory regions. */ +/* + * SPDX-License-Identifier: BSD-3-Clause + ****************************************************************************** + * @attention + * + * Copyright (c) 2016-2020 STMicroelectronics. + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** +*/ + +#include "../cmsis_nvic.h" + + +#if !defined(MBED_APP_START) + #define MBED_APP_START MBED_ROM_START +#endif + +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE MBED_ROM_SIZE +#endif + +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + /* This value is normally defined by the tools + to 0x1000 for bare metal and 0x400 for RTOS */ + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#endif + +/* Round up VECTORS_SIZE to 8 bytes */ +#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8) + +MEMORY +{ + FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE + RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE - VECTORS_SIZE +} + +/* Linker script to place sections and symbol values. Should be used together + * with other linker script that defines memory regions FLASH and RAM. + * It references following symbols, which must be defined in code: + * Reset_Handler : Entry of reset handler + * + * It defines following symbols, which code can use without definition: + * __exidx_start + * __exidx_end + * __etext + * __data_start__ + * __preinit_array_start + * __preinit_array_end + * __init_array_start + * __init_array_end + * __fini_array_start + * __fini_array_end + * __data_end__ + * __bss_start__ + * __bss_end__ + * __end__ + * end + * __HeapLimit + * __StackLimit + * __StackTop + * __stack + * _estack + */ +ENTRY(Reset_Handler) + +SECTIONS +{ + .text : + { + KEEP(*(.isr_vector)) + *(.text*) + + KEEP(*(.init)) + KEEP(*(.fini)) + + /* .ctors */ + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + *(SORT(.ctors.*)) + *(.ctors) + + /* .dtors */ + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + *(SORT(.dtors.*)) + *(.dtors) + + *(.rodata*) + + KEEP(*(.eh_frame*)) + } > FLASH + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > FLASH + + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > FLASH + __exidx_end = .; + + __etext = .; + _sidata = .; + + .data : AT (__etext) + { + __data_start__ = .; + _sdata = .; + *(vtable) + *(.data*) + + . = ALIGN(8); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP(*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + + . = ALIGN(8); + /* init data */ + PROVIDE_HIDDEN (__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE_HIDDEN (__init_array_end = .); + + . = ALIGN(8); + /* finit data */ + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP(*(SORT(.fini_array.*))) + KEEP(*(.fini_array)) + PROVIDE_HIDDEN (__fini_array_end = .); + + KEEP(*(.jcr*)) + . = ALIGN(8); + /* All data end */ + __data_end__ = .; + _edata = .; + + } > RAM + + /* Uninitialized data section + * This region is not initialized by the C/C++ library and can be used to + * store state across soft reboots. */ + .uninitialized (NOLOAD): + { + . = ALIGN(32); + __uninitialized_start = .; + *(.uninitialized) + KEEP(*(.keep.uninitialized)) + . = ALIGN(32); + __uninitialized_end = .; + } > RAM + + .bss : + { + . = ALIGN(8); + __bss_start__ = .; + _sbss = .; + *(.bss*) + *(COMMON) + . = ALIGN(8); + __bss_end__ = .; + _ebss = .; + } > RAM + + .heap (COPY): + { + __end__ = .; + PROVIDE(end = .); + *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; + __HeapLimit = .; + } > RAM + + /* .stack_dummy section doesn't contains any symbols. It is only + * used for linker to calculate size of stack sections, and assign + * values to stack symbols later */ + .stack_dummy (COPY): + { + *(.stack*) + } > RAM + + /* Set stack top to end of RAM, and stack limit move down by + * size of stack_dummy section */ + __StackTop = ORIGIN(RAM) + LENGTH(RAM); + _estack = __StackTop; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; + PROVIDE(__stack = __StackTop); + + /* Check if data + heap + stack exceeds RAM limit */ + ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") +} diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xx/TOOLCHAIN_IAR/startup_stm32g483xx.S b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xE/TOOLCHAIN_IAR/startup_stm32g483xx.S similarity index 100% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xx/TOOLCHAIN_IAR/startup_stm32g483xx.S rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xE/TOOLCHAIN_IAR/startup_stm32g483xx.S diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xx/TOOLCHAIN_IAR/stm32g483xx.icf b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xE/TOOLCHAIN_IAR/stm32g483xe.icf similarity index 97% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xx/TOOLCHAIN_IAR/stm32g483xx.icf rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xE/TOOLCHAIN_IAR/stm32g483xe.icf index 64170e81d1..d3bf9e3cd3 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xx/TOOLCHAIN_IAR/stm32g483xx.icf +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xE/TOOLCHAIN_IAR/stm32g483xe.icf @@ -32,7 +32,7 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) { } if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { - /* This value is normally defined by the tools + /* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; } diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xx/cmsis_nvic.h b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xE/cmsis_nvic.h similarity index 70% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xx/cmsis_nvic.h rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xE/cmsis_nvic.h index 30891318eb..6bbb29dd08 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G473xx/cmsis_nvic.h +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xE/cmsis_nvic.h @@ -23,10 +23,6 @@ #if !defined(MBED_ROM_SIZE) #define MBED_ROM_SIZE 0x80000 // 512 KB - // 0x40000 STM32G473CCUx STM32G473MCTx STM32G473VCHx STM32G473CCTx STM32G473VCTx STM32G473QCTx STM32G473RCTx STM32G473VCIx - // 0x20000 STM32G473RBTx STM32G473QBTx STM32G473MBTx STM32G473VBIx STM32G473CBUx STM32G473VBTx STM32G473VBHx STM32G473CBTx - // 0x80000 STM32G473CETx STM32G473RETx STM32G473MEUx STM32G473VEIx STM32G473CEUx STM32G473METx STM32G473VEHx STM32G473VETx STM32G473QETx -#warning "check MBED_ROM_SIZE value in cmsis_nvic.h" #endif #if !defined(MBED_RAM_START) diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xx/TOOLCHAIN_ARM_STD/stm32g483xx.sct b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xx/TOOLCHAIN_ARM_STD/stm32g483xx.sct deleted file mode 100644 index a27952372d..0000000000 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xx/TOOLCHAIN_ARM_STD/stm32g483xx.sct +++ /dev/null @@ -1,57 +0,0 @@ -#! armcc -E -; Scatter-Loading Description File -; -; SPDX-License-Identifier: BSD-3-Clause -;****************************************************************************** -;* @attention -;* -;* Copyright (c) 2016-2020 STMicroelectronics. -;* All rights reserved. -;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause -;* -;****************************************************************************** - -#include "../cmsis_nvic.h" - -#if !defined(MBED_APP_START) - #define MBED_APP_START MBED_ROM_START -#endif - -#if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE MBED_ROM_SIZE -#endif - -/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) -# if defined(MBED_BOOT_STACK_SIZE) -# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE -# else -# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 -# endif -#endif - -/* Round up VECTORS_SIZE to 8 bytes */ -#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7) - -LR_IROM1 MBED_APP_START MBED_APP_SIZE { - - ER_IROM1 MBED_APP_START MBED_APP_SIZE { - *.o (RESET, +First) - *(InRoot$$Sections) - .ANY (+RO) - } - - RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data - .ANY (+RW +ZI) - } - - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up - } - - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down - } -} diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xx/TOOLCHAIN_GCC_ARM/stm32g483xx.ld b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xx/TOOLCHAIN_GCC_ARM/stm32g483xx.ld deleted file mode 100644 index 0a93b7b56b..0000000000 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G483xx/TOOLCHAIN_GCC_ARM/stm32g483xx.ld +++ /dev/null @@ -1,206 +0,0 @@ -/* Linker script to configure memory regions. */ -/* - * SPDX-License-Identifier: BSD-3-Clause - ****************************************************************************** - * @attention - * - * Copyright (c) 2016-2020 STMicroelectronics. - * All rights reserved. - * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** -*/ - -#include "../cmsis_nvic.h" - - -#if !defined(MBED_APP_START) - #define MBED_APP_START MBED_ROM_START -#endif - -#if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE MBED_ROM_SIZE -#endif - -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - /* This value is normally defined by the tools - to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 -#endif - -/* Round up VECTORS_SIZE to 8 bytes */ -#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8) - -MEMORY -{ - FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE - RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE - VECTORS_SIZE -} - -/* Linker script to place sections and symbol values. Should be used together - * with other linker script that defines memory regions FLASH and RAM. - * It references following symbols, which must be defined in code: - * Reset_Handler : Entry of reset handler - * - * It defines following symbols, which code can use without definition: - * __exidx_start - * __exidx_end - * __etext - * __data_start__ - * __preinit_array_start - * __preinit_array_end - * __init_array_start - * __init_array_end - * __fini_array_start - * __fini_array_end - * __data_end__ - * __bss_start__ - * __bss_end__ - * __end__ - * end - * __HeapLimit - * __StackLimit - * __StackTop - * __stack - * _estack - */ -ENTRY(Reset_Handler) - -SECTIONS -{ - .text : - { - KEEP(*(.isr_vector)) - *(.text*) - - KEEP(*(.init)) - KEEP(*(.fini)) - - /* .ctors */ - *crtbegin.o(.ctors) - *crtbegin?.o(.ctors) - *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) - *(SORT(.ctors.*)) - *(.ctors) - - /* .dtors */ - *crtbegin.o(.dtors) - *crtbegin?.o(.dtors) - *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) - *(SORT(.dtors.*)) - *(.dtors) - - *(.rodata*) - - KEEP(*(.eh_frame*)) - } > FLASH - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > FLASH - - __exidx_start = .; - .ARM.exidx : - { - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - } > FLASH - __exidx_end = .; - - /* Location counter can end up 2byte aligned with narrow Thumb code but - __etext is assumed by startup code to be the LMA of a section in RAM - which must be 8-byte aligned */ - __etext = ALIGN (8); - _sidata = .; - - .data : AT (__etext) - { - __data_start__ = .; - _sdata = .; - *(vtable) - *(.data*) - - . = ALIGN(8); - /* preinit data */ - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP(*(.preinit_array)) - PROVIDE_HIDDEN (__preinit_array_end = .); - - . = ALIGN(8); - /* init data */ - PROVIDE_HIDDEN (__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE_HIDDEN (__init_array_end = .); - - . = ALIGN(8); - /* finit data */ - PROVIDE_HIDDEN (__fini_array_start = .); - KEEP(*(SORT(.fini_array.*))) - KEEP(*(.fini_array)) - PROVIDE_HIDDEN (__fini_array_end = .); - - KEEP(*(.jcr*)) - . = ALIGN(8); - /* All data end */ - __data_end__ = .; - _edata = .; - - } > RAM - - /* Uninitialized data section - * This region is not initialized by the C/C++ library and can be used to - * store state across soft reboots. */ - .uninitialized (NOLOAD): - { - . = ALIGN(32); - __uninitialized_start = .; - *(.uninitialized) - KEEP(*(.keep.uninitialized)) - . = ALIGN(32); - __uninitialized_end = .; - } > RAM - - .bss : - { - . = ALIGN(8); - __bss_start__ = .; - _sbss = .; - *(.bss*) - *(COMMON) - . = ALIGN(8); - __bss_end__ = .; - _ebss = .; - } > RAM - - .heap (COPY): - { - __end__ = .; - PROVIDE(end = .); - *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; - __HeapLimit = .; - } > RAM - - /* .stack_dummy section doesn't contains any symbols. It is only - * used for linker to calculate size of stack sections, and assign - * values to stack symbols later */ - .stack_dummy (COPY): - { - *(.stack*) - } > RAM - - /* Set stack top to end of RAM, and stack limit move down by - * size of stack_dummy section */ - __StackTop = ORIGIN(RAM) + LENGTH(RAM); - _estack = __StackTop; - __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; - PROVIDE(__stack = __StackTop); - - /* Check if data + heap + stack exceeds RAM limit */ - ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") -} diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xx/TOOLCHAIN_ARM_STD/startup_stm32g484xx.S b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xE/TOOLCHAIN_ARM/startup_stm32g484xx.S similarity index 100% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xx/TOOLCHAIN_ARM_STD/startup_stm32g484xx.S rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xE/TOOLCHAIN_ARM/startup_stm32g484xx.S diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xE/TOOLCHAIN_ARM/stm32g484xe.sct b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xE/TOOLCHAIN_ARM/stm32g484xe.sct new file mode 100644 index 0000000000..331351213d --- /dev/null +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xE/TOOLCHAIN_ARM/stm32g484xe.sct @@ -0,0 +1,57 @@ +#! armcc -E +; Scatter-Loading Description File +; +; SPDX-License-Identifier: BSD-3-Clause +;****************************************************************************** +;* @attention +;* +;* Copyright (c) 2016-2020 STMicroelectronics. +;* All rights reserved. +;* +;* This software component is licensed by ST under BSD 3-Clause license, +;* the "License"; You may not use this file except in compliance with the +;* License. You may obtain a copy of the License at: +;* opensource.org/licenses/BSD-3-Clause +;* +;****************************************************************************** + +#include "../cmsis_nvic.h" + +#if !defined(MBED_APP_START) + #define MBED_APP_START MBED_ROM_START +#endif + +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE MBED_ROM_SIZE +#endif + +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) +/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ +#if defined(MBED_BOOT_STACK_SIZE) +#define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE +#else +#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#endif +#endif + +/* Round up VECTORS_SIZE to 8 bytes */ +#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + } + + RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data + .ANY (+RW +ZI) + } + + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up + } + + ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down + } +} diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xx/TOOLCHAIN_GCC_ARM/startup_stm32g484xx.S b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xE/TOOLCHAIN_GCC_ARM/startup_stm32g484xx.S similarity index 100% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xx/TOOLCHAIN_GCC_ARM/startup_stm32g484xx.S rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xE/TOOLCHAIN_GCC_ARM/startup_stm32g484xx.S diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xE/TOOLCHAIN_GCC_ARM/stm32g484xe.ld b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xE/TOOLCHAIN_GCC_ARM/stm32g484xe.ld new file mode 100644 index 0000000000..5f479936c8 --- /dev/null +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xE/TOOLCHAIN_GCC_ARM/stm32g484xe.ld @@ -0,0 +1,203 @@ +/* Linker script to configure memory regions. */ +/* + * SPDX-License-Identifier: BSD-3-Clause + ****************************************************************************** + * @attention + * + * Copyright (c) 2016-2020 STMicroelectronics. + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** +*/ + +#include "../cmsis_nvic.h" + + +#if !defined(MBED_APP_START) + #define MBED_APP_START MBED_ROM_START +#endif + +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE MBED_ROM_SIZE +#endif + +#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) + /* This value is normally defined by the tools + to 0x1000 for bare metal and 0x400 for RTOS */ + #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 +#endif + +/* Round up VECTORS_SIZE to 8 bytes */ +#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8) + +MEMORY +{ + FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE + RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE - VECTORS_SIZE +} + +/* Linker script to place sections and symbol values. Should be used together + * with other linker script that defines memory regions FLASH and RAM. + * It references following symbols, which must be defined in code: + * Reset_Handler : Entry of reset handler + * + * It defines following symbols, which code can use without definition: + * __exidx_start + * __exidx_end + * __etext + * __data_start__ + * __preinit_array_start + * __preinit_array_end + * __init_array_start + * __init_array_end + * __fini_array_start + * __fini_array_end + * __data_end__ + * __bss_start__ + * __bss_end__ + * __end__ + * end + * __HeapLimit + * __StackLimit + * __StackTop + * __stack + * _estack + */ +ENTRY(Reset_Handler) + +SECTIONS +{ + .text : + { + KEEP(*(.isr_vector)) + *(.text*) + + KEEP(*(.init)) + KEEP(*(.fini)) + + /* .ctors */ + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + *(SORT(.ctors.*)) + *(.ctors) + + /* .dtors */ + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + *(SORT(.dtors.*)) + *(.dtors) + + *(.rodata*) + + KEEP(*(.eh_frame*)) + } > FLASH + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > FLASH + + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > FLASH + __exidx_end = .; + + __etext = .; + _sidata = .; + + .data : AT (__etext) + { + __data_start__ = .; + _sdata = .; + *(vtable) + *(.data*) + + . = ALIGN(8); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP(*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + + . = ALIGN(8); + /* init data */ + PROVIDE_HIDDEN (__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE_HIDDEN (__init_array_end = .); + + . = ALIGN(8); + /* finit data */ + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP(*(SORT(.fini_array.*))) + KEEP(*(.fini_array)) + PROVIDE_HIDDEN (__fini_array_end = .); + + KEEP(*(.jcr*)) + . = ALIGN(8); + /* All data end */ + __data_end__ = .; + _edata = .; + + } > RAM + + /* Uninitialized data section + * This region is not initialized by the C/C++ library and can be used to + * store state across soft reboots. */ + .uninitialized (NOLOAD): + { + . = ALIGN(32); + __uninitialized_start = .; + *(.uninitialized) + KEEP(*(.keep.uninitialized)) + . = ALIGN(32); + __uninitialized_end = .; + } > RAM + + .bss : + { + . = ALIGN(8); + __bss_start__ = .; + _sbss = .; + *(.bss*) + *(COMMON) + . = ALIGN(8); + __bss_end__ = .; + _ebss = .; + } > RAM + + .heap (COPY): + { + __end__ = .; + PROVIDE(end = .); + *(.heap*) + . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; + __HeapLimit = .; + } > RAM + + /* .stack_dummy section doesn't contains any symbols. It is only + * used for linker to calculate size of stack sections, and assign + * values to stack symbols later */ + .stack_dummy (COPY): + { + *(.stack*) + } > RAM + + /* Set stack top to end of RAM, and stack limit move down by + * size of stack_dummy section */ + __StackTop = ORIGIN(RAM) + LENGTH(RAM); + _estack = __StackTop; + __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; + PROVIDE(__stack = __StackTop); + + /* Check if data + heap + stack exceeds RAM limit */ + ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") +} diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xx/TOOLCHAIN_IAR/startup_stm32g484xx.S b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xE/TOOLCHAIN_IAR/startup_stm32g484xx.S similarity index 100% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xx/TOOLCHAIN_IAR/startup_stm32g484xx.S rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xE/TOOLCHAIN_IAR/startup_stm32g484xx.S diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xE/TOOLCHAIN_IAR/stm32g484xe.icf b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xE/TOOLCHAIN_IAR/stm32g484xe.icf new file mode 100644 index 0000000000..d3bf9e3cd3 --- /dev/null +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xE/TOOLCHAIN_IAR/stm32g484xe.icf @@ -0,0 +1,59 @@ +/* Linker script to configure memory regions. + * + * SPDX-License-Identifier: BSD-3-Clause + ****************************************************************************** + * @attention + * + * Copyright (c) 2016-2020 STMicroelectronics. + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** +*/ +/* Device specific values */ + +/* Tools provide -DMBED_ROM_START=xxx -DMBED_ROM_SIZE=xxx -DMBED_RAM_START=xxx -DMBED_RAM_SIZE=xxx */ + +define symbol VECTORS = 118; /* This value must match NVIC_NUM_VECTORS in cmsis_nvic.h */ +define symbol HEAP_SIZE = 0xa000; + +/* Common - Do not change */ + +if (!isdefinedsymbol(MBED_APP_START)) { + define symbol MBED_APP_START = MBED_ROM_START; +} + +if (!isdefinedsymbol(MBED_APP_SIZE)) { + define symbol MBED_APP_SIZE = MBED_ROM_SIZE; +} + +if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { + /* This value is normally defined by the tools + to 0x1000 for bare metal and 0x400 for RTOS */ + define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; +} + +/* Round up VECTORS_SIZE to 8 bytes */ +define symbol VECTORS_SIZE = ((VECTORS * 4) + 7) & ~7; +define symbol RAM_REGION_START = MBED_RAM_START + VECTORS_SIZE; +define symbol RAM_REGION_SIZE = MBED_RAM_SIZE - VECTORS_SIZE; + +define memory mem with size = 4G; +define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE]; +define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE]; + +define block CSTACK with alignment = 8, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { }; +define block HEAP with alignment = 8, size = HEAP_SIZE { }; + +initialize by copy { readwrite }; +do not initialize { section .noinit }; + +place at address mem: MBED_APP_START { readonly section .intvec }; + +place in ROM_region { readonly }; +place in RAM_region { readwrite, + block CSTACK, block HEAP }; diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/cmsis_nvic.h b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xE/cmsis_nvic.h similarity index 70% rename from targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/cmsis_nvic.h rename to targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xE/cmsis_nvic.h index 0badcaa4a0..6bbb29dd08 100644 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G474xx/cmsis_nvic.h +++ b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xE/cmsis_nvic.h @@ -23,10 +23,6 @@ #if !defined(MBED_ROM_SIZE) #define MBED_ROM_SIZE 0x80000 // 512 KB - // 0x40000 STM32G474VCIx STM32G474CCTx STM32G474QCTx STM32G474VCHx STM32G474CCUx STM32G474MCTx STM32G474VCTx STM32G474RCTx - // 0x20000 STM32G474VBIx STM32G474MBTx STM32G474CBTx STM32G474RBTx STM32G474QBTx STM32G474VBHx STM32G474VBTx STM32G474CBUx - // 0x80000 STM32G474CEUx STM32G474VEHx STM32G474RETx STM32G474QETx STM32G474METx STM32G474CETx STM32G474VEIx STM32G474VETx STM32G474MEYx -#warning "check MBED_ROM_SIZE value in cmsis_nvic.h" #endif #if !defined(MBED_RAM_START) diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xx/TOOLCHAIN_ARM_STD/stm32g484xx.sct b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xx/TOOLCHAIN_ARM_STD/stm32g484xx.sct deleted file mode 100644 index a27952372d..0000000000 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xx/TOOLCHAIN_ARM_STD/stm32g484xx.sct +++ /dev/null @@ -1,57 +0,0 @@ -#! armcc -E -; Scatter-Loading Description File -; -; SPDX-License-Identifier: BSD-3-Clause -;****************************************************************************** -;* @attention -;* -;* Copyright (c) 2016-2020 STMicroelectronics. -;* All rights reserved. -;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause -;* -;****************************************************************************** - -#include "../cmsis_nvic.h" - -#if !defined(MBED_APP_START) - #define MBED_APP_START MBED_ROM_START -#endif - -#if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE MBED_ROM_SIZE -#endif - -/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */ -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) -# if defined(MBED_BOOT_STACK_SIZE) -# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE -# else -# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 -# endif -#endif - -/* Round up VECTORS_SIZE to 8 bytes */ -#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7) - -LR_IROM1 MBED_APP_START MBED_APP_SIZE { - - ER_IROM1 MBED_APP_START MBED_APP_SIZE { - *.o (RESET, +First) - *(InRoot$$Sections) - .ANY (+RO) - } - - RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data - .ANY (+RW +ZI) - } - - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up - } - - ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down - } -} diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xx/TOOLCHAIN_GCC_ARM/stm32g484xx.ld b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xx/TOOLCHAIN_GCC_ARM/stm32g484xx.ld deleted file mode 100644 index 0a93b7b56b..0000000000 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xx/TOOLCHAIN_GCC_ARM/stm32g484xx.ld +++ /dev/null @@ -1,206 +0,0 @@ -/* Linker script to configure memory regions. */ -/* - * SPDX-License-Identifier: BSD-3-Clause - ****************************************************************************** - * @attention - * - * Copyright (c) 2016-2020 STMicroelectronics. - * All rights reserved. - * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** -*/ - -#include "../cmsis_nvic.h" - - -#if !defined(MBED_APP_START) - #define MBED_APP_START MBED_ROM_START -#endif - -#if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE MBED_ROM_SIZE -#endif - -#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE) - /* This value is normally defined by the tools - to 0x1000 for bare metal and 0x400 for RTOS */ - #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400 -#endif - -/* Round up VECTORS_SIZE to 8 bytes */ -#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8) - -MEMORY -{ - FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE - RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE - VECTORS_SIZE -} - -/* Linker script to place sections and symbol values. Should be used together - * with other linker script that defines memory regions FLASH and RAM. - * It references following symbols, which must be defined in code: - * Reset_Handler : Entry of reset handler - * - * It defines following symbols, which code can use without definition: - * __exidx_start - * __exidx_end - * __etext - * __data_start__ - * __preinit_array_start - * __preinit_array_end - * __init_array_start - * __init_array_end - * __fini_array_start - * __fini_array_end - * __data_end__ - * __bss_start__ - * __bss_end__ - * __end__ - * end - * __HeapLimit - * __StackLimit - * __StackTop - * __stack - * _estack - */ -ENTRY(Reset_Handler) - -SECTIONS -{ - .text : - { - KEEP(*(.isr_vector)) - *(.text*) - - KEEP(*(.init)) - KEEP(*(.fini)) - - /* .ctors */ - *crtbegin.o(.ctors) - *crtbegin?.o(.ctors) - *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) - *(SORT(.ctors.*)) - *(.ctors) - - /* .dtors */ - *crtbegin.o(.dtors) - *crtbegin?.o(.dtors) - *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) - *(SORT(.dtors.*)) - *(.dtors) - - *(.rodata*) - - KEEP(*(.eh_frame*)) - } > FLASH - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > FLASH - - __exidx_start = .; - .ARM.exidx : - { - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - } > FLASH - __exidx_end = .; - - /* Location counter can end up 2byte aligned with narrow Thumb code but - __etext is assumed by startup code to be the LMA of a section in RAM - which must be 8-byte aligned */ - __etext = ALIGN (8); - _sidata = .; - - .data : AT (__etext) - { - __data_start__ = .; - _sdata = .; - *(vtable) - *(.data*) - - . = ALIGN(8); - /* preinit data */ - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP(*(.preinit_array)) - PROVIDE_HIDDEN (__preinit_array_end = .); - - . = ALIGN(8); - /* init data */ - PROVIDE_HIDDEN (__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE_HIDDEN (__init_array_end = .); - - . = ALIGN(8); - /* finit data */ - PROVIDE_HIDDEN (__fini_array_start = .); - KEEP(*(SORT(.fini_array.*))) - KEEP(*(.fini_array)) - PROVIDE_HIDDEN (__fini_array_end = .); - - KEEP(*(.jcr*)) - . = ALIGN(8); - /* All data end */ - __data_end__ = .; - _edata = .; - - } > RAM - - /* Uninitialized data section - * This region is not initialized by the C/C++ library and can be used to - * store state across soft reboots. */ - .uninitialized (NOLOAD): - { - . = ALIGN(32); - __uninitialized_start = .; - *(.uninitialized) - KEEP(*(.keep.uninitialized)) - . = ALIGN(32); - __uninitialized_end = .; - } > RAM - - .bss : - { - . = ALIGN(8); - __bss_start__ = .; - _sbss = .; - *(.bss*) - *(COMMON) - . = ALIGN(8); - __bss_end__ = .; - _ebss = .; - } > RAM - - .heap (COPY): - { - __end__ = .; - PROVIDE(end = .); - *(.heap*) - . = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE; - __HeapLimit = .; - } > RAM - - /* .stack_dummy section doesn't contains any symbols. It is only - * used for linker to calculate size of stack sections, and assign - * values to stack symbols later */ - .stack_dummy (COPY): - { - *(.stack*) - } > RAM - - /* Set stack top to end of RAM, and stack limit move down by - * size of stack_dummy section */ - __StackTop = ORIGIN(RAM) + LENGTH(RAM); - _estack = __StackTop; - __StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE; - PROVIDE(__stack = __StackTop); - - /* Check if data + heap + stack exceeds RAM limit */ - ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") -} diff --git a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xx/TOOLCHAIN_IAR/stm32g484xx.icf b/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xx/TOOLCHAIN_IAR/stm32g484xx.icf deleted file mode 100644 index 64170e81d1..0000000000 --- a/targets/TARGET_STM/TARGET_STM32G4/TARGET_STM32G484xx/TOOLCHAIN_IAR/stm32g484xx.icf +++ /dev/null @@ -1,59 +0,0 @@ -/* Linker script to configure memory regions. - * - * SPDX-License-Identifier: BSD-3-Clause - ****************************************************************************** - * @attention - * - * Copyright (c) 2016-2020 STMicroelectronics. - * All rights reserved. - * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** -*/ -/* Device specific values */ - -/* Tools provide -DMBED_ROM_START=xxx -DMBED_ROM_SIZE=xxx -DMBED_RAM_START=xxx -DMBED_RAM_SIZE=xxx */ - -define symbol VECTORS = 118; /* This value must match NVIC_NUM_VECTORS in cmsis_nvic.h */ -define symbol HEAP_SIZE = 0xa000; - -/* Common - Do not change */ - -if (!isdefinedsymbol(MBED_APP_START)) { - define symbol MBED_APP_START = MBED_ROM_START; -} - -if (!isdefinedsymbol(MBED_APP_SIZE)) { - define symbol MBED_APP_SIZE = MBED_ROM_SIZE; -} - -if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) { - /* This value is normally defined by the tools - to 0x1000 for bare metal and 0x400 for RTOS */ - define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400; -} - -/* Round up VECTORS_SIZE to 8 bytes */ -define symbol VECTORS_SIZE = ((VECTORS * 4) + 7) & ~7; -define symbol RAM_REGION_START = MBED_RAM_START + VECTORS_SIZE; -define symbol RAM_REGION_SIZE = MBED_RAM_SIZE - VECTORS_SIZE; - -define memory mem with size = 4G; -define region ROM_region = mem:[from MBED_APP_START size MBED_APP_SIZE]; -define region RAM_region = mem:[from RAM_REGION_START size RAM_REGION_SIZE]; - -define block CSTACK with alignment = 8, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { }; -define block HEAP with alignment = 8, size = HEAP_SIZE { }; - -initialize by copy { readwrite }; -do not initialize { section .noinit }; - -place at address mem: MBED_APP_START { readonly section .intvec }; - -place in ROM_region { readonly }; -place in RAM_region { readwrite, - block CSTACK, block HEAP }; diff --git a/targets/targets.json b/targets/targets.json index 2d752db72d..74285a4d28 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -2454,6 +2454,11 @@ "value": "USE_PLL_HSE_EXTC", "macro_name": "CLOCK_SOURCE" }, + "hse_value": { + "help": "HSE default value is 8MHz in stm32g4xx_hal_conf.h", + "value": "8000000", + "macro_name": "HSE_VALUE" + }, "lpticker_lptim": { "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer", "value": 1 @@ -2479,34 +2484,106 @@ "CAN" ] }, - "NUCLEO_G474RE": { + "MCU_STM32G431xB": { "inherits": [ "MCU_STM32G4" ], + "public": false, + "extra_labels_add": [ + "STM32G431xB" + ], + "macros_add": [ + "STM32G431xx" + ] + }, + "MCU_STM32G441xB": { + "inherits": [ + "MCU_STM32G4" + ], + "public": false, + "extra_labels_add": [ + "STM32G441xB" + ], + "macros_add": [ + "STM32G441xx" + ] + }, + "MCU_STM32G471xE": { + "inherits": [ + "MCU_STM32G4" + ], + "public": false, + "extra_labels_add": [ + "STM32G471xE" + ], + "macros_add": [ + "STM32G471xx" + ] + }, + "MCU_STM32G473xE": { + "inherits": [ + "MCU_STM32G4" + ], + "public": false, + "extra_labels_add": [ + "STM32G473xE" + ], + "macros_add": [ + "STM32G473xx" + ] + }, + "MCU_STM32G474xE": { + "inherits": [ + "MCU_STM32G4" + ], + "public": false, + "extra_labels_add": [ + "STM32G474xE" + ], + "macros_add": [ + "STM32G474xx" + ] + }, + "NUCLEO_G474RE": { + "inherits": [ + "MCU_STM32G474xE" + ], "supported_form_factors": [ "ARDUINO", "MORPHO" ], - "config": { - "hse_value": { - "help": "HSE default value is 25MHz in HAL", - "value": "24000000", - "macro_name": "HSE_VALUE" - } + "overrides": { + "hse_value": 24000000 }, - "extra_labels_add": [ - "STM32G474xx", - "STM32G474RE" - ], - "macros_add": [ - "STM32G474xx", - "STM32G474RE" - ], "detect_code": [ "0841" ], "device_name": "STM32G474RETx" }, + "MCU_STM32G483xE": { + "inherits": [ + "MCU_STM32G4" + ], + "public": false, + "extra_labels_add": [ + "STM32G483xE" + ], + "macros_add": [ + "STM32G483xx" + ] + }, + "MCU_STM32G484xE": { + "inherits": [ + "MCU_STM32G4" + ], + "public": false, + "extra_labels_add": [ + "STM32G484xE" + ], + "macros_add": [ + "STM32G484xx" + ] + }, "MCU_STM32H7": { "inherits": [ "MCU_STM32"