Merge pull request #924 from GustavWi/iar_mbed

Fix #910 - debug file with predefined hardware debug settings

workspace_tools/export/iar.py

@@ -27,7 +27,8 @@ class IAREmbeddedWorkbench(Exporter):
         'LPC11U24',
         'LPC11U35_401',
         'LPC11U35_501',
-        'LPCCAPPUCCINO',
+        #Removed LPCCAPPUCCINO linker file and startup file missing
+        #'LPCCAPPUCCINO',
         'LPC1114',
         'LPC1549',
         'LPC812',
@@ -53,7 +54,7 @@ class IAREmbeddedWorkbench(Exporter):
         'NUCLEO_F411RE',
         'NUCLEO_L053R8',
         'NUCLEO_L152RE',
-        'STM32F407',
+        #'STM32F407', Fails to build same for GCC
         'MTS_MDOT_F405RG',
         'MTS_MDOT_F411RE',
         'MTS_DRAGONFLY_F411RE',
@@ -78,3 +79,4 @@ class IAREmbeddedWorkbench(Exporter):
         }
         self.gen_file('iar_%s.ewp.tmpl' % self.target.lower(), ctx, '%s.ewp' % self.program_name)
         self.gen_file('iar.eww.tmpl', ctx, '%s.eww' % self.program_name)
+        self.gen_file('iar_%s.ewd.tmpl' % self.target.lower(), ctx, '%s.ewd' % self.program_name)

workspace_tools/export/iar_mts_dragonfly_f411re.ewp.tmpl

@@ -747,11 +747,11 @@
         </option>
         <option>
           <name>IlinkUseExtraOptions</name>
-          <state>0</state>
+          <state>1</state>
         </option>
         <option>
           <name>IlinkExtraOptions</name>
-          <state></state>
+          <state>--skip_dynamic_initialization</state>
         </option>
         <option>
           <name>IlinkLowLevelInterfaceSlave</name>
@@ -1693,11 +1693,11 @@
         </option>
         <option>
           <name>IlinkUseExtraOptions</name>
-          <state>0</state>
+          <state>1</state>
         </option>
         <option>
           <name>IlinkExtraOptions</name>
-          <state></state>
+          <state>--skip_dynamic_initialization</state>
         </option>
         <option>
           <name>IlinkLowLevelInterfaceSlave</name>

workspace_tools/export/iar_nucleo_f303re.ewp.tmpl

@@ -60,7 +60,7 @@
         </option>
         <option>
           <name>FPU</name>
-          <version>2</version>
+          <version>3</version>
           <state>5</state>
         </option>
         <option>
@@ -99,7 +99,7 @@
         </option>
         <option>
           <name>OGChipSelectEditMenu</name>
-          <state>STM32F303RE	ST STM32F303RE</state>
+          <state>STM32F303xE	ST STM32F303xE</state>
         </option>
         <option>
           <name>GenLowLevelInterface</name>

workspace_tools/export/iar_nucleo_f401re.ewp.tmpl

@@ -30,7 +30,7 @@
         <option>
           <name>Variant</name>
           <version>21</version>
-          <state>38</state>
+          <state>40</state>
         </option>
         <option>
           <name>GEndianMode</name>
@@ -60,8 +60,8 @@
         </option>
         <option>
           <name>FPU</name>
-          <version>2</version>
-          <state>0</state>
+          <version>3</version>
+          <state>5</state>
         </option>
         <option>
           <name>OGCoreOrChip</name>
@@ -99,7 +99,7 @@
         </option>
         <option>
           <name>OGChipSelectEditMenu</name>
-          <state>STM32F401RE	ST STM32F401RE</state>
+          <state>STM32F401xE	ST STM32F401xE</state>
         </option>
         <option>
           <name>GenLowLevelInterface</name>